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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /drivers/usb/host/uhci-hcd.c
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'drivers/usb/host/uhci-hcd.c')
-rw-r--r--drivers/usb/host/uhci-hcd.c467
1 files changed, 182 insertions, 285 deletions
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
index f52d04db28f4..fba99b120588 100644
--- a/drivers/usb/host/uhci-hcd.c
+++ b/drivers/usb/host/uhci-hcd.c
@@ -48,14 +48,14 @@
48#include <asm/system.h> 48#include <asm/system.h>
49 49
50#include "uhci-hcd.h" 50#include "uhci-hcd.h"
51#include "pci-quirks.h"
52 51
53/* 52/*
54 * Version Information 53 * Version Information
55 */ 54 */
56#define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ 55#define DRIVER_AUTHOR \
57Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ 56 "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, " \
58Alan Stern" 57 "Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, " \
58 "Roman Weissgaerber, Alan Stern"
59#define DRIVER_DESC "USB Universal Host Controller Interface driver" 59#define DRIVER_DESC "USB Universal Host Controller Interface driver"
60 60
61/* for flakey hardware, ignore overcurrent indicators */ 61/* for flakey hardware, ignore overcurrent indicators */
@@ -93,7 +93,7 @@ static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
93/* 93/*
94 * Calculate the link pointer DMA value for the first Skeleton QH in a frame. 94 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
95 */ 95 */
96static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame) 96static __hc32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
97{ 97{
98 int skelnum; 98 int skelnum;
99 99
@@ -115,7 +115,7 @@ static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
115 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES); 115 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
116 if (skelnum <= 1) 116 if (skelnum <= 1)
117 skelnum = 9; 117 skelnum = 9;
118 return LINK_TO_QH(uhci->skelqh[skelnum]); 118 return LINK_TO_QH(uhci, uhci->skelqh[skelnum]);
119} 119}
120 120
121#include "uhci-debug.c" 121#include "uhci-debug.c"
@@ -134,15 +134,12 @@ static void finish_reset(struct uhci_hcd *uhci)
134 * We have to clear them by hand. 134 * We have to clear them by hand.
135 */ 135 */
136 for (port = 0; port < uhci->rh_numports; ++port) 136 for (port = 0; port < uhci->rh_numports; ++port)
137 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); 137 uhci_writew(uhci, 0, USBPORTSC1 + (port * 2));
138 138
139 uhci->port_c_suspend = uhci->resuming_ports = 0; 139 uhci->port_c_suspend = uhci->resuming_ports = 0;
140 uhci->rh_state = UHCI_RH_RESET; 140 uhci->rh_state = UHCI_RH_RESET;
141 uhci->is_stopped = UHCI_IS_STOPPED; 141 uhci->is_stopped = UHCI_IS_STOPPED;
142 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
143 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags); 142 clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
144
145 uhci->dead = 0; /* Full reset resurrects the controller */
146} 143}
147 144
148/* 145/*
@@ -152,7 +149,7 @@ static void finish_reset(struct uhci_hcd *uhci)
152static void uhci_hc_died(struct uhci_hcd *uhci) 149static void uhci_hc_died(struct uhci_hcd *uhci)
153{ 150{
154 uhci_get_current_frame_number(uhci); 151 uhci_get_current_frame_number(uhci);
155 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr); 152 uhci->reset_hc(uhci);
156 finish_reset(uhci); 153 finish_reset(uhci);
157 uhci->dead = 1; 154 uhci->dead = 1;
158 155
@@ -167,97 +164,118 @@ static void uhci_hc_died(struct uhci_hcd *uhci)
167 */ 164 */
168static void check_and_reset_hc(struct uhci_hcd *uhci) 165static void check_and_reset_hc(struct uhci_hcd *uhci)
169{ 166{
170 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr)) 167 if (uhci->check_and_reset_hc(uhci))
171 finish_reset(uhci); 168 finish_reset(uhci);
172} 169}
173 170
171#if defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC)
172/*
173 * The two functions below are generic reset functions that are used on systems
174 * that do not have keyboard and mouse legacy support. We assume that we are
175 * running on such a system if CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC is defined.
176 */
177
178/*
179 * Make sure the controller is completely inactive, unable to
180 * generate interrupts or do DMA.
181 */
182static void uhci_generic_reset_hc(struct uhci_hcd *uhci)
183{
184 /* Reset the HC - this will force us to get a
185 * new notification of any already connected
186 * ports due to the virtual disconnect that it
187 * implies.
188 */
189 uhci_writew(uhci, USBCMD_HCRESET, USBCMD);
190 mb();
191 udelay(5);
192 if (uhci_readw(uhci, USBCMD) & USBCMD_HCRESET)
193 dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
194
195 /* Just to be safe, disable interrupt requests and
196 * make sure the controller is stopped.
197 */
198 uhci_writew(uhci, 0, USBINTR);
199 uhci_writew(uhci, 0, USBCMD);
200}
201
202/*
203 * Initialize a controller that was newly discovered or has just been
204 * resumed. In either case we can't be sure of its previous state.
205 *
206 * Returns: 1 if the controller was reset, 0 otherwise.
207 */
208static int uhci_generic_check_and_reset_hc(struct uhci_hcd *uhci)
209{
210 unsigned int cmd, intr;
211
212 /*
213 * When restarting a suspended controller, we expect all the
214 * settings to be the same as we left them:
215 *
216 * Controller is stopped and configured with EGSM set;
217 * No interrupts enabled except possibly Resume Detect.
218 *
219 * If any of these conditions are violated we do a complete reset.
220 */
221
222 cmd = uhci_readw(uhci, USBCMD);
223 if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
224 dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
225 __func__, cmd);
226 goto reset_needed;
227 }
228
229 intr = uhci_readw(uhci, USBINTR);
230 if (intr & (~USBINTR_RESUME)) {
231 dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
232 __func__, intr);
233 goto reset_needed;
234 }
235 return 0;
236
237reset_needed:
238 dev_dbg(uhci_dev(uhci), "Performing full reset\n");
239 uhci_generic_reset_hc(uhci);
240 return 1;
241}
242#endif /* CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC */
243
174/* 244/*
175 * Store the basic register settings needed by the controller. 245 * Store the basic register settings needed by the controller.
176 */ 246 */
177static void configure_hc(struct uhci_hcd *uhci) 247static void configure_hc(struct uhci_hcd *uhci)
178{ 248{
179 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
180
181 /* Set the frame length to the default: 1 ms exactly */ 249 /* Set the frame length to the default: 1 ms exactly */
182 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); 250 uhci_writeb(uhci, USBSOF_DEFAULT, USBSOF);
183 251
184 /* Store the frame list base address */ 252 /* Store the frame list base address */
185 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD); 253 uhci_writel(uhci, uhci->frame_dma_handle, USBFLBASEADD);
186 254
187 /* Set the current frame number */ 255 /* Set the current frame number */
188 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER, 256 uhci_writew(uhci, uhci->frame_number & UHCI_MAX_SOF_NUMBER,
189 uhci->io_addr + USBFRNUM); 257 USBFRNUM);
190
191 /* Mark controller as not halted before we enable interrupts */
192 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
193 mb();
194
195 /* Enable PIRQ */
196 pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
197 258
198 /* Disable platform-specific non-PME# wakeup */ 259 /* perform any arch/bus specific configuration */
199 if (pdev->vendor == PCI_VENDOR_ID_INTEL) 260 if (uhci->configure_hc)
200 pci_write_config_byte(pdev, USBRES_INTEL, 0); 261 uhci->configure_hc(uhci);
201} 262}
202 263
203
204static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) 264static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
205{ 265{
206 int port;
207
208 /* If we have to ignore overcurrent events then almost by definition 266 /* If we have to ignore overcurrent events then almost by definition
209 * we can't depend on resume-detect interrupts. */ 267 * we can't depend on resume-detect interrupts. */
210 if (ignore_oc) 268 if (ignore_oc)
211 return 1; 269 return 1;
212 270
213 switch (to_pci_dev(uhci_dev(uhci))->vendor) { 271 return uhci->resume_detect_interrupts_are_broken ?
214 default: 272 uhci->resume_detect_interrupts_are_broken(uhci) : 0;
215 break;
216
217 case PCI_VENDOR_ID_GENESYS:
218 /* Genesys Logic's GL880S controllers don't generate
219 * resume-detect interrupts.
220 */
221 return 1;
222
223 case PCI_VENDOR_ID_INTEL:
224 /* Some of Intel's USB controllers have a bug that causes
225 * resume-detect interrupts if any port has an over-current
226 * condition. To make matters worse, some motherboards
227 * hardwire unused USB ports' over-current inputs active!
228 * To prevent problems, we will not enable resume-detect
229 * interrupts if any ports are OC.
230 */
231 for (port = 0; port < uhci->rh_numports; ++port) {
232 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
233 USBPORTSC_OC)
234 return 1;
235 }
236 break;
237 }
238 return 0;
239} 273}
240 274
241static int global_suspend_mode_is_broken(struct uhci_hcd *uhci) 275static int global_suspend_mode_is_broken(struct uhci_hcd *uhci)
242{ 276{
243 int port; 277 return uhci->global_suspend_mode_is_broken ?
244 const char *sys_info; 278 uhci->global_suspend_mode_is_broken(uhci) : 0;
245 static char bad_Asus_board[] = "A7V8X";
246
247 /* One of Asus's motherboards has a bug which causes it to
248 * wake up immediately from suspend-to-RAM if any of the ports
249 * are connected. In such cases we will not set EGSM.
250 */
251 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
252 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
253 for (port = 0; port < uhci->rh_numports; ++port) {
254 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
255 USBPORTSC_CCS)
256 return 1;
257 }
258 }
259
260 return 0;
261} 279}
262 280
263static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) 281static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
@@ -320,8 +338,8 @@ __acquires(uhci->lock)
320 !int_enable) 338 !int_enable)
321 uhci->RD_enable = int_enable = 0; 339 uhci->RD_enable = int_enable = 0;
322 340
323 outw(int_enable, uhci->io_addr + USBINTR); 341 uhci_writew(uhci, int_enable, USBINTR);
324 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD); 342 uhci_writew(uhci, egsm_enable | USBCMD_CF, USBCMD);
325 mb(); 343 mb();
326 udelay(5); 344 udelay(5);
327 345
@@ -330,7 +348,7 @@ __acquires(uhci->lock)
330 * controller should stop after a few microseconds. Otherwise 348 * controller should stop after a few microseconds. Otherwise
331 * we will give the controller one frame to stop. 349 * we will give the controller one frame to stop.
332 */ 350 */
333 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { 351 if (!auto_stop && !(uhci_readw(uhci, USBSTS) & USBSTS_HCH)) {
334 uhci->rh_state = UHCI_RH_SUSPENDING; 352 uhci->rh_state = UHCI_RH_SUSPENDING;
335 spin_unlock_irq(&uhci->lock); 353 spin_unlock_irq(&uhci->lock);
336 msleep(1); 354 msleep(1);
@@ -338,7 +356,7 @@ __acquires(uhci->lock)
338 if (uhci->dead) 356 if (uhci->dead)
339 return; 357 return;
340 } 358 }
341 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) 359 if (!(uhci_readw(uhci, USBSTS) & USBSTS_HCH))
342 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n"); 360 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
343 361
344 uhci_get_current_frame_number(uhci); 362 uhci_get_current_frame_number(uhci);
@@ -360,15 +378,14 @@ __acquires(uhci->lock)
360 378
361static void start_rh(struct uhci_hcd *uhci) 379static void start_rh(struct uhci_hcd *uhci)
362{ 380{
363 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
364 uhci->is_stopped = 0; 381 uhci->is_stopped = 0;
365 382
366 /* Mark it configured and running with a 64-byte max packet. 383 /* Mark it configured and running with a 64-byte max packet.
367 * All interrupts are enabled, even though RESUME won't do anything. 384 * All interrupts are enabled, even though RESUME won't do anything.
368 */ 385 */
369 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); 386 uhci_writew(uhci, USBCMD_RS | USBCMD_CF | USBCMD_MAXP, USBCMD);
370 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, 387 uhci_writew(uhci, USBINTR_TIMEOUT | USBINTR_RESUME |
371 uhci->io_addr + USBINTR); 388 USBINTR_IOC | USBINTR_SP, USBINTR);
372 mb(); 389 mb();
373 uhci->rh_state = UHCI_RH_RUNNING; 390 uhci->rh_state = UHCI_RH_RUNNING;
374 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags); 391 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
@@ -391,9 +408,9 @@ __acquires(uhci->lock)
391 unsigned egsm; 408 unsigned egsm;
392 409
393 /* Keep EGSM on if it was set before */ 410 /* Keep EGSM on if it was set before */
394 egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM; 411 egsm = uhci_readw(uhci, USBCMD) & USBCMD_EGSM;
395 uhci->rh_state = UHCI_RH_RESUMING; 412 uhci->rh_state = UHCI_RH_RESUMING;
396 outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD); 413 uhci_writew(uhci, USBCMD_FGR | USBCMD_CF | egsm, USBCMD);
397 spin_unlock_irq(&uhci->lock); 414 spin_unlock_irq(&uhci->lock);
398 msleep(20); 415 msleep(20);
399 spin_lock_irq(&uhci->lock); 416 spin_lock_irq(&uhci->lock);
@@ -401,10 +418,10 @@ __acquires(uhci->lock)
401 return; 418 return;
402 419
403 /* End Global Resume and wait for EOP to be sent */ 420 /* End Global Resume and wait for EOP to be sent */
404 outw(USBCMD_CF, uhci->io_addr + USBCMD); 421 uhci_writew(uhci, USBCMD_CF, USBCMD);
405 mb(); 422 mb();
406 udelay(4); 423 udelay(4);
407 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) 424 if (uhci_readw(uhci, USBCMD) & USBCMD_FGR)
408 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); 425 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
409 } 426 }
410 427
@@ -424,10 +441,10 @@ static irqreturn_t uhci_irq(struct usb_hcd *hcd)
424 * interrupt cause. Contrary to the UHCI specification, the 441 * interrupt cause. Contrary to the UHCI specification, the
425 * "HC Halted" status bit is persistent: it is RO, not R/WC. 442 * "HC Halted" status bit is persistent: it is RO, not R/WC.
426 */ 443 */
427 status = inw(uhci->io_addr + USBSTS); 444 status = uhci_readw(uhci, USBSTS);
428 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ 445 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
429 return IRQ_NONE; 446 return IRQ_NONE;
430 outw(status, uhci->io_addr + USBSTS); /* Clear it */ 447 uhci_writew(uhci, status, USBSTS); /* Clear it */
431 448
432 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { 449 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
433 if (status & USBSTS_HSE) 450 if (status & USBSTS_HSE)
@@ -449,6 +466,7 @@ static irqreturn_t uhci_irq(struct usb_hcd *hcd)
449 lprintk(errbuf); 466 lprintk(errbuf);
450 } 467 }
451 uhci_hc_died(uhci); 468 uhci_hc_died(uhci);
469 usb_hc_died(hcd);
452 470
453 /* Force a callback in case there are 471 /* Force a callback in case there are
454 * pending unlinks */ 472 * pending unlinks */
@@ -471,7 +489,7 @@ static irqreturn_t uhci_irq(struct usb_hcd *hcd)
471 489
472/* 490/*
473 * Store the current frame number in uhci->frame_number if the controller 491 * Store the current frame number in uhci->frame_number if the controller
474 * is runnning. Expand from 11 bits (of which we use only 10) to a 492 * is running. Expand from 11 bits (of which we use only 10) to a
475 * full-sized integer. 493 * full-sized integer.
476 * 494 *
477 * Like many other parts of the driver, this code relies on being polled 495 * Like many other parts of the driver, this code relies on being polled
@@ -482,7 +500,7 @@ static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
482 if (!uhci->is_stopped) { 500 if (!uhci->is_stopped) {
483 unsigned delta; 501 unsigned delta;
484 502
485 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) & 503 delta = (uhci_readw(uhci, USBFRNUM) - uhci->frame_number) &
486 (UHCI_NUMFRAMES - 1); 504 (UHCI_NUMFRAMES - 1);
487 uhci->frame_number += delta; 505 uhci->frame_number += delta;
488 } 506 }
@@ -519,61 +537,6 @@ static void release_uhci(struct uhci_hcd *uhci)
519 uhci->frame, uhci->frame_dma_handle); 537 uhci->frame, uhci->frame_dma_handle);
520} 538}
521 539
522static int uhci_init(struct usb_hcd *hcd)
523{
524 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
525 unsigned io_size = (unsigned) hcd->rsrc_len;
526 int port;
527
528 uhci->io_addr = (unsigned long) hcd->rsrc_start;
529
530 /* The UHCI spec says devices must have 2 ports, and goes on to say
531 * they may have more but gives no way to determine how many there
532 * are. However according to the UHCI spec, Bit 7 of the port
533 * status and control register is always set to 1. So we try to
534 * use this to our advantage. Another common failure mode when
535 * a nonexistent register is addressed is to return all ones, so
536 * we test for that also.
537 */
538 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
539 unsigned int portstatus;
540
541 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
542 if (!(portstatus & 0x0080) || portstatus == 0xffff)
543 break;
544 }
545 if (debug)
546 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
547
548 /* Anything greater than 7 is weird so we'll ignore it. */
549 if (port > UHCI_RH_MAXCHILD) {
550 dev_info(uhci_dev(uhci), "port count misdetected? "
551 "forcing to 2 ports\n");
552 port = 2;
553 }
554 uhci->rh_numports = port;
555
556 /* Kick BIOS off this hardware and reset if the controller
557 * isn't already safely quiescent.
558 */
559 check_and_reset_hc(uhci);
560 return 0;
561}
562
563/* Make sure the controller is quiescent and that we're not using it
564 * any more. This is mainly for the benefit of programs which, like kexec,
565 * expect the hardware to be idle: not doing DMA or generating IRQs.
566 *
567 * This routine may be called in a damaged or failing kernel. Hence we
568 * do not acquire the spinlock before shutting down the controller.
569 */
570static void uhci_shutdown(struct pci_dev *pdev)
571{
572 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
573
574 uhci_hc_died(hcd_to_uhci(hcd));
575}
576
577/* 540/*
578 * Allocate a frame list, and then setup the skeleton 541 * Allocate a frame list, and then setup the skeleton
579 * 542 *
@@ -668,16 +631,16 @@ static int uhci_start(struct usb_hcd *hcd)
668 * 8 Interrupt queues; link all higher int queues to int1 = async 631 * 8 Interrupt queues; link all higher int queues to int1 = async
669 */ 632 */
670 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i) 633 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
671 uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh); 634 uhci->skelqh[i]->link = LINK_TO_QH(uhci, uhci->skel_async_qh);
672 uhci->skel_async_qh->link = UHCI_PTR_TERM; 635 uhci->skel_async_qh->link = UHCI_PTR_TERM(uhci);
673 uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh); 636 uhci->skel_term_qh->link = LINK_TO_QH(uhci, uhci->skel_term_qh);
674 637
675 /* This dummy TD is to work around a bug in Intel PIIX controllers */ 638 /* This dummy TD is to work around a bug in Intel PIIX controllers */
676 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | 639 uhci_fill_td(uhci, uhci->term_td, 0, uhci_explen(0) |
677 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0); 640 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
678 uhci->term_td->link = UHCI_PTR_TERM; 641 uhci->term_td->link = UHCI_PTR_TERM(uhci);
679 uhci->skel_async_qh->element = uhci->skel_term_qh->element = 642 uhci->skel_async_qh->element = uhci->skel_term_qh->element =
680 LINK_TO_TD(uhci->term_td); 643 LINK_TO_TD(uhci, uhci->term_td);
681 644
682 /* 645 /*
683 * Fill the frame list: make all entries point to the proper 646 * Fill the frame list: make all entries point to the proper
@@ -790,86 +753,6 @@ static int uhci_rh_resume(struct usb_hcd *hcd)
790 return rc; 753 return rc;
791} 754}
792 755
793static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
794{
795 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
796 struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
797 int rc = 0;
798
799 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
800
801 spin_lock_irq(&uhci->lock);
802 if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
803 goto done_okay; /* Already suspended or dead */
804
805 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
806 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
807 rc = -EBUSY;
808 goto done;
809 };
810
811 /* All PCI host controllers are required to disable IRQ generation
812 * at the source, so we must turn off PIRQ.
813 */
814 pci_write_config_word(pdev, USBLEGSUP, 0);
815 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
816
817 /* Enable platform-specific non-PME# wakeup */
818 if (do_wakeup) {
819 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
820 pci_write_config_byte(pdev, USBRES_INTEL,
821 USBPORT1EN | USBPORT2EN);
822 }
823
824done_okay:
825 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
826done:
827 spin_unlock_irq(&uhci->lock);
828 return rc;
829}
830
831static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
832{
833 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
834
835 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
836
837 /* Since we aren't in D3 any more, it's safe to set this flag
838 * even if the controller was dead.
839 */
840 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
841
842 spin_lock_irq(&uhci->lock);
843
844 /* Make sure resume from hibernation re-enumerates everything */
845 if (hibernated)
846 uhci_hc_died(uhci);
847
848 /* The firmware or a boot kernel may have changed the controller
849 * settings during a system wakeup. Check it and reconfigure
850 * to avoid problems.
851 */
852 check_and_reset_hc(uhci);
853
854 /* If the controller was dead before, it's back alive now */
855 configure_hc(uhci);
856
857 /* Tell the core if the controller had to be reset */
858 if (uhci->rh_state == UHCI_RH_RESET)
859 usb_root_hub_lost_power(hcd->self.root_hub);
860
861 spin_unlock_irq(&uhci->lock);
862
863 /* If interrupts don't work and remote wakeup is enabled then
864 * the suspended root hub needs to be polled.
865 */
866 if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
867 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
868
869 /* Does the root hub have a port wakeup pending? */
870 usb_hcd_poll_rh_status(hcd);
871 return 0;
872}
873#endif 756#endif
874 757
875/* Wait until a particular device/endpoint's QH is idle, and free it */ 758/* Wait until a particular device/endpoint's QH is idle, and free it */
@@ -907,67 +790,62 @@ static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
907 /* Minimize latency by avoiding the spinlock */ 790 /* Minimize latency by avoiding the spinlock */
908 frame_number = uhci->frame_number; 791 frame_number = uhci->frame_number;
909 barrier(); 792 barrier();
910 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) & 793 delta = (uhci_readw(uhci, USBFRNUM) - frame_number) &
911 (UHCI_NUMFRAMES - 1); 794 (UHCI_NUMFRAMES - 1);
912 return frame_number + delta; 795 return frame_number + delta;
913} 796}
914 797
915static const char hcd_name[] = "uhci_hcd"; 798/* Determines number of ports on controller */
916 799static int uhci_count_ports(struct usb_hcd *hcd)
917static const struct hc_driver uhci_driver = { 800{
918 .description = hcd_name, 801 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
919 .product_desc = "UHCI Host Controller", 802 unsigned io_size = (unsigned) hcd->rsrc_len;
920 .hcd_priv_size = sizeof(struct uhci_hcd), 803 int port;
921
922 /* Generic hardware linkage */
923 .irq = uhci_irq,
924 .flags = HCD_USB11,
925
926 /* Basic lifecycle operations */
927 .reset = uhci_init,
928 .start = uhci_start,
929#ifdef CONFIG_PM
930 .pci_suspend = uhci_pci_suspend,
931 .pci_resume = uhci_pci_resume,
932 .bus_suspend = uhci_rh_suspend,
933 .bus_resume = uhci_rh_resume,
934#endif
935 .stop = uhci_stop,
936 804
937 .urb_enqueue = uhci_urb_enqueue, 805 /* The UHCI spec says devices must have 2 ports, and goes on to say
938 .urb_dequeue = uhci_urb_dequeue, 806 * they may have more but gives no way to determine how many there
807 * are. However according to the UHCI spec, Bit 7 of the port
808 * status and control register is always set to 1. So we try to
809 * use this to our advantage. Another common failure mode when
810 * a nonexistent register is addressed is to return all ones, so
811 * we test for that also.
812 */
813 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
814 unsigned int portstatus;
939 815
940 .endpoint_disable = uhci_hcd_endpoint_disable, 816 portstatus = uhci_readw(uhci, USBPORTSC1 + (port * 2));
941 .get_frame_number = uhci_hcd_get_frame_number, 817 if (!(portstatus & 0x0080) || portstatus == 0xffff)
818 break;
819 }
820 if (debug)
821 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
942 822
943 .hub_status_data = uhci_hub_status_data, 823 /* Anything greater than 7 is weird so we'll ignore it. */
944 .hub_control = uhci_hub_control, 824 if (port > UHCI_RH_MAXCHILD) {
945}; 825 dev_info(uhci_dev(uhci), "port count misdetected? "
826 "forcing to 2 ports\n");
827 port = 2;
828 }
946 829
947static const struct pci_device_id uhci_pci_ids[] = { { 830 return port;
948 /* handle any USB UHCI controller */ 831}
949 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
950 .driver_data = (unsigned long) &uhci_driver,
951 }, { /* end: all zeroes */ }
952};
953 832
954MODULE_DEVICE_TABLE(pci, uhci_pci_ids); 833static const char hcd_name[] = "uhci_hcd";
955 834
956static struct pci_driver uhci_pci_driver = { 835#ifdef CONFIG_PCI
957 .name = (char *)hcd_name, 836#include "uhci-pci.c"
958 .id_table = uhci_pci_ids, 837#define PCI_DRIVER uhci_pci_driver
838#endif
959 839
960 .probe = usb_hcd_pci_probe, 840#ifdef CONFIG_SPARC_LEON
961 .remove = usb_hcd_pci_remove, 841#include "uhci-grlib.c"
962 .shutdown = uhci_shutdown, 842#define PLATFORM_DRIVER uhci_grlib_driver
843#endif
963 844
964#ifdef CONFIG_PM_SLEEP 845#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER)
965 .driver = { 846#error "missing bus glue for uhci-hcd"
966 .pm = &usb_hcd_pci_pm_ops
967 },
968#endif 847#endif
969}; 848
970
971static int __init uhci_hcd_init(void) 849static int __init uhci_hcd_init(void)
972{ 850{
973 int retval = -ENOMEM; 851 int retval = -ENOMEM;
@@ -993,13 +871,27 @@ static int __init uhci_hcd_init(void)
993 if (!uhci_up_cachep) 871 if (!uhci_up_cachep)
994 goto up_failed; 872 goto up_failed;
995 873
996 retval = pci_register_driver(&uhci_pci_driver); 874#ifdef PLATFORM_DRIVER
997 if (retval) 875 retval = platform_driver_register(&PLATFORM_DRIVER);
998 goto init_failed; 876 if (retval < 0)
877 goto clean0;
878#endif
879
880#ifdef PCI_DRIVER
881 retval = pci_register_driver(&PCI_DRIVER);
882 if (retval < 0)
883 goto clean1;
884#endif
999 885
1000 return 0; 886 return 0;
1001 887
1002init_failed: 888#ifdef PCI_DRIVER
889clean1:
890#endif
891#ifdef PLATFORM_DRIVER
892 platform_driver_unregister(&PLATFORM_DRIVER);
893clean0:
894#endif
1003 kmem_cache_destroy(uhci_up_cachep); 895 kmem_cache_destroy(uhci_up_cachep);
1004 896
1005up_failed: 897up_failed:
@@ -1016,7 +908,12 @@ errbuf_failed:
1016 908
1017static void __exit uhci_hcd_cleanup(void) 909static void __exit uhci_hcd_cleanup(void)
1018{ 910{
1019 pci_unregister_driver(&uhci_pci_driver); 911#ifdef PLATFORM_DRIVER
912 platform_driver_unregister(&PLATFORM_DRIVER);
913#endif
914#ifdef PCI_DRIVER
915 pci_unregister_driver(&PCI_DRIVER);
916#endif
1020 kmem_cache_destroy(uhci_up_cachep); 917 kmem_cache_destroy(uhci_up_cachep);
1021 debugfs_remove(uhci_debugfs_root); 918 debugfs_remove(uhci_debugfs_root);
1022 kfree(errbuf); 919 kfree(errbuf);