diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-08-21 02:38:44 -0400 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-08-21 02:38:44 -0400 |
commit | 8eb891fc809b2300137bcd247025628c06c95a63 (patch) | |
tree | 5f7da9517835fef971a2f0c8ed69ca86c3f8099d /drivers/usb/host/ehci.h | |
parent | 848c4dd5153c7a0de55470ce99a8e13a63b4703f (diff) |
Revert "USB: EHCI cpufreq fix"
This reverts commit 196705c9bbc03540429b0f7cf9ee35c2f928a534. It was
reported to cause a regression by Daniel Exner, and Arjan van de Ven
points out that we actually already have infrastructure in place for
setting limits on acceptable DMA latency that would be the much more
correct fix for the problem with some Broadcom EHCI controllers.
Fixed up trivial conflicts due to the changes to support big-endian host
controller descriptors in drivers/usb/host/{ehci-sched.c,ehci.h}.
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/usb/host/ehci.h')
-rw-r--r-- | drivers/usb/host/ehci.h | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index 2c68a04230c1..951d69fec513 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h | |||
@@ -71,12 +71,6 @@ struct ehci_hcd { /* one per controller */ | |||
71 | __u32 hcs_params; /* cached register copy */ | 71 | __u32 hcs_params; /* cached register copy */ |
72 | spinlock_t lock; | 72 | spinlock_t lock; |
73 | 73 | ||
74 | #ifdef CONFIG_CPU_FREQ | ||
75 | struct notifier_block cpufreq_transition; | ||
76 | int cpufreq_changing; | ||
77 | struct list_head split_intr_qhs; | ||
78 | #endif | ||
79 | |||
80 | /* async schedule support */ | 74 | /* async schedule support */ |
81 | struct ehci_qh *async; | 75 | struct ehci_qh *async; |
82 | struct ehci_qh *reclaim; | 76 | struct ehci_qh *reclaim; |
@@ -439,10 +433,6 @@ struct ehci_qh { | |||
439 | __hc32 hw_next; /* see EHCI 3.6.1 */ | 433 | __hc32 hw_next; /* see EHCI 3.6.1 */ |
440 | __hc32 hw_info1; /* see EHCI 3.6.2 */ | 434 | __hc32 hw_info1; /* see EHCI 3.6.2 */ |
441 | #define QH_HEAD 0x00008000 | 435 | #define QH_HEAD 0x00008000 |
442 | #define QH_INACTIVATE 0x00000080 | ||
443 | |||
444 | #define INACTIVATE_BIT(ehci) cpu_to_hc32(ehci, QH_INACTIVATE) | ||
445 | |||
446 | __hc32 hw_info2; /* see EHCI 3.6.2 */ | 436 | __hc32 hw_info2; /* see EHCI 3.6.2 */ |
447 | #define QH_SMASK 0x000000ff | 437 | #define QH_SMASK 0x000000ff |
448 | #define QH_CMASK 0x0000ff00 | 438 | #define QH_CMASK 0x0000ff00 |
@@ -492,10 +482,6 @@ struct ehci_qh { | |||
492 | unsigned short start; /* where polling starts */ | 482 | unsigned short start; /* where polling starts */ |
493 | #define NO_FRAME ((unsigned short)~0) /* pick new start */ | 483 | #define NO_FRAME ((unsigned short)~0) /* pick new start */ |
494 | struct usb_device *dev; /* access to TT */ | 484 | struct usb_device *dev; /* access to TT */ |
495 | #ifdef CONFIG_CPU_FREQ | ||
496 | struct list_head split_intr_qhs; /* list of split qhs */ | ||
497 | __le32 was_active; /* active bit before "i" set */ | ||
498 | #endif | ||
499 | } __attribute__ ((aligned (32))); | 485 | } __attribute__ ((aligned (32))); |
500 | 486 | ||
501 | /*-------------------------------------------------------------------------*/ | 487 | /*-------------------------------------------------------------------------*/ |