Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

1 files changed, 79 insertions, 2 deletions

diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index a1e8d273103f..1102ce65a3a9 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -22,6 +22,9 @@
 #error "This file is PCI bus glue.  CONFIG_PCI must be defined."
 #endif
 
+/* defined here to avoid adding to pci_ids.h for single instance use */
+#define PCI_DEVICE_ID_INTEL_CE4100_USB  0x2e70
+
 /*-------------------------------------------------------------------------*/
 
 /* called after powerup, by probe or system-pm "wakeup" */
@@ -67,7 +70,7 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
 
         ehci->caps = hcd->regs;
         ehci->regs = hcd->regs +
-                HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
+                HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 
         dbg_hcs_params(ehci, "reset");
         dbg_hcc_params(ehci, "reset");
@@ -103,6 +106,19 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
         if (retval)
                 return retval;
 
+        if ((pdev->vendor == PCI_VENDOR_ID_AMD && pdev->device == 0x7808) ||
+            (pdev->vendor == PCI_VENDOR_ID_ATI && pdev->device == 0x4396)) {
+                /* EHCI controller on AMD SB700/SB800/Hudson-2/3 platforms may
+                 * read/write memory space which does not belong to it when
+                 * there is NULL pointer with T-bit set to 1 in the frame list
+                 * table. To avoid the issue, the frame list link pointer
+                 * should always contain a valid pointer to a inactive qh.
+                 */
+                ehci->use_dummy_qh = 1;
+                ehci_info(ehci, "applying AMD SB700/SB800/Hudson-2/3 EHCI "
+                                "dummy qh workaround\n");
+        }
+
         /* data structure init */
         retval = ehci_init(hcd);
         if (retval)
@@ -124,6 +140,10 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
                         ehci_info(ehci, "disable lpm for langwell/penwell\n");
                         ehci->has_lpm = 0;
                 }
+                if (pdev->device == PCI_DEVICE_ID_INTEL_CE4100_USB) {
+                        hcd->has_tt = 1;
+                        tdi_reset(ehci);
+                }
                 break;
         case PCI_VENDOR_ID_TDI:
                 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
@@ -132,6 +152,9 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
                 }
                 break;
         case PCI_VENDOR_ID_AMD:
+                /* AMD PLL quirk */
+                if (usb_amd_find_chipset_info())
+                        ehci->amd_pll_fix = 1;
                 /* AMD8111 EHCI doesn't work, according to AMD errata */
                 if (pdev->device == 0x7463) {
                         ehci_info(ehci, "ignoring AMD8111 (errata)\n");
@@ -148,6 +171,18 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
                         if (pdev->revision < 0xa4)
                                 ehci->no_selective_suspend = 1;
                         break;
+
+                /* MCP89 chips on the MacBookAir3,1 give EPROTO when
+                 * fetching device descriptors unless LPM is disabled.
+                 * There are also intermittent problems enumerating
+                 * devices with PPCD enabled.
+                 */
+                case 0x0d9d:
+                        ehci_info(ehci, "disable lpm/ppcd for nvidia mcp89");
+                        ehci->has_lpm = 0;
+                        ehci->has_ppcd = 0;
+                        ehci->command &= ~CMD_PPCEE;
+                        break;
                 }
                 break;
         case PCI_VENDOR_ID_VIA:
@@ -165,6 +200,9 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
                 }
                 break;
         case PCI_VENDOR_ID_ATI:
+                /* AMD PLL quirk */
+                if (usb_amd_find_chipset_info())
+                        ehci->amd_pll_fix = 1;
                 /* SB600 and old version of SB700 have a bug in EHCI controller,
                  * which causes usb devices lose response in some cases.
                  */
@@ -296,8 +334,8 @@ static int ehci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
          * mark HW unaccessible.  The PM and USB cores make sure that
          * the root hub is either suspended or stopped.
          */
-        spin_lock_irqsave (&ehci->lock, flags);
         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
+        spin_lock_irqsave (&ehci->lock, flags);
         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
         (void)ehci_readl(ehci, &ehci->regs->intr_enable);
 
@@ -310,11 +348,50 @@ static int ehci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
         return rc;
 }
 
+static bool usb_is_intel_switchable_ehci(struct pci_dev *pdev)
+{
+        return pdev->class == PCI_CLASS_SERIAL_USB_EHCI &&
+                pdev->vendor == PCI_VENDOR_ID_INTEL &&
+                pdev->device == 0x1E26;
+}
+
+static void ehci_enable_xhci_companion(void)
+{
+        struct pci_dev          *companion = NULL;
+
+        /* The xHCI and EHCI controllers are not on the same PCI slot */
+        for_each_pci_dev(companion) {
+                if (!usb_is_intel_switchable_xhci(companion))
+                        continue;
+                usb_enable_xhci_ports(companion);
+                return;
+        }
+}
+
 static int ehci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 {
         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 
+        /* The BIOS on systems with the Intel Panther Point chipset may or may
+         * not support xHCI natively.  That means that during system resume, it
+         * may switch the ports back to EHCI so that users can use their
+         * keyboard to select a kernel from GRUB after resume from hibernate.
+         *
+         * The BIOS is supposed to remember whether the OS had xHCI ports
+         * enabled before resume, and switch the ports back to xHCI when the
+         * BIOS/OS semaphore is written, but we all know we can't trust BIOS
+         * writers.
+         *
+         * Unconditionally switch the ports back to xHCI after a system resume.
+         * We can't tell whether the EHCI or xHCI controller will be resumed
+         * first, so we have to do the port switchover in both drivers.  Writing
+         * a '1' to the port switchover registers should have no effect if the
+         * port was already switched over.
+         */
+        if (usb_is_intel_switchable_ehci(pdev))
+                ehci_enable_xhci_companion();
+
         // maybe restore FLADJ
 
         if (time_before(jiffies, ehci->next_statechange))