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authorJan Andersson <jan@gaisler.com>2011-05-03 14:11:57 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-03 14:43:21 -0400
commitc430131a02d677aa708f56342c1565edfdacb3c0 (patch)
tree15e9930a2512e4b05b7cfd4684f36dd26b0b990f /drivers/usb/host/ehci-hcd.c
parent2ce2c3ac8852cfc8f74f4b7b9a2c4cdff007f96a (diff)
USB: EHCI: Support controllers with big endian capability regs
The two first HC capability registers (CAPLENGTH and HCIVERSION) are defined as one 8-bit and one 16-bit register. Most HC implementations have selected to treat these registers as part of a 32-bit register, giving the same layout for both big and small endian systems. This patch adds a new quirk, big_endian_capbase, to support controllers with big endian register interfaces that treat HCIVERSION and CAPLENGTH as individual registers. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ehci-hcd.c')
-rw-r--r--drivers/usb/host/ehci-hcd.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 83b7d5f02a15..8164ffafd10a 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -739,7 +739,7 @@ static int ehci_run (struct usb_hcd *hcd)
739 up_write(&ehci_cf_port_reset_rwsem); 739 up_write(&ehci_cf_port_reset_rwsem);
740 ehci->last_periodic_enable = ktime_get_real(); 740 ehci->last_periodic_enable = ktime_get_real();
741 741
742 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase)); 742 temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
743 ehci_info (ehci, 743 ehci_info (ehci,
744 "USB %x.%x started, EHCI %x.%02x%s\n", 744 "USB %x.%x started, EHCI %x.%02x%s\n",
745 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), 745 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),