diff options
author | Lukasz Majewski <l.majewski@samsung.com> | 2012-05-04 08:17:00 -0400 |
---|---|---|
committer | Felipe Balbi <balbi@ti.com> | 2012-05-04 08:53:10 -0400 |
commit | d77039c111565614f07887b44b098ca38360f720 (patch) | |
tree | 9b8b51fefe36d1fdcb5a149a72db492ddfcfe247 /drivers/usb/gadget/s3c-hsotg.c | |
parent | 127d42ae47703fe7b7bc59c0fb687a05e22a92a4 (diff) |
usb:hsotg:samsung: Remove platform dependent functions from s3c-hsotg
Two functions - namely: s3c_hsotg_gate and s3c_hsotg_otgreset are platform
dependent and therefore removed from Samsung's generic s3c-hsotg code.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/gadget/s3c-hsotg.c')
-rw-r--r-- | drivers/usb/gadget/s3c-hsotg.c | 77 |
1 files changed, 0 insertions, 77 deletions
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c index 70c6f3b45cf2..34069dc55cb0 100644 --- a/drivers/usb/gadget/s3c-hsotg.c +++ b/drivers/usb/gadget/s3c-hsotg.c | |||
@@ -36,8 +36,6 @@ | |||
36 | #include <plat/regs-usb-hsotg-phy.h> | 36 | #include <plat/regs-usb-hsotg-phy.h> |
37 | #include "s3c-hsotg.h" | 37 | #include "s3c-hsotg.h" |
38 | #include <linux/platform_data/s3c-hsotg.h> | 38 | #include <linux/platform_data/s3c-hsotg.h> |
39 | #include <mach/regs-sys.h> | ||
40 | #include <plat/cpu.h> | ||
41 | 39 | ||
42 | #define DMA_ADDR_INVALID (~((dma_addr_t)0)) | 40 | #define DMA_ADDR_INVALID (~((dma_addr_t)0)) |
43 | 41 | ||
@@ -2846,51 +2844,6 @@ static void __devinit s3c_hsotg_initep(struct s3c_hsotg *hsotg, | |||
2846 | } | 2844 | } |
2847 | } | 2845 | } |
2848 | 2846 | ||
2849 | /** | ||
2850 | * s3c_hsotg_otgreset - reset the OtG phy block | ||
2851 | * @hsotg: The host state. | ||
2852 | * | ||
2853 | * Power up the phy, set the basic configuration and start the PHY. | ||
2854 | */ | ||
2855 | static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg) | ||
2856 | { | ||
2857 | struct clk *xusbxti; | ||
2858 | u32 pwr, osc; | ||
2859 | |||
2860 | pwr = readl(S3C_PHYPWR); | ||
2861 | pwr &= ~0x19; | ||
2862 | writel(pwr, S3C_PHYPWR); | ||
2863 | mdelay(1); | ||
2864 | |||
2865 | osc = hsotg->plat->is_osc ? S3C_PHYCLK_EXT_OSC : 0; | ||
2866 | |||
2867 | xusbxti = clk_get(hsotg->dev, "xusbxti"); | ||
2868 | if (xusbxti && !IS_ERR(xusbxti)) { | ||
2869 | switch (clk_get_rate(xusbxti)) { | ||
2870 | case 12*MHZ: | ||
2871 | osc |= S3C_PHYCLK_CLKSEL_12M; | ||
2872 | break; | ||
2873 | case 24*MHZ: | ||
2874 | osc |= S3C_PHYCLK_CLKSEL_24M; | ||
2875 | break; | ||
2876 | default: | ||
2877 | case 48*MHZ: | ||
2878 | /* default reference clock */ | ||
2879 | break; | ||
2880 | } | ||
2881 | clk_put(xusbxti); | ||
2882 | } | ||
2883 | |||
2884 | writel(osc | 0x10, S3C_PHYCLK); | ||
2885 | |||
2886 | /* issue a full set of resets to the otg and core */ | ||
2887 | |||
2888 | writel(S3C_RSTCON_PHY, S3C_RSTCON); | ||
2889 | udelay(20); /* at-least 10uS */ | ||
2890 | writel(0, S3C_RSTCON); | ||
2891 | } | ||
2892 | |||
2893 | |||
2894 | static void s3c_hsotg_init(struct s3c_hsotg *hsotg) | 2847 | static void s3c_hsotg_init(struct s3c_hsotg *hsotg) |
2895 | { | 2848 | { |
2896 | u32 cfg4; | 2849 | u32 cfg4; |
@@ -3263,32 +3216,6 @@ static void __devexit s3c_hsotg_delete_debug(struct s3c_hsotg *hsotg) | |||
3263 | debugfs_remove(hsotg->debug_root); | 3216 | debugfs_remove(hsotg->debug_root); |
3264 | } | 3217 | } |
3265 | 3218 | ||
3266 | /** | ||
3267 | * s3c_hsotg_gate - set the hardware gate for the block | ||
3268 | * @pdev: The device we bound to | ||
3269 | * @on: On or off. | ||
3270 | * | ||
3271 | * Set the hardware gate setting into the block. If we end up on | ||
3272 | * something other than an S3C64XX, then we might need to change this | ||
3273 | * to using a platform data callback, or some other mechanism. | ||
3274 | */ | ||
3275 | static void s3c_hsotg_gate(struct platform_device *pdev, bool on) | ||
3276 | { | ||
3277 | unsigned long flags; | ||
3278 | u32 others; | ||
3279 | |||
3280 | local_irq_save(flags); | ||
3281 | |||
3282 | others = __raw_readl(S3C64XX_OTHERS); | ||
3283 | if (on) | ||
3284 | others |= S3C64XX_OTHERS_USBMASK; | ||
3285 | else | ||
3286 | others &= ~S3C64XX_OTHERS_USBMASK; | ||
3287 | __raw_writel(others, S3C64XX_OTHERS); | ||
3288 | |||
3289 | local_irq_restore(flags); | ||
3290 | } | ||
3291 | |||
3292 | static struct s3c_hsotg_plat s3c_hsotg_default_pdata; | 3219 | static struct s3c_hsotg_plat s3c_hsotg_default_pdata; |
3293 | 3220 | ||
3294 | static int __devinit s3c_hsotg_probe(struct platform_device *pdev) | 3221 | static int __devinit s3c_hsotg_probe(struct platform_device *pdev) |
@@ -3390,9 +3317,7 @@ static int __devinit s3c_hsotg_probe(struct platform_device *pdev) | |||
3390 | 3317 | ||
3391 | clk_enable(hsotg->clk); | 3318 | clk_enable(hsotg->clk); |
3392 | 3319 | ||
3393 | s3c_hsotg_gate(pdev, true); | ||
3394 | 3320 | ||
3395 | s3c_hsotg_otgreset(hsotg); | ||
3396 | s3c_hsotg_corereset(hsotg); | 3321 | s3c_hsotg_corereset(hsotg); |
3397 | s3c_hsotg_init(hsotg); | 3322 | s3c_hsotg_init(hsotg); |
3398 | 3323 | ||
@@ -3412,7 +3337,6 @@ static int __devinit s3c_hsotg_probe(struct platform_device *pdev) | |||
3412 | return 0; | 3337 | return 0; |
3413 | 3338 | ||
3414 | err_add_udc: | 3339 | err_add_udc: |
3415 | s3c_hsotg_gate(pdev, false); | ||
3416 | clk_disable(hsotg->clk); | 3340 | clk_disable(hsotg->clk); |
3417 | clk_put(hsotg->clk); | 3341 | clk_put(hsotg->clk); |
3418 | 3342 | ||
@@ -3445,7 +3369,6 @@ static int __devexit s3c_hsotg_remove(struct platform_device *pdev) | |||
3445 | release_resource(hsotg->regs_res); | 3369 | release_resource(hsotg->regs_res); |
3446 | kfree(hsotg->regs_res); | 3370 | kfree(hsotg->regs_res); |
3447 | 3371 | ||
3448 | s3c_hsotg_gate(pdev, false); | ||
3449 | 3372 | ||
3450 | clk_disable(hsotg->clk); | 3373 | clk_disable(hsotg->clk); |
3451 | clk_put(hsotg->clk); | 3374 | clk_put(hsotg->clk); |