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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 18:50:46 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 18:50:46 -0400
commita481991467d38afb43c3921d5b5b59ccb61b04ba (patch)
treea4b0b9a14da6fd5ef7b9b512bb32dbfcfcf2cd71 /drivers/usb/chipidea
parentf6a26ae7699416d86bea8cb68ce413571e9cab3c (diff)
parentcda4db53e9c28061c100400e1a4d273ea61dfba9 (diff)
Merge tag 'usb-3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB 3.5-rc1 changes from Greg Kroah-Hartman: "Here is the big USB 3.5-rc1 pull request for the 3.5-rc1 merge window. It's touches a lot of different parts of the kernel, all USB drivers, due to some API cleanups (getting rid of the ancient err() macro) and some changes that are needed for USB 3.0 power management updates. There are also lots of new drivers, pimarily gadget, but others as well. We deleted a staging driver, which was nice, and finally dropped the obsolete usbfs code, which will make Al happy to never have to touch that again. There were some build errors in the tree that linux-next found a few days ago, but those were fixed by the most recent changes (all were due to us not building with CONFIG_PM disabled.) Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>" * tag 'usb-3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (477 commits) xhci: Fix DIV_ROUND_UP compile error. xhci: Fix compile with CONFIG_USB_SUSPEND=n USB: Fix core compile with CONFIG_USB_SUSPEND=n brcm80211: Fix compile error for .disable_hub_initiated_lpm. Revert "USB: EHCI: work around bug in the Philips ISP1562 controller" MAINTAINERS: Add myself as maintainer to the USB PHY Layer USB: EHCI: fix command register configuration lost problem USB: Remove races in devio.c USB: ehci-platform: remove update_device USB: Disable hub-initiated LPM for comms devices. xhci: Add Intel U1/U2 timeout policy. xhci: Add infrastructure for host-specific LPM policies. USB: Add macros for interrupt endpoint types. xhci: Reserve one command for USB3 LPM disable. xhci: Some Evaluate Context commands must succeed. USB: Disable USB 3.0 LPM in critical sections. USB: Add support to enable/disable USB3 link states. USB: Allow drivers to disable hub-initiated LPM. USB: Calculate USB 3.0 exit latencies for LPM. USB: Refactor code to set LPM support flag. ... Conflicts: arch/arm/mach-exynos/mach-nuri.c arch/arm/mach-exynos/mach-universal_c210.c drivers/net/wireless/ath/ath6kl/usb.c
Diffstat (limited to 'drivers/usb/chipidea')
-rw-r--r--drivers/usb/chipidea/Kconfig32
-rw-r--r--drivers/usb/chipidea/Makefile14
-rw-r--r--drivers/usb/chipidea/bits.h90
-rw-r--r--drivers/usb/chipidea/ci.h313
-rw-r--r--drivers/usb/chipidea/ci13xxx_msm.c110
-rw-r--r--drivers/usb/chipidea/ci13xxx_pci.c180
-rw-r--r--drivers/usb/chipidea/core.c474
-rw-r--r--drivers/usb/chipidea/debug.c804
-rw-r--r--drivers/usb/chipidea/debug.h56
-rw-r--r--drivers/usb/chipidea/host.c160
-rw-r--r--drivers/usb/chipidea/host.h17
-rw-r--r--drivers/usb/chipidea/udc.c1809
-rw-r--r--drivers/usb/chipidea/udc.h93
13 files changed, 4152 insertions, 0 deletions
diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
new file mode 100644
index 000000000000..fd36dc8b889b
--- /dev/null
+++ b/drivers/usb/chipidea/Kconfig
@@ -0,0 +1,32 @@
1config USB_CHIPIDEA
2 tristate "ChipIdea Highspeed Dual Role Controller"
3 depends on USB
4 help
5 Say Y here if your system has a dual role high speed USB
6 controller based on ChipIdea silicon IP. Currently, only the
7 peripheral mode is supported.
8
9 When compiled dynamically, the module will be called ci-hdrc.ko.
10
11if USB_CHIPIDEA
12
13config USB_CHIPIDEA_UDC
14 bool "ChipIdea device controller"
15 depends on USB_GADGET
16 select USB_GADGET_DUALSPEED
17 help
18 Say Y here to enable device controller functionality of the
19 ChipIdea driver.
20
21config USB_CHIPIDEA_HOST
22 bool "ChipIdea host controller"
23 help
24 Say Y here to enable host controller functionality of the
25 ChipIdea driver.
26
27config USB_CHIPIDEA_DEBUG
28 bool "ChipIdea driver debug"
29 help
30 Say Y here to enable debugging output of the ChipIdea driver.
31
32endif
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
new file mode 100644
index 000000000000..cc3493769724
--- /dev/null
+++ b/drivers/usb/chipidea/Makefile
@@ -0,0 +1,14 @@
1obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc.o
2
3ci_hdrc-y := core.o
4ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
5ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST) += host.o
6ci_hdrc-$(CONFIG_USB_CHIPIDEA_DEBUG) += debug.o
7
8ifneq ($(CONFIG_PCI),)
9 obj-$(CONFIG_USB_CHIPIDEA) += ci13xxx_pci.o
10endif
11
12ifneq ($(CONFIG_ARCH_MSM),)
13 obj-$(CONFIG_USB_CHIPIDEA) += ci13xxx_msm.o
14endif
diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
new file mode 100644
index 000000000000..050de8562a04
--- /dev/null
+++ b/drivers/usb/chipidea/bits.h
@@ -0,0 +1,90 @@
1/*
2 * bits.h - register bits of the ChipIdea USB IP core
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __DRIVERS_USB_CHIPIDEA_BITS_H
14#define __DRIVERS_USB_CHIPIDEA_BITS_H
15
16#include <linux/usb/ehci_def.h>
17
18/* HCCPARAMS */
19#define HCCPARAMS_LEN BIT(17)
20
21/* DCCPARAMS */
22#define DCCPARAMS_DEN (0x1F << 0)
23#define DCCPARAMS_DC BIT(7)
24#define DCCPARAMS_HC BIT(8)
25
26/* TESTMODE */
27#define TESTMODE_FORCE BIT(0)
28
29/* USBCMD */
30#define USBCMD_RS BIT(0)
31#define USBCMD_RST BIT(1)
32#define USBCMD_SUTW BIT(13)
33#define USBCMD_ATDTW BIT(14)
34
35/* USBSTS & USBINTR */
36#define USBi_UI BIT(0)
37#define USBi_UEI BIT(1)
38#define USBi_PCI BIT(2)
39#define USBi_URI BIT(6)
40#define USBi_SLI BIT(8)
41
42/* DEVICEADDR */
43#define DEVICEADDR_USBADRA BIT(24)
44#define DEVICEADDR_USBADR (0x7FUL << 25)
45
46/* PORTSC */
47#define PORTSC_FPR BIT(6)
48#define PORTSC_SUSP BIT(7)
49#define PORTSC_HSP BIT(9)
50#define PORTSC_PTC (0x0FUL << 16)
51
52/* DEVLC */
53#define DEVLC_PSPD (0x03UL << 25)
54#define DEVLC_PSPD_HS (0x02UL << 25)
55
56/* OTGSC */
57#define OTGSC_IDPU BIT(5)
58#define OTGSC_ID BIT(8)
59#define OTGSC_AVV BIT(9)
60#define OTGSC_ASV BIT(10)
61#define OTGSC_BSV BIT(11)
62#define OTGSC_BSE BIT(12)
63#define OTGSC_IDIS BIT(16)
64#define OTGSC_AVVIS BIT(17)
65#define OTGSC_ASVIS BIT(18)
66#define OTGSC_BSVIS BIT(19)
67#define OTGSC_BSEIS BIT(20)
68#define OTGSC_IDIE BIT(24)
69#define OTGSC_AVVIE BIT(25)
70#define OTGSC_ASVIE BIT(26)
71#define OTGSC_BSVIE BIT(27)
72#define OTGSC_BSEIE BIT(28)
73
74/* USBMODE */
75#define USBMODE_CM (0x03UL << 0)
76#define USBMODE_CM_DC (0x02UL << 0)
77#define USBMODE_SLOM BIT(3)
78#define USBMODE_CI_SDIS BIT(4)
79
80/* ENDPTCTRL */
81#define ENDPTCTRL_RXS BIT(0)
82#define ENDPTCTRL_RXT (0x03UL << 2)
83#define ENDPTCTRL_RXR BIT(6) /* reserved for port 0 */
84#define ENDPTCTRL_RXE BIT(7)
85#define ENDPTCTRL_TXS BIT(16)
86#define ENDPTCTRL_TXT (0x03UL << 18)
87#define ENDPTCTRL_TXR BIT(22) /* reserved for port 0 */
88#define ENDPTCTRL_TXE BIT(23)
89
90#endif /* __DRIVERS_USB_CHIPIDEA_BITS_H */
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
new file mode 100644
index 000000000000..50911f8490d4
--- /dev/null
+++ b/drivers/usb/chipidea/ci.h
@@ -0,0 +1,313 @@
1/*
2 * ci.h - common structures, functions, and macros of the ChipIdea driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __DRIVERS_USB_CHIPIDEA_CI_H
14#define __DRIVERS_USB_CHIPIDEA_CI_H
15
16#include <linux/list.h>
17#include <linux/irqreturn.h>
18#include <linux/usb.h>
19#include <linux/usb/gadget.h>
20
21/******************************************************************************
22 * DEFINE
23 *****************************************************************************/
24#define CI13XXX_PAGE_SIZE 4096ul /* page size for TD's */
25#define ENDPT_MAX 32
26
27/******************************************************************************
28 * STRUCTURES
29 *****************************************************************************/
30/**
31 * struct ci13xxx_ep - endpoint representation
32 * @ep: endpoint structure for gadget drivers
33 * @dir: endpoint direction (TX/RX)
34 * @num: endpoint number
35 * @type: endpoint type
36 * @name: string description of the endpoint
37 * @qh: queue head for this endpoint
38 * @wedge: is the endpoint wedged
39 * @udc: pointer to the controller
40 * @lock: pointer to controller's spinlock
41 * @td_pool: pointer to controller's TD pool
42 */
43struct ci13xxx_ep {
44 struct usb_ep ep;
45 u8 dir;
46 u8 num;
47 u8 type;
48 char name[16];
49 struct {
50 struct list_head queue;
51 struct ci13xxx_qh *ptr;
52 dma_addr_t dma;
53 } qh;
54 int wedge;
55
56 /* global resources */
57 struct ci13xxx *udc;
58 spinlock_t *lock;
59 struct dma_pool *td_pool;
60};
61
62enum ci_role {
63 CI_ROLE_HOST = 0,
64 CI_ROLE_GADGET,
65 CI_ROLE_END,
66};
67
68/**
69 * struct ci_role_driver - host/gadget role driver
70 * start: start this role
71 * stop: stop this role
72 * irq: irq handler for this role
73 * name: role name string (host/gadget)
74 */
75struct ci_role_driver {
76 int (*start)(struct ci13xxx *);
77 void (*stop)(struct ci13xxx *);
78 irqreturn_t (*irq)(struct ci13xxx *);
79 const char *name;
80};
81
82/**
83 * struct hw_bank - hardware register mapping representation
84 * @lpm: set if the device is LPM capable
85 * @phys: physical address of the controller's registers
86 * @abs: absolute address of the beginning of register window
87 * @cap: capability registers
88 * @op: operational registers
89 * @size: size of the register window
90 * @regmap: register lookup table
91 */
92struct hw_bank {
93 unsigned lpm;
94 resource_size_t phys;
95 void __iomem *abs;
96 void __iomem *cap;
97 void __iomem *op;
98 size_t size;
99 void __iomem **regmap;
100};
101
102/**
103 * struct ci13xxx - chipidea device representation
104 * @dev: pointer to parent device
105 * @lock: access synchronization
106 * @hw_bank: hardware register mapping
107 * @irq: IRQ number
108 * @roles: array of supported roles for this controller
109 * @role: current role
110 * @is_otg: if the device is otg-capable
111 * @work: work for role changing
112 * @wq: workqueue thread
113 * @qh_pool: allocation pool for queue heads
114 * @td_pool: allocation pool for transfer descriptors
115 * @gadget: device side representation for peripheral controller
116 * @driver: gadget driver
117 * @hw_ep_max: total number of endpoints supported by hardware
118 * @ci13xxx_ep: array of endpoints
119 * @ep0_dir: ep0 direction
120 * @ep0out: pointer to ep0 OUT endpoint
121 * @ep0in: pointer to ep0 IN endpoint
122 * @status: ep0 status request
123 * @setaddr: if we should set the address on status completion
124 * @address: usb address received from the host
125 * @remote_wakeup: host-enabled remote wakeup
126 * @suspended: suspended by host
127 * @test_mode: the selected test mode
128 * @udc_driver: platform specific information supplied by parent device
129 * @vbus_active: is VBUS active
130 * @transceiver: pointer to USB PHY, if any
131 * @hcd: pointer to usb_hcd for ehci host driver
132 */
133struct ci13xxx {
134 struct device *dev;
135 spinlock_t lock;
136 struct hw_bank hw_bank;
137 int irq;
138 struct ci_role_driver *roles[CI_ROLE_END];
139 enum ci_role role;
140 bool is_otg;
141 struct work_struct work;
142 struct workqueue_struct *wq;
143
144 struct dma_pool *qh_pool;
145 struct dma_pool *td_pool;
146
147 struct usb_gadget gadget;
148 struct usb_gadget_driver *driver;
149 unsigned hw_ep_max;
150 struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX];
151 u32 ep0_dir;
152 struct ci13xxx_ep *ep0out, *ep0in;
153
154 struct usb_request *status;
155 bool setaddr;
156 u8 address;
157 u8 remote_wakeup;
158 u8 suspended;
159 u8 test_mode;
160
161 struct ci13xxx_udc_driver *udc_driver;
162 int vbus_active;
163 struct usb_phy *transceiver;
164 struct usb_hcd *hcd;
165};
166
167static inline struct ci_role_driver *ci_role(struct ci13xxx *ci)
168{
169 BUG_ON(ci->role >= CI_ROLE_END || !ci->roles[ci->role]);
170 return ci->roles[ci->role];
171}
172
173static inline int ci_role_start(struct ci13xxx *ci, enum ci_role role)
174{
175 int ret;
176
177 if (role >= CI_ROLE_END)
178 return -EINVAL;
179
180 if (!ci->roles[role])
181 return -ENXIO;
182
183 ret = ci->roles[role]->start(ci);
184 if (!ret)
185 ci->role = role;
186 return ret;
187}
188
189static inline void ci_role_stop(struct ci13xxx *ci)
190{
191 enum ci_role role = ci->role;
192
193 if (role == CI_ROLE_END)
194 return;
195
196 ci->role = CI_ROLE_END;
197
198 ci->roles[role]->stop(ci);
199}
200
201/******************************************************************************
202 * REGISTERS
203 *****************************************************************************/
204/* register size */
205#define REG_BITS (32)
206
207/* register indices */
208enum ci13xxx_regs {
209 CAP_CAPLENGTH,
210 CAP_HCCPARAMS,
211 CAP_DCCPARAMS,
212 CAP_TESTMODE,
213 CAP_LAST = CAP_TESTMODE,
214 OP_USBCMD,
215 OP_USBSTS,
216 OP_USBINTR,
217 OP_DEVICEADDR,
218 OP_ENDPTLISTADDR,
219 OP_PORTSC,
220 OP_DEVLC,
221 OP_OTGSC,
222 OP_USBMODE,
223 OP_ENDPTSETUPSTAT,
224 OP_ENDPTPRIME,
225 OP_ENDPTFLUSH,
226 OP_ENDPTSTAT,
227 OP_ENDPTCOMPLETE,
228 OP_ENDPTCTRL,
229 /* endptctrl1..15 follow */
230 OP_LAST = OP_ENDPTCTRL + ENDPT_MAX / 2,
231};
232
233/**
234 * ffs_nr: find first (least significant) bit set
235 * @x: the word to search
236 *
237 * This function returns bit number (instead of position)
238 */
239static inline int ffs_nr(u32 x)
240{
241 int n = ffs(x);
242
243 return n ? n-1 : 32;
244}
245
246/**
247 * hw_read: reads from a hw register
248 * @reg: register index
249 * @mask: bitfield mask
250 *
251 * This function returns register contents
252 */
253static inline u32 hw_read(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask)
254{
255 return ioread32(udc->hw_bank.regmap[reg]) & mask;
256}
257
258/**
259 * hw_write: writes to a hw register
260 * @reg: register index
261 * @mask: bitfield mask
262 * @data: new value
263 */
264static inline void hw_write(struct ci13xxx *udc, enum ci13xxx_regs reg,
265 u32 mask, u32 data)
266{
267 if (~mask)
268 data = (ioread32(udc->hw_bank.regmap[reg]) & ~mask)
269 | (data & mask);
270
271 iowrite32(data, udc->hw_bank.regmap[reg]);
272}
273
274/**
275 * hw_test_and_clear: tests & clears a hw register
276 * @reg: register index
277 * @mask: bitfield mask
278 *
279 * This function returns register contents
280 */
281static inline u32 hw_test_and_clear(struct ci13xxx *udc, enum ci13xxx_regs reg,
282 u32 mask)
283{
284 u32 val = ioread32(udc->hw_bank.regmap[reg]) & mask;
285
286 iowrite32(val, udc->hw_bank.regmap[reg]);
287 return val;
288}
289
290/**
291 * hw_test_and_write: tests & writes a hw register
292 * @reg: register index
293 * @mask: bitfield mask
294 * @data: new value
295 *
296 * This function returns register contents
297 */
298static inline u32 hw_test_and_write(struct ci13xxx *udc, enum ci13xxx_regs reg,
299 u32 mask, u32 data)
300{
301 u32 val = hw_read(udc, reg, ~0);
302
303 hw_write(udc, reg, mask, data);
304 return (val & mask) >> ffs_nr(mask);
305}
306
307int hw_device_reset(struct ci13xxx *ci, u32 mode);
308
309int hw_port_test_set(struct ci13xxx *ci, u8 mode);
310
311u8 hw_port_test_get(struct ci13xxx *ci);
312
313#endif /* __DRIVERS_USB_CHIPIDEA_CI_H */
diff --git a/drivers/usb/chipidea/ci13xxx_msm.c b/drivers/usb/chipidea/ci13xxx_msm.c
new file mode 100644
index 000000000000..958069ef95e3
--- /dev/null
+++ b/drivers/usb/chipidea/ci13xxx_msm.c
@@ -0,0 +1,110 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 */
7
8#include <linux/module.h>
9#include <linux/platform_device.h>
10#include <linux/pm_runtime.h>
11#include <linux/usb/msm_hsusb_hw.h>
12#include <linux/usb/ulpi.h>
13#include <linux/usb/gadget.h>
14#include <linux/usb/chipidea.h>
15
16#include "ci.h"
17
18#define MSM_USB_BASE (udc->hw_bank.abs)
19
20static void ci13xxx_msm_notify_event(struct ci13xxx *udc, unsigned event)
21{
22 struct device *dev = udc->gadget.dev.parent;
23 int val;
24
25 switch (event) {
26 case CI13XXX_CONTROLLER_RESET_EVENT:
27 dev_dbg(dev, "CI13XXX_CONTROLLER_RESET_EVENT received\n");
28 writel(0, USB_AHBBURST);
29 writel(0, USB_AHBMODE);
30 break;
31 case CI13XXX_CONTROLLER_STOPPED_EVENT:
32 dev_dbg(dev, "CI13XXX_CONTROLLER_STOPPED_EVENT received\n");
33 /*
34 * Put the transceiver in non-driving mode. Otherwise host
35 * may not detect soft-disconnection.
36 */
37 val = usb_phy_io_read(udc->transceiver, ULPI_FUNC_CTRL);
38 val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
39 val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
40 usb_phy_io_write(udc->transceiver, val, ULPI_FUNC_CTRL);
41 break;
42 default:
43 dev_dbg(dev, "unknown ci13xxx_udc event\n");
44 break;
45 }
46}
47
48static struct ci13xxx_udc_driver ci13xxx_msm_udc_driver = {
49 .name = "ci13xxx_msm",
50 .flags = CI13XXX_REGS_SHARED |
51 CI13XXX_REQUIRE_TRANSCEIVER |
52 CI13XXX_PULLUP_ON_VBUS |
53 CI13XXX_DISABLE_STREAMING,
54
55 .notify_event = ci13xxx_msm_notify_event,
56};
57
58static int ci13xxx_msm_probe(struct platform_device *pdev)
59{
60 struct platform_device *plat_ci;
61 int ret;
62
63 dev_dbg(&pdev->dev, "ci13xxx_msm_probe\n");
64
65 plat_ci = platform_device_alloc("ci_hdrc", -1);
66 if (!plat_ci) {
67 dev_err(&pdev->dev, "can't allocate ci_hdrc platform device\n");
68 return -ENOMEM;
69 }
70
71 ret = platform_device_add_resources(plat_ci, pdev->resource,
72 pdev->num_resources);
73 if (ret) {
74 dev_err(&pdev->dev, "can't add resources to platform device\n");
75 goto put_platform;
76 }
77
78 ret = platform_device_add_data(plat_ci, &ci13xxx_msm_udc_driver,
79 sizeof(ci13xxx_msm_udc_driver));
80 if (ret)
81 goto put_platform;
82
83 ret = platform_device_add(plat_ci);
84 if (ret)
85 goto put_platform;
86
87 pm_runtime_no_callbacks(&pdev->dev);
88 pm_runtime_enable(&pdev->dev);
89
90 return 0;
91
92put_platform:
93 platform_device_put(plat_ci);
94
95 return ret;
96}
97
98static struct platform_driver ci13xxx_msm_driver = {
99 .probe = ci13xxx_msm_probe,
100 .driver = { .name = "msm_hsusb", },
101};
102MODULE_ALIAS("platform:msm_hsusb");
103
104static int __init ci13xxx_msm_init(void)
105{
106 return platform_driver_register(&ci13xxx_msm_driver);
107}
108module_init(ci13xxx_msm_init);
109
110MODULE_LICENSE("GPL v2");
diff --git a/drivers/usb/chipidea/ci13xxx_pci.c b/drivers/usb/chipidea/ci13xxx_pci.c
new file mode 100644
index 000000000000..e3dab27f5c75
--- /dev/null
+++ b/drivers/usb/chipidea/ci13xxx_pci.c
@@ -0,0 +1,180 @@
1/*
2 * ci13xxx_pci.c - MIPS USB IP core family device controller
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/platform_device.h>
14#include <linux/module.h>
15#include <linux/pci.h>
16#include <linux/interrupt.h>
17#include <linux/usb/gadget.h>
18#include <linux/usb/chipidea.h>
19
20/* driver name */
21#define UDC_DRIVER_NAME "ci13xxx_pci"
22
23/******************************************************************************
24 * PCI block
25 *****************************************************************************/
26struct ci13xxx_udc_driver pci_driver = {
27 .name = UDC_DRIVER_NAME,
28 .capoffset = DEF_CAPOFFSET,
29};
30
31struct ci13xxx_udc_driver langwell_pci_driver = {
32 .name = UDC_DRIVER_NAME,
33 .capoffset = 0,
34};
35
36struct ci13xxx_udc_driver penwell_pci_driver = {
37 .name = UDC_DRIVER_NAME,
38 .capoffset = 0,
39 .power_budget = 200,
40};
41
42/**
43 * ci13xxx_pci_probe: PCI probe
44 * @pdev: USB device controller being probed
45 * @id: PCI hotplug ID connecting controller to UDC framework
46 *
47 * This function returns an error code
48 * Allocates basic PCI resources for this USB device controller, and then
49 * invokes the udc_probe() method to start the UDC associated with it
50 */
51static int __devinit ci13xxx_pci_probe(struct pci_dev *pdev,
52 const struct pci_device_id *id)
53{
54 struct ci13xxx_udc_driver *driver = (void *)id->driver_data;
55 struct platform_device *plat_ci;
56 struct resource res[3];
57 int retval = 0, nres = 2;
58
59 if (!driver) {
60 dev_err(&pdev->dev, "device doesn't provide driver data\n");
61 return -ENODEV;
62 }
63
64 retval = pci_enable_device(pdev);
65 if (retval)
66 goto done;
67
68 if (!pdev->irq) {
69 dev_err(&pdev->dev, "No IRQ, check BIOS/PCI setup!");
70 retval = -ENODEV;
71 goto disable_device;
72 }
73
74 pci_set_power_state(pdev, PCI_D0);
75 pci_set_master(pdev);
76 pci_try_set_mwi(pdev);
77
78 plat_ci = platform_device_alloc("ci_hdrc", -1);
79 if (!plat_ci) {
80 dev_err(&pdev->dev, "can't allocate ci_hdrc platform device\n");
81 retval = -ENOMEM;
82 goto disable_device;
83 }
84
85 memset(res, 0, sizeof(res));
86 res[0].start = pci_resource_start(pdev, 0);
87 res[0].end = pci_resource_end(pdev, 0);
88 res[0].flags = IORESOURCE_MEM;
89 res[1].start = pdev->irq;
90 res[1].flags = IORESOURCE_IRQ;
91
92 retval = platform_device_add_resources(plat_ci, res, nres);
93 if (retval) {
94 dev_err(&pdev->dev, "can't add resources to platform device\n");
95 goto put_platform;
96 }
97
98 retval = platform_device_add_data(plat_ci, driver, sizeof(*driver));
99 if (retval)
100 goto put_platform;
101
102 dma_set_coherent_mask(&plat_ci->dev, pdev->dev.coherent_dma_mask);
103 plat_ci->dev.dma_mask = pdev->dev.dma_mask;
104 plat_ci->dev.dma_parms = pdev->dev.dma_parms;
105 plat_ci->dev.parent = &pdev->dev;
106
107 pci_set_drvdata(pdev, plat_ci);
108
109 retval = platform_device_add(plat_ci);
110 if (retval)
111 goto put_platform;
112
113 return 0;
114
115 put_platform:
116 pci_set_drvdata(pdev, NULL);
117 platform_device_put(plat_ci);
118 disable_device:
119 pci_disable_device(pdev);
120 done:
121 return retval;
122}
123
124/**
125 * ci13xxx_pci_remove: PCI remove
126 * @pdev: USB Device Controller being removed
127 *
128 * Reverses the effect of ci13xxx_pci_probe(),
129 * first invoking the udc_remove() and then releases
130 * all PCI resources allocated for this USB device controller
131 */
132static void __devexit ci13xxx_pci_remove(struct pci_dev *pdev)
133{
134 struct platform_device *plat_ci = pci_get_drvdata(pdev);
135
136 platform_device_unregister(plat_ci);
137 pci_set_drvdata(pdev, NULL);
138 pci_disable_device(pdev);
139}
140
141/**
142 * PCI device table
143 * PCI device structure
144 *
145 * Check "pci.h" for details
146 */
147static DEFINE_PCI_DEVICE_TABLE(ci13xxx_pci_id_table) = {
148 {
149 PCI_DEVICE(0x153F, 0x1004),
150 .driver_data = (kernel_ulong_t)&pci_driver,
151 },
152 {
153 PCI_DEVICE(0x153F, 0x1006),
154 .driver_data = (kernel_ulong_t)&pci_driver,
155 },
156 {
157 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0811),
158 .driver_data = (kernel_ulong_t)&langwell_pci_driver,
159 },
160 {
161 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0829),
162 .driver_data = (kernel_ulong_t)&penwell_pci_driver,
163 },
164 { 0, 0, 0, 0, 0, 0, 0 /* end: all zeroes */ }
165};
166MODULE_DEVICE_TABLE(pci, ci13xxx_pci_id_table);
167
168static struct pci_driver ci13xxx_pci_driver = {
169 .name = UDC_DRIVER_NAME,
170 .id_table = ci13xxx_pci_id_table,
171 .probe = ci13xxx_pci_probe,
172 .remove = __devexit_p(ci13xxx_pci_remove),
173};
174
175module_pci_driver(ci13xxx_pci_driver);
176
177MODULE_AUTHOR("MIPS - David Lopo <dlopo@chipidea.mips.com>");
178MODULE_DESCRIPTION("MIPS CI13XXX USB Peripheral Controller");
179MODULE_LICENSE("GPL");
180MODULE_VERSION("June 2008");
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
new file mode 100644
index 000000000000..15e03b308f8a
--- /dev/null
+++ b/drivers/usb/chipidea/core.c
@@ -0,0 +1,474 @@
1/*
2 * core.c - ChipIdea USB IP core family device controller
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/*
14 * Description: ChipIdea USB IP core family device controller
15 *
16 * This driver is composed of several blocks:
17 * - HW: hardware interface
18 * - DBG: debug facilities (optional)
19 * - UTIL: utilities
20 * - ISR: interrupts handling
21 * - ENDPT: endpoint operations (Gadget API)
22 * - GADGET: gadget operations (Gadget API)
23 * - BUS: bus glue code, bus abstraction layer
24 *
25 * Compile Options
26 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
27 * - STALL_IN: non-empty bulk-in pipes cannot be halted
28 * if defined mass storage compliance succeeds but with warnings
29 * => case 4: Hi > Dn
30 * => case 5: Hi > Di
31 * => case 8: Hi <> Do
32 * if undefined usbtest 13 fails
33 * - TRACE: enable function tracing (depends on DEBUG)
34 *
35 * Main Features
36 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
37 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
38 * - Normal & LPM support
39 *
40 * USBTEST Report
41 * - OK: 0-12, 13 (STALL_IN defined) & 14
42 * - Not Supported: 15 & 16 (ISO)
43 *
44 * TODO List
45 * - OTG
46 * - Isochronous & Interrupt Traffic
47 * - Handle requests which spawns into several TDs
48 * - GET_STATUS(device) - always reports 0
49 * - Gadget API (majority of optional features)
50 * - Suspend & Remote Wakeup
51 */
52#include <linux/delay.h>
53#include <linux/device.h>
54#include <linux/dmapool.h>
55#include <linux/dma-mapping.h>
56#include <linux/init.h>
57#include <linux/platform_device.h>
58#include <linux/module.h>
59#include <linux/interrupt.h>
60#include <linux/io.h>
61#include <linux/irq.h>
62#include <linux/kernel.h>
63#include <linux/slab.h>
64#include <linux/pm_runtime.h>
65#include <linux/usb/ch9.h>
66#include <linux/usb/gadget.h>
67#include <linux/usb/otg.h>
68#include <linux/usb/chipidea.h>
69
70#include "ci.h"
71#include "udc.h"
72#include "bits.h"
73#include "host.h"
74#include "debug.h"
75
76/* Controller register map */
77static uintptr_t ci_regs_nolpm[] = {
78 [CAP_CAPLENGTH] = 0x000UL,
79 [CAP_HCCPARAMS] = 0x008UL,
80 [CAP_DCCPARAMS] = 0x024UL,
81 [CAP_TESTMODE] = 0x038UL,
82 [OP_USBCMD] = 0x000UL,
83 [OP_USBSTS] = 0x004UL,
84 [OP_USBINTR] = 0x008UL,
85 [OP_DEVICEADDR] = 0x014UL,
86 [OP_ENDPTLISTADDR] = 0x018UL,
87 [OP_PORTSC] = 0x044UL,
88 [OP_DEVLC] = 0x084UL,
89 [OP_OTGSC] = 0x064UL,
90 [OP_USBMODE] = 0x068UL,
91 [OP_ENDPTSETUPSTAT] = 0x06CUL,
92 [OP_ENDPTPRIME] = 0x070UL,
93 [OP_ENDPTFLUSH] = 0x074UL,
94 [OP_ENDPTSTAT] = 0x078UL,
95 [OP_ENDPTCOMPLETE] = 0x07CUL,
96 [OP_ENDPTCTRL] = 0x080UL,
97};
98
99static uintptr_t ci_regs_lpm[] = {
100 [CAP_CAPLENGTH] = 0x000UL,
101 [CAP_HCCPARAMS] = 0x008UL,
102 [CAP_DCCPARAMS] = 0x024UL,
103 [CAP_TESTMODE] = 0x0FCUL,
104 [OP_USBCMD] = 0x000UL,
105 [OP_USBSTS] = 0x004UL,
106 [OP_USBINTR] = 0x008UL,
107 [OP_DEVICEADDR] = 0x014UL,
108 [OP_ENDPTLISTADDR] = 0x018UL,
109 [OP_PORTSC] = 0x044UL,
110 [OP_DEVLC] = 0x084UL,
111 [OP_OTGSC] = 0x0C4UL,
112 [OP_USBMODE] = 0x0C8UL,
113 [OP_ENDPTSETUPSTAT] = 0x0D8UL,
114 [OP_ENDPTPRIME] = 0x0DCUL,
115 [OP_ENDPTFLUSH] = 0x0E0UL,
116 [OP_ENDPTSTAT] = 0x0E4UL,
117 [OP_ENDPTCOMPLETE] = 0x0E8UL,
118 [OP_ENDPTCTRL] = 0x0ECUL,
119};
120
121static int hw_alloc_regmap(struct ci13xxx *ci, bool is_lpm)
122{
123 int i;
124
125 kfree(ci->hw_bank.regmap);
126
127 ci->hw_bank.regmap = kzalloc((OP_LAST + 1) * sizeof(void *),
128 GFP_KERNEL);
129 if (!ci->hw_bank.regmap)
130 return -ENOMEM;
131
132 for (i = 0; i < OP_ENDPTCTRL; i++)
133 ci->hw_bank.regmap[i] =
134 (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) +
135 (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
136
137 for (; i <= OP_LAST; i++)
138 ci->hw_bank.regmap[i] = ci->hw_bank.op +
139 4 * (i - OP_ENDPTCTRL) +
140 (is_lpm
141 ? ci_regs_lpm[OP_ENDPTCTRL]
142 : ci_regs_nolpm[OP_ENDPTCTRL]);
143
144 return 0;
145}
146
147/**
148 * hw_port_test_set: writes port test mode (execute without interruption)
149 * @mode: new value
150 *
151 * This function returns an error code
152 */
153int hw_port_test_set(struct ci13xxx *ci, u8 mode)
154{
155 const u8 TEST_MODE_MAX = 7;
156
157 if (mode > TEST_MODE_MAX)
158 return -EINVAL;
159
160 hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
161 return 0;
162}
163
164/**
165 * hw_port_test_get: reads port test mode value
166 *
167 * This function returns port test mode value
168 */
169u8 hw_port_test_get(struct ci13xxx *ci)
170{
171 return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
172}
173
174static int hw_device_init(struct ci13xxx *ci, void __iomem *base)
175{
176 u32 reg;
177
178 /* bank is a module variable */
179 ci->hw_bank.abs = base;
180
181 ci->hw_bank.cap = ci->hw_bank.abs;
182 ci->hw_bank.cap += ci->udc_driver->capoffset;
183 ci->hw_bank.op = ci->hw_bank.cap + ioread8(ci->hw_bank.cap);
184
185 hw_alloc_regmap(ci, false);
186 reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
187 ffs_nr(HCCPARAMS_LEN);
188 ci->hw_bank.lpm = reg;
189 hw_alloc_regmap(ci, !!reg);
190 ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs;
191 ci->hw_bank.size += OP_LAST;
192 ci->hw_bank.size /= sizeof(u32);
193
194 reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
195 ffs_nr(DCCPARAMS_DEN);
196 ci->hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
197
198 if (ci->hw_ep_max > ENDPT_MAX)
199 return -ENODEV;
200
201 dev_dbg(ci->dev, "ChipIdea HDRC found, lpm: %d; cap: %p op: %p\n",
202 ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
203
204 /* setup lock mode ? */
205
206 /* ENDPTSETUPSTAT is '0' by default */
207
208 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
209
210 return 0;
211}
212
213/**
214 * hw_device_reset: resets chip (execute without interruption)
215 * @ci: the controller
216 *
217 * This function returns an error code
218 */
219int hw_device_reset(struct ci13xxx *ci, u32 mode)
220{
221 /* should flush & stop before reset */
222 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
223 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
224
225 hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
226 while (hw_read(ci, OP_USBCMD, USBCMD_RST))
227 udelay(10); /* not RTOS friendly */
228
229
230 if (ci->udc_driver->notify_event)
231 ci->udc_driver->notify_event(ci,
232 CI13XXX_CONTROLLER_RESET_EVENT);
233
234 if (ci->udc_driver->flags & CI13XXX_DISABLE_STREAMING)
235 hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS);
236
237 /* USBMODE should be configured step by step */
238 hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
239 hw_write(ci, OP_USBMODE, USBMODE_CM, mode);
240 /* HW >= 2.3 */
241 hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
242
243 if (hw_read(ci, OP_USBMODE, USBMODE_CM) != mode) {
244 pr_err("cannot enter in %s mode", ci_role(ci)->name);
245 pr_err("lpm = %i", ci->hw_bank.lpm);
246 return -ENODEV;
247 }
248
249 return 0;
250}
251
252/**
253 * ci_otg_role - pick role based on ID pin state
254 * @ci: the controller
255 */
256static enum ci_role ci_otg_role(struct ci13xxx *ci)
257{
258 u32 sts = hw_read(ci, OP_OTGSC, ~0);
259 enum ci_role role = sts & OTGSC_ID
260 ? CI_ROLE_GADGET
261 : CI_ROLE_HOST;
262
263 return role;
264}
265
266/**
267 * ci_role_work - perform role changing based on ID pin
268 * @work: work struct
269 */
270static void ci_role_work(struct work_struct *work)
271{
272 struct ci13xxx *ci = container_of(work, struct ci13xxx, work);
273 enum ci_role role = ci_otg_role(ci);
274
275 hw_write(ci, OP_OTGSC, OTGSC_IDIS, OTGSC_IDIS);
276
277 if (role != ci->role) {
278 dev_dbg(ci->dev, "switching from %s to %s\n",
279 ci_role(ci)->name, ci->roles[role]->name);
280
281 ci_role_stop(ci);
282 ci_role_start(ci, role);
283 }
284}
285
286static ssize_t show_role(struct device *dev, struct device_attribute *attr,
287 char *buf)
288{
289 struct ci13xxx *ci = dev_get_drvdata(dev);
290
291 return sprintf(buf, "%s\n", ci_role(ci)->name);
292}
293
294static ssize_t store_role(struct device *dev, struct device_attribute *attr,
295 const char *buf, size_t count)
296{
297 struct ci13xxx *ci = dev_get_drvdata(dev);
298 enum ci_role role;
299 int ret;
300
301 for (role = CI_ROLE_HOST; role < CI_ROLE_END; role++)
302 if (ci->roles[role] && !strcmp(buf, ci->roles[role]->name))
303 break;
304
305 if (role == CI_ROLE_END || role == ci->role)
306 return -EINVAL;
307
308 ci_role_stop(ci);
309 ret = ci_role_start(ci, role);
310 if (ret)
311 return ret;
312
313 return count;
314}
315
316static DEVICE_ATTR(role, S_IRUSR | S_IWUSR, show_role, store_role);
317
318static irqreturn_t ci_irq(int irq, void *data)
319{
320 struct ci13xxx *ci = data;
321 irqreturn_t ret = IRQ_NONE;
322
323 if (ci->is_otg) {
324 u32 sts = hw_read(ci, OP_OTGSC, ~0);
325
326 if (sts & OTGSC_IDIS) {
327 queue_work(ci->wq, &ci->work);
328 ret = IRQ_HANDLED;
329 }
330 }
331
332 return ci->role == CI_ROLE_END ? ret : ci_role(ci)->irq(ci);
333}
334
335static int __devinit ci_hdrc_probe(struct platform_device *pdev)
336{
337 struct device *dev = &pdev->dev;
338 struct ci13xxx *ci;
339 struct resource *res;
340 void __iomem *base;
341 int ret;
342
343 if (!dev->platform_data) {
344 dev_err(dev, "platform data missing\n");
345 return -ENODEV;
346 }
347
348 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
349 if (!res) {
350 dev_err(dev, "missing resource\n");
351 return -ENODEV;
352 }
353
354 base = devm_request_and_ioremap(dev, res);
355 if (!res) {
356 dev_err(dev, "can't request and ioremap resource\n");
357 return -ENOMEM;
358 }
359
360 ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL);
361 if (!ci) {
362 dev_err(dev, "can't allocate device\n");
363 return -ENOMEM;
364 }
365
366 ci->dev = dev;
367 ci->udc_driver = dev->platform_data;
368
369 ret = hw_device_init(ci, base);
370 if (ret < 0) {
371 dev_err(dev, "can't initialize hardware\n");
372 return -ENODEV;
373 }
374
375 ci->hw_bank.phys = res->start;
376
377 ci->irq = platform_get_irq(pdev, 0);
378 if (ci->irq < 0) {
379 dev_err(dev, "missing IRQ\n");
380 return -ENODEV;
381 }
382
383 INIT_WORK(&ci->work, ci_role_work);
384 ci->wq = create_singlethread_workqueue("ci_otg");
385 if (!ci->wq) {
386 dev_err(dev, "can't create workqueue\n");
387 return -ENODEV;
388 }
389
390 /* initialize role(s) before the interrupt is requested */
391 ret = ci_hdrc_host_init(ci);
392 if (ret)
393 dev_info(dev, "doesn't support host\n");
394
395 ret = ci_hdrc_gadget_init(ci);
396 if (ret)
397 dev_info(dev, "doesn't support gadget\n");
398
399 if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) {
400 dev_err(dev, "no supported roles\n");
401 ret = -ENODEV;
402 goto rm_wq;
403 }
404
405 if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) {
406 ci->is_otg = true;
407 ci->role = ci_otg_role(ci);
408 } else {
409 ci->role = ci->roles[CI_ROLE_HOST]
410 ? CI_ROLE_HOST
411 : CI_ROLE_GADGET;
412 }
413
414 ret = ci_role_start(ci, ci->role);
415 if (ret) {
416 dev_err(dev, "can't start %s role\n", ci_role(ci)->name);
417 ret = -ENODEV;
418 goto rm_wq;
419 }
420
421 platform_set_drvdata(pdev, ci);
422 ret = request_irq(ci->irq, ci_irq, IRQF_SHARED, ci->udc_driver->name,
423 ci);
424 if (ret)
425 goto stop;
426
427 ret = device_create_file(dev, &dev_attr_role);
428 if (ret)
429 goto rm_attr;
430
431 if (ci->is_otg)
432 hw_write(ci, OP_OTGSC, OTGSC_IDIE, OTGSC_IDIE);
433
434 return ret;
435
436rm_attr:
437 device_remove_file(dev, &dev_attr_role);
438stop:
439 ci_role_stop(ci);
440rm_wq:
441 flush_workqueue(ci->wq);
442 destroy_workqueue(ci->wq);
443
444 return ret;
445}
446
447static int __devexit ci_hdrc_remove(struct platform_device *pdev)
448{
449 struct ci13xxx *ci = platform_get_drvdata(pdev);
450
451 flush_workqueue(ci->wq);
452 destroy_workqueue(ci->wq);
453 device_remove_file(ci->dev, &dev_attr_role);
454 free_irq(ci->irq, ci);
455 ci_role_stop(ci);
456
457 return 0;
458}
459
460static struct platform_driver ci_hdrc_driver = {
461 .probe = ci_hdrc_probe,
462 .remove = __devexit_p(ci_hdrc_remove),
463 .driver = {
464 .name = "ci_hdrc",
465 },
466};
467
468module_platform_driver(ci_hdrc_driver);
469
470MODULE_ALIAS("platform:ci_hdrc");
471MODULE_ALIAS("platform:ci13xxx");
472MODULE_LICENSE("GPL v2");
473MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
474MODULE_DESCRIPTION("ChipIdea HDRC Driver");
diff --git a/drivers/usb/chipidea/debug.c b/drivers/usb/chipidea/debug.c
new file mode 100644
index 000000000000..c4b3e15532db
--- /dev/null
+++ b/drivers/usb/chipidea/debug.c
@@ -0,0 +1,804 @@
1#include <linux/delay.h>
2#include <linux/device.h>
3#include <linux/dmapool.h>
4#include <linux/dma-mapping.h>
5#include <linux/init.h>
6#include <linux/platform_device.h>
7#include <linux/module.h>
8#include <linux/interrupt.h>
9#include <linux/io.h>
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/pm_runtime.h>
14#include <linux/usb/ch9.h>
15#include <linux/usb/gadget.h>
16#include <linux/usb/otg.h>
17#include <linux/usb/chipidea.h>
18
19#include "ci.h"
20#include "udc.h"
21#include "bits.h"
22#include "debug.h"
23
24/* Interrupt statistics */
25#define ISR_MASK 0x1F
26static struct isr_statistics {
27 u32 test;
28 u32 ui;
29 u32 uei;
30 u32 pci;
31 u32 uri;
32 u32 sli;
33 u32 none;
34 struct {
35 u32 cnt;
36 u32 buf[ISR_MASK+1];
37 u32 idx;
38 } hndl;
39} isr_statistics;
40
41void dbg_interrupt(u32 intmask)
42{
43 if (!intmask) {
44 isr_statistics.none++;
45 return;
46 }
47
48 isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intmask;
49 isr_statistics.hndl.idx &= ISR_MASK;
50 isr_statistics.hndl.cnt++;
51
52 if (USBi_URI & intmask)
53 isr_statistics.uri++;
54 if (USBi_PCI & intmask)
55 isr_statistics.pci++;
56 if (USBi_UEI & intmask)
57 isr_statistics.uei++;
58 if (USBi_UI & intmask)
59 isr_statistics.ui++;
60 if (USBi_SLI & intmask)
61 isr_statistics.sli++;
62}
63
64/**
65 * hw_register_read: reads all device registers (execute without interruption)
66 * @buf: destination buffer
67 * @size: buffer size
68 *
69 * This function returns number of registers read
70 */
71static size_t hw_register_read(struct ci13xxx *udc, u32 *buf, size_t size)
72{
73 unsigned i;
74
75 if (size > udc->hw_bank.size)
76 size = udc->hw_bank.size;
77
78 for (i = 0; i < size; i++)
79 buf[i] = hw_read(udc, i * sizeof(u32), ~0);
80
81 return size;
82}
83
84/**
85 * hw_register_write: writes to register
86 * @addr: register address
87 * @data: register value
88 *
89 * This function returns an error code
90 */
91static int hw_register_write(struct ci13xxx *udc, u16 addr, u32 data)
92{
93 /* align */
94 addr /= sizeof(u32);
95
96 if (addr >= udc->hw_bank.size)
97 return -EINVAL;
98
99 /* align */
100 addr *= sizeof(u32);
101
102 hw_write(udc, addr, ~0, data);
103 return 0;
104}
105
106/**
107 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
108 * interruption)
109 * @n: interrupt bit
110 *
111 * This function returns an error code
112 */
113static int hw_intr_clear(struct ci13xxx *udc, int n)
114{
115 if (n >= REG_BITS)
116 return -EINVAL;
117
118 hw_write(udc, OP_USBINTR, BIT(n), 0);
119 hw_write(udc, OP_USBSTS, BIT(n), BIT(n));
120 return 0;
121}
122
123/**
124 * hw_intr_force: enables interrupt & forces interrupt status (execute without
125 * interruption)
126 * @n: interrupt bit
127 *
128 * This function returns an error code
129 */
130static int hw_intr_force(struct ci13xxx *udc, int n)
131{
132 if (n >= REG_BITS)
133 return -EINVAL;
134
135 hw_write(udc, CAP_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
136 hw_write(udc, OP_USBINTR, BIT(n), BIT(n));
137 hw_write(udc, OP_USBSTS, BIT(n), BIT(n));
138 hw_write(udc, CAP_TESTMODE, TESTMODE_FORCE, 0);
139 return 0;
140}
141
142/**
143 * show_device: prints information about device capabilities and status
144 *
145 * Check "device.h" for details
146 */
147static ssize_t show_device(struct device *dev, struct device_attribute *attr,
148 char *buf)
149{
150 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
151 struct usb_gadget *gadget = &udc->gadget;
152 int n = 0;
153
154 if (attr == NULL || buf == NULL) {
155 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
156 return 0;
157 }
158
159 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
160 gadget->speed);
161 n += scnprintf(buf + n, PAGE_SIZE - n, "max_speed = %d\n",
162 gadget->max_speed);
163 /* TODO: Scheduled for removal in 3.8. */
164 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
165 gadget_is_dualspeed(gadget));
166 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
167 gadget->is_otg);
168 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
169 gadget->is_a_peripheral);
170 n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
171 gadget->b_hnp_enable);
172 n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
173 gadget->a_hnp_support);
174 n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
175 gadget->a_alt_hnp_support);
176 n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
177 (gadget->name ? gadget->name : ""));
178
179 return n;
180}
181static DEVICE_ATTR(device, S_IRUSR, show_device, NULL);
182
183/**
184 * show_driver: prints information about attached gadget (if any)
185 *
186 * Check "device.h" for details
187 */
188static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
189 char *buf)
190{
191 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
192 struct usb_gadget_driver *driver = udc->driver;
193 int n = 0;
194
195 if (attr == NULL || buf == NULL) {
196 dev_err(dev, "[%s] EINVAL\n", __func__);
197 return 0;
198 }
199
200 if (driver == NULL)
201 return scnprintf(buf, PAGE_SIZE,
202 "There is no gadget attached!\n");
203
204 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
205 (driver->function ? driver->function : ""));
206 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
207 driver->max_speed);
208
209 return n;
210}
211static DEVICE_ATTR(driver, S_IRUSR, show_driver, NULL);
212
213/* Maximum event message length */
214#define DBG_DATA_MSG 64UL
215
216/* Maximum event messages */
217#define DBG_DATA_MAX 128UL
218
219/* Event buffer descriptor */
220static struct {
221 char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
222 unsigned idx; /* index */
223 unsigned tty; /* print to console? */
224 rwlock_t lck; /* lock */
225} dbg_data = {
226 .idx = 0,
227 .tty = 0,
228 .lck = __RW_LOCK_UNLOCKED(lck)
229};
230
231/**
232 * dbg_dec: decrements debug event index
233 * @idx: buffer index
234 */
235static void dbg_dec(unsigned *idx)
236{
237 *idx = (*idx - 1) & (DBG_DATA_MAX-1);
238}
239
240/**
241 * dbg_inc: increments debug event index
242 * @idx: buffer index
243 */
244static void dbg_inc(unsigned *idx)
245{
246 *idx = (*idx + 1) & (DBG_DATA_MAX-1);
247}
248
249/**
250 * dbg_print: prints the common part of the event
251 * @addr: endpoint address
252 * @name: event name
253 * @status: status
254 * @extra: extra information
255 */
256static void dbg_print(u8 addr, const char *name, int status, const char *extra)
257{
258 struct timeval tval;
259 unsigned int stamp;
260 unsigned long flags;
261
262 write_lock_irqsave(&dbg_data.lck, flags);
263
264 do_gettimeofday(&tval);
265 stamp = tval.tv_sec & 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
266 stamp = stamp * 1000000 + tval.tv_usec;
267
268 scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
269 "%04X\t? %02X %-7.7s %4i ?\t%s\n",
270 stamp, addr, name, status, extra);
271
272 dbg_inc(&dbg_data.idx);
273
274 write_unlock_irqrestore(&dbg_data.lck, flags);
275
276 if (dbg_data.tty != 0)
277 pr_notice("%04X\t? %02X %-7.7s %4i ?\t%s\n",
278 stamp, addr, name, status, extra);
279}
280
281/**
282 * dbg_done: prints a DONE event
283 * @addr: endpoint address
284 * @td: transfer descriptor
285 * @status: status
286 */
287void dbg_done(u8 addr, const u32 token, int status)
288{
289 char msg[DBG_DATA_MSG];
290
291 scnprintf(msg, sizeof(msg), "%d %02X",
292 (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
293 (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
294 dbg_print(addr, "DONE", status, msg);
295}
296
297/**
298 * dbg_event: prints a generic event
299 * @addr: endpoint address
300 * @name: event name
301 * @status: status
302 */
303void dbg_event(u8 addr, const char *name, int status)
304{
305 if (name != NULL)
306 dbg_print(addr, name, status, "");
307}
308
309/*
310 * dbg_queue: prints a QUEUE event
311 * @addr: endpoint address
312 * @req: USB request
313 * @status: status
314 */
315void dbg_queue(u8 addr, const struct usb_request *req, int status)
316{
317 char msg[DBG_DATA_MSG];
318
319 if (req != NULL) {
320 scnprintf(msg, sizeof(msg),
321 "%d %d", !req->no_interrupt, req->length);
322 dbg_print(addr, "QUEUE", status, msg);
323 }
324}
325
326/**
327 * dbg_setup: prints a SETUP event
328 * @addr: endpoint address
329 * @req: setup request
330 */
331void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
332{
333 char msg[DBG_DATA_MSG];
334
335 if (req != NULL) {
336 scnprintf(msg, sizeof(msg),
337 "%02X %02X %04X %04X %d", req->bRequestType,
338 req->bRequest, le16_to_cpu(req->wValue),
339 le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
340 dbg_print(addr, "SETUP", 0, msg);
341 }
342}
343
344/**
345 * show_events: displays the event buffer
346 *
347 * Check "device.h" for details
348 */
349static ssize_t show_events(struct device *dev, struct device_attribute *attr,
350 char *buf)
351{
352 unsigned long flags;
353 unsigned i, j, n = 0;
354
355 if (attr == NULL || buf == NULL) {
356 dev_err(dev->parent, "[%s] EINVAL\n", __func__);
357 return 0;
358 }
359
360 read_lock_irqsave(&dbg_data.lck, flags);
361
362 i = dbg_data.idx;
363 for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
364 n += strlen(dbg_data.buf[i]);
365 if (n >= PAGE_SIZE) {
366 n -= strlen(dbg_data.buf[i]);
367 break;
368 }
369 }
370 for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
371 j += scnprintf(buf + j, PAGE_SIZE - j,
372 "%s", dbg_data.buf[i]);
373
374 read_unlock_irqrestore(&dbg_data.lck, flags);
375
376 return n;
377}
378
379/**
380 * store_events: configure if events are going to be also printed to console
381 *
382 * Check "device.h" for details
383 */
384static ssize_t store_events(struct device *dev, struct device_attribute *attr,
385 const char *buf, size_t count)
386{
387 unsigned tty;
388
389 if (attr == NULL || buf == NULL) {
390 dev_err(dev, "[%s] EINVAL\n", __func__);
391 goto done;
392 }
393
394 if (sscanf(buf, "%u", &tty) != 1 || tty > 1) {
395 dev_err(dev, "<1|0>: enable|disable console log\n");
396 goto done;
397 }
398
399 dbg_data.tty = tty;
400 dev_info(dev, "tty = %u", dbg_data.tty);
401
402 done:
403 return count;
404}
405static DEVICE_ATTR(events, S_IRUSR | S_IWUSR, show_events, store_events);
406
407/**
408 * show_inters: interrupt status, enable status and historic
409 *
410 * Check "device.h" for details
411 */
412static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
413 char *buf)
414{
415 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
416 unsigned long flags;
417 u32 intr;
418 unsigned i, j, n = 0;
419
420 if (attr == NULL || buf == NULL) {
421 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
422 return 0;
423 }
424
425 spin_lock_irqsave(&udc->lock, flags);
426
427 /*n += scnprintf(buf + n, PAGE_SIZE - n,
428 "status = %08x\n", hw_read_intr_status(udc));
429 n += scnprintf(buf + n, PAGE_SIZE - n,
430 "enable = %08x\n", hw_read_intr_enable(udc));*/
431
432 n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
433 isr_statistics.test);
434 n += scnprintf(buf + n, PAGE_SIZE - n, "? ui = %d\n",
435 isr_statistics.ui);
436 n += scnprintf(buf + n, PAGE_SIZE - n, "? uei = %d\n",
437 isr_statistics.uei);
438 n += scnprintf(buf + n, PAGE_SIZE - n, "? pci = %d\n",
439 isr_statistics.pci);
440 n += scnprintf(buf + n, PAGE_SIZE - n, "? uri = %d\n",
441 isr_statistics.uri);
442 n += scnprintf(buf + n, PAGE_SIZE - n, "? sli = %d\n",
443 isr_statistics.sli);
444 n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
445 isr_statistics.none);
446 n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
447 isr_statistics.hndl.cnt);
448
449 for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
450 i &= ISR_MASK;
451 intr = isr_statistics.hndl.buf[i];
452
453 if (USBi_UI & intr)
454 n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
455 intr &= ~USBi_UI;
456 if (USBi_UEI & intr)
457 n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
458 intr &= ~USBi_UEI;
459 if (USBi_PCI & intr)
460 n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
461 intr &= ~USBi_PCI;
462 if (USBi_URI & intr)
463 n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
464 intr &= ~USBi_URI;
465 if (USBi_SLI & intr)
466 n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
467 intr &= ~USBi_SLI;
468 if (intr)
469 n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
470 if (isr_statistics.hndl.buf[i])
471 n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
472 }
473
474 spin_unlock_irqrestore(&udc->lock, flags);
475
476 return n;
477}
478
479/**
480 * store_inters: enable & force or disable an individual interrutps
481 * (to be used for test purposes only)
482 *
483 * Check "device.h" for details
484 */
485static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
486 const char *buf, size_t count)
487{
488 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
489 unsigned long flags;
490 unsigned en, bit;
491
492 if (attr == NULL || buf == NULL) {
493 dev_err(udc->dev, "EINVAL\n");
494 goto done;
495 }
496
497 if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
498 dev_err(udc->dev, "<1|0> <bit>: enable|disable interrupt\n");
499 goto done;
500 }
501
502 spin_lock_irqsave(&udc->lock, flags);
503 if (en) {
504 if (hw_intr_force(udc, bit))
505 dev_err(dev, "invalid bit number\n");
506 else
507 isr_statistics.test++;
508 } else {
509 if (hw_intr_clear(udc, bit))
510 dev_err(dev, "invalid bit number\n");
511 }
512 spin_unlock_irqrestore(&udc->lock, flags);
513
514 done:
515 return count;
516}
517static DEVICE_ATTR(inters, S_IRUSR | S_IWUSR, show_inters, store_inters);
518
519/**
520 * show_port_test: reads port test mode
521 *
522 * Check "device.h" for details
523 */
524static ssize_t show_port_test(struct device *dev,
525 struct device_attribute *attr, char *buf)
526{
527 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
528 unsigned long flags;
529 unsigned mode;
530
531 if (attr == NULL || buf == NULL) {
532 dev_err(udc->dev, "EINVAL\n");
533 return 0;
534 }
535
536 spin_lock_irqsave(&udc->lock, flags);
537 mode = hw_port_test_get(udc);
538 spin_unlock_irqrestore(&udc->lock, flags);
539
540 return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
541}
542
543/**
544 * store_port_test: writes port test mode
545 *
546 * Check "device.h" for details
547 */
548static ssize_t store_port_test(struct device *dev,
549 struct device_attribute *attr,
550 const char *buf, size_t count)
551{
552 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
553 unsigned long flags;
554 unsigned mode;
555
556 if (attr == NULL || buf == NULL) {
557 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
558 goto done;
559 }
560
561 if (sscanf(buf, "%u", &mode) != 1) {
562 dev_err(udc->dev, "<mode>: set port test mode");
563 goto done;
564 }
565
566 spin_lock_irqsave(&udc->lock, flags);
567 if (hw_port_test_set(udc, mode))
568 dev_err(udc->dev, "invalid mode\n");
569 spin_unlock_irqrestore(&udc->lock, flags);
570
571 done:
572 return count;
573}
574static DEVICE_ATTR(port_test, S_IRUSR | S_IWUSR,
575 show_port_test, store_port_test);
576
577/**
578 * show_qheads: DMA contents of all queue heads
579 *
580 * Check "device.h" for details
581 */
582static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
583 char *buf)
584{
585 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
586 unsigned long flags;
587 unsigned i, j, n = 0;
588
589 if (attr == NULL || buf == NULL) {
590 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
591 return 0;
592 }
593
594 spin_lock_irqsave(&udc->lock, flags);
595 for (i = 0; i < udc->hw_ep_max/2; i++) {
596 struct ci13xxx_ep *mEpRx = &udc->ci13xxx_ep[i];
597 struct ci13xxx_ep *mEpTx =
598 &udc->ci13xxx_ep[i + udc->hw_ep_max/2];
599 n += scnprintf(buf + n, PAGE_SIZE - n,
600 "EP=%02i: RX=%08X TX=%08X\n",
601 i, (u32)mEpRx->qh.dma, (u32)mEpTx->qh.dma);
602 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
603 n += scnprintf(buf + n, PAGE_SIZE - n,
604 " %04X: %08X %08X\n", j,
605 *((u32 *)mEpRx->qh.ptr + j),
606 *((u32 *)mEpTx->qh.ptr + j));
607 }
608 }
609 spin_unlock_irqrestore(&udc->lock, flags);
610
611 return n;
612}
613static DEVICE_ATTR(qheads, S_IRUSR, show_qheads, NULL);
614
615/**
616 * show_registers: dumps all registers
617 *
618 * Check "device.h" for details
619 */
620#define DUMP_ENTRIES 512
621static ssize_t show_registers(struct device *dev,
622 struct device_attribute *attr, char *buf)
623{
624 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
625 unsigned long flags;
626 u32 *dump;
627 unsigned i, k, n = 0;
628
629 if (attr == NULL || buf == NULL) {
630 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
631 return 0;
632 }
633
634 dump = kmalloc(sizeof(u32) * DUMP_ENTRIES, GFP_KERNEL);
635 if (!dump) {
636 dev_err(udc->dev, "%s: out of memory\n", __func__);
637 return 0;
638 }
639
640 spin_lock_irqsave(&udc->lock, flags);
641 k = hw_register_read(udc, dump, DUMP_ENTRIES);
642 spin_unlock_irqrestore(&udc->lock, flags);
643
644 for (i = 0; i < k; i++) {
645 n += scnprintf(buf + n, PAGE_SIZE - n,
646 "reg[0x%04X] = 0x%08X\n",
647 i * (unsigned)sizeof(u32), dump[i]);
648 }
649 kfree(dump);
650
651 return n;
652}
653
654/**
655 * store_registers: writes value to register address
656 *
657 * Check "device.h" for details
658 */
659static ssize_t store_registers(struct device *dev,
660 struct device_attribute *attr,
661 const char *buf, size_t count)
662{
663 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
664 unsigned long addr, data, flags;
665
666 if (attr == NULL || buf == NULL) {
667 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
668 goto done;
669 }
670
671 if (sscanf(buf, "%li %li", &addr, &data) != 2) {
672 dev_err(udc->dev,
673 "<addr> <data>: write data to register address\n");
674 goto done;
675 }
676
677 spin_lock_irqsave(&udc->lock, flags);
678 if (hw_register_write(udc, addr, data))
679 dev_err(udc->dev, "invalid address range\n");
680 spin_unlock_irqrestore(&udc->lock, flags);
681
682 done:
683 return count;
684}
685static DEVICE_ATTR(registers, S_IRUSR | S_IWUSR,
686 show_registers, store_registers);
687
688/**
689 * show_requests: DMA contents of all requests currently queued (all endpts)
690 *
691 * Check "device.h" for details
692 */
693static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
694 char *buf)
695{
696 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
697 unsigned long flags;
698 struct list_head *ptr = NULL;
699 struct ci13xxx_req *req = NULL;
700 unsigned i, j, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
701
702 if (attr == NULL || buf == NULL) {
703 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
704 return 0;
705 }
706
707 spin_lock_irqsave(&udc->lock, flags);
708 for (i = 0; i < udc->hw_ep_max; i++)
709 list_for_each(ptr, &udc->ci13xxx_ep[i].qh.queue)
710 {
711 req = list_entry(ptr, struct ci13xxx_req, queue);
712
713 n += scnprintf(buf + n, PAGE_SIZE - n,
714 "EP=%02i: TD=%08X %s\n",
715 i % udc->hw_ep_max/2, (u32)req->dma,
716 ((i < udc->hw_ep_max/2) ? "RX" : "TX"));
717
718 for (j = 0; j < qSize; j++)
719 n += scnprintf(buf + n, PAGE_SIZE - n,
720 " %04X: %08X\n", j,
721 *((u32 *)req->ptr + j));
722 }
723 spin_unlock_irqrestore(&udc->lock, flags);
724
725 return n;
726}
727static DEVICE_ATTR(requests, S_IRUSR, show_requests, NULL);
728
729/**
730 * dbg_create_files: initializes the attribute interface
731 * @dev: device
732 *
733 * This function returns an error code
734 */
735int dbg_create_files(struct device *dev)
736{
737 int retval = 0;
738
739 if (dev == NULL)
740 return -EINVAL;
741 retval = device_create_file(dev, &dev_attr_device);
742 if (retval)
743 goto done;
744 retval = device_create_file(dev, &dev_attr_driver);
745 if (retval)
746 goto rm_device;
747 retval = device_create_file(dev, &dev_attr_events);
748 if (retval)
749 goto rm_driver;
750 retval = device_create_file(dev, &dev_attr_inters);
751 if (retval)
752 goto rm_events;
753 retval = device_create_file(dev, &dev_attr_port_test);
754 if (retval)
755 goto rm_inters;
756 retval = device_create_file(dev, &dev_attr_qheads);
757 if (retval)
758 goto rm_port_test;
759 retval = device_create_file(dev, &dev_attr_registers);
760 if (retval)
761 goto rm_qheads;
762 retval = device_create_file(dev, &dev_attr_requests);
763 if (retval)
764 goto rm_registers;
765 return 0;
766
767 rm_registers:
768 device_remove_file(dev, &dev_attr_registers);
769 rm_qheads:
770 device_remove_file(dev, &dev_attr_qheads);
771 rm_port_test:
772 device_remove_file(dev, &dev_attr_port_test);
773 rm_inters:
774 device_remove_file(dev, &dev_attr_inters);
775 rm_events:
776 device_remove_file(dev, &dev_attr_events);
777 rm_driver:
778 device_remove_file(dev, &dev_attr_driver);
779 rm_device:
780 device_remove_file(dev, &dev_attr_device);
781 done:
782 return retval;
783}
784
785/**
786 * dbg_remove_files: destroys the attribute interface
787 * @dev: device
788 *
789 * This function returns an error code
790 */
791int dbg_remove_files(struct device *dev)
792{
793 if (dev == NULL)
794 return -EINVAL;
795 device_remove_file(dev, &dev_attr_requests);
796 device_remove_file(dev, &dev_attr_registers);
797 device_remove_file(dev, &dev_attr_qheads);
798 device_remove_file(dev, &dev_attr_port_test);
799 device_remove_file(dev, &dev_attr_inters);
800 device_remove_file(dev, &dev_attr_events);
801 device_remove_file(dev, &dev_attr_driver);
802 device_remove_file(dev, &dev_attr_device);
803 return 0;
804}
diff --git a/drivers/usb/chipidea/debug.h b/drivers/usb/chipidea/debug.h
new file mode 100644
index 000000000000..80d96865775c
--- /dev/null
+++ b/drivers/usb/chipidea/debug.h
@@ -0,0 +1,56 @@
1/*
2 * debug.h - ChipIdea USB driver debug interfaces
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __DRIVERS_USB_CHIPIDEA_DEBUG_H
14#define __DRIVERS_USB_CHIPIDEA_DEBUG_H
15
16#ifdef CONFIG_USB_CHIPIDEA_DEBUG
17void dbg_interrupt(u32 intmask);
18void dbg_done(u8 addr, const u32 token, int status);
19void dbg_event(u8 addr, const char *name, int status);
20void dbg_queue(u8 addr, const struct usb_request *req, int status);
21void dbg_setup(u8 addr, const struct usb_ctrlrequest *req);
22int dbg_create_files(struct device *dev);
23int dbg_remove_files(struct device *dev);
24#else
25static inline void dbg_interrupt(u32 intmask)
26{
27}
28
29static inline void dbg_done(u8 addr, const u32 token, int status)
30{
31}
32
33static inline void dbg_event(u8 addr, const char *name, int status)
34{
35}
36
37static inline void dbg_queue(u8 addr, const struct usb_request *req, int status)
38{
39}
40
41static inline void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
42{
43}
44
45static inline int dbg_create_files(struct device *dev)
46{
47 return 0;
48}
49
50static inline int dbg_remove_files(struct device *dev)
51{
52 return 0;
53}
54#endif
55
56#endif /* __DRIVERS_USB_CHIPIDEA_DEBUG_H */
diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
new file mode 100644
index 000000000000..9eacd21c0cd9
--- /dev/null
+++ b/drivers/usb/chipidea/host.c
@@ -0,0 +1,160 @@
1/*
2 * host.c - ChipIdea USB host controller driver
3 *
4 * Copyright (c) 2012 Intel Corporation
5 *
6 * Author: Alexander Shishkin
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/kernel.h>
23#include <linux/usb.h>
24#include <linux/usb/hcd.h>
25#include <linux/usb/chipidea.h>
26
27#define CHIPIDEA_EHCI
28#include "../host/ehci-hcd.c"
29
30#include "ci.h"
31#include "bits.h"
32#include "host.h"
33
34static int ci_ehci_setup(struct usb_hcd *hcd)
35{
36 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
37 int ret;
38
39 hcd->has_tt = 1;
40
41 ret = ehci_setup(hcd);
42 if (ret)
43 return ret;
44
45 ehci_port_power(ehci, 0);
46
47 return ret;
48}
49
50static const struct hc_driver ci_ehci_hc_driver = {
51 .description = "ehci_hcd",
52 .product_desc = "ChipIdea HDRC EHCI",
53 .hcd_priv_size = sizeof(struct ehci_hcd),
54
55 /*
56 * generic hardware linkage
57 */
58 .irq = ehci_irq,
59 .flags = HCD_MEMORY | HCD_USB2,
60
61 /*
62 * basic lifecycle operations
63 */
64 .reset = ci_ehci_setup,
65 .start = ehci_run,
66 .stop = ehci_stop,
67 .shutdown = ehci_shutdown,
68
69 /*
70 * managing i/o requests and associated device resources
71 */
72 .urb_enqueue = ehci_urb_enqueue,
73 .urb_dequeue = ehci_urb_dequeue,
74 .endpoint_disable = ehci_endpoint_disable,
75 .endpoint_reset = ehci_endpoint_reset,
76
77 /*
78 * scheduling support
79 */
80 .get_frame_number = ehci_get_frame,
81
82 /*
83 * root hub support
84 */
85 .hub_status_data = ehci_hub_status_data,
86 .hub_control = ehci_hub_control,
87 .bus_suspend = ehci_bus_suspend,
88 .bus_resume = ehci_bus_resume,
89 .relinquish_port = ehci_relinquish_port,
90 .port_handed_over = ehci_port_handed_over,
91
92 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
93};
94
95static irqreturn_t host_irq(struct ci13xxx *ci)
96{
97 return usb_hcd_irq(ci->irq, ci->hcd);
98}
99
100static int host_start(struct ci13xxx *ci)
101{
102 struct usb_hcd *hcd;
103 struct ehci_hcd *ehci;
104 int ret;
105
106 if (usb_disabled())
107 return -ENODEV;
108
109 hcd = usb_create_hcd(&ci_ehci_hc_driver, ci->dev, dev_name(ci->dev));
110 if (!hcd)
111 return -ENOMEM;
112
113 dev_set_drvdata(ci->dev, ci);
114 hcd->rsrc_start = ci->hw_bank.phys;
115 hcd->rsrc_len = ci->hw_bank.size;
116 hcd->regs = ci->hw_bank.abs;
117 hcd->has_tt = 1;
118
119 hcd->power_budget = ci->udc_driver->power_budget;
120
121 ehci = hcd_to_ehci(hcd);
122 ehci->caps = ci->hw_bank.cap;
123 ehci->has_hostpc = ci->hw_bank.lpm;
124
125 ret = usb_add_hcd(hcd, 0, 0);
126 if (ret)
127 usb_put_hcd(hcd);
128 else
129 ci->hcd = hcd;
130
131 return ret;
132}
133
134static void host_stop(struct ci13xxx *ci)
135{
136 struct usb_hcd *hcd = ci->hcd;
137
138 usb_remove_hcd(hcd);
139 usb_put_hcd(hcd);
140}
141
142int ci_hdrc_host_init(struct ci13xxx *ci)
143{
144 struct ci_role_driver *rdrv;
145
146 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
147 return -ENXIO;
148
149 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
150 if (!rdrv)
151 return -ENOMEM;
152
153 rdrv->start = host_start;
154 rdrv->stop = host_stop;
155 rdrv->irq = host_irq;
156 rdrv->name = "host";
157 ci->roles[CI_ROLE_HOST] = rdrv;
158
159 return 0;
160}
diff --git a/drivers/usb/chipidea/host.h b/drivers/usb/chipidea/host.h
new file mode 100644
index 000000000000..761fb1fd6d99
--- /dev/null
+++ b/drivers/usb/chipidea/host.h
@@ -0,0 +1,17 @@
1#ifndef __DRIVERS_USB_CHIPIDEA_HOST_H
2#define __DRIVERS_USB_CHIPIDEA_HOST_H
3
4#ifdef CONFIG_USB_CHIPIDEA_HOST
5
6int ci_hdrc_host_init(struct ci13xxx *ci);
7
8#else
9
10static inline int ci_hdrc_host_init(struct ci13xxx *ci)
11{
12 return -ENXIO;
13}
14
15#endif
16
17#endif /* __DRIVERS_USB_CHIPIDEA_HOST_H */
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
new file mode 100644
index 000000000000..51f96942dc5e
--- /dev/null
+++ b/drivers/usb/chipidea/udc.c
@@ -0,0 +1,1809 @@
1/*
2 * udc.c - ChipIdea UDC driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/dmapool.h>
16#include <linux/dma-mapping.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/module.h>
20#include <linux/interrupt.h>
21#include <linux/io.h>
22#include <linux/irq.h>
23#include <linux/kernel.h>
24#include <linux/slab.h>
25#include <linux/pm_runtime.h>
26#include <linux/usb/ch9.h>
27#include <linux/usb/gadget.h>
28#include <linux/usb/otg.h>
29#include <linux/usb/chipidea.h>
30
31#include "ci.h"
32#include "udc.h"
33#include "bits.h"
34#include "debug.h"
35
36/* control endpoint description */
37static const struct usb_endpoint_descriptor
38ctrl_endpt_out_desc = {
39 .bLength = USB_DT_ENDPOINT_SIZE,
40 .bDescriptorType = USB_DT_ENDPOINT,
41
42 .bEndpointAddress = USB_DIR_OUT,
43 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
44 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
45};
46
47static const struct usb_endpoint_descriptor
48ctrl_endpt_in_desc = {
49 .bLength = USB_DT_ENDPOINT_SIZE,
50 .bDescriptorType = USB_DT_ENDPOINT,
51
52 .bEndpointAddress = USB_DIR_IN,
53 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
54 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
55};
56
57/**
58 * hw_ep_bit: calculates the bit number
59 * @num: endpoint number
60 * @dir: endpoint direction
61 *
62 * This function returns bit number
63 */
64static inline int hw_ep_bit(int num, int dir)
65{
66 return num + (dir ? 16 : 0);
67}
68
69static inline int ep_to_bit(struct ci13xxx *udc, int n)
70{
71 int fill = 16 - udc->hw_ep_max / 2;
72
73 if (n >= udc->hw_ep_max / 2)
74 n += fill;
75
76 return n;
77}
78
79/**
80 * hw_device_state: enables/disables interrupts & starts/stops device (execute
81 * without interruption)
82 * @dma: 0 => disable, !0 => enable and set dma engine
83 *
84 * This function returns an error code
85 */
86static int hw_device_state(struct ci13xxx *udc, u32 dma)
87{
88 if (dma) {
89 hw_write(udc, OP_ENDPTLISTADDR, ~0, dma);
90 /* interrupt, error, port change, reset, sleep/suspend */
91 hw_write(udc, OP_USBINTR, ~0,
92 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
93 hw_write(udc, OP_USBCMD, USBCMD_RS, USBCMD_RS);
94 } else {
95 hw_write(udc, OP_USBCMD, USBCMD_RS, 0);
96 hw_write(udc, OP_USBINTR, ~0, 0);
97 }
98 return 0;
99}
100
101/**
102 * hw_ep_flush: flush endpoint fifo (execute without interruption)
103 * @num: endpoint number
104 * @dir: endpoint direction
105 *
106 * This function returns an error code
107 */
108static int hw_ep_flush(struct ci13xxx *udc, int num, int dir)
109{
110 int n = hw_ep_bit(num, dir);
111
112 do {
113 /* flush any pending transfer */
114 hw_write(udc, OP_ENDPTFLUSH, BIT(n), BIT(n));
115 while (hw_read(udc, OP_ENDPTFLUSH, BIT(n)))
116 cpu_relax();
117 } while (hw_read(udc, OP_ENDPTSTAT, BIT(n)));
118
119 return 0;
120}
121
122/**
123 * hw_ep_disable: disables endpoint (execute without interruption)
124 * @num: endpoint number
125 * @dir: endpoint direction
126 *
127 * This function returns an error code
128 */
129static int hw_ep_disable(struct ci13xxx *udc, int num, int dir)
130{
131 hw_ep_flush(udc, num, dir);
132 hw_write(udc, OP_ENDPTCTRL + num,
133 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
134 return 0;
135}
136
137/**
138 * hw_ep_enable: enables endpoint (execute without interruption)
139 * @num: endpoint number
140 * @dir: endpoint direction
141 * @type: endpoint type
142 *
143 * This function returns an error code
144 */
145static int hw_ep_enable(struct ci13xxx *udc, int num, int dir, int type)
146{
147 u32 mask, data;
148
149 if (dir) {
150 mask = ENDPTCTRL_TXT; /* type */
151 data = type << ffs_nr(mask);
152
153 mask |= ENDPTCTRL_TXS; /* unstall */
154 mask |= ENDPTCTRL_TXR; /* reset data toggle */
155 data |= ENDPTCTRL_TXR;
156 mask |= ENDPTCTRL_TXE; /* enable */
157 data |= ENDPTCTRL_TXE;
158 } else {
159 mask = ENDPTCTRL_RXT; /* type */
160 data = type << ffs_nr(mask);
161
162 mask |= ENDPTCTRL_RXS; /* unstall */
163 mask |= ENDPTCTRL_RXR; /* reset data toggle */
164 data |= ENDPTCTRL_RXR;
165 mask |= ENDPTCTRL_RXE; /* enable */
166 data |= ENDPTCTRL_RXE;
167 }
168 hw_write(udc, OP_ENDPTCTRL + num, mask, data);
169 return 0;
170}
171
172/**
173 * hw_ep_get_halt: return endpoint halt status
174 * @num: endpoint number
175 * @dir: endpoint direction
176 *
177 * This function returns 1 if endpoint halted
178 */
179static int hw_ep_get_halt(struct ci13xxx *udc, int num, int dir)
180{
181 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
182
183 return hw_read(udc, OP_ENDPTCTRL + num, mask) ? 1 : 0;
184}
185
186/**
187 * hw_test_and_clear_setup_status: test & clear setup status (execute without
188 * interruption)
189 * @n: endpoint number
190 *
191 * This function returns setup status
192 */
193static int hw_test_and_clear_setup_status(struct ci13xxx *udc, int n)
194{
195 n = ep_to_bit(udc, n);
196 return hw_test_and_clear(udc, OP_ENDPTSETUPSTAT, BIT(n));
197}
198
199/**
200 * hw_ep_prime: primes endpoint (execute without interruption)
201 * @num: endpoint number
202 * @dir: endpoint direction
203 * @is_ctrl: true if control endpoint
204 *
205 * This function returns an error code
206 */
207static int hw_ep_prime(struct ci13xxx *udc, int num, int dir, int is_ctrl)
208{
209 int n = hw_ep_bit(num, dir);
210
211 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
212 return -EAGAIN;
213
214 hw_write(udc, OP_ENDPTPRIME, BIT(n), BIT(n));
215
216 while (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
217 cpu_relax();
218 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
219 return -EAGAIN;
220
221 /* status shoult be tested according with manual but it doesn't work */
222 return 0;
223}
224
225/**
226 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
227 * without interruption)
228 * @num: endpoint number
229 * @dir: endpoint direction
230 * @value: true => stall, false => unstall
231 *
232 * This function returns an error code
233 */
234static int hw_ep_set_halt(struct ci13xxx *udc, int num, int dir, int value)
235{
236 if (value != 0 && value != 1)
237 return -EINVAL;
238
239 do {
240 enum ci13xxx_regs reg = OP_ENDPTCTRL + num;
241 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
242 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
243
244 /* data toggle - reserved for EP0 but it's in ESS */
245 hw_write(udc, reg, mask_xs|mask_xr,
246 value ? mask_xs : mask_xr);
247 } while (value != hw_ep_get_halt(udc, num, dir));
248
249 return 0;
250}
251
252/**
253 * hw_is_port_high_speed: test if port is high speed
254 *
255 * This function returns true if high speed port
256 */
257static int hw_port_is_high_speed(struct ci13xxx *udc)
258{
259 return udc->hw_bank.lpm ? hw_read(udc, OP_DEVLC, DEVLC_PSPD) :
260 hw_read(udc, OP_PORTSC, PORTSC_HSP);
261}
262
263/**
264 * hw_read_intr_enable: returns interrupt enable register
265 *
266 * This function returns register data
267 */
268static u32 hw_read_intr_enable(struct ci13xxx *udc)
269{
270 return hw_read(udc, OP_USBINTR, ~0);
271}
272
273/**
274 * hw_read_intr_status: returns interrupt status register
275 *
276 * This function returns register data
277 */
278static u32 hw_read_intr_status(struct ci13xxx *udc)
279{
280 return hw_read(udc, OP_USBSTS, ~0);
281}
282
283/**
284 * hw_test_and_clear_complete: test & clear complete status (execute without
285 * interruption)
286 * @n: endpoint number
287 *
288 * This function returns complete status
289 */
290static int hw_test_and_clear_complete(struct ci13xxx *udc, int n)
291{
292 n = ep_to_bit(udc, n);
293 return hw_test_and_clear(udc, OP_ENDPTCOMPLETE, BIT(n));
294}
295
296/**
297 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
298 * without interruption)
299 *
300 * This function returns active interrutps
301 */
302static u32 hw_test_and_clear_intr_active(struct ci13xxx *udc)
303{
304 u32 reg = hw_read_intr_status(udc) & hw_read_intr_enable(udc);
305
306 hw_write(udc, OP_USBSTS, ~0, reg);
307 return reg;
308}
309
310/**
311 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
312 * interruption)
313 *
314 * This function returns guard value
315 */
316static int hw_test_and_clear_setup_guard(struct ci13xxx *udc)
317{
318 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, 0);
319}
320
321/**
322 * hw_test_and_set_setup_guard: test & set setup guard (execute without
323 * interruption)
324 *
325 * This function returns guard value
326 */
327static int hw_test_and_set_setup_guard(struct ci13xxx *udc)
328{
329 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
330}
331
332/**
333 * hw_usb_set_address: configures USB address (execute without interruption)
334 * @value: new USB address
335 *
336 * This function explicitly sets the address, without the "USBADRA" (advance)
337 * feature, which is not supported by older versions of the controller.
338 */
339static void hw_usb_set_address(struct ci13xxx *udc, u8 value)
340{
341 hw_write(udc, OP_DEVICEADDR, DEVICEADDR_USBADR,
342 value << ffs_nr(DEVICEADDR_USBADR));
343}
344
345/**
346 * hw_usb_reset: restart device after a bus reset (execute without
347 * interruption)
348 *
349 * This function returns an error code
350 */
351static int hw_usb_reset(struct ci13xxx *udc)
352{
353 hw_usb_set_address(udc, 0);
354
355 /* ESS flushes only at end?!? */
356 hw_write(udc, OP_ENDPTFLUSH, ~0, ~0);
357
358 /* clear setup token semaphores */
359 hw_write(udc, OP_ENDPTSETUPSTAT, 0, 0);
360
361 /* clear complete status */
362 hw_write(udc, OP_ENDPTCOMPLETE, 0, 0);
363
364 /* wait until all bits cleared */
365 while (hw_read(udc, OP_ENDPTPRIME, ~0))
366 udelay(10); /* not RTOS friendly */
367
368 /* reset all endpoints ? */
369
370 /* reset internal status and wait for further instructions
371 no need to verify the port reset status (ESS does it) */
372
373 return 0;
374}
375
376/******************************************************************************
377 * UTIL block
378 *****************************************************************************/
379/**
380 * _usb_addr: calculates endpoint address from direction & number
381 * @ep: endpoint
382 */
383static inline u8 _usb_addr(struct ci13xxx_ep *ep)
384{
385 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
386}
387
388/**
389 * _hardware_queue: configures a request at hardware level
390 * @gadget: gadget
391 * @mEp: endpoint
392 *
393 * This function returns an error code
394 */
395static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
396{
397 struct ci13xxx *udc = mEp->udc;
398 unsigned i;
399 int ret = 0;
400 unsigned length = mReq->req.length;
401
402 /* don't queue twice */
403 if (mReq->req.status == -EALREADY)
404 return -EALREADY;
405
406 mReq->req.status = -EALREADY;
407
408 if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
409 mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
410 &mReq->zdma);
411 if (mReq->zptr == NULL)
412 return -ENOMEM;
413
414 memset(mReq->zptr, 0, sizeof(*mReq->zptr));
415 mReq->zptr->next = TD_TERMINATE;
416 mReq->zptr->token = TD_STATUS_ACTIVE;
417 if (!mReq->req.no_interrupt)
418 mReq->zptr->token |= TD_IOC;
419 }
420 ret = usb_gadget_map_request(&udc->gadget, &mReq->req, mEp->dir);
421 if (ret)
422 return ret;
423
424 /*
425 * TD configuration
426 * TODO - handle requests which spawns into several TDs
427 */
428 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
429 mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
430 mReq->ptr->token &= TD_TOTAL_BYTES;
431 mReq->ptr->token |= TD_STATUS_ACTIVE;
432 if (mReq->zptr) {
433 mReq->ptr->next = mReq->zdma;
434 } else {
435 mReq->ptr->next = TD_TERMINATE;
436 if (!mReq->req.no_interrupt)
437 mReq->ptr->token |= TD_IOC;
438 }
439 mReq->ptr->page[0] = mReq->req.dma;
440 for (i = 1; i < 5; i++)
441 mReq->ptr->page[i] =
442 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
443
444 if (!list_empty(&mEp->qh.queue)) {
445 struct ci13xxx_req *mReqPrev;
446 int n = hw_ep_bit(mEp->num, mEp->dir);
447 int tmp_stat;
448
449 mReqPrev = list_entry(mEp->qh.queue.prev,
450 struct ci13xxx_req, queue);
451 if (mReqPrev->zptr)
452 mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
453 else
454 mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
455 wmb();
456 if (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
457 goto done;
458 do {
459 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
460 tmp_stat = hw_read(udc, OP_ENDPTSTAT, BIT(n));
461 } while (!hw_read(udc, OP_USBCMD, USBCMD_ATDTW));
462 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, 0);
463 if (tmp_stat)
464 goto done;
465 }
466
467 /* QH configuration */
468 mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
469 mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
470 mEp->qh.ptr->cap |= QH_ZLT;
471
472 wmb(); /* synchronize before ep prime */
473
474 ret = hw_ep_prime(udc, mEp->num, mEp->dir,
475 mEp->type == USB_ENDPOINT_XFER_CONTROL);
476done:
477 return ret;
478}
479
480/**
481 * _hardware_dequeue: handles a request at hardware level
482 * @gadget: gadget
483 * @mEp: endpoint
484 *
485 * This function returns an error code
486 */
487static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
488{
489 if (mReq->req.status != -EALREADY)
490 return -EINVAL;
491
492 if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
493 return -EBUSY;
494
495 if (mReq->zptr) {
496 if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
497 return -EBUSY;
498 dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
499 mReq->zptr = NULL;
500 }
501
502 mReq->req.status = 0;
503
504 usb_gadget_unmap_request(&mEp->udc->gadget, &mReq->req, mEp->dir);
505
506 mReq->req.status = mReq->ptr->token & TD_STATUS;
507 if ((TD_STATUS_HALTED & mReq->req.status) != 0)
508 mReq->req.status = -1;
509 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
510 mReq->req.status = -1;
511 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
512 mReq->req.status = -1;
513
514 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
515 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
516 mReq->req.actual = mReq->req.length - mReq->req.actual;
517 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
518
519 return mReq->req.actual;
520}
521
522/**
523 * _ep_nuke: dequeues all endpoint requests
524 * @mEp: endpoint
525 *
526 * This function returns an error code
527 * Caller must hold lock
528 */
529static int _ep_nuke(struct ci13xxx_ep *mEp)
530__releases(mEp->lock)
531__acquires(mEp->lock)
532{
533 if (mEp == NULL)
534 return -EINVAL;
535
536 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
537
538 while (!list_empty(&mEp->qh.queue)) {
539
540 /* pop oldest request */
541 struct ci13xxx_req *mReq = \
542 list_entry(mEp->qh.queue.next,
543 struct ci13xxx_req, queue);
544 list_del_init(&mReq->queue);
545 mReq->req.status = -ESHUTDOWN;
546
547 if (mReq->req.complete != NULL) {
548 spin_unlock(mEp->lock);
549 mReq->req.complete(&mEp->ep, &mReq->req);
550 spin_lock(mEp->lock);
551 }
552 }
553 return 0;
554}
555
556/**
557 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
558 * @gadget: gadget
559 *
560 * This function returns an error code
561 */
562static int _gadget_stop_activity(struct usb_gadget *gadget)
563{
564 struct usb_ep *ep;
565 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
566 unsigned long flags;
567
568 spin_lock_irqsave(&udc->lock, flags);
569 udc->gadget.speed = USB_SPEED_UNKNOWN;
570 udc->remote_wakeup = 0;
571 udc->suspended = 0;
572 spin_unlock_irqrestore(&udc->lock, flags);
573
574 /* flush all endpoints */
575 gadget_for_each_ep(ep, gadget) {
576 usb_ep_fifo_flush(ep);
577 }
578 usb_ep_fifo_flush(&udc->ep0out->ep);
579 usb_ep_fifo_flush(&udc->ep0in->ep);
580
581 if (udc->driver)
582 udc->driver->disconnect(gadget);
583
584 /* make sure to disable all endpoints */
585 gadget_for_each_ep(ep, gadget) {
586 usb_ep_disable(ep);
587 }
588
589 if (udc->status != NULL) {
590 usb_ep_free_request(&udc->ep0in->ep, udc->status);
591 udc->status = NULL;
592 }
593
594 return 0;
595}
596
597/******************************************************************************
598 * ISR block
599 *****************************************************************************/
600/**
601 * isr_reset_handler: USB reset interrupt handler
602 * @udc: UDC device
603 *
604 * This function resets USB engine after a bus reset occurred
605 */
606static void isr_reset_handler(struct ci13xxx *udc)
607__releases(udc->lock)
608__acquires(udc->lock)
609{
610 int retval;
611
612 dbg_event(0xFF, "BUS RST", 0);
613
614 spin_unlock(&udc->lock);
615 retval = _gadget_stop_activity(&udc->gadget);
616 if (retval)
617 goto done;
618
619 retval = hw_usb_reset(udc);
620 if (retval)
621 goto done;
622
623 udc->status = usb_ep_alloc_request(&udc->ep0in->ep, GFP_ATOMIC);
624 if (udc->status == NULL)
625 retval = -ENOMEM;
626
627done:
628 spin_lock(&udc->lock);
629
630 if (retval)
631 dev_err(udc->dev, "error: %i\n", retval);
632}
633
634/**
635 * isr_get_status_complete: get_status request complete function
636 * @ep: endpoint
637 * @req: request handled
638 *
639 * Caller must release lock
640 */
641static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
642{
643 if (ep == NULL || req == NULL)
644 return;
645
646 kfree(req->buf);
647 usb_ep_free_request(ep, req);
648}
649
650/**
651 * isr_get_status_response: get_status request response
652 * @udc: udc struct
653 * @setup: setup request packet
654 *
655 * This function returns an error code
656 */
657static int isr_get_status_response(struct ci13xxx *udc,
658 struct usb_ctrlrequest *setup)
659__releases(mEp->lock)
660__acquires(mEp->lock)
661{
662 struct ci13xxx_ep *mEp = udc->ep0in;
663 struct usb_request *req = NULL;
664 gfp_t gfp_flags = GFP_ATOMIC;
665 int dir, num, retval;
666
667 if (mEp == NULL || setup == NULL)
668 return -EINVAL;
669
670 spin_unlock(mEp->lock);
671 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
672 spin_lock(mEp->lock);
673 if (req == NULL)
674 return -ENOMEM;
675
676 req->complete = isr_get_status_complete;
677 req->length = 2;
678 req->buf = kzalloc(req->length, gfp_flags);
679 if (req->buf == NULL) {
680 retval = -ENOMEM;
681 goto err_free_req;
682 }
683
684 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
685 /* Assume that device is bus powered for now. */
686 *(u16 *)req->buf = udc->remote_wakeup << 1;
687 retval = 0;
688 } else if ((setup->bRequestType & USB_RECIP_MASK) \
689 == USB_RECIP_ENDPOINT) {
690 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
691 TX : RX;
692 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
693 *(u16 *)req->buf = hw_ep_get_halt(udc, num, dir);
694 }
695 /* else do nothing; reserved for future use */
696
697 spin_unlock(mEp->lock);
698 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
699 spin_lock(mEp->lock);
700 if (retval)
701 goto err_free_buf;
702
703 return 0;
704
705 err_free_buf:
706 kfree(req->buf);
707 err_free_req:
708 spin_unlock(mEp->lock);
709 usb_ep_free_request(&mEp->ep, req);
710 spin_lock(mEp->lock);
711 return retval;
712}
713
714/**
715 * isr_setup_status_complete: setup_status request complete function
716 * @ep: endpoint
717 * @req: request handled
718 *
719 * Caller must release lock. Put the port in test mode if test mode
720 * feature is selected.
721 */
722static void
723isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
724{
725 struct ci13xxx *udc = req->context;
726 unsigned long flags;
727
728 if (udc->setaddr) {
729 hw_usb_set_address(udc, udc->address);
730 udc->setaddr = false;
731 }
732
733 spin_lock_irqsave(&udc->lock, flags);
734 if (udc->test_mode)
735 hw_port_test_set(udc, udc->test_mode);
736 spin_unlock_irqrestore(&udc->lock, flags);
737}
738
739/**
740 * isr_setup_status_phase: queues the status phase of a setup transation
741 * @udc: udc struct
742 *
743 * This function returns an error code
744 */
745static int isr_setup_status_phase(struct ci13xxx *udc)
746__releases(mEp->lock)
747__acquires(mEp->lock)
748{
749 int retval;
750 struct ci13xxx_ep *mEp;
751
752 mEp = (udc->ep0_dir == TX) ? udc->ep0out : udc->ep0in;
753 udc->status->context = udc;
754 udc->status->complete = isr_setup_status_complete;
755
756 spin_unlock(mEp->lock);
757 retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
758 spin_lock(mEp->lock);
759
760 return retval;
761}
762
763/**
764 * isr_tr_complete_low: transaction complete low level handler
765 * @mEp: endpoint
766 *
767 * This function returns an error code
768 * Caller must hold lock
769 */
770static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
771__releases(mEp->lock)
772__acquires(mEp->lock)
773{
774 struct ci13xxx_req *mReq, *mReqTemp;
775 struct ci13xxx_ep *mEpTemp = mEp;
776 int uninitialized_var(retval);
777
778 if (list_empty(&mEp->qh.queue))
779 return -EINVAL;
780
781 list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
782 queue) {
783 retval = _hardware_dequeue(mEp, mReq);
784 if (retval < 0)
785 break;
786 list_del_init(&mReq->queue);
787 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
788 if (mReq->req.complete != NULL) {
789 spin_unlock(mEp->lock);
790 if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
791 mReq->req.length)
792 mEpTemp = mEp->udc->ep0in;
793 mReq->req.complete(&mEpTemp->ep, &mReq->req);
794 spin_lock(mEp->lock);
795 }
796 }
797
798 if (retval == -EBUSY)
799 retval = 0;
800 if (retval < 0)
801 dbg_event(_usb_addr(mEp), "DONE", retval);
802
803 return retval;
804}
805
806/**
807 * isr_tr_complete_handler: transaction complete interrupt handler
808 * @udc: UDC descriptor
809 *
810 * This function handles traffic events
811 */
812static void isr_tr_complete_handler(struct ci13xxx *udc)
813__releases(udc->lock)
814__acquires(udc->lock)
815{
816 unsigned i;
817 u8 tmode = 0;
818
819 for (i = 0; i < udc->hw_ep_max; i++) {
820 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
821 int type, num, dir, err = -EINVAL;
822 struct usb_ctrlrequest req;
823
824 if (mEp->ep.desc == NULL)
825 continue; /* not configured */
826
827 if (hw_test_and_clear_complete(udc, i)) {
828 err = isr_tr_complete_low(mEp);
829 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
830 if (err > 0) /* needs status phase */
831 err = isr_setup_status_phase(udc);
832 if (err < 0) {
833 dbg_event(_usb_addr(mEp),
834 "ERROR", err);
835 spin_unlock(&udc->lock);
836 if (usb_ep_set_halt(&mEp->ep))
837 dev_err(udc->dev,
838 "error: ep_set_halt\n");
839 spin_lock(&udc->lock);
840 }
841 }
842 }
843
844 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
845 !hw_test_and_clear_setup_status(udc, i))
846 continue;
847
848 if (i != 0) {
849 dev_warn(udc->dev, "ctrl traffic at endpoint %d\n", i);
850 continue;
851 }
852
853 /*
854 * Flush data and handshake transactions of previous
855 * setup packet.
856 */
857 _ep_nuke(udc->ep0out);
858 _ep_nuke(udc->ep0in);
859
860 /* read_setup_packet */
861 do {
862 hw_test_and_set_setup_guard(udc);
863 memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
864 } while (!hw_test_and_clear_setup_guard(udc));
865
866 type = req.bRequestType;
867
868 udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
869
870 dbg_setup(_usb_addr(mEp), &req);
871
872 switch (req.bRequest) {
873 case USB_REQ_CLEAR_FEATURE:
874 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
875 le16_to_cpu(req.wValue) ==
876 USB_ENDPOINT_HALT) {
877 if (req.wLength != 0)
878 break;
879 num = le16_to_cpu(req.wIndex);
880 dir = num & USB_ENDPOINT_DIR_MASK;
881 num &= USB_ENDPOINT_NUMBER_MASK;
882 if (dir) /* TX */
883 num += udc->hw_ep_max/2;
884 if (!udc->ci13xxx_ep[num].wedge) {
885 spin_unlock(&udc->lock);
886 err = usb_ep_clear_halt(
887 &udc->ci13xxx_ep[num].ep);
888 spin_lock(&udc->lock);
889 if (err)
890 break;
891 }
892 err = isr_setup_status_phase(udc);
893 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
894 le16_to_cpu(req.wValue) ==
895 USB_DEVICE_REMOTE_WAKEUP) {
896 if (req.wLength != 0)
897 break;
898 udc->remote_wakeup = 0;
899 err = isr_setup_status_phase(udc);
900 } else {
901 goto delegate;
902 }
903 break;
904 case USB_REQ_GET_STATUS:
905 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
906 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
907 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
908 goto delegate;
909 if (le16_to_cpu(req.wLength) != 2 ||
910 le16_to_cpu(req.wValue) != 0)
911 break;
912 err = isr_get_status_response(udc, &req);
913 break;
914 case USB_REQ_SET_ADDRESS:
915 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
916 goto delegate;
917 if (le16_to_cpu(req.wLength) != 0 ||
918 le16_to_cpu(req.wIndex) != 0)
919 break;
920 udc->address = (u8)le16_to_cpu(req.wValue);
921 udc->setaddr = true;
922 err = isr_setup_status_phase(udc);
923 break;
924 case USB_REQ_SET_FEATURE:
925 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
926 le16_to_cpu(req.wValue) ==
927 USB_ENDPOINT_HALT) {
928 if (req.wLength != 0)
929 break;
930 num = le16_to_cpu(req.wIndex);
931 dir = num & USB_ENDPOINT_DIR_MASK;
932 num &= USB_ENDPOINT_NUMBER_MASK;
933 if (dir) /* TX */
934 num += udc->hw_ep_max/2;
935
936 spin_unlock(&udc->lock);
937 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
938 spin_lock(&udc->lock);
939 if (!err)
940 isr_setup_status_phase(udc);
941 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
942 if (req.wLength != 0)
943 break;
944 switch (le16_to_cpu(req.wValue)) {
945 case USB_DEVICE_REMOTE_WAKEUP:
946 udc->remote_wakeup = 1;
947 err = isr_setup_status_phase(udc);
948 break;
949 case USB_DEVICE_TEST_MODE:
950 tmode = le16_to_cpu(req.wIndex) >> 8;
951 switch (tmode) {
952 case TEST_J:
953 case TEST_K:
954 case TEST_SE0_NAK:
955 case TEST_PACKET:
956 case TEST_FORCE_EN:
957 udc->test_mode = tmode;
958 err = isr_setup_status_phase(
959 udc);
960 break;
961 default:
962 break;
963 }
964 default:
965 goto delegate;
966 }
967 } else {
968 goto delegate;
969 }
970 break;
971 default:
972delegate:
973 if (req.wLength == 0) /* no data phase */
974 udc->ep0_dir = TX;
975
976 spin_unlock(&udc->lock);
977 err = udc->driver->setup(&udc->gadget, &req);
978 spin_lock(&udc->lock);
979 break;
980 }
981
982 if (err < 0) {
983 dbg_event(_usb_addr(mEp), "ERROR", err);
984
985 spin_unlock(&udc->lock);
986 if (usb_ep_set_halt(&mEp->ep))
987 dev_err(udc->dev, "error: ep_set_halt\n");
988 spin_lock(&udc->lock);
989 }
990 }
991}
992
993/******************************************************************************
994 * ENDPT block
995 *****************************************************************************/
996/**
997 * ep_enable: configure endpoint, making it usable
998 *
999 * Check usb_ep_enable() at "usb_gadget.h" for details
1000 */
1001static int ep_enable(struct usb_ep *ep,
1002 const struct usb_endpoint_descriptor *desc)
1003{
1004 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1005 int retval = 0;
1006 unsigned long flags;
1007
1008 if (ep == NULL || desc == NULL)
1009 return -EINVAL;
1010
1011 spin_lock_irqsave(mEp->lock, flags);
1012
1013 /* only internal SW should enable ctrl endpts */
1014
1015 mEp->ep.desc = desc;
1016
1017 if (!list_empty(&mEp->qh.queue))
1018 dev_warn(mEp->udc->dev, "enabling a non-empty endpoint!\n");
1019
1020 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1021 mEp->num = usb_endpoint_num(desc);
1022 mEp->type = usb_endpoint_type(desc);
1023
1024 mEp->ep.maxpacket = usb_endpoint_maxp(desc);
1025
1026 dbg_event(_usb_addr(mEp), "ENABLE", 0);
1027
1028 mEp->qh.ptr->cap = 0;
1029
1030 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1031 mEp->qh.ptr->cap |= QH_IOS;
1032 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
1033 mEp->qh.ptr->cap &= ~QH_MULT;
1034 else
1035 mEp->qh.ptr->cap &= ~QH_ZLT;
1036
1037 mEp->qh.ptr->cap |=
1038 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
1039 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
1040
1041 /*
1042 * Enable endpoints in the HW other than ep0 as ep0
1043 * is always enabled
1044 */
1045 if (mEp->num)
1046 retval |= hw_ep_enable(mEp->udc, mEp->num, mEp->dir, mEp->type);
1047
1048 spin_unlock_irqrestore(mEp->lock, flags);
1049 return retval;
1050}
1051
1052/**
1053 * ep_disable: endpoint is no longer usable
1054 *
1055 * Check usb_ep_disable() at "usb_gadget.h" for details
1056 */
1057static int ep_disable(struct usb_ep *ep)
1058{
1059 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1060 int direction, retval = 0;
1061 unsigned long flags;
1062
1063 if (ep == NULL)
1064 return -EINVAL;
1065 else if (mEp->ep.desc == NULL)
1066 return -EBUSY;
1067
1068 spin_lock_irqsave(mEp->lock, flags);
1069
1070 /* only internal SW should disable ctrl endpts */
1071
1072 direction = mEp->dir;
1073 do {
1074 dbg_event(_usb_addr(mEp), "DISABLE", 0);
1075
1076 retval |= _ep_nuke(mEp);
1077 retval |= hw_ep_disable(mEp->udc, mEp->num, mEp->dir);
1078
1079 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1080 mEp->dir = (mEp->dir == TX) ? RX : TX;
1081
1082 } while (mEp->dir != direction);
1083
1084 mEp->ep.desc = NULL;
1085
1086 spin_unlock_irqrestore(mEp->lock, flags);
1087 return retval;
1088}
1089
1090/**
1091 * ep_alloc_request: allocate a request object to use with this endpoint
1092 *
1093 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1094 */
1095static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1096{
1097 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1098 struct ci13xxx_req *mReq = NULL;
1099
1100 if (ep == NULL)
1101 return NULL;
1102
1103 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
1104 if (mReq != NULL) {
1105 INIT_LIST_HEAD(&mReq->queue);
1106
1107 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
1108 &mReq->dma);
1109 if (mReq->ptr == NULL) {
1110 kfree(mReq);
1111 mReq = NULL;
1112 }
1113 }
1114
1115 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
1116
1117 return (mReq == NULL) ? NULL : &mReq->req;
1118}
1119
1120/**
1121 * ep_free_request: frees a request object
1122 *
1123 * Check usb_ep_free_request() at "usb_gadget.h" for details
1124 */
1125static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1126{
1127 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1128 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1129 unsigned long flags;
1130
1131 if (ep == NULL || req == NULL) {
1132 return;
1133 } else if (!list_empty(&mReq->queue)) {
1134 dev_err(mEp->udc->dev, "freeing queued request\n");
1135 return;
1136 }
1137
1138 spin_lock_irqsave(mEp->lock, flags);
1139
1140 if (mReq->ptr)
1141 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
1142 kfree(mReq);
1143
1144 dbg_event(_usb_addr(mEp), "FREE", 0);
1145
1146 spin_unlock_irqrestore(mEp->lock, flags);
1147}
1148
1149/**
1150 * ep_queue: queues (submits) an I/O request to an endpoint
1151 *
1152 * Check usb_ep_queue()* at usb_gadget.h" for details
1153 */
1154static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1155 gfp_t __maybe_unused gfp_flags)
1156{
1157 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1158 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1159 struct ci13xxx *udc = mEp->udc;
1160 int retval = 0;
1161 unsigned long flags;
1162
1163 if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
1164 return -EINVAL;
1165
1166 spin_lock_irqsave(mEp->lock, flags);
1167
1168 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1169 if (req->length)
1170 mEp = (udc->ep0_dir == RX) ?
1171 udc->ep0out : udc->ep0in;
1172 if (!list_empty(&mEp->qh.queue)) {
1173 _ep_nuke(mEp);
1174 retval = -EOVERFLOW;
1175 dev_warn(mEp->udc->dev, "endpoint ctrl %X nuked\n",
1176 _usb_addr(mEp));
1177 }
1178 }
1179
1180 /* first nuke then test link, e.g. previous status has not sent */
1181 if (!list_empty(&mReq->queue)) {
1182 retval = -EBUSY;
1183 dev_err(mEp->udc->dev, "request already in queue\n");
1184 goto done;
1185 }
1186
1187 if (req->length > 4 * CI13XXX_PAGE_SIZE) {
1188 req->length = 4 * CI13XXX_PAGE_SIZE;
1189 retval = -EMSGSIZE;
1190 dev_warn(mEp->udc->dev, "request length truncated\n");
1191 }
1192
1193 dbg_queue(_usb_addr(mEp), req, retval);
1194
1195 /* push request */
1196 mReq->req.status = -EINPROGRESS;
1197 mReq->req.actual = 0;
1198
1199 retval = _hardware_enqueue(mEp, mReq);
1200
1201 if (retval == -EALREADY) {
1202 dbg_event(_usb_addr(mEp), "QUEUE", retval);
1203 retval = 0;
1204 }
1205 if (!retval)
1206 list_add_tail(&mReq->queue, &mEp->qh.queue);
1207
1208 done:
1209 spin_unlock_irqrestore(mEp->lock, flags);
1210 return retval;
1211}
1212
1213/**
1214 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1215 *
1216 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1217 */
1218static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1219{
1220 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1221 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1222 unsigned long flags;
1223
1224 if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
1225 mEp->ep.desc == NULL || list_empty(&mReq->queue) ||
1226 list_empty(&mEp->qh.queue))
1227 return -EINVAL;
1228
1229 spin_lock_irqsave(mEp->lock, flags);
1230
1231 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
1232
1233 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
1234
1235 /* pop request */
1236 list_del_init(&mReq->queue);
1237
1238 usb_gadget_unmap_request(&mEp->udc->gadget, req, mEp->dir);
1239
1240 req->status = -ECONNRESET;
1241
1242 if (mReq->req.complete != NULL) {
1243 spin_unlock(mEp->lock);
1244 mReq->req.complete(&mEp->ep, &mReq->req);
1245 spin_lock(mEp->lock);
1246 }
1247
1248 spin_unlock_irqrestore(mEp->lock, flags);
1249 return 0;
1250}
1251
1252/**
1253 * ep_set_halt: sets the endpoint halt feature
1254 *
1255 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1256 */
1257static int ep_set_halt(struct usb_ep *ep, int value)
1258{
1259 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1260 int direction, retval = 0;
1261 unsigned long flags;
1262
1263 if (ep == NULL || mEp->ep.desc == NULL)
1264 return -EINVAL;
1265
1266 spin_lock_irqsave(mEp->lock, flags);
1267
1268#ifndef STALL_IN
1269 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
1270 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
1271 !list_empty(&mEp->qh.queue)) {
1272 spin_unlock_irqrestore(mEp->lock, flags);
1273 return -EAGAIN;
1274 }
1275#endif
1276
1277 direction = mEp->dir;
1278 do {
1279 dbg_event(_usb_addr(mEp), "HALT", value);
1280 retval |= hw_ep_set_halt(mEp->udc, mEp->num, mEp->dir, value);
1281
1282 if (!value)
1283 mEp->wedge = 0;
1284
1285 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1286 mEp->dir = (mEp->dir == TX) ? RX : TX;
1287
1288 } while (mEp->dir != direction);
1289
1290 spin_unlock_irqrestore(mEp->lock, flags);
1291 return retval;
1292}
1293
1294/**
1295 * ep_set_wedge: sets the halt feature and ignores clear requests
1296 *
1297 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1298 */
1299static int ep_set_wedge(struct usb_ep *ep)
1300{
1301 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1302 unsigned long flags;
1303
1304 if (ep == NULL || mEp->ep.desc == NULL)
1305 return -EINVAL;
1306
1307 spin_lock_irqsave(mEp->lock, flags);
1308
1309 dbg_event(_usb_addr(mEp), "WEDGE", 0);
1310 mEp->wedge = 1;
1311
1312 spin_unlock_irqrestore(mEp->lock, flags);
1313
1314 return usb_ep_set_halt(ep);
1315}
1316
1317/**
1318 * ep_fifo_flush: flushes contents of a fifo
1319 *
1320 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1321 */
1322static void ep_fifo_flush(struct usb_ep *ep)
1323{
1324 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1325 unsigned long flags;
1326
1327 if (ep == NULL) {
1328 dev_err(mEp->udc->dev, "%02X: -EINVAL\n", _usb_addr(mEp));
1329 return;
1330 }
1331
1332 spin_lock_irqsave(mEp->lock, flags);
1333
1334 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
1335 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
1336
1337 spin_unlock_irqrestore(mEp->lock, flags);
1338}
1339
1340/**
1341 * Endpoint-specific part of the API to the USB controller hardware
1342 * Check "usb_gadget.h" for details
1343 */
1344static const struct usb_ep_ops usb_ep_ops = {
1345 .enable = ep_enable,
1346 .disable = ep_disable,
1347 .alloc_request = ep_alloc_request,
1348 .free_request = ep_free_request,
1349 .queue = ep_queue,
1350 .dequeue = ep_dequeue,
1351 .set_halt = ep_set_halt,
1352 .set_wedge = ep_set_wedge,
1353 .fifo_flush = ep_fifo_flush,
1354};
1355
1356/******************************************************************************
1357 * GADGET block
1358 *****************************************************************************/
1359static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
1360{
1361 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1362 unsigned long flags;
1363 int gadget_ready = 0;
1364
1365 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
1366 return -EOPNOTSUPP;
1367
1368 spin_lock_irqsave(&udc->lock, flags);
1369 udc->vbus_active = is_active;
1370 if (udc->driver)
1371 gadget_ready = 1;
1372 spin_unlock_irqrestore(&udc->lock, flags);
1373
1374 if (gadget_ready) {
1375 if (is_active) {
1376 pm_runtime_get_sync(&_gadget->dev);
1377 hw_device_reset(udc, USBMODE_CM_DC);
1378 hw_device_state(udc, udc->ep0out->qh.dma);
1379 } else {
1380 hw_device_state(udc, 0);
1381 if (udc->udc_driver->notify_event)
1382 udc->udc_driver->notify_event(udc,
1383 CI13XXX_CONTROLLER_STOPPED_EVENT);
1384 _gadget_stop_activity(&udc->gadget);
1385 pm_runtime_put_sync(&_gadget->dev);
1386 }
1387 }
1388
1389 return 0;
1390}
1391
1392static int ci13xxx_wakeup(struct usb_gadget *_gadget)
1393{
1394 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1395 unsigned long flags;
1396 int ret = 0;
1397
1398 spin_lock_irqsave(&udc->lock, flags);
1399 if (!udc->remote_wakeup) {
1400 ret = -EOPNOTSUPP;
1401 goto out;
1402 }
1403 if (!hw_read(udc, OP_PORTSC, PORTSC_SUSP)) {
1404 ret = -EINVAL;
1405 goto out;
1406 }
1407 hw_write(udc, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1408out:
1409 spin_unlock_irqrestore(&udc->lock, flags);
1410 return ret;
1411}
1412
1413static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1414{
1415 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1416
1417 if (udc->transceiver)
1418 return usb_phy_set_power(udc->transceiver, mA);
1419 return -ENOTSUPP;
1420}
1421
1422static int ci13xxx_start(struct usb_gadget *gadget,
1423 struct usb_gadget_driver *driver);
1424static int ci13xxx_stop(struct usb_gadget *gadget,
1425 struct usb_gadget_driver *driver);
1426/**
1427 * Device operations part of the API to the USB controller hardware,
1428 * which don't involve endpoints (or i/o)
1429 * Check "usb_gadget.h" for details
1430 */
1431static const struct usb_gadget_ops usb_gadget_ops = {
1432 .vbus_session = ci13xxx_vbus_session,
1433 .wakeup = ci13xxx_wakeup,
1434 .vbus_draw = ci13xxx_vbus_draw,
1435 .udc_start = ci13xxx_start,
1436 .udc_stop = ci13xxx_stop,
1437};
1438
1439static int init_eps(struct ci13xxx *udc)
1440{
1441 int retval = 0, i, j;
1442
1443 for (i = 0; i < udc->hw_ep_max/2; i++)
1444 for (j = RX; j <= TX; j++) {
1445 int k = i + j * udc->hw_ep_max/2;
1446 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
1447
1448 scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
1449 (j == TX) ? "in" : "out");
1450
1451 mEp->udc = udc;
1452 mEp->lock = &udc->lock;
1453 mEp->td_pool = udc->td_pool;
1454
1455 mEp->ep.name = mEp->name;
1456 mEp->ep.ops = &usb_ep_ops;
1457 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
1458
1459 INIT_LIST_HEAD(&mEp->qh.queue);
1460 mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
1461 &mEp->qh.dma);
1462 if (mEp->qh.ptr == NULL)
1463 retval = -ENOMEM;
1464 else
1465 memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
1466
1467 /*
1468 * set up shorthands for ep0 out and in endpoints,
1469 * don't add to gadget's ep_list
1470 */
1471 if (i == 0) {
1472 if (j == RX)
1473 udc->ep0out = mEp;
1474 else
1475 udc->ep0in = mEp;
1476
1477 continue;
1478 }
1479
1480 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
1481 }
1482
1483 return retval;
1484}
1485
1486/**
1487 * ci13xxx_start: register a gadget driver
1488 * @gadget: our gadget
1489 * @driver: the driver being registered
1490 *
1491 * Interrupts are enabled here.
1492 */
1493static int ci13xxx_start(struct usb_gadget *gadget,
1494 struct usb_gadget_driver *driver)
1495{
1496 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1497 unsigned long flags;
1498 int retval = -ENOMEM;
1499
1500 if (driver->disconnect == NULL)
1501 return -EINVAL;
1502
1503
1504 udc->ep0out->ep.desc = &ctrl_endpt_out_desc;
1505 retval = usb_ep_enable(&udc->ep0out->ep);
1506 if (retval)
1507 return retval;
1508
1509 udc->ep0in->ep.desc = &ctrl_endpt_in_desc;
1510 retval = usb_ep_enable(&udc->ep0in->ep);
1511 if (retval)
1512 return retval;
1513 spin_lock_irqsave(&udc->lock, flags);
1514
1515 udc->driver = driver;
1516 pm_runtime_get_sync(&udc->gadget.dev);
1517 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
1518 if (udc->vbus_active) {
1519 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
1520 hw_device_reset(udc, USBMODE_CM_DC);
1521 } else {
1522 pm_runtime_put_sync(&udc->gadget.dev);
1523 goto done;
1524 }
1525 }
1526
1527 retval = hw_device_state(udc, udc->ep0out->qh.dma);
1528 if (retval)
1529 pm_runtime_put_sync(&udc->gadget.dev);
1530
1531 done:
1532 spin_unlock_irqrestore(&udc->lock, flags);
1533 return retval;
1534}
1535
1536/**
1537 * ci13xxx_stop: unregister a gadget driver
1538 */
1539static int ci13xxx_stop(struct usb_gadget *gadget,
1540 struct usb_gadget_driver *driver)
1541{
1542 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1543 unsigned long flags;
1544
1545 spin_lock_irqsave(&udc->lock, flags);
1546
1547 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
1548 udc->vbus_active) {
1549 hw_device_state(udc, 0);
1550 if (udc->udc_driver->notify_event)
1551 udc->udc_driver->notify_event(udc,
1552 CI13XXX_CONTROLLER_STOPPED_EVENT);
1553 udc->driver = NULL;
1554 spin_unlock_irqrestore(&udc->lock, flags);
1555 _gadget_stop_activity(&udc->gadget);
1556 spin_lock_irqsave(&udc->lock, flags);
1557 pm_runtime_put(&udc->gadget.dev);
1558 }
1559
1560 spin_unlock_irqrestore(&udc->lock, flags);
1561
1562 return 0;
1563}
1564
1565/******************************************************************************
1566 * BUS block
1567 *****************************************************************************/
1568/**
1569 * udc_irq: udc interrupt handler
1570 *
1571 * This function returns IRQ_HANDLED if the IRQ has been handled
1572 * It locks access to registers
1573 */
1574static irqreturn_t udc_irq(struct ci13xxx *udc)
1575{
1576 irqreturn_t retval;
1577 u32 intr;
1578
1579 if (udc == NULL)
1580 return IRQ_HANDLED;
1581
1582 spin_lock(&udc->lock);
1583
1584 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
1585 if (hw_read(udc, OP_USBMODE, USBMODE_CM) !=
1586 USBMODE_CM_DC) {
1587 spin_unlock(&udc->lock);
1588 return IRQ_NONE;
1589 }
1590 }
1591 intr = hw_test_and_clear_intr_active(udc);
1592 dbg_interrupt(intr);
1593
1594 if (intr) {
1595 /* order defines priority - do NOT change it */
1596 if (USBi_URI & intr)
1597 isr_reset_handler(udc);
1598
1599 if (USBi_PCI & intr) {
1600 udc->gadget.speed = hw_port_is_high_speed(udc) ?
1601 USB_SPEED_HIGH : USB_SPEED_FULL;
1602 if (udc->suspended && udc->driver->resume) {
1603 spin_unlock(&udc->lock);
1604 udc->driver->resume(&udc->gadget);
1605 spin_lock(&udc->lock);
1606 udc->suspended = 0;
1607 }
1608 }
1609
1610 if (USBi_UI & intr)
1611 isr_tr_complete_handler(udc);
1612
1613 if (USBi_SLI & intr) {
1614 if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
1615 udc->driver->suspend) {
1616 udc->suspended = 1;
1617 spin_unlock(&udc->lock);
1618 udc->driver->suspend(&udc->gadget);
1619 spin_lock(&udc->lock);
1620 }
1621 }
1622 retval = IRQ_HANDLED;
1623 } else {
1624 retval = IRQ_NONE;
1625 }
1626 spin_unlock(&udc->lock);
1627
1628 return retval;
1629}
1630
1631/**
1632 * udc_release: driver release function
1633 * @dev: device
1634 *
1635 * Currently does nothing
1636 */
1637static void udc_release(struct device *dev)
1638{
1639}
1640
1641/**
1642 * udc_start: initialize gadget role
1643 * @udc: chipidea controller
1644 */
1645static int udc_start(struct ci13xxx *udc)
1646{
1647 struct device *dev = udc->dev;
1648 int retval = 0;
1649
1650 if (!udc)
1651 return -EINVAL;
1652
1653 spin_lock_init(&udc->lock);
1654
1655 udc->gadget.ops = &usb_gadget_ops;
1656 udc->gadget.speed = USB_SPEED_UNKNOWN;
1657 udc->gadget.max_speed = USB_SPEED_HIGH;
1658 udc->gadget.is_otg = 0;
1659 udc->gadget.name = udc->udc_driver->name;
1660
1661 INIT_LIST_HEAD(&udc->gadget.ep_list);
1662
1663 dev_set_name(&udc->gadget.dev, "gadget");
1664 udc->gadget.dev.dma_mask = dev->dma_mask;
1665 udc->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
1666 udc->gadget.dev.parent = dev;
1667 udc->gadget.dev.release = udc_release;
1668
1669 /* alloc resources */
1670 udc->qh_pool = dma_pool_create("ci13xxx_qh", dev,
1671 sizeof(struct ci13xxx_qh),
1672 64, CI13XXX_PAGE_SIZE);
1673 if (udc->qh_pool == NULL)
1674 return -ENOMEM;
1675
1676 udc->td_pool = dma_pool_create("ci13xxx_td", dev,
1677 sizeof(struct ci13xxx_td),
1678 64, CI13XXX_PAGE_SIZE);
1679 if (udc->td_pool == NULL) {
1680 retval = -ENOMEM;
1681 goto free_qh_pool;
1682 }
1683
1684 retval = init_eps(udc);
1685 if (retval)
1686 goto free_pools;
1687
1688 udc->gadget.ep0 = &udc->ep0in->ep;
1689
1690 udc->transceiver = usb_get_transceiver();
1691
1692 if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
1693 if (udc->transceiver == NULL) {
1694 retval = -ENODEV;
1695 goto free_pools;
1696 }
1697 }
1698
1699 if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
1700 retval = hw_device_reset(udc, USBMODE_CM_DC);
1701 if (retval)
1702 goto put_transceiver;
1703 }
1704
1705 retval = device_register(&udc->gadget.dev);
1706 if (retval) {
1707 put_device(&udc->gadget.dev);
1708 goto put_transceiver;
1709 }
1710
1711 retval = dbg_create_files(&udc->gadget.dev);
1712 if (retval)
1713 goto unreg_device;
1714
1715 if (udc->transceiver) {
1716 retval = otg_set_peripheral(udc->transceiver->otg,
1717 &udc->gadget);
1718 if (retval)
1719 goto remove_dbg;
1720 }
1721
1722 retval = usb_add_gadget_udc(dev, &udc->gadget);
1723 if (retval)
1724 goto remove_trans;
1725
1726 pm_runtime_no_callbacks(&udc->gadget.dev);
1727 pm_runtime_enable(&udc->gadget.dev);
1728
1729 return retval;
1730
1731remove_trans:
1732 if (udc->transceiver) {
1733 otg_set_peripheral(udc->transceiver->otg, &udc->gadget);
1734 usb_put_transceiver(udc->transceiver);
1735 }
1736
1737 dev_err(dev, "error = %i\n", retval);
1738remove_dbg:
1739 dbg_remove_files(&udc->gadget.dev);
1740unreg_device:
1741 device_unregister(&udc->gadget.dev);
1742put_transceiver:
1743 if (udc->transceiver)
1744 usb_put_transceiver(udc->transceiver);
1745free_pools:
1746 dma_pool_destroy(udc->td_pool);
1747free_qh_pool:
1748 dma_pool_destroy(udc->qh_pool);
1749 return retval;
1750}
1751
1752/**
1753 * udc_remove: parent remove must call this to remove UDC
1754 *
1755 * No interrupts active, the IRQ has been released
1756 */
1757static void udc_stop(struct ci13xxx *udc)
1758{
1759 int i;
1760
1761 if (udc == NULL)
1762 return;
1763
1764 usb_del_gadget_udc(&udc->gadget);
1765
1766 for (i = 0; i < udc->hw_ep_max; i++) {
1767 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1768
1769 dma_pool_free(udc->qh_pool, mEp->qh.ptr, mEp->qh.dma);
1770 }
1771
1772 dma_pool_destroy(udc->td_pool);
1773 dma_pool_destroy(udc->qh_pool);
1774
1775 if (udc->transceiver) {
1776 otg_set_peripheral(udc->transceiver->otg, NULL);
1777 usb_put_transceiver(udc->transceiver);
1778 }
1779 dbg_remove_files(&udc->gadget.dev);
1780 device_unregister(&udc->gadget.dev);
1781 /* my kobject is dynamic, I swear! */
1782 memset(&udc->gadget, 0, sizeof(udc->gadget));
1783}
1784
1785/**
1786 * ci_hdrc_gadget_init - initialize device related bits
1787 * ci: the controller
1788 *
1789 * This function enables the gadget role, if the device is "device capable".
1790 */
1791int ci_hdrc_gadget_init(struct ci13xxx *ci)
1792{
1793 struct ci_role_driver *rdrv;
1794
1795 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1796 return -ENXIO;
1797
1798 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1799 if (!rdrv)
1800 return -ENOMEM;
1801
1802 rdrv->start = udc_start;
1803 rdrv->stop = udc_stop;
1804 rdrv->irq = udc_irq;
1805 rdrv->name = "gadget";
1806 ci->roles[CI_ROLE_GADGET] = rdrv;
1807
1808 return 0;
1809}
diff --git a/drivers/usb/chipidea/udc.h b/drivers/usb/chipidea/udc.h
new file mode 100644
index 000000000000..4ff2384d7ca8
--- /dev/null
+++ b/drivers/usb/chipidea/udc.h
@@ -0,0 +1,93 @@
1/*
2 * udc.h - ChipIdea UDC structures
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __DRIVERS_USB_CHIPIDEA_UDC_H
14#define __DRIVERS_USB_CHIPIDEA_UDC_H
15
16#include <linux/list.h>
17
18#define CTRL_PAYLOAD_MAX 64
19#define RX 0 /* similar to USB_DIR_OUT but can be used as an index */
20#define TX 1 /* similar to USB_DIR_IN but can be used as an index */
21
22/* DMA layout of transfer descriptors */
23struct ci13xxx_td {
24 /* 0 */
25 u32 next;
26#define TD_TERMINATE BIT(0)
27#define TD_ADDR_MASK (0xFFFFFFEUL << 5)
28 /* 1 */
29 u32 token;
30#define TD_STATUS (0x00FFUL << 0)
31#define TD_STATUS_TR_ERR BIT(3)
32#define TD_STATUS_DT_ERR BIT(5)
33#define TD_STATUS_HALTED BIT(6)
34#define TD_STATUS_ACTIVE BIT(7)
35#define TD_MULTO (0x0003UL << 10)
36#define TD_IOC BIT(15)
37#define TD_TOTAL_BYTES (0x7FFFUL << 16)
38 /* 2 */
39 u32 page[5];
40#define TD_CURR_OFFSET (0x0FFFUL << 0)
41#define TD_FRAME_NUM (0x07FFUL << 0)
42#define TD_RESERVED_MASK (0x0FFFUL << 0)
43} __attribute__ ((packed));
44
45/* DMA layout of queue heads */
46struct ci13xxx_qh {
47 /* 0 */
48 u32 cap;
49#define QH_IOS BIT(15)
50#define QH_MAX_PKT (0x07FFUL << 16)
51#define QH_ZLT BIT(29)
52#define QH_MULT (0x0003UL << 30)
53 /* 1 */
54 u32 curr;
55 /* 2 - 8 */
56 struct ci13xxx_td td;
57 /* 9 */
58 u32 RESERVED;
59 struct usb_ctrlrequest setup;
60} __attribute__ ((packed));
61
62/**
63 * struct ci13xxx_req - usb request representation
64 * @req: request structure for gadget drivers
65 * @queue: link to QH list
66 * @ptr: transfer descriptor for this request
67 * @dma: dma address for the transfer descriptor
68 * @zptr: transfer descriptor for the zero packet
69 * @zdma: dma address of the zero packet's transfer descriptor
70 */
71struct ci13xxx_req {
72 struct usb_request req;
73 struct list_head queue;
74 struct ci13xxx_td *ptr;
75 dma_addr_t dma;
76 struct ci13xxx_td *zptr;
77 dma_addr_t zdma;
78};
79
80#ifdef CONFIG_USB_CHIPIDEA_UDC
81
82int ci_hdrc_gadget_init(struct ci13xxx *ci);
83
84#else
85
86static inline int ci_hdrc_gadget_init(struct ci13xxx *ci)
87{
88 return -ENXIO;
89}
90
91#endif
92
93#endif /* __DRIVERS_USB_CHIPIDEA_UDC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-14 19:21:46 -0400