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authorFabio Estevam <fabio.estevam@freescale.com>2014-05-03 21:24:39 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-05-22 22:36:43 -0400
commit33f92a8a926761bfe23d740851d218c0c4eb6463 (patch)
tree532193eb79fac6fdb7b17c31bc27a8f2290a382b /drivers/usb/chipidea
parentbe6b0c1bd0be7a4f4d75ab40965abf1bd2d9a591 (diff)
chipidea: usbmisc_imx: Allow USB OTG to work on mx51
The field PLLDIVVALUE of register PHY_CTRL_1 selects the reference clock source for the PHY: 00 = sysclock uses 19.2 MHz 01 = sysclock uses 24 MHz 10 = sysclock uses 26 MHz 11 = sysclock uses 27 MHz The reset value for this field is 10 according to the reference manual, and even though this reset value works for mx53, it does not work for mx51. So instead of relying on the reset value for the PLLDIVVALUE field, explicitly set it to 01 so that a 24MHz clock can be selected for the PHY and allowing both mx51 and mx53 to have USB OTG port functional. Succesfully tested 'g_ether' on a imx51-babbage and on a imx53-qsb boards. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/chipidea')
-rw-r--r--drivers/usb/chipidea/usbmisc_imx.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c
index 419b8959d150..85293b8b1df9 100644
--- a/drivers/usb/chipidea/usbmisc_imx.c
+++ b/drivers/usb/chipidea/usbmisc_imx.c
@@ -46,11 +46,14 @@
46#define MX27_OTG_PM_BIT BIT(24) 46#define MX27_OTG_PM_BIT BIT(24)
47 47
48#define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08 48#define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
49#define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c
49#define MX53_USB_UH2_CTRL_OFFSET 0x14 50#define MX53_USB_UH2_CTRL_OFFSET 0x14
50#define MX53_USB_UH3_CTRL_OFFSET 0x18 51#define MX53_USB_UH3_CTRL_OFFSET 0x18
51#define MX53_BM_OVER_CUR_DIS_H1 BIT(5) 52#define MX53_BM_OVER_CUR_DIS_H1 BIT(5)
52#define MX53_BM_OVER_CUR_DIS_OTG BIT(8) 53#define MX53_BM_OVER_CUR_DIS_OTG BIT(8)
53#define MX53_BM_OVER_CUR_DIS_UHx BIT(30) 54#define MX53_BM_OVER_CUR_DIS_UHx BIT(30)
55#define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
56#define MX53_USB_PLL_DIV_24_MHZ 0x01
54 57
55#define MX6_BM_OVER_CUR_DIS BIT(7) 58#define MX6_BM_OVER_CUR_DIS BIT(7)
56 59
@@ -164,6 +167,13 @@ static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
164 if (data->index > 3) 167 if (data->index > 3)
165 return -EINVAL; 168 return -EINVAL;
166 169
170 /* Select a 24 MHz reference clock for the PHY */
171 reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET;
172 val = readl(reg);
173 val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK;
174 val |= MX53_USB_PLL_DIV_24_MHZ;
175 writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
176
167 if (data->disable_oc) { 177 if (data->disable_oc) {
168 spin_lock_irqsave(&usbmisc->lock, flags); 178 spin_lock_irqsave(&usbmisc->lock, flags);
169 switch (data->index) { 179 switch (data->index) {