diff options
author | Li Jun <b47624@freescale.com> | 2014-04-23 03:56:38 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-04-24 15:56:34 -0400 |
commit | 0c33bf781a0da4bdab207ccc323c9afa940852af (patch) | |
tree | 944dc5e1c996ff80edce93442ec462be3fedfbfa /drivers/usb/chipidea/core.c | |
parent | d03cccff9c768342d9576dde744ab3acb69d3ad4 (diff) |
usb: chipidea: operate on otgsc register in a general way
Use a more general way to read and write otgsc register.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/chipidea/core.c')
-rw-r--r-- | drivers/usb/chipidea/core.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c index 1cd5d0ba587c..f0cfa5b64bf1 100644 --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c | |||
@@ -393,7 +393,7 @@ static irqreturn_t ci_irq(int irq, void *data) | |||
393 | u32 otgsc = 0; | 393 | u32 otgsc = 0; |
394 | 394 | ||
395 | if (ci->is_otg) | 395 | if (ci->is_otg) |
396 | otgsc = hw_read(ci, OP_OTGSC, ~0); | 396 | otgsc = hw_read_otgsc(ci, ~0); |
397 | 397 | ||
398 | /* | 398 | /* |
399 | * Handle id change interrupt, it indicates device/host function | 399 | * Handle id change interrupt, it indicates device/host function |
@@ -401,7 +401,8 @@ static irqreturn_t ci_irq(int irq, void *data) | |||
401 | */ | 401 | */ |
402 | if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) { | 402 | if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) { |
403 | ci->id_event = true; | 403 | ci->id_event = true; |
404 | ci_clear_otg_interrupt(ci, OTGSC_IDIS); | 404 | /* Clear ID change irq status */ |
405 | hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS); | ||
405 | disable_irq_nosync(ci->irq); | 406 | disable_irq_nosync(ci->irq); |
406 | queue_work(ci->wq, &ci->work); | 407 | queue_work(ci->wq, &ci->work); |
407 | return IRQ_HANDLED; | 408 | return IRQ_HANDLED; |
@@ -413,7 +414,8 @@ static irqreturn_t ci_irq(int irq, void *data) | |||
413 | */ | 414 | */ |
414 | if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) { | 415 | if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) { |
415 | ci->b_sess_valid_event = true; | 416 | ci->b_sess_valid_event = true; |
416 | ci_clear_otg_interrupt(ci, OTGSC_BSVIS); | 417 | /* Clear BSV irq */ |
418 | hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS); | ||
417 | disable_irq_nosync(ci->irq); | 419 | disable_irq_nosync(ci->irq); |
418 | queue_work(ci->wq, &ci->work); | 420 | queue_work(ci->wq, &ci->work); |
419 | return IRQ_HANDLED; | 421 | return IRQ_HANDLED; |
@@ -535,8 +537,9 @@ static void ci_get_otg_capable(struct ci_hdrc *ci) | |||
535 | == (DCCPARAMS_DC | DCCPARAMS_HC)); | 537 | == (DCCPARAMS_DC | DCCPARAMS_HC)); |
536 | if (ci->is_otg) { | 538 | if (ci->is_otg) { |
537 | dev_dbg(ci->dev, "It is OTG capable controller\n"); | 539 | dev_dbg(ci->dev, "It is OTG capable controller\n"); |
538 | ci_disable_otg_interrupt(ci, OTGSC_INT_EN_BITS); | 540 | /* Disable and clear all OTG irq */ |
539 | ci_clear_otg_interrupt(ci, OTGSC_INT_STATUS_BITS); | 541 | hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS, |
542 | OTGSC_INT_STATUS_BITS); | ||
540 | } | 543 | } |
541 | } | 544 | } |
542 | 545 | ||
@@ -648,7 +651,8 @@ static int ci_hdrc_probe(struct platform_device *pdev) | |||
648 | */ | 651 | */ |
649 | mdelay(2); | 652 | mdelay(2); |
650 | ci->role = ci_otg_role(ci); | 653 | ci->role = ci_otg_role(ci); |
651 | ci_enable_otg_interrupt(ci, OTGSC_IDIE); | 654 | /* Enable ID change irq */ |
655 | hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE); | ||
652 | } else { | 656 | } else { |
653 | /* | 657 | /* |
654 | * If the controller is not OTG capable, but support | 658 | * If the controller is not OTG capable, but support |