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authorPavel Machek <pavel@ucw.cz>2014-12-11 16:44:26 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-01-09 17:10:46 -0500
commitfbf7ebe4d9faf2225d15edb9ebc66bf99800776a (patch)
tree05a1609e472b6c0c99bbcff4720f0a5c892d5c83 /drivers/tty
parent00648d0282dcca1da453c0b20d27e24bf901a854 (diff)
trivial fixes for omap-serial
Trivial fixes for omap-serial. Signed-off-by: Pavel Machek <pavel@ucw.cz> index 18c30ca..f43ed2c 100644 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/omap-serial.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 2e1073da6719..b1cf9a3b673a 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -63,7 +63,7 @@
63#define UART_ERRATA_i202_MDR1_ACCESS BIT(0) 63#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
64#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1) 64#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
65 65
66#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ 66#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz */
67 67
68/* SCR register bitmasks */ 68/* SCR register bitmasks */
69#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 69#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
@@ -93,7 +93,7 @@
93/* WER = 0x7F 93/* WER = 0x7F
94 * Enable module level wakeup in WER reg 94 * Enable module level wakeup in WER reg
95 */ 95 */
96#define OMAP_UART_WER_MOD_WKUP 0X7F 96#define OMAP_UART_WER_MOD_WKUP 0x7F
97 97
98/* Enable XON/XOFF flow control on output */ 98/* Enable XON/XOFF flow control on output */
99#define OMAP_UART_SW_TX 0x08 99#define OMAP_UART_SW_TX 0x08
@@ -114,7 +114,7 @@ struct uart_omap_dma {
114 dma_addr_t tx_buf_dma_phys; 114 dma_addr_t tx_buf_dma_phys;
115 unsigned int uart_base; 115 unsigned int uart_base;
116 /* 116 /*
117 * Buffer for rx dma.It is not required for tx because the buffer 117 * Buffer for rx dma. It is not required for tx because the buffer
118 * comes from port structure. 118 * comes from port structure.
119 */ 119 */
120 unsigned char *rx_buf; 120 unsigned char *rx_buf;
@@ -151,7 +151,7 @@ struct uart_omap_port {
151 int use_dma; 151 int use_dma;
152 /* 152 /*
153 * Some bits in registers are cleared on a read, so they must 153 * Some bits in registers are cleared on a read, so they must
154 * be saved whenever the register is read but the bits will not 154 * be saved whenever the register is read, but the bits will not
155 * be immediately processed. 155 * be immediately processed.
156 */ 156 */
157 unsigned int lsr_break_flag; 157 unsigned int lsr_break_flag;