diff options
author | Jiada Wang <jiada_wang@mentor.com> | 2014-12-09 04:11:34 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-01-09 17:23:59 -0500 |
commit | 6f026d6b7cb6e019b6352ed7fb71497c787fd6d7 (patch) | |
tree | 9e3f044676513231a4a2471a6279f1aeda822256 /drivers/tty | |
parent | ee5e7c1091a703c6a465d8145e9b55e09adb6f37 (diff) |
serial: imx: Enable UCR4_OREN in startup interface
Other than enable Receiver Overrun Interrupt Enable (UCR4_OREN)
in start_tx interface, UCR4_OREN should be enabled before enable
of Receiver.
Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r-- | drivers/tty/serial/imx.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index d61b89e4a96e..79f485b99c3f 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c | |||
@@ -611,13 +611,6 @@ static void imx_start_tx(struct uart_port *port) | |||
611 | temp &= ~(UCR1_RRDYEN); | 611 | temp &= ~(UCR1_RRDYEN); |
612 | writel(temp, sport->port.membase + UCR1); | 612 | writel(temp, sport->port.membase + UCR1); |
613 | } | 613 | } |
614 | /* Clear any pending ORE flag before enabling interrupt */ | ||
615 | temp = readl(sport->port.membase + USR2); | ||
616 | writel(temp | USR2_ORE, sport->port.membase + USR2); | ||
617 | |||
618 | temp = readl(sport->port.membase + UCR4); | ||
619 | temp |= UCR4_OREN; | ||
620 | writel(temp, sport->port.membase + UCR4); | ||
621 | 614 | ||
622 | if (!sport->dma_is_enabled) { | 615 | if (!sport->dma_is_enabled) { |
623 | temp = readl(sport->port.membase + UCR1); | 616 | temp = readl(sport->port.membase + UCR1); |
@@ -1178,6 +1171,14 @@ static int imx_startup(struct uart_port *port) | |||
1178 | 1171 | ||
1179 | writel(temp, sport->port.membase + UCR1); | 1172 | writel(temp, sport->port.membase + UCR1); |
1180 | 1173 | ||
1174 | /* Clear any pending ORE flag before enabling interrupt */ | ||
1175 | temp = readl(sport->port.membase + USR2); | ||
1176 | writel(temp | USR2_ORE, sport->port.membase + USR2); | ||
1177 | |||
1178 | temp = readl(sport->port.membase + UCR4); | ||
1179 | temp |= UCR4_OREN; | ||
1180 | writel(temp, sport->port.membase + UCR4); | ||
1181 | |||
1181 | temp = readl(sport->port.membase + UCR2); | 1182 | temp = readl(sport->port.membase + UCR2); |
1182 | temp |= (UCR2_RXEN | UCR2_TXEN); | 1183 | temp |= (UCR2_RXEN | UCR2_TXEN); |
1183 | if (!sport->have_rtscts) | 1184 | if (!sport->have_rtscts) |