tty: serial: men_z135_uart: Fix driver for changes in hardware

16z135 IP Core has changed so the driver needs to be updated to respect
these changes. The following changes have been made:

* Don't invert the 16z135 modem status register when reading.
* Add module parameter to configure the (baud rate dependent) RX timeout.
  Character timeout in seconds = (timeout_reg * baud_reg * 4)/freq_reg.
* Enable the handling of UART core's automatic flow control feature.
  When AFE is active disable generation of modem status IRQs.
* Rework the handling of IRQs to be conform with newer FPGA versions and
  take precautions not to miss an interrupt because of the destructive read
  of the IIR register.
* Correct men_z135_handle_modem_status(), MSR is stat_reg[15:8] not
  stat_reg[7:0]
* Correct calling of uart_handle_{dcd,cts}_change()
* Reset CLOCAL when CRTSCTS is set

Signed-off-by: Johannes Thumshirn <johannes.thumshirn@men.de>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 109 insertions, 46 deletions

diff --git a/drivers/tty/serial/men_z135_uart.c b/drivers/tty/serial/men_z135_uart.c
index 517cd073dc08..35c55505b3eb 100644
--- a/drivers/tty/serial/men_z135_uart.c
+++ b/drivers/tty/serial/men_z135_uart.c
@@ -23,7 +23,6 @@
 #define MEN_Z135_MAX_PORTS              12
 #define MEN_Z135_BASECLK                29491200
 #define MEN_Z135_FIFO_SIZE              1024
-#define MEN_Z135_NUM_MSI_VECTORS        2
 #define MEN_Z135_FIFO_WATERMARK         1020
 
 #define MEN_Z135_STAT_REG               0x0
@@ -34,12 +33,11 @@
 #define MEN_Z135_CONF_REG               0x808
 #define MEN_Z135_UART_FREQ              0x80c
 #define MEN_Z135_BAUD_REG               0x810
-#define MENZ135_TIMEOUT                 0x814
+#define MEN_Z135_TIMEOUT                0x814
 
 #define MEN_Z135_MEM_SIZE               0x818
 
-#define IS_IRQ(x) ((x) & 1)
-#define IRQ_ID(x) (((x) >> 1) & 7)
+#define IRQ_ID(x) ((x) & 0x1f)
 
 #define MEN_Z135_IER_RXCIEN BIT(0)              /* RX Space IRQ */
 #define MEN_Z135_IER_TXCIEN BIT(1)              /* TX Space IRQ */
@@ -94,11 +92,11 @@
 #define MEN_Z135_LSR_TEXP BIT(6)
 #define MEN_Z135_LSR_RXFIFOERR BIT(7)
 
-#define MEN_Z135_IRQ_ID_MST 0
-#define MEN_Z135_IRQ_ID_TSA 1
-#define MEN_Z135_IRQ_ID_RDA 2
-#define MEN_Z135_IRQ_ID_RLS 3
-#define MEN_Z135_IRQ_ID_CTI 6
+#define MEN_Z135_IRQ_ID_RLS BIT(0)
+#define MEN_Z135_IRQ_ID_RDA BIT(1)
+#define MEN_Z135_IRQ_ID_CTI BIT(2)
+#define MEN_Z135_IRQ_ID_TSA BIT(3)
+#define MEN_Z135_IRQ_ID_MST BIT(4)
 
 #define LCR(x) (((x) >> MEN_Z135_LCR_SHIFT) & 0xff)
 
@@ -118,12 +116,18 @@ static int align;
 module_param(align, int, S_IRUGO);
 MODULE_PARM_DESC(align, "Keep hardware FIFO write pointer aligned, default 0");
 
+static uint rx_timeout;
+module_param(rx_timeout, uint, S_IRUGO);
+MODULE_PARM_DESC(rx_timeout, "RX timeout. "
+                "Timeout in seconds = (timeout_reg * baud_reg * 4) / freq_reg");
+
 struct men_z135_port {
         struct uart_port port;
         struct mcb_device *mdev;
         unsigned char *rxbuf;
         u32 stat_reg;
         spinlock_t lock;
+        bool automode;
 };
 #define to_men_z135(port) container_of((port), struct men_z135_port, port)
 
@@ -180,12 +184,16 @@ static inline void men_z135_reg_clr(struct men_z135_port *uart,
  */
 static void men_z135_handle_modem_status(struct men_z135_port *uart)
 {
-        if (uart->stat_reg & MEN_Z135_MSR_DDCD)
+        u8 msr;
+
+        msr = (uart->stat_reg >> 8) & 0xff;
+
+        if (msr & MEN_Z135_MSR_DDCD)
                 uart_handle_dcd_change(&uart->port,
-                                uart->stat_reg & ~MEN_Z135_MSR_DCD);
-        if (uart->stat_reg & MEN_Z135_MSR_DCTS)
+                                msr & MEN_Z135_MSR_DCD);
+        if (msr & MEN_Z135_MSR_DCTS)
                 uart_handle_cts_change(&uart->port,
-                                uart->stat_reg & ~MEN_Z135_MSR_CTS);
+                                msr & MEN_Z135_MSR_CTS);
 }
 
 static void men_z135_handle_lsr(struct men_z135_port *uart)
@@ -322,7 +330,8 @@ static void men_z135_handle_tx(struct men_z135_port *uart)
 
         txfree = MEN_Z135_FIFO_WATERMARK - txc;
         if (txfree <= 0) {
-                pr_err("Not enough room in TX FIFO have %d, need %d\n",
+                dev_err(&uart->mdev->dev,
+                        "Not enough room in TX FIFO have %d, need %d\n",
                         txfree, qlen);
                 goto irq_en;
         }
@@ -373,43 +382,54 @@ out:
  * @irq: The IRQ number
  * @data: Pointer to UART port
  *
- * Check IIR register to see which tasklet to start.
+ * Check IIR register to find the cause of the interrupt and handle it.
+ * It is possible that multiple interrupts reason bits are set and reading
+ * the IIR is a destructive read, so we always need to check for all possible
+ * interrupts and handle them.
  */
 static irqreturn_t men_z135_intr(int irq, void *data)
 {
         struct men_z135_port *uart = (struct men_z135_port *)data;
         struct uart_port *port = &uart->port;
+        bool handled = false;
+        unsigned long flags;
         int irq_id;
 
         uart->stat_reg = ioread32(port->membase + MEN_Z135_STAT_REG);
-        /* IRQ pending is low active */
-        if (IS_IRQ(uart->stat_reg))
-                return IRQ_NONE;
-
         irq_id = IRQ_ID(uart->stat_reg);
-        switch (irq_id) {
-        case MEN_Z135_IRQ_ID_MST:
-                men_z135_handle_modem_status(uart);
-                break;
-        case MEN_Z135_IRQ_ID_TSA:
-                men_z135_handle_tx(uart);
-                break;
-        case MEN_Z135_IRQ_ID_CTI:
-                dev_dbg(&uart->mdev->dev, "Character Timeout Indication\n");
-                /* Fallthrough */
-        case MEN_Z135_IRQ_ID_RDA:
-                /* Reading data clears RX IRQ */
-                men_z135_handle_rx(uart);
-                break;
-        case MEN_Z135_IRQ_ID_RLS:
+
+        if (!irq_id)
+                goto out;
+
+        spin_lock_irqsave(&port->lock, flags);
+        /* It's save to write to IIR[7:6] RXC[9:8] */
+        iowrite8(irq_id, port->membase + MEN_Z135_STAT_REG);
+
+        if (irq_id & MEN_Z135_IRQ_ID_RLS) {
                 men_z135_handle_lsr(uart);
-                break;
-        default:
-                dev_warn(&uart->mdev->dev, "Unknown IRQ id %d\n", irq_id);
-                return IRQ_NONE;
+                handled = true;
+        }
+
+        if (irq_id & (MEN_Z135_IRQ_ID_RDA | MEN_Z135_IRQ_ID_CTI)) {
+                if (irq_id & MEN_Z135_IRQ_ID_CTI)
+                        dev_dbg(&uart->mdev->dev, "Character Timeout Indication\n");
+                men_z135_handle_rx(uart);
+                handled = true;
+        }
+
+        if (irq_id & MEN_Z135_IRQ_ID_TSA) {
+                men_z135_handle_tx(uart);
+                handled = true;
         }
 
-        return IRQ_HANDLED;
+        if (irq_id & MEN_Z135_IRQ_ID_MST) {