serial: 8250_pci: add Intel Tangier support

Intel Tangier contains 4 HSUART ports as found on Intel Edison board which are
8250 compatible. The patch adds necessary bits to the driver.

Note that the HSU port0 is currently unavailable and thus not supported.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 49 insertions, 0 deletions

diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 0be8dd84f9dc..98e5a6d9cfef 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1540,6 +1540,14 @@ static void intel_mid_set_termios(struct uart_port *p,
 
         serial8250_do_set_termios(p, termios, old);
 }
+
+static void intel_mid_set_termios_38_4M(struct uart_port *p,
+                                        struct ktermios *termios,
+                                        struct ktermios *old)
+{
+        intel_mid_set_termios(p, termios, old, 38400000);
+}
+
 static void intel_mid_set_termios_50M(struct uart_port *p,
                                       struct ktermios *termios,
                                       struct ktermios *old)
@@ -1636,6 +1644,27 @@ static int pnw_serial_setup(struct serial_private *priv,
         return intel_mid_serial_setup(priv, board, port, idx, index, dma_dev);
 }
 
+#define PCI_DEVICE_ID_INTEL_TNG_UART    0x1191
+
+static int tng_serial_setup(struct serial_private *priv,
+                            const struct pciserial_board *board,
+                            struct uart_8250_port *port, int idx)
+{
+        struct pci_dev *pdev = priv->dev;
+        struct pci_dev *dma_dev;
+        int index = PCI_FUNC(pdev->devfn);
+
+        /* Currently no support for HSU port0 */
+        if (index-- == 0)
+                return -ENODEV;
+
+        dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
+
+        port->port.set_termios = intel_mid_set_termios_38_4M;
+
+        return intel_mid_serial_setup(priv, board, port, idx, index, dma_dev);
+}
+
 static int
 pci_omegapci_setup(struct serial_private *priv,
                       const struct pciserial_board *board,
@@ -2114,6 +2143,13 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
         },
         {
                 .vendor         = PCI_VENDOR_ID_INTEL,
+                .device         = PCI_DEVICE_ID_INTEL_TNG_UART,
+                .subvendor      = PCI_ANY_ID,
+                .subdevice      = PCI_ANY_ID,
+                .setup          = tng_serial_setup,
+        },
+        {
+                .vendor         = PCI_VENDOR_ID_INTEL,
                 .device         = PCI_DEVICE_ID_INTEL_BSW_UART1,
                 .subvendor      = PCI_ANY_ID,
                 .subdevice      = PCI_ANY_ID,
@@ -2990,6 +3026,7 @@ enum pci_board_num_t {
         pbn_ce4100_1_115200,
         pbn_byt,
         pbn_pnw,
+        pbn_tng,
         pbn_qrk,
         pbn_omegapci,
         pbn_NETMOS9900_2s_115200,
@@ -3761,6 +3798,11 @@ static struct pciserial_board pci_boards[] = {
                 .num_ports      = 1,
                 .base_baud      = 115200,
         },
+        [pbn_tng] = {
+                .flags          = FL_BASE0,
+                .num_ports      = 1,
+                .base_baud      = 1843200,
+        },
         [pbn_qrk] = {
                 .flags          = FL_BASE0,
                 .num_ports      = 1,
@@ -5507,6 +5549,13 @@ static struct pci_device_id serial_pci_tbl[] = {
                 pbn_pnw},
 
         /*
+         * Intel Tangier
+         */
+        {       PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TNG_UART,
+                PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+                pbn_tng},
+
+        /*
          * Intel Quark x1000
          */
         {       PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_UART,