x86: ce4100: allow second UART usage

The current CE4100 and 8250_pci code have both a limitation preventing the
registration and usage of CE4100's second UART. This patch changes the
platform code fixing up the UART port to work on a relative UART port
base address, as well as the 8250_pci code to make it register 2 UART ports
for CE4100 and pass the port index down to all consumers.

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 3 insertions, 3 deletions

diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 17b7d26abf41..cec8852dd1b6 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1068,7 +1068,7 @@ ce4100_serial_setup(struct serial_private *priv,
 {
         int ret;
 
-        ret = setup_port(priv, port, 0, 0, board->reg_shift);
+        ret = setup_port(priv, port, idx, 0, board->reg_shift);
         port->port.iotype = UPIO_MEM32;
         port->port.type = PORT_XSCALE;
         port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE);
@@ -2658,8 +2658,8 @@ static struct pciserial_board pci_boards[] __devinitdata = {
                 .first_offset   = 0x1000,
         },
         [pbn_ce4100_1_115200] = {
-                .flags          = FL_BASE0,
-                .num_ports      = 1,
+                .flags          = FL_BASE_BARS,
+                .num_ports      = 2,
                 .base_baud      = 921600,
                 .reg_shift      = 2,
         },