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| author | Tony Lindgren <tony@atomide.com> | 2012-09-23 22:31:35 -0400 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2012-09-23 22:31:35 -0400 |
| commit | 9cd68fa707cf6372f33eb51a5719dd7626efe5f6 (patch) | |
| tree | 66cde27bd288e011a6e4cff87d342666399a1266 /drivers/tty/serial/m32r_sio.c | |
| parent | 5698bd757d55b1bb87edd1a9744ab09c142abfc2 (diff) | |
| parent | 76a5d9bfc42d60e9a672e0cae776157a60970f4e (diff) | |
Merge tag 'omap-devel-b-c-2-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-late
OMAP patches intended for the 3.7 merge window:
- Runtime PM conversions for the GPMC and RNG IP blocks
- Preparation patches for the OMAP common clock framework conversion
- clkdev alias additions required by other drivers
- Performance Monitoring Unit (PMU) support for OMAP2, 3, and non-4430 OMAP4
- OMAP hwmod code and data improvements
- Preparation patches for the IOMMU runtime PM conversion
- Preparation patches for OMAP4 full-chip retention support
Based on a merge of v3.6-rc6, the omap-cleanup-b-for-3.7 tag
(7852ec0536ca39cefffc6301dc77f8ae55592926),the cleanup-fixes-for-v3.7
tag (de6ca33a96a6bf61fcb91d3d399703e19ead9d1e), and the
omap-devel-am33xx-for-v3.7 tag
(11964f53eb4d9ce59a058be9999d9cfcb1ced878), due to dependencies.
These patches have been tested for meaningful warnings from
checkpatch, sparse, smatch, and cppcheck. Basic build, boot[1], and
PM test logs are available here:
http://www.pwsan.com/omap/testlogs/hwmod_prcm_clock_a_3.7/20120923173830/
...
1. Note that the N800 boot fails due to a known issue present in the
base commit:
http://www.spinics.net/lists/arm-kernel/msg196034.html
Diffstat (limited to 'drivers/tty/serial/m32r_sio.c')
| -rw-r--r-- | drivers/tty/serial/m32r_sio.c | 36 |
1 files changed, 2 insertions, 34 deletions
diff --git a/drivers/tty/serial/m32r_sio.c b/drivers/tty/serial/m32r_sio.c index a0703624d5e5..b13949ad3408 100644 --- a/drivers/tty/serial/m32r_sio.c +++ b/drivers/tty/serial/m32r_sio.c | |||
| @@ -44,8 +44,6 @@ | |||
| 44 | #include <asm/io.h> | 44 | #include <asm/io.h> |
| 45 | #include <asm/irq.h> | 45 | #include <asm/irq.h> |
| 46 | 46 | ||
| 47 | #define PORT_M32R_BASE PORT_M32R_SIO | ||
| 48 | #define PORT_INDEX(x) (x - PORT_M32R_BASE + 1) | ||
| 49 | #define BAUD_RATE 115200 | 47 | #define BAUD_RATE 115200 |
| 50 | 48 | ||
| 51 | #include <linux/serial_core.h> | 49 | #include <linux/serial_core.h> |
| @@ -132,22 +130,6 @@ struct irq_info { | |||
| 132 | 130 | ||
| 133 | static struct irq_info irq_lists[NR_IRQS]; | 131 | static struct irq_info irq_lists[NR_IRQS]; |
| 134 | 132 | ||
| 135 | /* | ||
| 136 | * Here we define the default xmit fifo size used for each type of UART. | ||
| 137 | */ | ||
| 138 | static const struct serial_uart_config uart_config[] = { | ||
| 139 | [PORT_UNKNOWN] = { | ||
| 140 | .name = "unknown", | ||
| 141 | .dfl_xmit_fifo_size = 1, | ||
| 142 | .flags = 0, | ||
| 143 | }, | ||
| 144 | [PORT_INDEX(PORT_M32R_SIO)] = { | ||
| 145 | .name = "M32RSIO", | ||
| 146 | .dfl_xmit_fifo_size = 1, | ||
| 147 | .flags = 0, | ||
| 148 | }, | ||
| 149 | }; | ||
| 150 | |||
| 151 | #ifdef CONFIG_SERIAL_M32R_PLDSIO | 133 | #ifdef CONFIG_SERIAL_M32R_PLDSIO |
| 152 | 134 | ||
| 153 | #define __sio_in(x) inw((unsigned long)(x)) | 135 | #define __sio_in(x) inw((unsigned long)(x)) |
| @@ -907,8 +889,7 @@ static void m32r_sio_config_port(struct uart_port *port, int unused) | |||
| 907 | 889 | ||
| 908 | spin_lock_irqsave(&up->port.lock, flags); | 890 | spin_lock_irqsave(&up->port.lock, flags); |
| 909 | 891 | ||
| 910 | up->port.type = (PORT_M32R_SIO - PORT_M32R_BASE + 1); | 892 | up->port.fifosize = 1; |
| 911 | up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size; | ||
| 912 | 893 | ||
| 913 | spin_unlock_irqrestore(&up->port.lock, flags); | 894 | spin_unlock_irqrestore(&up->port.lock, flags); |
| 914 | } | 895 | } |
| @@ -916,23 +897,11 @@ static void m32r_sio_config_port(struct uart_port *port, int unused) | |||
| 916 | static int | 897 | static int |
| 917 | m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser) | 898 | m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser) |
| 918 | { | 899 | { |
| 919 | if (ser->irq >= nr_irqs || ser->irq < 0 || | 900 | if (ser->irq >= nr_irqs || ser->irq < 0 || ser->baud_base < 9600) |
| 920 | ser->baud_base < 9600 || ser->type < PORT_UNKNOWN || | ||
| 921 | ser->type >= ARRAY_SIZE(uart_config)) | ||
| 922 | return -EINVAL; | 901 | return -EINVAL; |
| 923 | return 0; | 902 | return 0; |
| 924 | } | 903 | } |
| 925 | 904 | ||
| 926 | static const char * | ||
| 927 | m32r_sio_type(struct uart_port *port) | ||
| 928 | { | ||
| 929 | int type = port->type; | ||
| 930 | |||
| 931 | if (type >= ARRAY_SIZE(uart_config)) | ||
| 932 | type = 0; | ||
| 933 | return uart_config[type].name; | ||
| 934 | } | ||
| 935 | |||
| 936 | static struct uart_ops m32r_sio_pops = { | 905 | static struct uart_ops m32r_sio_pops = { |
| 937 | .tx_empty = m32r_sio_tx_empty, | 906 | .tx_empty = m32r_sio_tx_empty, |
| 938 | .set_mctrl = m32r_sio_set_mctrl, | 907 | .set_mctrl = m32r_sio_set_mctrl, |
| @@ -946,7 +915,6 @@ static struct uart_ops m32r_sio_pops = { | |||
| 946 | .shutdown = m32r_sio_shutdown, | 915 | .shutdown = m32r_sio_shutdown, |
| 947 | .set_termios = m32r_sio_set_termios, | 916 | .set_termios = m32r_sio_set_termios, |
| 948 | .pm = m32r_sio_pm, | 917 | .pm = m32r_sio_pm, |
| 949 | .type = m32r_sio_type, | ||
| 950 | .release_port = m32r_sio_release_port, | 918 | .release_port = m32r_sio_release_port, |
| 951 | .request_port = m32r_sio_request_port, | 919 | .request_port = m32r_sio_request_port, |
| 952 | .config_port = m32r_sio_config_port, | 920 | .config_port = m32r_sio_config_port, |
