aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/tty/serial/8250
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2015-04-21 12:33:10 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2015-04-21 12:33:10 -0400
commit41d5e08ea86af3359239d5a6f7021cdc61beaa49 (patch)
tree58ad584b29d097dfa3b5d7bc5e61370d676610a9 /drivers/tty/serial/8250
parent8d582b94291b40dbb5961f99172ee8ebfafd4c9c (diff)
parent5dbc32a88f1e73f244e6134fc119dd4d60a398c0 (diff)
Merge tag 'tty-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial updates from Greg KH: "Here's the big tty/serial driver update for 4.1-rc1. It was delayed for a bit due to some questions surrounding some of the console command line parsing changes that are in here. There's still one tiny regression for people who were previously putting multiple console command lines and expecting them all to be ignored for some odd reason, but Peter is working on fixing that. If not, I'll send a revert for the offending patch, but I have faith that Peter can address it. Other than the console work here, there's the usual serial driver updates and changes, and a buch of 8250 reworks to try to make that driver easier to maintain over time, and have it support more devices in the future. All of these have been in linux-next for a while" * tag 'tty-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (119 commits) n_gsm: Drop unneeded cast on netdev_priv sc16is7xx: expose RTS inversion in RS-485 mode serial: 8250_pci: port failed after wakeup from S3 earlycon: 8250: Document kernel command line options earlycon: 8250: Fix command line regression earlycon: Fix __earlycon_table stride tty: clean up the tty time logic a bit serial: 8250_dw: only get the clock rate in one place serial: 8250_dw: remove useless ACPI ID check dmaengine: hsu: move memory allocation to GFP_NOWAIT dmaengine: hsu: remove redundant pieces of code serial: 8250_pci: add Intel Tangier support dmaengine: hsu: add Intel Tangier PCI ID serial: 8250_pci: replace switch-case by formula for Intel MID serial: 8250_pci: replace switch-case by formula tty: cpm_uart: replace CONFIG_8xx by CONFIG_CPM1 serial: jsm: some off by one bugs serial: xuartps: Fix check in console_setup(). serial: xuartps: Get rid of register access macros. serial: xuartps: Fix iobase use. ...
Diffstat (limited to 'drivers/tty/serial/8250')
-rw-r--r--drivers/tty/serial/8250/8250.h23
-rw-r--r--drivers/tty/serial/8250/8250_core.c493
-rw-r--r--drivers/tty/serial/8250/8250_dw.c58
-rw-r--r--drivers/tty/serial/8250/8250_early.c69
-rw-r--r--drivers/tty/serial/8250/8250_em.c1
-rw-r--r--drivers/tty/serial/8250/8250_hp300.c1
-rw-r--r--drivers/tty/serial/8250/8250_omap.c1
-rw-r--r--drivers/tty/serial/8250/8250_pci.c414
-rw-r--r--drivers/tty/serial/8250/Kconfig1
9 files changed, 681 insertions, 380 deletions
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
index b00836851061..c43f74c53cd9 100644
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
@@ -21,7 +21,6 @@ struct uart_8250_dma {
21 21
22 /* Filter function */ 22 /* Filter function */
23 dma_filter_fn fn; 23 dma_filter_fn fn;
24
25 /* Parameter to the filter function */ 24 /* Parameter to the filter function */
26 void *rx_param; 25 void *rx_param;
27 void *tx_param; 26 void *tx_param;
@@ -53,7 +52,7 @@ struct old_serial_port {
53 unsigned int baud_base; 52 unsigned int baud_base;
54 unsigned int port; 53 unsigned int port;
55 unsigned int irq; 54 unsigned int irq;
56 unsigned int flags; 55 upf_t flags;
57 unsigned char hub6; 56 unsigned char hub6;
58 unsigned char io_type; 57 unsigned char io_type;
59 unsigned char __iomem *iomem_base; 58 unsigned char __iomem *iomem_base;
@@ -85,9 +84,6 @@ struct serial8250_config {
85#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */ 84#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
86#define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */ 85#define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
87 86
88#define PROBE_RSA (1 << 0)
89#define PROBE_ANY (~0)
90
91#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) 87#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
92 88
93#ifdef CONFIG_SERIAL_8250_SHARE_IRQ 89#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
@@ -198,3 +194,20 @@ static inline int serial8250_request_dma(struct uart_8250_port *p)
198} 194}
199static inline void serial8250_release_dma(struct uart_8250_port *p) { } 195static inline void serial8250_release_dma(struct uart_8250_port *p) { }
200#endif 196#endif
197
198static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
199{
200 unsigned char status;
201
202 status = serial_in(up, 0x04); /* EXCR2 */
203#define PRESL(x) ((x) & 0x30)
204 if (PRESL(status) == 0x10) {
205 /* already in high speed mode */
206 return 0;
207 } else {
208 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
209 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
210 serial_out(up, 0x04, status);
211 }
212 return 1;
213}
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index deae122c9c4b..422ebea96a64 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -31,7 +31,6 @@
31#include <linux/tty.h> 31#include <linux/tty.h>
32#include <linux/ratelimit.h> 32#include <linux/ratelimit.h>
33#include <linux/tty_flip.h> 33#include <linux/tty_flip.h>
34#include <linux/serial_core.h>
35#include <linux/serial.h> 34#include <linux/serial.h>
36#include <linux/serial_8250.h> 35#include <linux/serial_8250.h>
37#include <linux/nmi.h> 36#include <linux/nmi.h>
@@ -61,7 +60,7 @@ static struct uart_driver serial8250_reg;
61 60
62static int serial_index(struct uart_port *port) 61static int serial_index(struct uart_port *port)
63{ 62{
64 return (serial8250_reg.minor - 64) + port->line; 63 return port->minor - 64;
65} 64}
66 65
67static unsigned int skip_txen_test; /* force skip of txen test at init time */ 66static unsigned int skip_txen_test; /* force skip of txen test at init time */
@@ -358,34 +357,46 @@ static void default_serial_dl_write(struct uart_8250_port *up, int value)
358#if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X) 357#if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
359 358
360/* Au1x00/RT288x UART hardware has a weird register layout */ 359/* Au1x00/RT288x UART hardware has a weird register layout */
361static const u8 au_io_in_map[] = { 360static const s8 au_io_in_map[8] = {
362 [UART_RX] = 0, 361 0, /* UART_RX */
363 [UART_IER] = 2, 362 2, /* UART_IER */
364 [UART_IIR] = 3, 363 3, /* UART_IIR */
365 [UART_LCR] = 5, 364 5, /* UART_LCR */
366 [UART_MCR] = 6, 365 6, /* UART_MCR */
367 [UART_LSR] = 7, 366 7, /* UART_LSR */
368 [UART_MSR] = 8, 367 8, /* UART_MSR */
368 -1, /* UART_SCR (unmapped) */
369}; 369};
370 370
371static const u8 au_io_out_map[] = { 371static const s8 au_io_out_map[8] = {
372 [UART_TX] = 1, 372 1, /* UART_TX */
373 [UART_IER] = 2, 373 2, /* UART_IER */
374 [UART_FCR] = 4, 374 4, /* UART_FCR */
375 [UART_LCR] = 5, 375 5, /* UART_LCR */
376 [UART_MCR] = 6, 376 6, /* UART_MCR */
377 -1, /* UART_LSR (unmapped) */
378 -1, /* UART_MSR (unmapped) */
379 -1, /* UART_SCR (unmapped) */
377}; 380};
378 381
379static unsigned int au_serial_in(struct uart_port *p, int offset) 382static unsigned int au_serial_in(struct uart_port *p, int offset)
380{ 383{
381 offset = au_io_in_map[offset] << p->regshift; 384 if (offset >= ARRAY_SIZE(au_io_in_map))
382 return __raw_readl(p->membase + offset); 385 return UINT_MAX;
386 offset = au_io_in_map[offset];
387 if (offset < 0)
388 return UINT_MAX;
389 return __raw_readl(p->membase + (offset << p->regshift));
383} 390}
384 391
385static void au_serial_out(struct uart_port *p, int offset, int value) 392static void au_serial_out(struct uart_port *p, int offset, int value)
386{ 393{
387 offset = au_io_out_map[offset] << p->regshift; 394 if (offset >= ARRAY_SIZE(au_io_out_map))
388 __raw_writel(value, p->membase + offset); 395 return;
396 offset = au_io_out_map[offset];
397 if (offset < 0)
398 return;
399 __raw_writel(value, p->membase + (offset << p->regshift));
389} 400}
390 401
391/* Au1x00 haven't got a standard divisor latch */ 402/* Au1x00 haven't got a standard divisor latch */
@@ -895,7 +906,7 @@ static int broken_efr(struct uart_8250_port *up)
895 /* 906 /*
896 * Exar ST16C2550 "A2" devices incorrectly detect as 907 * Exar ST16C2550 "A2" devices incorrectly detect as
897 * having an EFR, and report an ID of 0x0201. See 908 * having an EFR, and report an ID of 0x0201. See
898 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html 909 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
899 */ 910 */
900 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16) 911 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
901 return 1; 912 return 1;
@@ -903,23 +914,6 @@ static int broken_efr(struct uart_8250_port *up)
903 return 0; 914 return 0;
904} 915}
905 916
906static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
907{
908 unsigned char status;
909
910 status = serial_in(up, 0x04); /* EXCR2 */
911#define PRESL(x) ((x) & 0x30)
912 if (PRESL(status) == 0x10) {
913 /* already in high speed mode */
914 return 0;
915 } else {
916 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
917 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
918 serial_out(up, 0x04, status);
919 }
920 return 1;
921}
922
923/* 917/*
924 * We know that the chip has FIFOs. Does it have an EFR? The 918 * We know that the chip has FIFOs. Does it have an EFR? The
925 * EFR is located in the same register position as the IIR and 919 * EFR is located in the same register position as the IIR and
@@ -1122,7 +1116,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
1122 * whether or not this UART is a 16550A or not, since this will 1116 * whether or not this UART is a 16550A or not, since this will
1123 * determine whether or not we can use its FIFO features or not. 1117 * determine whether or not we can use its FIFO features or not.
1124 */ 1118 */
1125static void autoconfig(struct uart_8250_port *up, unsigned int probeflags) 1119static void autoconfig(struct uart_8250_port *up)
1126{ 1120{
1127 unsigned char status1, scratch, scratch2, scratch3; 1121 unsigned char status1, scratch, scratch2, scratch3;
1128 unsigned char save_lcr, save_mcr; 1122 unsigned char save_lcr, save_mcr;
@@ -1245,22 +1239,15 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1245 /* 1239 /*
1246 * Only probe for RSA ports if we got the region. 1240 * Only probe for RSA ports if we got the region.
1247 */ 1241 */
1248 if (port->type == PORT_16550A && probeflags & PROBE_RSA) { 1242 if (port->type == PORT_16550A && up->probe & UART_PROBE_RSA &&
1249 int i; 1243 __enable_rsa(up))
1250 1244 port->type = PORT_RSA;
1251 for (i = 0 ; i < probe_rsa_count; ++i) {
1252 if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1253 port->type = PORT_RSA;
1254 break;
1255 }
1256 }
1257 }
1258#endif 1245#endif
1259 1246
1260 serial_out(up, UART_LCR, save_lcr); 1247 serial_out(up, UART_LCR, save_lcr);
1261 1248
1262 port->fifosize = uart_config[up->port.type].fifo_size; 1249 port->fifosize = uart_config[up->port.type].fifo_size;
1263 old_capabilities = up->capabilities; 1250 old_capabilities = up->capabilities;
1264 up->capabilities = uart_config[port->type].flags; 1251 up->capabilities = uart_config[port->type].flags;
1265 up->tx_loadsz = uart_config[port->type].tx_loadsz; 1252 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1266 1253
@@ -1907,6 +1894,48 @@ static void serial8250_backup_timeout(unsigned long data)
1907 jiffies + uart_poll_timeout(&up->port) + HZ / 5); 1894 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1908} 1895}
1909 1896
1897static int univ8250_setup_irq(struct uart_8250_port *up)
1898{
1899 struct uart_port *port = &up->port;
1900 int retval = 0;
1901
1902 /*
1903 * The above check will only give an accurate result the first time
1904 * the port is opened so this value needs to be preserved.
1905 */
1906 if (up->bugs & UART_BUG_THRE) {
1907 pr_debug("ttyS%d - using backup timer\n", serial_index(port));
1908
1909 up->timer.function = serial8250_backup_timeout;
1910 up->timer.data = (unsigned long)up;
1911 mod_timer(&up->timer, jiffies +
1912 uart_poll_timeout(port) + HZ / 5);
1913 }
1914
1915 /*
1916 * If the "interrupt" for this port doesn't correspond with any
1917 * hardware interrupt, we use a timer-based system. The original
1918 * driver used to do this with IRQ0.
1919 */
1920 if (!port->irq) {
1921 up->timer.data = (unsigned long)up;
1922 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
1923 } else
1924 retval = serial_link_irq_chain(up);
1925
1926 return retval;
1927}
1928
1929static void univ8250_release_irq(struct uart_8250_port *up)
1930{
1931 struct uart_port *port = &up->port;
1932
1933 del_timer_sync(&up->timer);
1934 up->timer.function = serial8250_timeout;
1935 if (port->irq)
1936 serial_unlink_irq_chain(up);
1937}
1938
1910static unsigned int serial8250_tx_empty(struct uart_port *port) 1939static unsigned int serial8250_tx_empty(struct uart_port *port)
1911{ 1940{
1912 struct uart_8250_port *up = up_to_u8250p(port); 1941 struct uart_8250_port *up = up_to_u8250p(port);
@@ -2211,35 +2240,12 @@ int serial8250_do_startup(struct uart_port *port)
2211 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) || 2240 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2212 up->port.flags & UPF_BUG_THRE) { 2241 up->port.flags & UPF_BUG_THRE) {
2213 up->bugs |= UART_BUG_THRE; 2242 up->bugs |= UART_BUG_THRE;
2214 pr_debug("ttyS%d - using backup timer\n",
2215 serial_index(port));
2216 } 2243 }
2217 } 2244 }
2218 2245
2219 /* 2246 retval = up->ops->setup_irq(up);
2220 * The above check will only give an accurate result the first time 2247 if (retval)
2221 * the port is opened so this value needs to be preserved. 2248 goto out;
2222 */
2223 if (up->bugs & UART_BUG_THRE) {
2224 up->timer.function = serial8250_backup_timeout;
2225 up->timer.data = (unsigned long)up;
2226 mod_timer(&up->timer, jiffies +
2227 uart_poll_timeout(port) + HZ / 5);
2228 }
2229
2230 /*
2231 * If the "interrupt" for this port doesn't correspond with any
2232 * hardware interrupt, we use a timer-based system. The original
2233 * driver used to do this with IRQ0.
2234 */
2235 if (!port->irq) {
2236 up->timer.data = (unsigned long)up;
2237 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2238 } else {
2239 retval = serial_link_irq_chain(up);
2240 if (retval)
2241 goto out;
2242 }
2243 2249
2244 /* 2250 /*
2245 * Now, initialize the UART 2251 * Now, initialize the UART
@@ -2270,7 +2276,7 @@ int serial8250_do_startup(struct uart_port *port)
2270 is variable. So, let's just don't test if we receive 2276 is variable. So, let's just don't test if we receive
2271 TX irq. This way, we'll never enable UART_BUG_TXEN. 2277 TX irq. This way, we'll never enable UART_BUG_TXEN.
2272 */ 2278 */
2273 if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST) 2279 if (up->port.flags & UPF_NO_TXEN_TEST)
2274 goto dont_test_tx_en; 2280 goto dont_test_tx_en;
2275 2281
2276 /* 2282 /*
@@ -2397,10 +2403,7 @@ void serial8250_do_shutdown(struct uart_port *port)
2397 serial_port_in(port, UART_RX); 2403 serial_port_in(port, UART_RX);
2398 serial8250_rpm_put(up); 2404 serial8250_rpm_put(up);
2399 2405
2400 del_timer_sync(&up->timer); 2406 up->ops->release_irq(up);
2401 up->timer.function = serial8250_timeout;
2402 if (port->irq)
2403 serial_unlink_irq_chain(up);
2404} 2407}
2405EXPORT_SYMBOL_GPL(serial8250_do_shutdown); 2408EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
2406 2409
@@ -2719,6 +2722,8 @@ serial8250_pm(struct uart_port *port, unsigned int state,
2719 2722
2720static unsigned int serial8250_port_size(struct uart_8250_port *pt) 2723static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2721{ 2724{
2725 if (pt->port.mapsize)
2726 return pt->port.mapsize;
2722 if (pt->port.iotype == UPIO_AU) { 2727 if (pt->port.iotype == UPIO_AU) {
2723 if (pt->port.type == PORT_RT2880) 2728 if (pt->port.type == PORT_RT2880)
2724 return 0x100; 2729 return 0x100;
@@ -2798,6 +2803,7 @@ static void serial8250_release_std_resource(struct uart_8250_port *up)
2798 } 2803 }
2799} 2804}
2800 2805
2806#ifdef CONFIG_SERIAL_8250_RSA
2801static int serial8250_request_rsa_resource(struct uart_8250_port *up) 2807static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2802{ 2808{
2803 unsigned long start = UART_RSA_BASE << up->port.regshift; 2809 unsigned long start = UART_RSA_BASE << up->port.regshift;
@@ -2832,14 +2838,13 @@ static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2832 break; 2838 break;
2833 } 2839 }
2834} 2840}
2841#endif
2835 2842
2836static void serial8250_release_port(struct uart_port *port) 2843static void serial8250_release_port(struct uart_port *port)
2837{ 2844{
2838 struct uart_8250_port *up = up_to_u8250p(port); 2845 struct uart_8250_port *up = up_to_u8250p(port);
2839 2846
2840 serial8250_release_std_resource(up); 2847 serial8250_release_std_resource(up);
2841 if (port->type == PORT_RSA)
2842 serial8250_release_rsa_resource(up);
2843} 2848}
2844 2849
2845static int serial8250_request_port(struct uart_port *port) 2850static int serial8250_request_port(struct uart_port *port)
@@ -2851,11 +2856,6 @@ static int serial8250_request_port(struct uart_port *port)
2851 return -ENODEV; 2856 return -ENODEV;
2852 2857
2853 ret = serial8250_request_std_resource(up); 2858 ret = serial8250_request_std_resource(up);
2854 if (ret == 0 && port->type == PORT_RSA) {
2855 ret = serial8250_request_rsa_resource(up);
2856 if (ret < 0)
2857 serial8250_release_std_resource(up);
2858 }
2859 2859
2860 return ret; 2860 return ret;
2861} 2861}
@@ -3003,7 +3003,6 @@ static void register_dev_spec_attr_grp(struct uart_8250_port *up)
3003static void serial8250_config_port(struct uart_port *port, int flags) 3003static void serial8250_config_port(struct uart_port *port, int flags)
3004{ 3004{
3005 struct uart_8250_port *up = up_to_u8250p(port); 3005 struct uart_8250_port *up = up_to_u8250p(port);
3006 int probeflags = PROBE_ANY;
3007 int ret; 3006 int ret;
3008 3007
3009 if (port->type == PORT_8250_CIR) 3008 if (port->type == PORT_8250_CIR)
@@ -3017,15 +3016,11 @@ static void serial8250_config_port(struct uart_port *port, int flags)
3017 if (ret < 0) 3016 if (ret < 0)
3018 return; 3017 return;
3019 3018
3020 ret = serial8250_request_rsa_resource(up);
3021 if (ret < 0)
3022 probeflags &= ~PROBE_RSA;
3023
3024 if (port->iotype != up->cur_iotype) 3019 if (port->iotype != up->cur_iotype)
3025 set_io_from_upio(port); 3020 set_io_from_upio(port);
3026 3021
3027 if (flags & UART_CONFIG_TYPE) 3022 if (flags & UART_CONFIG_TYPE)
3028 autoconfig(up, probeflags); 3023 autoconfig(up);
3029 3024
3030 /* if access method is AU, it is a 16550 with a quirk */ 3025 /* if access method is AU, it is a 16550 with a quirk */
3031 if (port->type == PORT_16550A && port->iotype == UPIO_AU) 3026 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
@@ -3038,8 +3033,6 @@ static void serial8250_config_port(struct uart_port *port, int flags)
3038 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) 3033 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
3039 autoconfig_irq(up); 3034 autoconfig_irq(up);
3040 3035
3041 if (port->type != PORT_RSA && probeflags & PROBE_RSA)
3042 serial8250_release_rsa_resource(up);
3043 if (port->type == PORT_UNKNOWN) 3036 if (port->type == PORT_UNKNOWN)
3044 serial8250_release_std_resource(up); 3037 serial8250_release_std_resource(up);
3045 3038
@@ -3073,7 +3066,7 @@ serial8250_type(struct uart_port *port)
3073 return uart_config[type].name; 3066 return uart_config[type].name;
3074} 3067}
3075 3068
3076static struct uart_ops serial8250_pops = { 3069static const struct uart_ops serial8250_pops = {
3077 .tx_empty = serial8250_tx_empty, 3070 .tx_empty = serial8250_tx_empty,
3078 .set_mctrl = serial8250_set_mctrl, 3071 .set_mctrl = serial8250_set_mctrl,
3079 .get_mctrl = serial8250_get_mctrl, 3072 .get_mctrl = serial8250_get_mctrl,
@@ -3100,6 +3093,14 @@ static struct uart_ops serial8250_pops = {
3100#endif 3093#endif
3101}; 3094};
3102 3095
3096static const struct uart_ops *base_ops;
3097static struct uart_ops univ8250_port_ops;
3098
3099static const struct uart_8250_ops univ8250_driver_ops = {
3100 .setup_irq = univ8250_setup_irq,
3101 .release_irq = univ8250_release_irq,
3102};
3103
3103static struct uart_8250_port serial8250_ports[UART_NR]; 3104static struct uart_8250_port serial8250_ports[UART_NR];
3104 3105
3105/** 3106/**
@@ -3130,6 +3131,105 @@ void serial8250_set_isa_configurator(
3130} 3131}
3131EXPORT_SYMBOL(serial8250_set_isa_configurator); 3132EXPORT_SYMBOL(serial8250_set_isa_configurator);
3132 3133
3134static void serial8250_init_port(struct uart_8250_port *up)
3135{
3136 struct uart_port *port = &up->port;
3137
3138 spin_lock_init(&port->lock);
3139 port->ops = &serial8250_pops;
3140
3141 up->cur_iotype = 0xFF;
3142}
3143
3144static void serial8250_set_defaults(struct uart_8250_port *up)
3145{
3146 struct uart_port *port = &up->port;
3147
3148 if (up->port.flags & UPF_FIXED_TYPE) {
3149 unsigned int type = up->port.type;
3150
3151 if (!up->port.fifosize)
3152 up->port.fifosize = uart_config[type].fifo_size;
3153 if (!up->tx_loadsz)
3154 up->tx_loadsz = uart_config[type].tx_loadsz;
3155 if (!up->capabilities)
3156 up->capabilities = uart_config[type].flags;
3157 }
3158
3159 set_io_from_upio(port);
3160
3161 /* default dma handlers */
3162 if (up->dma) {
3163 if (!up->dma->tx_dma)
3164 up->dma->tx_dma = serial8250_tx_dma;
3165 if (!up->dma->rx_dma)
3166 up->dma->rx_dma = serial8250_rx_dma;
3167 }
3168}
3169
3170#ifdef CONFIG_SERIAL_8250_RSA
3171
3172static void univ8250_config_port(struct uart_port *port, int flags)
3173{
3174 struct uart_8250_port *up = up_to_u8250p(port);
3175
3176 up->probe &= ~UART_PROBE_RSA;
3177 if (port->type == PORT_RSA) {
3178 if (serial8250_request_rsa_resource(up) == 0)
3179 up->probe |= UART_PROBE_RSA;
3180 } else if (flags & UART_CONFIG_TYPE) {
3181 int i;
3182
3183 for (i = 0; i < probe_rsa_count; i++) {
3184 if (probe_rsa[i] == up->port.iobase) {
3185 if (serial8250_request_rsa_resource(up) == 0)
3186 up->probe |= UART_PROBE_RSA;
3187 break;
3188 }
3189 }
3190 }
3191
3192 base_ops->config_port(port, flags);
3193
3194 if (port->type != PORT_RSA && up->probe & UART_PROBE_RSA)
3195 serial8250_release_rsa_resource(up);
3196}
3197
3198static int univ8250_request_port(struct uart_port *port)
3199{
3200 struct uart_8250_port *up = up_to_u8250p(port);
3201 int ret;
3202
3203 ret = base_ops->request_port(port);
3204 if (ret == 0 && port->type == PORT_RSA) {
3205 ret = serial8250_request_rsa_resource(up);
3206 if (ret < 0)
3207 base_ops->release_port(port);
3208 }
3209
3210 return ret;
3211}
3212
3213static void univ8250_release_port(struct uart_port *port)
3214{
3215 struct uart_8250_port *up = up_to_u8250p(port);
3216
3217 if (port->type == PORT_RSA)
3218 serial8250_release_rsa_resource(up);
3219 base_ops->release_port(port);
3220}
3221
3222static void univ8250_rsa_support(struct uart_ops *ops)
3223{
3224 ops->config_port = univ8250_config_port;
3225 ops->request_port = univ8250_request_port;
3226 ops->release_port = univ8250_release_port;
3227}
3228
3229#else
3230#define univ8250_rsa_support(x) do { } while (0)
3231#endif /* CONFIG_SERIAL_8250_RSA */
3232
3133static void __init serial8250_isa_init_ports(void) 3233static void __init serial8250_isa_init_ports(void)
3134{ 3234{
3135 struct uart_8250_port *up; 3235 struct uart_8250_port *up;
@@ -3148,21 +3248,27 @@ static void __init serial8250_isa_init_ports(void)
3148 struct uart_port *port = &up->port; 3248 struct uart_port *port = &up->port;
3149 3249
3150 port->line = i; 3250 port->line = i;
3151 spin_lock_init(&port->lock); 3251 serial8250_init_port(up);
3252 if (!base_ops)
3253 base_ops = port->ops;
3254 port->ops = &univ8250_port_ops;
3152 3255
3153 init_timer(&up->timer); 3256 init_timer(&up->timer);
3154 up->timer.function = serial8250_timeout; 3257 up->timer.function = serial8250_timeout;
3155 up->cur_iotype = 0xFF; 3258
3259 up->ops = &univ8250_driver_ops;
3156 3260
3157 /* 3261 /*
3158 * ALPHA_KLUDGE_MCR needs to be killed. 3262 * ALPHA_KLUDGE_MCR needs to be killed.
3159 */ 3263 */
3160 up->mcr_mask = ~ALPHA_KLUDGE_MCR; 3264 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
3161 up->mcr_force = ALPHA_KLUDGE_MCR; 3265 up->mcr_force = ALPHA_KLUDGE_MCR;
3162
3163 port->ops = &serial8250_pops;
3164 } 3266 }
3165 3267
3268 /* chain base port ops to support Remote Supervisor Adapter */
3269 univ8250_port_ops = *base_ops;
3270 univ8250_rsa_support(&univ8250_port_ops);
3271
3166 if (share_irqs) 3272 if (share_irqs)
3167 irqflag = IRQF_SHARED; 3273 irqflag = IRQF_SHARED;
3168 3274
@@ -3180,26 +3286,14 @@ static void __init serial8250_isa_init_ports(void)
3180 port->membase = old_serial_port[i].iomem_base; 3286 port->membase = old_serial_port[i].iomem_base;
3181 port->iotype = old_serial_port[i].io_type; 3287 port->iotype = old_serial_port[i].io_type;
3182 port->regshift = old_serial_port[i].iomem_reg_shift; 3288 port->regshift = old_serial_port[i].iomem_reg_shift;
3183 set_io_from_upio(port); 3289 serial8250_set_defaults(up);
3290
3184 port->irqflags |= irqflag; 3291 port->irqflags |= irqflag;
3185 if (serial8250_isa_config != NULL) 3292 if (serial8250_isa_config != NULL)
3186 serial8250_isa_config(i, &up->port, &up->capabilities); 3293 serial8250_isa_config(i, &up->port, &up->capabilities);
3187
3188 } 3294 }
3189} 3295}
3190 3296
3191static void
3192serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
3193{
3194 up->port.type = type;
3195 if (!up->port.fifosize)
3196 up->port.fifosize = uart_config[type].fifo_size;
3197 if (!up->tx_loadsz)
3198 up->tx_loadsz = uart_config[type].tx_loadsz;
3199 if (!up->capabilities)
3200 up->capabilities = uart_config[type].flags;
3201}
3202
3203static void __init 3297static void __init
3204serial8250_register_ports(struct uart_driver *drv, struct device *dev) 3298serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3205{ 3299{
@@ -3213,8 +3307,8 @@ serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3213 3307
3214 up->port.dev = dev; 3308 up->port.dev = dev;
3215 3309
3216 if (up->port.flags & UPF_FIXED_TYPE) 3310 if (skip_txen_test)
3217 serial8250_init_fixed_type_port(up, up->port.type); 3311 up->port.flags |= UPF_NO_TXEN_TEST;
3218 3312
3219 uart_add_one_port(drv, &up->port); 3313 uart_add_one_port(drv, &up->port);
3220 } 3314 }
@@ -3236,10 +3330,9 @@ static void serial8250_console_putchar(struct uart_port *port, int ch)
3236 * 3330 *
3237 * The console_lock must be held when we get here. 3331 * The console_lock must be held when we get here.
3238 */ 3332 */
3239static void 3333static void serial8250_console_write(struct uart_8250_port *up, const char *s,
3240serial8250_console_write(struct console *co, const char *s, unsigned int count) 3334 unsigned int count)
3241{ 3335{
3242 struct uart_8250_port *up = &serial8250_ports[co->index];
3243 struct uart_port *port = &up->port; 3336 struct uart_port *port = &up->port;
3244 unsigned long flags; 3337 unsigned long flags;
3245 unsigned int ier; 3338 unsigned int ier;
@@ -3311,14 +3404,51 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
3311 serial8250_rpm_put(up); 3404 serial8250_rpm_put(up);
3312} 3405}
3313 3406
3314static int serial8250_console_setup(struct console *co, char *options) 3407static void univ8250_console_write(struct console *co, const char *s,
3408 unsigned int count)
3409{
3410 struct uart_8250_port *up = &serial8250_ports[co->index];
3411
3412 serial8250_console_write(up, s, count);
3413}
3414
3415static unsigned int probe_baud(struct uart_port *port)
3416{
3417 unsigned char lcr, dll, dlm;
3418 unsigned int quot;
3419
3420 lcr = serial_port_in(port, UART_LCR);
3421 serial_port_out(port, UART_LCR, lcr | UART_LCR_DLAB);
3422 dll = serial_port_in(port, UART_DLL);
3423 dlm = serial_port_in(port, UART_DLM);
3424 serial_port_out(port, UART_LCR, lcr);
3425
3426 quot = (dlm << 8) | dll;
3427 return (port->uartclk / 16) / quot;
3428}
3429
3430static int serial8250_console_setup(struct uart_port *port, char *options, bool probe)
3315{ 3431{
3316 struct uart_port *port;
3317 int baud = 9600; 3432 int baud = 9600;
3318 int bits = 8; 3433 int bits = 8;
3319 int parity = 'n'; 3434 int parity = 'n';
3320 int flow = 'n'; 3435 int flow = 'n';
3321 3436
3437 if (!port->iobase && !port->membase)
3438 return -ENODEV;
3439
3440 if (options)
3441 uart_parse_options(options, &baud, &parity, &bits, &flow);
3442 else if (probe)
3443 baud = probe_baud(port);
3444
3445 return uart_set_options(port, port->cons, baud, parity, bits, flow);
3446}
3447
3448static int univ8250_console_setup(struct console *co, char *options)
3449{
3450 struct uart_port *port;
3451
3322 /* 3452 /*
3323 * Check whether an invalid uart number has been specified, and 3453 * Check whether an invalid uart number has been specified, and
3324 * if so, search for the first available port that does have 3454 * if so, search for the first available port that does have
@@ -3327,53 +3457,84 @@ static int serial8250_console_setup(struct console *co, char *options)
3327 if (co->index >= nr_uarts) 3457 if (co->index >= nr_uarts)
3328 co->index = 0; 3458 co->index = 0;
3329 port = &serial8250_ports[co->index].port; 3459 port = &serial8250_ports[co->index].port;
3330 if (!port->iobase && !port->membase) 3460 /* link port to console */
3331 return -ENODEV; 3461 port->cons = co;
3332 3462
3333 if (options) 3463 return serial8250_console_setup(port, options, false);
3334 uart_parse_options(options, &baud, &parity, &bits, &flow);
3335
3336 return uart_set_options(port, co, baud, parity, bits, flow);
3337} 3464}
3338 3465
3339static int serial8250_console_early_setup(void) 3466/**
3467 * univ8250_console_match - non-standard console matching
3468 * @co: registering console
3469 * @name: name from console command line
3470 * @idx: index from console command line
3471 * @options: ptr to option string from console command line
3472 *
3473 * Only attempts to match console command lines of the form:
3474 * console=uart[8250],io|mmio|mmio32,<addr>[,<options>]
3475 * console=uart[8250],0x<addr>[,<options>]
3476 * This form is used to register an initial earlycon boot console and
3477 * replace it with the serial8250_console at 8250 driver init.
3478 *
3479 * Performs console setup for a match (as required by interface)
3480 * If no <options> are specified, then assume the h/w is already setup.
3481 *
3482 * Returns 0 if console matches; otherwise non-zero to use default matching
3483 */
3484static int univ8250_console_match(struct console *co, char *name, int idx,
3485 char *options)
3340{ 3486{
3341 return serial8250_find_port_for_earlycon(); 3487 char match[] = "uart"; /* 8250-specific earlycon name */
3488 unsigned char iotype;
3489 unsigned long addr;
3490 int i;
3491
3492 if (strncmp(name, match, 4) != 0)
3493 return -ENODEV;
3494
3495 if (uart_parse_earlycon(options, &iotype, &addr, &options))
3496 return -ENODEV;
3497
3498 /* try to match the port specified on the command line */
3499 for (i = 0; i < nr_uarts; i++) {
3500 struct uart_port *port = &serial8250_ports[i].port;
3501
3502 if (port->iotype != iotype)
3503 continue;
3504 if ((iotype == UPIO_MEM || iotype == UPIO_MEM32) &&
3505 (port->mapbase != addr))
3506 continue;
3507 if (iotype == UPIO_PORT && port->iobase != addr)
3508 continue;
3509
3510 co->index = i;
3511 port->cons = co;
3512 return serial8250_console_setup(port, options, true);
3513 }
3514
3515 return -ENODEV;
3342} 3516}
3343 3517
3344static struct console serial8250_console = { 3518static struct console univ8250_console = {
3345 .name = "ttyS", 3519 .name = "ttyS",
3346 .write = serial8250_console_write, 3520 .write = univ8250_console_write,
3347 .device = uart_console_device, 3521 .device = uart_console_device,
3348 .setup = serial8250_console_setup, 3522 .setup = univ8250_console_setup,
3349 .early_setup = serial8250_console_early_setup, 3523 .match = univ8250_console_match,
3350 .flags = CON_PRINTBUFFER | CON_ANYTIME, 3524 .flags = CON_PRINTBUFFER | CON_ANYTIME,
3351 .index = -1, 3525 .index = -1,
3352 .data = &serial8250_reg, 3526 .data = &serial8250_reg,
3353}; 3527};
3354 3528
3355static int __init serial8250_console_init(void) 3529static int __init univ8250_console_init(void)
3356{ 3530{
3357 serial8250_isa_init_ports(); 3531 serial8250_isa_init_ports();
3358 register_console(&serial8250_console); 3532 register_console(&univ8250_console);
3359 return 0; 3533 return 0;
3360} 3534}
3361console_initcall(serial8250_console_init); 3535console_initcall(univ8250_console_init);
3362
3363int serial8250_find_port(struct uart_port *p)
3364{
3365 int line;
3366 struct uart_port *port;
3367
3368 for (line = 0; line < nr_uarts; line++) {
3369 port = &serial8250_ports[line].port;
3370 if (uart_match_port(p, port))
3371 return line;
3372 }
3373 return -ENODEV;
3374}
3375 3536
3376#define SERIAL8250_CONSOLE &serial8250_console 3537#define SERIAL8250_CONSOLE &univ8250_console
3377#else 3538#else
3378#define SERIAL8250_CONSOLE NULL 3539#define SERIAL8250_CONSOLE NULL
3379#endif 3540#endif
@@ -3412,19 +3573,19 @@ int __init early_serial_setup(struct uart_port *port)
3412 p->iotype = port->iotype; 3573 p->iotype = port->iotype;
3413 p->flags = port->flags; 3574 p->flags = port->flags;
3414 p->mapbase = port->mapbase; 3575 p->mapbase = port->mapbase;
3576 p->mapsize = port->mapsize;
3415 p->private_data = port->private_data; 3577 p->private_data = port->private_data;
3416 p->type = port->type; 3578 p->type = port->type;
3417 p->line = port->line; 3579 p->line = port->line;
3418 3580
3419 set_io_from_upio(p); 3581 serial8250_set_defaults(up_to_u8250p(p));
3582
3420 if (port->serial_in) 3583 if (port->serial_in)
3421 p->serial_in = port->serial_in; 3584 p->serial_in = port->serial_in;
3422 if (port->serial_out) 3585 if (port->serial_out)
3423 p->serial_out = port->serial_out; 3586 p->serial_out = port->serial_out;
3424 if (port->handle_irq) 3587 if (port->handle_irq)
3425 p->handle_irq = port->handle_irq; 3588 p->handle_irq = port->handle_irq;
3426 else
3427 p->handle_irq = serial8250_default_handle_irq;
3428 3589
3429 return 0; 3590 return 0;
3430} 3591}
@@ -3444,7 +3605,8 @@ void serial8250_suspend_port(int line)
3444 port->type != PORT_8250) { 3605 port->type != PORT_8250) {
3445 unsigned char canary = 0xa5; 3606 unsigned char canary = 0xa5;
3446 serial_out(up, UART_SCR, canary); 3607 serial_out(up, UART_SCR, canary);
3447 up->canary = canary; 3608 if (serial_in(up, UART_SCR) == canary)
3609 up->canary = canary;
3448 } 3610 }
3449 3611
3450 uart_suspend_port(&serial8250_reg, port); 3612 uart_suspend_port(&serial8250_reg, port);
@@ -3666,6 +3828,7 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
3666 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF; 3828 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3667 uart->bugs = up->bugs; 3829 uart->bugs = up->bugs;
3668 uart->port.mapbase = up->port.mapbase; 3830 uart->port.mapbase = up->port.mapbase;
3831 uart->port.mapsize = up->port.mapsize;
3669 uart->port.private_data = up->port.private_data; 3832 uart->port.private_data = up->port.private_data;
3670 uart->port.fifosize = up->port.fifosize; 3833 uart->port.fifosize = up->port.fifosize;
3671 uart->tx_loadsz = up->tx_loadsz; 3834 uart->tx_loadsz = up->tx_loadsz;
@@ -3674,6 +3837,7 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
3674 uart->port.unthrottle = up->port.unthrottle; 3837 uart->port.unthrottle = up->port.unthrottle;
3675 uart->port.rs485_config = up->port.rs485_config; 3838 uart->port.rs485_config = up->port.rs485_config;
3676 uart->port.rs485 = up->port.rs485; 3839 uart->port.rs485 = up->port.rs485;
3840 uart->dma = up->dma;
3677 3841
3678 /* Take tx_loadsz from fifosize if it wasn't set separately */ 3842 /* Take tx_loadsz from fifosize if it wasn't set separately */
3679 if (uart->port.fifosize && !uart->tx_loadsz) 3843 if (uart->port.fifosize && !uart->tx_loadsz)
@@ -3682,10 +3846,14 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
3682 if (up->port.dev) 3846 if (up->port.dev)
3683 uart->port.dev = up->port.dev; 3847 uart->port.dev = up->port.dev;
3684 3848
3849 if (skip_txen_test)
3850 uart->port.flags |= UPF_NO_TXEN_TEST;
3851
3685 if (up->port.flags & UPF_FIXED_TYPE) 3852 if (up->port.flags & UPF_FIXED_TYPE)
3686 serial8250_init_fixed_type_port(uart, up->port.type); 3853 uart->port.type = up->port.type;
3854
3855 serial8250_set_defaults(uart);
3687 3856
3688 set_io_from_upio(&uart->port);
3689 /* Possibly override default I/O functions. */ 3857 /* Possibly override default I/O functions. */
3690 if (up->port.serial_in) 3858 if (up->port.serial_in)
3691 uart->port.serial_in = up->port.serial_in; 3859 uart->port.serial_in = up->port.serial_in;
@@ -3710,13 +3878,6 @@ int serial8250_register_8250_port(struct uart_8250_port *up)
3710 uart->dl_read = up->dl_read; 3878 uart->dl_read = up->dl_read;
3711 if (up->dl_write) 3879 if (up->dl_write)
3712 uart->dl_write = up->dl_write; 3880 uart->dl_write = up->dl_write;
3713 if (up->dma) {
3714 uart->dma = up->dma;
3715 if (!uart->dma->tx_dma)
3716 uart->dma->tx_dma = serial8250_tx_dma;
3717 if (!uart->dma->rx_dma)
3718 uart->dma->rx_dma = serial8250_rx_dma;
3719 }
3720 3881
3721 if (serial8250_isa_config != NULL) 3882 if (serial8250_isa_config != NULL)
3722 serial8250_isa_config(0, &uart->port, 3883 serial8250_isa_config(0, &uart->port,
@@ -3747,9 +3908,11 @@ void serial8250_unregister_port(int line)
3747 uart_remove_one_port(&serial8250_reg, &uart->port); 3908 uart_remove_one_port(&serial8250_reg, &uart->port);
3748 if (serial8250_isa_devs) { 3909 if (serial8250_isa_devs) {
3749 uart->port.flags &= ~UPF_BOOT_AUTOCONF; 3910 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3911 if (skip_txen_test)
3912 uart->port.flags |= UPF_NO_TXEN_TEST;
3750 uart->port.type = PORT_UNKNOWN; 3913 uart->port.type = PORT_UNKNOWN;
3751 uart->port.dev = &serial8250_isa_devs->dev; 3914 uart->port.dev = &serial8250_isa_devs->dev;
3752 uart->capabilities = uart_config[uart->port.type].flags; 3915 uart->capabilities = 0;
3753 uart_add_one_port(&serial8250_reg, &uart->port); 3916 uart_add_one_port(&serial8250_reg, &uart->port);
3754 } else { 3917 } else {
3755 uart->port.dev = NULL; 3918 uart->port.dev = NULL;
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index 6ae5b8560e4d..176f18f2e3ab 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -17,7 +17,6 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/serial_8250.h> 19#include <linux/serial_8250.h>
20#include <linux/serial_core.h>
21#include <linux/serial_reg.h> 20#include <linux/serial_reg.h>
22#include <linux/of.h> 21#include <linux/of.h>
23#include <linux/of_irq.h> 22#include <linux/of_irq.h>
@@ -364,9 +363,9 @@ static int dw8250_probe_of(struct uart_port *p,
364 } 363 }
365 364
366 if (of_property_read_bool(np, "cts-override")) { 365 if (of_property_read_bool(np, "cts-override")) {
367 /* Always report DSR as active */ 366 /* Always report CTS as active */
368 data->msr_mask_on |= UART_MSR_DSR; 367 data->msr_mask_on |= UART_MSR_CTS;
369 data->msr_mask_off |= UART_MSR_DDSR; 368 data->msr_mask_off |= UART_MSR_DCTS;
370 } 369 }
371 370
372 if (of_property_read_bool(np, "ri-override")) { 371 if (of_property_read_bool(np, "ri-override")) {
@@ -375,37 +374,16 @@ static int dw8250_probe_of(struct uart_port *p,
375 data->msr_mask_off |= UART_MSR_TERI; 374 data->msr_mask_off |= UART_MSR_TERI;
376 } 375 }
377 376
378 /* clock got configured through clk api, all done */
379 if (p->uartclk)
380 return 0;
381
382 /* try to find out clock frequency from DT as fallback */
383 if (of_property_read_u32(np, "clock-frequency", &val)) {
384 dev_err(p->dev, "clk or clock-frequency not defined\n");
385 return -EINVAL;
386 }
387 p->uartclk = val;
388
389 return 0; 377 return 0;
390} 378}
391 379
392static int dw8250_probe_acpi(struct uart_8250_port *up, 380static int dw8250_probe_acpi(struct uart_8250_port *up,
393 struct dw8250_data *data) 381 struct dw8250_data *data)
394{ 382{
395 const struct acpi_device_id *id;
396 struct uart_port *p = &up->port; 383 struct uart_port *p = &up->port;
397 384
398 dw8250_setup_port(up); 385 dw8250_setup_port(up);
399 386
400 id = acpi_match_device(p->dev->driver->acpi_match_table, p->dev);
401 if (!id)
402 return -ENODEV;
403
404 if (!p->uartclk)
405 if (device_property_read_u32(p->dev, "clock-frequency",
406 &p->uartclk))
407 return -EINVAL;
408
409 p->iotype = UPIO_MEM32; 387 p->iotype = UPIO_MEM32;
410 p->serial_in = dw8250_serial_in32; 388 p->serial_in = dw8250_serial_in32;
411 p->serial_out = dw8250_serial_out32; 389 p->serial_out = dw8250_serial_out32;
@@ -425,18 +403,24 @@ static int dw8250_probe(struct platform_device *pdev)
425{ 403{
426 struct uart_8250_port uart = {}; 404 struct uart_8250_port uart = {};
427 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 405 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
428 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 406 int irq = platform_get_irq(pdev, 0);
429 struct dw8250_data *data; 407 struct dw8250_data *data;
430 int err; 408 int err;
431 409
432 if (!regs || !irq) { 410 if (!regs) {
433 dev_err(&pdev->dev, "no registers/irq defined\n"); 411 dev_err(&pdev->dev, "no registers defined\n");
434 return -EINVAL; 412 return -EINVAL;
435 } 413 }
436 414
415 if (irq < 0) {
416 if (irq != -EPROBE_DEFER)
417 dev_err(&pdev->dev, "cannot get irq\n");
418 return irq;
419 }
420
437 spin_lock_init(&uart.port.lock); 421 spin_lock_init(&uart.port.lock);
438 uart.port.mapbase = regs->start; 422 uart.port.mapbase = regs->start;
439 uart.port.irq = irq->start; 423 uart.port.irq = irq;
440 uart.port.handle_irq = dw8250_handle_irq; 424 uart.port.handle_irq = dw8250_handle_irq;
441 uart.port.pm = dw8250_do_pm; 425 uart.port.pm = dw8250_do_pm;
442 uart.port.type = PORT_8250; 426 uart.port.type = PORT_8250;
@@ -453,12 +437,18 @@ static int dw8250_probe(struct platform_device *pdev)
453 return -ENOMEM; 437 return -ENOMEM;
454 438
455 data->usr_reg = DW_UART_USR; 439 data->usr_reg = DW_UART_USR;
440
441 /* Always ask for fixed clock rate from a property. */
442 device_property_read_u32(&pdev->dev, "clock-frequency",
443 &uart.port.uartclk);
444
445 /* If there is separate baudclk, get the rate from it. */
456 data->clk = devm_clk_get(&pdev->dev, "baudclk"); 446 data->clk = devm_clk_get(&pdev->dev, "baudclk");
457 if (IS_ERR(data->clk) && PTR_ERR(data->clk) != -EPROBE_DEFER) 447 if (IS_ERR(data->clk) && PTR_ERR(data->clk) != -EPROBE_DEFER)
458 data->clk = devm_clk_get(&pdev->dev, NULL); 448 data->clk = devm_clk_get(&pdev->dev, NULL);
459 if (IS_ERR(data->clk) && PTR_ERR(data->clk) == -EPROBE_DEFER) 449 if (IS_ERR(data->clk) && PTR_ERR(data->clk) == -EPROBE_DEFER)
460 return -EPROBE_DEFER; 450 return -EPROBE_DEFER;
461 if (!IS_ERR(data->clk)) { 451 if (!IS_ERR_OR_NULL(data->clk)) {
462 err = clk_prepare_enable(data->clk); 452 err = clk_prepare_enable(data->clk);
463 if (err) 453 if (err)
464 dev_warn(&pdev->dev, "could not enable optional baudclk: %d\n", 454 dev_warn(&pdev->dev, "could not enable optional baudclk: %d\n",
@@ -467,6 +457,12 @@ static int dw8250_probe(struct platform_device *pdev)
467 uart.port.uartclk = clk_get_rate(data->clk); 457 uart.port.uartclk = clk_get_rate(data->clk);
468 } 458 }
469 459
460 /* If no clock rate is defined, fail. */
461 if (!uart.port.uartclk) {
462 dev_err(&pdev->dev, "clock rate not defined\n");
463 return -EINVAL;
464 }
465
470 data->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); 466 data->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
471 if (IS_ERR(data->clk) && PTR_ERR(data->clk) == -EPROBE_DEFER) { 467 if (IS_ERR(data->clk) && PTR_ERR(data->clk) == -EPROBE_DEFER) {
472 err = -EPROBE_DEFER; 468 err = -EPROBE_DEFER;
@@ -629,6 +625,7 @@ static const struct acpi_device_id dw8250_acpi_match[] = {
629 { "80860F0A", 0 }, 625 { "80860F0A", 0 },
630 { "8086228A", 0 }, 626 { "8086228A", 0 },
631 { "APMC0D08", 0}, 627 { "APMC0D08", 0},
628 { "AMD0020", 0 },
632 { }, 629 { },
633}; 630};
634MODULE_DEVICE_TABLE(acpi, dw8250_acpi_match); 631MODULE_DEVICE_TABLE(acpi, dw8250_acpi_match);
@@ -649,3 +646,4 @@ module_platform_driver(dw8250_platform_driver);
649MODULE_AUTHOR("Jamie Iles"); 646MODULE_AUTHOR("Jamie Iles");
650MODULE_LICENSE("GPL"); 647MODULE_LICENSE("GPL");
651MODULE_DESCRIPTION("Synopsys DesignWare 8250 serial port driver"); 648MODULE_DESCRIPTION("Synopsys DesignWare 8250 serial port driver");
649MODULE_ALIAS("platform:dw-apb-uart");
diff --git a/drivers/tty/serial/8250/8250_early.c b/drivers/tty/serial/8250/8250_early.c
index c31a22b4f845..8e119682266a 100644
--- a/drivers/tty/serial/8250/8250_early.c
+++ b/drivers/tty/serial/8250/8250_early.c
@@ -29,15 +29,12 @@
29#include <linux/tty.h> 29#include <linux/tty.h>
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/console.h> 31#include <linux/console.h>
32#include <linux/serial_core.h>
33#include <linux/serial_reg.h> 32#include <linux/serial_reg.h>
34#include <linux/serial.h> 33#include <linux/serial.h>
35#include <linux/serial_8250.h> 34#include <linux/serial_8250.h>
36#include <asm/io.h> 35#include <asm/io.h>
37#include <asm/serial.h> 36#include <asm/serial.h>
38 37
39static struct earlycon_device *early_device;
40
41unsigned int __weak __init serial8250_early_in(struct uart_port *port, int offset) 38unsigned int __weak __init serial8250_early_in(struct uart_port *port, int offset)
42{ 39{
43 switch (port->iotype) { 40 switch (port->iotype) {
@@ -90,7 +87,8 @@ static void __init serial_putc(struct uart_port *port, int c)
90static void __init early_serial8250_write(struct console *console, 87static void __init early_serial8250_write(struct console *console,
91 const char *s, unsigned int count) 88 const char *s, unsigned int count)
92{ 89{
93 struct uart_port *port = &early_device->port; 90 struct earlycon_device *device = console->data;
91 struct uart_port *port = &device->port;
94 unsigned int ier; 92 unsigned int ier;
95 93
96 /* Save the IER and disable interrupts preserving the UUE bit */ 94 /* Save the IER and disable interrupts preserving the UUE bit */
@@ -107,21 +105,6 @@ static void __init early_serial8250_write(struct console *console,
107 serial8250_early_out(port, UART_IER, ier); 105 serial8250_early_out(port, UART_IER, ier);
108} 106}
109 107
110static unsigned int __init probe_baud(struct uart_port *port)
111{
112 unsigned char lcr, dll, dlm;
113 unsigned int quot;
114
115 lcr = serial8250_early_in(port, UART_LCR);
116 serial8250_early_out(port, UART_LCR, lcr | UART_LCR_DLAB);
117 dll = serial8250_early_in(port, UART_DLL);
118 dlm = serial8250_early_in(port, UART_DLM);
119 serial8250_early_out(port, UART_LCR, lcr);
120
121 quot = (dlm << 8) | dll;
122 return (port->uartclk / 16) / quot;
123}
124
125static void __init init_port(struct earlycon_device *device) 108static void __init init_port(struct earlycon_device *device)
126{ 109{
127 struct uart_port *port = &device->port; 110 struct uart_port *port = &device->port;
@@ -147,52 +130,20 @@ static int __init early_serial8250_setup(struct earlycon_device *device,
147 const char *options) 130 const char *options)
148{ 131{
149 if (!(device->port.membase || device->port.iobase)) 132 if (!(device->port.membase || device->port.iobase))
150 return 0; 133 return -ENODEV;
151 134
152 if (!device->baud) { 135 if (!device->baud) {
153 device->baud = probe_baud(&device->port); 136 struct uart_port *port = &device->port;
154 snprintf(device->options, sizeof(device->options), "%u", 137 unsigned int ier;
155 device->baud);
156 }
157 138
158 init_port(device); 139 /* assume the device was initialized, only mask interrupts */
140 ier = serial8250_early_in(port, UART_IER);
141 serial8250_early_out(port, UART_IER, ier & UART_IER_UUE);
142 } else
143 init_port(device);
159 144
160 early_device = device;
161 device->con->write = early_serial8250_write; 145 device->con->write = early_serial8250_write;
162 return 0; 146 return 0;
163} 147}
164EARLYCON_DECLARE(uart8250, early_serial8250_setup); 148EARLYCON_DECLARE(uart8250, early_serial8250_setup);
165EARLYCON_DECLARE(uart, early_serial8250_setup); 149EARLYCON_DECLARE(uart, early_serial8250_setup);
166
167int __init setup_early_serial8250_console(char *cmdline)
168{
169 char match[] = "uart8250";
170
171 if (cmdline && cmdline[4] == ',')
172 match[4] = '\0';
173
174 return setup_earlycon(cmdline, match, early_serial8250_setup);
175}
176
177int serial8250_find_port_for_earlycon(void)
178{
179 struct earlycon_device *device = early_device;
180 struct uart_port *port = device ? &device->port : NULL;
181 int line;
182 int ret;
183
184 if (!port || (!port->membase && !port->iobase))
185 return -ENODEV;
186
187 line = serial8250_find_port(port);
188 if (line < 0)
189 return -ENODEV;
190
191 ret = update_console_cmdline("uart", 8250,
192 "ttyS", line, device->options);
193 if (ret < 0)
194 ret = update_console_cmdline("uart", 0,
195 "ttyS", line, device->options);
196
197 return ret;
198}
diff --git a/drivers/tty/serial/8250/8250_em.c b/drivers/tty/serial/8250/8250_em.c
index ae5eaed6aa85..0b6381214917 100644
--- a/drivers/tty/serial/8250/8250_em.c
+++ b/drivers/tty/serial/8250/8250_em.c
@@ -21,7 +21,6 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/serial_8250.h> 23#include <linux/serial_8250.h>
24#include <linux/serial_core.h>
25#include <linux/serial_reg.h> 24#include <linux/serial_reg.h>
26#include <linux/platform_device.h> 25#include <linux/platform_device.h>
27#include <linux/clk.h> 26#include <linux/clk.h>
diff --git a/drivers/tty/serial/8250/8250_hp300.c b/drivers/tty/serial/8250/8250_hp300.c
index b4882082b247..2891958cd842 100644
--- a/drivers/tty/serial/8250/8250_hp300.c
+++ b/drivers/tty/serial/8250/8250_hp300.c
@@ -10,7 +10,6 @@
10#include <linux/string.h> 10#include <linux/string.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/serial_core.h>
14#include <linux/serial_8250.h> 13#include <linux/serial_8250.h>
15#include <linux/delay.h> 14#include <linux/delay.h>
16#include <linux/dio.h> 15#include <linux/dio.h>
diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c
index fe6d2e51da09..9289999cb7c6 100644
--- a/drivers/tty/serial/8250/8250_omap.c
+++ b/drivers/tty/serial/8250/8250_omap.c
@@ -11,7 +11,6 @@
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/serial_8250.h> 13#include <linux/serial_8250.h>
14#include <linux/serial_core.h>
15#include <linux/serial_reg.h> 14#include <linux/serial_reg.h>
16#include <linux/tty_flip.h> 15#include <linux/tty_flip.h>
17#include <linux/platform_device.h> 16#include <linux/platform_device.h>
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 892eb32cdef4..08da4d3e2162 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -21,12 +21,14 @@
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/8250_pci.h> 22#include <linux/8250_pci.h>
23#include <linux/bitops.h> 23#include <linux/bitops.h>
24#include <linux/rational.h>
24 25
25#include <asm/byteorder.h> 26#include <asm/byteorder.h>
26#include <asm/io.h> 27#include <asm/io.h>
27 28
28#include <linux/dmaengine.h> 29#include <linux/dmaengine.h>
29#include <linux/platform_data/dma-dw.h> 30#include <linux/platform_data/dma-dw.h>
31#include <linux/platform_data/dma-hsu.h>
30 32
31#include "8250.h" 33#include "8250.h"
32 34
@@ -1392,45 +1394,22 @@ byt_set_termios(struct uart_port *p, struct ktermios *termios,
1392 struct ktermios *old) 1394 struct ktermios *old)
1393{ 1395{
1394 unsigned int baud = tty_termios_baud_rate(termios); 1396 unsigned int baud = tty_termios_baud_rate(termios);
1395 unsigned int m, n; 1397 unsigned long fref = 100000000, fuart = baud * 16;
1398 unsigned long w = BIT(15) - 1;
1399 unsigned long m, n;
1396 u32 reg; 1400 u32 reg;
1397 1401
1402 /* Get Fuart closer to Fref */
1403 fuart *= rounddown_pow_of_two(fref / fuart);
1404
1398 /* 1405 /*
1399 * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the 1406 * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
1400 * dividers must be adjusted. 1407 * dividers must be adjusted.
1401 * 1408 *
1402 * uartclk = (m / n) * 100 MHz, where m <= n 1409 * uartclk = (m / n) * 100 MHz, where m <= n
1403 */ 1410 */
1404 switch (baud) { 1411 rational_best_approximation(fuart, fref, w, w, &m, &n);
1405 case 500000: 1412 p->uartclk = fuart;
1406 case 1000000:
1407 case 2000000:
1408 case 4000000:
1409 m = 64;
1410 n = 100;
1411 p->uartclk = 64000000;
1412 break;
1413 case 3500000:
1414 m = 56;
1415 n = 100;
1416 p->uartclk = 56000000;
1417 break;
1418 case 1500000:
1419 case 3000000:
1420 m = 48;
1421 n = 100;
1422 p->uartclk = 48000000;
1423 break;
1424 case 2500000:
1425 m = 40;
1426 n = 100;
1427 p->uartclk = 40000000;
1428 break;
1429 default:
1430 m = 2304;
1431 n = 3125;
1432 p->uartclk = 73728000;
1433 }
1434 1413
1435 /* Reset the clock */ 1414 /* Reset the clock */
1436 reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT); 1415 reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
@@ -1525,6 +1504,167 @@ byt_serial_setup(struct serial_private *priv,
1525 return ret; 1504 return ret;
1526} 1505}
1527 1506
1507#define INTEL_MID_UART_PS 0x30
1508#define INTEL_MID_UART_MUL 0x34
1509#define INTEL_MID_UART_DIV 0x38
1510
1511static void intel_mid_set_termios(struct uart_port *p,
1512 struct ktermios *termios,
1513 struct ktermios *old,
1514 unsigned long fref)
1515{
1516 unsigned int baud = tty_termios_baud_rate(termios);
1517 unsigned short ps = 16;
1518 unsigned long fuart = baud * ps;
1519 unsigned long w = BIT(24) - 1;
1520 unsigned long mul, div;
1521
1522 if (fref < fuart) {
1523 /* Find prescaler value that satisfies Fuart < Fref */
1524 if (fref > baud)
1525 ps = fref / baud; /* baud rate too high */
1526 else
1527 ps = 1; /* PLL case */
1528 fuart = baud * ps;
1529 } else {
1530 /* Get Fuart closer to Fref */
1531 fuart *= rounddown_pow_of_two(fref / fuart);
1532 }
1533
1534 rational_best_approximation(fuart, fref, w, w, &mul, &div);
1535 p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
1536
1537 writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
1538 writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
1539 writel(div, p->membase + INTEL_MID_UART_DIV);
1540
1541 serial8250_do_set_termios(p, termios, old);
1542}
1543
1544static void intel_mid_set_termios_38_4M(struct uart_port *p,
1545 struct ktermios *termios,
1546 struct ktermios *old)
1547{
1548 intel_mid_set_termios(p, termios, old, 38400000);
1549}
1550
1551static void intel_mid_set_termios_50M(struct uart_port *p,
1552 struct ktermios *termios,
1553 struct ktermios *old)
1554{
1555 /*
1556 * The uart clk is 50Mhz, and the baud rate come from:
1557 * baud = 50M * MUL / (DIV * PS * DLAB)
1558 */
1559 intel_mid_set_termios(p, termios, old, 50000000);
1560}
1561
1562static bool intel_mid_dma_filter(struct dma_chan *chan, void *param)
1563{
1564 struct hsu_dma_slave *s = param;
1565
1566 if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
1567 return false;
1568
1569 chan->private = s;
1570 return true;
1571}
1572
1573static int intel_mid_serial_setup(struct serial_private *priv,
1574 const struct pciserial_board *board,
1575 struct uart_8250_port *port, int idx,
1576 int index, struct pci_dev *dma_dev)
1577{
1578 struct device *dev = port->port.dev;
1579 struct uart_8250_dma *dma;
1580 struct hsu_dma_slave *tx_param, *rx_param;
1581
1582 dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL);
1583 if (!dma)
1584 return -ENOMEM;
1585
1586 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
1587 if (!tx_param)
1588 return -ENOMEM;
1589
1590 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
1591 if (!rx_param)
1592 return -ENOMEM;
1593
1594 rx_param->chan_id = index * 2 + 1;
1595 tx_param->chan_id = index * 2;
1596
1597 dma->rxconf.src_maxburst = 64;
1598 dma->txconf.dst_maxburst = 64;
1599
1600 rx_param->dma_dev = &dma_dev->dev;
1601 tx_param->dma_dev = &dma_dev->dev;
1602
1603 dma->fn = intel_mid_dma_filter;
1604 dma->rx_param = rx_param;
1605 dma->tx_param = tx_param;
1606
1607 port->port.type = PORT_16750;
1608 port->port.flags |= UPF_FIXED_PORT | UPF_FIXED_TYPE;
1609 port->dma = dma;
1610
1611 return pci_default_setup(priv, board, port, idx);
1612}
1613
1614#define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
1615#define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
1616#define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
1617
1618static int pnw_serial_setup(struct serial_private *priv,
1619 const struct pciserial_board *board,
1620 struct uart_8250_port *port, int idx)
1621{
1622 struct pci_dev *pdev = priv->dev;
1623 struct pci_dev *dma_dev;
1624 int index;
1625
1626 switch (pdev->device) {
1627 case PCI_DEVICE_ID_INTEL_PNW_UART1:
1628 index = 0;
1629 break;
1630 case PCI_DEVICE_ID_INTEL_PNW_UART2:
1631 index = 1;
1632 break;
1633 case PCI_DEVICE_ID_INTEL_PNW_UART3:
1634 index = 2;
1635 break;
1636 default:
1637 return -EINVAL;
1638 }
1639
1640 dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
1641
1642 port->port.set_termios = intel_mid_set_termios_50M;
1643
1644 return intel_mid_serial_setup(priv, board, port, idx, index, dma_dev);
1645}
1646
1647#define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
1648
1649static int tng_serial_setup(struct serial_private *priv,
1650 const struct pciserial_board *board,
1651 struct uart_8250_port *port, int idx)
1652{
1653 struct pci_dev *pdev = priv->dev;
1654 struct pci_dev *dma_dev;
1655 int index = PCI_FUNC(pdev->devfn);
1656
1657 /* Currently no support for HSU port0 */
1658 if (index-- == 0)
1659 return -ENODEV;
1660
1661 dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
1662
1663 port->port.set_termios = intel_mid_set_termios_38_4M;
1664
1665 return intel_mid_serial_setup(priv, board, port, idx, index, dma_dev);
1666}
1667
1528static int 1668static int
1529pci_omegapci_setup(struct serial_private *priv, 1669pci_omegapci_setup(struct serial_private *priv,
1530 const struct pciserial_board *board, 1670 const struct pciserial_board *board,
@@ -1550,95 +1690,71 @@ static int pci_fintek_setup(struct serial_private *priv,
1550 struct uart_8250_port *port, int idx) 1690 struct uart_8250_port *port, int idx)
1551{ 1691{
1552 struct pci_dev *pdev = priv->dev; 1692 struct pci_dev *pdev = priv->dev;
1553 unsigned long base;
1554 unsigned long iobase;
1555 unsigned long ciobase = 0;
1556 u8 config_base; 1693 u8 config_base;
1694 u16 iobase;
1695
1696 config_base = 0x40 + 0x08 * idx;
1697
1698 /* Get the io address from configuration space */
1699 pci_read_config_word(pdev, config_base + 4, &iobase);
1700
1701 dev_dbg(&pdev->dev, "%s: idx=%d iobase=0x%x", __func__, idx, iobase);
1702
1703 port->port.iotype = UPIO_PORT;
1704 port->port.iobase = iobase;
1705
1706 return 0;
1707}
1708
1709static int pci_fintek_init(struct pci_dev *dev)
1710{
1711 unsigned long iobase;
1712 u32 max_port, i;
1557 u32 bar_data[3]; 1713 u32 bar_data[3];
1714 u8 config_base;
1558 1715
1559 /* 1716 switch (dev->device) {
1560 * Find each UARTs offset in PCI configuraion space 1717 case 0x1104: /* 4 ports */
1561 */ 1718 case 0x1108: /* 8 ports */
1562 switch (idx) { 1719 max_port = dev->device & 0xff;
1563 case 0:
1564 config_base = 0x40;
1565 break; 1720 break;
1566 case 1: 1721 case 0x1112: /* 12 ports */
1567 config_base = 0x48; 1722 max_port = 12;
1568 break;
1569 case 2:
1570 config_base = 0x50;
1571 break;
1572 case 3:
1573 config_base = 0x58;
1574 break;
1575 case 4:
1576 config_base = 0x60;
1577 break;
1578 case 5:
1579 config_base = 0x68;
1580 break;
1581 case 6:
1582 config_base = 0x70;
1583 break;
1584 case 7:
1585 config_base = 0x78;
1586 break;
1587 case 8:
1588 config_base = 0x80;
1589 break;
1590 case 9:
1591 config_base = 0x88;
1592 break;
1593 case 10:
1594 config_base = 0x90;
1595 break;
1596 case 11:
1597 config_base = 0x98;
1598 break; 1723 break;
1599 default: 1724 default:
1600 /* Unknown number of ports, get out of here */
1601 return -EINVAL; 1725 return -EINVAL;
1602 } 1726 }
1603 1727
1604 if (idx < 4) {
1605 base = pci_resource_start(priv->dev, 3);
1606 ciobase = (int)(base + (0x8 * idx));
1607 }
1608
1609 /* Get the io address dispatch from the BIOS */ 1728 /* Get the io address dispatch from the BIOS */
1610 pci_read_config_dword(pdev, 0x24, &bar_data[0]); 1729 pci_read_config_dword(dev, 0x24, &bar_data[0]);
1611 pci_read_config_dword(pdev, 0x20, &bar_data[1]); 1730 pci_read_config_dword(dev, 0x20, &bar_data[1]);
1612 pci_read_config_dword(pdev, 0x1c, &bar_data[2]); 1731 pci_read_config_dword(dev, 0x1c, &bar_data[2]);
1613
1614 /* Calculate Real IO Port */
1615 iobase = (bar_data[idx/4] & 0xffffffe0) + (idx % 4) * 8;
1616 1732
1617 dev_dbg(&pdev->dev, "%s: idx=%d iobase=0x%lx ciobase=0x%lx config_base=0x%2x\n", 1733 for (i = 0; i < max_port; ++i) {
1618 __func__, idx, iobase, ciobase, config_base); 1734 /* UART0 configuration offset start from 0x40 */
1735 config_base = 0x40 + 0x08 * i;
1619 1736
1620 /* Enable UART I/O port */ 1737 /* Calculate Real IO Port */
1621 pci_write_config_byte(pdev, config_base + 0x00, 0x01); 1738 iobase = (bar_data[i / 4] & 0xffffffe0) + (i % 4) * 8;
1622 1739
1623 /* Select 128-byte FIFO and 8x FIFO threshold */ 1740 /* Enable UART I/O port */
1624 pci_write_config_byte(pdev, config_base + 0x01, 0x33); 1741 pci_write_config_byte(dev, config_base + 0x00, 0x01);
1625 1742
1626 /* LSB UART */ 1743 /* Select 128-byte FIFO and 8x FIFO threshold */
1627 pci_write_config_byte(pdev, config_base + 0x04, (u8)(iobase & 0xff)); 1744 pci_write_config_byte(dev, config_base + 0x01, 0x33);
1628 1745
1629 /* MSB UART */ 1746 /* LSB UART */
1630 pci_write_config_byte(pdev, config_base + 0x05, (u8)((iobase & 0xff00) >> 8)); 1747 pci_write_config_byte(dev, config_base + 0x04,
1748 (u8)(iobase & 0xff));
1631 1749
1632 /* irq number, this usually fails, but the spec says to do it anyway. */ 1750 /* MSB UART */
1633 pci_write_config_byte(pdev, config_base + 0x06, pdev->irq); 1751 pci_write_config_byte(dev, config_base + 0x05,
1752 (u8)((iobase & 0xff00) >> 8));
1634 1753
1635 port->port.iotype = UPIO_PORT; 1754 pci_write_config_byte(dev, config_base + 0x06, dev->irq);
1636 port->port.iobase = iobase; 1755 }
1637 port->port.mapbase = 0;
1638 port->port.membase = NULL;
1639 port->port.regshift = 0;
1640 1756
1641 return 0; 1757 return max_port;
1642} 1758}
1643 1759
1644static int skip_tx_en_setup(struct serial_private *priv, 1760static int skip_tx_en_setup(struct serial_private *priv,
@@ -1989,6 +2105,34 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
1989 }, 2105 },
1990 { 2106 {
1991 .vendor = PCI_VENDOR_ID_INTEL, 2107 .vendor = PCI_VENDOR_ID_INTEL,
2108 .device = PCI_DEVICE_ID_INTEL_PNW_UART1,
2109 .subvendor = PCI_ANY_ID,
2110 .subdevice = PCI_ANY_ID,
2111 .setup = pnw_serial_setup,
2112 },
2113 {
2114 .vendor = PCI_VENDOR_ID_INTEL,
2115 .device = PCI_DEVICE_ID_INTEL_PNW_UART2,
2116 .subvendor = PCI_ANY_ID,
2117 .subdevice = PCI_ANY_ID,
2118 .setup = pnw_serial_setup,
2119 },
2120 {
2121 .vendor = PCI_VENDOR_ID_INTEL,
2122 .device = PCI_DEVICE_ID_INTEL_PNW_UART3,
2123 .subvendor = PCI_ANY_ID,
2124 .subdevice = PCI_ANY_ID,
2125 .setup = pnw_serial_setup,
2126 },
2127 {
2128 .vendor = PCI_VENDOR_ID_INTEL,
2129 .device = PCI_DEVICE_ID_INTEL_TNG_UART,
2130 .subvendor = PCI_ANY_ID,
2131 .subdevice = PCI_ANY_ID,
2132 .setup = tng_serial_setup,
2133 },
2134 {
2135 .vendor = PCI_VENDOR_ID_INTEL,
1992 .device = PCI_DEVICE_ID_INTEL_BSW_UART1, 2136 .device = PCI_DEVICE_ID_INTEL_BSW_UART1,
1993 .subvendor = PCI_ANY_ID, 2137 .subvendor = PCI_ANY_ID,
1994 .subdevice = PCI_ANY_ID, 2138 .subdevice = PCI_ANY_ID,
@@ -2653,6 +2797,7 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
2653 .subvendor = PCI_ANY_ID, 2797 .subvendor = PCI_ANY_ID,
2654 .subdevice = PCI_ANY_ID, 2798 .subdevice = PCI_ANY_ID,
2655 .setup = pci_fintek_setup, 2799 .setup = pci_fintek_setup,
2800 .init = pci_fintek_init,
2656 }, 2801 },
2657 { 2802 {
2658 .vendor = 0x1c29, 2803 .vendor = 0x1c29,
@@ -2660,6 +2805,7 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
2660 .subvendor = PCI_ANY_ID, 2805 .subvendor = PCI_ANY_ID,
2661 .subdevice = PCI_ANY_ID, 2806 .subdevice = PCI_ANY_ID,
2662 .setup = pci_fintek_setup, 2807 .setup = pci_fintek_setup,
2808 .init = pci_fintek_init,
2663 }, 2809 },
2664 { 2810 {
2665 .vendor = 0x1c29, 2811 .vendor = 0x1c29,
@@ -2667,6 +2813,7 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
2667 .subvendor = PCI_ANY_ID, 2813 .subvendor = PCI_ANY_ID,
2668 .subdevice = PCI_ANY_ID, 2814 .subdevice = PCI_ANY_ID,
2669 .setup = pci_fintek_setup, 2815 .setup = pci_fintek_setup,
2816 .init = pci_fintek_init,
2670 }, 2817 },
2671 2818
2672 /* 2819 /*
@@ -2864,6 +3011,8 @@ enum pci_board_num_t {
2864 pbn_ADDIDATA_PCIe_8_3906250, 3011 pbn_ADDIDATA_PCIe_8_3906250,
2865 pbn_ce4100_1_115200, 3012 pbn_ce4100_1_115200,
2866 pbn_byt, 3013 pbn_byt,
3014 pbn_pnw,
3015 pbn_tng,
2867 pbn_qrk, 3016 pbn_qrk,
2868 pbn_omegapci, 3017 pbn_omegapci,
2869 pbn_NETMOS9900_2s_115200, 3018 pbn_NETMOS9900_2s_115200,
@@ -3630,6 +3779,16 @@ static struct pciserial_board pci_boards[] = {
3630 .uart_offset = 0x80, 3779 .uart_offset = 0x80,
3631 .reg_shift = 2, 3780 .reg_shift = 2,
3632 }, 3781 },
3782 [pbn_pnw] = {
3783 .flags = FL_BASE0,
3784 .num_ports = 1,
3785 .base_baud = 115200,
3786 },
3787 [pbn_tng] = {
3788 .flags = FL_BASE0,
3789 .num_ports = 1,
3790 .base_baud = 1843200,
3791 },
3633 [pbn_qrk] = { 3792 [pbn_qrk] = {
3634 .flags = FL_BASE0, 3793 .flags = FL_BASE0,
3635 .num_ports = 1, 3794 .num_ports = 1,
@@ -4006,41 +4165,41 @@ static void pciserial_remove_one(struct pci_dev *dev)
4006 pci_disable_device(dev); 4165 pci_disable_device(dev);
4007} 4166}
4008 4167
4009#ifdef CONFIG_PM 4168#ifdef CONFIG_PM_SLEEP
4010static int pciserial_suspend_one(struct pci_dev *dev, pm_message_t state) 4169static int pciserial_suspend_one(struct device *dev)
4011{ 4170{
4012 struct serial_private *priv = pci_get_drvdata(dev); 4171 struct pci_dev *pdev = to_pci_dev(dev);
4172 struct serial_private *priv = pci_get_drvdata(pdev);
4013 4173
4014 if (priv) 4174 if (priv)
4015 pciserial_suspend_ports(priv); 4175 pciserial_suspend_ports(priv);
4016 4176
4017 pci_save_state(dev);
4018 pci_set_power_state(dev, pci_choose_state(dev, state));
4019 return 0; 4177 return 0;
4020} 4178}
4021 4179
4022static int pciserial_resume_one(struct pci_dev *dev) 4180static int pciserial_resume_one(struct device *dev)
4023{ 4181{
4182 struct pci_dev *pdev = to_pci_dev(dev);
4183 struct serial_private *priv = pci_get_drvdata(pdev);
4024 int err; 4184 int err;
4025 struct serial_private *priv = pci_get_drvdata(dev);
4026
4027 pci_set_power_state(dev, PCI_D0);
4028 pci_restore_state(dev);
4029 4185
4030 if (priv) { 4186 if (priv) {
4031 /* 4187 /*
4032 * The device may have been disabled. Re-enable it. 4188 * The device may have been disabled. Re-enable it.
4033 */ 4189 */
4034 err = pci_enable_device(dev); 4190 err = pci_enable_device(pdev);
4035 /* FIXME: We cannot simply error out here */ 4191 /* FIXME: We cannot simply error out here */
4036 if (err) 4192 if (err)
4037 dev_err(&dev->dev, "Unable to re-enable ports, trying to continue.\n"); 4193 dev_err(dev, "Unable to re-enable ports, trying to continue.\n");
4038 pciserial_resume_ports(priv); 4194 pciserial_resume_ports(priv);
4039 } 4195 }
4040 return 0; 4196 return 0;
4041} 4197}
4042#endif 4198#endif
4043 4199
4200static SIMPLE_DEV_PM_OPS(pciserial_pm_ops, pciserial_suspend_one,
4201 pciserial_resume_one);
4202
4044static struct pci_device_id serial_pci_tbl[] = { 4203static struct pci_device_id serial_pci_tbl[] = {
4045 /* Advantech use PCI_DEVICE_ID_ADVANTECH_PCI3620 (0x3620) as 'PCI_SUBVENDOR_ID' */ 4204 /* Advantech use PCI_DEVICE_ID_ADVANTECH_PCI3620 (0x3620) as 'PCI_SUBVENDOR_ID' */
4046 { PCI_VENDOR_ID_ADVANTECH, PCI_DEVICE_ID_ADVANTECH_PCI3620, 4205 { PCI_VENDOR_ID_ADVANTECH, PCI_DEVICE_ID_ADVANTECH_PCI3620,
@@ -5363,6 +5522,26 @@ static struct pci_device_id serial_pci_tbl[] = {
5363 pbn_byt }, 5522 pbn_byt },
5364 5523
5365 /* 5524 /*
5525 * Intel Penwell
5526 */
5527 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PNW_UART1,
5528 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
5529 pbn_pnw},
5530 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PNW_UART2,
5531 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
5532 pbn_pnw},
5533 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PNW_UART3,
5534 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
5535 pbn_pnw},
5536
5537 /*
5538 * Intel Tangier
5539 */
5540 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TNG_UART,
5541 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
5542 pbn_tng},
5543
5544 /*
5366 * Intel Quark x1000 5545 * Intel Quark x1000
5367 */ 5546 */
5368 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_UART, 5547 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_UART,
@@ -5510,10 +5689,9 @@ static struct pci_driver serial_pci_driver = {
5510 .name = "serial", 5689 .name = "serial",
5511 .probe = pciserial_init_one, 5690 .probe = pciserial_init_one,
5512 .remove = pciserial_remove_one, 5691 .remove = pciserial_remove_one,
5513#ifdef CONFIG_PM 5692 .driver = {
5514 .suspend = pciserial_suspend_one, 5693 .pm = &pciserial_pm_ops,
5515 .resume = pciserial_resume_one, 5694 },
5516#endif
5517 .id_table = serial_pci_tbl, 5695 .id_table = serial_pci_tbl,
5518 .err_handler = &serial8250_err_handler, 5696 .err_handler = &serial8250_err_handler,
5519}; 5697};
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
index 6f7f2d753def..c35070356528 100644
--- a/drivers/tty/serial/8250/Kconfig
+++ b/drivers/tty/serial/8250/Kconfig
@@ -108,6 +108,7 @@ config SERIAL_8250_PCI
108 tristate "8250/16550 PCI device support" if EXPERT 108 tristate "8250/16550 PCI device support" if EXPERT
109 depends on SERIAL_8250 && PCI 109 depends on SERIAL_8250 && PCI
110 default SERIAL_8250 110 default SERIAL_8250
111 select RATIONAL
111 help 112 help
112 This builds standard PCI serial support. You may be able to 113 This builds standard PCI serial support. You may be able to
113 disable this feature if you only need legacy serial support. 114 disable this feature if you only need legacy serial support.