diff options
author | Jamie Iles <jamie@jamieiles.com> | 2011-08-15 05:17:55 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-08-23 13:53:00 -0400 |
commit | 4834d028978583dfe8e1fc19f1180ceb03d8dfb7 (patch) | |
tree | 2a0be0a9144d49f7d03d173e3e8fca2f3e1e8a50 /drivers/tty/serial/8250.c | |
parent | 03972fc21410907fa20d1442c4b073f034423d5c (diff) |
tty: serial8250: remove UPIO_DWAPB{,32}
Now that platforms can override the port IRQ handler and the only user
of these UPIO modes has been converted over, kill off UPIO_DWAPB and
UPIO_DWAPB32.
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/tty/serial/8250.c')
-rw-r--r-- | drivers/tty/serial/8250.c | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/drivers/tty/serial/8250.c b/drivers/tty/serial/8250.c index 833e011a426f..6f594d2d334f 100644 --- a/drivers/tty/serial/8250.c +++ b/drivers/tty/serial/8250.c | |||
@@ -461,42 +461,6 @@ static void tsi_serial_out(struct uart_port *p, int offset, int value) | |||
461 | writeb(value, p->membase + offset); | 461 | writeb(value, p->membase + offset); |
462 | } | 462 | } |
463 | 463 | ||
464 | /* Save the LCR value so it can be re-written when a Busy Detect IRQ occurs. */ | ||
465 | static inline void dwapb_save_out_value(struct uart_port *p, int offset, | ||
466 | int value) | ||
467 | { | ||
468 | struct uart_8250_port *up = | ||
469 | container_of(p, struct uart_8250_port, port); | ||
470 | |||
471 | if (offset == UART_LCR) | ||
472 | up->lcr = value; | ||
473 | } | ||
474 | |||
475 | /* Read the IER to ensure any interrupt is cleared before returning from ISR. */ | ||
476 | static inline void dwapb_check_clear_ier(struct uart_port *p, int offset) | ||
477 | { | ||
478 | if (offset == UART_TX || offset == UART_IER) | ||
479 | p->serial_in(p, UART_IER); | ||
480 | } | ||
481 | |||
482 | static void dwapb_serial_out(struct uart_port *p, int offset, int value) | ||
483 | { | ||
484 | int save_offset = offset; | ||
485 | offset = map_8250_out_reg(p, offset) << p->regshift; | ||
486 | dwapb_save_out_value(p, save_offset, value); | ||
487 | writeb(value, p->membase + offset); | ||
488 | dwapb_check_clear_ier(p, save_offset); | ||
489 | } | ||
490 | |||
491 | static void dwapb32_serial_out(struct uart_port *p, int offset, int value) | ||
492 | { | ||
493 | int save_offset = offset; | ||
494 | offset = map_8250_out_reg(p, offset) << p->regshift; | ||
495 | dwapb_save_out_value(p, save_offset, value); | ||
496 | writel(value, p->membase + offset); | ||
497 | dwapb_check_clear_ier(p, save_offset); | ||
498 | } | ||
499 | |||
500 | static unsigned int io_serial_in(struct uart_port *p, int offset) | 464 | static unsigned int io_serial_in(struct uart_port *p, int offset) |
501 | { | 465 | { |
502 | offset = map_8250_in_reg(p, offset) << p->regshift; | 466 | offset = map_8250_in_reg(p, offset) << p->regshift; |
@@ -542,16 +506,6 @@ static void set_io_from_upio(struct uart_port *p) | |||
542 | p->serial_out = tsi_serial_out; | 506 | p->serial_out = tsi_serial_out; |
543 | break; | 507 | break; |
544 | 508 | ||
545 | case UPIO_DWAPB: | ||
546 | p->serial_in = mem_serial_in; | ||
547 | p->serial_out = dwapb_serial_out; | ||
548 | break; | ||
549 | |||
550 | case UPIO_DWAPB32: | ||
551 | p->serial_in = mem32_serial_in; | ||
552 | p->serial_out = dwapb32_serial_out; | ||
553 | break; | ||
554 | |||
555 | default: | 509 | default: |
556 | p->serial_in = io_serial_in; | 510 | p->serial_in = io_serial_in; |
557 | p->serial_out = io_serial_out; | 511 | p->serial_out = io_serial_out; |
@@ -570,8 +524,6 @@ serial_out_sync(struct uart_8250_port *up, int offset, int value) | |||
570 | case UPIO_MEM: | 524 | case UPIO_MEM: |
571 | case UPIO_MEM32: | 525 | case UPIO_MEM32: |
572 | case UPIO_AU: | 526 | case UPIO_AU: |
573 | case UPIO_DWAPB: | ||
574 | case UPIO_DWAPB32: | ||
575 | p->serial_out(p, offset, value); | 527 | p->serial_out(p, offset, value); |
576 | p->serial_in(p, UART_LCR); /* safe, no side-effects */ | 528 | p->serial_in(p, UART_LCR); /* safe, no side-effects */ |
577 | break; | 529 | break; |
@@ -1679,23 +1631,7 @@ static irqreturn_t serial8250_interrupt(int irq, void *dev_id) | |||
1679 | port = &up->port; | 1631 | port = &up->port; |
1680 | 1632 | ||
1681 | if (port->handle_irq(port)) { | 1633 | if (port->handle_irq(port)) { |
1682 | |||
1683 | handled = 1; | 1634 | handled = 1; |
1684 | |||
1685 | end = NULL; | ||
1686 | } else if ((up->port.iotype == UPIO_DWAPB || | ||
1687 | up->port.iotype == UPIO_DWAPB32) && | ||
1688 | (iir & UART_IIR_BUSY) == UART_IIR_BUSY) { | ||
1689 | /* The DesignWare APB UART has an Busy Detect (0x07) | ||
1690 | * interrupt meaning an LCR write attempt occurred while the | ||
1691 | * UART was busy. The interrupt must be cleared by reading | ||
1692 | * the UART status register (USR) and the LCR re-written. */ | ||
1693 | unsigned int status; | ||
1694 | status = *(volatile u32 *)up->port.private_data; | ||
1695 | serial_out(up, UART_LCR, up->lcr); | ||
1696 | |||
1697 | handled = 1; | ||
1698 | |||
1699 | end = NULL; | 1635 | end = NULL; |
1700 | } else if (end == NULL) | 1636 | } else if (end == NULL) |
1701 | end = l; | 1637 | end = l; |
@@ -2592,8 +2528,6 @@ static int serial8250_request_std_resource(struct uart_8250_port *up) | |||
2592 | case UPIO_TSI: | 2528 | case UPIO_TSI: |
2593 | case UPIO_MEM32: | 2529 | case UPIO_MEM32: |
2594 | case UPIO_MEM: | 2530 | case UPIO_MEM: |
2595 | case UPIO_DWAPB: | ||
2596 | case UPIO_DWAPB32: | ||
2597 | if (!up->port.mapbase) | 2531 | if (!up->port.mapbase) |
2598 | break; | 2532 | break; |
2599 | 2533 | ||
@@ -2630,8 +2564,6 @@ static void serial8250_release_std_resource(struct uart_8250_port *up) | |||
2630 | case UPIO_TSI: | 2564 | case UPIO_TSI: |
2631 | case UPIO_MEM32: | 2565 | case UPIO_MEM32: |
2632 | case UPIO_MEM: | 2566 | case UPIO_MEM: |
2633 | case UPIO_DWAPB: | ||
2634 | case UPIO_DWAPB32: | ||
2635 | if (!up->port.mapbase) | 2567 | if (!up->port.mapbase) |
2636 | break; | 2568 | break; |
2637 | 2569 | ||