aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/staging
diff options
context:
space:
mode:
authorMark Einon <mark.einon@gmail.com>2011-10-19 20:18:42 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2011-10-23 04:07:11 -0400
commite592a9b06cdd9f1d5a6f8026f9ec8170ebf10ef5 (patch)
treee4451adf00d0eb97a4e663b02d32c530b89f01a4 /drivers/staging
parent6abafc164c13d4fa9e009d401ad7537991295add (diff)
staging: et131x: Fix issues when USE_FBR0 is not defined
* Following on from making rx_ring.fbr use a common structure - reversed the fbr[] array indicies so that index 1 = FBR0 and index 0 = FBR1, which allows USE_FBR0 define to work. * Also fixed up minor issues where indexes into the array were out of bounds in some places. * Removed rx_ring.fbr common stuct TODO item from README Signed-off-by: Mark Einon <mark.einon@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging')
-rw-r--r--drivers/staging/et131x/README1
-rw-r--r--drivers/staging/et131x/et131x.c304
2 files changed, 158 insertions, 147 deletions
diff --git a/drivers/staging/et131x/README b/drivers/staging/et131x/README
index a7b33dc5f093..1e0fcf468eb0 100644
--- a/drivers/staging/et131x/README
+++ b/drivers/staging/et131x/README
@@ -8,7 +8,6 @@ Note, the powermanagement options were removed from the vendor provided
8driver as they did not build properly at the time. 8driver as they did not build properly at the time.
9 9
10TODO: 10TODO:
11 - rx_ring.fbr{0, 1} can probably share a common structure
12 - Use of kmem_cache seems a bit unusual 11 - Use of kmem_cache seems a bit unusual
13 - Use dma_alloc_... in place of pci_alloc_... 12 - Use dma_alloc_... in place of pci_alloc_...
14 - It's too late stopping the tx queue when there is no room for the current packet. The condition should be detected for the next packet. 13 - It's too late stopping the tx queue when there is no room for the current packet. The condition should be detected for the next packet.
diff --git a/drivers/staging/et131x/et131x.c b/drivers/staging/et131x/et131x.c
index 0bc3e0426bcc..0fbb77d35c9c 100644
--- a/drivers/staging/et131x/et131x.c
+++ b/drivers/staging/et131x/et131x.c
@@ -322,10 +322,14 @@ struct fbr_lookup {
322/* 322/*
323 * struct rx_ring is the sructure representing the adaptor's local 323 * struct rx_ring is the sructure representing the adaptor's local
324 * reference(s) to the rings 324 * reference(s) to the rings
325 *
326 ******************************************************************************
327 * IMPORTANT NOTE :- fbr_lookup *fbr[NUM_FBRS] uses index 0 to refer to FBR1
328 * and index 1 to refer to FRB0
329 ******************************************************************************
325 */ 330 */
326struct rx_ring { 331struct rx_ring {
327 struct fbr_lookup *fbr[NUM_FBRS]; 332 struct fbr_lookup *fbr[NUM_FBRS];
328
329 void *ps_ring_virtaddr; 333 void *ps_ring_virtaddr;
330 dma_addr_t ps_ring_physaddr; 334 dma_addr_t ps_ring_physaddr;
331 u32 local_psr_full; 335 u32 local_psr_full;
@@ -1907,9 +1911,9 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
1907 1911
1908 /* Alloc memory for the lookup table */ 1912 /* Alloc memory for the lookup table */
1909#ifdef USE_FBR0 1913#ifdef USE_FBR0
1910 rx_ring->fbr[0] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL);
1911#endif
1912 rx_ring->fbr[1] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL); 1914 rx_ring->fbr[1] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL);
1915#endif
1916 rx_ring->fbr[0] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL);
1913 1917
1914 /* The first thing we will do is configure the sizes of the buffer 1918 /* The first thing we will do is configure the sizes of the buffer
1915 * rings. These will change based on jumbo packet support. Larger 1919 * rings. These will change based on jumbo packet support. Larger
@@ -1931,40 +1935,40 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
1931 1935
1932 if (adapter->registry_jumbo_packet < 2048) { 1936 if (adapter->registry_jumbo_packet < 2048) {
1933#ifdef USE_FBR0 1937#ifdef USE_FBR0
1934 rx_ring->fbr[0]->buffsize = 256; 1938 rx_ring->fbr[1]->buffsize = 256;
1935 rx_ring->fbr[0]->num_entries = 512;
1936#endif
1937 rx_ring->fbr[1]->buffsize = 2048;
1938 rx_ring->fbr[1]->num_entries = 512; 1939 rx_ring->fbr[1]->num_entries = 512;
1940#endif
1941 rx_ring->fbr[0]->buffsize = 2048;
1942 rx_ring->fbr[0]->num_entries = 512;
1939 } else if (adapter->registry_jumbo_packet < 4096) { 1943 } else if (adapter->registry_jumbo_packet < 4096) {
1940#ifdef USE_FBR0 1944#ifdef USE_FBR0
1941 rx_ring->fbr[0]->buffsize = 512; 1945 rx_ring->fbr[1]->buffsize = 512;
1942 rx_ring->fbr[0]->num_entries = 1024; 1946 rx_ring->fbr[1]->num_entries = 1024;
1943#endif 1947#endif
1944 rx_ring->fbr[1]->buffsize = 4096; 1948 rx_ring->fbr[0]->buffsize = 4096;
1945 rx_ring->fbr[1]->num_entries = 512; 1949 rx_ring->fbr[0]->num_entries = 512;
1946 } else { 1950 } else {
1947#ifdef USE_FBR0 1951#ifdef USE_FBR0
1948 rx_ring->fbr[0]->buffsize = 1024; 1952 rx_ring->fbr[1]->buffsize = 1024;
1949 rx_ring->fbr[0]->num_entries = 768; 1953 rx_ring->fbr[1]->num_entries = 768;
1950#endif 1954#endif
1951 rx_ring->fbr[1]->buffsize = 16384; 1955 rx_ring->fbr[0]->buffsize = 16384;
1952 rx_ring->fbr[1]->num_entries = 128; 1956 rx_ring->fbr[0]->num_entries = 128;
1953 } 1957 }
1954 1958
1955#ifdef USE_FBR0 1959#ifdef USE_FBR0
1956 adapter->rx_ring.psr_num_entries = adapter->rx_ring.fbr[0]->num_entries + 1960 adapter->rx_ring.psr_num_entries = adapter->rx_ring.fbr[1]->num_entries +
1957 adapter->rx_ring.fbr[1]->num_entries; 1961 adapter->rx_ring.fbr[0]->num_entries;
1958#else 1962#else
1959 adapter->rx_ring.psr_num_entries = adapter->rx_ring.fbr[1]->num_entries; 1963 adapter->rx_ring.psr_num_entries = adapter->rx_ring.fbr[0]->num_entries;
1960#endif 1964#endif
1961 1965
1962 /* Allocate an area of memory for Free Buffer Ring 1 */ 1966 /* Allocate an area of memory for Free Buffer Ring 1 */
1963 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[1]->num_entries) + 0xfff; 1967 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[0]->num_entries) + 0xfff;
1964 rx_ring->fbr[1]->ring_virtaddr = pci_alloc_consistent(adapter->pdev, 1968 rx_ring->fbr[0]->ring_virtaddr = pci_alloc_consistent(adapter->pdev,
1965 bufsize, 1969 bufsize,
1966 &rx_ring->fbr[1]->ring_physaddr); 1970 &rx_ring->fbr[0]->ring_physaddr);
1967 if (!rx_ring->fbr[1]->ring_virtaddr) { 1971 if (!rx_ring->fbr[0]->ring_virtaddr) {
1968 dev_err(&adapter->pdev->dev, 1972 dev_err(&adapter->pdev->dev,
1969 "Cannot alloc memory for Free Buffer Ring 1\n"); 1973 "Cannot alloc memory for Free Buffer Ring 1\n");
1970 return -ENOMEM; 1974 return -ENOMEM;
@@ -1977,24 +1981,24 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
1977 * are ever returned, make sure the high part is retrieved here 1981 * are ever returned, make sure the high part is retrieved here
1978 * before storing the adjusted address. 1982 * before storing the adjusted address.
1979 */ 1983 */
1980 rx_ring->fbr[1]->real_physaddr = rx_ring->fbr[1]->ring_physaddr; 1984 rx_ring->fbr[0]->real_physaddr = rx_ring->fbr[0]->ring_physaddr;
1981 1985
1982 /* Align Free Buffer Ring 1 on a 4K boundary */ 1986 /* Align Free Buffer Ring 1 on a 4K boundary */
1983 et131x_align_allocated_memory(adapter, 1987 et131x_align_allocated_memory(adapter,
1984 &rx_ring->fbr[1]->real_physaddr, 1988 &rx_ring->fbr[0]->real_physaddr,
1985 &rx_ring->fbr[1]->offset, 0x0FFF); 1989 &rx_ring->fbr[0]->offset, 0x0FFF);
1986 1990
1987 rx_ring->fbr[1]->ring_virtaddr = 1991 rx_ring->fbr[0]->ring_virtaddr =
1988 (void *)((u8 *) rx_ring->fbr[1]->ring_virtaddr + 1992 (void *)((u8 *) rx_ring->fbr[0]->ring_virtaddr +
1989 rx_ring->fbr[1]->offset); 1993 rx_ring->fbr[0]->offset);
1990 1994
1991#ifdef USE_FBR0 1995#ifdef USE_FBR0
1992 /* Allocate an area of memory for Free Buffer Ring 0 */ 1996 /* Allocate an area of memory for Free Buffer Ring 0 */
1993 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[0]->num_entries) + 0xfff; 1997 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[1]->num_entries) + 0xfff;
1994 rx_ring->fbr[0]->ring_virtaddr = pci_alloc_consistent(adapter->pdev, 1998 rx_ring->fbr[1]->ring_virtaddr = pci_alloc_consistent(adapter->pdev,
1995 bufsize, 1999 bufsize,
1996 &rx_ring->fbr[0]->ring_physaddr); 2000 &rx_ring->fbr[1]->ring_physaddr);
1997 if (!rx_ring->fbr[0]->ring_virtaddr) { 2001 if (!rx_ring->fbr[1]->ring_virtaddr) {
1998 dev_err(&adapter->pdev->dev, 2002 dev_err(&adapter->pdev->dev,
1999 "Cannot alloc memory for Free Buffer Ring 0\n"); 2003 "Cannot alloc memory for Free Buffer Ring 0\n");
2000 return -ENOMEM; 2004 return -ENOMEM;
@@ -2007,18 +2011,18 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2007 * are ever returned, make sure the high part is retrieved here before 2011 * are ever returned, make sure the high part is retrieved here before
2008 * storing the adjusted address. 2012 * storing the adjusted address.
2009 */ 2013 */
2010 rx_ring->fbr[0]->real_physaddr = rx_ring->fbr[0]->ring_physaddr; 2014 rx_ring->fbr[1]->real_physaddr = rx_ring->fbr[1]->ring_physaddr;
2011 2015
2012 /* Align Free Buffer Ring 0 on a 4K boundary */ 2016 /* Align Free Buffer Ring 0 on a 4K boundary */
2013 et131x_align_allocated_memory(adapter, 2017 et131x_align_allocated_memory(adapter,
2014 &rx_ring->fbr[0]->real_physaddr, 2018 &rx_ring->fbr[1]->real_physaddr,
2015 &rx_ring->fbr[0]->offset, 0x0FFF); 2019 &rx_ring->fbr[1]->offset, 0x0FFF);
2016 2020
2017 rx_ring->fbr[0]->ring_virtaddr = 2021 rx_ring->fbr[1]->ring_virtaddr =
2018 (void *)((u8 *) rx_ring->fbr[0]->ring_virtaddr + 2022 (void *)((u8 *) rx_ring->fbr[1]->ring_virtaddr +
2019 rx_ring->fbr[0]->offset); 2023 rx_ring->fbr[1]->offset);
2020#endif 2024#endif
2021 for (i = 0; i < (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); i++) { 2025 for (i = 0; i < (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); i++) {
2022 u64 fbr1_offset; 2026 u64 fbr1_offset;
2023 u64 fbr1_tmp_physaddr; 2027 u64 fbr1_tmp_physaddr;
2024 u32 fbr1_align; 2028 u32 fbr1_align;
@@ -2030,25 +2034,25 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2030 * the size of FBR0. By allocating N buffers at once, we 2034 * the size of FBR0. By allocating N buffers at once, we
2031 * reduce this overhead. 2035 * reduce this overhead.
2032 */ 2036 */
2033 if (rx_ring->fbr[1]->buffsize > 4096) 2037 if (rx_ring->fbr[0]->buffsize > 4096)
2034 fbr1_align = 4096; 2038 fbr1_align = 4096;
2035 else 2039 else
2036 fbr1_align = rx_ring->fbr[1]->buffsize; 2040 fbr1_align = rx_ring->fbr[0]->buffsize;
2037 2041
2038 fbr_chunksize = 2042 fbr_chunksize =
2039 (FBR_CHUNKS * rx_ring->fbr[1]->buffsize) + fbr1_align - 1; 2043 (FBR_CHUNKS * rx_ring->fbr[0]->buffsize) + fbr1_align - 1;
2040 rx_ring->fbr[1]->mem_virtaddrs[i] = 2044 rx_ring->fbr[0]->mem_virtaddrs[i] =
2041 pci_alloc_consistent(adapter->pdev, fbr_chunksize, 2045 pci_alloc_consistent(adapter->pdev, fbr_chunksize,
2042 &rx_ring->fbr[1]->mem_physaddrs[i]); 2046 &rx_ring->fbr[0]->mem_physaddrs[i]);
2043 2047
2044 if (!rx_ring->fbr[1]->mem_virtaddrs[i]) { 2048 if (!rx_ring->fbr[0]->mem_virtaddrs[i]) {
2045 dev_err(&adapter->pdev->dev, 2049 dev_err(&adapter->pdev->dev,
2046 "Could not alloc memory\n"); 2050 "Could not alloc memory\n");
2047 return -ENOMEM; 2051 return -ENOMEM;
2048 } 2052 }
2049 2053
2050 /* See NOTE in "Save Physical Address" comment above */ 2054 /* See NOTE in "Save Physical Address" comment above */
2051 fbr1_tmp_physaddr = rx_ring->fbr[1]->mem_physaddrs[i]; 2055 fbr1_tmp_physaddr = rx_ring->fbr[0]->mem_physaddrs[i];
2052 2056
2053 et131x_align_allocated_memory(adapter, 2057 et131x_align_allocated_memory(adapter,
2054 &fbr1_tmp_physaddr, 2058 &fbr1_tmp_physaddr,
@@ -2060,71 +2064,71 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2060 /* Save the Virtual address of this index for quick 2064 /* Save the Virtual address of this index for quick
2061 * access later 2065 * access later
2062 */ 2066 */
2063 rx_ring->fbr[1]->virt[index] = 2067 rx_ring->fbr[0]->virt[index] =
2064 (u8 *) rx_ring->fbr[1]->mem_virtaddrs[i] + 2068 (u8 *) rx_ring->fbr[0]->mem_virtaddrs[i] +
2065 (j * rx_ring->fbr[1]->buffsize) + fbr1_offset; 2069 (j * rx_ring->fbr[0]->buffsize) + fbr1_offset;
2066 2070
2067 /* now store the physical address in the descriptor 2071 /* now store the physical address in the descriptor
2068 * so the device can access it 2072 * so the device can access it
2069 */ 2073 */
2070 rx_ring->fbr[1]->bus_high[index] = 2074 rx_ring->fbr[0]->bus_high[index] =
2071 (u32) (fbr1_tmp_physaddr >> 32); 2075 (u32) (fbr1_tmp_physaddr >> 32);
2072 rx_ring->fbr[1]->bus_low[index] = 2076 rx_ring->fbr[0]->bus_low[index] =
2073 (u32) fbr1_tmp_physaddr; 2077 (u32) fbr1_tmp_physaddr;
2074 2078
2075 fbr1_tmp_physaddr += rx_ring->fbr[1]->buffsize; 2079 fbr1_tmp_physaddr += rx_ring->fbr[0]->buffsize;
2076 2080
2077 rx_ring->fbr[1]->buffer1[index] = 2081 rx_ring->fbr[0]->buffer1[index] =
2078 rx_ring->fbr[1]->virt[index]; 2082 rx_ring->fbr[0]->virt[index];
2079 rx_ring->fbr[1]->buffer2[index] = 2083 rx_ring->fbr[0]->buffer2[index] =
2080 rx_ring->fbr[1]->virt[index] - 4; 2084 rx_ring->fbr[0]->virt[index] - 4;
2081 } 2085 }
2082 } 2086 }
2083 2087
2084#ifdef USE_FBR0 2088#ifdef USE_FBR0
2085 /* Same for FBR0 (if in use) */ 2089 /* Same for FBR0 (if in use) */
2086 for (i = 0; i < (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); i++) { 2090 for (i = 0; i < (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); i++) {
2087 u64 fbr0_offset; 2091 u64 fbr0_offset;
2088 u64 fbr0_tmp_physaddr; 2092 u64 fbr0_tmp_physaddr;
2089 2093
2090 fbr_chunksize = 2094 fbr_chunksize =
2091 ((FBR_CHUNKS + 1) * rx_ring->fbr[0]->buffsize) - 1; 2095 ((FBR_CHUNKS + 1) * rx_ring->fbr[1]->buffsize) - 1;
2092 rx_ring->fbr[0]->mem_virtaddrs[i] = 2096 rx_ring->fbr[1]->mem_virtaddrs[i] =
2093 pci_alloc_consistent(adapter->pdev, fbr_chunksize, 2097 pci_alloc_consistent(adapter->pdev, fbr_chunksize,
2094 &rx_ring->fbr[0]->mem_physaddrs[i]); 2098 &rx_ring->fbr[1]->mem_physaddrs[i]);
2095 2099
2096 if (!rx_ring->fbr[0]->mem_virtaddrs[i]) { 2100 if (!rx_ring->fbr[1]->mem_virtaddrs[i]) {
2097 dev_err(&adapter->pdev->dev, 2101 dev_err(&adapter->pdev->dev,
2098 "Could not alloc memory\n"); 2102 "Could not alloc memory\n");
2099 return -ENOMEM; 2103 return -ENOMEM;
2100 } 2104 }
2101 2105
2102 /* See NOTE in "Save Physical Address" comment above */ 2106 /* See NOTE in "Save Physical Address" comment above */
2103 fbr0_tmp_physaddr = rx_ring->fbr[0]->mem_physaddrs[i]; 2107 fbr0_tmp_physaddr = rx_ring->fbr[1]->mem_physaddrs[i];
2104 2108
2105 et131x_align_allocated_memory(adapter, 2109 et131x_align_allocated_memory(adapter,
2106 &fbr0_tmp_physaddr, 2110 &fbr0_tmp_physaddr,
2107 &fbr0_offset, 2111 &fbr0_offset,
2108 rx_ring->fbr[0]->buffsize - 1); 2112 rx_ring->fbr[1]->buffsize - 1);
2109 2113
2110 for (j = 0; j < FBR_CHUNKS; j++) { 2114 for (j = 0; j < FBR_CHUNKS; j++) {
2111 u32 index = (i * FBR_CHUNKS) + j; 2115 u32 index = (i * FBR_CHUNKS) + j;
2112 2116
2113 rx_ring->fbr[0]->virt[index] = 2117 rx_ring->fbr[1]->virt[index] =
2114 (u8 *) rx_ring->fbr[0]->mem_virtaddrs[i] + 2118 (u8 *) rx_ring->fbr[1]->mem_virtaddrs[i] +
2115 (j * rx_ring->fbr[0]->buffsize) + fbr0_offset; 2119 (j * rx_ring->fbr[1]->buffsize) + fbr0_offset;
2116 2120
2117 rx_ring->fbr[0]->bus_high[index] = 2121 rx_ring->fbr[1]->bus_high[index] =
2118 (u32) (fbr0_tmp_physaddr >> 32); 2122 (u32) (fbr0_tmp_physaddr >> 32);
2119 rx_ring->fbr[0]->bus_low[index] = 2123 rx_ring->fbr[1]->bus_low[index] =
2120 (u32) fbr0_tmp_physaddr; 2124 (u32) fbr0_tmp_physaddr;
2121 2125
2122 fbr0_tmp_physaddr += rx_ring->fbr[0]->buffsize; 2126 fbr0_tmp_physaddr += rx_ring->fbr[1]->buffsize;
2123 2127
2124 rx_ring->fbr[0]->buffer1[index] = 2128 rx_ring->fbr[1]->buffer1[index] =
2125 rx_ring->fbr[0]->virt[index]; 2129 rx_ring->fbr[1]->virt[index];
2126 rx_ring->fbr[0]->buffer2[index] = 2130 rx_ring->fbr[1]->buffer2[index] =
2127 rx_ring->fbr[0]->virt[index] - 4; 2131 rx_ring->fbr[1]->virt[index] - 4;
2128 } 2132 }
2129 } 2133 }
2130#endif 2134#endif
@@ -2214,78 +2218,78 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
2214 } 2218 }
2215 2219
2216 /* Free Free Buffer Ring 1 */ 2220 /* Free Free Buffer Ring 1 */
2217 if (rx_ring->fbr[1]->ring_virtaddr) { 2221 if (rx_ring->fbr[0]->ring_virtaddr) {
2218 /* First the packet memory */ 2222 /* First the packet memory */
2219 for (index = 0; index < 2223 for (index = 0; index <
2220 (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); index++) { 2224 (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); index++) {
2221 if (rx_ring->fbr[1]->mem_virtaddrs[index]) { 2225 if (rx_ring->fbr[0]->mem_virtaddrs[index]) {
2222 u32 fbr1_align; 2226 u32 fbr1_align;
2223 2227
2224 if (rx_ring->fbr[1]->buffsize > 4096) 2228 if (rx_ring->fbr[0]->buffsize > 4096)
2225 fbr1_align = 4096; 2229 fbr1_align = 4096;
2226 else 2230 else
2227 fbr1_align = rx_ring->fbr[1]->buffsize; 2231 fbr1_align = rx_ring->fbr[0]->buffsize;
2228 2232
2229 bufsize = 2233 bufsize =
2230 (rx_ring->fbr[1]->buffsize * FBR_CHUNKS) + 2234 (rx_ring->fbr[0]->buffsize * FBR_CHUNKS) +
2231 fbr1_align - 1; 2235 fbr1_align - 1;
2232 2236
2233 pci_free_consistent(adapter->pdev, 2237 pci_free_consistent(adapter->pdev,
2234 bufsize, 2238 bufsize,
2235 rx_ring->fbr[1]->mem_virtaddrs[index], 2239 rx_ring->fbr[0]->mem_virtaddrs[index],
2236 rx_ring->fbr[1]->mem_physaddrs[index]); 2240 rx_ring->fbr[0]->mem_physaddrs[index]);
2237 2241
2238 rx_ring->fbr[1]->mem_virtaddrs[index] = NULL; 2242 rx_ring->fbr[0]->mem_virtaddrs[index] = NULL;
2239 } 2243 }
2240 } 2244 }
2241 2245
2242 /* Now the FIFO itself */ 2246 /* Now the FIFO itself */
2243 rx_ring->fbr[1]->ring_virtaddr = (void *)((u8 *) 2247 rx_ring->fbr[0]->ring_virtaddr = (void *)((u8 *)
2244 rx_ring->fbr[1]->ring_virtaddr - rx_ring->fbr[1]->offset); 2248 rx_ring->fbr[0]->ring_virtaddr - rx_ring->fbr[0]->offset);
2245 2249
2246 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[1]->num_entries) 2250 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[0]->num_entries)
2247 + 0xfff; 2251 + 0xfff;
2248 2252
2249 pci_free_consistent(adapter->pdev, bufsize, 2253 pci_free_consistent(adapter->pdev, bufsize,
2250 rx_ring->fbr[1]->ring_virtaddr, 2254 rx_ring->fbr[0]->ring_virtaddr,
2251 rx_ring->fbr[1]->ring_physaddr); 2255 rx_ring->fbr[0]->ring_physaddr);
2252 2256
2253 rx_ring->fbr[1]->ring_virtaddr = NULL; 2257 rx_ring->fbr[0]->ring_virtaddr = NULL;
2254 } 2258 }
2255 2259
2256#ifdef USE_FBR0 2260#ifdef USE_FBR0
2257 /* Now the same for Free Buffer Ring 0 */ 2261 /* Now the same for Free Buffer Ring 0 */
2258 if (rx_ring->fbr[0]->ring_virtaddr) { 2262 if (rx_ring->fbr[1]->ring_virtaddr) {
2259 /* First the packet memory */ 2263 /* First the packet memory */
2260 for (index = 0; index < 2264 for (index = 0; index <
2261 (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); index++) { 2265 (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); index++) {
2262 if (rx_ring->fbr[0]->mem_virtaddrs[index]) { 2266 if (rx_ring->fbr[1]->mem_virtaddrs[index]) {
2263 bufsize = 2267 bufsize =
2264 (rx_ring->fbr[0]->buffsize * 2268 (rx_ring->fbr[1]->buffsize *
2265 (FBR_CHUNKS + 1)) - 1; 2269 (FBR_CHUNKS + 1)) - 1;
2266 2270
2267 pci_free_consistent(adapter->pdev, 2271 pci_free_consistent(adapter->pdev,
2268 bufsize, 2272 bufsize,
2269 rx_ring->fbr[0]->mem_virtaddrs[index], 2273 rx_ring->fbr[1]->mem_virtaddrs[index],
2270 rx_ring->fbr[0]->mem_physaddrs[index]); 2274 rx_ring->fbr[1]->mem_physaddrs[index]);
2271 2275
2272 rx_ring->fbr[0]->mem_virtaddrs[index] = NULL; 2276 rx_ring->fbr[1]->mem_virtaddrs[index] = NULL;
2273 } 2277 }
2274 } 2278 }
2275 2279
2276 /* Now the FIFO itself */ 2280 /* Now the FIFO itself */
2277 rx_ring->fbr[0]->ring_virtaddr = (void *)((u8 *) 2281 rx_ring->fbr[1]->ring_virtaddr = (void *)((u8 *)
2278 rx_ring->fbr[0]->ring_virtaddr - rx_ring->fbr[0]->offset); 2282 rx_ring->fbr[1]->ring_virtaddr - rx_ring->fbr[1]->offset);
2279 2283
2280 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[0]->num_entries) 2284 bufsize = (sizeof(struct fbr_desc) * rx_ring->fbr[1]->num_entries)
2281 + 0xfff; 2285 + 0xfff;
2282 2286
2283 pci_free_consistent(adapter->pdev, 2287 pci_free_consistent(adapter->pdev,
2284 bufsize, 2288 bufsize,
2285 rx_ring->fbr[0]->ring_virtaddr, 2289 rx_ring->fbr[1]->ring_virtaddr,
2286 rx_ring->fbr[0]->ring_physaddr); 2290 rx_ring->fbr[1]->ring_physaddr);
2287 2291
2288 rx_ring->fbr[0]->ring_virtaddr = NULL; 2292 rx_ring->fbr[1]->ring_virtaddr = NULL;
2289 } 2293 }
2290#endif 2294#endif
2291 2295
@@ -2322,10 +2326,10 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
2322 2326
2323 /* Free the FBR Lookup Table */ 2327 /* Free the FBR Lookup Table */
2324#ifdef USE_FBR0 2328#ifdef USE_FBR0
2325 kfree(rx_ring->fbr[0]); 2329 kfree(rx_ring->fbr[1]);
2326#endif 2330#endif
2327 2331
2328 kfree(rx_ring->fbr[1]); 2332 kfree(rx_ring->fbr[0]);
2329 2333
2330 /* Reset Counters */ 2334 /* Reset Counters */
2331 rx_ring->num_ready_recv = 0; 2335 rx_ring->num_ready_recv = 0;
@@ -2431,10 +2435,10 @@ void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
2431 rx_local->local_psr_full = 0; 2435 rx_local->local_psr_full = 0;
2432 2436
2433 /* Now's the best time to initialize FBR1 contents */ 2437 /* Now's the best time to initialize FBR1 contents */
2434 fbr_entry = (struct fbr_desc *) rx_local->fbr[1]->ring_virtaddr; 2438 fbr_entry = (struct fbr_desc *) rx_local->fbr[0]->ring_virtaddr;
2435 for (entry = 0; entry < rx_local->fbr[1]->num_entries; entry++) { 2439 for (entry = 0; entry < rx_local->fbr[0]->num_entries; entry++) {
2436 fbr_entry->addr_hi = rx_local->fbr[1]->bus_high[entry]; 2440 fbr_entry->addr_hi = rx_local->fbr[0]->bus_high[entry];
2437 fbr_entry->addr_lo = rx_local->fbr[1]->bus_low[entry]; 2441 fbr_entry->addr_lo = rx_local->fbr[0]->bus_low[entry];
2438 fbr_entry->word2 = entry; 2442 fbr_entry->word2 = entry;
2439 fbr_entry++; 2443 fbr_entry++;
2440 } 2444 }
@@ -2442,42 +2446,42 @@ void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
2442 /* Set the address and parameters of Free buffer ring 1 (and 0 if 2446 /* Set the address and parameters of Free buffer ring 1 (and 0 if
2443 * required) into the 1310's registers 2447 * required) into the 1310's registers
2444 */ 2448 */
2445 writel((u32) (rx_local->fbr[1]->real_physaddr >> 32), 2449 writel((u32) (rx_local->fbr[0]->real_physaddr >> 32),
2446 &rx_dma->fbr1_base_hi); 2450 &rx_dma->fbr1_base_hi);
2447 writel((u32) rx_local->fbr[1]->real_physaddr, &rx_dma->fbr1_base_lo); 2451 writel((u32) rx_local->fbr[0]->real_physaddr, &rx_dma->fbr1_base_lo);
2448 writel(rx_local->fbr[1]->num_entries - 1, &rx_dma->fbr1_num_des); 2452 writel(rx_local->fbr[0]->num_entries - 1, &rx_dma->fbr1_num_des);
2449 writel(ET_DMA10_WRAP, &rx_dma->fbr1_full_offset); 2453 writel(ET_DMA10_WRAP, &rx_dma->fbr1_full_offset);
2450 2454
2451 /* This variable tracks the free buffer ring 1 full position, so it 2455 /* This variable tracks the free buffer ring 1 full position, so it
2452 * has to match the above. 2456 * has to match the above.
2453 */ 2457 */
2454 rx_local->fbr[1]->local_full = ET_DMA10_WRAP; 2458 rx_local->fbr[0]->local_full = ET_DMA10_WRAP;
2455 writel( 2459 writel(
2456 ((rx_local->fbr[1]->num_entries * LO_MARK_PERCENT_FOR_RX) / 100) - 1, 2460 ((rx_local->fbr[0]->num_entries * LO_MARK_PERCENT_FOR_RX) / 100) - 1,
2457 &rx_dma->fbr1_min_des); 2461 &rx_dma->fbr1_min_des);
2458 2462
2459#ifdef USE_FBR0 2463#ifdef USE_FBR0
2460 /* Now's the best time to initialize FBR0 contents */ 2464 /* Now's the best time to initialize FBR0 contents */
2461 fbr_entry = (struct fbr_desc *) rx_local->fbr[0]->ring_virtaddr; 2465 fbr_entry = (struct fbr_desc *) rx_local->fbr[1]->ring_virtaddr;
2462 for (entry = 0; entry < rx_local->fbr[0]->num_entries; entry++) { 2466 for (entry = 0; entry < rx_local->fbr[1]->num_entries; entry++) {
2463 fbr_entry->addr_hi = rx_local->fbr[0]->bus_high[entry]; 2467 fbr_entry->addr_hi = rx_local->fbr[1]->bus_high[entry];
2464 fbr_entry->addr_lo = rx_local->fbr[0]->bus_low[entry]; 2468 fbr_entry->addr_lo = rx_local->fbr[1]->bus_low[entry];
2465 fbr_entry->word2 = entry; 2469 fbr_entry->word2 = entry;
2466 fbr_entry++; 2470 fbr_entry++;
2467 } 2471 }
2468 2472
2469 writel((u32) (rx_local->fbr[0]->real_physaddr >> 32), 2473 writel((u32) (rx_local->fbr[1]->real_physaddr >> 32),
2470 &rx_dma->fbr0_base_hi); 2474 &rx_dma->fbr0_base_hi);
2471 writel((u32) rx_local->fbr[0]->real_physaddr, &rx_dma->fbr0_base_lo); 2475 writel((u32) rx_local->fbr[1]->real_physaddr, &rx_dma->fbr0_base_lo);
2472 writel(rx_local->fbr[0]->num_entries - 1, &rx_dma->fbr0_num_des); 2476 writel(rx_local->fbr[1]->num_entries - 1, &rx_dma->fbr0_num_des);
2473 writel(ET_DMA10_WRAP, &rx_dma->fbr0_full_offset); 2477 writel(ET_DMA10_WRAP, &rx_dma->fbr0_full_offset);
2474 2478
2475 /* This variable tracks the free buffer ring 0 full position, so it 2479 /* This variable tracks the free buffer ring 0 full position, so it
2476 * has to match the above. 2480 * has to match the above.
2477 */ 2481 */
2478 rx_local->fbr[0]->local_full = ET_DMA10_WRAP; 2482 rx_local->fbr[1]->local_full = ET_DMA10_WRAP;
2479 writel( 2483 writel(
2480 ((rx_local->fbr[0]->num_entries * LO_MARK_PERCENT_FOR_RX) / 100) - 1, 2484 ((rx_local->fbr[1]->num_entries * LO_MARK_PERCENT_FOR_RX) / 100) - 1,
2481 &rx_dma->fbr0_min_des); 2485 &rx_dma->fbr0_min_des);
2482#endif 2486#endif
2483 2487
@@ -2536,45 +2540,45 @@ static void nic_return_rfd(struct et131x_adapter *adapter, struct rfd *rfd)
2536 */ 2540 */
2537 if ( 2541 if (
2538#ifdef USE_FBR0 2542#ifdef USE_FBR0
2539 (ring_index == 0 && buff_index < rx_local->fbr[0]->num_entries) || 2543 (ring_index == 0 && buff_index < rx_local->fbr[1]->num_entries) ||
2540#endif 2544#endif
2541 (ring_index == 1 && buff_index < rx_local->fbr[1]->num_entries)) { 2545 (ring_index == 1 && buff_index < rx_local->fbr[0]->num_entries)) {
2542 spin_lock_irqsave(&adapter->fbr_lock, flags); 2546 spin_lock_irqsave(&adapter->fbr_lock, flags);
2543 2547
2544 if (ring_index == 1) { 2548 if (ring_index == 1) {
2545 struct fbr_desc *next = 2549 struct fbr_desc *next =
2546 (struct fbr_desc *) (rx_local->fbr[1]->ring_virtaddr) + 2550 (struct fbr_desc *) (rx_local->fbr[0]->ring_virtaddr) +
2547 INDEX10(rx_local->fbr[1]->local_full); 2551 INDEX10(rx_local->fbr[0]->local_full);
2548 2552
2549 /* Handle the Free Buffer Ring advancement here. Write 2553 /* Handle the Free Buffer Ring advancement here. Write
2550 * the PA / Buffer Index for the returned buffer into 2554 * the PA / Buffer Index for the returned buffer into
2551 * the oldest (next to be freed)FBR entry 2555 * the oldest (next to be freed)FBR entry
2552 */ 2556 */
2553 next->addr_hi = rx_local->fbr[1]->bus_high[buff_index]; 2557 next->addr_hi = rx_local->fbr[0]->bus_high[buff_index];
2554 next->addr_lo = rx_local->fbr[1]->bus_low[buff_index]; 2558 next->addr_lo = rx_local->fbr[0]->bus_low[buff_index];
2555 next->word2 = buff_index; 2559 next->word2 = buff_index;
2556 2560
2557 writel(bump_free_buff_ring(&rx_local->fbr[1]->local_full, 2561 writel(bump_free_buff_ring(&rx_local->fbr[0]->local_full,
2558 rx_local->fbr[1]->num_entries - 1), 2562 rx_local->fbr[0]->num_entries - 1),
2559 &rx_dma->fbr1_full_offset); 2563 &rx_dma->fbr1_full_offset);
2560 } 2564 }
2561#ifdef USE_FBR0 2565#ifdef USE_FBR0
2562 else { 2566 else {
2563 struct fbr_desc *next = (struct fbr_desc *) 2567 struct fbr_desc *next = (struct fbr_desc *)
2564 rx_local->fbr[0]->ring_virtaddr + 2568 rx_local->fbr[1]->ring_virtaddr +
2565 INDEX10(rx_local->fbr[0]->local_full); 2569 INDEX10(rx_local->fbr[1]->local_full);
2566 2570
2567 /* Handle the Free Buffer Ring advancement here. Write 2571 /* Handle the Free Buffer Ring advancement here. Write
2568 * the PA / Buffer Index for the returned buffer into 2572 * the PA / Buffer Index for the returned buffer into
2569 * the oldest (next to be freed) FBR entry 2573 * the oldest (next to be freed) FBR entry
2570 */ 2574 */
2571 next->addr_hi = rx_local->fbr[0]->bus_high[buff_index]; 2575 next->addr_hi = rx_local->fbr[1]->bus_high[buff_index];
2572 next->addr_lo = rx_local->fbr[0]->bus_low[buff_index]; 2576 next->addr_lo = rx_local->fbr[1]->bus_low[buff_index];
2573 next->word2 = buff_index; 2577 next->word2 = buff_index;
2574 2578
2575 writel(bump_free_buff_ring( 2579 writel(bump_free_buff_ring(
2576 &rx_local->fbr[0]->local_full, 2580 &rx_local->fbr[1]->local_full,
2577 rx_local->fbr[0]->num_entries - 1), 2581 rx_local->fbr[1]->num_entries - 1),
2578 &rx_dma->fbr0_full_offset); 2582 &rx_dma->fbr0_full_offset);
2579 } 2583 }
2580#endif 2584#endif
@@ -2624,19 +2628,19 @@ void et131x_rx_dma_enable(struct et131x_adapter *adapter)
2624 /* Setup the receive dma configuration register for normal operation */ 2628 /* Setup the receive dma configuration register for normal operation */
2625 u32 csr = 0x2000; /* FBR1 enable */ 2629 u32 csr = 0x2000; /* FBR1 enable */
2626 2630
2627 if (adapter->rx_ring.fbr[1]->buffsize == 4096) 2631 if (adapter->rx_ring.fbr[0]->buffsize == 4096)
2628 csr |= 0x0800; 2632 csr |= 0x0800;
2629 else if (adapter->rx_ring.fbr[1]->buffsize == 8192) 2633 else if (adapter->rx_ring.fbr[0]->buffsize == 8192)
2630 csr |= 0x1000; 2634 csr |= 0x1000;
2631 else if (adapter->rx_ring.fbr[1]->buffsize == 16384) 2635 else if (adapter->rx_ring.fbr[0]->buffsize == 16384)
2632 csr |= 0x1800; 2636 csr |= 0x1800;
2633#ifdef USE_FBR0 2637#ifdef USE_FBR0
2634 csr |= 0x0400; /* FBR0 enable */ 2638 csr |= 0x0400; /* FBR0 enable */
2635 if (adapter->rx_ring.fbr[0]->buffsize == 256) 2639 if (adapter->rx_ring.fbr[1]->buffsize == 256)
2636 csr |= 0x0100; 2640 csr |= 0x0100;
2637 else if (adapter->rx_ring.fbr[0]->buffsize == 512) 2641 else if (adapter->rx_ring.fbr[1]->buffsize == 512)
2638 csr |= 0x0200; 2642 csr |= 0x0200;
2639 else if (adapter->rx_ring.fbr[0]->buffsize == 1024) 2643 else if (adapter->rx_ring.fbr[1]->buffsize == 1024)
2640 csr |= 0x0300; 2644 csr |= 0x0300;
2641#endif 2645#endif
2642 writel(csr, &adapter->regs->rxdma.csr); 2646 writel(csr, &adapter->regs->rxdma.csr);
@@ -2737,11 +2741,11 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)
2737#ifdef USE_FBR0 2741#ifdef USE_FBR0
2738 if (ring_index > 1 || 2742 if (ring_index > 1 ||
2739 (ring_index == 0 && 2743 (ring_index == 0 &&
2740 buff_index > rx_local->fbr[0]->num_entries - 1) || 2744 buff_index > rx_local->fbr[1]->num_entries - 1) ||
2741 (ring_index == 1 && 2745 (ring_index == 1 &&
2742 buff_index > rx_local->fbr[1]->num_entries - 1)) 2746 buff_index > rx_local->fbr[0]->num_entries - 1))
2743#else 2747#else
2744 if (ring_index != 1 || buff_index > rx_local->fbr[1]->num_entries - 1) 2748 if (ring_index != 1 || buff_index > rx_local->fbr[0]->num_entries - 1)
2745#endif 2749#endif
2746 { 2750 {
2747 /* Illegal buffer or ring index cannot be used by S/W*/ 2751 /* Illegal buffer or ring index cannot be used by S/W*/
@@ -2800,7 +2804,11 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)
2800 ET131X_PACKET_TYPE_PROMISCUOUS) 2804 ET131X_PACKET_TYPE_PROMISCUOUS)
2801 && !(adapter->packet_filter & 2805 && !(adapter->packet_filter &
2802 ET131X_PACKET_TYPE_ALL_MULTICAST)) { 2806 ET131X_PACKET_TYPE_ALL_MULTICAST)) {
2803 buf = rx_local->fbr[ring_index]-> 2807 /*
2808 * Note - ring_index for fbr[] array is reversed
2809 * 1 for FBR0 etc
2810 */
2811 buf = rx_local->fbr[(ring_index == 0 ? 1 : 0)]->
2804 virt[buff_index]; 2812 virt[buff_index];
2805 2813
2806 /* Loop through our list to see if the 2814 /* Loop through our list to see if the
@@ -2865,8 +2873,12 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)
2865 2873
2866 adapter->net_stats.rx_bytes += rfd->len; 2874 adapter->net_stats.rx_bytes += rfd->len;
2867 2875
2876 /*
2877 * Note - ring_index for fbr[] array is reversed,
2878 * 1 for FBR0 etc
2879 */
2868 memcpy(skb_put(skb, rfd->len), 2880 memcpy(skb_put(skb, rfd->len),
2869 rx_local->fbr[ring_index]->virt[buff_index], 2881 rx_local->fbr[(ring_index == 0 ? 1 : 0)]->virt[buff_index],
2870 rfd->len); 2882 rfd->len);
2871 2883
2872 skb->dev = adapter->netdev; 2884 skb->dev = adapter->netdev;