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authorJonathan Cameron <jic23@cam.ac.uk>2011-05-18 09:42:26 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-19 19:15:03 -0400
commit7b2fdd192fede94d88e2e31826031e759f30908e (patch)
treed3209ba2dd66f87d1e4e0c1244a17212c6bd091e /drivers/staging
parentcc4a48e4cf92776656633aeb895520dc53893f32 (diff)
staging:iio: Rip out helper for software rings.
It seemed like a good idea at the time, it wasn't. The code with this in place is larger and more complex for no real gain. Basically we've cleaned up the core around it so much that this no longer makes sense. Only really effects the lis3l02dq driver. Signed-off-by: Jonathan Cameron <jic23@cam.acuk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging')
-rw-r--r--drivers/staging/iio/accel/lis3l02dq.h10
-rw-r--r--drivers/staging/iio/accel/lis3l02dq_core.c154
-rw-r--r--drivers/staging/iio/accel/lis3l02dq_ring.c88
-rw-r--r--drivers/staging/iio/ring_sw.c49
-rw-r--r--drivers/staging/iio/ring_sw.h19
5 files changed, 111 insertions, 209 deletions
diff --git a/drivers/staging/iio/accel/lis3l02dq.h b/drivers/staging/iio/accel/lis3l02dq.h
index 43277d1dd9ab..94d98695995c 100644
--- a/drivers/staging/iio/accel/lis3l02dq.h
+++ b/drivers/staging/iio/accel/lis3l02dq.h
@@ -148,7 +148,6 @@ Form of high byte dependent on justification set in ctrl reg */
148#define LIS3L02DQ_MAX_RX 12 148#define LIS3L02DQ_MAX_RX 12
149/** 149/**
150 * struct lis3l02dq_state - device instance specific data 150 * struct lis3l02dq_state - device instance specific data
151 * @helper: data and func pointer allowing generic functions
152 * @us: actual spi_device 151 * @us: actual spi_device
153 * @trig: data ready trigger registered with iio 152 * @trig: data ready trigger registered with iio
154 * @tx: transmit buffer 153 * @tx: transmit buffer
@@ -156,17 +155,14 @@ Form of high byte dependent on justification set in ctrl reg */
156 * @buf_lock: mutex to protect tx and rx 155 * @buf_lock: mutex to protect tx and rx
157 **/ 156 **/
158struct lis3l02dq_state { 157struct lis3l02dq_state {
159 struct iio_sw_ring_helper_state help;
160 struct spi_device *us; 158 struct spi_device *us;
161 struct iio_trigger *trig; 159 struct iio_trigger *trig;
162 u8 *tx;
163 u8 *rx;
164 struct mutex buf_lock; 160 struct mutex buf_lock;
165 bool trigger_on; 161 bool trigger_on;
166};
167 162
168#define lis3l02dq_h_to_s(_h) \ 163 u8 tx[LIS3L02DQ_MAX_RX] ____cacheline_aligned;
169 container_of(_h, struct lis3l02dq_state, help) 164 u8 rx[LIS3L02DQ_MAX_RX] ____cacheline_aligned;
165};
170 166
171int lis3l02dq_spi_read_reg_8(struct iio_dev *indio_dev, 167int lis3l02dq_spi_read_reg_8(struct iio_dev *indio_dev,
172 u8 reg_address, 168 u8 reg_address,
diff --git a/drivers/staging/iio/accel/lis3l02dq_core.c b/drivers/staging/iio/accel/lis3l02dq_core.c
index 42261b50b437..6b5414c913ff 100644
--- a/drivers/staging/iio/accel/lis3l02dq_core.c
+++ b/drivers/staging/iio/accel/lis3l02dq_core.c
@@ -25,7 +25,6 @@
25#include "../iio.h" 25#include "../iio.h"
26#include "../sysfs.h" 26#include "../sysfs.h"
27#include "../ring_generic.h" 27#include "../ring_generic.h"
28#include "../ring_sw.h"
29 28
30#include "accel.h" 29#include "accel.h"
31 30
@@ -52,8 +51,7 @@ static irqreturn_t lis3l02dq_noring(int irq, void *private)
52int lis3l02dq_spi_read_reg_8(struct iio_dev *indio_dev, 51int lis3l02dq_spi_read_reg_8(struct iio_dev *indio_dev,
53 u8 reg_address, u8 *val) 52 u8 reg_address, u8 *val)
54{ 53{
55 struct iio_sw_ring_helper_state *h = iio_dev_get_devdata(indio_dev); 54 struct lis3l02dq_state *st = iio_priv(indio_dev);
56 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
57 struct spi_message msg; 55 struct spi_message msg;
58 int ret; 56 int ret;
59 struct spi_transfer xfer = { 57 struct spi_transfer xfer = {
@@ -87,9 +85,7 @@ int lis3l02dq_spi_write_reg_8(struct iio_dev *indio_dev,
87 u8 *val) 85 u8 *val)
88{ 86{
89 int ret; 87 int ret;
90 struct iio_sw_ring_helper_state *h 88 struct lis3l02dq_state *st = iio_priv(indio_dev);
91 = iio_dev_get_devdata(indio_dev);
92 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
93 89
94 mutex_lock(&st->buf_lock); 90 mutex_lock(&st->buf_lock);
95 st->tx[0] = LIS3L02DQ_WRITE_REG(reg_address); 91 st->tx[0] = LIS3L02DQ_WRITE_REG(reg_address);
@@ -113,9 +109,7 @@ static int lis3l02dq_spi_write_reg_s16(struct iio_dev *indio_dev,
113{ 109{
114 int ret; 110 int ret;
115 struct spi_message msg; 111 struct spi_message msg;
116 struct iio_sw_ring_helper_state *h 112 struct lis3l02dq_state *st = iio_priv(indio_dev);
117 = iio_dev_get_devdata(indio_dev);
118 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
119 struct spi_transfer xfers[] = { { 113 struct spi_transfer xfers[] = { {
120 .tx_buf = st->tx, 114 .tx_buf = st->tx,
121 .bits_per_word = 8, 115 .bits_per_word = 8,
@@ -147,9 +141,7 @@ static int lis3l02dq_read_reg_s16(struct iio_dev *indio_dev,
147 u8 lower_reg_address, 141 u8 lower_reg_address,
148 int *val) 142 int *val)
149{ 143{
150 struct iio_sw_ring_helper_state *h 144 struct lis3l02dq_state *st = iio_priv(indio_dev);
151 = iio_dev_get_devdata(indio_dev);
152 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
153 145
154 struct spi_message msg; 146 struct spi_message msg;
155 int ret; 147 int ret;
@@ -383,8 +375,9 @@ error_ret_mutex:
383 return ret ? ret : len; 375 return ret ? ret : len;
384} 376}
385 377
386static int lis3l02dq_initial_setup(struct lis3l02dq_state *st) 378static int lis3l02dq_initial_setup(struct iio_dev *indio_dev)
387{ 379{
380 struct lis3l02dq_state *st = iio_priv(indio_dev);
388 int ret; 381 int ret;
389 u8 val, valtest; 382 u8 val, valtest;
390 383
@@ -394,7 +387,7 @@ static int lis3l02dq_initial_setup(struct lis3l02dq_state *st)
394 387
395 val = LIS3L02DQ_DEFAULT_CTRL1; 388 val = LIS3L02DQ_DEFAULT_CTRL1;
396 /* Write suitable defaults to ctrl1 */ 389 /* Write suitable defaults to ctrl1 */
397 ret = lis3l02dq_spi_write_reg_8(st->help.indio_dev, 390 ret = lis3l02dq_spi_write_reg_8(indio_dev,
398 LIS3L02DQ_REG_CTRL_1_ADDR, 391 LIS3L02DQ_REG_CTRL_1_ADDR,
399 &val); 392 &val);
400 if (ret) { 393 if (ret) {
@@ -402,7 +395,7 @@ static int lis3l02dq_initial_setup(struct lis3l02dq_state *st)
402 goto err_ret; 395 goto err_ret;
403 } 396 }
404 /* Repeat as sometimes doesn't work first time?*/ 397 /* Repeat as sometimes doesn't work first time?*/
405 ret = lis3l02dq_spi_write_reg_8(st->help.indio_dev, 398 ret = lis3l02dq_spi_write_reg_8(indio_dev,
406 LIS3L02DQ_REG_CTRL_1_ADDR, 399 LIS3L02DQ_REG_CTRL_1_ADDR,
407 &val); 400 &val);
408 if (ret) { 401 if (ret) {
@@ -412,18 +405,18 @@ static int lis3l02dq_initial_setup(struct lis3l02dq_state *st)
412 405
413 /* Read back to check this has worked acts as loose test of correct 406 /* Read back to check this has worked acts as loose test of correct
414 * chip */ 407 * chip */
415 ret = lis3l02dq_spi_read_reg_8(st->help.indio_dev, 408 ret = lis3l02dq_spi_read_reg_8(indio_dev,
416 LIS3L02DQ_REG_CTRL_1_ADDR, 409 LIS3L02DQ_REG_CTRL_1_ADDR,
417 &valtest); 410 &valtest);
418 if (ret || (valtest != val)) { 411 if (ret || (valtest != val)) {
419 dev_err(&st->help.indio_dev->dev, 412 dev_err(&indio_dev->dev,
420 "device not playing ball %d %d\n", valtest, val); 413 "device not playing ball %d %d\n", valtest, val);
421 ret = -EINVAL; 414 ret = -EINVAL;
422 goto err_ret; 415 goto err_ret;
423 } 416 }
424 417
425 val = LIS3L02DQ_DEFAULT_CTRL2; 418 val = LIS3L02DQ_DEFAULT_CTRL2;
426 ret = lis3l02dq_spi_write_reg_8(st->help.indio_dev, 419 ret = lis3l02dq_spi_write_reg_8(indio_dev,
427 LIS3L02DQ_REG_CTRL_2_ADDR, 420 LIS3L02DQ_REG_CTRL_2_ADDR,
428 &val); 421 &val);
429 if (ret) { 422 if (ret) {
@@ -432,7 +425,7 @@ static int lis3l02dq_initial_setup(struct lis3l02dq_state *st)
432 } 425 }
433 426
434 val = LIS3L02DQ_REG_WAKE_UP_CFG_LATCH_SRC; 427 val = LIS3L02DQ_REG_WAKE_UP_CFG_LATCH_SRC;
435 ret = lis3l02dq_spi_write_reg_8(st->help.indio_dev, 428 ret = lis3l02dq_spi_write_reg_8(indio_dev,
436 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR, 429 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
437 &val); 430 &val);
438 if (ret) 431 if (ret)
@@ -451,19 +444,16 @@ static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("280 560 1120 4480");
451static irqreturn_t lis3l02dq_event_handler(int irq, void *private) 444static irqreturn_t lis3l02dq_event_handler(int irq, void *private)
452{ 445{
453 struct iio_dev *indio_dev = private; 446 struct iio_dev *indio_dev = private;
454 struct iio_sw_ring_helper_state *h
455 = iio_dev_get_devdata(indio_dev);
456 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
457 u8 t; 447 u8 t;
458 448
459 s64 timestamp = iio_get_time_ns(); 449 s64 timestamp = iio_get_time_ns();
460 450
461 lis3l02dq_spi_read_reg_8(st->help.indio_dev, 451 lis3l02dq_spi_read_reg_8(indio_dev,
462 LIS3L02DQ_REG_WAKE_UP_SRC_ADDR, 452 LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
463 &t); 453 &t);
464 454
465 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_HIGH) 455 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_HIGH)
466 iio_push_event(st->help.indio_dev, 0, 456 iio_push_event(indio_dev, 0,
467 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL, 457 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL,
468 0, 458 0,
469 IIO_EV_MOD_Z, 459 IIO_EV_MOD_Z,
@@ -472,7 +462,7 @@ static irqreturn_t lis3l02dq_event_handler(int irq, void *private)
472 timestamp); 462 timestamp);
473 463
474 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_LOW) 464 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_LOW)
475 iio_push_event(st->help.indio_dev, 0, 465 iio_push_event(indio_dev, 0,
476 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL, 466 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL,
477 0, 467 0,
478 IIO_EV_MOD_Z, 468 IIO_EV_MOD_Z,
@@ -481,7 +471,7 @@ static irqreturn_t lis3l02dq_event_handler(int irq, void *private)
481 timestamp); 471 timestamp);
482 472
483 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_HIGH) 473 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_HIGH)
484 iio_push_event(st->help.indio_dev, 0, 474 iio_push_event(indio_dev, 0,
485 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL, 475 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL,
486 0, 476 0,
487 IIO_EV_MOD_Y, 477 IIO_EV_MOD_Y,
@@ -490,7 +480,7 @@ static irqreturn_t lis3l02dq_event_handler(int irq, void *private)
490 timestamp); 480 timestamp);
491 481
492 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_LOW) 482 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_LOW)
493 iio_push_event(st->help.indio_dev, 0, 483 iio_push_event(indio_dev, 0,
494 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL, 484 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL,
495 0, 485 0,
496 IIO_EV_MOD_Y, 486 IIO_EV_MOD_Y,
@@ -499,7 +489,7 @@ static irqreturn_t lis3l02dq_event_handler(int irq, void *private)
499 timestamp); 489 timestamp);
500 490
501 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_HIGH) 491 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_HIGH)
502 iio_push_event(st->help.indio_dev, 0, 492 iio_push_event(indio_dev, 0,
503 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL, 493 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL,
504 0, 494 0,
505 IIO_EV_MOD_X, 495 IIO_EV_MOD_X,
@@ -508,7 +498,7 @@ static irqreturn_t lis3l02dq_event_handler(int irq, void *private)
508 timestamp); 498 timestamp);
509 499
510 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_LOW) 500 if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_LOW)
511 iio_push_event(st->help.indio_dev, 0, 501 iio_push_event(indio_dev, 0,
512 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL, 502 IIO_MOD_EVENT_CODE(IIO_EV_CLASS_ACCEL,
513 0, 503 0,
514 IIO_EV_MOD_X, 504 IIO_EV_MOD_X,
@@ -517,7 +507,7 @@ static irqreturn_t lis3l02dq_event_handler(int irq, void *private)
517 timestamp); 507 timestamp);
518 508
519 /* Ack and allow for new interrupts */ 509 /* Ack and allow for new interrupts */
520 lis3l02dq_spi_read_reg_8(st->help.indio_dev, 510 lis3l02dq_spi_read_reg_8(indio_dev,
521 LIS3L02DQ_REG_WAKE_UP_ACK_ADDR, 511 LIS3L02DQ_REG_WAKE_UP_ACK_ADDR,
522 &t); 512 &t);
523 513
@@ -664,61 +654,45 @@ static const struct attribute_group lis3l02dq_attribute_group = {
664static int __devinit lis3l02dq_probe(struct spi_device *spi) 654static int __devinit lis3l02dq_probe(struct spi_device *spi)
665{ 655{
666 int ret, regdone = 0; 656 int ret, regdone = 0;
667 struct lis3l02dq_state *st = kzalloc(sizeof *st, GFP_KERNEL); 657 struct lis3l02dq_state *st;
668 if (!st) { 658 struct iio_dev *indio_dev;
669 ret = -ENOMEM; 659
660 indio_dev = iio_allocate_device(sizeof *st);
661 if (indio_dev == NULL) {
662 ret = -ENOMEM;
670 goto error_ret; 663 goto error_ret;
671 } 664 }
672 665 st = iio_priv(indio_dev);
673 /* this is only used tor removal purposes */ 666 /* this is only used tor removal purposes */
674 spi_set_drvdata(spi, st); 667 spi_set_drvdata(spi, st);
675 668
676 /* Allocate the comms buffers */
677 st->rx = kzalloc(sizeof(*st->rx)*LIS3L02DQ_MAX_RX, GFP_KERNEL);
678 if (st->rx == NULL) {
679 ret = -ENOMEM;
680 goto error_free_st;
681 }
682 st->tx = kzalloc(sizeof(*st->tx)*LIS3L02DQ_MAX_TX, GFP_KERNEL);
683 if (st->tx == NULL) {
684 ret = -ENOMEM;
685 goto error_free_rx;
686 }
687 st->us = spi; 669 st->us = spi;
688 mutex_init(&st->buf_lock); 670 mutex_init(&st->buf_lock);
689 /* setup the industrialio driver allocated elements */ 671 indio_dev->name = spi->dev.driver->name;
690 st->help.indio_dev = iio_allocate_device(0); 672 indio_dev->dev.parent = &spi->dev;
691 if (st->help.indio_dev == NULL) { 673 indio_dev->num_interrupt_lines = 1;
692 ret = -ENOMEM; 674 indio_dev->channels = lis3l02dq_channels;
693 goto error_free_tx; 675 indio_dev->num_channels = ARRAY_SIZE(lis3l02dq_channels);
694 } 676 indio_dev->read_raw = &lis3l02dq_read_raw;
695 677 indio_dev->write_raw = &lis3l02dq_write_raw;
696 st->help.indio_dev->name = spi->dev.driver->name; 678 indio_dev->read_event_value = &lis3l02dq_read_thresh;
697 st->help.indio_dev->dev.parent = &spi->dev; 679 indio_dev->write_event_value = &lis3l02dq_write_thresh;
698 st->help.indio_dev->num_interrupt_lines = 1; 680 indio_dev->write_event_config = &lis3l02dq_write_event_config;
699 st->help.indio_dev->channels = lis3l02dq_channels; 681 indio_dev->read_event_config = &lis3l02dq_read_event_config;
700 st->help.indio_dev->num_channels = ARRAY_SIZE(lis3l02dq_channels); 682 indio_dev->attrs = &lis3l02dq_attribute_group;
701 st->help.indio_dev->read_raw = &lis3l02dq_read_raw; 683 indio_dev->driver_module = THIS_MODULE;
702 st->help.indio_dev->write_raw = &lis3l02dq_write_raw; 684 indio_dev->modes = INDIO_DIRECT_MODE;
703 st->help.indio_dev->read_event_value = &lis3l02dq_read_thresh; 685
704 st->help.indio_dev->write_event_value = &lis3l02dq_write_thresh; 686 ret = lis3l02dq_configure_ring(indio_dev);
705 st->help.indio_dev->write_event_config = &lis3l02dq_write_event_config;
706 st->help.indio_dev->read_event_config = &lis3l02dq_read_event_config;
707 st->help.indio_dev->attrs = &lis3l02dq_attribute_group;
708 st->help.indio_dev->dev_data = (void *)(&st->help);
709 st->help.indio_dev->driver_module = THIS_MODULE;
710 st->help.indio_dev->modes = INDIO_DIRECT_MODE;
711
712 ret = lis3l02dq_configure_ring(st->help.indio_dev);
713 if (ret) 687 if (ret)
714 goto error_free_dev; 688 goto error_free_dev;
715 689
716 ret = iio_device_register(st->help.indio_dev); 690 ret = iio_device_register(indio_dev);
717 if (ret) 691 if (ret)
718 goto error_unreg_ring_funcs; 692 goto error_unreg_ring_funcs;
719 regdone = 1; 693 regdone = 1;
720 694
721 ret = iio_ring_buffer_register_ex(st->help.indio_dev->ring, 0, 695 ret = iio_ring_buffer_register_ex(indio_dev->ring, 0,
722 lis3l02dq_channels, 696 lis3l02dq_channels,
723 ARRAY_SIZE(lis3l02dq_channels)); 697 ARRAY_SIZE(lis3l02dq_channels));
724 if (ret) { 698 if (ret) {
@@ -732,42 +706,36 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
732 &lis3l02dq_event_handler, 706 &lis3l02dq_event_handler,
733 IRQF_TRIGGER_RISING, 707 IRQF_TRIGGER_RISING,
734 "lis3l02dq", 708 "lis3l02dq",
735 st->help.indio_dev); 709 indio_dev);
736 if (ret) 710 if (ret)
737 goto error_uninitialize_ring; 711 goto error_uninitialize_ring;
738 712
739 ret = lis3l02dq_probe_trigger(st->help.indio_dev); 713 ret = lis3l02dq_probe_trigger(indio_dev);
740 if (ret) 714 if (ret)
741 goto error_free_interrupt; 715 goto error_free_interrupt;
742 } 716 }
743 717
744 /* Get the device into a sane initial state */ 718 /* Get the device into a sane initial state */
745 ret = lis3l02dq_initial_setup(st); 719 ret = lis3l02dq_initial_setup(indio_dev);
746 if (ret) 720 if (ret)
747 goto error_remove_trigger; 721 goto error_remove_trigger;
748 return 0; 722 return 0;
749 723
750error_remove_trigger: 724error_remove_trigger:
751 if (st->help.indio_dev->modes & INDIO_RING_TRIGGERED) 725 if (indio_dev->modes & INDIO_RING_TRIGGERED)
752 lis3l02dq_remove_trigger(st->help.indio_dev); 726 lis3l02dq_remove_trigger(indio_dev);
753error_free_interrupt: 727error_free_interrupt:
754 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) 728 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0)
755 free_irq(st->us->irq, st->help.indio_dev); 729 free_irq(st->us->irq, indio_dev);
756error_uninitialize_ring: 730error_uninitialize_ring:
757 iio_ring_buffer_unregister(st->help.indio_dev->ring); 731 iio_ring_buffer_unregister(indio_dev->ring);
758error_unreg_ring_funcs: 732error_unreg_ring_funcs:
759 lis3l02dq_unconfigure_ring(st->help.indio_dev); 733 lis3l02dq_unconfigure_ring(indio_dev);
760error_free_dev: 734error_free_dev:
761 if (regdone) 735 if (regdone)
762 iio_device_unregister(st->help.indio_dev); 736 iio_device_unregister(indio_dev);
763 else 737 else
764 iio_free_device(st->help.indio_dev); 738 iio_free_device(indio_dev);
765error_free_tx:
766 kfree(st->tx);
767error_free_rx:
768 kfree(st->rx);
769error_free_st:
770 kfree(st);
771error_ret: 739error_ret:
772 return ret; 740 return ret;
773} 741}
@@ -776,9 +744,7 @@ error_ret:
776static int lis3l02dq_stop_device(struct iio_dev *indio_dev) 744static int lis3l02dq_stop_device(struct iio_dev *indio_dev)
777{ 745{
778 int ret; 746 int ret;
779 struct iio_sw_ring_helper_state *h 747 struct lis3l02dq_state *st = iio_priv(indio_dev);
780 = iio_dev_get_devdata(indio_dev);
781 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
782 u8 val = 0; 748 u8 val = 0;
783 749
784 mutex_lock(&indio_dev->mlock); 750 mutex_lock(&indio_dev->mlock);
@@ -804,8 +770,9 @@ err_ret:
804static int lis3l02dq_remove(struct spi_device *spi) 770static int lis3l02dq_remove(struct spi_device *spi)
805{ 771{
806 int ret; 772 int ret;
807 struct lis3l02dq_state *st = spi_get_drvdata(spi); 773 struct iio_dev *indio_dev = spi_get_drvdata(spi);
808 struct iio_dev *indio_dev = st->help.indio_dev; 774 struct lis3l02dq_state *st = iio_priv(indio_dev);
775
809 ret = lis3l02dq_disable_all_events(indio_dev); 776 ret = lis3l02dq_disable_all_events(indio_dev);
810 if (ret) 777 if (ret)
811 goto err_ret; 778 goto err_ret;
@@ -821,9 +788,6 @@ static int lis3l02dq_remove(struct spi_device *spi)
821 iio_ring_buffer_unregister(indio_dev->ring); 788 iio_ring_buffer_unregister(indio_dev->ring);
822 lis3l02dq_unconfigure_ring(indio_dev); 789 lis3l02dq_unconfigure_ring(indio_dev);
823 iio_device_unregister(indio_dev); 790 iio_device_unregister(indio_dev);
824 kfree(st->tx);
825 kfree(st->rx);
826 kfree(st);
827 791
828 return 0; 792 return 0;
829 793
diff --git a/drivers/staging/iio/accel/lis3l02dq_ring.c b/drivers/staging/iio/accel/lis3l02dq_ring.c
index ab11e527a6aa..5029c51fe919 100644
--- a/drivers/staging/iio/accel/lis3l02dq_ring.c
+++ b/drivers/staging/iio/accel/lis3l02dq_ring.c
@@ -32,8 +32,7 @@ static inline u16 combine_8_to_16(u8 lower, u8 upper)
32irqreturn_t lis3l02dq_data_rdy_trig_poll(int irq, void *private) 32irqreturn_t lis3l02dq_data_rdy_trig_poll(int irq, void *private)
33{ 33{
34 struct iio_dev *indio_dev = private; 34 struct iio_dev *indio_dev = private;
35 struct iio_sw_ring_helper_state *h = iio_dev_get_devdata(indio_dev); 35 struct lis3l02dq_state *st = iio_priv(indio_dev);
36 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
37 36
38 if (st->trigger_on) { 37 if (st->trigger_on) {
39 iio_trigger_poll(st->trig, iio_get_time_ns()); 38 iio_trigger_poll(st->trig, iio_get_time_ns());
@@ -83,9 +82,10 @@ static const u8 read_all_tx_array[] = {
83 * @rx_array: (dma capable) receive array, must be at least 82 * @rx_array: (dma capable) receive array, must be at least
84 * 4*number of channels 83 * 4*number of channels
85 **/ 84 **/
86static int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array) 85static int lis3l02dq_read_all(struct iio_dev *indio_dev, u8 *rx_array)
87{ 86{
88 struct iio_ring_buffer *ring = st->help.indio_dev->ring; 87 struct iio_ring_buffer *ring = indio_dev->ring;
88 struct lis3l02dq_state *st = iio_priv(indio_dev);
89 struct spi_transfer *xfers; 89 struct spi_transfer *xfers;
90 struct spi_message msg; 90 struct spi_message msg;
91 int ret, i, j = 0; 91 int ret, i, j = 0;
@@ -136,32 +136,20 @@ static int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array)
136 return ret; 136 return ret;
137} 137}
138 138
139static irqreturn_t lis3l02dq_trigger_handler(int irq, void *p) 139static int lis3l02dq_get_ring_element(struct iio_dev *indio_dev,
140{
141 struct iio_poll_func *pf = p;
142 struct iio_dev *indio_dev = pf->private_data;
143 struct iio_sw_ring_helper_state *h = iio_dev_get_devdata(indio_dev);
144
145 h->last_timestamp = pf->timestamp;
146 iio_sw_trigger_to_ring(h);
147
148 return IRQ_HANDLED;
149}
150
151static int lis3l02dq_get_ring_element(struct iio_sw_ring_helper_state *h,
152 u8 *buf) 140 u8 *buf)
153{ 141{
154 int ret, i; 142 int ret, i;
155 u8 *rx_array ; 143 u8 *rx_array ;
156 s16 *data = (s16 *)buf; 144 s16 *data = (s16 *)buf;
157 145
158 rx_array = kzalloc(4 * (h->indio_dev->ring->scan_count), GFP_KERNEL); 146 rx_array = kzalloc(4 * (indio_dev->ring->scan_count), GFP_KERNEL);
159 if (rx_array == NULL) 147 if (rx_array == NULL)
160 return -ENOMEM; 148 return -ENOMEM;
161 ret = lis3l02dq_read_all(lis3l02dq_h_to_s(h), rx_array); 149 ret = lis3l02dq_read_all(indio_dev, rx_array);
162 if (ret < 0) 150 if (ret < 0)
163 return ret; 151 return ret;
164 for (i = 0; i < h->indio_dev->ring->scan_count; i++) 152 for (i = 0; i < indio_dev->ring->scan_count; i++)
165 data[i] = combine_8_to_16(rx_array[i*4+1], 153 data[i] = combine_8_to_16(rx_array[i*4+1],
166 rx_array[i*4+3]); 154 rx_array[i*4+3]);
167 kfree(rx_array); 155 kfree(rx_array);
@@ -169,6 +157,36 @@ static int lis3l02dq_get_ring_element(struct iio_sw_ring_helper_state *h,
169 return i*sizeof(data[0]); 157 return i*sizeof(data[0]);
170} 158}
171 159
160static irqreturn_t lis3l02dq_trigger_handler(int irq, void *p)
161{
162 struct iio_poll_func *pf = p;
163 struct iio_dev *indio_dev = pf->private_data;
164 struct iio_ring_buffer *ring = indio_dev->ring;
165 int len = 0;
166 size_t datasize = ring->access->get_bytes_per_datum(ring);
167 char *data = kmalloc(datasize, GFP_KERNEL);
168
169 if (data == NULL) {
170 dev_err(indio_dev->dev.parent,
171 "memory alloc failed in ring bh");
172 return -ENOMEM;
173 }
174
175 if (ring->scan_count)
176 len = lis3l02dq_get_ring_element(indio_dev, data);
177
178 /* Guaranteed to be aligned with 8 byte boundary */
179 if (ring->scan_timestamp)
180 *(s64 *)(((phys_addr_t)data + len
181 + sizeof(s64) - 1) & ~(sizeof(s64) - 1))
182 = pf->timestamp;
183 ring->access->store_to(ring, (u8 *)data, pf->timestamp);
184
185 iio_trigger_notify_done(indio_dev->trig);
186 kfree(data);
187 return IRQ_HANDLED;
188}
189
172/* Caller responsible for locking as necessary. */ 190/* Caller responsible for locking as necessary. */
173static int 191static int
174__lis3l02dq_write_data_ready_config(struct device *dev, bool state) 192__lis3l02dq_write_data_ready_config(struct device *dev, bool state)
@@ -177,9 +195,7 @@ __lis3l02dq_write_data_ready_config(struct device *dev, bool state)
177 u8 valold; 195 u8 valold;
178 bool currentlyset; 196 bool currentlyset;
179 struct iio_dev *indio_dev = dev_get_drvdata(dev); 197 struct iio_dev *indio_dev = dev_get_drvdata(dev);
180 struct iio_sw_ring_helper_state *h 198 struct lis3l02dq_state *st = iio_priv(indio_dev);
181 = iio_dev_get_devdata(indio_dev);
182 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
183 199
184/* Get the current event mask register */ 200/* Get the current event mask register */
185 ret = lis3l02dq_spi_read_reg_8(indio_dev, 201 ret = lis3l02dq_spi_read_reg_8(indio_dev,
@@ -242,19 +258,19 @@ error_ret:
242static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig, 258static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
243 bool state) 259 bool state)
244{ 260{
245 struct lis3l02dq_state *st = trig->private_data; 261 struct iio_dev *indio_dev = trig->private_data;
246 int ret = 0; 262 int ret = 0;
247 u8 t; 263 u8 t;
248 264
249 __lis3l02dq_write_data_ready_config(&st->help.indio_dev->dev, state); 265 __lis3l02dq_write_data_ready_config(&indio_dev->dev, state);
250 if (state == false) { 266 if (state == false) {
251 /* 267 /*
252 * A possible quirk with teh handler is currently worked around 268 * A possible quirk with teh handler is currently worked around
253 * by ensuring outstanding read events are cleared. 269 * by ensuring outstanding read events are cleared.
254 */ 270 */
255 ret = lis3l02dq_read_all(st, NULL); 271 ret = lis3l02dq_read_all(indio_dev, NULL);
256 } 272 }
257 lis3l02dq_spi_read_reg_8(st->help.indio_dev, 273 lis3l02dq_spi_read_reg_8(indio_dev,
258 LIS3L02DQ_REG_WAKE_UP_SRC_ADDR, 274 LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
259 &t); 275 &t);
260 return ret; 276 return ret;
@@ -266,14 +282,15 @@ static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
266 */ 282 */
267static int lis3l02dq_trig_try_reen(struct iio_trigger *trig) 283static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
268{ 284{
269 struct lis3l02dq_state *st = trig->private_data; 285 struct iio_dev *indio_dev = trig->private_data;
286 struct lis3l02dq_state *st = iio_priv(indio_dev);
270 int i; 287 int i;
271 288
272 /* If gpio still high (or high again) */ 289 /* If gpio still high (or high again) */
273 /* In theory possible we will need to do this several times */ 290 /* In theory possible we will need to do this several times */
274 for (i = 0; i < 5; i++) 291 for (i = 0; i < 5; i++)
275 if (gpio_get_value(irq_to_gpio(st->us->irq))) 292 if (gpio_get_value(irq_to_gpio(st->us->irq)))
276 lis3l02dq_read_all(st, NULL); 293 lis3l02dq_read_all(indio_dev, NULL);
277 else 294 else
278 break; 295 break;
279 if (i == 5) 296 if (i == 5)
@@ -287,9 +304,7 @@ static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
287int lis3l02dq_probe_trigger(struct iio_dev *indio_dev) 304int lis3l02dq_probe_trigger(struct iio_dev *indio_dev)
288{ 305{
289 int ret; 306 int ret;
290 struct iio_sw_ring_helper_state *h 307 struct lis3l02dq_state *st = iio_priv(indio_dev);
291 = iio_dev_get_devdata(indio_dev);
292 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
293 308
294 st->trig = iio_allocate_trigger("lis3l02dq-dev%d", indio_dev->id); 309 st->trig = iio_allocate_trigger("lis3l02dq-dev%d", indio_dev->id);
295 if (!st->trig) { 310 if (!st->trig) {
@@ -299,7 +314,7 @@ int lis3l02dq_probe_trigger(struct iio_dev *indio_dev)
299 314
300 st->trig->dev.parent = &st->us->dev; 315 st->trig->dev.parent = &st->us->dev;
301 st->trig->owner = THIS_MODULE; 316 st->trig->owner = THIS_MODULE;
302 st->trig->private_data = st; 317 st->trig->private_data = indio_dev;
303 st->trig->set_trigger_state = &lis3l02dq_data_rdy_trigger_set_state; 318 st->trig->set_trigger_state = &lis3l02dq_data_rdy_trigger_set_state;
304 st->trig->try_reenable = &lis3l02dq_trig_try_reen; 319 st->trig->try_reenable = &lis3l02dq_trig_try_reen;
305 ret = iio_trigger_register(st->trig); 320 ret = iio_trigger_register(st->trig);
@@ -316,9 +331,7 @@ error_ret:
316 331
317void lis3l02dq_remove_trigger(struct iio_dev *indio_dev) 332void lis3l02dq_remove_trigger(struct iio_dev *indio_dev)
318{ 333{
319 struct iio_sw_ring_helper_state *h 334 struct lis3l02dq_state *st = iio_priv(indio_dev);
320 = iio_dev_get_devdata(indio_dev);
321 struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
322 335
323 iio_trigger_unregister(st->trig); 336 iio_trigger_unregister(st->trig);
324 iio_free_trigger(st->trig); 337 iio_free_trigger(st->trig);
@@ -409,11 +422,8 @@ static const struct iio_ring_setup_ops lis3l02dq_ring_setup_ops = {
409int lis3l02dq_configure_ring(struct iio_dev *indio_dev) 422int lis3l02dq_configure_ring(struct iio_dev *indio_dev)
410{ 423{
411 int ret; 424 int ret;
412 struct iio_sw_ring_helper_state *h = iio_dev_get_devdata(indio_dev);
413 struct iio_ring_buffer *ring; 425 struct iio_ring_buffer *ring;
414 426
415 h->get_ring_element = &lis3l02dq_get_ring_element;
416
417 ring = lis3l02dq_alloc_buf(indio_dev); 427 ring = lis3l02dq_alloc_buf(indio_dev);
418 if (!ring) 428 if (!ring)
419 return -ENOMEM; 429 return -ENOMEM;
diff --git a/drivers/staging/iio/ring_sw.c b/drivers/staging/iio/ring_sw.c
index 35896cbb07d9..feb84e27c362 100644
--- a/drivers/staging/iio/ring_sw.c
+++ b/drivers/staging/iio/ring_sw.c
@@ -452,55 +452,6 @@ void iio_sw_rb_free(struct iio_ring_buffer *r)
452} 452}
453EXPORT_SYMBOL(iio_sw_rb_free); 453EXPORT_SYMBOL(iio_sw_rb_free);
454 454
455void iio_sw_trigger_to_ring(struct iio_sw_ring_helper_state *st)
456{
457 struct iio_ring_buffer *ring = st->indio_dev->ring;
458 int len = 0;
459 size_t datasize = ring->access->get_bytes_per_datum(ring);
460 char *data = kmalloc(datasize, GFP_KERNEL);
461
462 if (data == NULL) {
463 dev_err(st->indio_dev->dev.parent,
464 "memory alloc failed in ring bh");
465 return;
466 }
467
468 if (ring->scan_count)
469 len = st->get_ring_element(st, data);
470
471 /* Guaranteed to be aligned with 8 byte boundary */
472 if (ring->scan_timestamp)
473 *(s64 *)(((phys_addr_t)data + len
474 + sizeof(s64) - 1) & ~(sizeof(s64) - 1))
475 = st->last_timestamp;
476 ring->access->store_to(ring,
477 (u8 *)data,
478 st->last_timestamp);
479
480 iio_trigger_notify_done(st->indio_dev->trig);
481 kfree(data);
482
483 return;
484}
485EXPORT_SYMBOL(iio_sw_trigger_to_ring);
486
487void iio_sw_trigger_bh_to_ring(struct work_struct *work_s)
488{
489 struct iio_sw_ring_helper_state *st
490 = container_of(work_s, struct iio_sw_ring_helper_state,
491 work_trigger_to_ring);
492 iio_sw_trigger_to_ring(st);
493}
494EXPORT_SYMBOL(iio_sw_trigger_bh_to_ring);
495
496void iio_sw_poll_func_th(struct iio_dev *indio_dev, s64 time)
497{ struct iio_sw_ring_helper_state *h
498 = iio_dev_get_devdata(indio_dev);
499 h->last_timestamp = time;
500 schedule_work(&h->work_trigger_to_ring);
501}
502EXPORT_SYMBOL(iio_sw_poll_func_th);
503
504const struct iio_ring_access_funcs ring_sw_access_funcs = { 455const struct iio_ring_access_funcs ring_sw_access_funcs = {
505 .mark_in_use = &iio_mark_sw_rb_in_use, 456 .mark_in_use = &iio_mark_sw_rb_in_use,
506 .unmark_in_use = &iio_unmark_sw_rb_in_use, 457 .unmark_in_use = &iio_unmark_sw_rb_in_use,
diff --git a/drivers/staging/iio/ring_sw.h b/drivers/staging/iio/ring_sw.h
index 93449890eeaa..15271639534b 100644
--- a/drivers/staging/iio/ring_sw.h
+++ b/drivers/staging/iio/ring_sw.h
@@ -23,10 +23,8 @@
23 23
24#ifndef _IIO_RING_SW_H_ 24#ifndef _IIO_RING_SW_H_
25#define _IIO_RING_SW_H_ 25#define _IIO_RING_SW_H_
26#include "iio.h"
27#include "ring_generic.h" 26#include "ring_generic.h"
28 27
29#if defined CONFIG_IIO_SW_RING || defined CONFIG_IIO_SW_RING_MODULE
30/** 28/**
31 * ring_sw_access_funcs - access functions for a software ring buffer 29 * ring_sw_access_funcs - access functions for a software ring buffer
32 **/ 30 **/
@@ -34,21 +32,4 @@ extern const struct iio_ring_access_funcs ring_sw_access_funcs;
34 32
35struct iio_ring_buffer *iio_sw_rb_allocate(struct iio_dev *indio_dev); 33struct iio_ring_buffer *iio_sw_rb_allocate(struct iio_dev *indio_dev);
36void iio_sw_rb_free(struct iio_ring_buffer *ring); 34void iio_sw_rb_free(struct iio_ring_buffer *ring);
37
38struct iio_sw_ring_helper_state {
39 struct work_struct work_trigger_to_ring;
40 struct iio_dev *indio_dev;
41 int (*get_ring_element)(struct iio_sw_ring_helper_state *st, u8 *buf);
42 s64 last_timestamp;
43};
44
45void iio_sw_poll_func_th(struct iio_dev *indio_dev, s64 time);
46void iio_sw_trigger_bh_to_ring(struct work_struct *work_s);
47void iio_sw_trigger_to_ring(struct iio_sw_ring_helper_state *st);
48
49#else /* CONFIG_IIO_RING_BUFFER*/
50struct iio_sw_ring_helper_state {
51 struct iio_dev *indio_dev;
52};
53#endif /* !CONFIG_IIO_RING_BUFFER */
54#endif /* _IIO_RING_SW_H_ */ 35#endif /* _IIO_RING_SW_H_ */