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authorH. Peter Anvin <hpa@linux.intel.com>2011-08-04 19:13:20 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2011-08-04 19:13:20 -0400
commit17b0436077d99211d8b26886235a36c5ec54ac57 (patch)
tree8bcd9b4a0f8285f749814e95ae0365c611ba2392 /drivers/ssb/driver_pcicore.c
parentaafade242ff24fac3aabf61c7861dfa44a3c2445 (diff)
parent02f8c6aee8df3cdc935e9bdd4f2d020306035dbe (diff)
Merge commit 'v3.0' into x86/vdso
Diffstat (limited to 'drivers/ssb/driver_pcicore.c')
-rw-r--r--drivers/ssb/driver_pcicore.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index 82feb348c8bb..d6620ad309ce 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -516,8 +516,17 @@ static void ssb_pcicore_pcie_setup_workarounds(struct ssb_pcicore *pc)
516 516
517static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) 517static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
518{ 518{
519 ssb_pcicore_fix_sprom_core_index(pc);
520
519 /* Disable PCI interrupts. */ 521 /* Disable PCI interrupts. */
520 ssb_write32(pc->dev, SSB_INTVEC, 0); 522 ssb_write32(pc->dev, SSB_INTVEC, 0);
523
524 /* Additional PCIe always once-executed workarounds */
525 if (pc->dev->id.coreid == SSB_DEV_PCIE) {
526 ssb_pcicore_serdes_workaround(pc);
527 /* TODO: ASPM */
528 /* TODO: Clock Request Update */
529 }
521} 530}
522 531
523void ssb_pcicore_init(struct ssb_pcicore *pc) 532void ssb_pcicore_init(struct ssb_pcicore *pc)
@@ -529,8 +538,6 @@ void ssb_pcicore_init(struct ssb_pcicore *pc)
529 if (!ssb_device_is_enabled(dev)) 538 if (!ssb_device_is_enabled(dev))
530 ssb_device_enable(dev, 0); 539 ssb_device_enable(dev, 0);
531 540
532 ssb_pcicore_fix_sprom_core_index(pc);
533
534#ifdef CONFIG_SSB_PCICORE_HOSTMODE 541#ifdef CONFIG_SSB_PCICORE_HOSTMODE
535 pc->hostmode = pcicore_is_in_hostmode(pc); 542 pc->hostmode = pcicore_is_in_hostmode(pc);
536 if (pc->hostmode) 543 if (pc->hostmode)
@@ -538,11 +545,6 @@ void ssb_pcicore_init(struct ssb_pcicore *pc)
538#endif /* CONFIG_SSB_PCICORE_HOSTMODE */ 545#endif /* CONFIG_SSB_PCICORE_HOSTMODE */
539 if (!pc->hostmode) 546 if (!pc->hostmode)
540 ssb_pcicore_init_clientmode(pc); 547 ssb_pcicore_init_clientmode(pc);
541
542 /* Additional always once-executed workarounds */
543 ssb_pcicore_serdes_workaround(pc);
544 /* TODO: ASPM */
545 /* TODO: Clock Request Update */
546} 548}
547 549
548static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address) 550static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address)