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authorAxel Lin <axel.lin@ingics.com>2014-03-02 10:01:50 -0500
committerMark Brown <broonie@linaro.org>2014-03-02 20:37:46 -0500
commite428a420078eac26039b53af464355332809be52 (patch)
tree9ff7487ef2ff6d4209e6d27ee5e024af0ecab922 /drivers/spi
parent80d68ca5a52176a140e1daa527d0b698feb69c83 (diff)
spi: sh-hspi: Remove duplicate code to set default transfer speed
In the implementation of __spi_validate(), spi core will use spi device's max speed as default transfer speed if it is not set for this transfer. So we can remove the same logic in hspi_hw_setup(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-sh-hspi.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c
index dad800b9887f..180eecf72428 100644
--- a/drivers/spi/spi-sh-hspi.c
+++ b/drivers/spi/spi-sh-hspi.c
@@ -111,14 +111,9 @@ static void hspi_hw_setup(struct hspi_priv *hspi,
111{ 111{
112 struct spi_device *spi = msg->spi; 112 struct spi_device *spi = msg->spi;
113 struct device *dev = hspi->dev; 113 struct device *dev = hspi->dev;
114 u32 target_rate;
115 u32 spcr, idiv_clk; 114 u32 spcr, idiv_clk;
116 u32 rate, best_rate, min, tmp; 115 u32 rate, best_rate, min, tmp;
117 116
118 target_rate = t ? t->speed_hz : 0;
119 if (!target_rate)
120 target_rate = spi->max_speed_hz;
121
122 /* 117 /*
123 * find best IDIV/CLKCx settings 118 * find best IDIV/CLKCx settings
124 */ 119 */
@@ -138,7 +133,7 @@ static void hspi_hw_setup(struct hspi_priv *hspi,
138 rate /= (((idiv_clk & 0x1F) + 1) * 2); 133 rate /= (((idiv_clk & 0x1F) + 1) * 2);
139 134
140 /* save best settings */ 135 /* save best settings */
141 tmp = abs(target_rate - rate); 136 tmp = abs(t->speed_hz - rate);
142 if (tmp < min) { 137 if (tmp < min) {
143 min = tmp; 138 min = tmp;
144 spcr = idiv_clk; 139 spcr = idiv_clk;
@@ -151,7 +146,7 @@ static void hspi_hw_setup(struct hspi_priv *hspi,
151 if (spi->mode & SPI_CPOL) 146 if (spi->mode & SPI_CPOL)
152 spcr |= 1 << 6; 147 spcr |= 1 << 6;
153 148
154 dev_dbg(dev, "speed %d/%d\n", target_rate, best_rate); 149 dev_dbg(dev, "speed %d/%d\n", t->speed_hz, best_rate);
155 150
156 hspi_write(hspi, SPCR, spcr); 151 hspi_write(hspi, SPCR, spcr);
157 hspi_write(hspi, SPSR, 0x0); 152 hspi_write(hspi, SPSR, 0x0);