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authorSekhar Nori <nsekhar@ti.com>2010-10-01 05:21:40 -0400
committerSekhar Nori <nsekhar@ti.com>2010-11-18 08:08:34 -0500
commit903ca25b219e28e3513ca4c2ff379fcdf19e057e (patch)
treec1b4ef45ca1925ea056974f4f78b6606014b6b4a /drivers/spi
parenta4f4497b86a689aa8c827d4ebe0d00c4eba66f76 (diff)
spi: davinci: do not allocate DMA channels during SPI device setup
Do not allocate (and de-allocate) SPI DMA channels during setup (and cleanup) for each SPI device. Instead, allocate the DMA channels once duing probe and use them for the life time of the driver. This makes sense since there are dedicated DMA channels meant for SPI use. This also helps remove the unnecessary DMA "sync_dev" variables being used to store DMA channel information. Also, the "use_dma" platform variable is now eliminated since it is possible to check if the platform supports DMA or not based upon whether DMA resources can be found or not. Tested-By: Michael Williamson <michael.williamson@criticallink.com> Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/davinci_spi.c153
1 files changed, 51 insertions, 102 deletions
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 9695f98b03bd..6db478601024 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -116,8 +116,6 @@
116struct davinci_spi_dma { 116struct davinci_spi_dma {
117 int dma_tx_channel; 117 int dma_tx_channel;
118 int dma_rx_channel; 118 int dma_rx_channel;
119 int dma_tx_sync_dev;
120 int dma_rx_sync_dev;
121 enum dma_event_q eventq; 119 enum dma_event_q eventq;
122 120
123 struct completion dma_tx_completion; 121 struct completion dma_tx_completion;
@@ -153,8 +151,6 @@ struct davinci_spi {
153 151
154static struct davinci_spi_config davinci_spi_default_cfg; 152static struct davinci_spi_config davinci_spi_default_cfg;
155 153
156static unsigned use_dma;
157
158static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi) 154static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi)
159{ 155{
160 if (davinci_spi->rx) { 156 if (davinci_spi->rx) {
@@ -391,12 +387,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
391 387
392static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data) 388static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
393{ 389{
394 struct spi_device *spi = (struct spi_device *)data; 390 struct davinci_spi_dma *davinci_spi_dma = data;
395 struct davinci_spi *davinci_spi;
396 struct davinci_spi_dma *davinci_spi_dma;
397
398 davinci_spi = spi_master_get_devdata(spi->master);
399 davinci_spi_dma = &davinci_spi->dma_channels;
400 391
401 if (ch_status == DMA_COMPLETE) 392 if (ch_status == DMA_COMPLETE)
402 edma_stop(davinci_spi_dma->dma_rx_channel); 393 edma_stop(davinci_spi_dma->dma_rx_channel);
@@ -408,12 +399,7 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
408 399
409static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) 400static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
410{ 401{
411 struct spi_device *spi = (struct spi_device *)data; 402 struct davinci_spi_dma *davinci_spi_dma = data;
412 struct davinci_spi *davinci_spi;
413 struct davinci_spi_dma *davinci_spi_dma;
414
415 davinci_spi = spi_master_get_devdata(spi->master);
416 davinci_spi_dma = &davinci_spi->dma_channels;
417 403
418 if (ch_status == DMA_COMPLETE) 404 if (ch_status == DMA_COMPLETE)
419 edma_stop(davinci_spi_dma->dma_tx_channel); 405 edma_stop(davinci_spi_dma->dma_tx_channel);
@@ -423,39 +409,6 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
423 complete(&davinci_spi_dma->dma_tx_completion); 409 complete(&davinci_spi_dma->dma_tx_completion);
424} 410}
425 411
426static int davinci_spi_request_dma(struct spi_device *spi)
427{
428 struct davinci_spi *davinci_spi;
429 struct davinci_spi_dma *davinci_spi_dma;
430 struct device *sdev;
431 int r;
432
433 davinci_spi = spi_master_get_devdata(spi->master);
434 davinci_spi_dma = &davinci_spi->dma_channels;
435 sdev = davinci_spi->bitbang.master->dev.parent;
436
437 r = edma_alloc_channel(davinci_spi_dma->dma_rx_sync_dev,
438 davinci_spi_dma_rx_callback, spi,
439 davinci_spi_dma->eventq);
440 if (r < 0) {
441 dev_dbg(sdev, "Unable to request DMA channel for SPI RX\n");
442 return -EAGAIN;
443 }
444 davinci_spi_dma->dma_rx_channel = r;
445 r = edma_alloc_channel(davinci_spi_dma->dma_tx_sync_dev,
446 davinci_spi_dma_tx_callback, spi,
447 davinci_spi_dma->eventq);
448 if (r < 0) {
449 edma_free_channel(davinci_spi_dma->dma_rx_channel);
450 davinci_spi_dma->dma_rx_channel = -1;
451 dev_dbg(sdev, "Unable to request DMA channel for SPI TX\n");
452 return -EAGAIN;
453 }
454 davinci_spi_dma->dma_tx_channel = r;
455
456 return 0;
457}
458
459/** 412/**
460 * davinci_spi_setup - This functions will set default transfer method 413 * davinci_spi_setup - This functions will set default transfer method
461 * @spi: spi device on which data transfer to be done 414 * @spi: spi device on which data transfer to be done
@@ -466,7 +419,6 @@ static int davinci_spi_setup(struct spi_device *spi)
466{ 419{
467 int retval = 0; 420 int retval = 0;
468 struct davinci_spi *davinci_spi; 421 struct davinci_spi *davinci_spi;
469 struct davinci_spi_dma *davinci_spi_dma;
470 struct davinci_spi_platform_data *pdata; 422 struct davinci_spi_platform_data *pdata;
471 423
472 davinci_spi = spi_master_get_devdata(spi->master); 424 davinci_spi = spi_master_get_devdata(spi->master);
@@ -494,33 +446,9 @@ static int davinci_spi_setup(struct spi_device *spi)
494 clear_io_bits(davinci_spi->base + SPIGCR1, 446 clear_io_bits(davinci_spi->base + SPIGCR1,
495 SPIGCR1_LOOPBACK_MASK); 447 SPIGCR1_LOOPBACK_MASK);
496 448
497 if (use_dma) {
498 davinci_spi_dma = &davinci_spi->dma_channels;
499
500 if ((davinci_spi_dma->dma_rx_channel == -1) ||
501 (davinci_spi_dma->dma_tx_channel == -1))
502 retval = davinci_spi_request_dma(spi);
503 }
504
505 return retval; 449 return retval;
506} 450}
507 451
508static void davinci_spi_cleanup(struct spi_device *spi)
509{
510 if (use_dma) {
511 struct davinci_spi *davinci_spi =
512 spi_master_get_devdata(spi->master);
513 struct davinci_spi_dma *davinci_spi_dma =
514 &davinci_spi->dma_channels;
515
516 if ((davinci_spi_dma->dma_rx_channel != -1)
517 && (davinci_spi_dma->dma_tx_channel != -1)) {
518 edma_free_channel(davinci_spi_dma->dma_tx_channel);
519 edma_free_channel(davinci_spi_dma->dma_rx_channel);
520 }
521 }
522}
523
524static int davinci_spi_check_error(struct davinci_spi *davinci_spi, 452static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
525 int int_status) 453 int int_status)
526{ 454{
@@ -842,6 +770,30 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
842 return t->len; 770 return t->len;
843} 771}
844 772
773static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma)
774{
775 int r;
776
777 r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel,
778 davinci_spi_dma_rx_callback, davinci_spi_dma,
779 davinci_spi_dma->eventq);
780 if (r < 0) {
781 pr_err("Unable to request DMA channel for SPI RX\n");
782 return -EAGAIN;
783 }
784
785 r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel,
786 davinci_spi_dma_tx_callback, davinci_spi_dma,
787 davinci_spi_dma->eventq);
788 if (r < 0) {
789 edma_free_channel(davinci_spi_dma->dma_rx_channel);
790 pr_err("Unable to request DMA channel for SPI TX\n");
791 return -EAGAIN;
792 }
793
794 return 0;
795}
796
845/** 797/**
846 * davinci_spi_probe - probe function for SPI Master Controller 798 * davinci_spi_probe - probe function for SPI Master Controller
847 * @pdev: platform_device structure which contains plateform specific data 799 * @pdev: platform_device structure which contains plateform specific data
@@ -928,45 +880,39 @@ static int davinci_spi_probe(struct platform_device *pdev)
928 master->bus_num = pdev->id; 880 master->bus_num = pdev->id;
929 master->num_chipselect = pdata->num_chipselect; 881 master->num_chipselect = pdata->num_chipselect;
930 master->setup = davinci_spi_setup; 882 master->setup = davinci_spi_setup;
931 master->cleanup = davinci_spi_cleanup;
932 883
933 davinci_spi->bitbang.chipselect = davinci_spi_chipselect; 884 davinci_spi->bitbang.chipselect = davinci_spi_chipselect;
934 davinci_spi->bitbang.setup_transfer = davinci_spi_setup_transfer; 885 davinci_spi->bitbang.setup_transfer = davinci_spi_setup_transfer;
935 886
936 davinci_spi->version = pdata->version; 887 davinci_spi->version = pdata->version;
937 use_dma = pdata->use_dma;
938 888
939 davinci_spi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP; 889 davinci_spi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP;
940 if (davinci_spi->version == SPI_VERSION_2) 890 if (davinci_spi->version == SPI_VERSION_2)
941 davinci_spi->bitbang.flags |= SPI_READY; 891 davinci_spi->bitbang.flags |= SPI_READY;
942 892
943 if (use_dma) { 893 r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
944 r = platform_get_resource(pdev, IORESOURCE_DMA, 0); 894 if (r)
945 if (r) 895 dma_rx_chan = r->start;
946 dma_rx_chan = r->start; 896 r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
947 r = platform_get_resource(pdev, IORESOURCE_DMA, 1); 897 if (r)
948 if (r) 898 dma_tx_chan = r->start;
949 dma_tx_chan = r->start; 899 r = platform_get_resource(pdev, IORESOURCE_DMA, 2);
950 r = platform_get_resource(pdev, IORESOURCE_DMA, 2); 900 if (r)
951 if (r) 901 dma_eventq = r->start;
952 dma_eventq = r->start; 902
953 } 903 davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_pio;
954 904 if (dma_rx_chan != SPI_NO_RESOURCE &&
955 if (!use_dma || 905 dma_tx_chan != SPI_NO_RESOURCE &&
956 dma_rx_chan == SPI_NO_RESOURCE || 906 dma_eventq != SPI_NO_RESOURCE) {
957 dma_tx_chan == SPI_NO_RESOURCE || 907 davinci_spi->dma_channels.dma_rx_channel = dma_rx_chan;
958 dma_eventq == SPI_NO_RESOURCE) { 908 davinci_spi->dma_channels.dma_tx_channel = dma_tx_chan;
959 davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_pio;
960 use_dma = 0;
961 } else {
962 davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma;
963
964 davinci_spi->dma_channels.dma_rx_channel = -1;
965 davinci_spi->dma_channels.dma_rx_sync_dev = dma_rx_chan;
966 davinci_spi->dma_channels.dma_tx_channel = -1;
967 davinci_spi->dma_channels.dma_tx_sync_dev = dma_tx_chan;
968 davinci_spi->dma_channels.eventq = dma_eventq; 909 davinci_spi->dma_channels.eventq = dma_eventq;
969 910
911 ret = davinci_spi_request_dma(&davinci_spi->dma_channels);
912 if (ret)
913 goto free_clk;
914
915 davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma;
970 dev_info(&pdev->dev, "DaVinci SPI driver in EDMA mode\n" 916 dev_info(&pdev->dev, "DaVinci SPI driver in EDMA mode\n"
971 "Using RX channel = %d , TX channel = %d and " 917 "Using RX channel = %d , TX channel = %d and "
972 "event queue = %d", dma_rx_chan, dma_tx_chan, 918 "event queue = %d", dma_rx_chan, dma_tx_chan,
@@ -1015,12 +961,15 @@ static int davinci_spi_probe(struct platform_device *pdev)
1015 961
1016 ret = spi_bitbang_start(&davinci_spi->bitbang); 962 ret = spi_bitbang_start(&davinci_spi->bitbang);
1017 if (ret) 963 if (ret)
1018 goto free_clk; 964 goto free_dma;
1019 965
1020 dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base); 966 dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base);
1021 967
1022 return ret; 968 return ret;
1023 969
970free_dma:
971 edma_free_channel(davinci_spi->dma_channels.dma_tx_channel);
972 edma_free_channel(davinci_spi->dma_channels.dma_rx_channel);
1024free_clk: 973free_clk:
1025 clk_disable(davinci_spi->clk); 974 clk_disable(davinci_spi->clk);
1026 clk_put(davinci_spi->clk); 975 clk_put(davinci_spi->clk);