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authorMartin Sperl <kernel@martin.sperl.org>2015-03-19 05:01:52 -0400
committerMark Brown <broonie@kernel.org>2015-03-23 14:52:26 -0400
commit210b49231af6a3ede5de3c90850dbf1134a855c2 (patch)
tree958ee2e4829e813fcb02cb1d5a9b5e44dca5180a /drivers/spi
parent4adf312976ef2b72830b83f212fef3f6a36513a6 (diff)
spi: bcm2835: clock divider can be a multiple of 2
The official documentation is wrong in this respect. Has been tested empirically for dividers 2-1024 Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-bcm2835.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
index 960dcce607c2..8de1925fe554 100644
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
@@ -153,8 +153,9 @@ static int bcm2835_spi_start_transfer(struct spi_device *spi,
153 if (spi_hz >= clk_hz / 2) { 153 if (spi_hz >= clk_hz / 2) {
154 cdiv = 2; /* clk_hz/2 is the fastest we can go */ 154 cdiv = 2; /* clk_hz/2 is the fastest we can go */
155 } else if (spi_hz) { 155 } else if (spi_hz) {
156 /* CDIV must be a power of two */ 156 /* CDIV must be a multiple of two */
157 cdiv = roundup_pow_of_two(DIV_ROUND_UP(clk_hz, spi_hz)); 157 cdiv = DIV_ROUND_UP(clk_hz, spi_hz);
158 cdiv += (cdiv % 2);
158 159
159 if (cdiv >= 65536) 160 if (cdiv >= 65536)
160 cdiv = 0; /* 0 is the slowest we can go */ 161 cdiv = 0; /* 0 is the slowest we can go */