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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-07 05:30:46 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-07 08:02:14 -0400
commitdc257cf154be708ecc47b8b89c12ad8cd2cc35e4 (patch)
tree625d57ef6c42030cc1ce1842d4efc105e284bc3d /drivers/spi/spi-pl022.c
parent5bc69bf9aeb73547cad8e1ce683a103fe9728282 (diff)
parentd48b97b403d23f6df0b990cee652bdf9a52337a3 (diff)
Merge tag 'v3.4-rc6' into drm-intel-next
Conflicts: drivers/gpu/drm/i915/intel_display.c Ok, this is a fun story of git totally messing things up. There /shouldn't/ be any conflict in here, because the fixes in -rc6 do only touch functions that have not been changed in -next. The offending commits in drm-next are 14415745b2..1fa611065 which simply move a few functions from intel_display.c to intel_pm.c. The problem seems to be that git diff gets completely confused: $ git diff 14415745b2..1fa611065 is a nice mess in intel_display.c, and the diff leaks into totally unrelated functions, whereas $git diff --minimal 14415745b2..1fa611065 is exactly what we want. Unfortunately there seems to be no way to teach similar smarts to the merge diff and conflict generation code, because with the minimal diff there really shouldn't be any conflicts. For added hilarity, every time something in that area changes the + and - lines in the diff move around like crazy, again resulting in new conflicts. So I fear this mess will stay with us for a little longer (and might result in another backmerge down the road). Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/spi/spi-pl022.c')
-rw-r--r--drivers/spi/spi-pl022.c58
1 files changed, 34 insertions, 24 deletions
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 09c925aaf320..400ae2121a2a 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -1667,9 +1667,15 @@ static int calculate_effective_freq(struct pl022 *pl022, int freq, struct
1667 /* cpsdvsr = 254 & scr = 255 */ 1667 /* cpsdvsr = 254 & scr = 255 */
1668 min_tclk = spi_rate(rate, CPSDVR_MAX, SCR_MAX); 1668 min_tclk = spi_rate(rate, CPSDVR_MAX, SCR_MAX);
1669 1669
1670 if (!((freq <= max_tclk) && (freq >= min_tclk))) { 1670 if (freq > max_tclk)
1671 dev_warn(&pl022->adev->dev,
1672 "Max speed that can be programmed is %d Hz, you requested %d\n",
1673 max_tclk, freq);
1674
1675 if (freq < min_tclk) {
1671 dev_err(&pl022->adev->dev, 1676 dev_err(&pl022->adev->dev,
1672 "controller data is incorrect: out of range frequency"); 1677 "Requested frequency: %d Hz is less than minimum possible %d Hz\n",
1678 freq, min_tclk);
1673 return -EINVAL; 1679 return -EINVAL;
1674 } 1680 }
1675 1681
@@ -1681,26 +1687,37 @@ static int calculate_effective_freq(struct pl022 *pl022, int freq, struct
1681 while (scr <= SCR_MAX) { 1687 while (scr <= SCR_MAX) {
1682 tmp = spi_rate(rate, cpsdvsr, scr); 1688 tmp = spi_rate(rate, cpsdvsr, scr);
1683 1689
1684 if (tmp > freq) 1690 if (tmp > freq) {
1691 /* we need lower freq */
1685 scr++; 1692 scr++;
1693 continue;
1694 }
1695
1686 /* 1696 /*
1687 * If found exact value, update and break. 1697 * If found exact value, mark found and break.
1688 * If found more closer value, update and continue. 1698 * If found more closer value, update and break.
1689 */ 1699 */
1690 else if ((tmp == freq) || (tmp > best_freq)) { 1700 if (tmp > best_freq) {
1691 best_freq = tmp; 1701 best_freq = tmp;
1692 best_cpsdvsr = cpsdvsr; 1702 best_cpsdvsr = cpsdvsr;
1693 best_scr = scr; 1703 best_scr = scr;
1694 1704
1695 if (tmp == freq) 1705 if (tmp == freq)
1696 break; 1706 found = 1;
1697 } 1707 }
1698 scr++; 1708 /*
1709 * increased scr will give lower rates, which are not
1710 * required
1711 */
1712 break;
1699 } 1713 }
1700 cpsdvsr += 2; 1714 cpsdvsr += 2;
1701 scr = SCR_MIN; 1715 scr = SCR_MIN;
1702 } 1716 }
1703 1717
1718 WARN(!best_freq, "pl022: Matching cpsdvsr and scr not found for %d Hz rate \n",
1719 freq);
1720
1704 clk_freq->cpsdvsr = (u8) (best_cpsdvsr & 0xFF); 1721 clk_freq->cpsdvsr = (u8) (best_cpsdvsr & 0xFF);
1705 clk_freq->scr = (u8) (best_scr & 0xFF); 1722 clk_freq->scr = (u8) (best_scr & 0xFF);
1706 dev_dbg(&pl022->adev->dev, 1723 dev_dbg(&pl022->adev->dev,
@@ -1823,9 +1840,12 @@ static int pl022_setup(struct spi_device *spi)
1823 } else 1840 } else
1824 chip->cs_control = chip_info->cs_control; 1841 chip->cs_control = chip_info->cs_control;
1825 1842
1826 if (bits <= 3) { 1843 /* Check bits per word with vendor specific range */
1827 /* PL022 doesn't support less than 4-bits */ 1844 if ((bits <= 3) || (bits > pl022->vendor->max_bpw)) {
1828 status = -ENOTSUPP; 1845 status = -ENOTSUPP;
1846 dev_err(&spi->dev, "illegal data size for this controller!\n");
1847 dev_err(&spi->dev, "This controller can only handle 4 <= n <= %d bit words\n",
1848 pl022->vendor->max_bpw);
1829 goto err_config_params; 1849 goto err_config_params;
1830 } else if (bits <= 8) { 1850 } else if (bits <= 8) {
1831 dev_dbg(&spi->dev, "4 <= n <=8 bits per word\n"); 1851 dev_dbg(&spi->dev, "4 <= n <=8 bits per word\n");
@@ -1838,20 +1858,10 @@ static int pl022_setup(struct spi_device *spi)
1838 chip->read = READING_U16; 1858 chip->read = READING_U16;
1839 chip->write = WRITING_U16; 1859 chip->write = WRITING_U16;
1840 } else { 1860 } else {
1841 if (pl022->vendor->max_bpw >= 32) { 1861 dev_dbg(&spi->dev, "17 <= n <= 32 bits per word\n");
1842 dev_dbg(&spi->dev, "17 <= n <= 32 bits per word\n"); 1862 chip->n_bytes = 4;
1843 chip->n_bytes = 4; 1863 chip->read = READING_U32;
1844 chip->read = READING_U32; 1864 chip->write = WRITING_U32;
1845 chip->write = WRITING_U32;
1846 } else {
1847 dev_err(&spi->dev,
1848 "illegal data size for this controller!\n");
1849 dev_err(&spi->dev,
1850 "a standard pl022 can only handle "
1851 "1 <= n <= 16 bit words\n");
1852 status = -ENOTSUPP;
1853 goto err_config_params;
1854 }
1855 } 1865 }
1856 1866
1857 /* Now Initialize all register settings required for this chip */ 1867 /* Now Initialize all register settings required for this chip */