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authorJason Gunthorpe <jgunthorpe@obsidianresearch.com>2012-11-21 14:23:35 -0500
committerGrant Likely <grant.likely@secretlab.ca>2012-12-06 09:24:52 -0500
commitb15d5d7004e25716c8b8dfe4e322a64551e2e6cc (patch)
tree21ab3f80f674752509f0f4c440303919c41e023c /drivers/spi/spi-orion.c
parent746aeffdd97263d8356870a5dfbbdb5f927378e2 (diff)
spi/orion: Add SPI_CHPA and SPI_CPOL support to kirkwood driver.
Support these transfer modes from the SPI layer by setting the appropriate register bits before doing the transfer. This was tested on the Marvell kirkwood SOC that uses this driver. Reviewed-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Rolf Manderscheid <rvm@obsidianresearch.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/spi-orion.c')
-rw-r--r--drivers/spi/spi-orion.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c
index b17c09cf0a05..011186d570fe 100644
--- a/drivers/spi/spi-orion.c
+++ b/drivers/spi/spi-orion.c
@@ -32,8 +32,12 @@
32#define ORION_SPI_DATA_IN_REG 0x0c 32#define ORION_SPI_DATA_IN_REG 0x0c
33#define ORION_SPI_INT_CAUSE_REG 0x10 33#define ORION_SPI_INT_CAUSE_REG 0x10
34 34
35#define ORION_SPI_MODE_CPOL (1 << 11)
36#define ORION_SPI_MODE_CPHA (1 << 12)
35#define ORION_SPI_IF_8_16_BIT_MODE (1 << 5) 37#define ORION_SPI_IF_8_16_BIT_MODE (1 << 5)
36#define ORION_SPI_CLK_PRESCALE_MASK 0x1F 38#define ORION_SPI_CLK_PRESCALE_MASK 0x1F
39#define ORION_SPI_MODE_MASK (ORION_SPI_MODE_CPOL | \
40 ORION_SPI_MODE_CPHA)
37 41
38struct orion_spi { 42struct orion_spi {
39 struct spi_master *master; 43 struct spi_master *master;
@@ -123,6 +127,23 @@ static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
123 return 0; 127 return 0;
124} 128}
125 129
130static void
131orion_spi_mode_set(struct spi_device *spi)
132{
133 u32 reg;
134 struct orion_spi *orion_spi;
135
136 orion_spi = spi_master_get_devdata(spi->master);
137
138 reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
139 reg &= ~ORION_SPI_MODE_MASK;
140 if (spi->mode & SPI_CPOL)
141 reg |= ORION_SPI_MODE_CPOL;
142 if (spi->mode & SPI_CPHA)
143 reg |= ORION_SPI_MODE_CPHA;
144 writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
145}
146
126/* 147/*
127 * called only when no transfer is active on the bus 148 * called only when no transfer is active on the bus
128 */ 149 */
@@ -142,6 +163,8 @@ orion_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
142 if ((t != NULL) && t->bits_per_word) 163 if ((t != NULL) && t->bits_per_word)
143 bits_per_word = t->bits_per_word; 164 bits_per_word = t->bits_per_word;
144 165
166 orion_spi_mode_set(spi);
167
145 rc = orion_spi_baudrate_set(spi, speed); 168 rc = orion_spi_baudrate_set(spi, speed);
146 if (rc) 169 if (rc)
147 return rc; 170 return rc;
@@ -399,7 +422,7 @@ static int __init orion_spi_probe(struct platform_device *pdev)
399 } 422 }
400 423
401 /* we support only mode 0, and no options */ 424 /* we support only mode 0, and no options */
402 master->mode_bits = 0; 425 master->mode_bits = SPI_CPHA | SPI_CPOL;
403 426
404 master->setup = orion_spi_setup; 427 master->setup = orion_spi_setup;
405 master->transfer_one_message = orion_spi_transfer_one_message; 428 master->transfer_one_message = orion_spi_transfer_one_message;