diff options
author | Ken Wilson <ken.wilson@opengear.com> | 2015-01-15 22:10:47 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2015-01-16 07:38:54 -0500 |
commit | 23244404e2ae788b19245adb1eb604cce1270e72 (patch) | |
tree | b504f6d2a56eb8ae4792db3cb6a95b5c19dfc230 /drivers/spi/spi-orion.c | |
parent | 75872ebe96d3e78e86840f51dd4b7ca0abeacd6e (diff) |
spi: orion: Add multiple chip select support to spi-orion
This commit adds support for multiple hardware chip selects to spi-orion.
Different SoCs support different number of chip selects (up to
8 on some platforms). The driver allows up to this number, and it is up
to the implementer to only use the chip selects that are available.
Signed-off-by: Ken Wilson <ken.wilson@opengear.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-orion.c')
-rw-r--r-- | drivers/spi/spi-orion.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index 98f1a8491b27..861664776672 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c | |||
@@ -28,7 +28,12 @@ | |||
28 | /* Runtime PM autosuspend timeout: PM is fairly light on this driver */ | 28 | /* Runtime PM autosuspend timeout: PM is fairly light on this driver */ |
29 | #define SPI_AUTOSUSPEND_TIMEOUT 200 | 29 | #define SPI_AUTOSUSPEND_TIMEOUT 200 |
30 | 30 | ||
31 | #define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/ | 31 | /* Some SoCs using this driver support up to 8 chip selects. |
32 | * It is up to the implementer to only use the chip selects | ||
33 | * that are available. | ||
34 | */ | ||
35 | #define ORION_NUM_CHIPSELECTS 8 | ||
36 | |||
32 | #define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */ | 37 | #define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */ |
33 | 38 | ||
34 | #define ORION_SPI_IF_CTRL_REG 0x00 | 39 | #define ORION_SPI_IF_CTRL_REG 0x00 |
@@ -44,6 +49,10 @@ | |||
44 | #define ARMADA_SPI_CLK_PRESCALE_MASK 0xDF | 49 | #define ARMADA_SPI_CLK_PRESCALE_MASK 0xDF |
45 | #define ORION_SPI_MODE_MASK (ORION_SPI_MODE_CPOL | \ | 50 | #define ORION_SPI_MODE_MASK (ORION_SPI_MODE_CPOL | \ |
46 | ORION_SPI_MODE_CPHA) | 51 | ORION_SPI_MODE_CPHA) |
52 | #define ORION_SPI_CS_MASK 0x1C | ||
53 | #define ORION_SPI_CS_SHIFT 2 | ||
54 | #define ORION_SPI_CS(cs) ((cs << ORION_SPI_CS_SHIFT) & \ | ||
55 | ORION_SPI_CS_MASK) | ||
47 | 56 | ||
48 | enum orion_spi_type { | 57 | enum orion_spi_type { |
49 | ORION_SPI, | 58 | ORION_SPI, |
@@ -221,6 +230,10 @@ static void orion_spi_set_cs(struct spi_device *spi, bool enable) | |||
221 | 230 | ||
222 | orion_spi = spi_master_get_devdata(spi->master); | 231 | orion_spi = spi_master_get_devdata(spi->master); |
223 | 232 | ||
233 | orion_spi_clrbits(orion_spi, ORION_SPI_IF_CTRL_REG, ORION_SPI_CS_MASK); | ||
234 | orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, | ||
235 | ORION_SPI_CS(spi->chip_select)); | ||
236 | |||
224 | /* Chip select logic is inverted from spi_set_cs */ | 237 | /* Chip select logic is inverted from spi_set_cs */ |
225 | if (!enable) | 238 | if (!enable) |
226 | orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1); | 239 | orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1); |