Merge tag 'v4.0-rc2' into irq/core, to refresh the tree before applying new changes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

1 files changed, 30 insertions, 8 deletions

diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
index ba68da12cdf0..5ba331047cbe 100644
--- a/drivers/spi/spi-dw-pci.c
+++ b/drivers/spi/spi-dw-pci.c
@@ -30,10 +30,20 @@ struct dw_spi_pci {
 
 struct spi_pci_desc {
         int     (*setup)(struct dw_spi *);
+        u16     num_cs;
+        u16     bus_num;
 };
 
-static struct spi_pci_desc spi_pci_mid_desc = {
+static struct spi_pci_desc spi_pci_mid_desc_1 = {
         .setup = dw_spi_mid_init,
+        .num_cs = 32,
+        .bus_num = 0,
+};
+
+static struct spi_pci_desc spi_pci_mid_desc_2 = {
+        .setup = dw_spi_mid_init,
+        .num_cs = 4,
+        .bus_num = 1,
 };
 
 static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
@@ -65,18 +75,23 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 
         dws->regs = pcim_iomap_table(pdev)[pci_bar];
 
-        dws->bus_num = 0;
-        dws->num_cs = 4;
         dws->irq = pdev->irq;
 
         /*
          * Specific handling for paltforms, like dma setup,
          * clock rate, FIFO depth.
          */
-        if (desc && desc->setup) {
-                ret = desc->setup(dws);
-                if (ret)
-                        return ret;
+        if (desc) {
+                dws->num_cs = desc->num_cs;
+                dws->bus_num = desc->bus_num;
+
+                if (desc->setup) {
+                        ret = desc->setup(dws);
+                        if (ret)
+                                return ret;
+                }
+        } else {
+                return -ENODEV;
         }
 
         ret = dw_spi_add_host(&pdev->dev, dws);
@@ -121,7 +136,14 @@ static SIMPLE_DEV_PM_OPS(dw_spi_pm_ops, spi_suspend, spi_resume);
 
 static const struct pci_device_id pci_ids[] = {
         /* Intel MID platform SPI controller 0 */
-        { PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc},
+        /*
+         * The access to the device 8086:0801 is disabled by HW, since it's
+         * exclusively used by SCU to communicate with MSIC.
+         */
+        /* Intel MID platform SPI controller 1 */
+        { PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc_1},
+        /* Intel MID platform SPI controller 2 */
+        { PCI_VDEVICE(INTEL, 0x0812), (kernel_ulong_t)&spi_pci_mid_desc_2},
         {},
 };