diff options
author | Axel Lin <axel.lin@ingics.com> | 2014-02-13 20:55:55 -0500 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-03-04 22:54:10 -0500 |
commit | 3531b717d05273e45efd2ab7903ea013aaec3fea (patch) | |
tree | 741eeedc0b6dba1d33def12bb9045ffc59d7f231 /drivers/spi/spi-coldfire-qspi.c | |
parent | 8bd313453736d8efa82afee01c899774b29362ac (diff) |
spi: coldfire-qspi: Use core message handling
Convert to use default implementation of transfer_one_message().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers/spi/spi-coldfire-qspi.c')
-rw-r--r-- | drivers/spi/spi-coldfire-qspi.c | 81 |
1 files changed, 34 insertions, 47 deletions
diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c index e35294239034..8d594c6704ad 100644 --- a/drivers/spi/spi-coldfire-qspi.c +++ b/drivers/spi/spi-coldfire-qspi.c | |||
@@ -298,58 +298,44 @@ static void mcfqspi_transfer_msg16(struct mcfqspi *mcfqspi, unsigned count, | |||
298 | } | 298 | } |
299 | } | 299 | } |
300 | 300 | ||
301 | static int mcfqspi_transfer_one_message(struct spi_master *master, | 301 | static void mcfqspi_set_cs(struct spi_device *spi, bool enable) |
302 | struct spi_message *msg) | ||
303 | { | 302 | { |
304 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | 303 | struct mcfqspi *mcfqspi = spi_master_get_devdata(spi->master); |
305 | struct spi_device *spi = msg->spi; | 304 | bool cs_high = spi->mode & SPI_CS_HIGH; |
306 | struct spi_transfer *t; | ||
307 | int status = 0; | ||
308 | |||
309 | list_for_each_entry(t, &msg->transfers, transfer_list) { | ||
310 | bool cs_high = spi->mode & SPI_CS_HIGH; | ||
311 | u16 qmr = MCFQSPI_QMR_MSTR; | ||
312 | |||
313 | qmr |= t->bits_per_word << 10; | ||
314 | if (spi->mode & SPI_CPHA) | ||
315 | qmr |= MCFQSPI_QMR_CPHA; | ||
316 | if (spi->mode & SPI_CPOL) | ||
317 | qmr |= MCFQSPI_QMR_CPOL; | ||
318 | if (t->speed_hz) | ||
319 | qmr |= mcfqspi_qmr_baud(t->speed_hz); | ||
320 | else | ||
321 | qmr |= mcfqspi_qmr_baud(spi->max_speed_hz); | ||
322 | mcfqspi_wr_qmr(mcfqspi, qmr); | ||
323 | 305 | ||
306 | if (enable) | ||
324 | mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high); | 307 | mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high); |
308 | else | ||
309 | mcfqspi_cs_deselect(mcfqspi, spi->chip_select, cs_high); | ||
310 | } | ||
325 | 311 | ||
326 | mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE); | 312 | static int mcfqspi_transfer_one(struct spi_master *master, |
327 | if (t->bits_per_word == 8) | 313 | struct spi_device *spi, |
328 | mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf, | 314 | struct spi_transfer *t) |
329 | t->rx_buf); | 315 | { |
330 | else | 316 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); |
331 | mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf, | 317 | u16 qmr = MCFQSPI_QMR_MSTR; |
332 | t->rx_buf); | 318 | |
333 | mcfqspi_wr_qir(mcfqspi, 0); | 319 | qmr |= t->bits_per_word << 10; |
334 | 320 | if (spi->mode & SPI_CPHA) | |
335 | if (t->delay_usecs) | 321 | qmr |= MCFQSPI_QMR_CPHA; |
336 | udelay(t->delay_usecs); | 322 | if (spi->mode & SPI_CPOL) |
337 | if (t->cs_change) { | 323 | qmr |= MCFQSPI_QMR_CPOL; |
338 | if (!list_is_last(&t->transfer_list, &msg->transfers)) | 324 | if (t->speed_hz) |
339 | mcfqspi_cs_deselect(mcfqspi, spi->chip_select, | 325 | qmr |= mcfqspi_qmr_baud(t->speed_hz); |
340 | cs_high); | 326 | else |
341 | } else { | 327 | qmr |= mcfqspi_qmr_baud(spi->max_speed_hz); |
342 | if (list_is_last(&t->transfer_list, &msg->transfers)) | 328 | mcfqspi_wr_qmr(mcfqspi, qmr); |
343 | mcfqspi_cs_deselect(mcfqspi, spi->chip_select, | ||
344 | cs_high); | ||
345 | } | ||
346 | msg->actual_length += t->len; | ||
347 | } | ||
348 | msg->status = status; | ||
349 | spi_finalize_current_message(master); | ||
350 | 329 | ||
351 | return status; | 330 | mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE); |
331 | if (t->bits_per_word == 8) | ||
332 | mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf, t->rx_buf); | ||
333 | else | ||
334 | mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf, | ||
335 | t->rx_buf); | ||
336 | mcfqspi_wr_qir(mcfqspi, 0); | ||
352 | 337 | ||
338 | return 0; | ||
353 | } | 339 | } |
354 | 340 | ||
355 | static int mcfqspi_setup(struct spi_device *spi) | 341 | static int mcfqspi_setup(struct spi_device *spi) |
@@ -438,7 +424,8 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
438 | master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; | 424 | master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; |
439 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); | 425 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); |
440 | master->setup = mcfqspi_setup; | 426 | master->setup = mcfqspi_setup; |
441 | master->transfer_one_message = mcfqspi_transfer_one_message; | 427 | master->set_cs = mcfqspi_set_cs; |
428 | master->transfer_one = mcfqspi_transfer_one; | ||
442 | master->auto_runtime_pm = true; | 429 | master->auto_runtime_pm = true; |
443 | 430 | ||
444 | platform_set_drvdata(pdev, master); | 431 | platform_set_drvdata(pdev, master); |