aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/spi/spi-cadence.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-11 15:03:34 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-11 15:03:34 -0500
commitb859e7d13bcc18b56faa7e2f78db5ba8ab874a15 (patch)
tree2762ac481bc2b2a472832473b888fff3d7d9b9d4 /drivers/spi/spi-cadence.c
parent709d9f09b6aee5828cb8f168f63030608176cd0e (diff)
parent0e647037fed5632e7c5989ec359ab84c676888ac (diff)
Merge tag 'spi-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "Not a huge amount going on this release, mainly new drivers (there's a couple more waiting that didn't quite make the cut for this release too): - An interface for querying if the current transfer is the last in a message, allowing controllers that need special handling for the final transfer to use the core message parsing. - Support for Amlogic Meson SPIFC, Imagination Technologies SFPI, Intel Quark X1000 and Samsung Exynos 7 controllers" * tag 'spi-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (38 commits) spi/s3c64xx: Remove redundant runtime PM management spi: fsl-spi: remove unused variable assignment spi: spi-fsl-spi: Return an error code in fsl_spi_do_one_msg() spi: core: Do not mangle error code from kthread_run() spi: fsl-espi: add (un)prepare_transfer_hardware calls to save power if SPI is not in use spi: fsl-(e)spi: migrate to generic master queueing spi/txx9: Deletion of an unnecessary check before the function call "clk_disable" spi: cadence: Fix 3-to-8 mux mode spi: cadence: Init HW after reading devicetree attributes spi: meson: Select REGMAP_MMIO spi: s3c64xx: add support for exynos7 SPI controller spi: spi-pxa2xx: SPI support for Intel Quark X1000 spi: meson: meson_spifc_setup_speed() can be static spi: spi-pxa2xx: Add helpers for regiseters' accessing spi: spi-mxs: Fix mapping from vmalloc-ed buffer to scatter list spi: atmel: introduce probe deferring spi: atmel: remove compat for non DT board when requesting dma chan spi: meson: Add support for Amlogic Meson SPIFC spi: meson: Add device tree bindings documentation for SPIFC spi: core: Add spi_transfer_is_last() helper ...
Diffstat (limited to 'drivers/spi/spi-cadence.c')
-rw-r--r--drivers/spi/spi-cadence.c33
1 files changed, 18 insertions, 15 deletions
diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c
index 7b811e38c7ad..5a6749881ff9 100644
--- a/drivers/spi/spi-cadence.c
+++ b/drivers/spi/spi-cadence.c
@@ -47,6 +47,7 @@
47#define CDNS_SPI_CR_CPHA_MASK 0x00000004 /* Clock Phase Control */ 47#define CDNS_SPI_CR_CPHA_MASK 0x00000004 /* Clock Phase Control */
48#define CDNS_SPI_CR_CPOL_MASK 0x00000002 /* Clock Polarity Control */ 48#define CDNS_SPI_CR_CPOL_MASK 0x00000002 /* Clock Polarity Control */
49#define CDNS_SPI_CR_SSCTRL_MASK 0x00003C00 /* Slave Select Mask */ 49#define CDNS_SPI_CR_SSCTRL_MASK 0x00003C00 /* Slave Select Mask */
50#define CDNS_SPI_CR_PERI_SEL_MASK 0x00000200 /* Peripheral Select Decode */
50#define CDNS_SPI_CR_BAUD_DIV_MASK 0x00000038 /* Baud Rate Divisor Mask */ 51#define CDNS_SPI_CR_BAUD_DIV_MASK 0x00000038 /* Baud Rate Divisor Mask */
51#define CDNS_SPI_CR_MSTREN_MASK 0x00000001 /* Master Enable Mask */ 52#define CDNS_SPI_CR_MSTREN_MASK 0x00000001 /* Master Enable Mask */
52#define CDNS_SPI_CR_MANSTRTEN_MASK 0x00008000 /* Manual TX Enable Mask */ 53#define CDNS_SPI_CR_MANSTRTEN_MASK 0x00008000 /* Manual TX Enable Mask */
@@ -148,6 +149,11 @@ static inline void cdns_spi_write(struct cdns_spi *xspi, u32 offset, u32 val)
148 */ 149 */
149static void cdns_spi_init_hw(struct cdns_spi *xspi) 150static void cdns_spi_init_hw(struct cdns_spi *xspi)
150{ 151{
152 u32 ctrl_reg = CDNS_SPI_CR_DEFAULT_MASK;
153
154 if (xspi->is_decoded_cs)
155 ctrl_reg |= CDNS_SPI_CR_PERI_SEL_MASK;
156
151 cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, 157 cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET,
152 CDNS_SPI_ER_DISABLE_MASK); 158 CDNS_SPI_ER_DISABLE_MASK);
153 cdns_spi_write(xspi, CDNS_SPI_IDR_OFFSET, 159 cdns_spi_write(xspi, CDNS_SPI_IDR_OFFSET,
@@ -160,8 +166,7 @@ static void cdns_spi_init_hw(struct cdns_spi *xspi)
160 166
161 cdns_spi_write(xspi, CDNS_SPI_ISR_OFFSET, 167 cdns_spi_write(xspi, CDNS_SPI_ISR_OFFSET,
162 CDNS_SPI_IXR_ALL_MASK); 168 CDNS_SPI_IXR_ALL_MASK);
163 cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, 169 cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, ctrl_reg);
164 CDNS_SPI_CR_DEFAULT_MASK);
165 cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, 170 cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET,
166 CDNS_SPI_ER_ENABLE_MASK); 171 CDNS_SPI_ER_ENABLE_MASK);
167} 172}
@@ -516,6 +521,17 @@ static int cdns_spi_probe(struct platform_device *pdev)
516 goto clk_dis_apb; 521 goto clk_dis_apb;
517 } 522 }
518 523
524 ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
525 if (ret < 0)
526 master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS;
527 else
528 master->num_chipselect = num_cs;
529
530 ret = of_property_read_u32(pdev->dev.of_node, "is-decoded-cs",
531 &xspi->is_decoded_cs);
532 if (ret < 0)
533 xspi->is_decoded_cs = 0;
534
519 /* SPI controller initializations */ 535 /* SPI controller initializations */
520 cdns_spi_init_hw(xspi); 536 cdns_spi_init_hw(xspi);
521 537
@@ -534,19 +550,6 @@ static int cdns_spi_probe(struct platform_device *pdev)
534 goto remove_master; 550 goto remove_master;
535 } 551 }
536 552
537 ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
538
539 if (ret < 0)
540 master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS;
541 else
542 master->num_chipselect = num_cs;
543
544 ret = of_property_read_u32(pdev->dev.of_node, "is-decoded-cs",
545 &xspi->is_decoded_cs);
546
547 if (ret < 0)
548 xspi->is_decoded_cs = 0;
549
550 master->prepare_transfer_hardware = cdns_prepare_transfer_hardware; 553 master->prepare_transfer_hardware = cdns_prepare_transfer_hardware;
551 master->prepare_message = cdns_prepare_message; 554 master->prepare_message = cdns_prepare_message;
552 master->transfer_one = cdns_transfer_one; 555 master->transfer_one = cdns_transfer_one;