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authorBaurzhan Ismagulov <ibr@radix50.net>2010-11-11 04:53:03 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2010-11-11 14:35:59 -0500
commit5b04ec4ad8e2ffdc9d1f27fd6eb5118e919bc87d (patch)
tree5e5b6ce308c019c9d8e0e3ace7afcae16e6acedc /drivers/serial
parent63295cb2ff4329f563579f3d20c5855a96a866d5 (diff)
serial: cpm_uat: reducing CPM serial latency
Setting Rx FIFO size to 1 reduces reader process wakeup latency up to 20x for baud rates <= 9600. This patch sets the Rx FIFO size to 1 for baud rates <= 9600 or if low latency has been requested for the tty. Signed-off-by: Michael Trimarchi <michael@gandalf.sssup.it> Signed-off-by: Bruno Morelli <bruno@evidence.eu.com> Signed-off-by: Baurzhan Ismagulov <ibr@radix50.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_core.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index f2b8adcc6c92..8692ff98fc07 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -72,6 +72,8 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
72 72
73/**************************************************************/ 73/**************************************************************/
74 74
75#define HW_BUF_SPD_THRESHOLD 9600
76
75/* 77/*
76 * Check, if transmit buffers are processed 78 * Check, if transmit buffers are processed
77*/ 79*/
@@ -503,6 +505,11 @@ static void cpm_uart_set_termios(struct uart_port *port,
503 pr_debug("CPM uart[%d]:set_termios\n", port->line); 505 pr_debug("CPM uart[%d]:set_termios\n", port->line);
504 506
505 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); 507 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
508 if (baud <= HW_BUF_SPD_THRESHOLD ||
509 (pinfo->port.state && pinfo->port.state->port.tty->low_latency))
510 pinfo->rx_fifosize = 1;
511 else
512 pinfo->rx_fifosize = RX_BUF_SIZE;
506 513
507 /* Character length programmed into the mode register is the 514 /* Character length programmed into the mode register is the
508 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit, 515 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
@@ -594,6 +601,17 @@ static void cpm_uart_set_termios(struct uart_port *port,
594 */ 601 */
595 bits++; 602 bits++;
596 if (IS_SMC(pinfo)) { 603 if (IS_SMC(pinfo)) {
604 /*
605 * MRBLR can be changed while an SMC/SCC is operating only
606 * if it is done in a single bus cycle with one 16-bit move
607 * (not two 8-bit bus cycles back-to-back). This occurs when
608 * the cp shifts control to the next RxBD, so the change does
609 * not take effect immediately. To guarantee the exact RxBD
610 * on which the change occurs, change MRBLR only while the
611 * SMC/SCC receiver is disabled.
612 */
613 out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
614
597 /* Set the mode register. We want to keep a copy of the 615 /* Set the mode register. We want to keep a copy of the
598 * enables, because we want to put them back if they were 616 * enables, because we want to put them back if they were
599 * present. 617 * present.
@@ -604,6 +622,7 @@ static void cpm_uart_set_termios(struct uart_port *port,
604 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval | 622 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
605 SMCMR_SM_UART | prev_mode); 623 SMCMR_SM_UART | prev_mode);
606 } else { 624 } else {
625 out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
607 out_be16(&sccp->scc_psmr, (sbits << 12) | scval); 626 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
608 } 627 }
609 628