diff options
| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-03 11:52:26 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-03 11:52:26 -0400 |
| commit | ccaa36f73544163ef6e15eb29a620130755f6001 (patch) | |
| tree | b5cf50592c45e25edbd66fea451e6941e455fa83 /drivers/serial/cpm_uart/cpm_uart_cpm2.c | |
| parent | b4a9071af62f95dc6d22040a0b37ac7225ce4d54 (diff) | |
| parent | 5e980823581682d1566e7b5089cf827ddd5f3c94 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (29 commits)
[POWERPC] Fix rheap alignment problem
[POWERPC] Use check_legacy_ioport() for ISAPnP
[POWERPC] Avoid NULL pointer in gpio1_interrupt
[POWERPC] Enable generic rtc hook for the MPC8349 mITX
[POWERPC] Add powerpc get/set_rtc_time interface to new generic rtc class
[POWERPC] Create a "wrapper" script and use it in arch/powerpc/boot
[POWERPC] fix spin lock nesting in hvc_iseries
[POWERPC] EEH failure to mark pci slot as frozen.
[POWERPC] update powerpc defconfig files after libata kconfig breakage
[POWERPC] enable sysrq in pmac32_defconfig
[POWERPC] UPIO_TSI cleanup
[POWERPC] rewrite mkprep and mkbugboot in sane C
[POWERPC] maple/pci iomem annotations
[POWERPC] powerpc oprofile __user annotations
[POWERPC] cell spufs iomem annotations
[POWERPC] NULL noise removal: spufs
[POWERPC] ppc math-emu needs -fno-builtin-fabs for math.c and fabs.c
[POWERPC] update mpc8349_itx_defconfig and remove some debug settings
[POWERPC] Always call cede in pseries dedicated idle loop
[POWERPC] Fix loop logic in irq_alloc_virt()
...
Diffstat (limited to 'drivers/serial/cpm_uart/cpm_uart_cpm2.c')
| -rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm2.c | 143 |
1 files changed, 94 insertions, 49 deletions
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c index ef3bb476c432..b691d3e14754 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | 40 | ||
| 41 | #include <asm/io.h> | 41 | #include <asm/io.h> |
| 42 | #include <asm/irq.h> | 42 | #include <asm/irq.h> |
| 43 | #include <asm/fs_pd.h> | ||
| 43 | 44 | ||
| 44 | #include <linux/serial_core.h> | 45 | #include <linux/serial_core.h> |
| 45 | #include <linux/kernel.h> | 46 | #include <linux/kernel.h> |
| @@ -50,8 +51,9 @@ | |||
| 50 | 51 | ||
| 51 | void cpm_line_cr_cmd(int line, int cmd) | 52 | void cpm_line_cr_cmd(int line, int cmd) |
| 52 | { | 53 | { |
| 53 | volatile cpm_cpm2_t *cp = cpmp; | ||
| 54 | ulong val; | 54 | ulong val; |
| 55 | volatile cpm_cpm2_t *cp = cpm2_map(im_cpm); | ||
| 56 | |||
| 55 | 57 | ||
| 56 | switch (line) { | 58 | switch (line) { |
| 57 | case UART_SMC1: | 59 | case UART_SMC1: |
| @@ -84,11 +86,14 @@ void cpm_line_cr_cmd(int line, int cmd) | |||
| 84 | } | 86 | } |
| 85 | cp->cp_cpcr = val; | 87 | cp->cp_cpcr = val; |
| 86 | while (cp->cp_cpcr & CPM_CR_FLG) ; | 88 | while (cp->cp_cpcr & CPM_CR_FLG) ; |
| 89 | |||
| 90 | cpm2_unmap(cp); | ||
| 87 | } | 91 | } |
| 88 | 92 | ||
| 89 | void smc1_lineif(struct uart_cpm_port *pinfo) | 93 | void smc1_lineif(struct uart_cpm_port *pinfo) |
| 90 | { | 94 | { |
| 91 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 95 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
| 96 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
| 92 | 97 | ||
| 93 | /* SMC1 is only on port D */ | 98 | /* SMC1 is only on port D */ |
| 94 | io->iop_ppard |= 0x00c00000; | 99 | io->iop_ppard |= 0x00c00000; |
| @@ -97,13 +102,17 @@ void smc1_lineif(struct uart_cpm_port *pinfo) | |||
| 97 | io->iop_psord &= ~0x00c00000; | 102 | io->iop_psord &= ~0x00c00000; |
| 98 | 103 | ||
| 99 | /* Wire BRG1 to SMC1 */ | 104 | /* Wire BRG1 to SMC1 */ |
| 100 | cpm2_immr->im_cpmux.cmx_smr &= 0x0f; | 105 | cpmux->cmx_smr &= 0x0f; |
| 101 | pinfo->brg = 1; | 106 | pinfo->brg = 1; |
| 107 | |||
| 108 | cpm2_unmap(cpmux); | ||
| 109 | cpm2_unmap(io); | ||
| 102 | } | 110 | } |
| 103 | 111 | ||
| 104 | void smc2_lineif(struct uart_cpm_port *pinfo) | 112 | void smc2_lineif(struct uart_cpm_port *pinfo) |
| 105 | { | 113 | { |
| 106 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 114 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
| 115 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
| 107 | 116 | ||
| 108 | /* SMC2 is only on port A */ | 117 | /* SMC2 is only on port A */ |
| 109 | io->iop_ppara |= 0x00c00000; | 118 | io->iop_ppara |= 0x00c00000; |
| @@ -112,13 +121,17 @@ void smc2_lineif(struct uart_cpm_port *pinfo) | |||
| 112 | io->iop_psora &= ~0x00c00000; | 121 | io->iop_psora &= ~0x00c00000; |
| 113 | 122 | ||
| 114 | /* Wire BRG2 to SMC2 */ | 123 | /* Wire BRG2 to SMC2 */ |
| 115 | cpm2_immr->im_cpmux.cmx_smr &= 0xf0; | 124 | cpmux->cmx_smr &= 0xf0; |
| 116 | pinfo->brg = 2; | 125 | pinfo->brg = 2; |
| 126 | |||
| 127 | cpm2_unmap(cpmux); | ||
| 128 | cpm2_unmap(io); | ||
| 117 | } | 129 | } |
| 118 | 130 | ||
| 119 | void scc1_lineif(struct uart_cpm_port *pinfo) | 131 | void scc1_lineif(struct uart_cpm_port *pinfo) |
| 120 | { | 132 | { |
| 121 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 133 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
| 134 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
| 122 | 135 | ||
| 123 | /* Use Port D for SCC1 instead of other functions. */ | 136 | /* Use Port D for SCC1 instead of other functions. */ |
| 124 | io->iop_ppard |= 0x00000003; | 137 | io->iop_ppard |= 0x00000003; |
| @@ -128,9 +141,12 @@ void scc1_lineif(struct uart_cpm_port *pinfo) | |||
| 128 | io->iop_pdird |= 0x00000002; /* Tx */ | 141 | io->iop_pdird |= 0x00000002; /* Tx */ |
| 129 | 142 | ||
| 130 | /* Wire BRG1 to SCC1 */ | 143 | /* Wire BRG1 to SCC1 */ |
| 131 | cpm2_immr->im_cpmux.cmx_scr &= 0x00ffffff; | 144 | cpmux->cmx_scr &= 0x00ffffff; |
| 132 | cpm2_immr->im_cpmux.cmx_scr |= 0x00000000; | 145 | cpmux->cmx_scr |= 0x00000000; |
| 133 | pinfo->brg = 1; | 146 | pinfo->brg = 1; |
| 147 | |||
| 148 | cpm2_unmap(cpmux); | ||
| 149 | cpm2_unmap(io); | ||
| 134 | } | 150 | } |
| 135 | 151 | ||
| 136 | void scc2_lineif(struct uart_cpm_port *pinfo) | 152 | void scc2_lineif(struct uart_cpm_port *pinfo) |
| @@ -143,43 +159,57 @@ void scc2_lineif(struct uart_cpm_port *pinfo) | |||
| 143 | * be supported in a sane fashion. | 159 | * be supported in a sane fashion. |
| 144 | */ | 160 | */ |
| 145 | #ifndef CONFIG_STX_GP3 | 161 | #ifndef CONFIG_STX_GP3 |
| 146 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 162 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
| 163 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
| 164 | |||
| 147 | io->iop_pparb |= 0x008b0000; | 165 | io->iop_pparb |= 0x008b0000; |
| 148 | io->iop_pdirb |= 0x00880000; | 166 | io->iop_pdirb |= 0x00880000; |
| 149 | io->iop_psorb |= 0x00880000; | 167 | io->iop_psorb |= 0x00880000; |
| 150 | io->iop_pdirb &= ~0x00030000; | 168 | io->iop_pdirb &= ~0x00030000; |
| 151 | io->iop_psorb &= ~0x00030000; | 169 | io->iop_psorb &= ~0x00030000; |
| 152 | #endif | 170 | #endif |
| 153 | cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff; | 171 | cpmux->cmx_scr &= 0xff00ffff; |
| 154 | cpm2_immr->im_cpmux.cmx_scr |= 0x00090000; | 172 | cpmux->cmx_scr |= 0x00090000; |
| 155 | pinfo->brg = 2; | 173 | pinfo->brg = 2; |
| 174 | |||
| 175 | cpm2_unmap(cpmux); | ||
| 176 | cpm2_unmap(io); | ||
| 156 | } | 177 | } |
| 157 | 178 | ||
| 158 | void scc3_lineif(struct uart_cpm_port *pinfo) | 179 | void scc3_lineif(struct uart_cpm_port *pinfo) |
| 159 | { | 180 | { |
| 160 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 181 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
| 182 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
| 183 | |||
| 161 | io->iop_pparb |= 0x008b0000; | 184 | io->iop_pparb |= 0x008b0000; |
| 162 | io->iop_pdirb |= 0x00880000; | 185 | io->iop_pdirb |= 0x00880000; |
| 163 | io->iop_psorb |= 0x00880000; | 186 | io->iop_psorb |= 0x00880000; |
| 164 | io->iop_pdirb &= ~0x00030000; | 187 | io->iop_pdirb &= ~0x00030000; |
| 165 | io->iop_psorb &= ~0x00030000; | 188 | io->iop_psorb &= ~0x00030000; |
| 166 | cpm2_immr->im_cpmux.cmx_scr &= 0xffff00ff; | 189 | cpmux->cmx_scr &= 0xffff00ff; |
| 167 | cpm2_immr->im_cpmux.cmx_scr |= 0x00001200; | 190 | cpmux->cmx_scr |= 0x00001200; |
| 168 | pinfo->brg = 3; | 191 | pinfo->brg = 3; |
| 192 | |||
| 193 | cpm2_unmap(cpmux); | ||
| 194 | cpm2_unmap(io); | ||
| 169 | } | 195 | } |
| 170 | 196 | ||
| 171 | void scc4_lineif(struct uart_cpm_port *pinfo) | 197 | void scc4_lineif(struct uart_cpm_port *pinfo) |
| 172 | { | 198 | { |
| 173 | volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; | 199 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); |
| 200 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
| 174 | 201 | ||
| 175 | io->iop_ppard |= 0x00000600; | 202 | io->iop_ppard |= 0x00000600; |
| 176 | io->iop_psord &= ~0x00000600; /* Tx/Rx */ | 203 | io->iop_psord &= ~0x00000600; /* Tx/Rx */ |
| 177 | io->iop_pdird &= ~0x00000200; /* Rx */ | 204 | io->iop_pdird &= ~0x00000200; /* Rx */ |
| 178 | io->iop_pdird |= 0x00000400; /* Tx */ | 205 | io->iop_pdird |= 0x00000400; /* Tx */ |
| 179 | 206 | ||
| 180 | cpm2_immr->im_cpmux.cmx_scr &= 0xffffff00; | 207 | cpmux->cmx_scr &= 0xffffff00; |
| 181 | cpm2_immr->im_cpmux.cmx_scr |= 0x0000001b; | 208 | cpmux->cmx_scr |= 0x0000001b; |
| 182 | pinfo->brg = 4; | 209 | pinfo->brg = 4; |
| 210 | |||
| 211 | cpm2_unmap(cpmux); | ||
| 212 | cpm2_unmap(io); | ||
| 183 | } | 213 | } |
| 184 | 214 | ||
| 185 | /* | 215 | /* |
| @@ -254,88 +284,103 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo) | |||
| 254 | /* Setup any dynamic params in the uart desc */ | 284 | /* Setup any dynamic params in the uart desc */ |
| 255 | int cpm_uart_init_portdesc(void) | 285 | int cpm_uart_init_portdesc(void) |
| 256 | { | 286 | { |
| 287 | #if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2) | ||
| 288 | u32 addr; | ||
| 289 | #endif | ||
| 257 | pr_debug("CPM uart[-]:init portdesc\n"); | 290 | pr_debug("CPM uart[-]:init portdesc\n"); |
| 258 | 291 | ||
| 259 | cpm_uart_nr = 0; | 292 | cpm_uart_nr = 0; |
| 260 | #ifdef CONFIG_SERIAL_CPM_SMC1 | 293 | #ifdef CONFIG_SERIAL_CPM_SMC1 |
| 261 | cpm_uart_ports[UART_SMC1].smcp = (smc_t *) & cpm2_immr->im_smc[0]; | 294 | cpm_uart_ports[UART_SMC1].smcp = (smc_t *) cpm2_map(im_smc[0]); |
| 262 | cpm_uart_ports[UART_SMC1].smcup = | ||
| 263 | (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC1]; | ||
| 264 | *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1; | ||
| 265 | cpm_uart_ports[UART_SMC1].port.mapbase = | 295 | cpm_uart_ports[UART_SMC1].port.mapbase = |
| 266 | (unsigned long)&cpm2_immr->im_smc[0]; | 296 | (unsigned long)cpm_uart_ports[UART_SMC1].smcp; |
| 297 | |||
| 298 | cpm_uart_ports[UART_SMC1].smcup = | ||
| 299 | (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC1], PROFF_SMC_SIZE); | ||
| 300 | addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC1_BASE], 2); | ||
| 301 | *addr = PROFF_SMC1; | ||
| 302 | cpm2_unmap(addr); | ||
| 303 | |||
| 267 | cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | 304 | cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); |
| 268 | cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | 305 | cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); |
| 269 | cpm_uart_ports[UART_SMC1].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 306 | cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock(); |
| 270 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; | 307 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; |
| 271 | #endif | 308 | #endif |
| 272 | 309 | ||
| 273 | #ifdef CONFIG_SERIAL_CPM_SMC2 | 310 | #ifdef CONFIG_SERIAL_CPM_SMC2 |
| 274 | cpm_uart_ports[UART_SMC2].smcp = (smc_t *) & cpm2_immr->im_smc[1]; | 311 | cpm_uart_ports[UART_SMC2].smcp = (smc_t *) cpm2_map(im_smc[1]); |
| 275 | cpm_uart_ports[UART_SMC2].smcup = | ||
| 276 | (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC2]; | ||
| 277 | *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2; | ||
| 278 | cpm_uart_ports[UART_SMC2].port.mapbase = | 312 | cpm_uart_ports[UART_SMC2].port.mapbase = |
| 279 | (unsigned long)&cpm2_immr->im_smc[1]; | 313 | (unsigned long)cpm_uart_ports[UART_SMC2].smcp; |
| 314 | |||
| 315 | cpm_uart_ports[UART_SMC2].smcup = | ||
| 316 | (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC2], PROFF_SMC_SIZE); | ||
| 317 | addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC2_BASE], 2); | ||
| 318 | *addr = PROFF_SMC2; | ||
| 319 | cpm2_unmap(addr); | ||
| 320 | |||
| 280 | cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | 321 | cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); |
| 281 | cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | 322 | cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); |
| 282 | cpm_uart_ports[UART_SMC2].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 323 | cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock(); |
| 283 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; | 324 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; |
| 284 | #endif | 325 | #endif |
| 285 | 326 | ||
| 286 | #ifdef CONFIG_SERIAL_CPM_SCC1 | 327 | #ifdef CONFIG_SERIAL_CPM_SCC1 |
| 287 | cpm_uart_ports[UART_SCC1].sccp = (scc_t *) & cpm2_immr->im_scc[0]; | 328 | cpm_uart_ports[UART_SCC1].sccp = (scc_t *) cpm2_map(im_scc[0]); |
| 288 | cpm_uart_ports[UART_SCC1].sccup = | ||
| 289 | (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC1]; | ||
| 290 | cpm_uart_ports[UART_SCC1].port.mapbase = | 329 | cpm_uart_ports[UART_SCC1].port.mapbase = |
| 291 | (unsigned long)&cpm2_immr->im_scc[0]; | 330 | (unsigned long)cpm_uart_ports[UART_SCC1].sccp; |
| 331 | cpm_uart_ports[UART_SCC1].sccup = | ||
| 332 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC1], PROFF_SCC_SIZE); | ||
| 333 | |||
| 292 | cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= | 334 | cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= |
| 293 | ~(UART_SCCM_TX | UART_SCCM_RX); | 335 | ~(UART_SCCM_TX | UART_SCCM_RX); |
| 294 | cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= | 336 | cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= |
| 295 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 337 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
| 296 | cpm_uart_ports[UART_SCC1].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 338 | cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock(); |
| 297 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; | 339 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; |
| 298 | #endif | 340 | #endif |
| 299 | 341 | ||
| 300 | #ifdef CONFIG_SERIAL_CPM_SCC2 | 342 | #ifdef CONFIG_SERIAL_CPM_SCC2 |
| 301 | cpm_uart_ports[UART_SCC2].sccp = (scc_t *) & cpm2_immr->im_scc[1]; | 343 | cpm_uart_ports[UART_SCC2].sccp = (scc_t *) cpm2_map(im_scc[1]); |
| 302 | cpm_uart_ports[UART_SCC2].sccup = | ||
| 303 | (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC2]; | ||
| 304 | cpm_uart_ports[UART_SCC2].port.mapbase = | 344 | cpm_uart_ports[UART_SCC2].port.mapbase = |
| 305 | (unsigned long)&cpm2_immr->im_scc[1]; | 345 | (unsigned long)cpm_uart_ports[UART_SCC2].sccp; |
| 346 | cpm_uart_ports[UART_SCC2].sccup = | ||
| 347 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC2], PROFF_SCC_SIZE); | ||
| 348 | |||
| 306 | cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= | 349 | cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= |
| 307 | ~(UART_SCCM_TX | UART_SCCM_RX); | 350 | ~(UART_SCCM_TX | UART_SCCM_RX); |
| 308 | cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= | 351 | cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= |
| 309 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 352 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
| 310 | cpm_uart_ports[UART_SCC2].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 353 | cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock(); |
| 311 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; | 354 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; |
| 312 | #endif | 355 | #endif |
| 313 | 356 | ||
| 314 | #ifdef CONFIG_SERIAL_CPM_SCC3 | 357 | #ifdef CONFIG_SERIAL_CPM_SCC3 |
| 315 | cpm_uart_ports[UART_SCC3].sccp = (scc_t *) & cpm2_immr->im_scc[2]; | 358 | cpm_uart_ports[UART_SCC3].sccp = (scc_t *) cpm2_map(im_scc[2]); |
| 316 | cpm_uart_ports[UART_SCC3].sccup = | ||
| 317 | (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC3]; | ||
| 318 | cpm_uart_ports[UART_SCC3].port.mapbase = | 359 | cpm_uart_ports[UART_SCC3].port.mapbase = |
| 319 | (unsigned long)&cpm2_immr->im_scc[2]; | 360 | (unsigned long)cpm_uart_ports[UART_SCC3].sccp; |
| 361 | cpm_uart_ports[UART_SCC3].sccup = | ||
| 362 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC3], PROFF_SCC_SIZE); | ||
| 363 | |||
| 320 | cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= | 364 | cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= |
| 321 | ~(UART_SCCM_TX | UART_SCCM_RX); | 365 | ~(UART_SCCM_TX | UART_SCCM_RX); |
| 322 | cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= | 366 | cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= |
| 323 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 367 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
| 324 | cpm_uart_ports[UART_SCC3].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 368 | cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock(); |
| 325 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; | 369 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; |
| 326 | #endif | 370 | #endif |
| 327 | 371 | ||
| 328 | #ifdef CONFIG_SERIAL_CPM_SCC4 | 372 | #ifdef CONFIG_SERIAL_CPM_SCC4 |
| 329 | cpm_uart_ports[UART_SCC4].sccp = (scc_t *) & cpm2_immr->im_scc[3]; | 373 | cpm_uart_ports[UART_SCC4].sccp = (scc_t *) cpm2_map(im_scc[3]); |
| 330 | cpm_uart_ports[UART_SCC4].sccup = | ||
| 331 | (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC4]; | ||
| 332 | cpm_uart_ports[UART_SCC4].port.mapbase = | 374 | cpm_uart_ports[UART_SCC4].port.mapbase = |
| 333 | (unsigned long)&cpm2_immr->im_scc[3]; | 375 | (unsigned long)cpm_uart_ports[UART_SCC4].sccp; |
| 376 | cpm_uart_ports[UART_SCC4].sccup = | ||
| 377 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC4], PROFF_SCC_SIZE); | ||
| 378 | |||
| 334 | cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= | 379 | cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= |
| 335 | ~(UART_SCCM_TX | UART_SCCM_RX); | 380 | ~(UART_SCCM_TX | UART_SCCM_RX); |
| 336 | cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= | 381 | cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= |
| 337 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 382 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
| 338 | cpm_uart_ports[UART_SCC4].port.uartclk = (((bd_t *) __res)->bi_intfreq); | 383 | cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock(); |
| 339 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; | 384 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; |
| 340 | #endif | 385 | #endif |
| 341 | 386 | ||
