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| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-01-30 11:29:05 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-01-30 11:29:05 -0500 |
| commit | c9cc8e771cb62e495765793e4b7d06016ae1b525 (patch) | |
| tree | 42c3ae364cd8b22e3263403f0baa2b5e8070b5da /drivers/serial/atmel_serial.h | |
| parent | 59df3230fc57fa8900bebf3d2d68221d549f3c7c (diff) | |
| parent | b9d1902cd281d9b829fb3d6ee9148d28c8c63382 (diff) | |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4117/1: S3C2412: Fix writel() usage in selection code
[ARM] 4111/1: Allow VFP to work with thread migration on SMP
[ARM] 4112/1: Only ioremap to supersections if DOMAIN_IO is zero
[ARM] 4106/1: S3C2410: typo fixes in register definitions
[ARM] 4102/1: Allow for PHYS_OFFSET on any valid 2MiB address
[ARM] Fix AMBA serial drivers for non-first serial ports
[ARM] 4100/1: iop3xx: fix cpu mask for iop333
[ARM] Update mach-types
[ARM] Fix show_mem() for discontigmem
[ARM] 4096/1: S3C24XX: change return code form s3c2410_gpio_getcfg()
[ARM] 4095/1: S3C24XX: Fix GPIO set for Bank A
[ARM] 4092/1: i.MX/MX1 CPU Frequency scaling latency definition
[ARM] 4089/1: AT91: GPIO wake IRQ cleanup
[ARM] 4088/1: AT91: Unbalanced IRQ in serial driver suspend/resume
[ARM] 4087/1: AT91: CPU reset for SAM9x processors
[ARM] 4086/1: AT91: Whitespace cleanup
[ARM] 4085/1: AT91: Header fixes.
[ARM] 4084/1: Remove CONFIG_DEBUG_WAITQ
Diffstat (limited to 'drivers/serial/atmel_serial.h')
| -rw-r--r-- | drivers/serial/atmel_serial.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/serial/atmel_serial.h b/drivers/serial/atmel_serial.h index fe1763b2a6d5..11b44360e108 100644 --- a/drivers/serial/atmel_serial.h +++ b/drivers/serial/atmel_serial.h | |||
| @@ -106,7 +106,7 @@ | |||
| 106 | #define ATMEL_US_CSR 0x14 /* Channel Status Register */ | 106 | #define ATMEL_US_CSR 0x14 /* Channel Status Register */ |
| 107 | #define ATMEL_US_RHR 0x18 /* Receiver Holding Register */ | 107 | #define ATMEL_US_RHR 0x18 /* Receiver Holding Register */ |
| 108 | #define ATMEL_US_THR 0x1c /* Transmitter Holding Register */ | 108 | #define ATMEL_US_THR 0x1c /* Transmitter Holding Register */ |
| 109 | #define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [SAM9 only] */ | 109 | #define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */ |
| 110 | 110 | ||
| 111 | #define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */ | 111 | #define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */ |
| 112 | #define ATMEL_US_CD (0xffff << 0) /* Clock Divider */ | 112 | #define ATMEL_US_CD (0xffff << 0) /* Clock Divider */ |