diff options
author | Jiri Kosina <jkosina@suse.cz> | 2014-02-20 08:54:28 -0500 |
---|---|---|
committer | Jiri Kosina <jkosina@suse.cz> | 2014-02-20 08:54:28 -0500 |
commit | d4263348f796f29546f90802177865dd4379dd0a (patch) | |
tree | adcbdaebae584eee2f32fab95e826e8e49eef385 /drivers/scsi | |
parent | be873ac782f5ff5ee6675f83929f4fe6737eead2 (diff) | |
parent | 6d0abeca3242a88cab8232e4acd7e2bf088f3bc2 (diff) |
Merge branch 'master' into for-next
Diffstat (limited to 'drivers/scsi')
91 files changed, 4733 insertions, 17418 deletions
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig index a2d61d061be7..c8bd092fc945 100644 --- a/drivers/scsi/Kconfig +++ b/drivers/scsi/Kconfig | |||
@@ -499,47 +499,6 @@ config SCSI_AACRAID | |||
499 | 499 | ||
500 | 500 | ||
501 | source "drivers/scsi/aic7xxx/Kconfig.aic7xxx" | 501 | source "drivers/scsi/aic7xxx/Kconfig.aic7xxx" |
502 | |||
503 | config SCSI_AIC7XXX_OLD | ||
504 | tristate "Adaptec AIC7xxx support (old driver)" | ||
505 | depends on (ISA || EISA || PCI ) && SCSI | ||
506 | help | ||
507 | WARNING This driver is an older aic7xxx driver and is no longer | ||
508 | under active development. Adaptec, Inc. is writing a new driver to | ||
509 | take the place of this one, and it is recommended that whenever | ||
510 | possible, people should use the new Adaptec written driver instead | ||
511 | of this one. This driver will eventually be phased out entirely. | ||
512 | |||
513 | This is support for the various aic7xxx based Adaptec SCSI | ||
514 | controllers. These include the 274x EISA cards; 284x VLB cards; | ||
515 | 2902, 2910, 293x, 294x, 394x, 3985 and several other PCI and | ||
516 | motherboard based SCSI controllers from Adaptec. It does not support | ||
517 | the AAA-13x RAID controllers from Adaptec, nor will it likely ever | ||
518 | support them. It does not support the 2920 cards from Adaptec that | ||
519 | use the Future Domain SCSI controller chip. For those cards, you | ||
520 | need the "Future Domain 16xx SCSI support" driver. | ||
521 | |||
522 | In general, if the controller is based on an Adaptec SCSI controller | ||
523 | chip from the aic777x series or the aic78xx series, this driver | ||
524 | should work. The only exception is the 7810 which is specifically | ||
525 | not supported (that's the RAID controller chip on the AAA-13x | ||
526 | cards). | ||
527 | |||
528 | Note that the AHA2920 SCSI host adapter is *not* supported by this | ||
529 | driver; choose "Future Domain 16xx SCSI support" instead if you have | ||
530 | one of those. | ||
531 | |||
532 | Information on the configuration options for this controller can be | ||
533 | found by checking the help file for each of the available | ||
534 | configuration options. You should read | ||
535 | <file:Documentation/scsi/aic7xxx_old.txt> at a minimum before | ||
536 | contacting the maintainer with any questions. The SCSI-HOWTO, | ||
537 | available from <http://www.tldp.org/docs.html#howto>, can also | ||
538 | be of great help. | ||
539 | |||
540 | To compile this driver as a module, choose M here: the | ||
541 | module will be called aic7xxx_old. | ||
542 | |||
543 | source "drivers/scsi/aic7xxx/Kconfig.aic79xx" | 502 | source "drivers/scsi/aic7xxx/Kconfig.aic79xx" |
544 | source "drivers/scsi/aic94xx/Kconfig" | 503 | source "drivers/scsi/aic94xx/Kconfig" |
545 | source "drivers/scsi/mvsas/Kconfig" | 504 | source "drivers/scsi/mvsas/Kconfig" |
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile index 149bb6bf1849..e172d4f8e02f 100644 --- a/drivers/scsi/Makefile +++ b/drivers/scsi/Makefile | |||
@@ -70,7 +70,6 @@ obj-$(CONFIG_SCSI_AHA1740) += aha1740.o | |||
70 | obj-$(CONFIG_SCSI_AIC7XXX) += aic7xxx/ | 70 | obj-$(CONFIG_SCSI_AIC7XXX) += aic7xxx/ |
71 | obj-$(CONFIG_SCSI_AIC79XX) += aic7xxx/ | 71 | obj-$(CONFIG_SCSI_AIC79XX) += aic7xxx/ |
72 | obj-$(CONFIG_SCSI_AACRAID) += aacraid/ | 72 | obj-$(CONFIG_SCSI_AACRAID) += aacraid/ |
73 | obj-$(CONFIG_SCSI_AIC7XXX_OLD) += aic7xxx_old.o | ||
74 | obj-$(CONFIG_SCSI_AIC94XX) += aic94xx/ | 73 | obj-$(CONFIG_SCSI_AIC94XX) += aic94xx/ |
75 | obj-$(CONFIG_SCSI_PM8001) += pm8001/ | 74 | obj-$(CONFIG_SCSI_PM8001) += pm8001/ |
76 | obj-$(CONFIG_SCSI_ISCI) += isci/ | 75 | obj-$(CONFIG_SCSI_ISCI) += isci/ |
diff --git a/drivers/scsi/a2091.c b/drivers/scsi/a2091.c index 30fa38a0ad39..9176bfbd5745 100644 --- a/drivers/scsi/a2091.c +++ b/drivers/scsi/a2091.c | |||
@@ -201,7 +201,7 @@ static int a2091_probe(struct zorro_dev *z, const struct zorro_device_id *ent) | |||
201 | instance->irq = IRQ_AMIGA_PORTS; | 201 | instance->irq = IRQ_AMIGA_PORTS; |
202 | instance->unique_id = z->slotaddr; | 202 | instance->unique_id = z->slotaddr; |
203 | 203 | ||
204 | regs = (struct a2091_scsiregs *)ZTWO_VADDR(z->resource.start); | 204 | regs = ZTWO_VADDR(z->resource.start); |
205 | regs->DAWR = DAWR_A2091; | 205 | regs->DAWR = DAWR_A2091; |
206 | 206 | ||
207 | wdregs.SASR = ®s->SASR; | 207 | wdregs.SASR = ®s->SASR; |
diff --git a/drivers/scsi/a3000.c b/drivers/scsi/a3000.c index c0f4f4290dd6..dd5b64726ddc 100644 --- a/drivers/scsi/a3000.c +++ b/drivers/scsi/a3000.c | |||
@@ -220,7 +220,7 @@ static int __init amiga_a3000_scsi_probe(struct platform_device *pdev) | |||
220 | 220 | ||
221 | instance->irq = IRQ_AMIGA_PORTS; | 221 | instance->irq = IRQ_AMIGA_PORTS; |
222 | 222 | ||
223 | regs = (struct a3000_scsiregs *)ZTWO_VADDR(res->start); | 223 | regs = ZTWO_VADDR(res->start); |
224 | regs->DAWR = DAWR_A3000; | 224 | regs->DAWR = DAWR_A3000; |
225 | 225 | ||
226 | wdregs.SASR = ®s->SASR; | 226 | wdregs.SASR = ®s->SASR; |
diff --git a/drivers/scsi/a4000t.c b/drivers/scsi/a4000t.c index 70c521f79f7c..f5a2ab41543b 100644 --- a/drivers/scsi/a4000t.c +++ b/drivers/scsi/a4000t.c | |||
@@ -56,7 +56,7 @@ static int __init amiga_a4000t_scsi_probe(struct platform_device *pdev) | |||
56 | scsi_addr = res->start + A4000T_SCSI_OFFSET; | 56 | scsi_addr = res->start + A4000T_SCSI_OFFSET; |
57 | 57 | ||
58 | /* Fill in the required pieces of hostdata */ | 58 | /* Fill in the required pieces of hostdata */ |
59 | hostdata->base = (void __iomem *)ZTWO_VADDR(scsi_addr); | 59 | hostdata->base = ZTWO_VADDR(scsi_addr); |
60 | hostdata->clock = 50; | 60 | hostdata->clock = 50; |
61 | hostdata->chip710 = 1; | 61 | hostdata->chip710 = 1; |
62 | hostdata->dmode_extra = DMODE_FC2; | 62 | hostdata->dmode_extra = DMODE_FC2; |
diff --git a/drivers/scsi/aic7xxx_old.c b/drivers/scsi/aic7xxx_old.c deleted file mode 100644 index 33ec9c643400..000000000000 --- a/drivers/scsi/aic7xxx_old.c +++ /dev/null | |||
@@ -1,11149 +0,0 @@ | |||
1 | /*+M************************************************************************* | ||
2 | * Adaptec AIC7xxx device driver for Linux. | ||
3 | * | ||
4 | * Copyright (c) 1994 John Aycock | ||
5 | * The University of Calgary Department of Computer Science. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2, or (at your option) | ||
10 | * any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; see the file COPYING. If not, write to | ||
19 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | ||
20 | * | ||
21 | * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F | ||
22 | * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA | ||
23 | * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide, | ||
24 | * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux, | ||
25 | * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file | ||
26 | * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual, | ||
27 | * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the | ||
28 | * ANSI SCSI-2 specification (draft 10c), ... | ||
29 | * | ||
30 | * -------------------------------------------------------------------------- | ||
31 | * | ||
32 | * Modifications by Daniel M. Eischen (deischen@iworks.InterWorks.org): | ||
33 | * | ||
34 | * Substantially modified to include support for wide and twin bus | ||
35 | * adapters, DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes, | ||
36 | * SCB paging, and other rework of the code. | ||
37 | * | ||
38 | * Parts of this driver were also based on the FreeBSD driver by | ||
39 | * Justin T. Gibbs. His copyright follows: | ||
40 | * | ||
41 | * -------------------------------------------------------------------------- | ||
42 | * Copyright (c) 1994-1997 Justin Gibbs. | ||
43 | * All rights reserved. | ||
44 | * | ||
45 | * Redistribution and use in source and binary forms, with or without | ||
46 | * modification, are permitted provided that the following conditions | ||
47 | * are met: | ||
48 | * 1. Redistributions of source code must retain the above copyright | ||
49 | * notice, this list of conditions, and the following disclaimer, | ||
50 | * without modification, immediately at the beginning of the file. | ||
51 | * 2. Redistributions in binary form must reproduce the above copyright | ||
52 | * notice, this list of conditions and the following disclaimer in the | ||
53 | * documentation and/or other materials provided with the distribution. | ||
54 | * 3. The name of the author may not be used to endorse or promote products | ||
55 | * derived from this software without specific prior written permission. | ||
56 | * | ||
57 | * Where this Software is combined with software released under the terms of | ||
58 | * the GNU General Public License ("GPL") and the terms of the GPL would require the | ||
59 | * combined work to also be released under the terms of the GPL, the terms | ||
60 | * and conditions of this License will apply in addition to those of the | ||
61 | * GPL with the exception of any terms or conditions of this License that | ||
62 | * conflict with, or are expressly prohibited by, the GPL. | ||
63 | * | ||
64 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | ||
65 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
66 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
67 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR | ||
68 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||
69 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | ||
70 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
71 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
72 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||
73 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | ||
74 | * SUCH DAMAGE. | ||
75 | * | ||
76 | * $Id: aic7xxx.c,v 1.119 1997/06/27 19:39:18 gibbs Exp $ | ||
77 | *--------------------------------------------------------------------------- | ||
78 | * | ||
79 | * Thanks also go to (in alphabetical order) the following: | ||
80 | * | ||
81 | * Rory Bolt - Sequencer bug fixes | ||
82 | * Jay Estabrook - Initial DEC Alpha support | ||
83 | * Doug Ledford - Much needed abort/reset bug fixes | ||
84 | * Kai Makisara - DMAing of SCBs | ||
85 | * | ||
86 | * A Boot time option was also added for not resetting the scsi bus. | ||
87 | * | ||
88 | * Form: aic7xxx=extended | ||
89 | * aic7xxx=no_reset | ||
90 | * aic7xxx=ultra | ||
91 | * aic7xxx=irq_trigger:[0,1] # 0 edge, 1 level | ||
92 | * aic7xxx=verbose | ||
93 | * | ||
94 | * Daniel M. Eischen, deischen@iworks.InterWorks.org, 1/23/97 | ||
95 | * | ||
96 | * $Id: aic7xxx.c,v 4.1 1997/06/12 08:23:42 deang Exp $ | ||
97 | *-M*************************************************************************/ | ||
98 | |||
99 | /*+M************************************************************************** | ||
100 | * | ||
101 | * Further driver modifications made by Doug Ledford <dledford@redhat.com> | ||
102 | * | ||
103 | * Copyright (c) 1997-1999 Doug Ledford | ||
104 | * | ||
105 | * These changes are released under the same licensing terms as the FreeBSD | ||
106 | * driver written by Justin Gibbs. Please see his Copyright notice above | ||
107 | * for the exact terms and conditions covering my changes as well as the | ||
108 | * warranty statement. | ||
109 | * | ||
110 | * Modifications made to the aic7xxx.c,v 4.1 driver from Dan Eischen include | ||
111 | * but are not limited to: | ||
112 | * | ||
113 | * 1: Import of the latest FreeBSD sequencer code for this driver | ||
114 | * 2: Modification of kernel code to accommodate different sequencer semantics | ||
115 | * 3: Extensive changes throughout kernel portion of driver to improve | ||
116 | * abort/reset processing and error hanndling | ||
117 | * 4: Other work contributed by various people on the Internet | ||
118 | * 5: Changes to printk information and verbosity selection code | ||
119 | * 6: General reliability related changes, especially in IRQ management | ||
120 | * 7: Modifications to the default probe/attach order for supported cards | ||
121 | * 8: SMP friendliness has been improved | ||
122 | * | ||
123 | * Overall, this driver represents a significant departure from the official | ||
124 | * aic7xxx driver released by Dan Eischen in two ways. First, in the code | ||
125 | * itself. A diff between the two version of the driver is now a several | ||
126 | * thousand line diff. Second, in approach to solving the same problem. The | ||
127 | * problem is importing the FreeBSD aic7xxx driver code to linux can be a | ||
128 | * difficult and time consuming process, that also can be error prone. Dan | ||
129 | * Eischen's official driver uses the approach that the linux and FreeBSD | ||
130 | * drivers should be as identical as possible. To that end, his next version | ||
131 | * of this driver will be using a mid-layer code library that he is developing | ||
132 | * to moderate communications between the linux mid-level SCSI code and the | ||
133 | * low level FreeBSD driver. He intends to be able to essentially drop the | ||
134 | * FreeBSD driver into the linux kernel with only a few minor tweaks to some | ||
135 | * include files and the like and get things working, making for fast easy | ||
136 | * imports of the FreeBSD code into linux. | ||
137 | * | ||
138 | * I disagree with Dan's approach. Not that I don't think his way of doing | ||
139 | * things would be nice, easy to maintain, and create a more uniform driver | ||
140 | * between FreeBSD and Linux. I have no objection to those issues. My | ||
141 | * disagreement is on the needed functionality. There simply are certain | ||
142 | * things that are done differently in FreeBSD than linux that will cause | ||
143 | * problems for this driver regardless of any middle ware Dan implements. | ||
144 | * The biggest example of this at the moment is interrupt semantics. Linux | ||
145 | * doesn't provide the same protection techniques as FreeBSD does, nor can | ||
146 | * they be easily implemented in any middle ware code since they would truly | ||
147 | * belong in the kernel proper and would effect all drivers. For the time | ||
148 | * being, I see issues such as these as major stumbling blocks to the | ||
149 | * reliability of code based upon such middle ware. Therefore, I choose to | ||
150 | * use a different approach to importing the FreeBSD code that doesn't | ||
151 | * involve any middle ware type code. My approach is to import the sequencer | ||
152 | * code from FreeBSD wholesale. Then, to only make changes in the kernel | ||
153 | * portion of the driver as they are needed for the new sequencer semantics. | ||
154 | * In this way, the portion of the driver that speaks to the rest of the | ||
155 | * linux kernel is fairly static and can be changed/modified to solve | ||
156 | * any problems one might encounter without concern for the FreeBSD driver. | ||
157 | * | ||
158 | * Note: If time and experience should prove me wrong that the middle ware | ||
159 | * code Dan writes is reliable in its operation, then I'll retract my above | ||
160 | * statements. But, for those that don't know, I'm from Missouri (in the US) | ||
161 | * and our state motto is "The Show-Me State". Well, before I will put | ||
162 | * faith into it, you'll have to show me that it works :) | ||
163 | * | ||
164 | *_M*************************************************************************/ | ||
165 | |||
166 | /* | ||
167 | * The next three defines are user configurable. These should be the only | ||
168 | * defines a user might need to get in here and change. There are other | ||
169 | * defines buried deeper in the code, but those really shouldn't need touched | ||
170 | * under normal conditions. | ||
171 | */ | ||
172 | |||
173 | /* | ||
174 | * AIC7XXX_STRICT_PCI_SETUP | ||
175 | * Should we assume the PCI config options on our controllers are set with | ||
176 | * sane and proper values, or should we be anal about our PCI config | ||
177 | * registers and force them to what we want? The main advantage to | ||
178 | * defining this option is on non-Intel hardware where the BIOS may not | ||
179 | * have been run to set things up, or if you have one of the BIOSless | ||
180 | * Adaptec controllers, such as a 2910, that don't get set up by the | ||
181 | * BIOS. However, keep in mind that we really do set the most important | ||
182 | * items in the driver regardless of this setting, this only controls some | ||
183 | * of the more esoteric PCI options on these cards. In that sense, I | ||
184 | * would default to leaving this off. However, if people wish to try | ||
185 | * things both ways, that would also help me to know if there are some | ||
186 | * machines where it works one way but not another. | ||
187 | * | ||
188 | * -- July 7, 17:09 | ||
189 | * OK...I need this on my machine for testing, so the default is to | ||
190 | * leave it defined. | ||
191 | * | ||
192 | * -- July 7, 18:49 | ||
193 | * I needed it for testing, but it didn't make any difference, so back | ||
194 | * off she goes. | ||
195 | * | ||
196 | * -- July 16, 23:04 | ||
197 | * I turned it back on to try and compensate for the 2.1.x PCI code | ||
198 | * which no longer relies solely on the BIOS and now tries to set | ||
199 | * things itself. | ||
200 | */ | ||
201 | |||
202 | #define AIC7XXX_STRICT_PCI_SETUP | ||
203 | |||
204 | /* | ||
205 | * AIC7XXX_VERBOSE_DEBUGGING | ||
206 | * This option enables a lot of extra printk();s in the code, surrounded | ||
207 | * by if (aic7xxx_verbose ...) statements. Executing all of those if | ||
208 | * statements and the extra checks can get to where it actually does have | ||
209 | * an impact on CPU usage and such, as well as code size. Disabling this | ||
210 | * define will keep some of those from becoming part of the code. | ||
211 | * | ||
212 | * NOTE: Currently, this option has no real effect, I will be adding the | ||
213 | * various #ifdef's in the code later when I've decided a section is | ||
214 | * complete and no longer needs debugging. OK...a lot of things are now | ||
215 | * surrounded by this define, so turning this off does have an impact. | ||
216 | */ | ||
217 | |||
218 | /* | ||
219 | * #define AIC7XXX_VERBOSE_DEBUGGING | ||
220 | */ | ||
221 | |||
222 | #include <linux/module.h> | ||
223 | #include <stdarg.h> | ||
224 | #include <asm/io.h> | ||
225 | #include <asm/irq.h> | ||
226 | #include <asm/byteorder.h> | ||
227 | #include <linux/string.h> | ||
228 | #include <linux/errno.h> | ||
229 | #include <linux/kernel.h> | ||
230 | #include <linux/ioport.h> | ||
231 | #include <linux/delay.h> | ||
232 | #include <linux/pci.h> | ||
233 | #include <linux/proc_fs.h> | ||
234 | #include <linux/blkdev.h> | ||
235 | #include <linux/init.h> | ||
236 | #include <linux/spinlock.h> | ||
237 | #include <linux/smp.h> | ||
238 | #include <linux/interrupt.h> | ||
239 | #include "scsi.h" | ||
240 | #include <scsi/scsi_host.h> | ||
241 | #include "aic7xxx_old/aic7xxx.h" | ||
242 | |||
243 | #include "aic7xxx_old/sequencer.h" | ||
244 | #include "aic7xxx_old/scsi_message.h" | ||
245 | #include "aic7xxx_old/aic7xxx_reg.h" | ||
246 | #include <scsi/scsicam.h> | ||
247 | |||
248 | #include <linux/stat.h> | ||
249 | #include <linux/slab.h> /* for kmalloc() */ | ||
250 | |||
251 | #define AIC7XXX_C_VERSION "5.2.6" | ||
252 | |||
253 | #define ALL_TARGETS -1 | ||
254 | #define ALL_CHANNELS -1 | ||
255 | #define ALL_LUNS -1 | ||
256 | #define MAX_TARGETS 16 | ||
257 | #define MAX_LUNS 8 | ||
258 | #ifndef TRUE | ||
259 | # define TRUE 1 | ||
260 | #endif | ||
261 | #ifndef FALSE | ||
262 | # define FALSE 0 | ||
263 | #endif | ||
264 | |||
265 | #if defined(__powerpc__) || defined(__i386__) || defined(__x86_64__) | ||
266 | # define MMAPIO | ||
267 | #endif | ||
268 | |||
269 | /* | ||
270 | * You can try raising me for better performance or lowering me if you have | ||
271 | * flaky devices that go off the scsi bus when hit with too many tagged | ||
272 | * commands (like some IBM SCSI-3 LVD drives). | ||
273 | */ | ||
274 | #define AIC7XXX_CMDS_PER_DEVICE 32 | ||
275 | |||
276 | typedef struct | ||
277 | { | ||
278 | unsigned char tag_commands[16]; /* Allow for wide/twin adapters. */ | ||
279 | } adapter_tag_info_t; | ||
280 | |||
281 | /* | ||
282 | * Make a define that will tell the driver not to the default tag depth | ||
283 | * everywhere. | ||
284 | */ | ||
285 | #define DEFAULT_TAG_COMMANDS {0, 0, 0, 0, 0, 0, 0, 0,\ | ||
286 | 0, 0, 0, 0, 0, 0, 0, 0} | ||
287 | |||
288 | /* | ||
289 | * Modify this as you see fit for your system. By setting tag_commands | ||
290 | * to 0, the driver will use it's own algorithm for determining the | ||
291 | * number of commands to use (see above). When 255, the driver will | ||
292 | * not enable tagged queueing for that particular device. When positive | ||
293 | * (> 0) and (< 255) the values in the array are used for the queue_depth. | ||
294 | * Note that the maximum value for an entry is 254, but you're insane if | ||
295 | * you try to use that many commands on one device. | ||
296 | * | ||
297 | * In this example, the first line will disable tagged queueing for all | ||
298 | * the devices on the first probed aic7xxx adapter. | ||
299 | * | ||
300 | * The second line enables tagged queueing with 4 commands/LUN for IDs | ||
301 | * (1, 2-11, 13-15), disables tagged queueing for ID 12, and tells the | ||
302 | * driver to use its own algorithm for ID 1. | ||
303 | * | ||
304 | * The third line is the same as the first line. | ||
305 | * | ||
306 | * The fourth line disables tagged queueing for devices 0 and 3. It | ||
307 | * enables tagged queueing for the other IDs, with 16 commands/LUN | ||
308 | * for IDs 1 and 4, 127 commands/LUN for ID 8, and 4 commands/LUN for | ||
309 | * IDs 2, 5-7, and 9-15. | ||
310 | */ | ||
311 | |||
312 | /* | ||
313 | * NOTE: The below structure is for reference only, the actual structure | ||
314 | * to modify in order to change things is found after this fake one. | ||
315 | * | ||
316 | adapter_tag_info_t aic7xxx_tag_info[] = | ||
317 | { | ||
318 | {DEFAULT_TAG_COMMANDS}, | ||
319 | {{4, 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 255, 4, 4, 4}}, | ||
320 | {DEFAULT_TAG_COMMANDS}, | ||
321 | {{255, 16, 4, 255, 16, 4, 4, 4, 127, 4, 4, 4, 4, 4, 4, 4}} | ||
322 | }; | ||
323 | */ | ||
324 | |||
325 | static adapter_tag_info_t aic7xxx_tag_info[] = | ||
326 | { | ||
327 | {DEFAULT_TAG_COMMANDS}, | ||
328 | {DEFAULT_TAG_COMMANDS}, | ||
329 | {DEFAULT_TAG_COMMANDS}, | ||
330 | {DEFAULT_TAG_COMMANDS}, | ||
331 | {DEFAULT_TAG_COMMANDS}, | ||
332 | {DEFAULT_TAG_COMMANDS}, | ||
333 | {DEFAULT_TAG_COMMANDS}, | ||
334 | {DEFAULT_TAG_COMMANDS}, | ||
335 | {DEFAULT_TAG_COMMANDS}, | ||
336 | {DEFAULT_TAG_COMMANDS}, | ||
337 | {DEFAULT_TAG_COMMANDS}, | ||
338 | {DEFAULT_TAG_COMMANDS}, | ||
339 | {DEFAULT_TAG_COMMANDS}, | ||
340 | {DEFAULT_TAG_COMMANDS}, | ||
341 | {DEFAULT_TAG_COMMANDS}, | ||
342 | {DEFAULT_TAG_COMMANDS} | ||
343 | }; | ||
344 | |||
345 | |||
346 | /* | ||
347 | * Define an array of board names that can be indexed by aha_type. | ||
348 | * Don't forget to change this when changing the types! | ||
349 | */ | ||
350 | static const char *board_names[] = { | ||
351 | "AIC-7xxx Unknown", /* AIC_NONE */ | ||
352 | "Adaptec AIC-7810 Hardware RAID Controller", /* AIC_7810 */ | ||
353 | "Adaptec AIC-7770 SCSI host adapter", /* AIC_7770 */ | ||
354 | "Adaptec AHA-274X SCSI host adapter", /* AIC_7771 */ | ||
355 | "Adaptec AHA-284X SCSI host adapter", /* AIC_284x */ | ||
356 | "Adaptec AIC-7850 SCSI host adapter", /* AIC_7850 */ | ||
357 | "Adaptec AIC-7855 SCSI host adapter", /* AIC_7855 */ | ||
358 | "Adaptec AIC-7860 Ultra SCSI host adapter", /* AIC_7860 */ | ||
359 | "Adaptec AHA-2940A Ultra SCSI host adapter", /* AIC_7861 */ | ||
360 | "Adaptec AIC-7870 SCSI host adapter", /* AIC_7870 */ | ||
361 | "Adaptec AHA-294X SCSI host adapter", /* AIC_7871 */ | ||
362 | "Adaptec AHA-394X SCSI host adapter", /* AIC_7872 */ | ||
363 | "Adaptec AHA-398X SCSI host adapter", /* AIC_7873 */ | ||
364 | "Adaptec AHA-2944 SCSI host adapter", /* AIC_7874 */ | ||
365 | "Adaptec AIC-7880 Ultra SCSI host adapter", /* AIC_7880 */ | ||
366 | "Adaptec AHA-294X Ultra SCSI host adapter", /* AIC_7881 */ | ||
367 | "Adaptec AHA-394X Ultra SCSI host adapter", /* AIC_7882 */ | ||
368 | "Adaptec AHA-398X Ultra SCSI host adapter", /* AIC_7883 */ | ||
369 | "Adaptec AHA-2944 Ultra SCSI host adapter", /* AIC_7884 */ | ||
370 | "Adaptec AHA-2940UW Pro Ultra SCSI host adapter", /* AIC_7887 */ | ||
371 | "Adaptec AIC-7895 Ultra SCSI host adapter", /* AIC_7895 */ | ||
372 | "Adaptec AIC-7890/1 Ultra2 SCSI host adapter", /* AIC_7890 */ | ||
373 | "Adaptec AHA-293X Ultra2 SCSI host adapter", /* AIC_7890 */ | ||
374 | "Adaptec AHA-294X Ultra2 SCSI host adapter", /* AIC_7890 */ | ||
375 | "Adaptec AIC-7896/7 Ultra2 SCSI host adapter", /* AIC_7896 */ | ||
376 | "Adaptec AHA-394X Ultra2 SCSI host adapter", /* AIC_7897 */ | ||
377 | "Adaptec AHA-395X Ultra2 SCSI host adapter", /* AIC_7897 */ | ||
378 | "Adaptec PCMCIA SCSI controller", /* card bus stuff */ | ||
379 | "Adaptec AIC-7892 Ultra 160/m SCSI host adapter", /* AIC_7892 */ | ||
380 | "Adaptec AIC-7899 Ultra 160/m SCSI host adapter", /* AIC_7899 */ | ||
381 | }; | ||
382 | |||
383 | /* | ||
384 | * There should be a specific return value for this in scsi.h, but | ||
385 | * it seems that most drivers ignore it. | ||
386 | */ | ||
387 | #define DID_UNDERFLOW DID_ERROR | ||
388 | |||
389 | /* | ||
390 | * What we want to do is have the higher level scsi driver requeue | ||
391 | * the command to us. There is no specific driver status for this | ||
392 | * condition, but the higher level scsi driver will requeue the | ||
393 | * command on a DID_BUS_BUSY error. | ||
394 | * | ||
395 | * Upon further inspection and testing, it seems that DID_BUS_BUSY | ||
396 | * will *always* retry the command. We can get into an infinite loop | ||
397 | * if this happens when we really want some sort of counter that | ||
398 | * will automatically abort/reset the command after so many retries. | ||
399 | * Using DID_ERROR will do just that. (Made by a suggestion by | ||
400 | * Doug Ledford 8/1/96) | ||
401 | */ | ||
402 | #define DID_RETRY_COMMAND DID_ERROR | ||
403 | |||
404 | #define HSCSIID 0x07 | ||
405 | #define SCSI_RESET 0x040 | ||
406 | |||
407 | /* | ||
408 | * EISA/VL-bus stuff | ||
409 | */ | ||
410 | #define MINSLOT 1 | ||
411 | #define MAXSLOT 15 | ||
412 | #define SLOTBASE(x) ((x) << 12) | ||
413 | #define BASE_TO_SLOT(x) ((x) >> 12) | ||
414 | |||
415 | /* | ||
416 | * Standard EISA Host ID regs (Offset from slot base) | ||
417 | */ | ||
418 | #define AHC_HID0 0x80 /* 0,1: msb of ID2, 2-7: ID1 */ | ||
419 | #define AHC_HID1 0x81 /* 0-4: ID3, 5-7: LSB ID2 */ | ||
420 | #define AHC_HID2 0x82 /* product */ | ||
421 | #define AHC_HID3 0x83 /* firmware revision */ | ||
422 | |||
423 | /* | ||
424 | * AIC-7770 I/O range to reserve for a card | ||
425 | */ | ||
426 | #define MINREG 0xC00 | ||
427 | #define MAXREG 0xCFF | ||
428 | |||
429 | #define INTDEF 0x5C /* Interrupt Definition Register */ | ||
430 | |||
431 | /* | ||
432 | * AIC-78X0 PCI registers | ||
433 | */ | ||
434 | #define CLASS_PROGIF_REVID 0x08 | ||
435 | #define DEVREVID 0x000000FFul | ||
436 | #define PROGINFC 0x0000FF00ul | ||
437 | #define SUBCLASS 0x00FF0000ul | ||
438 | #define BASECLASS 0xFF000000ul | ||
439 | |||
440 | #define CSIZE_LATTIME 0x0C | ||
441 | #define CACHESIZE 0x0000003Ful /* only 5 bits */ | ||
442 | #define LATTIME 0x0000FF00ul | ||
443 | |||
444 | #define DEVCONFIG 0x40 | ||
445 | #define SCBSIZE32 0x00010000ul /* aic789X only */ | ||
446 | #define MPORTMODE 0x00000400ul /* aic7870 only */ | ||
447 | #define RAMPSM 0x00000200ul /* aic7870 only */ | ||
448 | #define RAMPSM_ULTRA2 0x00000004 | ||
449 | #define VOLSENSE 0x00000100ul | ||
450 | #define SCBRAMSEL 0x00000080ul | ||
451 | #define SCBRAMSEL_ULTRA2 0x00000008 | ||
452 | #define MRDCEN 0x00000040ul | ||
453 | #define EXTSCBTIME 0x00000020ul /* aic7870 only */ | ||
454 | #define EXTSCBPEN 0x00000010ul /* aic7870 only */ | ||
455 | #define BERREN 0x00000008ul | ||
456 | #define DACEN 0x00000004ul | ||
457 | #define STPWLEVEL 0x00000002ul | ||
458 | #define DIFACTNEGEN 0x00000001ul /* aic7870 only */ | ||
459 | |||
460 | #define SCAMCTL 0x1a /* Ultra2 only */ | ||
461 | #define CCSCBBADDR 0xf0 /* aic7895/6/7 */ | ||
462 | |||
463 | /* | ||
464 | * Define the different types of SEEPROMs on aic7xxx adapters | ||
465 | * and make it also represent the address size used in accessing | ||
466 | * its registers. The 93C46 chips have 1024 bits organized into | ||
467 | * 64 16-bit words, while the 93C56 chips have 2048 bits organized | ||
468 | * into 128 16-bit words. The C46 chips use 6 bits to address | ||
469 | * each word, while the C56 and C66 (4096 bits) use 8 bits to | ||
470 | * address each word. | ||
471 | */ | ||
472 | typedef enum {C46 = 6, C56_66 = 8} seeprom_chip_type; | ||
473 | |||
474 | /* | ||
475 | * | ||
476 | * Define the format of the SEEPROM registers (16 bits). | ||
477 | * | ||
478 | */ | ||
479 | struct seeprom_config { | ||
480 | |||
481 | /* | ||
482 | * SCSI ID Configuration Flags | ||
483 | */ | ||
484 | #define CFXFER 0x0007 /* synchronous transfer rate */ | ||
485 | #define CFSYNCH 0x0008 /* enable synchronous transfer */ | ||
486 | #define CFDISC 0x0010 /* enable disconnection */ | ||
487 | #define CFWIDEB 0x0020 /* wide bus device (wide card) */ | ||
488 | #define CFSYNCHISULTRA 0x0040 /* CFSYNC is an ultra offset */ | ||
489 | #define CFNEWULTRAFORMAT 0x0080 /* Use the Ultra2 SEEPROM format */ | ||
490 | #define CFSTART 0x0100 /* send start unit SCSI command */ | ||
491 | #define CFINCBIOS 0x0200 /* include in BIOS scan */ | ||
492 | #define CFRNFOUND 0x0400 /* report even if not found */ | ||
493 | #define CFMULTILUN 0x0800 /* probe mult luns in BIOS scan */ | ||
494 | #define CFWBCACHEYES 0x4000 /* Enable W-Behind Cache on drive */ | ||
495 | #define CFWBCACHENC 0xc000 /* Don't change W-Behind Cache */ | ||
496 | /* UNUSED 0x3000 */ | ||
497 | unsigned short device_flags[16]; /* words 0-15 */ | ||
498 | |||
499 | /* | ||
500 | * BIOS Control Bits | ||
501 | */ | ||
502 | #define CFSUPREM 0x0001 /* support all removable drives */ | ||
503 | #define CFSUPREMB 0x0002 /* support removable drives for boot only */ | ||
504 | #define CFBIOSEN 0x0004 /* BIOS enabled */ | ||
505 | /* UNUSED 0x0008 */ | ||
506 | #define CFSM2DRV 0x0010 /* support more than two drives */ | ||
507 | #define CF284XEXTEND 0x0020 /* extended translation (284x cards) */ | ||
508 | /* UNUSED 0x0040 */ | ||
509 | #define CFEXTEND 0x0080 /* extended translation enabled */ | ||
510 | /* UNUSED 0xFF00 */ | ||
511 | unsigned short bios_control; /* word 16 */ | ||
512 | |||
513 | /* | ||
514 | * Host Adapter Control Bits | ||
515 | */ | ||
516 | #define CFAUTOTERM 0x0001 /* Perform Auto termination */ | ||
517 | #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */ | ||
518 | #define CF284XSELTO 0x0003 /* Selection timeout (284x cards) */ | ||
519 | #define CF284XFIFO 0x000C /* FIFO Threshold (284x cards) */ | ||
520 | #define CFSTERM 0x0004 /* SCSI low byte termination */ | ||
521 | #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */ | ||
522 | #define CFSPARITY 0x0010 /* SCSI parity */ | ||
523 | #define CF284XSTERM 0x0020 /* SCSI low byte termination (284x cards) */ | ||
524 | #define CFRESETB 0x0040 /* reset SCSI bus at boot */ | ||
525 | #define CFBPRIMARY 0x0100 /* Channel B primary on 7895 chipsets */ | ||
526 | #define CFSEAUTOTERM 0x0400 /* aic7890 Perform SE Auto Term */ | ||
527 | #define CFLVDSTERM 0x0800 /* aic7890 LVD Termination */ | ||
528 | /* UNUSED 0xF280 */ | ||
529 | unsigned short adapter_control; /* word 17 */ | ||
530 | |||
531 | /* | ||
532 | * Bus Release, Host Adapter ID | ||
533 | */ | ||
534 | #define CFSCSIID 0x000F /* host adapter SCSI ID */ | ||
535 | /* UNUSED 0x00F0 */ | ||
536 | #define CFBRTIME 0xFF00 /* bus release time */ | ||
537 | unsigned short brtime_id; /* word 18 */ | ||
538 | |||
539 | /* | ||
540 | * Maximum targets | ||
541 | */ | ||
542 | #define CFMAXTARG 0x00FF /* maximum targets */ | ||
543 | /* UNUSED 0xFF00 */ | ||
544 | unsigned short max_targets; /* word 19 */ | ||
545 | |||
546 | unsigned short res_1[11]; /* words 20-30 */ | ||
547 | unsigned short checksum; /* word 31 */ | ||
548 | }; | ||
549 | |||
550 | #define SELBUS_MASK 0x0a | ||
551 | #define SELNARROW 0x00 | ||
552 | #define SELBUSB 0x08 | ||
553 | #define SINGLE_BUS 0x00 | ||
554 | |||
555 | #define SCB_TARGET(scb) \ | ||
556 | (((scb)->hscb->target_channel_lun & TID) >> 4) | ||
557 | #define SCB_LUN(scb) \ | ||
558 | ((scb)->hscb->target_channel_lun & LID) | ||
559 | #define SCB_IS_SCSIBUS_B(scb) \ | ||
560 | (((scb)->hscb->target_channel_lun & SELBUSB) != 0) | ||
561 | |||
562 | /* | ||
563 | * If an error occurs during a data transfer phase, run the command | ||
564 | * to completion - it's easier that way - making a note of the error | ||
565 | * condition in this location. This then will modify a DID_OK status | ||
566 | * into an appropriate error for the higher-level SCSI code. | ||
567 | */ | ||
568 | #define aic7xxx_error(cmd) ((cmd)->SCp.Status) | ||
569 | |||
570 | /* | ||
571 | * Keep track of the targets returned status. | ||
572 | */ | ||
573 | #define aic7xxx_status(cmd) ((cmd)->SCp.sent_command) | ||
574 | |||
575 | /* | ||
576 | * The position of the SCSI commands scb within the scb array. | ||
577 | */ | ||
578 | #define aic7xxx_position(cmd) ((cmd)->SCp.have_data_in) | ||
579 | |||
580 | /* | ||
581 | * The stored DMA mapping for single-buffer data transfers. | ||
582 | */ | ||
583 | #define aic7xxx_mapping(cmd) ((cmd)->SCp.phase) | ||
584 | |||
585 | /* | ||
586 | * Get out private data area from a scsi cmd pointer | ||
587 | */ | ||
588 | #define AIC_DEV(cmd) ((struct aic_dev_data *)(cmd)->device->hostdata) | ||
589 | |||
590 | /* | ||
591 | * So we can keep track of our host structs | ||
592 | */ | ||
593 | static struct aic7xxx_host *first_aic7xxx = NULL; | ||
594 | |||
595 | /* | ||
596 | * As of Linux 2.1, the mid-level SCSI code uses virtual addresses | ||
597 | * in the scatter-gather lists. We need to convert the virtual | ||
598 | * addresses to physical addresses. | ||
599 | */ | ||
600 | struct hw_scatterlist { | ||
601 | unsigned int address; | ||
602 | unsigned int length; | ||
603 | }; | ||
604 | |||
605 | /* | ||
606 | * Maximum number of SG segments these cards can support. | ||
607 | */ | ||
608 | #define AIC7XXX_MAX_SG 128 | ||
609 | |||
610 | /* | ||
611 | * The maximum number of SCBs we could have for ANY type | ||
612 | * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE | ||
613 | * SEQUENCER CODE IF THIS IS MODIFIED! | ||
614 | */ | ||
615 | #define AIC7XXX_MAXSCB 255 | ||
616 | |||
617 | |||
618 | struct aic7xxx_hwscb { | ||
619 | /* ------------ Begin hardware supported fields ---------------- */ | ||
620 | /* 0*/ unsigned char control; | ||
621 | /* 1*/ unsigned char target_channel_lun; /* 4/1/3 bits */ | ||
622 | /* 2*/ unsigned char target_status; | ||
623 | /* 3*/ unsigned char SG_segment_count; | ||
624 | /* 4*/ unsigned int SG_list_pointer; | ||
625 | /* 8*/ unsigned char residual_SG_segment_count; | ||
626 | /* 9*/ unsigned char residual_data_count[3]; | ||
627 | /*12*/ unsigned int data_pointer; | ||
628 | /*16*/ unsigned int data_count; | ||
629 | /*20*/ unsigned int SCSI_cmd_pointer; | ||
630 | /*24*/ unsigned char SCSI_cmd_length; | ||
631 | /*25*/ unsigned char tag; /* Index into our kernel SCB array. | ||
632 | * Also used as the tag for tagged I/O | ||
633 | */ | ||
634 | #define SCB_PIO_TRANSFER_SIZE 26 /* amount we need to upload/download | ||
635 | * via PIO to initialize a transaction. | ||
636 | */ | ||
637 | /*26*/ unsigned char next; /* Used to thread SCBs awaiting selection | ||
638 | * or disconnected down in the sequencer. | ||
639 | */ | ||
640 | /*27*/ unsigned char prev; | ||
641 | /*28*/ unsigned int pad; /* | ||
642 | * Unused by the kernel, but we require | ||
643 | * the padding so that the array of | ||
644 | * hardware SCBs is aligned on 32 byte | ||
645 | * boundaries so the sequencer can index | ||
646 | */ | ||
647 | }; | ||
648 | |||
649 | typedef enum { | ||
650 | SCB_FREE = 0x0000, | ||
651 | SCB_DTR_SCB = 0x0001, | ||
652 | SCB_WAITINGQ = 0x0002, | ||
653 | SCB_ACTIVE = 0x0004, | ||
654 | SCB_SENSE = 0x0008, | ||
655 | SCB_ABORT = 0x0010, | ||
656 | SCB_DEVICE_RESET = 0x0020, | ||
657 | SCB_RESET = 0x0040, | ||
658 | SCB_RECOVERY_SCB = 0x0080, | ||
659 | SCB_MSGOUT_PPR = 0x0100, | ||
660 | SCB_MSGOUT_SENT = 0x0200, | ||
661 | SCB_MSGOUT_SDTR = 0x0400, | ||
662 | SCB_MSGOUT_WDTR = 0x0800, | ||
663 | SCB_MSGOUT_BITS = SCB_MSGOUT_PPR | | ||
664 | SCB_MSGOUT_SENT | | ||
665 | SCB_MSGOUT_SDTR | | ||
666 | SCB_MSGOUT_WDTR, | ||
667 | SCB_QUEUED_ABORT = 0x1000, | ||
668 | SCB_QUEUED_FOR_DONE = 0x2000, | ||
669 | SCB_WAS_BUSY = 0x4000, | ||
670 | SCB_QUEUE_FULL = 0x8000 | ||
671 | } scb_flag_type; | ||
672 | |||
673 | typedef enum { | ||
674 | AHC_FNONE = 0x00000000, | ||
675 | AHC_PAGESCBS = 0x00000001, | ||
676 | AHC_CHANNEL_B_PRIMARY = 0x00000002, | ||
677 | AHC_USEDEFAULTS = 0x00000004, | ||
678 | AHC_INDIRECT_PAGING = 0x00000008, | ||
679 | AHC_CHNLB = 0x00000020, | ||
680 | AHC_CHNLC = 0x00000040, | ||
681 | AHC_EXTEND_TRANS_A = 0x00000100, | ||
682 | AHC_EXTEND_TRANS_B = 0x00000200, | ||
683 | AHC_TERM_ENB_A = 0x00000400, | ||
684 | AHC_TERM_ENB_SE_LOW = 0x00000400, | ||
685 | AHC_TERM_ENB_B = 0x00000800, | ||
686 | AHC_TERM_ENB_SE_HIGH = 0x00000800, | ||
687 | AHC_HANDLING_REQINITS = 0x00001000, | ||
688 | AHC_TARGETMODE = 0x00002000, | ||
689 | AHC_NEWEEPROM_FMT = 0x00004000, | ||
690 | /* | ||
691 | * Here ends the FreeBSD defined flags and here begins the linux defined | ||
692 | * flags. NOTE: I did not preserve the old flag name during this change | ||
693 | * specifically to force me to evaluate what flags were being used properly | ||
694 | * and what flags weren't. This way, I could clean up the flag usage on | ||
695 | * a use by use basis. Doug Ledford | ||
696 | */ | ||
697 | AHC_MOTHERBOARD = 0x00020000, | ||
698 | AHC_NO_STPWEN = 0x00040000, | ||
699 | AHC_RESET_DELAY = 0x00080000, | ||
700 | AHC_A_SCANNED = 0x00100000, | ||
701 | AHC_B_SCANNED = 0x00200000, | ||
702 | AHC_MULTI_CHANNEL = 0x00400000, | ||
703 | AHC_BIOS_ENABLED = 0x00800000, | ||
704 | AHC_SEEPROM_FOUND = 0x01000000, | ||
705 | AHC_TERM_ENB_LVD = 0x02000000, | ||
706 | AHC_ABORT_PENDING = 0x04000000, | ||
707 | AHC_RESET_PENDING = 0x08000000, | ||
708 | #define AHC_IN_ISR_BIT 28 | ||
709 | AHC_IN_ISR = 0x10000000, | ||
710 | AHC_IN_ABORT = 0x20000000, | ||
711 | AHC_IN_RESET = 0x40000000, | ||
712 | AHC_EXTERNAL_SRAM = 0x80000000 | ||
713 | } ahc_flag_type; | ||
714 | |||
715 | typedef enum { | ||
716 | AHC_NONE = 0x0000, | ||
717 | AHC_CHIPID_MASK = 0x00ff, | ||
718 | AHC_AIC7770 = 0x0001, | ||
719 | AHC_AIC7850 = 0x0002, | ||
720 | AHC_AIC7860 = 0x0003, | ||
721 | AHC_AIC7870 = 0x0004, | ||
722 | AHC_AIC7880 = 0x0005, | ||
723 | AHC_AIC7890 = 0x0006, | ||
724 | AHC_AIC7895 = 0x0007, | ||
725 | AHC_AIC7896 = 0x0008, | ||
726 | AHC_AIC7892 = 0x0009, | ||
727 | AHC_AIC7899 = 0x000a, | ||
728 | AHC_VL = 0x0100, | ||
729 | AHC_EISA = 0x0200, | ||
730 | AHC_PCI = 0x0400, | ||
731 | } ahc_chip; | ||
732 | |||
733 | typedef enum { | ||
734 | AHC_FENONE = 0x0000, | ||
735 | AHC_ULTRA = 0x0001, | ||
736 | AHC_ULTRA2 = 0x0002, | ||
737 | AHC_WIDE = 0x0004, | ||
738 | AHC_TWIN = 0x0008, | ||
739 | AHC_MORE_SRAM = 0x0010, | ||
740 | AHC_CMD_CHAN = 0x0020, | ||
741 | AHC_QUEUE_REGS = 0x0040, | ||
742 | AHC_SG_PRELOAD = 0x0080, | ||
743 | AHC_SPIOCAP = 0x0100, | ||
744 | AHC_ULTRA3 = 0x0200, | ||
745 | AHC_NEW_AUTOTERM = 0x0400, | ||
746 | AHC_AIC7770_FE = AHC_FENONE, | ||
747 | AHC_AIC7850_FE = AHC_SPIOCAP, | ||
748 | AHC_AIC7860_FE = AHC_ULTRA|AHC_SPIOCAP, | ||
749 | AHC_AIC7870_FE = AHC_FENONE, | ||
750 | AHC_AIC7880_FE = AHC_ULTRA, | ||
751 | AHC_AIC7890_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA2| | ||
752 | AHC_QUEUE_REGS|AHC_SG_PRELOAD|AHC_NEW_AUTOTERM, | ||
753 | AHC_AIC7895_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA, | ||
754 | AHC_AIC7896_FE = AHC_AIC7890_FE, | ||
755 | AHC_AIC7892_FE = AHC_AIC7890_FE|AHC_ULTRA3, | ||
756 | AHC_AIC7899_FE = AHC_AIC7890_FE|AHC_ULTRA3, | ||
757 | } ahc_feature; | ||
758 | |||
759 | #define SCB_DMA_ADDR(scb, addr) ((unsigned long)(addr) + (scb)->scb_dma->dma_offset) | ||
760 | |||
761 | struct aic7xxx_scb_dma { | ||
762 | unsigned long dma_offset; /* Correction you have to add | ||
763 | * to virtual address to get | ||
764 | * dma handle in this region */ | ||
765 | dma_addr_t dma_address; /* DMA handle of the start, | ||
766 | * for unmap */ | ||
767 | unsigned int dma_len; /* DMA length */ | ||
768 | }; | ||
769 | |||
770 | typedef enum { | ||
771 | AHC_BUG_NONE = 0x0000, | ||
772 | AHC_BUG_TMODE_WIDEODD = 0x0001, | ||
773 | AHC_BUG_AUTOFLUSH = 0x0002, | ||
774 | AHC_BUG_CACHETHEN = 0x0004, | ||
775 | AHC_BUG_CACHETHEN_DIS = 0x0008, | ||
776 | AHC_BUG_PCI_2_1_RETRY = 0x0010, | ||
777 | AHC_BUG_PCI_MWI = 0x0020, | ||
778 | AHC_BUG_SCBCHAN_UPLOAD = 0x0040, | ||
779 | } ahc_bugs; | ||
780 | |||
781 | struct aic7xxx_scb { | ||
782 | struct aic7xxx_hwscb *hscb; /* corresponding hardware scb */ | ||
783 | struct scsi_cmnd *cmd; /* scsi_cmnd for this scb */ | ||
784 | struct aic7xxx_scb *q_next; /* next scb in queue */ | ||
785 | volatile scb_flag_type flags; /* current state of scb */ | ||
786 | struct hw_scatterlist *sg_list; /* SG list in adapter format */ | ||
787 | unsigned char tag_action; | ||
788 | unsigned char sg_count; | ||
789 | unsigned char *sense_cmd; /* | ||
790 | * Allocate 6 characters for | ||
791 | * sense command. | ||
792 | */ | ||
793 | unsigned char *cmnd; | ||
794 | unsigned int sg_length; /* | ||
795 | * We init this during | ||
796 | * buildscb so we don't have | ||
797 | * to calculate anything during | ||
798 | * underflow/overflow/stat code | ||
799 | */ | ||
800 | void *kmalloc_ptr; | ||
801 | struct aic7xxx_scb_dma *scb_dma; | ||
802 | }; | ||
803 | |||
804 | /* | ||
805 | * Define a linked list of SCBs. | ||
806 | */ | ||
807 | typedef struct { | ||
808 | struct aic7xxx_scb *head; | ||
809 | struct aic7xxx_scb *tail; | ||
810 | } scb_queue_type; | ||
811 | |||
812 | static struct { | ||
813 | unsigned char errno; | ||
814 | const char *errmesg; | ||
815 | } hard_error[] = { | ||
816 | { ILLHADDR, "Illegal Host Access" }, | ||
817 | { ILLSADDR, "Illegal Sequencer Address referenced" }, | ||
818 | { ILLOPCODE, "Illegal Opcode in sequencer program" }, | ||
819 | { SQPARERR, "Sequencer Ram Parity Error" }, | ||
820 | { DPARERR, "Data-Path Ram Parity Error" }, | ||
821 | { MPARERR, "Scratch Ram/SCB Array Ram Parity Error" }, | ||
822 | { PCIERRSTAT,"PCI Error detected" }, | ||
823 | { CIOPARERR, "CIOBUS Parity Error" } | ||
824 | }; | ||
825 | |||
826 | static unsigned char | ||
827 | generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 }; | ||
828 | |||
829 | typedef struct { | ||
830 | scb_queue_type free_scbs; /* | ||
831 | * SCBs assigned to free slot on | ||
832 | * card (no paging required) | ||
833 | */ | ||
834 | struct aic7xxx_scb *scb_array[AIC7XXX_MAXSCB]; | ||
835 | struct aic7xxx_hwscb *hscbs; | ||
836 | unsigned char numscbs; /* current number of scbs */ | ||
837 | unsigned char maxhscbs; /* hardware scbs */ | ||
838 | unsigned char maxscbs; /* max scbs including pageable scbs */ | ||
839 | dma_addr_t hscbs_dma; /* DMA handle to hscbs */ | ||
840 | unsigned int hscbs_dma_len; /* length of the above DMA area */ | ||
841 | void *hscb_kmalloc_ptr; | ||
842 | } scb_data_type; | ||
843 | |||
844 | struct target_cmd { | ||
845 | unsigned char mesg_bytes[4]; | ||
846 | unsigned char command[28]; | ||
847 | }; | ||
848 | |||
849 | #define AHC_TRANS_CUR 0x0001 | ||
850 | #define AHC_TRANS_ACTIVE 0x0002 | ||
851 | #define AHC_TRANS_GOAL 0x0004 | ||
852 | #define AHC_TRANS_USER 0x0008 | ||
853 | #define AHC_TRANS_QUITE 0x0010 | ||
854 | typedef struct { | ||
855 | unsigned char width; | ||
856 | unsigned char period; | ||
857 | unsigned char offset; | ||
858 | unsigned char options; | ||
859 | } transinfo_type; | ||
860 | |||
861 | struct aic_dev_data { | ||
862 | volatile scb_queue_type delayed_scbs; | ||
863 | volatile unsigned short temp_q_depth; | ||
864 | unsigned short max_q_depth; | ||
865 | volatile unsigned char active_cmds; | ||
866 | /* | ||
867 | * Statistics Kept: | ||
868 | * | ||
869 | * Total Xfers (count for each command that has a data xfer), | ||
870 | * broken down by reads && writes. | ||
871 | * | ||
872 | * Further sorted into a few bins for keeping tabs on how many commands | ||
873 | * we get of various sizes. | ||
874 | * | ||
875 | */ | ||
876 | long w_total; /* total writes */ | ||
877 | long r_total; /* total reads */ | ||
878 | long barrier_total; /* total num of REQ_BARRIER commands */ | ||
879 | long ordered_total; /* How many REQ_BARRIER commands we | ||
880 | used ordered tags to satisfy */ | ||
881 | long w_bins[6]; /* binned write */ | ||
882 | long r_bins[6]; /* binned reads */ | ||
883 | transinfo_type cur; | ||
884 | transinfo_type goal; | ||
885 | #define BUS_DEVICE_RESET_PENDING 0x01 | ||
886 | #define DEVICE_RESET_DELAY 0x02 | ||
887 | #define DEVICE_PRINT_DTR 0x04 | ||
888 | #define DEVICE_WAS_BUSY 0x08 | ||
889 | #define DEVICE_DTR_SCANNED 0x10 | ||
890 | #define DEVICE_SCSI_3 0x20 | ||
891 | volatile unsigned char flags; | ||
892 | unsigned needppr:1; | ||
893 | unsigned needppr_copy:1; | ||
894 | unsigned needsdtr:1; | ||
895 | unsigned needsdtr_copy:1; | ||
896 | unsigned needwdtr:1; | ||
897 | unsigned needwdtr_copy:1; | ||
898 | unsigned dtr_pending:1; | ||
899 | struct scsi_device *SDptr; | ||
900 | struct list_head list; | ||
901 | }; | ||
902 | |||
903 | /* | ||
904 | * Define a structure used for each host adapter. Note, in order to avoid | ||
905 | * problems with architectures I can't test on (because I don't have one, | ||
906 | * such as the Alpha based systems) which happen to give faults for | ||
907 | * non-aligned memory accesses, care was taken to align this structure | ||
908 | * in a way that guaranteed all accesses larger than 8 bits were aligned | ||
909 | * on the appropriate boundary. It's also organized to try and be more | ||
910 | * cache line efficient. Be careful when changing this lest you might hurt | ||
911 | * overall performance and bring down the wrath of the masses. | ||
912 | */ | ||
913 | struct aic7xxx_host { | ||
914 | /* | ||
915 | * This is the first 64 bytes in the host struct | ||
916 | */ | ||
917 | |||
918 | /* | ||
919 | * We are grouping things here....first, items that get either read or | ||
920 | * written with nearly every interrupt | ||
921 | */ | ||
922 | volatile long flags; | ||
923 | ahc_feature features; /* chip features */ | ||
924 | unsigned long base; /* card base address */ | ||
925 | volatile unsigned char __iomem *maddr; /* memory mapped address */ | ||
926 | unsigned long isr_count; /* Interrupt count */ | ||
927 | unsigned long spurious_int; | ||
928 | scb_data_type *scb_data; | ||
929 | struct aic7xxx_cmd_queue { | ||
930 | struct scsi_cmnd *head; | ||
931 | struct scsi_cmnd *tail; | ||
932 | } completeq; | ||
933 | |||
934 | /* | ||
935 | * Things read/written on nearly every entry into aic7xxx_queue() | ||
936 | */ | ||
937 | volatile scb_queue_type waiting_scbs; | ||
938 | unsigned char unpause; /* unpause value for HCNTRL */ | ||
939 | unsigned char pause; /* pause value for HCNTRL */ | ||
940 | volatile unsigned char qoutfifonext; | ||
941 | volatile unsigned char activescbs; /* active scbs */ | ||
942 | volatile unsigned char max_activescbs; | ||
943 | volatile unsigned char qinfifonext; | ||
944 | volatile unsigned char *untagged_scbs; | ||
945 | volatile unsigned char *qoutfifo; | ||
946 | volatile unsigned char *qinfifo; | ||
947 | |||
948 | unsigned char dev_last_queue_full[MAX_TARGETS]; | ||
949 | unsigned char dev_last_queue_full_count[MAX_TARGETS]; | ||
950 | unsigned short ultraenb; /* Gets downloaded to card as a bitmap */ | ||
951 | unsigned short discenable; /* Gets downloaded to card as a bitmap */ | ||
952 | transinfo_type user[MAX_TARGETS]; | ||
953 | |||
954 | unsigned char msg_buf[13]; /* The message for the target */ | ||
955 | unsigned char msg_type; | ||
956 | #define MSG_TYPE_NONE 0x00 | ||
957 | #define MSG_TYPE_INITIATOR_MSGOUT 0x01 | ||
958 | #define MSG_TYPE_INITIATOR_MSGIN 0x02 | ||
959 | unsigned char msg_len; /* Length of message */ | ||
960 | unsigned char msg_index; /* Index into msg_buf array */ | ||
961 | |||
962 | |||
963 | /* | ||
964 | * We put the less frequently used host structure items | ||
965 | * after the more frequently used items to try and ease | ||
966 | * the burden on the cache subsystem. | ||
967 | * These entries are not *commonly* accessed, whereas | ||
968 | * the preceding entries are accessed very often. | ||
969 | */ | ||
970 | |||
971 | unsigned int irq; /* IRQ for this adapter */ | ||
972 | int instance; /* aic7xxx instance number */ | ||
973 | int scsi_id; /* host adapter SCSI ID */ | ||
974 | int scsi_id_b; /* channel B for twin adapters */ | ||
975 | unsigned int bios_address; | ||
976 | int board_name_index; | ||
977 | unsigned short bios_control; /* bios control - SEEPROM */ | ||
978 | unsigned short adapter_control; /* adapter control - SEEPROM */ | ||
979 | struct pci_dev *pdev; | ||
980 | unsigned char pci_bus; | ||
981 | unsigned char pci_device_fn; | ||
982 | struct seeprom_config sc; | ||
983 | unsigned short sc_type; | ||
984 | unsigned short sc_size; | ||
985 | struct aic7xxx_host *next; /* allow for multiple IRQs */ | ||
986 | struct Scsi_Host *host; /* pointer to scsi host */ | ||
987 | struct list_head aic_devs; /* all aic_dev structs on host */ | ||
988 | int host_no; /* SCSI host number */ | ||
989 | unsigned long mbase; /* I/O memory address */ | ||
990 | ahc_chip chip; /* chip type */ | ||
991 | ahc_bugs bugs; | ||
992 | dma_addr_t fifo_dma; /* DMA handle for fifo arrays */ | ||
993 | }; | ||
994 | |||
995 | /* | ||
996 | * Valid SCSIRATE values. (p. 3-17) | ||
997 | * Provides a mapping of transfer periods in ns/4 to the proper value to | ||
998 | * stick in the SCSIRATE reg to use that transfer rate. | ||
999 | */ | ||
1000 | #define AHC_SYNCRATE_ULTRA3 0 | ||
1001 | #define AHC_SYNCRATE_ULTRA2 1 | ||
1002 | #define AHC_SYNCRATE_ULTRA 3 | ||
1003 | #define AHC_SYNCRATE_FAST 6 | ||
1004 | #define AHC_SYNCRATE_CRC 0x40 | ||
1005 | #define AHC_SYNCRATE_SE 0x10 | ||
1006 | static struct aic7xxx_syncrate { | ||
1007 | /* Rates in Ultra mode have bit 8 of sxfr set */ | ||
1008 | #define ULTRA_SXFR 0x100 | ||
1009 | int sxfr_ultra2; | ||
1010 | int sxfr; | ||
1011 | unsigned char period; | ||
1012 | const char *rate[2]; | ||
1013 | } aic7xxx_syncrates[] = { | ||
1014 | { 0x42, 0x000, 9, {"80.0", "160.0"} }, | ||
1015 | { 0x13, 0x000, 10, {"40.0", "80.0"} }, | ||
1016 | { 0x14, 0x000, 11, {"33.0", "66.6"} }, | ||
1017 | { 0x15, 0x100, 12, {"20.0", "40.0"} }, | ||
1018 | { 0x16, 0x110, 15, {"16.0", "32.0"} }, | ||
1019 | { 0x17, 0x120, 18, {"13.4", "26.8"} }, | ||
1020 | { 0x18, 0x000, 25, {"10.0", "20.0"} }, | ||
1021 | { 0x19, 0x010, 31, {"8.0", "16.0"} }, | ||
1022 | { 0x1a, 0x020, 37, {"6.67", "13.3"} }, | ||
1023 | { 0x1b, 0x030, 43, {"5.7", "11.4"} }, | ||
1024 | { 0x10, 0x040, 50, {"5.0", "10.0"} }, | ||
1025 | { 0x00, 0x050, 56, {"4.4", "8.8" } }, | ||
1026 | { 0x00, 0x060, 62, {"4.0", "8.0" } }, | ||
1027 | { 0x00, 0x070, 68, {"3.6", "7.2" } }, | ||
1028 | { 0x00, 0x000, 0, {NULL, NULL} }, | ||
1029 | }; | ||
1030 | |||
1031 | #define CTL_OF_SCB(scb) (((scb->hscb)->target_channel_lun >> 3) & 0x1), \ | ||
1032 | (((scb->hscb)->target_channel_lun >> 4) & 0xf), \ | ||
1033 | ((scb->hscb)->target_channel_lun & 0x07) | ||
1034 | |||
1035 | #define CTL_OF_CMD(cmd) ((cmd->device->channel) & 0x01), \ | ||
1036 | ((cmd->device->id) & 0x0f), \ | ||
1037 | ((cmd->device->lun) & 0x07) | ||
1038 | |||
1039 | #define TARGET_INDEX(cmd) ((cmd)->device->id | ((cmd)->device->channel << 3)) | ||
1040 | |||
1041 | /* | ||
1042 | * A nice little define to make doing our printks a little easier | ||
1043 | */ | ||
1044 | |||
1045 | #define WARN_LEAD KERN_WARNING "(scsi%d:%d:%d:%d) " | ||
1046 | #define INFO_LEAD KERN_INFO "(scsi%d:%d:%d:%d) " | ||
1047 | |||
1048 | /* | ||
1049 | * XXX - these options apply unilaterally to _all_ 274x/284x/294x | ||
1050 | * cards in the system. This should be fixed. Exceptions to this | ||
1051 | * rule are noted in the comments. | ||
1052 | */ | ||
1053 | |||
1054 | /* | ||
1055 | * Use this as the default queue depth when setting tagged queueing on. | ||
1056 | */ | ||
1057 | static unsigned int aic7xxx_default_queue_depth = AIC7XXX_CMDS_PER_DEVICE; | ||
1058 | |||
1059 | /* | ||
1060 | * Skip the scsi bus reset. Non 0 make us skip the reset at startup. This | ||
1061 | * has no effect on any later resets that might occur due to things like | ||
1062 | * SCSI bus timeouts. | ||
1063 | */ | ||
1064 | static unsigned int aic7xxx_no_reset = 0; | ||
1065 | /* | ||
1066 | * Certain PCI motherboards will scan PCI devices from highest to lowest, | ||
1067 | * others scan from lowest to highest, and they tend to do all kinds of | ||
1068 | * strange things when they come into contact with PCI bridge chips. The | ||
1069 | * net result of all this is that the PCI card that is actually used to boot | ||
1070 | * the machine is very hard to detect. Most motherboards go from lowest | ||
1071 | * PCI slot number to highest, and the first SCSI controller found is the | ||
1072 | * one you boot from. The only exceptions to this are when a controller | ||
1073 | * has its BIOS disabled. So, we by default sort all of our SCSI controllers | ||
1074 | * from lowest PCI slot number to highest PCI slot number. We also force | ||
1075 | * all controllers with their BIOS disabled to the end of the list. This | ||
1076 | * works on *almost* all computers. Where it doesn't work, we have this | ||
1077 | * option. Setting this option to non-0 will reverse the order of the sort | ||
1078 | * to highest first, then lowest, but will still leave cards with their BIOS | ||
1079 | * disabled at the very end. That should fix everyone up unless there are | ||
1080 | * really strange cirumstances. | ||
1081 | */ | ||
1082 | static int aic7xxx_reverse_scan = 0; | ||
1083 | /* | ||
1084 | * Should we force EXTENDED translation on a controller. | ||
1085 | * 0 == Use whatever is in the SEEPROM or default to off | ||
1086 | * 1 == Use whatever is in the SEEPROM or default to on | ||
1087 | */ | ||
1088 | static unsigned int aic7xxx_extended = 0; | ||
1089 | /* | ||
1090 | * The IRQ trigger method used on EISA controllers. Does not effect PCI cards. | ||
1091 | * -1 = Use detected settings. | ||
1092 | * 0 = Force Edge triggered mode. | ||
1093 | * 1 = Force Level triggered mode. | ||
1094 | */ | ||
1095 | static int aic7xxx_irq_trigger = -1; | ||
1096 | /* | ||
1097 | * This variable is used to override the termination settings on a controller. | ||
1098 | * This should not be used under normal conditions. However, in the case | ||
1099 | * that a controller does not have a readable SEEPROM (so that we can't | ||
1100 | * read the SEEPROM settings directly) and that a controller has a buggered | ||
1101 | * version of the cable detection logic, this can be used to force the | ||
1102 | * correct termination. It is preferable to use the manual termination | ||
1103 | * settings in the BIOS if possible, but some motherboard controllers store | ||
1104 | * those settings in a format we can't read. In other cases, auto term | ||
1105 | * should also work, but the chipset was put together with no auto term | ||
1106 | * logic (common on motherboard controllers). In those cases, we have | ||
1107 | * 32 bits here to work with. That's good for 8 controllers/channels. The | ||
1108 | * bits are organized as 4 bits per channel, with scsi0 getting the lowest | ||
1109 | * 4 bits in the int. A 1 in a bit position indicates the termination setting | ||
1110 | * that corresponds to that bit should be enabled, a 0 is disabled. | ||
1111 | * It looks something like this: | ||
1112 | * | ||
1113 | * 0x0f = 1111-Single Ended Low Byte Termination on/off | ||
1114 | * ||\-Single Ended High Byte Termination on/off | ||
1115 | * |\-LVD Low Byte Termination on/off | ||
1116 | * \-LVD High Byte Termination on/off | ||
1117 | * | ||
1118 | * For non-Ultra2 controllers, the upper 2 bits are not important. So, to | ||
1119 | * enable both high byte and low byte termination on scsi0, I would need to | ||
1120 | * make sure that the override_term variable was set to 0x03 (bits 0011). | ||
1121 | * To make sure that all termination is enabled on an Ultra2 controller at | ||
1122 | * scsi2 and only high byte termination on scsi1 and high and low byte | ||
1123 | * termination on scsi0, I would set override_term=0xf23 (bits 1111 0010 0011) | ||
1124 | * | ||
1125 | * For the most part, users should never have to use this, that's why I | ||
1126 | * left it fairly cryptic instead of easy to understand. If you need it, | ||
1127 | * most likely someone will be telling you what your's needs to be set to. | ||
1128 | */ | ||
1129 | static int aic7xxx_override_term = -1; | ||
1130 | /* | ||
1131 | * Certain motherboard chipset controllers tend to screw | ||
1132 | * up the polarity of the term enable output pin. Use this variable | ||
1133 | * to force the correct polarity for your system. This is a bitfield variable | ||
1134 | * similar to the previous one, but this one has one bit per channel instead | ||
1135 | * of four. | ||
1136 | * 0 = Force the setting to active low. | ||
1137 | * 1 = Force setting to active high. | ||
1138 | * Most Adaptec cards are active high, several motherboards are active low. | ||
1139 | * To force a 2940 card at SCSI 0 to active high and a motherboard 7895 | ||
1140 | * controller at scsi1 and scsi2 to active low, and a 2910 card at scsi3 | ||
1141 | * to active high, you would need to set stpwlev=0x9 (bits 1001). | ||
1142 | * | ||
1143 | * People shouldn't need to use this, but if you are experiencing lots of | ||
1144 | * SCSI timeout problems, this may help. There is one sure way to test what | ||
1145 | * this option needs to be. Using a boot floppy to boot the system, configure | ||
1146 | * your system to enable all SCSI termination (in the Adaptec SCSI BIOS) and | ||
1147 | * if needed then also pass a value to override_term to make sure that the | ||
1148 | * driver is enabling SCSI termination, then set this variable to either 0 | ||
1149 | * or 1. When the driver boots, make sure there are *NO* SCSI cables | ||
1150 | * connected to your controller. If it finds and inits the controller | ||
1151 | * without problem, then the setting you passed to stpwlev was correct. If | ||
1152 | * the driver goes into a reset loop and hangs the system, then you need the | ||
1153 | * other setting for this variable. If neither setting lets the machine | ||
1154 | * boot then you have definite termination problems that may not be fixable. | ||
1155 | */ | ||
1156 | static int aic7xxx_stpwlev = -1; | ||
1157 | /* | ||
1158 | * Set this to non-0 in order to force the driver to panic the kernel | ||
1159 | * and print out debugging info on a SCSI abort or reset cycle. | ||
1160 | */ | ||
1161 | static int aic7xxx_panic_on_abort = 0; | ||
1162 | /* | ||
1163 | * PCI bus parity checking of the Adaptec controllers. This is somewhat | ||
1164 | * dubious at best. To my knowledge, this option has never actually | ||
1165 | * solved a PCI parity problem, but on certain machines with broken PCI | ||
1166 | * chipset configurations, it can generate tons of false error messages. | ||
1167 | * It's included in the driver for completeness. | ||
1168 | * 0 = Shut off PCI parity check | ||
1169 | * -1 = Normal polarity pci parity checking | ||
1170 | * 1 = reverse polarity pci parity checking | ||
1171 | * | ||
1172 | * NOTE: you can't actually pass -1 on the lilo prompt. So, to set this | ||
1173 | * variable to -1 you would actually want to simply pass the variable | ||
1174 | * name without a number. That will invert the 0 which will result in | ||
1175 | * -1. | ||
1176 | */ | ||
1177 | static int aic7xxx_pci_parity = 0; | ||
1178 | /* | ||
1179 | * Set this to any non-0 value to cause us to dump the contents of all | ||
1180 | * the card's registers in a hex dump format tailored to each model of | ||
1181 | * controller. | ||
1182 | * | ||
1183 | * NOTE: THE CONTROLLER IS LEFT IN AN UNUSABLE STATE BY THIS OPTION. | ||
1184 | * YOU CANNOT BOOT UP WITH THIS OPTION, IT IS FOR DEBUGGING PURPOSES | ||
1185 | * ONLY | ||
1186 | */ | ||
1187 | static int aic7xxx_dump_card = 0; | ||
1188 | /* | ||
1189 | * Set this to a non-0 value to make us dump out the 32 bit instruction | ||
1190 | * registers on the card after completing the sequencer download. This | ||
1191 | * allows the actual sequencer download to be verified. It is possible | ||
1192 | * to use this option and still boot up and run your system. This is | ||
1193 | * only intended for debugging purposes. | ||
1194 | */ | ||
1195 | static int aic7xxx_dump_sequencer = 0; | ||
1196 | /* | ||
1197 | * Certain newer motherboards have put new PCI based devices into the | ||
1198 | * IO spaces that used to typically be occupied by VLB or EISA cards. | ||
1199 | * This overlap can cause these newer motherboards to lock up when scanned | ||
1200 | * for older EISA and VLB devices. Setting this option to non-0 will | ||
1201 | * cause the driver to skip scanning for any VLB or EISA controllers and | ||
1202 | * only support the PCI controllers. NOTE: this means that if the kernel | ||
1203 | * os compiled with PCI support disabled, then setting this to non-0 | ||
1204 | * would result in never finding any devices :) | ||
1205 | */ | ||
1206 | static int aic7xxx_no_probe = 0; | ||
1207 | /* | ||
1208 | * On some machines, enabling the external SCB RAM isn't reliable yet. I | ||
1209 | * haven't had time to make test patches for things like changing the | ||
1210 | * timing mode on that external RAM either. Some of those changes may | ||
1211 | * fix the problem. Until then though, we default to external SCB RAM | ||
1212 | * off and give a command line option to enable it. | ||
1213 | */ | ||
1214 | static int aic7xxx_scbram = 0; | ||
1215 | /* | ||
1216 | * So that we can set how long each device is given as a selection timeout. | ||
1217 | * The table of values goes like this: | ||
1218 | * 0 - 256ms | ||
1219 | * 1 - 128ms | ||
1220 | * 2 - 64ms | ||
1221 | * 3 - 32ms | ||
1222 | * We default to 64ms because it's fast. Some old SCSI-I devices need a | ||
1223 | * longer time. The final value has to be left shifted by 3, hence 0x10 | ||
1224 | * is the final value. | ||
1225 | */ | ||
1226 | static int aic7xxx_seltime = 0x10; | ||
1227 | /* | ||
1228 | * So that insmod can find the variable and make it point to something | ||
1229 | */ | ||
1230 | #ifdef MODULE | ||
1231 | static char * aic7xxx = NULL; | ||
1232 | module_param(aic7xxx, charp, 0); | ||
1233 | #endif | ||
1234 | |||
1235 | #define VERBOSE_NORMAL 0x0000 | ||
1236 | #define VERBOSE_NEGOTIATION 0x0001 | ||
1237 | #define VERBOSE_SEQINT 0x0002 | ||
1238 | #define VERBOSE_SCSIINT 0x0004 | ||
1239 | #define VERBOSE_PROBE 0x0008 | ||
1240 | #define VERBOSE_PROBE2 0x0010 | ||
1241 | #define VERBOSE_NEGOTIATION2 0x0020 | ||
1242 | #define VERBOSE_MINOR_ERROR 0x0040 | ||
1243 | #define VERBOSE_TRACING 0x0080 | ||
1244 | #define VERBOSE_ABORT 0x0f00 | ||
1245 | #define VERBOSE_ABORT_MID 0x0100 | ||
1246 | #define VERBOSE_ABORT_FIND 0x0200 | ||
1247 | #define VERBOSE_ABORT_PROCESS 0x0400 | ||
1248 | #define VERBOSE_ABORT_RETURN 0x0800 | ||
1249 | #define VERBOSE_RESET 0xf000 | ||
1250 | #define VERBOSE_RESET_MID 0x1000 | ||
1251 | #define VERBOSE_RESET_FIND 0x2000 | ||
1252 | #define VERBOSE_RESET_PROCESS 0x4000 | ||
1253 | #define VERBOSE_RESET_RETURN 0x8000 | ||
1254 | static int aic7xxx_verbose = VERBOSE_NORMAL | VERBOSE_NEGOTIATION | | ||
1255 | VERBOSE_PROBE; /* verbose messages */ | ||
1256 | |||
1257 | |||
1258 | /**************************************************************************** | ||
1259 | * | ||
1260 | * We're going to start putting in function declarations so that order of | ||
1261 | * functions is no longer important. As needed, they are added here. | ||
1262 | * | ||
1263 | ***************************************************************************/ | ||
1264 | |||
1265 | static int aic7xxx_release(struct Scsi_Host *host); | ||
1266 | static void aic7xxx_set_syncrate(struct aic7xxx_host *p, | ||
1267 | struct aic7xxx_syncrate *syncrate, int target, int channel, | ||
1268 | unsigned int period, unsigned int offset, unsigned char options, | ||
1269 | unsigned int type, struct aic_dev_data *aic_dev); | ||
1270 | static void aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel, | ||
1271 | int lun, unsigned int width, unsigned int type, | ||
1272 | struct aic_dev_data *aic_dev); | ||
1273 | static void aic7xxx_panic_abort(struct aic7xxx_host *p, struct scsi_cmnd *cmd); | ||
1274 | static void aic7xxx_print_card(struct aic7xxx_host *p); | ||
1275 | static void aic7xxx_print_scratch_ram(struct aic7xxx_host *p); | ||
1276 | static void aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded); | ||
1277 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
1278 | static void aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer); | ||
1279 | #endif | ||
1280 | |||
1281 | /**************************************************************************** | ||
1282 | * | ||
1283 | * These functions are now used. They happen to be wrapped in useless | ||
1284 | * inb/outb port read/writes around the real reads and writes because it | ||
1285 | * seems that certain very fast CPUs have a problem dealing with us when | ||
1286 | * going at full speed. | ||
1287 | * | ||
1288 | ***************************************************************************/ | ||
1289 | |||
1290 | static unsigned char | ||
1291 | aic_inb(struct aic7xxx_host *p, long port) | ||
1292 | { | ||
1293 | #ifdef MMAPIO | ||
1294 | unsigned char x; | ||
1295 | if(p->maddr) | ||
1296 | { | ||
1297 | x = readb(p->maddr + port); | ||
1298 | } | ||
1299 | else | ||
1300 | { | ||
1301 | x = inb(p->base + port); | ||
1302 | } | ||
1303 | return(x); | ||
1304 | #else | ||
1305 | return(inb(p->base + port)); | ||
1306 | #endif | ||
1307 | } | ||
1308 | |||
1309 | static void | ||
1310 | aic_outb(struct aic7xxx_host *p, unsigned char val, long port) | ||
1311 | { | ||
1312 | #ifdef MMAPIO | ||
1313 | if(p->maddr) | ||
1314 | { | ||
1315 | writeb(val, p->maddr + port); | ||
1316 | mb(); /* locked operation in order to force CPU ordering */ | ||
1317 | readb(p->maddr + HCNTRL); /* dummy read to flush the PCI write */ | ||
1318 | } | ||
1319 | else | ||
1320 | { | ||
1321 | outb(val, p->base + port); | ||
1322 | mb(); /* locked operation in order to force CPU ordering */ | ||
1323 | } | ||
1324 | #else | ||
1325 | outb(val, p->base + port); | ||
1326 | mb(); /* locked operation in order to force CPU ordering */ | ||
1327 | #endif | ||
1328 | } | ||
1329 | |||
1330 | /*+F************************************************************************* | ||
1331 | * Function: | ||
1332 | * aic7xxx_setup | ||
1333 | * | ||
1334 | * Description: | ||
1335 | * Handle Linux boot parameters. This routine allows for assigning a value | ||
1336 | * to a parameter with a ':' between the parameter and the value. | ||
1337 | * ie. aic7xxx=unpause:0x0A,extended | ||
1338 | *-F*************************************************************************/ | ||
1339 | static int | ||
1340 | aic7xxx_setup(char *s) | ||
1341 | { | ||
1342 | int i, n; | ||
1343 | char *p; | ||
1344 | char *end; | ||
1345 | |||
1346 | static struct { | ||
1347 | const char *name; | ||
1348 | unsigned int *flag; | ||
1349 | } options[] = { | ||
1350 | { "extended", &aic7xxx_extended }, | ||
1351 | { "no_reset", &aic7xxx_no_reset }, | ||
1352 | { "irq_trigger", &aic7xxx_irq_trigger }, | ||
1353 | { "verbose", &aic7xxx_verbose }, | ||
1354 | { "reverse_scan",&aic7xxx_reverse_scan }, | ||
1355 | { "override_term", &aic7xxx_override_term }, | ||
1356 | { "stpwlev", &aic7xxx_stpwlev }, | ||
1357 | { "no_probe", &aic7xxx_no_probe }, | ||
1358 | { "panic_on_abort", &aic7xxx_panic_on_abort }, | ||
1359 | { "pci_parity", &aic7xxx_pci_parity }, | ||
1360 | { "dump_card", &aic7xxx_dump_card }, | ||
1361 | { "dump_sequencer", &aic7xxx_dump_sequencer }, | ||
1362 | { "default_queue_depth", &aic7xxx_default_queue_depth }, | ||
1363 | { "scbram", &aic7xxx_scbram }, | ||
1364 | { "seltime", &aic7xxx_seltime }, | ||
1365 | { "tag_info", NULL } | ||
1366 | }; | ||
1367 | |||
1368 | end = strchr(s, '\0'); | ||
1369 | |||
1370 | while ((p = strsep(&s, ",.")) != NULL) | ||
1371 | { | ||
1372 | for (i = 0; i < ARRAY_SIZE(options); i++) | ||
1373 | { | ||
1374 | n = strlen(options[i].name); | ||
1375 | if (!strncmp(options[i].name, p, n)) | ||
1376 | { | ||
1377 | if (!strncmp(p, "tag_info", n)) | ||
1378 | { | ||
1379 | if (p[n] == ':') | ||
1380 | { | ||
1381 | char *base; | ||
1382 | char *tok, *tok_end, *tok_end2; | ||
1383 | char tok_list[] = { '.', ',', '{', '}', '\0' }; | ||
1384 | int i, instance = -1, device = -1; | ||
1385 | unsigned char done = FALSE; | ||
1386 | |||
1387 | base = p; | ||
1388 | tok = base + n + 1; /* Forward us just past the ':' */ | ||
1389 | tok_end = strchr(tok, '\0'); | ||
1390 | if (tok_end < end) | ||
1391 | *tok_end = ','; | ||
1392 | while(!done) | ||
1393 | { | ||
1394 | switch(*tok) | ||
1395 | { | ||
1396 | case '{': | ||
1397 | if (instance == -1) | ||
1398 | instance = 0; | ||
1399 | else if (device == -1) | ||
1400 | device = 0; | ||
1401 | tok++; | ||
1402 | break; | ||
1403 | case '}': | ||
1404 | if (device != -1) | ||
1405 | device = -1; | ||
1406 | else if (instance != -1) | ||
1407 | instance = -1; | ||
1408 | tok++; | ||
1409 | break; | ||
1410 | case ',': | ||
1411 | case '.': | ||
1412 | if (instance == -1) | ||
1413 | done = TRUE; | ||
1414 | else if (device >= 0) | ||
1415 | device++; | ||
1416 | else if (instance >= 0) | ||
1417 | instance++; | ||
1418 | if ( (device >= MAX_TARGETS) || | ||
1419 | (instance >= ARRAY_SIZE(aic7xxx_tag_info)) ) | ||
1420 | done = TRUE; | ||
1421 | tok++; | ||
1422 | if (!done) | ||
1423 | { | ||
1424 | base = tok; | ||
1425 | } | ||
1426 | break; | ||
1427 | case '\0': | ||
1428 | done = TRUE; | ||
1429 | break; | ||
1430 | default: | ||
1431 | done = TRUE; | ||
1432 | tok_end = strchr(tok, '\0'); | ||
1433 | for(i=0; tok_list[i]; i++) | ||
1434 | { | ||
1435 | tok_end2 = strchr(tok, tok_list[i]); | ||
1436 | if ( (tok_end2) && (tok_end2 < tok_end) ) | ||
1437 | { | ||
1438 | tok_end = tok_end2; | ||
1439 | done = FALSE; | ||
1440 | } | ||
1441 | } | ||
1442 | if ( (instance >= 0) && (device >= 0) && | ||
1443 | (instance < ARRAY_SIZE(aic7xxx_tag_info)) && | ||
1444 | (device < MAX_TARGETS) ) | ||
1445 | aic7xxx_tag_info[instance].tag_commands[device] = | ||
1446 | simple_strtoul(tok, NULL, 0) & 0xff; | ||
1447 | tok = tok_end; | ||
1448 | break; | ||
1449 | } | ||
1450 | } | ||
1451 | while((p != base) && (p != NULL)) | ||
1452 | p = strsep(&s, ",."); | ||
1453 | } | ||
1454 | } | ||
1455 | else if (p[n] == ':') | ||
1456 | { | ||
1457 | *(options[i].flag) = simple_strtoul(p + n + 1, NULL, 0); | ||
1458 | if(!strncmp(p, "seltime", n)) | ||
1459 | { | ||
1460 | *(options[i].flag) = (*(options[i].flag) % 4) << 3; | ||
1461 | } | ||
1462 | } | ||
1463 | else if (!strncmp(p, "verbose", n)) | ||
1464 | { | ||
1465 | *(options[i].flag) = 0xff29; | ||
1466 | } | ||
1467 | else | ||
1468 | { | ||
1469 | *(options[i].flag) = ~(*(options[i].flag)); | ||
1470 | if(!strncmp(p, "seltime", n)) | ||
1471 | { | ||
1472 | *(options[i].flag) = (*(options[i].flag) % 4) << 3; | ||
1473 | } | ||
1474 | } | ||
1475 | } | ||
1476 | } | ||
1477 | } | ||
1478 | return 1; | ||
1479 | } | ||
1480 | |||
1481 | __setup("aic7xxx=", aic7xxx_setup); | ||
1482 | |||
1483 | /*+F************************************************************************* | ||
1484 | * Function: | ||
1485 | * pause_sequencer | ||
1486 | * | ||
1487 | * Description: | ||
1488 | * Pause the sequencer and wait for it to actually stop - this | ||
1489 | * is important since the sequencer can disable pausing for critical | ||
1490 | * sections. | ||
1491 | *-F*************************************************************************/ | ||
1492 | static void | ||
1493 | pause_sequencer(struct aic7xxx_host *p) | ||
1494 | { | ||
1495 | aic_outb(p, p->pause, HCNTRL); | ||
1496 | while ((aic_inb(p, HCNTRL) & PAUSE) == 0) | ||
1497 | { | ||
1498 | ; | ||
1499 | } | ||
1500 | if(p->features & AHC_ULTRA2) | ||
1501 | { | ||
1502 | aic_inb(p, CCSCBCTL); | ||
1503 | } | ||
1504 | } | ||
1505 | |||
1506 | /*+F************************************************************************* | ||
1507 | * Function: | ||
1508 | * unpause_sequencer | ||
1509 | * | ||
1510 | * Description: | ||
1511 | * Unpause the sequencer. Unremarkable, yet done often enough to | ||
1512 | * warrant an easy way to do it. | ||
1513 | *-F*************************************************************************/ | ||
1514 | static void | ||
1515 | unpause_sequencer(struct aic7xxx_host *p, int unpause_always) | ||
1516 | { | ||
1517 | if (unpause_always || | ||
1518 | ( !(aic_inb(p, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) && | ||
1519 | !(p->flags & AHC_HANDLING_REQINITS) ) ) | ||
1520 | { | ||
1521 | aic_outb(p, p->unpause, HCNTRL); | ||
1522 | } | ||
1523 | } | ||
1524 | |||
1525 | /*+F************************************************************************* | ||
1526 | * Function: | ||
1527 | * restart_sequencer | ||
1528 | * | ||
1529 | * Description: | ||
1530 | * Restart the sequencer program from address zero. This assumes | ||
1531 | * that the sequencer is already paused. | ||
1532 | *-F*************************************************************************/ | ||
1533 | static void | ||
1534 | restart_sequencer(struct aic7xxx_host *p) | ||
1535 | { | ||
1536 | aic_outb(p, 0, SEQADDR0); | ||
1537 | aic_outb(p, 0, SEQADDR1); | ||
1538 | aic_outb(p, FASTMODE, SEQCTL); | ||
1539 | } | ||
1540 | |||
1541 | /* | ||
1542 | * We include the aic7xxx_seq.c file here so that the other defines have | ||
1543 | * already been made, and so that it comes before the code that actually | ||
1544 | * downloads the instructions (since we don't typically use function | ||
1545 | * prototype, our code has to be ordered that way, it's a left-over from | ||
1546 | * the original driver days.....I should fix it some time DL). | ||
1547 | */ | ||
1548 | #include "aic7xxx_old/aic7xxx_seq.c" | ||
1549 | |||
1550 | /*+F************************************************************************* | ||
1551 | * Function: | ||
1552 | * aic7xxx_check_patch | ||
1553 | * | ||
1554 | * Description: | ||
1555 | * See if the next patch to download should be downloaded. | ||
1556 | *-F*************************************************************************/ | ||
1557 | static int | ||
1558 | aic7xxx_check_patch(struct aic7xxx_host *p, | ||
1559 | struct sequencer_patch **start_patch, int start_instr, int *skip_addr) | ||
1560 | { | ||
1561 | struct sequencer_patch *cur_patch; | ||
1562 | struct sequencer_patch *last_patch; | ||
1563 | int num_patches; | ||
1564 | |||
1565 | num_patches = ARRAY_SIZE(sequencer_patches); | ||
1566 | last_patch = &sequencer_patches[num_patches]; | ||
1567 | cur_patch = *start_patch; | ||
1568 | |||
1569 | while ((cur_patch < last_patch) && (start_instr == cur_patch->begin)) | ||
1570 | { | ||
1571 | if (cur_patch->patch_func(p) == 0) | ||
1572 | { | ||
1573 | /* | ||
1574 | * Start rejecting code. | ||
1575 | */ | ||
1576 | *skip_addr = start_instr + cur_patch->skip_instr; | ||
1577 | cur_patch += cur_patch->skip_patch; | ||
1578 | } | ||
1579 | else | ||
1580 | { | ||
1581 | /* | ||
1582 | * Found an OK patch. Advance the patch pointer to the next patch | ||
1583 | * and wait for our instruction pointer to get here. | ||
1584 | */ | ||
1585 | cur_patch++; | ||
1586 | } | ||
1587 | } | ||
1588 | |||
1589 | *start_patch = cur_patch; | ||
1590 | if (start_instr < *skip_addr) | ||
1591 | /* | ||
1592 | * Still skipping | ||
1593 | */ | ||
1594 | return (0); | ||
1595 | return(1); | ||
1596 | } | ||
1597 | |||
1598 | |||
1599 | /*+F************************************************************************* | ||
1600 | * Function: | ||
1601 | * aic7xxx_download_instr | ||
1602 | * | ||
1603 | * Description: | ||
1604 | * Find the next patch to download. | ||
1605 | *-F*************************************************************************/ | ||
1606 | static void | ||
1607 | aic7xxx_download_instr(struct aic7xxx_host *p, int instrptr, | ||
1608 | unsigned char *dconsts) | ||
1609 | { | ||
1610 | union ins_formats instr; | ||
1611 | struct ins_format1 *fmt1_ins; | ||
1612 | struct ins_format3 *fmt3_ins; | ||
1613 | unsigned char opcode; | ||
1614 | |||
1615 | instr = *(union ins_formats*) &seqprog[instrptr * 4]; | ||
1616 | |||
1617 | instr.integer = le32_to_cpu(instr.integer); | ||
1618 | |||
1619 | fmt1_ins = &instr.format1; | ||
1620 | fmt3_ins = NULL; | ||
1621 | |||
1622 | /* Pull the opcode */ | ||
1623 | opcode = instr.format1.opcode; | ||
1624 | switch (opcode) | ||
1625 | { | ||
1626 | case AIC_OP_JMP: | ||
1627 | case AIC_OP_JC: | ||
1628 | case AIC_OP_JNC: | ||
1629 | case AIC_OP_CALL: | ||
1630 | case AIC_OP_JNE: | ||
1631 | case AIC_OP_JNZ: | ||
1632 | case AIC_OP_JE: | ||
1633 | case AIC_OP_JZ: | ||
1634 | { | ||
1635 | struct sequencer_patch *cur_patch; | ||
1636 | int address_offset; | ||
1637 | unsigned int address; | ||
1638 | int skip_addr; | ||
1639 | int i; | ||
1640 | |||
1641 | fmt3_ins = &instr.format3; | ||
1642 | address_offset = 0; | ||
1643 | address = fmt3_ins->address; | ||
1644 | cur_patch = sequencer_patches; | ||
1645 | skip_addr = 0; | ||
1646 | |||
1647 | for (i = 0; i < address;) | ||
1648 | { | ||
1649 | aic7xxx_check_patch(p, &cur_patch, i, &skip_addr); | ||
1650 | if (skip_addr > i) | ||
1651 | { | ||
1652 | int end_addr; | ||
1653 | |||
1654 | end_addr = min_t(int, address, skip_addr); | ||
1655 | address_offset += end_addr - i; | ||
1656 | i = skip_addr; | ||
1657 | } | ||
1658 | else | ||
1659 | { | ||
1660 | i++; | ||
1661 | } | ||
1662 | } | ||
1663 | address -= address_offset; | ||
1664 | fmt3_ins->address = address; | ||
1665 | /* Fall Through to the next code section */ | ||
1666 | } | ||
1667 | case AIC_OP_OR: | ||
1668 | case AIC_OP_AND: | ||
1669 | case AIC_OP_XOR: | ||
1670 | case AIC_OP_ADD: | ||
1671 | case AIC_OP_ADC: | ||
1672 | case AIC_OP_BMOV: | ||
1673 | if (fmt1_ins->parity != 0) | ||
1674 | { | ||
1675 | fmt1_ins->immediate = dconsts[fmt1_ins->immediate]; | ||
1676 | } | ||
1677 | fmt1_ins->parity = 0; | ||
1678 | /* Fall Through to the next code section */ | ||
1679 | case AIC_OP_ROL: | ||
1680 | if ((p->features & AHC_ULTRA2) != 0) | ||
1681 | { | ||
1682 | int i, count; | ||
1683 | |||
1684 | /* Calculate odd parity for the instruction */ | ||
1685 | for ( i=0, count=0; i < 31; i++) | ||
1686 | { | ||
1687 | unsigned int mask; | ||
1688 | |||
1689 | mask = 0x01 << i; | ||
1690 | if ((instr.integer & mask) != 0) | ||
1691 | count++; | ||
1692 | } | ||
1693 | if (!(count & 0x01)) | ||
1694 | instr.format1.parity = 1; | ||
1695 | } | ||
1696 | else | ||
1697 | { | ||
1698 | if (fmt3_ins != NULL) | ||
1699 | { | ||
1700 | instr.integer = fmt3_ins->immediate | | ||
1701 | (fmt3_ins->source << 8) | | ||
1702 | (fmt3_ins->address << 16) | | ||
1703 | (fmt3_ins->opcode << 25); | ||
1704 | } | ||
1705 | else | ||
1706 | { | ||
1707 | instr.integer = fmt1_ins->immediate | | ||
1708 | (fmt1_ins->source << 8) | | ||
1709 | (fmt1_ins->destination << 16) | | ||
1710 | (fmt1_ins->ret << 24) | | ||
1711 | (fmt1_ins->opcode << 25); | ||
1712 | } | ||
1713 | } | ||
1714 | aic_outb(p, (instr.integer & 0xff), SEQRAM); | ||
1715 | aic_outb(p, ((instr.integer >> 8) & 0xff), SEQRAM); | ||
1716 | aic_outb(p, ((instr.integer >> 16) & 0xff), SEQRAM); | ||
1717 | aic_outb(p, ((instr.integer >> 24) & 0xff), SEQRAM); | ||
1718 | udelay(10); | ||
1719 | break; | ||
1720 | |||
1721 | default: | ||
1722 | panic("aic7xxx: Unknown opcode encountered in sequencer program."); | ||
1723 | break; | ||
1724 | } | ||
1725 | } | ||
1726 | |||
1727 | |||
1728 | /*+F************************************************************************* | ||
1729 | * Function: | ||
1730 | * aic7xxx_loadseq | ||
1731 | * | ||
1732 | * Description: | ||
1733 | * Load the sequencer code into the controller memory. | ||
1734 | *-F*************************************************************************/ | ||
1735 | static void | ||
1736 | aic7xxx_loadseq(struct aic7xxx_host *p) | ||
1737 | { | ||
1738 | struct sequencer_patch *cur_patch; | ||
1739 | int i; | ||
1740 | int downloaded; | ||
1741 | int skip_addr; | ||
1742 | unsigned char download_consts[4] = {0, 0, 0, 0}; | ||
1743 | |||
1744 | if (aic7xxx_verbose & VERBOSE_PROBE) | ||
1745 | { | ||
1746 | printk(KERN_INFO "(scsi%d) Downloading sequencer code...", p->host_no); | ||
1747 | } | ||
1748 | #if 0 | ||
1749 | download_consts[TMODE_NUMCMDS] = p->num_targetcmds; | ||
1750 | #endif | ||
1751 | download_consts[TMODE_NUMCMDS] = 0; | ||
1752 | cur_patch = &sequencer_patches[0]; | ||
1753 | downloaded = 0; | ||
1754 | skip_addr = 0; | ||
1755 | |||
1756 | aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL); | ||
1757 | aic_outb(p, 0, SEQADDR0); | ||
1758 | aic_outb(p, 0, SEQADDR1); | ||
1759 | |||
1760 | for (i = 0; i < sizeof(seqprog) / 4; i++) | ||
1761 | { | ||
1762 | if (aic7xxx_check_patch(p, &cur_patch, i, &skip_addr) == 0) | ||
1763 | { | ||
1764 | /* Skip this instruction for this configuration. */ | ||
1765 | continue; | ||
1766 | } | ||
1767 | aic7xxx_download_instr(p, i, &download_consts[0]); | ||
1768 | downloaded++; | ||
1769 | } | ||
1770 | |||
1771 | aic_outb(p, 0, SEQADDR0); | ||
1772 | aic_outb(p, 0, SEQADDR1); | ||
1773 | aic_outb(p, FASTMODE | FAILDIS, SEQCTL); | ||
1774 | unpause_sequencer(p, TRUE); | ||
1775 | mdelay(1); | ||
1776 | pause_sequencer(p); | ||
1777 | aic_outb(p, FASTMODE, SEQCTL); | ||
1778 | if (aic7xxx_verbose & VERBOSE_PROBE) | ||
1779 | { | ||
1780 | printk(" %d instructions downloaded\n", downloaded); | ||
1781 | } | ||
1782 | if (aic7xxx_dump_sequencer) | ||
1783 | aic7xxx_print_sequencer(p, downloaded); | ||
1784 | } | ||
1785 | |||
1786 | /*+F************************************************************************* | ||
1787 | * Function: | ||
1788 | * aic7xxx_print_sequencer | ||
1789 | * | ||
1790 | * Description: | ||
1791 | * Print the contents of the sequencer memory to the screen. | ||
1792 | *-F*************************************************************************/ | ||
1793 | static void | ||
1794 | aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded) | ||
1795 | { | ||
1796 | int i, k, temp; | ||
1797 | |||
1798 | aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL); | ||
1799 | aic_outb(p, 0, SEQADDR0); | ||
1800 | aic_outb(p, 0, SEQADDR1); | ||
1801 | |||
1802 | k = 0; | ||
1803 | for (i=0; i < downloaded; i++) | ||
1804 | { | ||
1805 | if ( k == 0 ) | ||
1806 | printk("%03x: ", i); | ||
1807 | temp = aic_inb(p, SEQRAM); | ||
1808 | temp |= (aic_inb(p, SEQRAM) << 8); | ||
1809 | temp |= (aic_inb(p, SEQRAM) << 16); | ||
1810 | temp |= (aic_inb(p, SEQRAM) << 24); | ||
1811 | printk("%08x", temp); | ||
1812 | if ( ++k == 8 ) | ||
1813 | { | ||
1814 | printk("\n"); | ||
1815 | k = 0; | ||
1816 | } | ||
1817 | else | ||
1818 | printk(" "); | ||
1819 | } | ||
1820 | aic_outb(p, 0, SEQADDR0); | ||
1821 | aic_outb(p, 0, SEQADDR1); | ||
1822 | aic_outb(p, FASTMODE | FAILDIS, SEQCTL); | ||
1823 | unpause_sequencer(p, TRUE); | ||
1824 | mdelay(1); | ||
1825 | pause_sequencer(p); | ||
1826 | aic_outb(p, FASTMODE, SEQCTL); | ||
1827 | printk("\n"); | ||
1828 | } | ||
1829 | |||
1830 | /*+F************************************************************************* | ||
1831 | * Function: | ||
1832 | * aic7xxx_info | ||
1833 | * | ||
1834 | * Description: | ||
1835 | * Return a string describing the driver. | ||
1836 | *-F*************************************************************************/ | ||
1837 | static const char * | ||
1838 | aic7xxx_info(struct Scsi_Host *dooh) | ||
1839 | { | ||
1840 | static char buffer[256]; | ||
1841 | char *bp; | ||
1842 | struct aic7xxx_host *p; | ||
1843 | |||
1844 | bp = &buffer[0]; | ||
1845 | p = (struct aic7xxx_host *)dooh->hostdata; | ||
1846 | memset(bp, 0, sizeof(buffer)); | ||
1847 | strcpy(bp, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) "); | ||
1848 | strcat(bp, AIC7XXX_C_VERSION); | ||
1849 | strcat(bp, "/"); | ||
1850 | strcat(bp, AIC7XXX_H_VERSION); | ||
1851 | strcat(bp, "\n"); | ||
1852 | strcat(bp, " <"); | ||
1853 | strcat(bp, board_names[p->board_name_index]); | ||
1854 | strcat(bp, ">"); | ||
1855 | |||
1856 | return(bp); | ||
1857 | } | ||
1858 | |||
1859 | /*+F************************************************************************* | ||
1860 | * Function: | ||
1861 | * aic7xxx_find_syncrate | ||
1862 | * | ||
1863 | * Description: | ||
1864 | * Look up the valid period to SCSIRATE conversion in our table | ||
1865 | *-F*************************************************************************/ | ||
1866 | static struct aic7xxx_syncrate * | ||
1867 | aic7xxx_find_syncrate(struct aic7xxx_host *p, unsigned int *period, | ||
1868 | unsigned int maxsync, unsigned char *options) | ||
1869 | { | ||
1870 | struct aic7xxx_syncrate *syncrate; | ||
1871 | int done = FALSE; | ||
1872 | |||
1873 | switch(*options) | ||
1874 | { | ||
1875 | case MSG_EXT_PPR_OPTION_DT_CRC: | ||
1876 | case MSG_EXT_PPR_OPTION_DT_UNITS: | ||
1877 | if(!(p->features & AHC_ULTRA3)) | ||
1878 | { | ||
1879 | *options = 0; | ||
1880 | maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2); | ||
1881 | } | ||
1882 | break; | ||
1883 | case MSG_EXT_PPR_OPTION_DT_CRC_QUICK: | ||
1884 | case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK: | ||
1885 | if(!(p->features & AHC_ULTRA3)) | ||
1886 | { | ||
1887 | *options = 0; | ||
1888 | maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2); | ||
1889 | } | ||
1890 | else | ||
1891 | { | ||
1892 | /* | ||
1893 | * we don't support the Quick Arbitration variants of dual edge | ||
1894 | * clocking. As it turns out, we want to send back the | ||
1895 | * same basic option, but without the QA attribute. | ||
1896 | * We know that we are responding because we would never set | ||
1897 | * these options ourself, we would only respond to them. | ||
1898 | */ | ||
1899 | switch(*options) | ||
1900 | { | ||
1901 | case MSG_EXT_PPR_OPTION_DT_CRC_QUICK: | ||
1902 | *options = MSG_EXT_PPR_OPTION_DT_CRC; | ||
1903 | break; | ||
1904 | case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK: | ||
1905 | *options = MSG_EXT_PPR_OPTION_DT_UNITS; | ||
1906 | break; | ||
1907 | } | ||
1908 | } | ||
1909 | break; | ||
1910 | default: | ||
1911 | *options = 0; | ||
1912 | maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2); | ||
1913 | break; | ||
1914 | } | ||
1915 | syncrate = &aic7xxx_syncrates[maxsync]; | ||
1916 | while ( (syncrate->rate[0] != NULL) && | ||
1917 | (!(p->features & AHC_ULTRA2) || syncrate->sxfr_ultra2) ) | ||
1918 | { | ||
1919 | if (*period <= syncrate->period) | ||
1920 | { | ||
1921 | switch(*options) | ||
1922 | { | ||
1923 | case MSG_EXT_PPR_OPTION_DT_CRC: | ||
1924 | case MSG_EXT_PPR_OPTION_DT_UNITS: | ||
1925 | if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC)) | ||
1926 | { | ||
1927 | done = TRUE; | ||
1928 | /* | ||
1929 | * oops, we went too low for the CRC/DualEdge signalling, so | ||
1930 | * clear the options byte | ||
1931 | */ | ||
1932 | *options = 0; | ||
1933 | /* | ||
1934 | * We'll be sending a reply to this packet to set the options | ||
1935 | * properly, so unilaterally set the period as well. | ||
1936 | */ | ||
1937 | *period = syncrate->period; | ||
1938 | } | ||
1939 | else | ||
1940 | { | ||
1941 | done = TRUE; | ||
1942 | if(syncrate == &aic7xxx_syncrates[maxsync]) | ||
1943 | { | ||
1944 | *period = syncrate->period; | ||
1945 | } | ||
1946 | } | ||
1947 | break; | ||
1948 | default: | ||
1949 | if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC)) | ||
1950 | { | ||
1951 | done = TRUE; | ||
1952 | if(syncrate == &aic7xxx_syncrates[maxsync]) | ||
1953 | { | ||
1954 | *period = syncrate->period; | ||
1955 | } | ||
1956 | } | ||
1957 | break; | ||
1958 | } | ||
1959 | if(done) | ||
1960 | { | ||
1961 | break; | ||
1962 | } | ||
1963 | } | ||
1964 | syncrate++; | ||
1965 | } | ||
1966 | if ( (*period == 0) || (syncrate->rate[0] == NULL) || | ||
1967 | ((p->features & AHC_ULTRA2) && (syncrate->sxfr_ultra2 == 0)) ) | ||
1968 | { | ||
1969 | /* | ||
1970 | * Use async transfers for this target | ||
1971 | */ | ||
1972 | *options = 0; | ||
1973 | *period = 255; | ||
1974 | syncrate = NULL; | ||
1975 | } | ||
1976 | return (syncrate); | ||
1977 | } | ||
1978 | |||
1979 | |||
1980 | /*+F************************************************************************* | ||
1981 | * Function: | ||
1982 | * aic7xxx_find_period | ||
1983 | * | ||
1984 | * Description: | ||
1985 | * Look up the valid SCSIRATE to period conversion in our table | ||
1986 | *-F*************************************************************************/ | ||
1987 | static unsigned int | ||
1988 | aic7xxx_find_period(struct aic7xxx_host *p, unsigned int scsirate, | ||
1989 | unsigned int maxsync) | ||
1990 | { | ||
1991 | struct aic7xxx_syncrate *syncrate; | ||
1992 | |||
1993 | if (p->features & AHC_ULTRA2) | ||
1994 | { | ||
1995 | scsirate &= SXFR_ULTRA2; | ||
1996 | } | ||
1997 | else | ||
1998 | { | ||
1999 | scsirate &= SXFR; | ||
2000 | } | ||
2001 | |||
2002 | syncrate = &aic7xxx_syncrates[maxsync]; | ||
2003 | while (syncrate->rate[0] != NULL) | ||
2004 | { | ||
2005 | if (p->features & AHC_ULTRA2) | ||
2006 | { | ||
2007 | if (syncrate->sxfr_ultra2 == 0) | ||
2008 | break; | ||
2009 | else if (scsirate == syncrate->sxfr_ultra2) | ||
2010 | return (syncrate->period); | ||
2011 | else if (scsirate == (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC)) | ||
2012 | return (syncrate->period); | ||
2013 | } | ||
2014 | else if (scsirate == (syncrate->sxfr & ~ULTRA_SXFR)) | ||
2015 | { | ||
2016 | return (syncrate->period); | ||
2017 | } | ||
2018 | syncrate++; | ||
2019 | } | ||
2020 | return (0); /* async */ | ||
2021 | } | ||
2022 | |||
2023 | /*+F************************************************************************* | ||
2024 | * Function: | ||
2025 | * aic7xxx_validate_offset | ||
2026 | * | ||
2027 | * Description: | ||
2028 | * Set a valid offset value for a particular card in use and transfer | ||
2029 | * settings in use. | ||
2030 | *-F*************************************************************************/ | ||
2031 | static void | ||
2032 | aic7xxx_validate_offset(struct aic7xxx_host *p, | ||
2033 | struct aic7xxx_syncrate *syncrate, unsigned int *offset, int wide) | ||
2034 | { | ||
2035 | unsigned int maxoffset; | ||
2036 | |||
2037 | /* Limit offset to what the card (and device) can do */ | ||
2038 | if (syncrate == NULL) | ||
2039 | { | ||
2040 | maxoffset = 0; | ||
2041 | } | ||
2042 | else if (p->features & AHC_ULTRA2) | ||
2043 | { | ||
2044 | maxoffset = MAX_OFFSET_ULTRA2; | ||
2045 | } | ||
2046 | else | ||
2047 | { | ||
2048 | if (wide) | ||
2049 | maxoffset = MAX_OFFSET_16BIT; | ||
2050 | else | ||
2051 | maxoffset = MAX_OFFSET_8BIT; | ||
2052 | } | ||
2053 | *offset = min(*offset, maxoffset); | ||
2054 | } | ||
2055 | |||
2056 | /*+F************************************************************************* | ||
2057 | * Function: | ||
2058 | * aic7xxx_set_syncrate | ||
2059 | * | ||
2060 | * Description: | ||
2061 | * Set the actual syncrate down in the card and in our host structs | ||
2062 | *-F*************************************************************************/ | ||
2063 | static void | ||
2064 | aic7xxx_set_syncrate(struct aic7xxx_host *p, struct aic7xxx_syncrate *syncrate, | ||
2065 | int target, int channel, unsigned int period, unsigned int offset, | ||
2066 | unsigned char options, unsigned int type, struct aic_dev_data *aic_dev) | ||
2067 | { | ||
2068 | unsigned char tindex; | ||
2069 | unsigned short target_mask; | ||
2070 | unsigned char lun, old_options; | ||
2071 | unsigned int old_period, old_offset; | ||
2072 | |||
2073 | tindex = target | (channel << 3); | ||
2074 | target_mask = 0x01 << tindex; | ||
2075 | lun = aic_inb(p, SCB_TCL) & 0x07; | ||
2076 | |||
2077 | if (syncrate == NULL) | ||
2078 | { | ||
2079 | period = 0; | ||
2080 | offset = 0; | ||
2081 | } | ||
2082 | |||
2083 | old_period = aic_dev->cur.period; | ||
2084 | old_offset = aic_dev->cur.offset; | ||
2085 | old_options = aic_dev->cur.options; | ||
2086 | |||
2087 | |||
2088 | if (type & AHC_TRANS_CUR) | ||
2089 | { | ||
2090 | unsigned int scsirate; | ||
2091 | |||
2092 | scsirate = aic_inb(p, TARG_SCSIRATE + tindex); | ||
2093 | if (p->features & AHC_ULTRA2) | ||
2094 | { | ||
2095 | scsirate &= ~SXFR_ULTRA2; | ||
2096 | if (syncrate != NULL) | ||
2097 | { | ||
2098 | switch(options) | ||
2099 | { | ||
2100 | case MSG_EXT_PPR_OPTION_DT_UNITS: | ||
2101 | /* | ||
2102 | * mask off the CRC bit in the xfer settings | ||
2103 | */ | ||
2104 | scsirate |= (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC); | ||
2105 | break; | ||
2106 | default: | ||
2107 | scsirate |= syncrate->sxfr_ultra2; | ||
2108 | break; | ||
2109 | } | ||
2110 | } | ||
2111 | if (type & AHC_TRANS_ACTIVE) | ||
2112 | { | ||
2113 | aic_outb(p, offset, SCSIOFFSET); | ||
2114 | } | ||
2115 | aic_outb(p, offset, TARG_OFFSET + tindex); | ||
2116 | } | ||
2117 | else /* Not an Ultra2 controller */ | ||
2118 | { | ||
2119 | scsirate &= ~(SXFR|SOFS); | ||
2120 | p->ultraenb &= ~target_mask; | ||
2121 | if (syncrate != NULL) | ||
2122 | { | ||
2123 | if (syncrate->sxfr & ULTRA_SXFR) | ||
2124 | { | ||
2125 | p->ultraenb |= target_mask; | ||
2126 | } | ||
2127 | scsirate |= (syncrate->sxfr & SXFR); | ||
2128 | scsirate |= (offset & SOFS); | ||
2129 | } | ||
2130 | if (type & AHC_TRANS_ACTIVE) | ||
2131 | { | ||
2132 | unsigned char sxfrctl0; | ||
2133 | |||
2134 | sxfrctl0 = aic_inb(p, SXFRCTL0); | ||
2135 | sxfrctl0 &= ~FAST20; | ||
2136 | if (p->ultraenb & target_mask) | ||
2137 | sxfrctl0 |= FAST20; | ||
2138 | aic_outb(p, sxfrctl0, SXFRCTL0); | ||
2139 | } | ||
2140 | aic_outb(p, p->ultraenb & 0xff, ULTRA_ENB); | ||
2141 | aic_outb(p, (p->ultraenb >> 8) & 0xff, ULTRA_ENB + 1 ); | ||
2142 | } | ||
2143 | if (type & AHC_TRANS_ACTIVE) | ||
2144 | { | ||
2145 | aic_outb(p, scsirate, SCSIRATE); | ||
2146 | } | ||
2147 | aic_outb(p, scsirate, TARG_SCSIRATE + tindex); | ||
2148 | aic_dev->cur.period = period; | ||
2149 | aic_dev->cur.offset = offset; | ||
2150 | aic_dev->cur.options = options; | ||
2151 | if ( !(type & AHC_TRANS_QUITE) && | ||
2152 | (aic7xxx_verbose & VERBOSE_NEGOTIATION) && | ||
2153 | (aic_dev->flags & DEVICE_PRINT_DTR) ) | ||
2154 | { | ||
2155 | if (offset) | ||
2156 | { | ||
2157 | int rate_mod = (scsirate & WIDEXFER) ? 1 : 0; | ||
2158 | |||
2159 | printk(INFO_LEAD "Synchronous at %s Mbyte/sec, " | ||
2160 | "offset %d.\n", p->host_no, channel, target, lun, | ||
2161 | syncrate->rate[rate_mod], offset); | ||
2162 | } | ||
2163 | else | ||
2164 | { | ||
2165 | printk(INFO_LEAD "Using asynchronous transfers.\n", | ||
2166 | p->host_no, channel, target, lun); | ||
2167 | } | ||
2168 | aic_dev->flags &= ~DEVICE_PRINT_DTR; | ||
2169 | } | ||
2170 | } | ||
2171 | |||
2172 | if (type & AHC_TRANS_GOAL) | ||
2173 | { | ||
2174 | aic_dev->goal.period = period; | ||
2175 | aic_dev->goal.offset = offset; | ||
2176 | aic_dev->goal.options = options; | ||
2177 | } | ||
2178 | |||
2179 | if (type & AHC_TRANS_USER) | ||
2180 | { | ||
2181 | p->user[tindex].period = period; | ||
2182 | p->user[tindex].offset = offset; | ||
2183 | p->user[tindex].options = options; | ||
2184 | } | ||
2185 | } | ||
2186 | |||
2187 | /*+F************************************************************************* | ||
2188 | * Function: | ||
2189 | * aic7xxx_set_width | ||
2190 | * | ||
2191 | * Description: | ||
2192 | * Set the actual width down in the card and in our host structs | ||
2193 | *-F*************************************************************************/ | ||
2194 | static void | ||
2195 | aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel, int lun, | ||
2196 | unsigned int width, unsigned int type, struct aic_dev_data *aic_dev) | ||
2197 | { | ||
2198 | unsigned char tindex; | ||
2199 | unsigned short target_mask; | ||
2200 | unsigned int old_width; | ||
2201 | |||
2202 | tindex = target | (channel << 3); | ||
2203 | target_mask = 1 << tindex; | ||
2204 | |||
2205 | old_width = aic_dev->cur.width; | ||
2206 | |||
2207 | if (type & AHC_TRANS_CUR) | ||
2208 | { | ||
2209 | unsigned char scsirate; | ||
2210 | |||
2211 | scsirate = aic_inb(p, TARG_SCSIRATE + tindex); | ||
2212 | |||
2213 | scsirate &= ~WIDEXFER; | ||
2214 | if (width == MSG_EXT_WDTR_BUS_16_BIT) | ||
2215 | scsirate |= WIDEXFER; | ||
2216 | |||
2217 | aic_outb(p, scsirate, TARG_SCSIRATE + tindex); | ||
2218 | |||
2219 | if (type & AHC_TRANS_ACTIVE) | ||
2220 | aic_outb(p, scsirate, SCSIRATE); | ||
2221 | |||
2222 | aic_dev->cur.width = width; | ||
2223 | |||
2224 | if ( !(type & AHC_TRANS_QUITE) && | ||
2225 | (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && | ||
2226 | (aic_dev->flags & DEVICE_PRINT_DTR) ) | ||
2227 | { | ||
2228 | printk(INFO_LEAD "Using %s transfers\n", p->host_no, channel, target, | ||
2229 | lun, (scsirate & WIDEXFER) ? "Wide(16bit)" : "Narrow(8bit)" ); | ||
2230 | } | ||
2231 | } | ||
2232 | |||
2233 | if (type & AHC_TRANS_GOAL) | ||
2234 | aic_dev->goal.width = width; | ||
2235 | if (type & AHC_TRANS_USER) | ||
2236 | p->user[tindex].width = width; | ||
2237 | |||
2238 | if (aic_dev->goal.offset) | ||
2239 | { | ||
2240 | if (p->features & AHC_ULTRA2) | ||
2241 | { | ||
2242 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; | ||
2243 | } | ||
2244 | else if (width == MSG_EXT_WDTR_BUS_16_BIT) | ||
2245 | { | ||
2246 | aic_dev->goal.offset = MAX_OFFSET_16BIT; | ||
2247 | } | ||
2248 | else | ||
2249 | { | ||
2250 | aic_dev->goal.offset = MAX_OFFSET_8BIT; | ||
2251 | } | ||
2252 | } | ||
2253 | } | ||
2254 | |||
2255 | /*+F************************************************************************* | ||
2256 | * Function: | ||
2257 | * scbq_init | ||
2258 | * | ||
2259 | * Description: | ||
2260 | * SCB queue initialization. | ||
2261 | * | ||
2262 | *-F*************************************************************************/ | ||
2263 | static void | ||
2264 | scbq_init(volatile scb_queue_type *queue) | ||
2265 | { | ||
2266 | queue->head = NULL; | ||
2267 | queue->tail = NULL; | ||
2268 | } | ||
2269 | |||
2270 | /*+F************************************************************************* | ||
2271 | * Function: | ||
2272 | * scbq_insert_head | ||
2273 | * | ||
2274 | * Description: | ||
2275 | * Add an SCB to the head of the list. | ||
2276 | * | ||
2277 | *-F*************************************************************************/ | ||
2278 | static inline void | ||
2279 | scbq_insert_head(volatile scb_queue_type *queue, struct aic7xxx_scb *scb) | ||
2280 | { | ||
2281 | scb->q_next = queue->head; | ||
2282 | queue->head = scb; | ||
2283 | if (queue->tail == NULL) /* If list was empty, update tail. */ | ||
2284 | queue->tail = queue->head; | ||
2285 | } | ||
2286 | |||
2287 | /*+F************************************************************************* | ||
2288 | * Function: | ||
2289 | * scbq_remove_head | ||
2290 | * | ||
2291 | * Description: | ||
2292 | * Remove an SCB from the head of the list. | ||
2293 | * | ||
2294 | *-F*************************************************************************/ | ||
2295 | static inline struct aic7xxx_scb * | ||
2296 | scbq_remove_head(volatile scb_queue_type *queue) | ||
2297 | { | ||
2298 | struct aic7xxx_scb * scbp; | ||
2299 | |||
2300 | scbp = queue->head; | ||
2301 | if (queue->head != NULL) | ||
2302 | queue->head = queue->head->q_next; | ||
2303 | if (queue->head == NULL) /* If list is now empty, update tail. */ | ||
2304 | queue->tail = NULL; | ||
2305 | return(scbp); | ||
2306 | } | ||
2307 | |||
2308 | /*+F************************************************************************* | ||
2309 | * Function: | ||
2310 | * scbq_remove | ||
2311 | * | ||
2312 | * Description: | ||
2313 | * Removes an SCB from the list. | ||
2314 | * | ||
2315 | *-F*************************************************************************/ | ||
2316 | static inline void | ||
2317 | scbq_remove(volatile scb_queue_type *queue, struct aic7xxx_scb *scb) | ||
2318 | { | ||
2319 | if (queue->head == scb) | ||
2320 | { | ||
2321 | /* At beginning of queue, remove from head. */ | ||
2322 | scbq_remove_head(queue); | ||
2323 | } | ||
2324 | else | ||
2325 | { | ||
2326 | struct aic7xxx_scb *curscb = queue->head; | ||
2327 | |||
2328 | /* | ||
2329 | * Search until the next scb is the one we're looking for, or | ||
2330 | * we run out of queue. | ||
2331 | */ | ||
2332 | while ((curscb != NULL) && (curscb->q_next != scb)) | ||
2333 | { | ||
2334 | curscb = curscb->q_next; | ||
2335 | } | ||
2336 | if (curscb != NULL) | ||
2337 | { | ||
2338 | /* Found it. */ | ||
2339 | curscb->q_next = scb->q_next; | ||
2340 | if (scb->q_next == NULL) | ||
2341 | { | ||
2342 | /* Update the tail when removing the tail. */ | ||
2343 | queue->tail = curscb; | ||
2344 | } | ||
2345 | } | ||
2346 | } | ||
2347 | } | ||
2348 | |||
2349 | /*+F************************************************************************* | ||
2350 | * Function: | ||
2351 | * scbq_insert_tail | ||
2352 | * | ||
2353 | * Description: | ||
2354 | * Add an SCB at the tail of the list. | ||
2355 | * | ||
2356 | *-F*************************************************************************/ | ||
2357 | static inline void | ||
2358 | scbq_insert_tail(volatile scb_queue_type *queue, struct aic7xxx_scb *scb) | ||
2359 | { | ||
2360 | scb->q_next = NULL; | ||
2361 | if (queue->tail != NULL) /* Add the scb at the end of the list. */ | ||
2362 | queue->tail->q_next = scb; | ||
2363 | queue->tail = scb; /* Update the tail. */ | ||
2364 | if (queue->head == NULL) /* If list was empty, update head. */ | ||
2365 | queue->head = queue->tail; | ||
2366 | } | ||
2367 | |||
2368 | /*+F************************************************************************* | ||
2369 | * Function: | ||
2370 | * aic7xxx_match_scb | ||
2371 | * | ||
2372 | * Description: | ||
2373 | * Checks to see if an scb matches the target/channel as specified. | ||
2374 | * If target is ALL_TARGETS (-1), then we're looking for any device | ||
2375 | * on the specified channel; this happens when a channel is going | ||
2376 | * to be reset and all devices on that channel must be aborted. | ||
2377 | *-F*************************************************************************/ | ||
2378 | static int | ||
2379 | aic7xxx_match_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb, | ||
2380 | int target, int channel, int lun, unsigned char tag) | ||
2381 | { | ||
2382 | int targ = (scb->hscb->target_channel_lun >> 4) & 0x0F; | ||
2383 | int chan = (scb->hscb->target_channel_lun >> 3) & 0x01; | ||
2384 | int slun = scb->hscb->target_channel_lun & 0x07; | ||
2385 | int match; | ||
2386 | |||
2387 | match = ((chan == channel) || (channel == ALL_CHANNELS)); | ||
2388 | if (match != 0) | ||
2389 | match = ((targ == target) || (target == ALL_TARGETS)); | ||
2390 | if (match != 0) | ||
2391 | match = ((lun == slun) || (lun == ALL_LUNS)); | ||
2392 | if (match != 0) | ||
2393 | match = ((tag == scb->hscb->tag) || (tag == SCB_LIST_NULL)); | ||
2394 | |||
2395 | return (match); | ||
2396 | } | ||
2397 | |||
2398 | /*+F************************************************************************* | ||
2399 | * Function: | ||
2400 | * aic7xxx_add_curscb_to_free_list | ||
2401 | * | ||
2402 | * Description: | ||
2403 | * Adds the current scb (in SCBPTR) to the list of free SCBs. | ||
2404 | *-F*************************************************************************/ | ||
2405 | static void | ||
2406 | aic7xxx_add_curscb_to_free_list(struct aic7xxx_host *p) | ||
2407 | { | ||
2408 | /* | ||
2409 | * Invalidate the tag so that aic7xxx_find_scb doesn't think | ||
2410 | * it's active | ||
2411 | */ | ||
2412 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); | ||
2413 | aic_outb(p, 0, SCB_CONTROL); | ||
2414 | |||
2415 | aic_outb(p, aic_inb(p, FREE_SCBH), SCB_NEXT); | ||
2416 | aic_outb(p, aic_inb(p, SCBPTR), FREE_SCBH); | ||
2417 | } | ||
2418 | |||
2419 | /*+F************************************************************************* | ||
2420 | * Function: | ||
2421 | * aic7xxx_rem_scb_from_disc_list | ||
2422 | * | ||
2423 | * Description: | ||
2424 | * Removes the current SCB from the disconnected list and adds it | ||
2425 | * to the free list. | ||
2426 | *-F*************************************************************************/ | ||
2427 | static unsigned char | ||
2428 | aic7xxx_rem_scb_from_disc_list(struct aic7xxx_host *p, unsigned char scbptr, | ||
2429 | unsigned char prev) | ||
2430 | { | ||
2431 | unsigned char next; | ||
2432 | |||
2433 | aic_outb(p, scbptr, SCBPTR); | ||
2434 | next = aic_inb(p, SCB_NEXT); | ||
2435 | aic7xxx_add_curscb_to_free_list(p); | ||
2436 | |||
2437 | if (prev != SCB_LIST_NULL) | ||
2438 | { | ||
2439 | aic_outb(p, prev, SCBPTR); | ||
2440 | aic_outb(p, next, SCB_NEXT); | ||
2441 | } | ||
2442 | else | ||
2443 | { | ||
2444 | aic_outb(p, next, DISCONNECTED_SCBH); | ||
2445 | } | ||
2446 | |||
2447 | return next; | ||
2448 | } | ||
2449 | |||
2450 | /*+F************************************************************************* | ||
2451 | * Function: | ||
2452 | * aic7xxx_busy_target | ||
2453 | * | ||
2454 | * Description: | ||
2455 | * Set the specified target busy. | ||
2456 | *-F*************************************************************************/ | ||
2457 | static inline void | ||
2458 | aic7xxx_busy_target(struct aic7xxx_host *p, struct aic7xxx_scb *scb) | ||
2459 | { | ||
2460 | p->untagged_scbs[scb->hscb->target_channel_lun] = scb->hscb->tag; | ||
2461 | } | ||
2462 | |||
2463 | /*+F************************************************************************* | ||
2464 | * Function: | ||
2465 | * aic7xxx_index_busy_target | ||
2466 | * | ||
2467 | * Description: | ||
2468 | * Returns the index of the busy target, and optionally sets the | ||
2469 | * target inactive. | ||
2470 | *-F*************************************************************************/ | ||
2471 | static inline unsigned char | ||
2472 | aic7xxx_index_busy_target(struct aic7xxx_host *p, unsigned char tcl, | ||
2473 | int unbusy) | ||
2474 | { | ||
2475 | unsigned char busy_scbid; | ||
2476 | |||
2477 | busy_scbid = p->untagged_scbs[tcl]; | ||
2478 | if (unbusy) | ||
2479 | { | ||
2480 | p->untagged_scbs[tcl] = SCB_LIST_NULL; | ||
2481 | } | ||
2482 | return (busy_scbid); | ||
2483 | } | ||
2484 | |||
2485 | /*+F************************************************************************* | ||
2486 | * Function: | ||
2487 | * aic7xxx_find_scb | ||
2488 | * | ||
2489 | * Description: | ||
2490 | * Look through the SCB array of the card and attempt to find the | ||
2491 | * hardware SCB that corresponds to the passed in SCB. Return | ||
2492 | * SCB_LIST_NULL if unsuccessful. This routine assumes that the | ||
2493 | * card is already paused. | ||
2494 | *-F*************************************************************************/ | ||
2495 | static unsigned char | ||
2496 | aic7xxx_find_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb) | ||
2497 | { | ||
2498 | unsigned char saved_scbptr; | ||
2499 | unsigned char curindex; | ||
2500 | |||
2501 | saved_scbptr = aic_inb(p, SCBPTR); | ||
2502 | curindex = 0; | ||
2503 | for (curindex = 0; curindex < p->scb_data->maxhscbs; curindex++) | ||
2504 | { | ||
2505 | aic_outb(p, curindex, SCBPTR); | ||
2506 | if (aic_inb(p, SCB_TAG) == scb->hscb->tag) | ||
2507 | { | ||
2508 | break; | ||
2509 | } | ||
2510 | } | ||
2511 | aic_outb(p, saved_scbptr, SCBPTR); | ||
2512 | if (curindex >= p->scb_data->maxhscbs) | ||
2513 | { | ||
2514 | curindex = SCB_LIST_NULL; | ||
2515 | } | ||
2516 | |||
2517 | return (curindex); | ||
2518 | } | ||
2519 | |||
2520 | /*+F************************************************************************* | ||
2521 | * Function: | ||
2522 | * aic7xxx_allocate_scb | ||
2523 | * | ||
2524 | * Description: | ||
2525 | * Get an SCB from the free list or by allocating a new one. | ||
2526 | *-F*************************************************************************/ | ||
2527 | static int | ||
2528 | aic7xxx_allocate_scb(struct aic7xxx_host *p) | ||
2529 | { | ||
2530 | struct aic7xxx_scb *scbp = NULL; | ||
2531 | int scb_size = (sizeof (struct hw_scatterlist) * AIC7XXX_MAX_SG) + 12 + 6; | ||
2532 | int i; | ||
2533 | int step = PAGE_SIZE / 1024; | ||
2534 | unsigned long scb_count = 0; | ||
2535 | struct hw_scatterlist *hsgp; | ||
2536 | struct aic7xxx_scb *scb_ap; | ||
2537 | struct aic7xxx_scb_dma *scb_dma; | ||
2538 | unsigned char *bufs; | ||
2539 | |||
2540 | if (p->scb_data->numscbs < p->scb_data->maxscbs) | ||
2541 | { | ||
2542 | /* | ||
2543 | * Calculate the optimal number of SCBs to allocate. | ||
2544 | * | ||
2545 | * NOTE: This formula works because the sizeof(sg_array) is always | ||
2546 | * 1024. Therefore, scb_size * i would always be > PAGE_SIZE * | ||
2547 | * (i/step). The (i-1) allows the left hand side of the equation | ||
2548 | * to grow into the right hand side to a point of near perfect | ||
2549 | * efficiency since scb_size * (i -1) is growing slightly faster | ||
2550 | * than the right hand side. If the number of SG array elements | ||
2551 | * is changed, this function may not be near so efficient any more. | ||
2552 | * | ||
2553 | * Since the DMA'able buffers are now allocated in a separate | ||
2554 | * chunk this algorithm has been modified to match. The '12' | ||
2555 | * and '6' factors in scb_size are for the DMA'able command byte | ||
2556 | * and sensebuffers respectively. -DaveM | ||
2557 | */ | ||
2558 | for ( i=step;; i *= 2 ) | ||
2559 | { | ||
2560 | if ( (scb_size * (i-1)) >= ( (PAGE_SIZE * (i/step)) - 64 ) ) | ||
2561 | { | ||
2562 | i /= 2; | ||
2563 | break; | ||
2564 | } | ||
2565 | } | ||
2566 | scb_count = min( (i-1), p->scb_data->maxscbs - p->scb_data->numscbs); | ||
2567 | scb_ap = kmalloc(sizeof (struct aic7xxx_scb) * scb_count | ||
2568 | + sizeof(struct aic7xxx_scb_dma), GFP_ATOMIC); | ||
2569 | if (scb_ap == NULL) | ||
2570 | return(0); | ||
2571 | scb_dma = (struct aic7xxx_scb_dma *)&scb_ap[scb_count]; | ||
2572 | hsgp = (struct hw_scatterlist *) | ||
2573 | pci_alloc_consistent(p->pdev, scb_size * scb_count, | ||
2574 | &scb_dma->dma_address); | ||
2575 | if (hsgp == NULL) | ||
2576 | { | ||
2577 | kfree(scb_ap); | ||
2578 | return(0); | ||
2579 | } | ||
2580 | bufs = (unsigned char *)&hsgp[scb_count * AIC7XXX_MAX_SG]; | ||
2581 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
2582 | if (aic7xxx_verbose > 0xffff) | ||
2583 | { | ||
2584 | if (p->scb_data->numscbs == 0) | ||
2585 | printk(INFO_LEAD "Allocating initial %ld SCB structures.\n", | ||
2586 | p->host_no, -1, -1, -1, scb_count); | ||
2587 | else | ||
2588 | printk(INFO_LEAD "Allocating %ld additional SCB structures.\n", | ||
2589 | p->host_no, -1, -1, -1, scb_count); | ||
2590 | } | ||
2591 | #endif | ||
2592 | memset(scb_ap, 0, sizeof (struct aic7xxx_scb) * scb_count); | ||
2593 | scb_dma->dma_offset = (unsigned long)scb_dma->dma_address | ||
2594 | - (unsigned long)hsgp; | ||
2595 | scb_dma->dma_len = scb_size * scb_count; | ||
2596 | for (i=0; i < scb_count; i++) | ||
2597 | { | ||
2598 | scbp = &scb_ap[i]; | ||
2599 | scbp->hscb = &p->scb_data->hscbs[p->scb_data->numscbs]; | ||
2600 | scbp->sg_list = &hsgp[i * AIC7XXX_MAX_SG]; | ||
2601 | scbp->sense_cmd = bufs; | ||
2602 | scbp->cmnd = bufs + 6; | ||
2603 | bufs += 12 + 6; | ||
2604 | scbp->scb_dma = scb_dma; | ||
2605 | memset(scbp->hscb, 0, sizeof(struct aic7xxx_hwscb)); | ||
2606 | scbp->hscb->tag = p->scb_data->numscbs; | ||
2607 | /* | ||
2608 | * Place in the scb array; never is removed | ||
2609 | */ | ||
2610 | p->scb_data->scb_array[p->scb_data->numscbs++] = scbp; | ||
2611 | scbq_insert_tail(&p->scb_data->free_scbs, scbp); | ||
2612 | } | ||
2613 | scbp->kmalloc_ptr = scb_ap; | ||
2614 | } | ||
2615 | return(scb_count); | ||
2616 | } | ||
2617 | |||
2618 | /*+F************************************************************************* | ||
2619 | * Function: | ||
2620 | * aic7xxx_queue_cmd_complete | ||
2621 | * | ||
2622 | * Description: | ||
2623 | * Due to race conditions present in the SCSI subsystem, it is easier | ||
2624 | * to queue completed commands, then call scsi_done() on them when | ||
2625 | * we're finished. This function queues the completed commands. | ||
2626 | *-F*************************************************************************/ | ||
2627 | static void | ||
2628 | aic7xxx_queue_cmd_complete(struct aic7xxx_host *p, struct scsi_cmnd *cmd) | ||
2629 | { | ||
2630 | aic7xxx_position(cmd) = SCB_LIST_NULL; | ||
2631 | cmd->host_scribble = (char *)p->completeq.head; | ||
2632 | p->completeq.head = cmd; | ||
2633 | } | ||
2634 | |||
2635 | /*+F************************************************************************* | ||
2636 | * Function: | ||
2637 | * aic7xxx_done_cmds_complete | ||
2638 | * | ||
2639 | * Description: | ||
2640 | * Process the completed command queue. | ||
2641 | *-F*************************************************************************/ | ||
2642 | static void aic7xxx_done_cmds_complete(struct aic7xxx_host *p) | ||
2643 | { | ||
2644 | struct scsi_cmnd *cmd; | ||
2645 | |||
2646 | while (p->completeq.head != NULL) { | ||
2647 | cmd = p->completeq.head; | ||
2648 | p->completeq.head = (struct scsi_cmnd *) cmd->host_scribble; | ||
2649 | cmd->host_scribble = NULL; | ||
2650 | cmd->scsi_done(cmd); | ||
2651 | } | ||
2652 | } | ||
2653 | |||
2654 | /*+F************************************************************************* | ||
2655 | * Function: | ||
2656 | * aic7xxx_free_scb | ||
2657 | * | ||
2658 | * Description: | ||
2659 | * Free the scb and insert into the free scb list. | ||
2660 | *-F*************************************************************************/ | ||
2661 | static void | ||
2662 | aic7xxx_free_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb) | ||
2663 | { | ||
2664 | |||
2665 | scb->flags = SCB_FREE; | ||
2666 | scb->cmd = NULL; | ||
2667 | scb->sg_count = 0; | ||
2668 | scb->sg_length = 0; | ||
2669 | scb->tag_action = 0; | ||
2670 | scb->hscb->control = 0; | ||
2671 | scb->hscb->target_status = 0; | ||
2672 | scb->hscb->target_channel_lun = SCB_LIST_NULL; | ||
2673 | |||
2674 | scbq_insert_head(&p->scb_data->free_scbs, scb); | ||
2675 | } | ||
2676 | |||
2677 | /*+F************************************************************************* | ||
2678 | * Function: | ||
2679 | * aic7xxx_done | ||
2680 | * | ||
2681 | * Description: | ||
2682 | * Calls the higher level scsi done function and frees the scb. | ||
2683 | *-F*************************************************************************/ | ||
2684 | static void | ||
2685 | aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb) | ||
2686 | { | ||
2687 | struct scsi_cmnd *cmd = scb->cmd; | ||
2688 | struct aic_dev_data *aic_dev = cmd->device->hostdata; | ||
2689 | int tindex = TARGET_INDEX(cmd); | ||
2690 | struct aic7xxx_scb *scbp; | ||
2691 | unsigned char queue_depth; | ||
2692 | |||
2693 | scsi_dma_unmap(cmd); | ||
2694 | |||
2695 | if (scb->flags & SCB_SENSE) | ||
2696 | { | ||
2697 | pci_unmap_single(p->pdev, | ||
2698 | le32_to_cpu(scb->sg_list[0].address), | ||
2699 | SCSI_SENSE_BUFFERSIZE, | ||
2700 | PCI_DMA_FROMDEVICE); | ||
2701 | } | ||
2702 | if (scb->flags & SCB_RECOVERY_SCB) | ||
2703 | { | ||
2704 | p->flags &= ~AHC_ABORT_PENDING; | ||
2705 | } | ||
2706 | if (scb->flags & (SCB_RESET|SCB_ABORT)) | ||
2707 | { | ||
2708 | cmd->result |= (DID_RESET << 16); | ||
2709 | } | ||
2710 | |||
2711 | if ((scb->flags & SCB_MSGOUT_BITS) != 0) | ||
2712 | { | ||
2713 | unsigned short mask; | ||
2714 | int message_error = FALSE; | ||
2715 | |||
2716 | mask = 0x01 << tindex; | ||
2717 | |||
2718 | /* | ||
2719 | * Check to see if we get an invalid message or a message error | ||
2720 | * after failing to negotiate a wide or sync transfer message. | ||
2721 | */ | ||
2722 | if ((scb->flags & SCB_SENSE) && | ||
2723 | ((scb->cmd->sense_buffer[12] == 0x43) || /* INVALID_MESSAGE */ | ||
2724 | (scb->cmd->sense_buffer[12] == 0x49))) /* MESSAGE_ERROR */ | ||
2725 | { | ||
2726 | message_error = TRUE; | ||
2727 | } | ||
2728 | |||
2729 | if (scb->flags & SCB_MSGOUT_WDTR) | ||
2730 | { | ||
2731 | if (message_error) | ||
2732 | { | ||
2733 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && | ||
2734 | (aic_dev->flags & DEVICE_PRINT_DTR) ) | ||
2735 | { | ||
2736 | printk(INFO_LEAD "Device failed to complete Wide Negotiation " | ||
2737 | "processing and\n", p->host_no, CTL_OF_SCB(scb)); | ||
2738 | printk(INFO_LEAD "returned a sense error code for invalid message, " | ||
2739 | "disabling future\n", p->host_no, CTL_OF_SCB(scb)); | ||
2740 | printk(INFO_LEAD "Wide negotiation to this device.\n", p->host_no, | ||
2741 | CTL_OF_SCB(scb)); | ||
2742 | } | ||
2743 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; | ||
2744 | } | ||
2745 | } | ||
2746 | if (scb->flags & SCB_MSGOUT_SDTR) | ||
2747 | { | ||
2748 | if (message_error) | ||
2749 | { | ||
2750 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && | ||
2751 | (aic_dev->flags & DEVICE_PRINT_DTR) ) | ||
2752 | { | ||
2753 | printk(INFO_LEAD "Device failed to complete Sync Negotiation " | ||
2754 | "processing and\n", p->host_no, CTL_OF_SCB(scb)); | ||
2755 | printk(INFO_LEAD "returned a sense error code for invalid message, " | ||
2756 | "disabling future\n", p->host_no, CTL_OF_SCB(scb)); | ||
2757 | printk(INFO_LEAD "Sync negotiation to this device.\n", p->host_no, | ||
2758 | CTL_OF_SCB(scb)); | ||
2759 | aic_dev->flags &= ~DEVICE_PRINT_DTR; | ||
2760 | } | ||
2761 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; | ||
2762 | } | ||
2763 | } | ||
2764 | if (scb->flags & SCB_MSGOUT_PPR) | ||
2765 | { | ||
2766 | if(message_error) | ||
2767 | { | ||
2768 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && | ||
2769 | (aic_dev->flags & DEVICE_PRINT_DTR) ) | ||
2770 | { | ||
2771 | printk(INFO_LEAD "Device failed to complete Parallel Protocol " | ||
2772 | "Request processing and\n", p->host_no, CTL_OF_SCB(scb)); | ||
2773 | printk(INFO_LEAD "returned a sense error code for invalid message, " | ||
2774 | "disabling future\n", p->host_no, CTL_OF_SCB(scb)); | ||
2775 | printk(INFO_LEAD "Parallel Protocol Request negotiation to this " | ||
2776 | "device.\n", p->host_no, CTL_OF_SCB(scb)); | ||
2777 | } | ||
2778 | /* | ||
2779 | * Disable PPR negotiation and revert back to WDTR and SDTR setup | ||
2780 | */ | ||
2781 | aic_dev->needppr = aic_dev->needppr_copy = 0; | ||
2782 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; | ||
2783 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; | ||
2784 | } | ||
2785 | } | ||
2786 | } | ||
2787 | |||
2788 | queue_depth = aic_dev->temp_q_depth; | ||
2789 | if (queue_depth >= aic_dev->active_cmds) | ||
2790 | { | ||
2791 | scbp = scbq_remove_head(&aic_dev->delayed_scbs); | ||
2792 | if (scbp) | ||
2793 | { | ||
2794 | if (queue_depth == 1) | ||
2795 | { | ||
2796 | /* | ||
2797 | * Give extra preference to untagged devices, such as CD-R devices | ||
2798 | * This makes it more likely that a drive *won't* stuff up while | ||
2799 | * waiting on data at a critical time, such as CD-R writing and | ||
2800 | * audio CD ripping operations. Should also benefit tape drives. | ||
2801 | */ | ||
2802 | scbq_insert_head(&p->waiting_scbs, scbp); | ||
2803 | } | ||
2804 | else | ||
2805 | { | ||
2806 | scbq_insert_tail(&p->waiting_scbs, scbp); | ||
2807 | } | ||
2808 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
2809 | if (aic7xxx_verbose > 0xffff) | ||
2810 | printk(INFO_LEAD "Moving SCB from delayed to waiting queue.\n", | ||
2811 | p->host_no, CTL_OF_SCB(scbp)); | ||
2812 | #endif | ||
2813 | if (queue_depth > aic_dev->active_cmds) | ||
2814 | { | ||
2815 | scbp = scbq_remove_head(&aic_dev->delayed_scbs); | ||
2816 | if (scbp) | ||
2817 | scbq_insert_tail(&p->waiting_scbs, scbp); | ||
2818 | } | ||
2819 | } | ||
2820 | } | ||
2821 | if (!(scb->tag_action)) | ||
2822 | { | ||
2823 | aic7xxx_index_busy_target(p, scb->hscb->target_channel_lun, | ||
2824 | /* unbusy */ TRUE); | ||
2825 | if (cmd->device->simple_tags) | ||
2826 | { | ||
2827 | aic_dev->temp_q_depth = aic_dev->max_q_depth; | ||
2828 | } | ||
2829 | } | ||
2830 | if(scb->flags & SCB_DTR_SCB) | ||
2831 | { | ||
2832 | aic_dev->dtr_pending = 0; | ||
2833 | } | ||
2834 | aic_dev->active_cmds--; | ||
2835 | p->activescbs--; | ||
2836 | |||
2837 | if ((scb->sg_length >= 512) && (((cmd->result >> 16) & 0xf) == DID_OK)) | ||
2838 | { | ||
2839 | long *ptr; | ||
2840 | int x, i; | ||
2841 | |||
2842 | |||
2843 | if (rq_data_dir(cmd->request) == WRITE) | ||
2844 | { | ||
2845 | aic_dev->w_total++; | ||
2846 | ptr = aic_dev->w_bins; | ||
2847 | } | ||
2848 | else | ||
2849 | { | ||
2850 | aic_dev->r_total++; | ||
2851 | ptr = aic_dev->r_bins; | ||
2852 | } | ||
2853 | x = scb->sg_length; | ||
2854 | x >>= 10; | ||
2855 | for(i=0; i<6; i++) | ||
2856 | { | ||
2857 | x >>= 2; | ||
2858 | if(!x) { | ||
2859 | ptr[i]++; | ||
2860 | break; | ||
2861 | } | ||
2862 | } | ||
2863 | if(i == 6 && x) | ||
2864 | ptr[5]++; | ||
2865 | } | ||
2866 | aic7xxx_free_scb(p, scb); | ||
2867 | aic7xxx_queue_cmd_complete(p, cmd); | ||
2868 | |||
2869 | } | ||
2870 | |||
2871 | /*+F************************************************************************* | ||
2872 | * Function: | ||
2873 | * aic7xxx_run_done_queue | ||
2874 | * | ||
2875 | * Description: | ||
2876 | * Calls the aic7xxx_done() for the scsi_cmnd of each scb in the | ||
2877 | * aborted list, and adds each scb to the free list. If complete | ||
2878 | * is TRUE, we also process the commands complete list. | ||
2879 | *-F*************************************************************************/ | ||
2880 | static void | ||
2881 | aic7xxx_run_done_queue(struct aic7xxx_host *p, /*complete*/ int complete) | ||
2882 | { | ||
2883 | struct aic7xxx_scb *scb; | ||
2884 | int i, found = 0; | ||
2885 | |||
2886 | for (i = 0; i < p->scb_data->numscbs; i++) | ||
2887 | { | ||
2888 | scb = p->scb_data->scb_array[i]; | ||
2889 | if (scb->flags & SCB_QUEUED_FOR_DONE) | ||
2890 | { | ||
2891 | if (scb->flags & SCB_QUEUE_FULL) | ||
2892 | { | ||
2893 | scb->cmd->result = QUEUE_FULL << 1; | ||
2894 | } | ||
2895 | else | ||
2896 | { | ||
2897 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) | ||
2898 | printk(INFO_LEAD "Aborting scb %d\n", | ||
2899 | p->host_no, CTL_OF_SCB(scb), scb->hscb->tag); | ||
2900 | /* | ||
2901 | * Clear any residual information since the normal aic7xxx_done() path | ||
2902 | * doesn't touch the residuals. | ||
2903 | */ | ||
2904 | scb->hscb->residual_SG_segment_count = 0; | ||
2905 | scb->hscb->residual_data_count[0] = 0; | ||
2906 | scb->hscb->residual_data_count[1] = 0; | ||
2907 | scb->hscb->residual_data_count[2] = 0; | ||
2908 | } | ||
2909 | found++; | ||
2910 | aic7xxx_done(p, scb); | ||
2911 | } | ||
2912 | } | ||
2913 | if (aic7xxx_verbose & (VERBOSE_ABORT_RETURN | VERBOSE_RESET_RETURN)) | ||
2914 | { | ||
2915 | printk(INFO_LEAD "%d commands found and queued for " | ||
2916 | "completion.\n", p->host_no, -1, -1, -1, found); | ||
2917 | } | ||
2918 | if (complete) | ||
2919 | { | ||
2920 | aic7xxx_done_cmds_complete(p); | ||
2921 | } | ||
2922 | } | ||
2923 | |||
2924 | /*+F************************************************************************* | ||
2925 | * Function: | ||
2926 | * aic7xxx_abort_waiting_scb | ||
2927 | * | ||
2928 | * Description: | ||
2929 | * Manipulate the waiting for selection list and return the | ||
2930 | * scb that follows the one that we remove. | ||
2931 | *-F*************************************************************************/ | ||
2932 | static unsigned char | ||
2933 | aic7xxx_abort_waiting_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb, | ||
2934 | unsigned char scbpos, unsigned char prev) | ||
2935 | { | ||
2936 | unsigned char curscb, next; | ||
2937 | |||
2938 | /* | ||
2939 | * Select the SCB we want to abort and pull the next pointer out of it. | ||
2940 | */ | ||
2941 | curscb = aic_inb(p, SCBPTR); | ||
2942 | aic_outb(p, scbpos, SCBPTR); | ||
2943 | next = aic_inb(p, SCB_NEXT); | ||
2944 | |||
2945 | aic7xxx_add_curscb_to_free_list(p); | ||
2946 | |||
2947 | /* | ||
2948 | * Update the waiting list | ||
2949 | */ | ||
2950 | if (prev == SCB_LIST_NULL) | ||
2951 | { | ||
2952 | /* | ||
2953 | * First in the list | ||
2954 | */ | ||
2955 | aic_outb(p, next, WAITING_SCBH); | ||
2956 | } | ||
2957 | else | ||
2958 | { | ||
2959 | /* | ||
2960 | * Select the scb that pointed to us and update its next pointer. | ||
2961 | */ | ||
2962 | aic_outb(p, prev, SCBPTR); | ||
2963 | aic_outb(p, next, SCB_NEXT); | ||
2964 | } | ||
2965 | /* | ||
2966 | * Point us back at the original scb position and inform the SCSI | ||
2967 | * system that the command has been aborted. | ||
2968 | */ | ||
2969 | aic_outb(p, curscb, SCBPTR); | ||
2970 | return (next); | ||
2971 | } | ||
2972 | |||
2973 | /*+F************************************************************************* | ||
2974 | * Function: | ||
2975 | * aic7xxx_search_qinfifo | ||
2976 | * | ||
2977 | * Description: | ||
2978 | * Search the queue-in FIFO for matching SCBs and conditionally | ||
2979 | * requeue. Returns the number of matching SCBs. | ||
2980 | *-F*************************************************************************/ | ||
2981 | static int | ||
2982 | aic7xxx_search_qinfifo(struct aic7xxx_host *p, int target, int channel, | ||
2983 | int lun, unsigned char tag, int flags, int requeue, | ||
2984 | volatile scb_queue_type *queue) | ||
2985 | { | ||
2986 | int found; | ||
2987 | unsigned char qinpos, qintail; | ||
2988 | struct aic7xxx_scb *scbp; | ||
2989 | |||
2990 | found = 0; | ||
2991 | qinpos = aic_inb(p, QINPOS); | ||
2992 | qintail = p->qinfifonext; | ||
2993 | |||
2994 | p->qinfifonext = qinpos; | ||
2995 | |||
2996 | while (qinpos != qintail) | ||
2997 | { | ||
2998 | scbp = p->scb_data->scb_array[p->qinfifo[qinpos++]]; | ||
2999 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag)) | ||
3000 | { | ||
3001 | /* | ||
3002 | * We found an scb that needs to be removed. | ||
3003 | */ | ||
3004 | if (requeue && (queue != NULL)) | ||
3005 | { | ||
3006 | if (scbp->flags & SCB_WAITINGQ) | ||
3007 | { | ||
3008 | scbq_remove(queue, scbp); | ||
3009 | scbq_remove(&p->waiting_scbs, scbp); | ||
3010 | scbq_remove(&AIC_DEV(scbp->cmd)->delayed_scbs, scbp); | ||
3011 | AIC_DEV(scbp->cmd)->active_cmds++; | ||
3012 | p->activescbs++; | ||
3013 | } | ||
3014 | scbq_insert_tail(queue, scbp); | ||
3015 | AIC_DEV(scbp->cmd)->active_cmds--; | ||
3016 | p->activescbs--; | ||
3017 | scbp->flags |= SCB_WAITINGQ; | ||
3018 | if ( !(scbp->tag_action & TAG_ENB) ) | ||
3019 | { | ||
3020 | aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun, | ||
3021 | TRUE); | ||
3022 | } | ||
3023 | } | ||
3024 | else if (requeue) | ||
3025 | { | ||
3026 | p->qinfifo[p->qinfifonext++] = scbp->hscb->tag; | ||
3027 | } | ||
3028 | else | ||
3029 | { | ||
3030 | /* | ||
3031 | * Preserve any SCB_RECOVERY_SCB flags on this scb then set the | ||
3032 | * flags we were called with, presumeably so aic7xxx_run_done_queue | ||
3033 | * can find this scb | ||
3034 | */ | ||
3035 | scbp->flags = flags | (scbp->flags & SCB_RECOVERY_SCB); | ||
3036 | if (aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun, | ||
3037 | FALSE) == scbp->hscb->tag) | ||
3038 | { | ||
3039 | aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun, | ||
3040 | TRUE); | ||
3041 | } | ||
3042 | } | ||
3043 | found++; | ||
3044 | } | ||
3045 | else | ||
3046 | { | ||
3047 | p->qinfifo[p->qinfifonext++] = scbp->hscb->tag; | ||
3048 | } | ||
3049 | } | ||
3050 | /* | ||
3051 | * Now that we've done the work, clear out any left over commands in the | ||
3052 | * qinfifo and update the KERNEL_QINPOS down on the card. | ||
3053 | * | ||
3054 | * NOTE: This routine expect the sequencer to already be paused when | ||
3055 | * it is run....make sure it's that way! | ||
3056 | */ | ||
3057 | qinpos = p->qinfifonext; | ||
3058 | while(qinpos != qintail) | ||
3059 | { | ||
3060 | p->qinfifo[qinpos++] = SCB_LIST_NULL; | ||
3061 | } | ||
3062 | if (p->features & AHC_QUEUE_REGS) | ||
3063 | aic_outb(p, p->qinfifonext, HNSCB_QOFF); | ||
3064 | else | ||
3065 | aic_outb(p, p->qinfifonext, KERNEL_QINPOS); | ||
3066 | |||
3067 | return (found); | ||
3068 | } | ||
3069 | |||
3070 | /*+F************************************************************************* | ||
3071 | * Function: | ||
3072 | * aic7xxx_scb_on_qoutfifo | ||
3073 | * | ||
3074 | * Description: | ||
3075 | * Is the scb that was passed to us currently on the qoutfifo? | ||
3076 | *-F*************************************************************************/ | ||
3077 | static int | ||
3078 | aic7xxx_scb_on_qoutfifo(struct aic7xxx_host *p, struct aic7xxx_scb *scb) | ||
3079 | { | ||
3080 | int i=0; | ||
3081 | |||
3082 | while(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] != SCB_LIST_NULL) | ||
3083 | { | ||
3084 | if(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] == scb->hscb->tag) | ||
3085 | return TRUE; | ||
3086 | else | ||
3087 | i++; | ||
3088 | } | ||
3089 | return FALSE; | ||
3090 | } | ||
3091 | |||
3092 | |||
3093 | /*+F************************************************************************* | ||
3094 | * Function: | ||
3095 | * aic7xxx_reset_device | ||
3096 | * | ||
3097 | * Description: | ||
3098 | * The device at the given target/channel has been reset. Abort | ||
3099 | * all active and queued scbs for that target/channel. This function | ||
3100 | * need not worry about linked next pointers because if was a MSG_ABORT_TAG | ||
3101 | * then we had a tagged command (no linked next), if it was MSG_ABORT or | ||
3102 | * MSG_BUS_DEV_RESET then the device won't know about any commands any more | ||
3103 | * and no busy commands will exist, and if it was a bus reset, then nothing | ||
3104 | * knows about any linked next commands any more. In all cases, we don't | ||
3105 | * need to worry about the linked next or busy scb, we just need to clear | ||
3106 | * them. | ||
3107 | *-F*************************************************************************/ | ||
3108 | static void | ||
3109 | aic7xxx_reset_device(struct aic7xxx_host *p, int target, int channel, | ||
3110 | int lun, unsigned char tag) | ||
3111 | { | ||
3112 | struct aic7xxx_scb *scbp, *prev_scbp; | ||
3113 | struct scsi_device *sd; | ||
3114 | unsigned char active_scb, tcl, scb_tag; | ||
3115 | int i = 0, init_lists = FALSE; | ||
3116 | struct aic_dev_data *aic_dev; | ||
3117 | |||
3118 | /* | ||
3119 | * Restore this when we're done | ||
3120 | */ | ||
3121 | active_scb = aic_inb(p, SCBPTR); | ||
3122 | scb_tag = aic_inb(p, SCB_TAG); | ||
3123 | |||
3124 | if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS)) | ||
3125 | { | ||
3126 | printk(INFO_LEAD "Reset device, hardware_scb %d,\n", | ||
3127 | p->host_no, channel, target, lun, active_scb); | ||
3128 | printk(INFO_LEAD "Current scb %d, SEQADDR 0x%x, LASTPHASE " | ||
3129 | "0x%x\n", | ||
3130 | p->host_no, channel, target, lun, scb_tag, | ||
3131 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), | ||
3132 | aic_inb(p, LASTPHASE)); | ||
3133 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n", | ||
3134 | p->host_no, channel, target, lun, | ||
3135 | (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0, | ||
3136 | aic_inb(p, SG_COUNT), aic_inb(p, SCSISIGI)); | ||
3137 | printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n", | ||
3138 | p->host_no, channel, target, lun, aic_inb(p, SSTAT0), | ||
3139 | aic_inb(p, SSTAT1), aic_inb(p, SSTAT2)); | ||
3140 | } | ||
3141 | |||
3142 | /* | ||
3143 | * Deal with the busy target and linked next issues. | ||
3144 | */ | ||
3145 | list_for_each_entry(aic_dev, &p->aic_devs, list) | ||
3146 | { | ||
3147 | if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS)) | ||
3148 | printk(INFO_LEAD "processing aic_dev %p\n", p->host_no, channel, target, | ||
3149 | lun, aic_dev); | ||
3150 | sd = aic_dev->SDptr; | ||
3151 | |||
3152 | if((target != ALL_TARGETS && target != sd->id) || | ||
3153 | (channel != ALL_CHANNELS && channel != sd->channel)) | ||
3154 | continue; | ||
3155 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) | ||
3156 | printk(INFO_LEAD "Cleaning up status information " | ||
3157 | "and delayed_scbs.\n", p->host_no, sd->channel, sd->id, sd->lun); | ||
3158 | aic_dev->flags &= ~BUS_DEVICE_RESET_PENDING; | ||
3159 | if ( tag == SCB_LIST_NULL ) | ||
3160 | { | ||
3161 | aic_dev->dtr_pending = 0; | ||
3162 | aic_dev->needppr = aic_dev->needppr_copy; | ||
3163 | aic_dev->needsdtr = aic_dev->needsdtr_copy; | ||
3164 | aic_dev->needwdtr = aic_dev->needwdtr_copy; | ||
3165 | aic_dev->flags = DEVICE_PRINT_DTR; | ||
3166 | aic_dev->temp_q_depth = aic_dev->max_q_depth; | ||
3167 | } | ||
3168 | tcl = (sd->id << 4) | (sd->channel << 3) | sd->lun; | ||
3169 | if ( (aic7xxx_index_busy_target(p, tcl, FALSE) == tag) || | ||
3170 | (tag == SCB_LIST_NULL) ) | ||
3171 | aic7xxx_index_busy_target(p, tcl, /* unbusy */ TRUE); | ||
3172 | prev_scbp = NULL; | ||
3173 | scbp = aic_dev->delayed_scbs.head; | ||
3174 | while (scbp != NULL) | ||
3175 | { | ||
3176 | prev_scbp = scbp; | ||
3177 | scbp = scbp->q_next; | ||
3178 | if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag)) | ||
3179 | { | ||
3180 | scbq_remove(&aic_dev->delayed_scbs, prev_scbp); | ||
3181 | if (prev_scbp->flags & SCB_WAITINGQ) | ||
3182 | { | ||
3183 | aic_dev->active_cmds++; | ||
3184 | p->activescbs++; | ||
3185 | } | ||
3186 | prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); | ||
3187 | prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; | ||
3188 | } | ||
3189 | } | ||
3190 | } | ||
3191 | |||
3192 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) | ||
3193 | printk(INFO_LEAD "Cleaning QINFIFO.\n", p->host_no, channel, target, lun ); | ||
3194 | aic7xxx_search_qinfifo(p, target, channel, lun, tag, | ||
3195 | SCB_RESET | SCB_QUEUED_FOR_DONE, /* requeue */ FALSE, NULL); | ||
3196 | |||
3197 | /* | ||
3198 | * Search the waiting_scbs queue for matches, this catches any SCB_QUEUED | ||
3199 | * ABORT/RESET commands. | ||
3200 | */ | ||
3201 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) | ||
3202 | printk(INFO_LEAD "Cleaning waiting_scbs.\n", p->host_no, channel, | ||
3203 | target, lun ); | ||
3204 | { | ||
3205 | struct aic7xxx_scb *scbp, *prev_scbp; | ||
3206 | |||
3207 | prev_scbp = NULL; | ||
3208 | scbp = p->waiting_scbs.head; | ||
3209 | while (scbp != NULL) | ||
3210 | { | ||
3211 | prev_scbp = scbp; | ||
3212 | scbp = scbp->q_next; | ||
3213 | if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag)) | ||
3214 | { | ||
3215 | scbq_remove(&p->waiting_scbs, prev_scbp); | ||
3216 | if (prev_scbp->flags & SCB_WAITINGQ) | ||
3217 | { | ||
3218 | AIC_DEV(prev_scbp->cmd)->active_cmds++; | ||
3219 | p->activescbs++; | ||
3220 | } | ||
3221 | prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); | ||
3222 | prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; | ||
3223 | } | ||
3224 | } | ||
3225 | } | ||
3226 | |||
3227 | |||
3228 | /* | ||
3229 | * Search waiting for selection list. | ||
3230 | */ | ||
3231 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) | ||
3232 | printk(INFO_LEAD "Cleaning waiting for selection " | ||
3233 | "list.\n", p->host_no, channel, target, lun); | ||
3234 | { | ||
3235 | unsigned char next, prev, scb_index; | ||
3236 | |||
3237 | next = aic_inb(p, WAITING_SCBH); /* Start at head of list. */ | ||
3238 | prev = SCB_LIST_NULL; | ||
3239 | while (next != SCB_LIST_NULL) | ||
3240 | { | ||
3241 | aic_outb(p, next, SCBPTR); | ||
3242 | scb_index = aic_inb(p, SCB_TAG); | ||
3243 | if (scb_index >= p->scb_data->numscbs) | ||
3244 | { | ||
3245 | /* | ||
3246 | * No aic7xxx_verbose check here.....we want to see this since it | ||
3247 | * means either the kernel driver or the sequencer screwed things up | ||
3248 | */ | ||
3249 | printk(WARN_LEAD "Waiting List inconsistency; SCB index=%d, " | ||
3250 | "numscbs=%d\n", p->host_no, channel, target, lun, scb_index, | ||
3251 | p->scb_data->numscbs); | ||
3252 | next = aic_inb(p, SCB_NEXT); | ||
3253 | aic7xxx_add_curscb_to_free_list(p); | ||
3254 | } | ||
3255 | else | ||
3256 | { | ||
3257 | scbp = p->scb_data->scb_array[scb_index]; | ||
3258 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag)) | ||
3259 | { | ||
3260 | next = aic7xxx_abort_waiting_scb(p, scbp, next, prev); | ||
3261 | if (scbp->flags & SCB_WAITINGQ) | ||
3262 | { | ||
3263 | AIC_DEV(scbp->cmd)->active_cmds++; | ||
3264 | p->activescbs++; | ||
3265 | } | ||
3266 | scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); | ||
3267 | scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; | ||
3268 | if (prev == SCB_LIST_NULL) | ||
3269 | { | ||
3270 | /* | ||
3271 | * This is either the first scb on the waiting list, or we | ||
3272 | * have already yanked the first and haven't left any behind. | ||
3273 | * Either way, we need to turn off the selection hardware if | ||
3274 | * it isn't already off. | ||
3275 | */ | ||
3276 | aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ); | ||
3277 | aic_outb(p, CLRSELTIMEO, CLRSINT1); | ||
3278 | } | ||
3279 | } | ||
3280 | else | ||
3281 | { | ||
3282 | prev = next; | ||
3283 | next = aic_inb(p, SCB_NEXT); | ||
3284 | } | ||
3285 | } | ||
3286 | } | ||
3287 | } | ||
3288 | |||
3289 | /* | ||
3290 | * Go through disconnected list and remove any entries we have queued | ||
3291 | * for completion, zeroing their control byte too. | ||
3292 | */ | ||
3293 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) | ||
3294 | printk(INFO_LEAD "Cleaning disconnected scbs " | ||
3295 | "list.\n", p->host_no, channel, target, lun); | ||
3296 | if (p->flags & AHC_PAGESCBS) | ||
3297 | { | ||
3298 | unsigned char next, prev, scb_index; | ||
3299 | |||
3300 | next = aic_inb(p, DISCONNECTED_SCBH); | ||
3301 | prev = SCB_LIST_NULL; | ||
3302 | while (next != SCB_LIST_NULL) | ||
3303 | { | ||
3304 | aic_outb(p, next, SCBPTR); | ||
3305 | scb_index = aic_inb(p, SCB_TAG); | ||
3306 | if (scb_index > p->scb_data->numscbs) | ||
3307 | { | ||
3308 | printk(WARN_LEAD "Disconnected List inconsistency; SCB index=%d, " | ||
3309 | "numscbs=%d\n", p->host_no, channel, target, lun, scb_index, | ||
3310 | p->scb_data->numscbs); | ||
3311 | next = aic7xxx_rem_scb_from_disc_list(p, next, prev); | ||
3312 | } | ||
3313 | else | ||
3314 | { | ||
3315 | scbp = p->scb_data->scb_array[scb_index]; | ||
3316 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag)) | ||
3317 | { | ||
3318 | next = aic7xxx_rem_scb_from_disc_list(p, next, prev); | ||
3319 | if (scbp->flags & SCB_WAITINGQ) | ||
3320 | { | ||
3321 | AIC_DEV(scbp->cmd)->active_cmds++; | ||
3322 | p->activescbs++; | ||
3323 | } | ||
3324 | scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); | ||
3325 | scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; | ||
3326 | scbp->hscb->control = 0; | ||
3327 | } | ||
3328 | else | ||
3329 | { | ||
3330 | prev = next; | ||
3331 | next = aic_inb(p, SCB_NEXT); | ||
3332 | } | ||
3333 | } | ||
3334 | } | ||
3335 | } | ||
3336 | |||
3337 | /* | ||
3338 | * Walk the free list making sure no entries on the free list have | ||
3339 | * a valid SCB_TAG value or SCB_CONTROL byte. | ||
3340 | */ | ||
3341 | if (p->flags & AHC_PAGESCBS) | ||
3342 | { | ||
3343 | unsigned char next; | ||
3344 | |||
3345 | next = aic_inb(p, FREE_SCBH); | ||
3346 | while (next != SCB_LIST_NULL) | ||
3347 | { | ||
3348 | aic_outb(p, next, SCBPTR); | ||
3349 | if (aic_inb(p, SCB_TAG) < p->scb_data->numscbs) | ||
3350 | { | ||
3351 | printk(WARN_LEAD "Free list inconsistency!.\n", p->host_no, channel, | ||
3352 | target, lun); | ||
3353 | init_lists = TRUE; | ||
3354 | next = SCB_LIST_NULL; | ||
3355 | } | ||
3356 | else | ||
3357 | { | ||
3358 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); | ||
3359 | aic_outb(p, 0, SCB_CONTROL); | ||
3360 | next = aic_inb(p, SCB_NEXT); | ||
3361 | } | ||
3362 | } | ||
3363 | } | ||
3364 | |||
3365 | /* | ||
3366 | * Go through the hardware SCB array looking for commands that | ||
3367 | * were active but not on any list. | ||
3368 | */ | ||
3369 | if (init_lists) | ||
3370 | { | ||
3371 | aic_outb(p, SCB_LIST_NULL, FREE_SCBH); | ||
3372 | aic_outb(p, SCB_LIST_NULL, WAITING_SCBH); | ||
3373 | aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH); | ||
3374 | } | ||
3375 | for (i = p->scb_data->maxhscbs - 1; i >= 0; i--) | ||
3376 | { | ||
3377 | unsigned char scbid; | ||
3378 | |||
3379 | aic_outb(p, i, SCBPTR); | ||
3380 | if (init_lists) | ||
3381 | { | ||
3382 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); | ||
3383 | aic_outb(p, SCB_LIST_NULL, SCB_NEXT); | ||
3384 | aic_outb(p, 0, SCB_CONTROL); | ||
3385 | aic7xxx_add_curscb_to_free_list(p); | ||
3386 | } | ||
3387 | else | ||
3388 | { | ||
3389 | scbid = aic_inb(p, SCB_TAG); | ||
3390 | if (scbid < p->scb_data->numscbs) | ||
3391 | { | ||
3392 | scbp = p->scb_data->scb_array[scbid]; | ||
3393 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag)) | ||
3394 | { | ||
3395 | aic_outb(p, 0, SCB_CONTROL); | ||
3396 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); | ||
3397 | aic7xxx_add_curscb_to_free_list(p); | ||
3398 | } | ||
3399 | } | ||
3400 | } | ||
3401 | } | ||
3402 | |||
3403 | /* | ||
3404 | * Go through the entire SCB array now and look for commands for | ||
3405 | * for this target that are stillactive. These are other (most likely | ||
3406 | * tagged) commands that were disconnected when the reset occurred. | ||
3407 | * Any commands we find here we know this about, it wasn't on any queue, | ||
3408 | * it wasn't in the qinfifo, it wasn't in the disconnected or waiting | ||
3409 | * lists, so it really must have been a paged out SCB. In that case, | ||
3410 | * we shouldn't need to bother with updating any counters, just mark | ||
3411 | * the correct flags and go on. | ||
3412 | */ | ||
3413 | for (i = 0; i < p->scb_data->numscbs; i++) | ||
3414 | { | ||
3415 | scbp = p->scb_data->scb_array[i]; | ||
3416 | if ((scbp->flags & SCB_ACTIVE) && | ||
3417 | aic7xxx_match_scb(p, scbp, target, channel, lun, tag) && | ||
3418 | !aic7xxx_scb_on_qoutfifo(p, scbp)) | ||
3419 | { | ||
3420 | if (scbp->flags & SCB_WAITINGQ) | ||
3421 | { | ||
3422 | scbq_remove(&p->waiting_scbs, scbp); | ||
3423 | scbq_remove(&AIC_DEV(scbp->cmd)->delayed_scbs, scbp); | ||
3424 | AIC_DEV(scbp->cmd)->active_cmds++; | ||
3425 | p->activescbs++; | ||
3426 | } | ||
3427 | scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; | ||
3428 | scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); | ||
3429 | } | ||
3430 | } | ||
3431 | |||
3432 | aic_outb(p, active_scb, SCBPTR); | ||
3433 | } | ||
3434 | |||
3435 | |||
3436 | /*+F************************************************************************* | ||
3437 | * Function: | ||
3438 | * aic7xxx_clear_intstat | ||
3439 | * | ||
3440 | * Description: | ||
3441 | * Clears the interrupt status. | ||
3442 | *-F*************************************************************************/ | ||
3443 | static void | ||
3444 | aic7xxx_clear_intstat(struct aic7xxx_host *p) | ||
3445 | { | ||
3446 | /* Clear any interrupt conditions this may have caused. */ | ||
3447 | aic_outb(p, CLRSELDO | CLRSELDI | CLRSELINGO, CLRSINT0); | ||
3448 | aic_outb(p, CLRSELTIMEO | CLRATNO | CLRSCSIRSTI | CLRBUSFREE | CLRSCSIPERR | | ||
3449 | CLRPHASECHG | CLRREQINIT, CLRSINT1); | ||
3450 | aic_outb(p, CLRSCSIINT | CLRSEQINT | CLRBRKADRINT | CLRPARERR, CLRINT); | ||
3451 | } | ||
3452 | |||
3453 | /*+F************************************************************************* | ||
3454 | * Function: | ||
3455 | * aic7xxx_reset_current_bus | ||
3456 | * | ||
3457 | * Description: | ||
3458 | * Reset the current SCSI bus. | ||
3459 | *-F*************************************************************************/ | ||
3460 | static void | ||
3461 | aic7xxx_reset_current_bus(struct aic7xxx_host *p) | ||
3462 | { | ||
3463 | |||
3464 | /* Disable reset interrupts. */ | ||
3465 | aic_outb(p, aic_inb(p, SIMODE1) & ~ENSCSIRST, SIMODE1); | ||
3466 | |||
3467 | /* Turn off the bus' current operations, after all, we shouldn't have any | ||
3468 | * valid commands left to cause a RSELI and SELO once we've tossed the | ||
3469 | * bus away with this reset, so we might as well shut down the sequencer | ||
3470 | * until the bus is restarted as opposed to saving the current settings | ||
3471 | * and restoring them (which makes no sense to me). */ | ||
3472 | |||
3473 | /* Turn on the bus reset. */ | ||
3474 | aic_outb(p, aic_inb(p, SCSISEQ) | SCSIRSTO, SCSISEQ); | ||
3475 | while ( (aic_inb(p, SCSISEQ) & SCSIRSTO) == 0) | ||
3476 | mdelay(5); | ||
3477 | |||
3478 | /* | ||
3479 | * Some of the new Ultra2 chipsets need a longer delay after a chip | ||
3480 | * reset than just the init setup creates, so we have to delay here | ||
3481 | * before we go into a reset in order to make the chips happy. | ||
3482 | */ | ||
3483 | if (p->features & AHC_ULTRA2) | ||
3484 | mdelay(250); | ||
3485 | else | ||
3486 | mdelay(50); | ||
3487 | |||
3488 | /* Turn off the bus reset. */ | ||
3489 | aic_outb(p, 0, SCSISEQ); | ||
3490 | mdelay(10); | ||
3491 | |||
3492 | aic7xxx_clear_intstat(p); | ||
3493 | /* Re-enable reset interrupts. */ | ||
3494 | aic_outb(p, aic_inb(p, SIMODE1) | ENSCSIRST, SIMODE1); | ||
3495 | |||
3496 | } | ||
3497 | |||
3498 | /*+F************************************************************************* | ||
3499 | * Function: | ||
3500 | * aic7xxx_reset_channel | ||
3501 | * | ||
3502 | * Description: | ||
3503 | * Reset the channel. | ||
3504 | *-F*************************************************************************/ | ||
3505 | static void | ||
3506 | aic7xxx_reset_channel(struct aic7xxx_host *p, int channel, int initiate_reset) | ||
3507 | { | ||
3508 | unsigned long offset_min, offset_max; | ||
3509 | unsigned char sblkctl; | ||
3510 | int cur_channel; | ||
3511 | |||
3512 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) | ||
3513 | printk(INFO_LEAD "Reset channel called, %s initiate reset.\n", | ||
3514 | p->host_no, channel, -1, -1, (initiate_reset==TRUE) ? "will" : "won't" ); | ||
3515 | |||
3516 | |||
3517 | if (channel == 1) | ||
3518 | { | ||
3519 | offset_min = 8; | ||
3520 | offset_max = 16; | ||
3521 | } | ||
3522 | else | ||
3523 | { | ||
3524 | if (p->features & AHC_TWIN) | ||
3525 | { | ||
3526 | /* Channel A */ | ||
3527 | offset_min = 0; | ||
3528 | offset_max = 8; | ||
3529 | } | ||
3530 | else | ||
3531 | { | ||
3532 | offset_min = 0; | ||
3533 | if (p->features & AHC_WIDE) | ||
3534 | { | ||
3535 | offset_max = 16; | ||
3536 | } | ||
3537 | else | ||
3538 | { | ||
3539 | offset_max = 8; | ||
3540 | } | ||
3541 | } | ||
3542 | } | ||
3543 | |||
3544 | while (offset_min < offset_max) | ||
3545 | { | ||
3546 | /* | ||
3547 | * Revert to async/narrow transfers until we renegotiate. | ||
3548 | */ | ||
3549 | aic_outb(p, 0, TARG_SCSIRATE + offset_min); | ||
3550 | if (p->features & AHC_ULTRA2) | ||
3551 | { | ||
3552 | aic_outb(p, 0, TARG_OFFSET + offset_min); | ||
3553 | } | ||
3554 | offset_min++; | ||
3555 | } | ||
3556 | |||
3557 | /* | ||
3558 | * Reset the bus and unpause/restart the controller | ||
3559 | */ | ||
3560 | sblkctl = aic_inb(p, SBLKCTL); | ||
3561 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) | ||
3562 | cur_channel = (sblkctl & SELBUSB) >> 3; | ||
3563 | else | ||
3564 | cur_channel = 0; | ||
3565 | if ( (cur_channel != channel) && (p->features & AHC_TWIN) ) | ||
3566 | { | ||
3567 | /* | ||
3568 | * Case 1: Command for another bus is active | ||
3569 | */ | ||
3570 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) | ||
3571 | printk(INFO_LEAD "Stealthily resetting idle channel.\n", p->host_no, | ||
3572 | channel, -1, -1); | ||
3573 | /* | ||
3574 | * Stealthily reset the other bus without upsetting the current bus. | ||
3575 | */ | ||
3576 | aic_outb(p, sblkctl ^ SELBUSB, SBLKCTL); | ||
3577 | aic_outb(p, aic_inb(p, SIMODE1) & ~ENBUSFREE, SIMODE1); | ||
3578 | if (initiate_reset) | ||
3579 | { | ||
3580 | aic7xxx_reset_current_bus(p); | ||
3581 | } | ||
3582 | aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ); | ||
3583 | aic7xxx_clear_intstat(p); | ||
3584 | aic_outb(p, sblkctl, SBLKCTL); | ||
3585 | } | ||
3586 | else | ||
3587 | { | ||
3588 | /* | ||
3589 | * Case 2: A command from this bus is active or we're idle. | ||
3590 | */ | ||
3591 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) | ||
3592 | printk(INFO_LEAD "Resetting currently active channel.\n", p->host_no, | ||
3593 | channel, -1, -1); | ||
3594 | aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT), | ||
3595 | SIMODE1); | ||
3596 | p->flags &= ~AHC_HANDLING_REQINITS; | ||
3597 | p->msg_type = MSG_TYPE_NONE; | ||
3598 | p->msg_len = 0; | ||
3599 | if (initiate_reset) | ||
3600 | { | ||
3601 | aic7xxx_reset_current_bus(p); | ||
3602 | } | ||
3603 | aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ); | ||
3604 | aic7xxx_clear_intstat(p); | ||
3605 | } | ||
3606 | if (aic7xxx_verbose & VERBOSE_RESET_RETURN) | ||
3607 | printk(INFO_LEAD "Channel reset\n", p->host_no, channel, -1, -1); | ||
3608 | /* | ||
3609 | * Clean up all the state information for the pending transactions | ||
3610 | * on this bus. | ||
3611 | */ | ||
3612 | aic7xxx_reset_device(p, ALL_TARGETS, channel, ALL_LUNS, SCB_LIST_NULL); | ||
3613 | |||
3614 | if ( !(p->features & AHC_TWIN) ) | ||
3615 | { | ||
3616 | restart_sequencer(p); | ||
3617 | } | ||
3618 | |||
3619 | return; | ||
3620 | } | ||
3621 | |||
3622 | /*+F************************************************************************* | ||
3623 | * Function: | ||
3624 | * aic7xxx_run_waiting_queues | ||
3625 | * | ||
3626 | * Description: | ||
3627 | * Scan the awaiting_scbs queue downloading and starting as many | ||
3628 | * scbs as we can. | ||
3629 | *-F*************************************************************************/ | ||
3630 | static void | ||
3631 | aic7xxx_run_waiting_queues(struct aic7xxx_host *p) | ||
3632 | { | ||
3633 | struct aic7xxx_scb *scb; | ||
3634 | struct aic_dev_data *aic_dev; | ||
3635 | int sent; | ||
3636 | |||
3637 | |||
3638 | if (p->waiting_scbs.head == NULL) | ||
3639 | return; | ||
3640 | |||
3641 | sent = 0; | ||
3642 | |||
3643 | /* | ||
3644 | * First handle SCBs that are waiting but have been assigned a slot. | ||
3645 | */ | ||
3646 | while ((scb = scbq_remove_head(&p->waiting_scbs)) != NULL) | ||
3647 | { | ||
3648 | aic_dev = scb->cmd->device->hostdata; | ||
3649 | if ( !scb->tag_action ) | ||
3650 | { | ||
3651 | aic_dev->temp_q_depth = 1; | ||
3652 | } | ||
3653 | if ( aic_dev->active_cmds >= aic_dev->temp_q_depth) | ||
3654 | { | ||
3655 | scbq_insert_tail(&aic_dev->delayed_scbs, scb); | ||
3656 | } | ||
3657 | else | ||
3658 | { | ||
3659 | scb->flags &= ~SCB_WAITINGQ; | ||
3660 | aic_dev->active_cmds++; | ||
3661 | p->activescbs++; | ||
3662 | if ( !(scb->tag_action) ) | ||
3663 | { | ||
3664 | aic7xxx_busy_target(p, scb); | ||
3665 | } | ||
3666 | p->qinfifo[p->qinfifonext++] = scb->hscb->tag; | ||
3667 | sent++; | ||
3668 | } | ||
3669 | } | ||
3670 | if (sent) | ||
3671 | { | ||
3672 | if (p->features & AHC_QUEUE_REGS) | ||
3673 | aic_outb(p, p->qinfifonext, HNSCB_QOFF); | ||
3674 | else | ||
3675 | { | ||
3676 | pause_sequencer(p); | ||
3677 | aic_outb(p, p->qinfifonext, KERNEL_QINPOS); | ||
3678 | unpause_sequencer(p, FALSE); | ||
3679 | } | ||
3680 | if (p->activescbs > p->max_activescbs) | ||
3681 | p->max_activescbs = p->activescbs; | ||
3682 | } | ||
3683 | } | ||
3684 | |||
3685 | #ifdef CONFIG_PCI | ||
3686 | |||
3687 | #define DPE 0x80 | ||
3688 | #define SSE 0x40 | ||
3689 | #define RMA 0x20 | ||
3690 | #define RTA 0x10 | ||
3691 | #define STA 0x08 | ||
3692 | #define DPR 0x01 | ||
3693 | |||
3694 | /*+F************************************************************************* | ||
3695 | * Function: | ||
3696 | * aic7xxx_pci_intr | ||
3697 | * | ||
3698 | * Description: | ||
3699 | * Check the scsi card for PCI errors and clear the interrupt | ||
3700 | * | ||
3701 | * NOTE: If you don't have this function and a 2940 card encounters | ||
3702 | * a PCI error condition, the machine will end up locked as the | ||
3703 | * interrupt handler gets slammed with non-stop PCI error interrupts | ||
3704 | *-F*************************************************************************/ | ||
3705 | static void | ||
3706 | aic7xxx_pci_intr(struct aic7xxx_host *p) | ||
3707 | { | ||
3708 | unsigned char status1; | ||
3709 | |||
3710 | pci_read_config_byte(p->pdev, PCI_STATUS + 1, &status1); | ||
3711 | |||
3712 | if ( (status1 & DPE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) | ||
3713 | printk(WARN_LEAD "Data Parity Error during PCI address or PCI write" | ||
3714 | "phase.\n", p->host_no, -1, -1, -1); | ||
3715 | if ( (status1 & SSE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) | ||
3716 | printk(WARN_LEAD "Signal System Error Detected\n", p->host_no, | ||
3717 | -1, -1, -1); | ||
3718 | if ( (status1 & RMA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) | ||
3719 | printk(WARN_LEAD "Received a PCI Master Abort\n", p->host_no, | ||
3720 | -1, -1, -1); | ||
3721 | if ( (status1 & RTA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) | ||
3722 | printk(WARN_LEAD "Received a PCI Target Abort\n", p->host_no, | ||
3723 | -1, -1, -1); | ||
3724 | if ( (status1 & STA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) | ||
3725 | printk(WARN_LEAD "Signaled a PCI Target Abort\n", p->host_no, | ||
3726 | -1, -1, -1); | ||
3727 | if ( (status1 & DPR) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) | ||
3728 | printk(WARN_LEAD "Data Parity Error has been reported via PCI pin " | ||
3729 | "PERR#\n", p->host_no, -1, -1, -1); | ||
3730 | |||
3731 | pci_write_config_byte(p->pdev, PCI_STATUS + 1, status1); | ||
3732 | if (status1 & (DPR|RMA|RTA)) | ||
3733 | aic_outb(p, CLRPARERR, CLRINT); | ||
3734 | |||
3735 | if ( (aic7xxx_panic_on_abort) && (p->spurious_int > 500) ) | ||
3736 | aic7xxx_panic_abort(p, NULL); | ||
3737 | |||
3738 | } | ||
3739 | #endif /* CONFIG_PCI */ | ||
3740 | |||
3741 | /*+F************************************************************************* | ||
3742 | * Function: | ||
3743 | * aic7xxx_construct_ppr | ||
3744 | * | ||
3745 | * Description: | ||
3746 | * Build up a Parallel Protocol Request message for use with SCSI-3 | ||
3747 | * devices. | ||
3748 | *-F*************************************************************************/ | ||
3749 | static void | ||
3750 | aic7xxx_construct_ppr(struct aic7xxx_host *p, struct aic7xxx_scb *scb) | ||
3751 | { | ||
3752 | p->msg_buf[p->msg_index++] = MSG_EXTENDED; | ||
3753 | p->msg_buf[p->msg_index++] = MSG_EXT_PPR_LEN; | ||
3754 | p->msg_buf[p->msg_index++] = MSG_EXT_PPR; | ||
3755 | p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.period; | ||
3756 | p->msg_buf[p->msg_index++] = 0; | ||
3757 | p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.offset; | ||
3758 | p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.width; | ||
3759 | p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.options; | ||
3760 | p->msg_len += 8; | ||
3761 | } | ||
3762 | |||
3763 | /*+F************************************************************************* | ||
3764 | * Function: | ||
3765 | * aic7xxx_construct_sdtr | ||
3766 | * | ||
3767 | * Description: | ||
3768 | * Constucts a synchronous data transfer message in the message | ||
3769 | * buffer on the sequencer. | ||
3770 | *-F*************************************************************************/ | ||
3771 | static void | ||
3772 | aic7xxx_construct_sdtr(struct aic7xxx_host *p, unsigned char period, | ||
3773 | unsigned char offset) | ||
3774 | { | ||
3775 | p->msg_buf[p->msg_index++] = MSG_EXTENDED; | ||
3776 | p->msg_buf[p->msg_index++] = MSG_EXT_SDTR_LEN; | ||
3777 | p->msg_buf[p->msg_index++] = MSG_EXT_SDTR; | ||
3778 | p->msg_buf[p->msg_index++] = period; | ||
3779 | p->msg_buf[p->msg_index++] = offset; | ||
3780 | p->msg_len += 5; | ||
3781 | } | ||
3782 | |||
3783 | /*+F************************************************************************* | ||
3784 | * Function: | ||
3785 | * aic7xxx_construct_wdtr | ||
3786 | * | ||
3787 | * Description: | ||
3788 | * Constucts a wide data transfer message in the message buffer | ||
3789 | * on the sequencer. | ||
3790 | *-F*************************************************************************/ | ||
3791 | static void | ||
3792 | aic7xxx_construct_wdtr(struct aic7xxx_host *p, unsigned char bus_width) | ||
3793 | { | ||
3794 | p->msg_buf[p->msg_index++] = MSG_EXTENDED; | ||
3795 | p->msg_buf[p->msg_index++] = MSG_EXT_WDTR_LEN; | ||
3796 | p->msg_buf[p->msg_index++] = MSG_EXT_WDTR; | ||
3797 | p->msg_buf[p->msg_index++] = bus_width; | ||
3798 | p->msg_len += 4; | ||
3799 | } | ||
3800 | |||
3801 | /*+F************************************************************************* | ||
3802 | * Function: | ||
3803 | * aic7xxx_calc_residual | ||
3804 | * | ||
3805 | * Description: | ||
3806 | * Calculate the residual data not yet transferred. | ||
3807 | *-F*************************************************************************/ | ||
3808 | static void | ||
3809 | aic7xxx_calculate_residual (struct aic7xxx_host *p, struct aic7xxx_scb *scb) | ||
3810 | { | ||
3811 | struct aic7xxx_hwscb *hscb; | ||
3812 | struct scsi_cmnd *cmd; | ||
3813 | int actual, i; | ||
3814 | |||
3815 | cmd = scb->cmd; | ||
3816 | hscb = scb->hscb; | ||
3817 | |||
3818 | /* | ||
3819 | * Don't destroy valid residual information with | ||
3820 | * residual coming from a check sense operation. | ||
3821 | */ | ||
3822 | if (((scb->hscb->control & DISCONNECTED) == 0) && | ||
3823 | (scb->flags & SCB_SENSE) == 0) | ||
3824 | { | ||
3825 | /* | ||
3826 | * We had an underflow. At this time, there's only | ||
3827 | * one other driver that bothers to check for this, | ||
3828 | * and cmd->underflow seems to be set rather half- | ||
3829 | * heartedly in the higher-level SCSI code. | ||
3830 | */ | ||
3831 | actual = scb->sg_length; | ||
3832 | for (i=1; i < hscb->residual_SG_segment_count; i++) | ||
3833 | { | ||
3834 | actual -= scb->sg_list[scb->sg_count - i].length; | ||
3835 | } | ||
3836 | actual -= (hscb->residual_data_count[2] << 16) | | ||
3837 | (hscb->residual_data_count[1] << 8) | | ||
3838 | hscb->residual_data_count[0]; | ||
3839 | |||
3840 | if (actual < cmd->underflow) | ||
3841 | { | ||
3842 | if (aic7xxx_verbose & VERBOSE_MINOR_ERROR) | ||
3843 | { | ||
3844 | printk(INFO_LEAD "Underflow - Wanted %u, %s %u, residual SG " | ||
3845 | "count %d.\n", p->host_no, CTL_OF_SCB(scb), cmd->underflow, | ||
3846 | (rq_data_dir(cmd->request) == WRITE) ? "wrote" : "read", actual, | ||
3847 | hscb->residual_SG_segment_count); | ||
3848 | printk(INFO_LEAD "status 0x%x.\n", p->host_no, CTL_OF_SCB(scb), | ||
3849 | hscb->target_status); | ||
3850 | } | ||
3851 | /* | ||
3852 | * In 2.4, only send back the residual information, don't flag this | ||
3853 | * as an error. Before 2.4 we had to flag this as an error because | ||
3854 | * the mid layer didn't check residual data counts to see if the | ||
3855 | * command needs retried. | ||
3856 | */ | ||
3857 | scsi_set_resid(cmd, scb->sg_length - actual); | ||
3858 | aic7xxx_status(cmd) = hscb->target_status; | ||
3859 | } | ||
3860 | } | ||
3861 | |||
3862 | /* | ||
3863 | * Clean out the residual information in the SCB for the | ||
3864 | * next consumer. | ||
3865 | */ | ||
3866 | hscb->residual_data_count[2] = 0; | ||
3867 | hscb->residual_data_count[1] = 0; | ||
3868 | hscb->residual_data_count[0] = 0; | ||
3869 | hscb->residual_SG_segment_count = 0; | ||
3870 | } | ||
3871 | |||
3872 | /*+F************************************************************************* | ||
3873 | * Function: | ||
3874 | * aic7xxx_handle_device_reset | ||
3875 | * | ||
3876 | * Description: | ||
3877 | * Interrupt handler for sequencer interrupts (SEQINT). | ||
3878 | *-F*************************************************************************/ | ||
3879 | static void | ||
3880 | aic7xxx_handle_device_reset(struct aic7xxx_host *p, int target, int channel) | ||
3881 | { | ||
3882 | unsigned char tindex = target; | ||
3883 | |||
3884 | tindex |= ((channel & 0x01) << 3); | ||
3885 | |||
3886 | /* | ||
3887 | * Go back to async/narrow transfers and renegotiate. | ||
3888 | */ | ||
3889 | aic_outb(p, 0, TARG_SCSIRATE + tindex); | ||
3890 | if (p->features & AHC_ULTRA2) | ||
3891 | aic_outb(p, 0, TARG_OFFSET + tindex); | ||
3892 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL); | ||
3893 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) | ||
3894 | printk(INFO_LEAD "Bus Device Reset delivered.\n", p->host_no, channel, | ||
3895 | target, -1); | ||
3896 | aic7xxx_run_done_queue(p, /*complete*/ TRUE); | ||
3897 | } | ||
3898 | |||
3899 | /*+F************************************************************************* | ||
3900 | * Function: | ||
3901 | * aic7xxx_handle_seqint | ||
3902 | * | ||
3903 | * Description: | ||
3904 | * Interrupt handler for sequencer interrupts (SEQINT). | ||
3905 | *-F*************************************************************************/ | ||
3906 | static void | ||
3907 | aic7xxx_handle_seqint(struct aic7xxx_host *p, unsigned char intstat) | ||
3908 | { | ||
3909 | struct aic7xxx_scb *scb; | ||
3910 | struct aic_dev_data *aic_dev; | ||
3911 | unsigned short target_mask; | ||
3912 | unsigned char target, lun, tindex; | ||
3913 | unsigned char queue_flag = FALSE; | ||
3914 | char channel; | ||
3915 | int result; | ||
3916 | |||
3917 | target = ((aic_inb(p, SAVED_TCL) >> 4) & 0x0f); | ||
3918 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) | ||
3919 | channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3; | ||
3920 | else | ||
3921 | channel = 0; | ||
3922 | tindex = target + (channel << 3); | ||
3923 | lun = aic_inb(p, SAVED_TCL) & 0x07; | ||
3924 | target_mask = (0x01 << tindex); | ||
3925 | |||
3926 | /* | ||
3927 | * Go ahead and clear the SEQINT now, that avoids any interrupt race | ||
3928 | * conditions later on in case we enable some other interrupt. | ||
3929 | */ | ||
3930 | aic_outb(p, CLRSEQINT, CLRINT); | ||
3931 | switch (intstat & SEQINT_MASK) | ||
3932 | { | ||
3933 | case NO_MATCH: | ||
3934 | { | ||
3935 | aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), | ||
3936 | SCSISEQ); | ||
3937 | printk(WARN_LEAD "No active SCB for reconnecting target - Issuing " | ||
3938 | "BUS DEVICE RESET.\n", p->host_no, channel, target, lun); | ||
3939 | printk(WARN_LEAD " SAVED_TCL=0x%x, ARG_1=0x%x, SEQADDR=0x%x\n", | ||
3940 | p->host_no, channel, target, lun, | ||
3941 | aic_inb(p, SAVED_TCL), aic_inb(p, ARG_1), | ||
3942 | (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0)); | ||
3943 | if (aic7xxx_panic_on_abort) | ||
3944 | aic7xxx_panic_abort(p, NULL); | ||
3945 | } | ||
3946 | break; | ||
3947 | |||
3948 | case SEND_REJECT: | ||
3949 | { | ||
3950 | if (aic7xxx_verbose & VERBOSE_MINOR_ERROR) | ||
3951 | printk(INFO_LEAD "Rejecting unknown message (0x%x) received from " | ||
3952 | "target, SEQ_FLAGS=0x%x\n", p->host_no, channel, target, lun, | ||
3953 | aic_inb(p, ACCUM), aic_inb(p, SEQ_FLAGS)); | ||
3954 | } | ||
3955 | break; | ||
3956 | |||
3957 | case NO_IDENT: | ||
3958 | { | ||
3959 | /* | ||
3960 | * The reconnecting target either did not send an identify | ||
3961 | * message, or did, but we didn't find an SCB to match and | ||
3962 | * before it could respond to our ATN/abort, it hit a dataphase. | ||
3963 | * The only safe thing to do is to blow it away with a bus | ||
3964 | * reset. | ||
3965 | */ | ||
3966 | if (aic7xxx_verbose & (VERBOSE_SEQINT | VERBOSE_RESET_MID)) | ||
3967 | printk(INFO_LEAD "Target did not send an IDENTIFY message; " | ||
3968 | "LASTPHASE 0x%x, SAVED_TCL 0x%x\n", p->host_no, channel, target, | ||
3969 | lun, aic_inb(p, LASTPHASE), aic_inb(p, SAVED_TCL)); | ||
3970 | |||
3971 | aic7xxx_reset_channel(p, channel, /*initiate reset*/ TRUE); | ||
3972 | aic7xxx_run_done_queue(p, TRUE); | ||
3973 | |||
3974 | } | ||
3975 | break; | ||
3976 | |||
3977 | case BAD_PHASE: | ||
3978 | if (aic_inb(p, LASTPHASE) == P_BUSFREE) | ||
3979 | { | ||
3980 | if (aic7xxx_verbose & VERBOSE_SEQINT) | ||
3981 | printk(INFO_LEAD "Missed busfree.\n", p->host_no, channel, | ||
3982 | target, lun); | ||
3983 | restart_sequencer(p); | ||
3984 | } | ||
3985 | else | ||
3986 | { | ||
3987 | if (aic7xxx_verbose & VERBOSE_SEQINT) | ||
3988 | printk(INFO_LEAD "Unknown scsi bus phase, continuing\n", p->host_no, | ||
3989 | channel, target, lun); | ||
3990 | } | ||
3991 | break; | ||
3992 | |||
3993 | case EXTENDED_MSG: | ||
3994 | { | ||
3995 | p->msg_type = MSG_TYPE_INITIATOR_MSGIN; | ||
3996 | p->msg_len = 0; | ||
3997 | p->msg_index = 0; | ||
3998 | |||
3999 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
4000 | if (aic7xxx_verbose > 0xffff) | ||
4001 | printk(INFO_LEAD "Enabling REQINITs for MSG_IN\n", p->host_no, | ||
4002 | channel, target, lun); | ||
4003 | #endif | ||
4004 | |||
4005 | /* | ||
4006 | * To actually receive the message, simply turn on | ||
4007 | * REQINIT interrupts and let our interrupt handler | ||
4008 | * do the rest (REQINIT should already be true). | ||
4009 | */ | ||
4010 | p->flags |= AHC_HANDLING_REQINITS; | ||
4011 | aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1); | ||
4012 | |||
4013 | /* | ||
4014 | * We don't want the sequencer unpaused yet so we return early | ||
4015 | */ | ||
4016 | return; | ||
4017 | } | ||
4018 | |||
4019 | case REJECT_MSG: | ||
4020 | { | ||
4021 | /* | ||
4022 | * What we care about here is if we had an outstanding SDTR | ||
4023 | * or WDTR message for this target. If we did, this is a | ||
4024 | * signal that the target is refusing negotiation. | ||
4025 | */ | ||
4026 | unsigned char scb_index; | ||
4027 | unsigned char last_msg; | ||
4028 | |||
4029 | scb_index = aic_inb(p, SCB_TAG); | ||
4030 | scb = p->scb_data->scb_array[scb_index]; | ||
4031 | aic_dev = AIC_DEV(scb->cmd); | ||
4032 | last_msg = aic_inb(p, LAST_MSG); | ||
4033 | |||
4034 | if ( (last_msg == MSG_IDENTIFYFLAG) && | ||
4035 | (scb->tag_action) && | ||
4036 | !(scb->flags & SCB_MSGOUT_BITS) ) | ||
4037 | { | ||
4038 | if (scb->tag_action == MSG_ORDERED_Q_TAG) | ||
4039 | { | ||
4040 | /* | ||
4041 | * OK...the device seems able to accept tagged commands, but | ||
4042 | * not ordered tag commands, only simple tag commands. So, we | ||
4043 | * disable ordered tag commands and go on with life just like | ||
4044 | * normal. | ||
4045 | */ | ||
4046 | scsi_adjust_queue_depth(scb->cmd->device, MSG_SIMPLE_TAG, | ||
4047 | scb->cmd->device->queue_depth); | ||
4048 | scb->tag_action = MSG_SIMPLE_Q_TAG; | ||
4049 | scb->hscb->control &= ~SCB_TAG_TYPE; | ||
4050 | scb->hscb->control |= MSG_SIMPLE_Q_TAG; | ||
4051 | aic_outb(p, scb->hscb->control, SCB_CONTROL); | ||
4052 | /* | ||
4053 | * OK..we set the tag type to simple tag command, now we re-assert | ||
4054 | * ATNO and hope this will take us into the identify phase again | ||
4055 | * so we can resend the tag type and info to the device. | ||
4056 | */ | ||
4057 | aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT); | ||
4058 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); | ||
4059 | } | ||
4060 | else if (scb->tag_action == MSG_SIMPLE_Q_TAG) | ||
4061 | { | ||
4062 | unsigned char i; | ||
4063 | struct aic7xxx_scb *scbp; | ||
4064 | int old_verbose; | ||
4065 | /* | ||
4066 | * Hmmmm....the device is flaking out on tagged commands. | ||
4067 | */ | ||
4068 | scsi_adjust_queue_depth(scb->cmd->device, 0 /* untagged */, | ||
4069 | p->host->cmd_per_lun); | ||
4070 | aic_dev->max_q_depth = aic_dev->temp_q_depth = 1; | ||
4071 | /* | ||
4072 | * We set this command up as a bus device reset. However, we have | ||
4073 | * to clear the tag type as it's causing us problems. We shouldn't | ||
4074 | * have to worry about any other commands being active, since if | ||
4075 | * the device is refusing tagged commands, this should be the | ||
4076 | * first tagged command sent to the device, however, we do have | ||
4077 | * to worry about any other tagged commands that may already be | ||
4078 | * in the qinfifo. The easiest way to do this, is to issue a BDR, | ||
4079 | * send all the commands back to the mid level code, then let them | ||
4080 | * come back and get rebuilt as untagged commands. | ||
4081 | */ | ||
4082 | scb->tag_action = 0; | ||
4083 | scb->hscb->control &= ~(TAG_ENB | SCB_TAG_TYPE); | ||
4084 | aic_outb(p, scb->hscb->control, SCB_CONTROL); | ||
4085 | |||
4086 | old_verbose = aic7xxx_verbose; | ||
4087 | aic7xxx_verbose &= ~(VERBOSE_RESET|VERBOSE_ABORT); | ||
4088 | for (i=0; i < p->scb_data->numscbs; i++) | ||
4089 | { | ||
4090 | scbp = p->scb_data->scb_array[i]; | ||
4091 | if ((scbp->flags & SCB_ACTIVE) && (scbp != scb)) | ||
4092 | { | ||
4093 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, i)) | ||
4094 | { | ||
4095 | aic7xxx_reset_device(p, target, channel, lun, i); | ||
4096 | } | ||
4097 | } | ||
4098 | } | ||
4099 | aic7xxx_run_done_queue(p, TRUE); | ||
4100 | aic7xxx_verbose = old_verbose; | ||
4101 | /* | ||
4102 | * Wait until after the for loop to set the busy index since | ||
4103 | * aic7xxx_reset_device will clear the busy index during its | ||
4104 | * operation. | ||
4105 | */ | ||
4106 | aic7xxx_busy_target(p, scb); | ||
4107 | printk(INFO_LEAD "Device is refusing tagged commands, using " | ||
4108 | "untagged I/O.\n", p->host_no, channel, target, lun); | ||
4109 | aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT); | ||
4110 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); | ||
4111 | } | ||
4112 | } | ||
4113 | else if (scb->flags & SCB_MSGOUT_PPR) | ||
4114 | { | ||
4115 | /* | ||
4116 | * As per the draft specs, any device capable of supporting any of | ||
4117 | * the option values other than 0 are not allowed to reject the | ||
4118 | * PPR message. Instead, they must negotiate out what they do | ||
4119 | * support instead of rejecting our offering or else they cause | ||
4120 | * a parity error during msg_out phase to signal that they don't | ||
4121 | * like our settings. | ||
4122 | */ | ||
4123 | aic_dev->needppr = aic_dev->needppr_copy = 0; | ||
4124 | aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT, | ||
4125 | (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE), aic_dev); | ||
4126 | aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0, | ||
4127 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE, | ||
4128 | aic_dev); | ||
4129 | aic_dev->goal.options = aic_dev->dtr_pending = 0; | ||
4130 | scb->flags &= ~SCB_MSGOUT_BITS; | ||
4131 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
4132 | { | ||
4133 | printk(INFO_LEAD "Device is rejecting PPR messages, falling " | ||
4134 | "back.\n", p->host_no, channel, target, lun); | ||
4135 | } | ||
4136 | if ( aic_dev->goal.width ) | ||
4137 | { | ||
4138 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; | ||
4139 | aic_dev->dtr_pending = 1; | ||
4140 | scb->flags |= SCB_MSGOUT_WDTR; | ||
4141 | } | ||
4142 | if ( aic_dev->goal.offset ) | ||
4143 | { | ||
4144 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; | ||
4145 | if( !aic_dev->dtr_pending ) | ||
4146 | { | ||
4147 | aic_dev->dtr_pending = 1; | ||
4148 | scb->flags |= SCB_MSGOUT_SDTR; | ||
4149 | } | ||
4150 | } | ||
4151 | if ( aic_dev->dtr_pending ) | ||
4152 | { | ||
4153 | aic_outb(p, HOST_MSG, MSG_OUT); | ||
4154 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); | ||
4155 | } | ||
4156 | } | ||
4157 | else if (scb->flags & SCB_MSGOUT_WDTR) | ||
4158 | { | ||
4159 | /* | ||
4160 | * note 8bit xfers and clear flag | ||
4161 | */ | ||
4162 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; | ||
4163 | scb->flags &= ~SCB_MSGOUT_BITS; | ||
4164 | aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT, | ||
4165 | (AHC_TRANS_ACTIVE|AHC_TRANS_GOAL|AHC_TRANS_CUR), aic_dev); | ||
4166 | aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0, | ||
4167 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE, | ||
4168 | aic_dev); | ||
4169 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
4170 | { | ||
4171 | printk(INFO_LEAD "Device is rejecting WDTR messages, using " | ||
4172 | "narrow transfers.\n", p->host_no, channel, target, lun); | ||
4173 | } | ||
4174 | aic_dev->needsdtr = aic_dev->needsdtr_copy; | ||
4175 | } | ||
4176 | else if (scb->flags & SCB_MSGOUT_SDTR) | ||
4177 | { | ||
4178 | /* | ||
4179 | * note asynch xfers and clear flag | ||
4180 | */ | ||
4181 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; | ||
4182 | scb->flags &= ~SCB_MSGOUT_BITS; | ||
4183 | aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0, | ||
4184 | (AHC_TRANS_CUR|AHC_TRANS_ACTIVE|AHC_TRANS_GOAL), aic_dev); | ||
4185 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
4186 | { | ||
4187 | printk(INFO_LEAD "Device is rejecting SDTR messages, using " | ||
4188 | "async transfers.\n", p->host_no, channel, target, lun); | ||
4189 | } | ||
4190 | } | ||
4191 | else if (aic7xxx_verbose & VERBOSE_SEQINT) | ||
4192 | { | ||
4193 | /* | ||
4194 | * Otherwise, we ignore it. | ||
4195 | */ | ||
4196 | printk(INFO_LEAD "Received MESSAGE_REJECT for unknown cause. " | ||
4197 | "Ignoring.\n", p->host_no, channel, target, lun); | ||
4198 | } | ||
4199 | } | ||
4200 | break; | ||
4201 | |||
4202 | case BAD_STATUS: | ||
4203 | { | ||
4204 | unsigned char scb_index; | ||
4205 | struct aic7xxx_hwscb *hscb; | ||
4206 | struct scsi_cmnd *cmd; | ||
4207 | |||
4208 | /* The sequencer will notify us when a command has an error that | ||
4209 | * would be of interest to the kernel. This allows us to leave | ||
4210 | * the sequencer running in the common case of command completes | ||
4211 | * without error. The sequencer will have DMA'd the SCB back | ||
4212 | * up to us, so we can reference the drivers SCB array. | ||
4213 | * | ||
4214 | * Set the default return value to 0 indicating not to send | ||
4215 | * sense. The sense code will change this if needed and this | ||
4216 | * reduces code duplication. | ||
4217 | */ | ||
4218 | aic_outb(p, 0, RETURN_1); | ||
4219 | scb_index = aic_inb(p, SCB_TAG); | ||
4220 | if (scb_index > p->scb_data->numscbs) | ||
4221 | { | ||
4222 | printk(WARN_LEAD "Invalid SCB during SEQINT 0x%02x, SCB_TAG %d.\n", | ||
4223 | p->host_no, channel, target, lun, intstat, scb_index); | ||
4224 | break; | ||
4225 | } | ||
4226 | scb = p->scb_data->scb_array[scb_index]; | ||
4227 | hscb = scb->hscb; | ||
4228 | |||
4229 | if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL)) | ||
4230 | { | ||
4231 | printk(WARN_LEAD "Invalid SCB during SEQINT 0x%x, scb %d, flags 0x%x," | ||
4232 | " cmd 0x%lx.\n", p->host_no, channel, target, lun, intstat, | ||
4233 | scb_index, scb->flags, (unsigned long) scb->cmd); | ||
4234 | } | ||
4235 | else | ||
4236 | { | ||
4237 | cmd = scb->cmd; | ||
4238 | aic_dev = AIC_DEV(scb->cmd); | ||
4239 | hscb->target_status = aic_inb(p, SCB_TARGET_STATUS); | ||
4240 | aic7xxx_status(cmd) = hscb->target_status; | ||
4241 | |||
4242 | cmd->result = hscb->target_status; | ||
4243 | |||
4244 | switch (status_byte(hscb->target_status)) | ||
4245 | { | ||
4246 | case GOOD: | ||
4247 | if (aic7xxx_verbose & VERBOSE_SEQINT) | ||
4248 | printk(INFO_LEAD "Interrupted for status of GOOD???\n", | ||
4249 | p->host_no, CTL_OF_SCB(scb)); | ||
4250 | break; | ||
4251 | |||
4252 | case COMMAND_TERMINATED: | ||
4253 | case CHECK_CONDITION: | ||
4254 | if ( !(scb->flags & SCB_SENSE) ) | ||
4255 | { | ||
4256 | /* | ||
4257 | * Send a sense command to the requesting target. | ||
4258 | * XXX - revisit this and get rid of the memcopys. | ||
4259 | */ | ||
4260 | memcpy(scb->sense_cmd, &generic_sense[0], | ||
4261 | sizeof(generic_sense)); | ||
4262 | |||
4263 | scb->sense_cmd[1] = (cmd->device->lun << 5); | ||
4264 | scb->sense_cmd[4] = SCSI_SENSE_BUFFERSIZE; | ||
4265 | |||
4266 | scb->sg_list[0].length = | ||
4267 | cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | ||
4268 | scb->sg_list[0].address = | ||
4269 | cpu_to_le32(pci_map_single(p->pdev, cmd->sense_buffer, | ||
4270 | SCSI_SENSE_BUFFERSIZE, | ||
4271 | PCI_DMA_FROMDEVICE)); | ||
4272 | |||
4273 | /* | ||
4274 | * XXX - We should allow disconnection, but can't as it | ||
4275 | * might allow overlapped tagged commands. | ||
4276 | */ | ||
4277 | /* hscb->control &= DISCENB; */ | ||
4278 | hscb->control = 0; | ||
4279 | hscb->target_status = 0; | ||
4280 | hscb->SG_list_pointer = | ||
4281 | cpu_to_le32(SCB_DMA_ADDR(scb, scb->sg_list)); | ||
4282 | hscb->SCSI_cmd_pointer = | ||
4283 | cpu_to_le32(SCB_DMA_ADDR(scb, scb->sense_cmd)); | ||
4284 | hscb->data_count = scb->sg_list[0].length; | ||
4285 | hscb->data_pointer = scb->sg_list[0].address; | ||
4286 | hscb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]); | ||
4287 | hscb->residual_SG_segment_count = 0; | ||
4288 | hscb->residual_data_count[0] = 0; | ||
4289 | hscb->residual_data_count[1] = 0; | ||
4290 | hscb->residual_data_count[2] = 0; | ||
4291 | |||
4292 | scb->sg_count = hscb->SG_segment_count = 1; | ||
4293 | scb->sg_length = SCSI_SENSE_BUFFERSIZE; | ||
4294 | scb->tag_action = 0; | ||
4295 | scb->flags |= SCB_SENSE; | ||
4296 | /* | ||
4297 | * Ensure the target is busy since this will be an | ||
4298 | * an untagged request. | ||
4299 | */ | ||
4300 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
4301 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
4302 | { | ||
4303 | if (scb->flags & SCB_MSGOUT_BITS) | ||
4304 | printk(INFO_LEAD "Requesting SENSE with %s\n", p->host_no, | ||
4305 | CTL_OF_SCB(scb), (scb->flags & SCB_MSGOUT_SDTR) ? | ||
4306 | "SDTR" : "WDTR"); | ||
4307 | else | ||
4308 | printk(INFO_LEAD "Requesting SENSE, no MSG\n", p->host_no, | ||
4309 | CTL_OF_SCB(scb)); | ||
4310 | } | ||
4311 | #endif | ||
4312 | aic7xxx_busy_target(p, scb); | ||
4313 | aic_outb(p, SEND_SENSE, RETURN_1); | ||
4314 | aic7xxx_error(cmd) = DID_OK; | ||
4315 | break; | ||
4316 | } /* first time sense, no errors */ | ||
4317 | printk(INFO_LEAD "CHECK_CONDITION on REQUEST_SENSE, returning " | ||
4318 | "an error.\n", p->host_no, CTL_OF_SCB(scb)); | ||
4319 | aic7xxx_error(cmd) = DID_ERROR; | ||
4320 | scb->flags &= ~SCB_SENSE; | ||
4321 | break; | ||
4322 | |||
4323 | case QUEUE_FULL: | ||
4324 | queue_flag = TRUE; /* Mark that this is a QUEUE_FULL and */ | ||
4325 | case BUSY: /* drop through to here */ | ||
4326 | { | ||
4327 | struct aic7xxx_scb *next_scbp, *prev_scbp; | ||
4328 | unsigned char active_hscb, next_hscb, prev_hscb, scb_index; | ||
4329 | /* | ||
4330 | * We have to look three places for queued commands: | ||
4331 | * 1: p->waiting_scbs queue | ||
4332 | * 2: QINFIFO | ||
4333 | * 3: WAITING_SCBS list on card (for commands that are started | ||
4334 | * but haven't yet made it to the device) | ||
4335 | * | ||
4336 | * Of special note here is that commands on 2 or 3 above will | ||
4337 | * have already been marked as active, while commands on 1 will | ||
4338 | * not. The aic7xxx_done() function will want to unmark them | ||
4339 | * from active, so any commands we pull off of 1 need to | ||
4340 | * up the active count. | ||
4341 | */ | ||
4342 | next_scbp = p->waiting_scbs.head; | ||
4343 | while ( next_scbp != NULL ) | ||
4344 | { | ||
4345 | prev_scbp = next_scbp; | ||
4346 | next_scbp = next_scbp->q_next; | ||
4347 | if ( aic7xxx_match_scb(p, prev_scbp, target, channel, lun, | ||
4348 | SCB_LIST_NULL) ) | ||
4349 | { | ||
4350 | scbq_remove(&p->waiting_scbs, prev_scbp); | ||
4351 | scb->flags = SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL; | ||
4352 | p->activescbs++; | ||
4353 | aic_dev->active_cmds++; | ||
4354 | } | ||
4355 | } | ||
4356 | aic7xxx_search_qinfifo(p, target, channel, lun, | ||
4357 | SCB_LIST_NULL, SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL, | ||
4358 | FALSE, NULL); | ||
4359 | next_scbp = NULL; | ||
4360 | active_hscb = aic_inb(p, SCBPTR); | ||
4361 | prev_hscb = next_hscb = scb_index = SCB_LIST_NULL; | ||
4362 | next_hscb = aic_inb(p, WAITING_SCBH); | ||
4363 | while (next_hscb != SCB_LIST_NULL) | ||
4364 | { | ||
4365 | aic_outb(p, next_hscb, SCBPTR); | ||
4366 | scb_index = aic_inb(p, SCB_TAG); | ||
4367 | if (scb_index < p->scb_data->numscbs) | ||
4368 | { | ||
4369 | next_scbp = p->scb_data->scb_array[scb_index]; | ||
4370 | if (aic7xxx_match_scb(p, next_scbp, target, channel, lun, | ||
4371 | SCB_LIST_NULL) ) | ||
4372 | { | ||
4373 | next_scbp->flags = SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL; | ||
4374 | next_hscb = aic_inb(p, SCB_NEXT); | ||
4375 | aic_outb(p, 0, SCB_CONTROL); | ||
4376 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); | ||
4377 | aic7xxx_add_curscb_to_free_list(p); | ||
4378 | if (prev_hscb == SCB_LIST_NULL) | ||
4379 | { | ||
4380 | /* We were first on the list, | ||
4381 | * so we kill the selection | ||
4382 | * hardware. Let the sequencer | ||
4383 | * re-init the hardware itself | ||
4384 | */ | ||
4385 | aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ); | ||
4386 | aic_outb(p, CLRSELTIMEO, CLRSINT1); | ||
4387 | aic_outb(p, next_hscb, WAITING_SCBH); | ||
4388 | } | ||
4389 | else | ||
4390 | { | ||
4391 | aic_outb(p, prev_hscb, SCBPTR); | ||
4392 | aic_outb(p, next_hscb, SCB_NEXT); | ||
4393 | } | ||
4394 | } | ||
4395 | else | ||
4396 | { | ||
4397 | prev_hscb = next_hscb; | ||
4398 | next_hscb = aic_inb(p, SCB_NEXT); | ||
4399 | } | ||
4400 | } /* scb_index >= p->scb_data->numscbs */ | ||
4401 | } | ||
4402 | aic_outb(p, active_hscb, SCBPTR); | ||
4403 | aic7xxx_run_done_queue(p, FALSE); | ||
4404 | |||
4405 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
4406 | if( (aic7xxx_verbose & VERBOSE_MINOR_ERROR) || | ||
4407 | (aic7xxx_verbose > 0xffff) ) | ||
4408 | { | ||
4409 | if (queue_flag) | ||
4410 | printk(INFO_LEAD "Queue full received; queue depth %d, " | ||
4411 | "active %d\n", p->host_no, CTL_OF_SCB(scb), | ||
4412 | aic_dev->max_q_depth, aic_dev->active_cmds); | ||
4413 | else | ||
4414 | printk(INFO_LEAD "Target busy\n", p->host_no, CTL_OF_SCB(scb)); | ||
4415 | } | ||
4416 | #endif | ||
4417 | if (queue_flag) | ||
4418 | { | ||
4419 | int diff; | ||
4420 | result = scsi_track_queue_full(cmd->device, | ||
4421 | aic_dev->active_cmds); | ||
4422 | if ( result < 0 ) | ||
4423 | { | ||
4424 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
4425 | printk(INFO_LEAD "Tagged Command Queueing disabled.\n", | ||
4426 | p->host_no, CTL_OF_SCB(scb)); | ||
4427 | diff = aic_dev->max_q_depth - p->host->cmd_per_lun; | ||
4428 | aic_dev->temp_q_depth = 1; | ||
4429 | aic_dev->max_q_depth = 1; | ||
4430 | } | ||
4431 | else if ( result > 0 ) | ||
4432 | { | ||
4433 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
4434 | printk(INFO_LEAD "Queue depth reduced to %d\n", p->host_no, | ||
4435 | CTL_OF_SCB(scb), result); | ||
4436 | diff = aic_dev->max_q_depth - result; | ||
4437 | aic_dev->max_q_depth = result; | ||
4438 | /* temp_q_depth could have been dropped to 1 for an untagged | ||
4439 | * command that might be coming up */ | ||
4440 | if(aic_dev->temp_q_depth > result) | ||
4441 | aic_dev->temp_q_depth = result; | ||
4442 | } | ||
4443 | /* We should free up the no unused SCB entries. But, that's | ||
4444 | * a difficult thing to do because we use a direct indexed | ||
4445 | * array, so we can't just take any entries and free them, | ||
4446 | * we *have* to free the ones at the end of the array, and | ||
4447 | * they very well could be in use right now, which means | ||
4448 | * in order to do this right, we have to add a delayed | ||
4449 | * freeing mechanism tied into the scb_free() code area. | ||
4450 | * We'll add that later. | ||
4451 | */ | ||
4452 | } | ||
4453 | break; | ||
4454 | } | ||
4455 | |||
4456 | default: | ||
4457 | if (aic7xxx_verbose & VERBOSE_SEQINT) | ||
4458 | printk(INFO_LEAD "Unexpected target status 0x%x.\n", p->host_no, | ||
4459 | CTL_OF_SCB(scb), scb->hscb->target_status); | ||
4460 | if (!aic7xxx_error(cmd)) | ||
4461 | { | ||
4462 | aic7xxx_error(cmd) = DID_RETRY_COMMAND; | ||
4463 | } | ||
4464 | break; | ||
4465 | } /* end switch */ | ||
4466 | } /* end else of */ | ||
4467 | } | ||
4468 | break; | ||
4469 | |||
4470 | case AWAITING_MSG: | ||
4471 | { | ||
4472 | unsigned char scb_index, msg_out; | ||
4473 | |||
4474 | scb_index = aic_inb(p, SCB_TAG); | ||
4475 | msg_out = aic_inb(p, MSG_OUT); | ||
4476 | scb = p->scb_data->scb_array[scb_index]; | ||
4477 | aic_dev = AIC_DEV(scb->cmd); | ||
4478 | p->msg_index = p->msg_len = 0; | ||
4479 | /* | ||
4480 | * This SCB had a MK_MESSAGE set in its control byte informing | ||
4481 | * the sequencer that we wanted to send a special message to | ||
4482 | * this target. | ||
4483 | */ | ||
4484 | |||
4485 | if ( !(scb->flags & SCB_DEVICE_RESET) && | ||
4486 | (msg_out == MSG_IDENTIFYFLAG) && | ||
4487 | (scb->hscb->control & TAG_ENB) ) | ||
4488 | { | ||
4489 | p->msg_buf[p->msg_index++] = scb->tag_action; | ||
4490 | p->msg_buf[p->msg_index++] = scb->hscb->tag; | ||
4491 | p->msg_len += 2; | ||
4492 | } | ||
4493 | |||
4494 | if (scb->flags & SCB_DEVICE_RESET) | ||
4495 | { | ||
4496 | p->msg_buf[p->msg_index++] = MSG_BUS_DEV_RESET; | ||
4497 | p->msg_len++; | ||
4498 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) | ||
4499 | printk(INFO_LEAD "Bus device reset mailed.\n", | ||
4500 | p->host_no, CTL_OF_SCB(scb)); | ||
4501 | } | ||
4502 | else if (scb->flags & SCB_ABORT) | ||
4503 | { | ||
4504 | if (scb->tag_action) | ||
4505 | { | ||
4506 | p->msg_buf[p->msg_index++] = MSG_ABORT_TAG; | ||
4507 | } | ||
4508 | else | ||
4509 | { | ||
4510 | p->msg_buf[p->msg_index++] = MSG_ABORT; | ||
4511 | } | ||
4512 | p->msg_len++; | ||
4513 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) | ||
4514 | printk(INFO_LEAD "Abort message mailed.\n", p->host_no, | ||
4515 | CTL_OF_SCB(scb)); | ||
4516 | } | ||
4517 | else if (scb->flags & SCB_MSGOUT_PPR) | ||
4518 | { | ||
4519 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
4520 | { | ||
4521 | printk(INFO_LEAD "Sending PPR (%d/%d/%d/%d) message.\n", | ||
4522 | p->host_no, CTL_OF_SCB(scb), | ||
4523 | aic_dev->goal.period, | ||
4524 | aic_dev->goal.offset, | ||
4525 | aic_dev->goal.width, | ||
4526 | aic_dev->goal.options); | ||
4527 | } | ||
4528 | aic7xxx_construct_ppr(p, scb); | ||
4529 | } | ||
4530 | else if (scb->flags & SCB_MSGOUT_WDTR) | ||
4531 | { | ||
4532 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
4533 | { | ||
4534 | printk(INFO_LEAD "Sending WDTR message.\n", p->host_no, | ||
4535 | CTL_OF_SCB(scb)); | ||
4536 | } | ||
4537 | aic7xxx_construct_wdtr(p, aic_dev->goal.width); | ||
4538 | } | ||
4539 | else if (scb->flags & SCB_MSGOUT_SDTR) | ||
4540 | { | ||
4541 | unsigned int max_sync, period; | ||
4542 | unsigned char options = 0; | ||
4543 | /* | ||
4544 | * Now that the device is selected, use the bits in SBLKCTL and | ||
4545 | * SSTAT2 to determine the max sync rate for this device. | ||
4546 | */ | ||
4547 | if (p->features & AHC_ULTRA2) | ||
4548 | { | ||
4549 | if ( (aic_inb(p, SBLKCTL) & ENAB40) && | ||
4550 | !(aic_inb(p, SSTAT2) & EXP_ACTIVE) ) | ||
4551 | { | ||
4552 | max_sync = AHC_SYNCRATE_ULTRA2; | ||
4553 | } | ||
4554 | else | ||
4555 | { | ||
4556 | max_sync = AHC_SYNCRATE_ULTRA; | ||
4557 | } | ||
4558 | } | ||
4559 | else if (p->features & AHC_ULTRA) | ||
4560 | { | ||
4561 | max_sync = AHC_SYNCRATE_ULTRA; | ||
4562 | } | ||
4563 | else | ||
4564 | { | ||
4565 | max_sync = AHC_SYNCRATE_FAST; | ||
4566 | } | ||
4567 | period = aic_dev->goal.period; | ||
4568 | aic7xxx_find_syncrate(p, &period, max_sync, &options); | ||
4569 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
4570 | { | ||
4571 | printk(INFO_LEAD "Sending SDTR %d/%d message.\n", p->host_no, | ||
4572 | CTL_OF_SCB(scb), period, | ||
4573 | aic_dev->goal.offset); | ||
4574 | } | ||
4575 | aic7xxx_construct_sdtr(p, period, aic_dev->goal.offset); | ||
4576 | } | ||
4577 | else | ||
4578 | { | ||
4579 | panic("aic7xxx: AWAITING_MSG for an SCB that does " | ||
4580 | "not have a waiting message.\n"); | ||
4581 | } | ||
4582 | /* | ||
4583 | * We've set everything up to send our message, now to actually do | ||
4584 | * so we need to enable reqinit interrupts and let the interrupt | ||
4585 | * handler do the rest. We don't want to unpause the sequencer yet | ||
4586 | * though so we'll return early. We also have to make sure that | ||
4587 | * we clear the SEQINT *BEFORE* we set the REQINIT handler active | ||
4588 | * or else it's possible on VLB cards to lose the first REQINIT | ||
4589 | * interrupt. Edge triggered EISA cards could also lose this | ||
4590 | * interrupt, although PCI and level triggered cards should not | ||
4591 | * have this problem since they continually interrupt the kernel | ||
4592 | * until we take care of the situation. | ||
4593 | */ | ||
4594 | scb->flags |= SCB_MSGOUT_SENT; | ||
4595 | p->msg_index = 0; | ||
4596 | p->msg_type = MSG_TYPE_INITIATOR_MSGOUT; | ||
4597 | p->flags |= AHC_HANDLING_REQINITS; | ||
4598 | aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1); | ||
4599 | return; | ||
4600 | } | ||
4601 | break; | ||
4602 | |||
4603 | case DATA_OVERRUN: | ||
4604 | { | ||
4605 | unsigned char scb_index = aic_inb(p, SCB_TAG); | ||
4606 | unsigned char lastphase = aic_inb(p, LASTPHASE); | ||
4607 | unsigned int i; | ||
4608 | |||
4609 | scb = (p->scb_data->scb_array[scb_index]); | ||
4610 | /* | ||
4611 | * XXX - What do we really want to do on an overrun? The | ||
4612 | * mid-level SCSI code should handle this, but for now, | ||
4613 | * we'll just indicate that the command should retried. | ||
4614 | * If we retrieved sense info on this target, then the | ||
4615 | * base SENSE info should have been saved prior to the | ||
4616 | * overrun error. In that case, we return DID_OK and let | ||
4617 | * the mid level code pick up on the sense info. Otherwise | ||
4618 | * we return DID_ERROR so the command will get retried. | ||
4619 | */ | ||
4620 | if ( !(scb->flags & SCB_SENSE) ) | ||
4621 | { | ||
4622 | printk(WARN_LEAD "Data overrun detected in %s phase, tag %d;\n", | ||
4623 | p->host_no, CTL_OF_SCB(scb), | ||
4624 | (lastphase == P_DATAIN) ? "Data-In" : "Data-Out", scb->hscb->tag); | ||
4625 | printk(KERN_WARNING " %s seen Data Phase. Length=%d, NumSGs=%d.\n", | ||
4626 | (aic_inb(p, SEQ_FLAGS) & DPHASE) ? "Have" : "Haven't", | ||
4627 | scb->sg_length, scb->sg_count); | ||
4628 | printk(KERN_WARNING " Raw SCSI Command: 0x"); | ||
4629 | for (i = 0; i < scb->hscb->SCSI_cmd_length; i++) | ||
4630 | { | ||
4631 | printk("%02x ", scb->cmd->cmnd[i]); | ||
4632 | } | ||
4633 | printk("\n"); | ||
4634 | if(aic7xxx_verbose > 0xffff) | ||
4635 | { | ||
4636 | for (i = 0; i < scb->sg_count; i++) | ||
4637 | { | ||
4638 | printk(KERN_WARNING " sg[%d] - Addr 0x%x : Length %d\n", | ||
4639 | i, | ||
4640 | le32_to_cpu(scb->sg_list[i].address), | ||
4641 | le32_to_cpu(scb->sg_list[i].length) ); | ||
4642 | } | ||
4643 | } | ||
4644 | aic7xxx_error(scb->cmd) = DID_ERROR; | ||
4645 | } | ||
4646 | else | ||
4647 | printk(INFO_LEAD "Data Overrun during SEND_SENSE operation.\n", | ||
4648 | p->host_no, CTL_OF_SCB(scb)); | ||
4649 | } | ||
4650 | break; | ||
4651 | |||
4652 | case WIDE_RESIDUE: | ||
4653 | { | ||
4654 | unsigned char resid_sgcnt, index; | ||
4655 | unsigned char scb_index = aic_inb(p, SCB_TAG); | ||
4656 | unsigned int cur_addr, resid_dcnt; | ||
4657 | unsigned int native_addr, native_length, sg_addr; | ||
4658 | int i; | ||
4659 | |||
4660 | if(scb_index > p->scb_data->numscbs) | ||
4661 | { | ||
4662 | printk(WARN_LEAD "invalid scb_index during WIDE_RESIDUE.\n", | ||
4663 | p->host_no, -1, -1, -1); | ||
4664 | /* | ||
4665 | * XXX: Add error handling here | ||
4666 | */ | ||
4667 | break; | ||
4668 | } | ||
4669 | scb = p->scb_data->scb_array[scb_index]; | ||
4670 | if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL)) | ||
4671 | { | ||
4672 | printk(WARN_LEAD "invalid scb during WIDE_RESIDUE flags:0x%x " | ||
4673 | "scb->cmd:0x%lx\n", p->host_no, CTL_OF_SCB(scb), | ||
4674 | scb->flags, (unsigned long)scb->cmd); | ||
4675 | break; | ||
4676 | } | ||
4677 | if(aic7xxx_verbose & VERBOSE_MINOR_ERROR) | ||
4678 | printk(INFO_LEAD "Got WIDE_RESIDUE message, patching up data " | ||
4679 | "pointer.\n", p->host_no, CTL_OF_SCB(scb)); | ||
4680 | |||
4681 | /* | ||
4682 | * We have a valid scb to use on this WIDE_RESIDUE message, so | ||
4683 | * we need to walk the sg list looking for this particular sg | ||
4684 | * segment, then see if we happen to be at the very beginning of | ||
4685 | * the segment. If we are, then we have to back things up to | ||
4686 | * the previous segment. If not, then we simply need to remove | ||
4687 | * one byte from this segments address and add one to the byte | ||
4688 | * count. | ||
4689 | */ | ||
4690 | cur_addr = aic_inb(p, SHADDR) | (aic_inb(p, SHADDR + 1) << 8) | | ||
4691 | (aic_inb(p, SHADDR + 2) << 16) | (aic_inb(p, SHADDR + 3) << 24); | ||
4692 | sg_addr = aic_inb(p, SG_COUNT + 1) | (aic_inb(p, SG_COUNT + 2) << 8) | | ||
4693 | (aic_inb(p, SG_COUNT + 3) << 16) | (aic_inb(p, SG_COUNT + 4) << 24); | ||
4694 | resid_sgcnt = aic_inb(p, SCB_RESID_SGCNT); | ||
4695 | resid_dcnt = aic_inb(p, SCB_RESID_DCNT) | | ||
4696 | (aic_inb(p, SCB_RESID_DCNT + 1) << 8) | | ||
4697 | (aic_inb(p, SCB_RESID_DCNT + 2) << 16); | ||
4698 | index = scb->sg_count - ((resid_sgcnt) ? resid_sgcnt : 1); | ||
4699 | native_addr = le32_to_cpu(scb->sg_list[index].address); | ||
4700 | native_length = le32_to_cpu(scb->sg_list[index].length); | ||
4701 | /* | ||
4702 | * If resid_dcnt == native_length, then we just loaded this SG | ||
4703 | * segment and we need to back it up one... | ||
4704 | */ | ||
4705 | if(resid_dcnt == native_length) | ||
4706 | { | ||
4707 | if(index == 0) | ||
4708 | { | ||
4709 | /* | ||
4710 | * Oops, this isn't right, we can't back up to before the | ||
4711 | * beginning. This must be a bogus message, ignore it. | ||
4712 | */ | ||
4713 | break; | ||
4714 | } | ||
4715 | resid_dcnt = 1; | ||
4716 | resid_sgcnt += 1; | ||
4717 | native_addr = le32_to_cpu(scb->sg_list[index - 1].address); | ||
4718 | native_length = le32_to_cpu(scb->sg_list[index - 1].length); | ||
4719 | cur_addr = native_addr + (native_length - 1); | ||
4720 | sg_addr -= sizeof(struct hw_scatterlist); | ||
4721 | } | ||
4722 | else | ||
4723 | { | ||
4724 | /* | ||
4725 | * resid_dcnt != native_length, so we are in the middle of a SG | ||
4726 | * element. Back it up one byte and leave the rest alone. | ||
4727 | */ | ||
4728 | resid_dcnt += 1; | ||
4729 | cur_addr -= 1; | ||
4730 | } | ||
4731 | |||
4732 | /* | ||
4733 | * Output the new addresses and counts to the right places on the | ||
4734 | * card. | ||
4735 | */ | ||
4736 | aic_outb(p, resid_sgcnt, SG_COUNT); | ||
4737 | aic_outb(p, resid_sgcnt, SCB_RESID_SGCNT); | ||
4738 | aic_outb(p, sg_addr & 0xff, SG_COUNT + 1); | ||
4739 | aic_outb(p, (sg_addr >> 8) & 0xff, SG_COUNT + 2); | ||
4740 | aic_outb(p, (sg_addr >> 16) & 0xff, SG_COUNT + 3); | ||
4741 | aic_outb(p, (sg_addr >> 24) & 0xff, SG_COUNT + 4); | ||
4742 | aic_outb(p, resid_dcnt & 0xff, SCB_RESID_DCNT); | ||
4743 | aic_outb(p, (resid_dcnt >> 8) & 0xff, SCB_RESID_DCNT + 1); | ||
4744 | aic_outb(p, (resid_dcnt >> 16) & 0xff, SCB_RESID_DCNT + 2); | ||
4745 | |||
4746 | /* | ||
4747 | * The sequencer actually wants to find the new address | ||
4748 | * in the SHADDR register set. On the Ultra2 and later controllers | ||
4749 | * this register set is readonly. In order to get the right number | ||
4750 | * into the register, you actually have to enter it in HADDR and then | ||
4751 | * use the PRELOADEN bit of DFCNTRL to drop it through from the | ||
4752 | * HADDR register to the SHADDR register. On non-Ultra2 controllers, | ||
4753 | * we simply write it direct. | ||
4754 | */ | ||
4755 | if(p->features & AHC_ULTRA2) | ||
4756 | { | ||
4757 | /* | ||
4758 | * We might as well be accurate and drop both the resid_dcnt and | ||
4759 | * cur_addr into HCNT and HADDR and have both of them drop | ||
4760 | * through to the shadow layer together. | ||
4761 | */ | ||
4762 | aic_outb(p, resid_dcnt & 0xff, HCNT); | ||
4763 | aic_outb(p, (resid_dcnt >> 8) & 0xff, HCNT + 1); | ||
4764 | aic_outb(p, (resid_dcnt >> 16) & 0xff, HCNT + 2); | ||
4765 | aic_outb(p, cur_addr & 0xff, HADDR); | ||
4766 | aic_outb(p, (cur_addr >> 8) & 0xff, HADDR + 1); | ||
4767 | aic_outb(p, (cur_addr >> 16) & 0xff, HADDR + 2); | ||
4768 | aic_outb(p, (cur_addr >> 24) & 0xff, HADDR + 3); | ||
4769 | aic_outb(p, aic_inb(p, DMAPARAMS) | PRELOADEN, DFCNTRL); | ||
4770 | udelay(1); | ||
4771 | aic_outb(p, aic_inb(p, DMAPARAMS) & ~(SCSIEN|HDMAEN), DFCNTRL); | ||
4772 | i=0; | ||
4773 | while(((aic_inb(p, DFCNTRL) & (SCSIEN|HDMAEN)) != 0) && (i++ < 1000)) | ||
4774 | { | ||
4775 | udelay(1); | ||
4776 | } | ||
4777 | } | ||
4778 | else | ||
4779 | { | ||
4780 | aic_outb(p, cur_addr & 0xff, SHADDR); | ||
4781 | aic_outb(p, (cur_addr >> 8) & 0xff, SHADDR + 1); | ||
4782 | aic_outb(p, (cur_addr >> 16) & 0xff, SHADDR + 2); | ||
4783 | aic_outb(p, (cur_addr >> 24) & 0xff, SHADDR + 3); | ||
4784 | } | ||
4785 | } | ||
4786 | break; | ||
4787 | |||
4788 | case SEQ_SG_FIXUP: | ||
4789 | { | ||
4790 | unsigned char scb_index, tmp; | ||
4791 | int sg_addr, sg_length; | ||
4792 | |||
4793 | scb_index = aic_inb(p, SCB_TAG); | ||
4794 | |||
4795 | if(scb_index > p->scb_data->numscbs) | ||
4796 | { | ||
4797 | printk(WARN_LEAD "invalid scb_index during SEQ_SG_FIXUP.\n", | ||
4798 | p->host_no, -1, -1, -1); | ||
4799 | printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 " | ||
4800 | "0x%x\n", p->host_no, -1, -1, -1, | ||
4801 | aic_inb(p, SCSISIGI), | ||
4802 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), | ||
4803 | aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); | ||
4804 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n", | ||
4805 | p->host_no, -1, -1, -1, aic_inb(p, SG_CACHEPTR), | ||
4806 | aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 | | ||
4807 | aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT)); | ||
4808 | /* | ||
4809 | * XXX: Add error handling here | ||
4810 | */ | ||
4811 | break; | ||
4812 | } | ||
4813 | scb = p->scb_data->scb_array[scb_index]; | ||
4814 | if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL)) | ||
4815 | { | ||
4816 | printk(WARN_LEAD "invalid scb during SEQ_SG_FIXUP flags:0x%x " | ||
4817 | "scb->cmd:0x%p\n", p->host_no, CTL_OF_SCB(scb), | ||
4818 | scb->flags, scb->cmd); | ||
4819 | printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 " | ||
4820 | "0x%x\n", p->host_no, CTL_OF_SCB(scb), | ||
4821 | aic_inb(p, SCSISIGI), | ||
4822 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), | ||
4823 | aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); | ||
4824 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n", | ||
4825 | p->host_no, CTL_OF_SCB(scb), aic_inb(p, SG_CACHEPTR), | ||
4826 | aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 | | ||
4827 | aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT)); | ||
4828 | break; | ||
4829 | } | ||
4830 | if(aic7xxx_verbose & VERBOSE_MINOR_ERROR) | ||
4831 | printk(INFO_LEAD "Fixing up SG address for sequencer.\n", p->host_no, | ||
4832 | CTL_OF_SCB(scb)); | ||
4833 | /* | ||
4834 | * Advance the SG pointer to the next element in the list | ||
4835 | */ | ||
4836 | tmp = aic_inb(p, SG_NEXT); | ||
4837 | tmp += SG_SIZEOF; | ||
4838 | aic_outb(p, tmp, SG_NEXT); | ||
4839 | if( tmp < SG_SIZEOF ) | ||
4840 | aic_outb(p, aic_inb(p, SG_NEXT + 1) + 1, SG_NEXT + 1); | ||
4841 | tmp = aic_inb(p, SG_COUNT) - 1; | ||
4842 | aic_outb(p, tmp, SG_COUNT); | ||
4843 | sg_addr = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].address); | ||
4844 | sg_length = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].length); | ||
4845 | /* | ||
4846 | * Now stuff the element we just advanced past down onto the | ||
4847 | * card so it can be stored in the residual area. | ||
4848 | */ | ||
4849 | aic_outb(p, sg_addr & 0xff, HADDR); | ||
4850 | aic_outb(p, (sg_addr >> 8) & 0xff, HADDR + 1); | ||
4851 | aic_outb(p, (sg_addr >> 16) & 0xff, HADDR + 2); | ||
4852 | aic_outb(p, (sg_addr >> 24) & 0xff, HADDR + 3); | ||
4853 | aic_outb(p, sg_length & 0xff, HCNT); | ||
4854 | aic_outb(p, (sg_length >> 8) & 0xff, HCNT + 1); | ||
4855 | aic_outb(p, (sg_length >> 16) & 0xff, HCNT + 2); | ||
4856 | aic_outb(p, (tmp << 2) | ((tmp == 1) ? LAST_SEG : 0), SG_CACHEPTR); | ||
4857 | aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL); | ||
4858 | while(aic_inb(p, SSTAT0) & SDONE) udelay(1); | ||
4859 | while(aic_inb(p, DFCNTRL) & (HDMAEN|SCSIEN)) aic_outb(p, 0, DFCNTRL); | ||
4860 | } | ||
4861 | break; | ||
4862 | |||
4863 | #ifdef AIC7XXX_NOT_YET | ||
4864 | case TRACEPOINT2: | ||
4865 | { | ||
4866 | printk(INFO_LEAD "Tracepoint #2 reached.\n", p->host_no, | ||
4867 | channel, target, lun); | ||
4868 | } | ||
4869 | break; | ||
4870 | |||
4871 | /* XXX Fill these in later */ | ||
4872 | case MSG_BUFFER_BUSY: | ||
4873 | printk("aic7xxx: Message buffer busy.\n"); | ||
4874 | break; | ||
4875 | case MSGIN_PHASEMIS: | ||
4876 | printk("aic7xxx: Message-in phasemis.\n"); | ||
4877 | break; | ||
4878 | #endif | ||
4879 | |||
4880 | default: /* unknown */ | ||
4881 | printk(WARN_LEAD "Unknown SEQINT, INTSTAT 0x%x, SCSISIGI 0x%x.\n", | ||
4882 | p->host_no, channel, target, lun, intstat, | ||
4883 | aic_inb(p, SCSISIGI)); | ||
4884 | break; | ||
4885 | } | ||
4886 | |||
4887 | /* | ||
4888 | * Clear the sequencer interrupt and unpause the sequencer. | ||
4889 | */ | ||
4890 | unpause_sequencer(p, /* unpause always */ TRUE); | ||
4891 | } | ||
4892 | |||
4893 | /*+F************************************************************************* | ||
4894 | * Function: | ||
4895 | * aic7xxx_parse_msg | ||
4896 | * | ||
4897 | * Description: | ||
4898 | * Parses incoming messages into actions on behalf of | ||
4899 | * aic7xxx_handle_reqinit | ||
4900 | *_F*************************************************************************/ | ||
4901 | static int | ||
4902 | aic7xxx_parse_msg(struct aic7xxx_host *p, struct aic7xxx_scb *scb) | ||
4903 | { | ||
4904 | int reject, reply, done; | ||
4905 | unsigned char target_scsirate, tindex; | ||
4906 | unsigned short target_mask; | ||
4907 | unsigned char target, channel, lun; | ||
4908 | unsigned char bus_width, new_bus_width; | ||
4909 | unsigned char trans_options, new_trans_options; | ||
4910 | unsigned int period, new_period, offset, new_offset, maxsync; | ||
4911 | struct aic7xxx_syncrate *syncrate; | ||
4912 | struct aic_dev_data *aic_dev; | ||
4913 | |||
4914 | target = scb->cmd->device->id; | ||
4915 | channel = scb->cmd->device->channel; | ||
4916 | lun = scb->cmd->device->lun; | ||
4917 | reply = reject = done = FALSE; | ||
4918 | tindex = TARGET_INDEX(scb->cmd); | ||
4919 | aic_dev = AIC_DEV(scb->cmd); | ||
4920 | target_scsirate = aic_inb(p, TARG_SCSIRATE + tindex); | ||
4921 | target_mask = (0x01 << tindex); | ||
4922 | |||
4923 | /* | ||
4924 | * Parse as much of the message as is available, | ||
4925 | * rejecting it if we don't support it. When | ||
4926 | * the entire message is available and has been | ||
4927 | * handled, return TRUE indicating that we have | ||
4928 | * parsed an entire message. | ||
4929 | */ | ||
4930 | |||
4931 | if (p->msg_buf[0] != MSG_EXTENDED) | ||
4932 | { | ||
4933 | reject = TRUE; | ||
4934 | } | ||
4935 | |||
4936 | /* | ||
4937 | * Even if we are an Ultra3 card, don't allow Ultra3 sync rates when | ||
4938 | * using the SDTR messages. We need the PPR messages to enable the | ||
4939 | * higher speeds that include things like Dual Edge clocking. | ||
4940 | */ | ||
4941 | if (p->features & AHC_ULTRA2) | ||
4942 | { | ||
4943 | if ( (aic_inb(p, SBLKCTL) & ENAB40) && | ||
4944 | !(aic_inb(p, SSTAT2) & EXP_ACTIVE) ) | ||
4945 | { | ||
4946 | if (p->features & AHC_ULTRA3) | ||
4947 | maxsync = AHC_SYNCRATE_ULTRA3; | ||
4948 | else | ||
4949 | maxsync = AHC_SYNCRATE_ULTRA2; | ||
4950 | } | ||
4951 | else | ||
4952 | { | ||
4953 | maxsync = AHC_SYNCRATE_ULTRA; | ||
4954 | } | ||
4955 | } | ||
4956 | else if (p->features & AHC_ULTRA) | ||
4957 | { | ||
4958 | maxsync = AHC_SYNCRATE_ULTRA; | ||
4959 | } | ||
4960 | else | ||
4961 | { | ||
4962 | maxsync = AHC_SYNCRATE_FAST; | ||
4963 | } | ||
4964 | |||
4965 | /* | ||
4966 | * Just accept the length byte outright and perform | ||
4967 | * more checking once we know the message type. | ||
4968 | */ | ||
4969 | |||
4970 | if ( !reject && (p->msg_len > 2) ) | ||
4971 | { | ||
4972 | switch(p->msg_buf[2]) | ||
4973 | { | ||
4974 | case MSG_EXT_SDTR: | ||
4975 | { | ||
4976 | |||
4977 | if (p->msg_buf[1] != MSG_EXT_SDTR_LEN) | ||
4978 | { | ||
4979 | reject = TRUE; | ||
4980 | break; | ||
4981 | } | ||
4982 | |||
4983 | if (p->msg_len < (MSG_EXT_SDTR_LEN + 2)) | ||
4984 | { | ||
4985 | break; | ||
4986 | } | ||
4987 | |||
4988 | period = new_period = p->msg_buf[3]; | ||
4989 | offset = new_offset = p->msg_buf[4]; | ||
4990 | trans_options = new_trans_options = 0; | ||
4991 | bus_width = new_bus_width = target_scsirate & WIDEXFER; | ||
4992 | |||
4993 | /* | ||
4994 | * If our current max syncrate is in the Ultra3 range, bump it back | ||
4995 | * down to Ultra2 since we can't negotiate DT transfers using SDTR | ||
4996 | */ | ||
4997 | if(maxsync == AHC_SYNCRATE_ULTRA3) | ||
4998 | maxsync = AHC_SYNCRATE_ULTRA2; | ||
4999 | |||
5000 | /* | ||
5001 | * We might have a device that is starting negotiation with us | ||
5002 | * before we can start up negotiation with it....be prepared to | ||
5003 | * have a device ask for a higher speed then we want to give it | ||
5004 | * in that case | ||
5005 | */ | ||
5006 | if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR)) != | ||
5007 | (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR) ) | ||
5008 | { | ||
5009 | if (!(aic_dev->flags & DEVICE_DTR_SCANNED)) | ||
5010 | { | ||
5011 | /* | ||
5012 | * We shouldn't get here unless this is a narrow drive, wide | ||
5013 | * devices should trigger this same section of code in the WDTR | ||
5014 | * handler first instead. | ||
5015 | */ | ||
5016 | aic_dev->goal.width = MSG_EXT_WDTR_BUS_8_BIT; | ||
5017 | aic_dev->goal.options = 0; | ||
5018 | if(p->user[tindex].offset) | ||
5019 | { | ||
5020 | aic_dev->needsdtr_copy = 1; | ||
5021 | aic_dev->goal.period = max_t(unsigned char, 10,p->user[tindex].period); | ||
5022 | if(p->features & AHC_ULTRA2) | ||
5023 | { | ||
5024 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; | ||
5025 | } | ||
5026 | else | ||
5027 | { | ||
5028 | aic_dev->goal.offset = MAX_OFFSET_8BIT; | ||
5029 | } | ||
5030 | } | ||
5031 | else | ||
5032 | { | ||
5033 | aic_dev->needsdtr_copy = 0; | ||
5034 | aic_dev->goal.period = 255; | ||
5035 | aic_dev->goal.offset = 0; | ||
5036 | } | ||
5037 | aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR; | ||
5038 | } | ||
5039 | else if (aic_dev->needsdtr_copy == 0) | ||
5040 | { | ||
5041 | /* | ||
5042 | * This is a preemptive message from the target, we've already | ||
5043 | * scanned this target and set our options for it, and we | ||
5044 | * don't need a SDTR with this target (for whatever reason), | ||
5045 | * so reject this incoming SDTR | ||
5046 | */ | ||
5047 | reject = TRUE; | ||
5048 | break; | ||
5049 | } | ||
5050 | |||
5051 | /* The device is sending this message first and we have to reply */ | ||
5052 | reply = TRUE; | ||
5053 | |||
5054 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
5055 | { | ||
5056 | printk(INFO_LEAD "Received pre-emptive SDTR message from " | ||
5057 | "target.\n", p->host_no, CTL_OF_SCB(scb)); | ||
5058 | } | ||
5059 | /* | ||
5060 | * Validate the values the device passed to us against our SEEPROM | ||
5061 | * settings. We don't have to do this if we aren't replying since | ||
5062 | * the device isn't allowed to send values greater than the ones | ||
5063 | * we first sent to it. | ||
5064 | */ | ||
5065 | new_period = max_t(unsigned int, period, aic_dev->goal.period); | ||
5066 | new_offset = min_t(unsigned int, offset, aic_dev->goal.offset); | ||
5067 | } | ||
5068 | |||
5069 | /* | ||
5070 | * Use our new_period, new_offset, bus_width, and card options | ||
5071 | * to determine the actual syncrate settings | ||
5072 | */ | ||
5073 | syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync, | ||
5074 | &trans_options); | ||
5075 | aic7xxx_validate_offset(p, syncrate, &new_offset, bus_width); | ||
5076 | |||
5077 | /* | ||
5078 | * Did we drop to async? If so, send a reply regardless of whether | ||
5079 | * or not we initiated this negotiation. | ||
5080 | */ | ||
5081 | if ((new_offset == 0) && (new_offset != offset)) | ||
5082 | { | ||
5083 | aic_dev->needsdtr_copy = 0; | ||
5084 | reply = TRUE; | ||
5085 | } | ||
5086 | |||
5087 | /* | ||
5088 | * Did we start this, if not, or if we went too low and had to | ||
5089 | * go async, then send an SDTR back to the target | ||
5090 | */ | ||
5091 | if(reply) | ||
5092 | { | ||
5093 | /* when sending a reply, make sure that the goal settings are | ||
5094 | * updated along with current and active since the code that | ||
5095 | * will actually build the message for the sequencer uses the | ||
5096 | * goal settings as its guidelines. | ||
5097 | */ | ||
5098 | aic7xxx_set_syncrate(p, syncrate, target, channel, new_period, | ||
5099 | new_offset, trans_options, | ||
5100 | AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR, | ||
5101 | aic_dev); | ||
5102 | scb->flags &= ~SCB_MSGOUT_BITS; | ||
5103 | scb->flags |= SCB_MSGOUT_SDTR; | ||
5104 | aic_outb(p, HOST_MSG, MSG_OUT); | ||
5105 | aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO); | ||
5106 | } | ||
5107 | else | ||
5108 | { | ||
5109 | aic7xxx_set_syncrate(p, syncrate, target, channel, new_period, | ||
5110 | new_offset, trans_options, | ||
5111 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev); | ||
5112 | aic_dev->needsdtr = 0; | ||
5113 | } | ||
5114 | done = TRUE; | ||
5115 | break; | ||
5116 | } | ||
5117 | case MSG_EXT_WDTR: | ||
5118 | { | ||
5119 | |||
5120 | if (p->msg_buf[1] != MSG_EXT_WDTR_LEN) | ||
5121 | { | ||
5122 | reject = TRUE; | ||
5123 | break; | ||
5124 | } | ||
5125 | |||
5126 | if (p->msg_len < (MSG_EXT_WDTR_LEN + 2)) | ||
5127 | { | ||
5128 | break; | ||
5129 | } | ||
5130 | |||
5131 | bus_width = new_bus_width = p->msg_buf[3]; | ||
5132 | |||
5133 | if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR)) == | ||
5134 | (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR) ) | ||
5135 | { | ||
5136 | switch(bus_width) | ||
5137 | { | ||
5138 | default: | ||
5139 | { | ||
5140 | reject = TRUE; | ||
5141 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && | ||
5142 | ((aic_dev->flags & DEVICE_PRINT_DTR) || | ||
5143 | (aic7xxx_verbose > 0xffff)) ) | ||
5144 | { | ||
5145 | printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n", | ||
5146 | p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width)); | ||
5147 | } | ||
5148 | } /* We fall through on purpose */ | ||
5149 | case MSG_EXT_WDTR_BUS_8_BIT: | ||
5150 | { | ||
5151 | aic_dev->goal.width = MSG_EXT_WDTR_BUS_8_BIT; | ||
5152 | aic_dev->needwdtr_copy &= ~target_mask; | ||
5153 | break; | ||
5154 | } | ||
5155 | case MSG_EXT_WDTR_BUS_16_BIT: | ||
5156 | { | ||
5157 | break; | ||
5158 | } | ||
5159 | } | ||
5160 | aic_dev->needwdtr = 0; | ||
5161 | aic7xxx_set_width(p, target, channel, lun, new_bus_width, | ||
5162 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev); | ||
5163 | } | ||
5164 | else | ||
5165 | { | ||
5166 | if ( !(aic_dev->flags & DEVICE_DTR_SCANNED) ) | ||
5167 | { | ||
5168 | /* | ||
5169 | * Well, we now know the WDTR and SYNC caps of this device since | ||
5170 | * it contacted us first, mark it as such and copy the user stuff | ||
5171 | * over to the goal stuff. | ||
5172 | */ | ||
5173 | if( (p->features & AHC_WIDE) && p->user[tindex].width ) | ||
5174 | { | ||
5175 | aic_dev->goal.width = MSG_EXT_WDTR_BUS_16_BIT; | ||
5176 | aic_dev->needwdtr_copy = 1; | ||
5177 | } | ||
5178 | |||
5179 | /* | ||
5180 | * Devices that support DT transfers don't start WDTR requests | ||
5181 | */ | ||
5182 | aic_dev->goal.options = 0; | ||
5183 | |||
5184 | if(p->user[tindex].offset) | ||
5185 | { | ||
5186 | aic_dev->needsdtr_copy = 1; | ||
5187 | aic_dev->goal.period = max_t(unsigned char, 10, p->user[tindex].period); | ||
5188 | if(p->features & AHC_ULTRA2) | ||
5189 | { | ||
5190 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; | ||
5191 | } | ||
5192 | else if( aic_dev->goal.width ) | ||
5193 | { | ||
5194 | aic_dev->goal.offset = MAX_OFFSET_16BIT; | ||
5195 | } | ||
5196 | else | ||
5197 | { | ||
5198 | aic_dev->goal.offset = MAX_OFFSET_8BIT; | ||
5199 | } | ||
5200 | } else { | ||
5201 | aic_dev->needsdtr_copy = 0; | ||
5202 | aic_dev->goal.period = 255; | ||
5203 | aic_dev->goal.offset = 0; | ||
5204 | } | ||
5205 | |||
5206 | aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR; | ||
5207 | } | ||
5208 | else if (aic_dev->needwdtr_copy == 0) | ||
5209 | { | ||
5210 | /* | ||
5211 | * This is a preemptive message from the target, we've already | ||
5212 | * scanned this target and set our options for it, and we | ||
5213 | * don't need a WDTR with this target (for whatever reason), | ||
5214 | * so reject this incoming WDTR | ||
5215 | */ | ||
5216 | reject = TRUE; | ||
5217 | break; | ||
5218 | } | ||
5219 | |||
5220 | /* The device is sending this message first and we have to reply */ | ||
5221 | reply = TRUE; | ||
5222 | |||
5223 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
5224 | { | ||
5225 | printk(INFO_LEAD "Received pre-emptive WDTR message from " | ||
5226 | "target.\n", p->host_no, CTL_OF_SCB(scb)); | ||
5227 | } | ||
5228 | switch(bus_width) | ||
5229 | { | ||
5230 | case MSG_EXT_WDTR_BUS_16_BIT: | ||
5231 | { | ||
5232 | if ( (p->features & AHC_WIDE) && | ||
5233 | (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT) ) | ||
5234 | { | ||
5235 | new_bus_width = MSG_EXT_WDTR_BUS_16_BIT; | ||
5236 | break; | ||
5237 | } | ||
5238 | } /* Fall through if we aren't a wide card */ | ||
5239 | default: | ||
5240 | case MSG_EXT_WDTR_BUS_8_BIT: | ||
5241 | { | ||
5242 | aic_dev->needwdtr_copy = 0; | ||
5243 | new_bus_width = MSG_EXT_WDTR_BUS_8_BIT; | ||
5244 | break; | ||
5245 | } | ||
5246 | } | ||
5247 | scb->flags &= ~SCB_MSGOUT_BITS; | ||
5248 | scb->flags |= SCB_MSGOUT_WDTR; | ||
5249 | aic_dev->needwdtr = 0; | ||
5250 | if(aic_dev->dtr_pending == 0) | ||
5251 | { | ||
5252 | /* there is no other command with SCB_DTR_SCB already set that will | ||
5253 | * trigger the release of the dtr_pending bit. Both set the bit | ||
5254 | * and set scb->flags |= SCB_DTR_SCB | ||
5255 | */ | ||
5256 | aic_dev->dtr_pending = 1; | ||
5257 | scb->flags |= SCB_DTR_SCB; | ||
5258 | } | ||
5259 | aic_outb(p, HOST_MSG, MSG_OUT); | ||
5260 | aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO); | ||
5261 | /* when sending a reply, make sure that the goal settings are | ||
5262 | * updated along with current and active since the code that | ||
5263 | * will actually build the message for the sequencer uses the | ||
5264 | * goal settings as its guidelines. | ||
5265 | */ | ||
5266 | aic7xxx_set_width(p, target, channel, lun, new_bus_width, | ||
5267 | AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR, | ||
5268 | aic_dev); | ||
5269 | } | ||
5270 | |||
5271 | /* | ||
5272 | * By virtue of the SCSI spec, a WDTR message negates any existing | ||
5273 | * SDTR negotiations. So, even if needsdtr isn't marked for this | ||
5274 | * device, we still have to do a new SDTR message if the device | ||
5275 | * supports SDTR at all. Therefore, we check needsdtr_copy instead | ||
5276 | * of needstr. | ||
5277 | */ | ||
5278 | aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0, | ||
5279 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE, | ||
5280 | aic_dev); | ||
5281 | aic_dev->needsdtr = aic_dev->needsdtr_copy; | ||
5282 | done = TRUE; | ||
5283 | break; | ||
5284 | } | ||
5285 | case MSG_EXT_PPR: | ||
5286 | { | ||
5287 | |||
5288 | if (p->msg_buf[1] != MSG_EXT_PPR_LEN) | ||
5289 | { | ||
5290 | reject = TRUE; | ||
5291 | break; | ||
5292 | } | ||
5293 | |||
5294 | if (p->msg_len < (MSG_EXT_PPR_LEN + 2)) | ||
5295 | { | ||
5296 | break; | ||
5297 | } | ||
5298 | |||
5299 | period = new_period = p->msg_buf[3]; | ||
5300 | offset = new_offset = p->msg_buf[5]; | ||
5301 | bus_width = new_bus_width = p->msg_buf[6]; | ||
5302 | trans_options = new_trans_options = p->msg_buf[7] & 0xf; | ||
5303 | |||
5304 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
5305 | { | ||
5306 | printk(INFO_LEAD "Parsing PPR message (%d/%d/%d/%d)\n", | ||
5307 | p->host_no, CTL_OF_SCB(scb), period, offset, bus_width, | ||
5308 | trans_options); | ||
5309 | } | ||
5310 | |||
5311 | /* | ||
5312 | * We might have a device that is starting negotiation with us | ||
5313 | * before we can start up negotiation with it....be prepared to | ||
5314 | * have a device ask for a higher speed then we want to give it | ||
5315 | * in that case | ||
5316 | */ | ||
5317 | if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR)) != | ||
5318 | (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR) ) | ||
5319 | { | ||
5320 | /* Have we scanned the device yet? */ | ||
5321 | if (!(aic_dev->flags & DEVICE_DTR_SCANNED)) | ||
5322 | { | ||
5323 | /* The device is electing to use PPR messages, so we will too until | ||
5324 | * we know better */ | ||
5325 | aic_dev->needppr = aic_dev->needppr_copy = 1; | ||
5326 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; | ||
5327 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; | ||
5328 | |||
5329 | /* We know the device is SCSI-3 compliant due to PPR */ | ||
5330 | aic_dev->flags |= DEVICE_SCSI_3; | ||
5331 | |||
5332 | /* | ||
5333 | * Not only is the device starting this up, but it also hasn't | ||
5334 | * been scanned yet, so this would likely be our TUR or our | ||
5335 | * INQUIRY command at scan time, so we need to use the | ||
5336 | * settings from the SEEPROM if they existed. Of course, even | ||
5337 | * if we didn't find a SEEPROM, we stuffed default values into | ||
5338 | * the user settings anyway, so use those in all cases. | ||
5339 | */ | ||
5340 | aic_dev->goal.width = p->user[tindex].width; | ||
5341 | if(p->user[tindex].offset) | ||
5342 | { | ||
5343 | aic_dev->goal.period = p->user[tindex].period; | ||
5344 | aic_dev->goal.options = p->user[tindex].options; | ||
5345 | if(p->features & AHC_ULTRA2) | ||
5346 | { | ||
5347 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; | ||
5348 | } | ||
5349 | else if( aic_dev->goal.width && | ||
5350 | (bus_width == MSG_EXT_WDTR_BUS_16_BIT) && | ||
5351 | p->features & AHC_WIDE ) | ||
5352 | { | ||
5353 | aic_dev->goal.offset = MAX_OFFSET_16BIT; | ||
5354 | } | ||
5355 | else | ||
5356 | { | ||
5357 | aic_dev->goal.offset = MAX_OFFSET_8BIT; | ||
5358 | } | ||
5359 | } | ||
5360 | else | ||
5361 | { | ||
5362 | aic_dev->goal.period = 255; | ||
5363 | aic_dev->goal.offset = 0; | ||
5364 | aic_dev->goal.options = 0; | ||
5365 | } | ||
5366 | aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR; | ||
5367 | } | ||
5368 | else if (aic_dev->needppr_copy == 0) | ||
5369 | { | ||
5370 | /* | ||
5371 | * This is a preemptive message from the target, we've already | ||
5372 | * scanned this target and set our options for it, and we | ||
5373 | * don't need a PPR with this target (for whatever reason), | ||
5374 | * so reject this incoming PPR | ||
5375 | */ | ||
5376 | reject = TRUE; | ||
5377 | break; | ||
5378 | } | ||
5379 | |||
5380 | /* The device is sending this message first and we have to reply */ | ||
5381 | reply = TRUE; | ||
5382 | |||
5383 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
5384 | { | ||
5385 | printk(INFO_LEAD "Received pre-emptive PPR message from " | ||
5386 | "target.\n", p->host_no, CTL_OF_SCB(scb)); | ||
5387 | } | ||
5388 | |||
5389 | } | ||
5390 | |||
5391 | switch(bus_width) | ||
5392 | { | ||
5393 | case MSG_EXT_WDTR_BUS_16_BIT: | ||
5394 | { | ||
5395 | if ( (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT) && | ||
5396 | p->features & AHC_WIDE) | ||
5397 | { | ||
5398 | break; | ||
5399 | } | ||
5400 | } | ||
5401 | default: | ||
5402 | { | ||
5403 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && | ||
5404 | ((aic_dev->flags & DEVICE_PRINT_DTR) || | ||
5405 | (aic7xxx_verbose > 0xffff)) ) | ||
5406 | { | ||
5407 | reply = TRUE; | ||
5408 | printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n", | ||
5409 | p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width)); | ||
5410 | } | ||
5411 | } /* We fall through on purpose */ | ||
5412 | case MSG_EXT_WDTR_BUS_8_BIT: | ||
5413 | { | ||
5414 | /* | ||
5415 | * According to the spec, if we aren't wide, we also can't be | ||
5416 | * Dual Edge so clear the options byte | ||
5417 | */ | ||
5418 | new_trans_options = 0; | ||
5419 | new_bus_width = MSG_EXT_WDTR_BUS_8_BIT; | ||
5420 | break; | ||
5421 | } | ||
5422 | } | ||
5423 | |||
5424 | if(reply) | ||
5425 | { | ||
5426 | /* when sending a reply, make sure that the goal settings are | ||
5427 | * updated along with current and active since the code that | ||
5428 | * will actually build the message for the sequencer uses the | ||
5429 | * goal settings as its guidelines. | ||
5430 | */ | ||
5431 | aic7xxx_set_width(p, target, channel, lun, new_bus_width, | ||
5432 | AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR, | ||
5433 | aic_dev); | ||
5434 | syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync, | ||
5435 | &new_trans_options); | ||
5436 | aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width); | ||
5437 | aic7xxx_set_syncrate(p, syncrate, target, channel, new_period, | ||
5438 | new_offset, new_trans_options, | ||
5439 | AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR, | ||
5440 | aic_dev); | ||
5441 | } | ||
5442 | else | ||
5443 | { | ||
5444 | aic7xxx_set_width(p, target, channel, lun, new_bus_width, | ||
5445 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev); | ||
5446 | syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync, | ||
5447 | &new_trans_options); | ||
5448 | aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width); | ||
5449 | aic7xxx_set_syncrate(p, syncrate, target, channel, new_period, | ||
5450 | new_offset, new_trans_options, | ||
5451 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev); | ||
5452 | } | ||
5453 | |||
5454 | /* | ||
5455 | * As it turns out, if we don't *have* to have PPR messages, then | ||
5456 | * configure ourselves not to use them since that makes some | ||
5457 | * external drive chassis work (those chassis can't parse PPR | ||
5458 | * messages and they mangle the SCSI bus until you send a WDTR | ||
5459 | * and SDTR that they can understand). | ||
5460 | */ | ||
5461 | if(new_trans_options == 0) | ||
5462 | { | ||
5463 | aic_dev->needppr = aic_dev->needppr_copy = 0; | ||
5464 | if(new_offset) | ||
5465 | { | ||
5466 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; | ||
5467 | } | ||
5468 | if (new_bus_width) | ||
5469 | { | ||
5470 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; | ||
5471 | } | ||
5472 | } | ||
5473 | |||
5474 | if((new_offset == 0) && (offset != 0)) | ||
5475 | { | ||
5476 | /* | ||
5477 | * Oops, the syncrate went to low for this card and we fell off | ||
5478 | * to async (should never happen with a device that uses PPR | ||
5479 | * messages, but have to be complete) | ||
5480 | */ | ||
5481 | reply = TRUE; | ||
5482 | } | ||
5483 | |||
5484 | if(reply) | ||
5485 | { | ||
5486 | scb->flags &= ~SCB_MSGOUT_BITS; | ||
5487 | scb->flags |= SCB_MSGOUT_PPR; | ||
5488 | aic_outb(p, HOST_MSG, MSG_OUT); | ||
5489 | aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO); | ||
5490 | } | ||
5491 | else | ||
5492 | { | ||
5493 | aic_dev->needppr = 0; | ||
5494 | } | ||
5495 | done = TRUE; | ||
5496 | break; | ||
5497 | } | ||
5498 | default: | ||
5499 | { | ||
5500 | reject = TRUE; | ||
5501 | break; | ||
5502 | } | ||
5503 | } /* end of switch(p->msg_type) */ | ||
5504 | } /* end of if (!reject && (p->msg_len > 2)) */ | ||
5505 | |||
5506 | if (!reply && reject) | ||
5507 | { | ||
5508 | aic_outb(p, MSG_MESSAGE_REJECT, MSG_OUT); | ||
5509 | aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO); | ||
5510 | done = TRUE; | ||
5511 | } | ||
5512 | return(done); | ||
5513 | } | ||
5514 | |||
5515 | |||
5516 | /*+F************************************************************************* | ||
5517 | * Function: | ||
5518 | * aic7xxx_handle_reqinit | ||
5519 | * | ||
5520 | * Description: | ||
5521 | * Interrupt handler for REQINIT interrupts (used to transfer messages to | ||
5522 | * and from devices). | ||
5523 | *_F*************************************************************************/ | ||
5524 | static void | ||
5525 | aic7xxx_handle_reqinit(struct aic7xxx_host *p, struct aic7xxx_scb *scb) | ||
5526 | { | ||
5527 | unsigned char lastbyte; | ||
5528 | unsigned char phasemis; | ||
5529 | int done = FALSE; | ||
5530 | |||
5531 | switch(p->msg_type) | ||
5532 | { | ||
5533 | case MSG_TYPE_INITIATOR_MSGOUT: | ||
5534 | { | ||
5535 | if (p->msg_len == 0) | ||
5536 | panic("aic7xxx: REQINIT with no active message!\n"); | ||
5537 | |||
5538 | lastbyte = (p->msg_index == (p->msg_len - 1)); | ||
5539 | phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK) != P_MESGOUT; | ||
5540 | |||
5541 | if (lastbyte || phasemis) | ||
5542 | { | ||
5543 | /* Time to end the message */ | ||
5544 | p->msg_len = 0; | ||
5545 | p->msg_type = MSG_TYPE_NONE; | ||
5546 | /* | ||
5547 | * NOTE-TO-MYSELF: If you clear the REQINIT after you | ||
5548 | * disable REQINITs, then cases of REJECT_MSG stop working | ||
5549 | * and hang the bus | ||
5550 | */ | ||
5551 | aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1); | ||
5552 | aic_outb(p, CLRSCSIINT, CLRINT); | ||
5553 | p->flags &= ~AHC_HANDLING_REQINITS; | ||
5554 | |||
5555 | if (phasemis == 0) | ||
5556 | { | ||
5557 | aic_outb(p, p->msg_buf[p->msg_index], SINDEX); | ||
5558 | aic_outb(p, 0, RETURN_1); | ||
5559 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
5560 | if (aic7xxx_verbose > 0xffff) | ||
5561 | printk(INFO_LEAD "Completed sending of REQINIT message.\n", | ||
5562 | p->host_no, CTL_OF_SCB(scb)); | ||
5563 | #endif | ||
5564 | } | ||
5565 | else | ||
5566 | { | ||
5567 | aic_outb(p, MSGOUT_PHASEMIS, RETURN_1); | ||
5568 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
5569 | if (aic7xxx_verbose > 0xffff) | ||
5570 | printk(INFO_LEAD "PHASEMIS while sending REQINIT message.\n", | ||
5571 | p->host_no, CTL_OF_SCB(scb)); | ||
5572 | #endif | ||
5573 | } | ||
5574 | unpause_sequencer(p, TRUE); | ||
5575 | } | ||
5576 | else | ||
5577 | { | ||
5578 | /* | ||
5579 | * Present the byte on the bus (clearing REQINIT) but don't | ||
5580 | * unpause the sequencer. | ||
5581 | */ | ||
5582 | aic_outb(p, CLRREQINIT, CLRSINT1); | ||
5583 | aic_outb(p, CLRSCSIINT, CLRINT); | ||
5584 | aic_outb(p, p->msg_buf[p->msg_index++], SCSIDATL); | ||
5585 | } | ||
5586 | break; | ||
5587 | } | ||
5588 | case MSG_TYPE_INITIATOR_MSGIN: | ||
5589 | { | ||
5590 | phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK ) != P_MESGIN; | ||
5591 | |||
5592 | if (phasemis == 0) | ||
5593 | { | ||
5594 | p->msg_len++; | ||
5595 | /* Pull the byte in without acking it */ | ||
5596 | p->msg_buf[p->msg_index] = aic_inb(p, SCSIBUSL); | ||
5597 | done = aic7xxx_parse_msg(p, scb); | ||
5598 | /* Ack the byte */ | ||
5599 | aic_outb(p, CLRREQINIT, CLRSINT1); | ||
5600 | aic_outb(p, CLRSCSIINT, CLRINT); | ||
5601 | aic_inb(p, SCSIDATL); | ||
5602 | p->msg_index++; | ||
5603 | } | ||
5604 | if (phasemis || done) | ||
5605 | { | ||
5606 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
5607 | if (aic7xxx_verbose > 0xffff) | ||
5608 | { | ||
5609 | if (phasemis) | ||
5610 | printk(INFO_LEAD "PHASEMIS while receiving REQINIT message.\n", | ||
5611 | p->host_no, CTL_OF_SCB(scb)); | ||
5612 | else | ||
5613 | printk(INFO_LEAD "Completed receipt of REQINIT message.\n", | ||
5614 | p->host_no, CTL_OF_SCB(scb)); | ||
5615 | } | ||
5616 | #endif | ||
5617 | /* Time to end our message session */ | ||
5618 | p->msg_len = 0; | ||
5619 | p->msg_type = MSG_TYPE_NONE; | ||
5620 | aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1); | ||
5621 | aic_outb(p, CLRSCSIINT, CLRINT); | ||
5622 | p->flags &= ~AHC_HANDLING_REQINITS; | ||
5623 | unpause_sequencer(p, TRUE); | ||
5624 | } | ||
5625 | break; | ||
5626 | } | ||
5627 | default: | ||
5628 | { | ||
5629 | panic("aic7xxx: Unknown REQINIT message type.\n"); | ||
5630 | break; | ||
5631 | } | ||
5632 | } /* End of switch(p->msg_type) */ | ||
5633 | } | ||
5634 | |||
5635 | /*+F************************************************************************* | ||
5636 | * Function: | ||
5637 | * aic7xxx_handle_scsiint | ||
5638 | * | ||
5639 | * Description: | ||
5640 | * Interrupt handler for SCSI interrupts (SCSIINT). | ||
5641 | *-F*************************************************************************/ | ||
5642 | static void | ||
5643 | aic7xxx_handle_scsiint(struct aic7xxx_host *p, unsigned char intstat) | ||
5644 | { | ||
5645 | unsigned char scb_index; | ||
5646 | unsigned char status; | ||
5647 | struct aic7xxx_scb *scb; | ||
5648 | struct aic_dev_data *aic_dev; | ||
5649 | |||
5650 | scb_index = aic_inb(p, SCB_TAG); | ||
5651 | status = aic_inb(p, SSTAT1); | ||
5652 | |||
5653 | if (scb_index < p->scb_data->numscbs) | ||
5654 | { | ||
5655 | scb = p->scb_data->scb_array[scb_index]; | ||
5656 | if ((scb->flags & SCB_ACTIVE) == 0) | ||
5657 | { | ||
5658 | scb = NULL; | ||
5659 | } | ||
5660 | } | ||
5661 | else | ||
5662 | { | ||
5663 | scb = NULL; | ||
5664 | } | ||
5665 | |||
5666 | |||
5667 | if ((status & SCSIRSTI) != 0) | ||
5668 | { | ||
5669 | int channel; | ||
5670 | |||
5671 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) | ||
5672 | channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3; | ||
5673 | else | ||
5674 | channel = 0; | ||
5675 | |||
5676 | if (aic7xxx_verbose & VERBOSE_RESET) | ||
5677 | printk(WARN_LEAD "Someone else reset the channel!!\n", | ||
5678 | p->host_no, channel, -1, -1); | ||
5679 | if (aic7xxx_panic_on_abort) | ||
5680 | aic7xxx_panic_abort(p, NULL); | ||
5681 | /* | ||
5682 | * Go through and abort all commands for the channel, but do not | ||
5683 | * reset the channel again. | ||
5684 | */ | ||
5685 | aic7xxx_reset_channel(p, channel, /* Initiate Reset */ FALSE); | ||
5686 | aic7xxx_run_done_queue(p, TRUE); | ||
5687 | scb = NULL; | ||
5688 | } | ||
5689 | else if ( ((status & BUSFREE) != 0) && ((status & SELTO) == 0) ) | ||
5690 | { | ||
5691 | /* | ||
5692 | * First look at what phase we were last in. If it's message-out, | ||
5693 | * chances are pretty good that the bus free was in response to | ||
5694 | * one of our abort requests. | ||
5695 | */ | ||
5696 | unsigned char lastphase = aic_inb(p, LASTPHASE); | ||
5697 | unsigned char saved_tcl = aic_inb(p, SAVED_TCL); | ||
5698 | unsigned char target = (saved_tcl >> 4) & 0x0F; | ||
5699 | int channel; | ||
5700 | int printerror = TRUE; | ||
5701 | |||
5702 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) | ||
5703 | channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3; | ||
5704 | else | ||
5705 | channel = 0; | ||
5706 | |||
5707 | aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), | ||
5708 | SCSISEQ); | ||
5709 | if (lastphase == P_MESGOUT) | ||
5710 | { | ||
5711 | unsigned char message; | ||
5712 | |||
5713 | message = aic_inb(p, SINDEX); | ||
5714 | |||
5715 | if ((message == MSG_ABORT) || (message == MSG_ABORT_TAG)) | ||
5716 | { | ||
5717 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) | ||
5718 | printk(INFO_LEAD "SCB %d abort delivered.\n", p->host_no, | ||
5719 | CTL_OF_SCB(scb), scb->hscb->tag); | ||
5720 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, | ||
5721 | (message == MSG_ABORT) ? SCB_LIST_NULL : scb->hscb->tag ); | ||
5722 | aic7xxx_run_done_queue(p, TRUE); | ||
5723 | scb = NULL; | ||
5724 | printerror = 0; | ||
5725 | } | ||
5726 | else if (message == MSG_BUS_DEV_RESET) | ||
5727 | { | ||
5728 | aic7xxx_handle_device_reset(p, target, channel); | ||
5729 | scb = NULL; | ||
5730 | printerror = 0; | ||
5731 | } | ||
5732 | } | ||
5733 | if ( (scb != NULL) && (scb->flags & SCB_DTR_SCB) ) | ||
5734 | { | ||
5735 | /* | ||
5736 | * Hmmm...error during a negotiation command. Either we have a | ||
5737 | * borken bus, or the device doesn't like our negotiation message. | ||
5738 | * Since we check the INQUIRY data of a device before sending it | ||
5739 | * negotiation messages, assume the bus is borken for whatever | ||
5740 | * reason. Complete the command. | ||
5741 | */ | ||
5742 | printerror = 0; | ||
5743 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, scb->hscb->tag); | ||
5744 | aic7xxx_run_done_queue(p, TRUE); | ||
5745 | scb = NULL; | ||
5746 | } | ||
5747 | if (printerror != 0) | ||
5748 | { | ||
5749 | if (scb != NULL) | ||
5750 | { | ||
5751 | unsigned char tag; | ||
5752 | |||
5753 | if ((scb->hscb->control & TAG_ENB) != 0) | ||
5754 | { | ||
5755 | tag = scb->hscb->tag; | ||
5756 | } | ||
5757 | else | ||
5758 | { | ||
5759 | tag = SCB_LIST_NULL; | ||
5760 | } | ||
5761 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, tag); | ||
5762 | aic7xxx_run_done_queue(p, TRUE); | ||
5763 | } | ||
5764 | else | ||
5765 | { | ||
5766 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL); | ||
5767 | aic7xxx_run_done_queue(p, TRUE); | ||
5768 | } | ||
5769 | printk(INFO_LEAD "Unexpected busfree, LASTPHASE = 0x%x, " | ||
5770 | "SEQADDR = 0x%x\n", p->host_no, channel, target, -1, lastphase, | ||
5771 | (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0)); | ||
5772 | scb = NULL; | ||
5773 | } | ||
5774 | aic_outb(p, MSG_NOOP, MSG_OUT); | ||
5775 | aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT), | ||
5776 | SIMODE1); | ||
5777 | p->flags &= ~AHC_HANDLING_REQINITS; | ||
5778 | aic_outb(p, CLRBUSFREE, CLRSINT1); | ||
5779 | aic_outb(p, CLRSCSIINT, CLRINT); | ||
5780 | restart_sequencer(p); | ||
5781 | unpause_sequencer(p, TRUE); | ||
5782 | } | ||
5783 | else if ((status & SELTO) != 0) | ||
5784 | { | ||
5785 | unsigned char scbptr; | ||
5786 | unsigned char nextscb; | ||
5787 | struct scsi_cmnd *cmd; | ||
5788 | |||
5789 | scbptr = aic_inb(p, WAITING_SCBH); | ||
5790 | if (scbptr > p->scb_data->maxhscbs) | ||
5791 | { | ||
5792 | /* | ||
5793 | * I'm still trying to track down exactly how this happens, but until | ||
5794 | * I find it, this code will make sure we aren't passing bogus values | ||
5795 | * into the SCBPTR register, even if that register will just wrap | ||
5796 | * things around, we still don't like having out of range variables. | ||
5797 | * | ||
5798 | * NOTE: Don't check the aic7xxx_verbose variable, I want this message | ||
5799 | * to always be displayed. | ||
5800 | */ | ||
5801 | printk(INFO_LEAD "Invalid WAITING_SCBH value %d, improvising.\n", | ||
5802 | p->host_no, -1, -1, -1, scbptr); | ||
5803 | if (p->scb_data->maxhscbs > 4) | ||
5804 | scbptr &= (p->scb_data->maxhscbs - 1); | ||
5805 | else | ||
5806 | scbptr &= 0x03; | ||
5807 | } | ||
5808 | aic_outb(p, scbptr, SCBPTR); | ||
5809 | scb_index = aic_inb(p, SCB_TAG); | ||
5810 | |||
5811 | scb = NULL; | ||
5812 | if (scb_index < p->scb_data->numscbs) | ||
5813 | { | ||
5814 | scb = p->scb_data->scb_array[scb_index]; | ||
5815 | if ((scb->flags & SCB_ACTIVE) == 0) | ||
5816 | { | ||
5817 | scb = NULL; | ||
5818 | } | ||
5819 | } | ||
5820 | if (scb == NULL) | ||
5821 | { | ||
5822 | printk(WARN_LEAD "Referenced SCB %d not valid during SELTO.\n", | ||
5823 | p->host_no, -1, -1, -1, scb_index); | ||
5824 | printk(KERN_WARNING " SCSISEQ = 0x%x SEQADDR = 0x%x SSTAT0 = 0x%x " | ||
5825 | "SSTAT1 = 0x%x\n", aic_inb(p, SCSISEQ), | ||
5826 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), | ||
5827 | aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); | ||
5828 | if (aic7xxx_panic_on_abort) | ||
5829 | aic7xxx_panic_abort(p, NULL); | ||
5830 | } | ||
5831 | else | ||
5832 | { | ||
5833 | cmd = scb->cmd; | ||
5834 | cmd->result = (DID_TIME_OUT << 16); | ||
5835 | |||
5836 | /* | ||
5837 | * Clear out this hardware SCB | ||
5838 | */ | ||
5839 | aic_outb(p, 0, SCB_CONTROL); | ||
5840 | |||
5841 | /* | ||
5842 | * Clear out a few values in the card that are in an undetermined | ||
5843 | * state. | ||
5844 | */ | ||
5845 | aic_outb(p, MSG_NOOP, MSG_OUT); | ||
5846 | |||
5847 | /* | ||
5848 | * Shift the waiting for selection queue forward | ||
5849 | */ | ||
5850 | nextscb = aic_inb(p, SCB_NEXT); | ||
5851 | aic_outb(p, nextscb, WAITING_SCBH); | ||
5852 | |||
5853 | /* | ||
5854 | * Put this SCB back on the free list. | ||
5855 | */ | ||
5856 | aic7xxx_add_curscb_to_free_list(p); | ||
5857 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
5858 | if (aic7xxx_verbose > 0xffff) | ||
5859 | printk(INFO_LEAD "Selection Timeout.\n", p->host_no, CTL_OF_SCB(scb)); | ||
5860 | #endif | ||
5861 | if (scb->flags & SCB_QUEUED_ABORT) | ||
5862 | { | ||
5863 | /* | ||
5864 | * We know that this particular SCB had to be the queued abort since | ||
5865 | * the disconnected SCB would have gotten a reconnect instead. | ||
5866 | * What we need to do then is to let the command timeout again so | ||
5867 | * we get a reset since this abort just failed. | ||
5868 | */ | ||
5869 | cmd->result = 0; | ||
5870 | scb = NULL; | ||
5871 | } | ||
5872 | } | ||
5873 | /* | ||
5874 | * Keep the sequencer from trying to restart any selections | ||
5875 | */ | ||
5876 | aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ); | ||
5877 | /* | ||
5878 | * Make sure the data bits on the bus are released | ||
5879 | * Don't do this on 7770 chipsets, it makes them give us | ||
5880 | * a BRKADDRINT and kills the card. | ||
5881 | */ | ||
5882 | if( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI ) | ||
5883 | aic_outb(p, 0, SCSIBUSL); | ||
5884 | |||
5885 | /* | ||
5886 | * Delay for the selection timeout delay period then stop the selection | ||
5887 | */ | ||
5888 | udelay(301); | ||
5889 | aic_outb(p, CLRSELINGO, CLRSINT0); | ||
5890 | /* | ||
5891 | * Clear out all the interrupt status bits | ||
5892 | */ | ||
5893 | aic_outb(p, aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE), SIMODE1); | ||
5894 | p->flags &= ~AHC_HANDLING_REQINITS; | ||
5895 | aic_outb(p, CLRSELTIMEO | CLRBUSFREE, CLRSINT1); | ||
5896 | aic_outb(p, CLRSCSIINT, CLRINT); | ||
5897 | /* | ||
5898 | * Restarting the sequencer will stop the selection and make sure devices | ||
5899 | * are allowed to reselect in. | ||
5900 | */ | ||
5901 | restart_sequencer(p); | ||
5902 | unpause_sequencer(p, TRUE); | ||
5903 | } | ||
5904 | else if (scb == NULL) | ||
5905 | { | ||
5906 | printk(WARN_LEAD "aic7xxx_isr - referenced scb not valid " | ||
5907 | "during scsiint 0x%x scb(%d)\n" | ||
5908 | " SIMODE0 0x%x, SIMODE1 0x%x, SSTAT0 0x%x, SEQADDR 0x%x\n", | ||
5909 | p->host_no, -1, -1, -1, status, scb_index, aic_inb(p, SIMODE0), | ||
5910 | aic_inb(p, SIMODE1), aic_inb(p, SSTAT0), | ||
5911 | (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0)); | ||
5912 | /* | ||
5913 | * Turn off the interrupt and set status to zero, so that it | ||
5914 | * falls through the rest of the SCSIINT code. | ||
5915 | */ | ||
5916 | aic_outb(p, status, CLRSINT1); | ||
5917 | aic_outb(p, CLRSCSIINT, CLRINT); | ||
5918 | unpause_sequencer(p, /* unpause always */ TRUE); | ||
5919 | scb = NULL; | ||
5920 | } | ||
5921 | else if (status & SCSIPERR) | ||
5922 | { | ||
5923 | /* | ||
5924 | * Determine the bus phase and queue an appropriate message. | ||
5925 | */ | ||
5926 | char *phase; | ||
5927 | struct scsi_cmnd *cmd; | ||
5928 | unsigned char mesg_out = MSG_NOOP; | ||
5929 | unsigned char lastphase = aic_inb(p, LASTPHASE); | ||
5930 | unsigned char sstat2 = aic_inb(p, SSTAT2); | ||
5931 | |||
5932 | cmd = scb->cmd; | ||
5933 | switch (lastphase) | ||
5934 | { | ||
5935 | case P_DATAOUT: | ||
5936 | phase = "Data-Out"; | ||
5937 | break; | ||
5938 | case P_DATAIN: | ||
5939 | phase = "Data-In"; | ||
5940 | mesg_out = MSG_INITIATOR_DET_ERR; | ||
5941 | break; | ||
5942 | case P_COMMAND: | ||
5943 | phase = "Command"; | ||
5944 | break; | ||
5945 | case P_MESGOUT: | ||
5946 | phase = "Message-Out"; | ||
5947 | break; | ||
5948 | case P_STATUS: | ||
5949 | phase = "Status"; | ||
5950 | mesg_out = MSG_INITIATOR_DET_ERR; | ||
5951 | break; | ||
5952 | case P_MESGIN: | ||
5953 | phase = "Message-In"; | ||
5954 | mesg_out = MSG_PARITY_ERROR; | ||
5955 | break; | ||
5956 | default: | ||
5957 | phase = "unknown"; | ||
5958 | break; | ||
5959 | } | ||
5960 | |||
5961 | /* | ||
5962 | * A parity error has occurred during a data | ||
5963 | * transfer phase. Flag it and continue. | ||
5964 | */ | ||
5965 | if( (p->features & AHC_ULTRA3) && | ||
5966 | (aic_inb(p, SCSIRATE) & AHC_SYNCRATE_CRC) && | ||
5967 | (lastphase == P_DATAIN) ) | ||
5968 | { | ||
5969 | printk(WARN_LEAD "CRC error during %s phase.\n", | ||
5970 | p->host_no, CTL_OF_SCB(scb), phase); | ||
5971 | if(sstat2 & CRCVALERR) | ||
5972 | { | ||
5973 | printk(WARN_LEAD " CRC error in intermediate CRC packet.\n", | ||
5974 | p->host_no, CTL_OF_SCB(scb)); | ||
5975 | } | ||
5976 | if(sstat2 & CRCENDERR) | ||
5977 | { | ||
5978 | printk(WARN_LEAD " CRC error in ending CRC packet.\n", | ||
5979 | p->host_no, CTL_OF_SCB(scb)); | ||
5980 | } | ||
5981 | if(sstat2 & CRCREQERR) | ||
5982 | { | ||
5983 | printk(WARN_LEAD " Target incorrectly requested a CRC packet.\n", | ||
5984 | p->host_no, CTL_OF_SCB(scb)); | ||
5985 | } | ||
5986 | if(sstat2 & DUAL_EDGE_ERROR) | ||
5987 | { | ||
5988 | printk(WARN_LEAD " Dual Edge transmission error.\n", | ||
5989 | p->host_no, CTL_OF_SCB(scb)); | ||
5990 | } | ||
5991 | } | ||
5992 | else if( (lastphase == P_MESGOUT) && | ||
5993 | (scb->flags & SCB_MSGOUT_PPR) ) | ||
5994 | { | ||
5995 | /* | ||
5996 | * As per the draft specs, any device capable of supporting any of | ||
5997 | * the option values other than 0 are not allowed to reject the | ||
5998 | * PPR message. Instead, they must negotiate out what they do | ||
5999 | * support instead of rejecting our offering or else they cause | ||
6000 | * a parity error during msg_out phase to signal that they don't | ||
6001 | * like our settings. | ||
6002 | */ | ||
6003 | aic_dev = AIC_DEV(scb->cmd); | ||
6004 | aic_dev->needppr = aic_dev->needppr_copy = 0; | ||
6005 | aic7xxx_set_width(p, scb->cmd->device->id, scb->cmd->device->channel, scb->cmd->device->lun, | ||
6006 | MSG_EXT_WDTR_BUS_8_BIT, | ||
6007 | (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE), | ||
6008 | aic_dev); | ||
6009 | aic7xxx_set_syncrate(p, NULL, scb->cmd->device->id, scb->cmd->device->channel, 0, 0, | ||
6010 | 0, AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE, | ||
6011 | aic_dev); | ||
6012 | aic_dev->goal.options = 0; | ||
6013 | scb->flags &= ~SCB_MSGOUT_BITS; | ||
6014 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
6015 | { | ||
6016 | printk(INFO_LEAD "parity error during PPR message, reverting " | ||
6017 | "to WDTR/SDTR\n", p->host_no, CTL_OF_SCB(scb)); | ||
6018 | } | ||
6019 | if ( aic_dev->goal.width ) | ||
6020 | { | ||
6021 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; | ||
6022 | } | ||
6023 | if ( aic_dev->goal.offset ) | ||
6024 | { | ||
6025 | if( aic_dev->goal.period <= 9 ) | ||
6026 | { | ||
6027 | aic_dev->goal.period = 10; | ||
6028 | } | ||
6029 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; | ||
6030 | } | ||
6031 | scb = NULL; | ||
6032 | } | ||
6033 | |||
6034 | /* | ||
6035 | * We've set the hardware to assert ATN if we get a parity | ||
6036 | * error on "in" phases, so all we need to do is stuff the | ||
6037 | * message buffer with the appropriate message. "In" phases | ||
6038 | * have set mesg_out to something other than MSG_NOP. | ||
6039 | */ | ||
6040 | if (mesg_out != MSG_NOOP) | ||
6041 | { | ||
6042 | aic_outb(p, mesg_out, MSG_OUT); | ||
6043 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); | ||
6044 | scb = NULL; | ||
6045 | } | ||
6046 | aic_outb(p, CLRSCSIPERR, CLRSINT1); | ||
6047 | aic_outb(p, CLRSCSIINT, CLRINT); | ||
6048 | unpause_sequencer(p, /* unpause_always */ TRUE); | ||
6049 | } | ||
6050 | else if ( (status & REQINIT) && | ||
6051 | (p->flags & AHC_HANDLING_REQINITS) ) | ||
6052 | { | ||
6053 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
6054 | if (aic7xxx_verbose > 0xffff) | ||
6055 | printk(INFO_LEAD "Handling REQINIT, SSTAT1=0x%x.\n", p->host_no, | ||
6056 | CTL_OF_SCB(scb), aic_inb(p, SSTAT1)); | ||
6057 | #endif | ||
6058 | aic7xxx_handle_reqinit(p, scb); | ||
6059 | return; | ||
6060 | } | ||
6061 | else | ||
6062 | { | ||
6063 | /* | ||
6064 | * We don't know what's going on. Turn off the | ||
6065 | * interrupt source and try to continue. | ||
6066 | */ | ||
6067 | if (aic7xxx_verbose & VERBOSE_SCSIINT) | ||
6068 | printk(INFO_LEAD "Unknown SCSIINT status, SSTAT1(0x%x).\n", | ||
6069 | p->host_no, -1, -1, -1, status); | ||
6070 | aic_outb(p, status, CLRSINT1); | ||
6071 | aic_outb(p, CLRSCSIINT, CLRINT); | ||
6072 | unpause_sequencer(p, /* unpause always */ TRUE); | ||
6073 | scb = NULL; | ||
6074 | } | ||
6075 | if (scb != NULL) | ||
6076 | { | ||
6077 | aic7xxx_done(p, scb); | ||
6078 | } | ||
6079 | } | ||
6080 | |||
6081 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
6082 | static void | ||
6083 | aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer) | ||
6084 | { | ||
6085 | unsigned char saved_scbptr, free_scbh, dis_scbh, wait_scbh, temp; | ||
6086 | int i, bogus, lost; | ||
6087 | static unsigned char scb_status[AIC7XXX_MAXSCB]; | ||
6088 | |||
6089 | #define SCB_NO_LIST 0 | ||
6090 | #define SCB_FREE_LIST 1 | ||
6091 | #define SCB_WAITING_LIST 2 | ||
6092 | #define SCB_DISCONNECTED_LIST 4 | ||
6093 | #define SCB_CURRENTLY_ACTIVE 8 | ||
6094 | |||
6095 | /* | ||
6096 | * Note, these checks will fail on a regular basis once the machine moves | ||
6097 | * beyond the bus scan phase. The problem is race conditions concerning | ||
6098 | * the scbs and where they are linked in. When you have 30 or so commands | ||
6099 | * outstanding on the bus, and run this twice with every interrupt, the | ||
6100 | * chances get pretty good that you'll catch the sequencer with an SCB | ||
6101 | * only partially linked in. Therefore, once we pass the scan phase | ||
6102 | * of the bus, we really should disable this function. | ||
6103 | */ | ||
6104 | bogus = FALSE; | ||
6105 | memset(&scb_status[0], 0, sizeof(scb_status)); | ||
6106 | pause_sequencer(p); | ||
6107 | saved_scbptr = aic_inb(p, SCBPTR); | ||
6108 | if (saved_scbptr >= p->scb_data->maxhscbs) | ||
6109 | { | ||
6110 | printk("Bogus SCBPTR %d\n", saved_scbptr); | ||
6111 | bogus = TRUE; | ||
6112 | } | ||
6113 | scb_status[saved_scbptr] = SCB_CURRENTLY_ACTIVE; | ||
6114 | free_scbh = aic_inb(p, FREE_SCBH); | ||
6115 | if ( (free_scbh != SCB_LIST_NULL) && | ||
6116 | (free_scbh >= p->scb_data->maxhscbs) ) | ||
6117 | { | ||
6118 | printk("Bogus FREE_SCBH %d\n", free_scbh); | ||
6119 | bogus = TRUE; | ||
6120 | } | ||
6121 | else | ||
6122 | { | ||
6123 | temp = free_scbh; | ||
6124 | while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) ) | ||
6125 | { | ||
6126 | if(scb_status[temp] & 0x07) | ||
6127 | { | ||
6128 | printk("HSCB %d on multiple lists, status 0x%02x", temp, | ||
6129 | scb_status[temp] | SCB_FREE_LIST); | ||
6130 | bogus = TRUE; | ||
6131 | } | ||
6132 | scb_status[temp] |= SCB_FREE_LIST; | ||
6133 | aic_outb(p, temp, SCBPTR); | ||
6134 | temp = aic_inb(p, SCB_NEXT); | ||
6135 | } | ||
6136 | } | ||
6137 | |||
6138 | dis_scbh = aic_inb(p, DISCONNECTED_SCBH); | ||
6139 | if ( (dis_scbh != SCB_LIST_NULL) && | ||
6140 | (dis_scbh >= p->scb_data->maxhscbs) ) | ||
6141 | { | ||
6142 | printk("Bogus DISCONNECTED_SCBH %d\n", dis_scbh); | ||
6143 | bogus = TRUE; | ||
6144 | } | ||
6145 | else | ||
6146 | { | ||
6147 | temp = dis_scbh; | ||
6148 | while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) ) | ||
6149 | { | ||
6150 | if(scb_status[temp] & 0x07) | ||
6151 | { | ||
6152 | printk("HSCB %d on multiple lists, status 0x%02x", temp, | ||
6153 | scb_status[temp] | SCB_DISCONNECTED_LIST); | ||
6154 | bogus = TRUE; | ||
6155 | } | ||
6156 | scb_status[temp] |= SCB_DISCONNECTED_LIST; | ||
6157 | aic_outb(p, temp, SCBPTR); | ||
6158 | temp = aic_inb(p, SCB_NEXT); | ||
6159 | } | ||
6160 | } | ||
6161 | |||
6162 | wait_scbh = aic_inb(p, WAITING_SCBH); | ||
6163 | if ( (wait_scbh != SCB_LIST_NULL) && | ||
6164 | (wait_scbh >= p->scb_data->maxhscbs) ) | ||
6165 | { | ||
6166 | printk("Bogus WAITING_SCBH %d\n", wait_scbh); | ||
6167 | bogus = TRUE; | ||
6168 | } | ||
6169 | else | ||
6170 | { | ||
6171 | temp = wait_scbh; | ||
6172 | while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) ) | ||
6173 | { | ||
6174 | if(scb_status[temp] & 0x07) | ||
6175 | { | ||
6176 | printk("HSCB %d on multiple lists, status 0x%02x", temp, | ||
6177 | scb_status[temp] | SCB_WAITING_LIST); | ||
6178 | bogus = TRUE; | ||
6179 | } | ||
6180 | scb_status[temp] |= SCB_WAITING_LIST; | ||
6181 | aic_outb(p, temp, SCBPTR); | ||
6182 | temp = aic_inb(p, SCB_NEXT); | ||
6183 | } | ||
6184 | } | ||
6185 | |||
6186 | lost=0; | ||
6187 | for(i=0; i < p->scb_data->maxhscbs; i++) | ||
6188 | { | ||
6189 | aic_outb(p, i, SCBPTR); | ||
6190 | temp = aic_inb(p, SCB_NEXT); | ||
6191 | if ( ((temp != SCB_LIST_NULL) && | ||
6192 | (temp >= p->scb_data->maxhscbs)) ) | ||
6193 | { | ||
6194 | printk("HSCB %d bad, SCB_NEXT invalid(%d).\n", i, temp); | ||
6195 | bogus = TRUE; | ||
6196 | } | ||
6197 | if ( temp == i ) | ||
6198 | { | ||
6199 | printk("HSCB %d bad, SCB_NEXT points to self.\n", i); | ||
6200 | bogus = TRUE; | ||
6201 | } | ||
6202 | if (scb_status[i] == 0) | ||
6203 | lost++; | ||
6204 | if (lost > 1) | ||
6205 | { | ||
6206 | printk("Too many lost scbs.\n"); | ||
6207 | bogus=TRUE; | ||
6208 | } | ||
6209 | } | ||
6210 | aic_outb(p, saved_scbptr, SCBPTR); | ||
6211 | unpause_sequencer(p, FALSE); | ||
6212 | if (bogus) | ||
6213 | { | ||
6214 | printk("Bogus parameters found in card SCB array structures.\n"); | ||
6215 | printk("%s\n", buffer); | ||
6216 | aic7xxx_panic_abort(p, NULL); | ||
6217 | } | ||
6218 | return; | ||
6219 | } | ||
6220 | #endif | ||
6221 | |||
6222 | |||
6223 | /*+F************************************************************************* | ||
6224 | * Function: | ||
6225 | * aic7xxx_handle_command_completion_intr | ||
6226 | * | ||
6227 | * Description: | ||
6228 | * SCSI command completion interrupt handler. | ||
6229 | *-F*************************************************************************/ | ||
6230 | static void | ||
6231 | aic7xxx_handle_command_completion_intr(struct aic7xxx_host *p) | ||
6232 | { | ||
6233 | struct aic7xxx_scb *scb = NULL; | ||
6234 | struct aic_dev_data *aic_dev; | ||
6235 | struct scsi_cmnd *cmd; | ||
6236 | unsigned char scb_index, tindex; | ||
6237 | |||
6238 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
6239 | if( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) ) | ||
6240 | printk(INFO_LEAD "Command Complete Int.\n", p->host_no, -1, -1, -1); | ||
6241 | #endif | ||
6242 | |||
6243 | /* | ||
6244 | * Read the INTSTAT location after clearing the CMDINT bit. This forces | ||
6245 | * any posted PCI writes to flush to memory. Gerard Roudier suggested | ||
6246 | * this fix to the possible race of clearing the CMDINT bit but not | ||
6247 | * having all command bytes flushed onto the qoutfifo. | ||
6248 | */ | ||
6249 | aic_outb(p, CLRCMDINT, CLRINT); | ||
6250 | aic_inb(p, INTSTAT); | ||
6251 | /* | ||
6252 | * The sequencer will continue running when it | ||
6253 | * issues this interrupt. There may be >1 commands | ||
6254 | * finished, so loop until we've processed them all. | ||
6255 | */ | ||
6256 | |||
6257 | while (p->qoutfifo[p->qoutfifonext] != SCB_LIST_NULL) | ||
6258 | { | ||
6259 | scb_index = p->qoutfifo[p->qoutfifonext]; | ||
6260 | p->qoutfifo[p->qoutfifonext++] = SCB_LIST_NULL; | ||
6261 | if ( scb_index >= p->scb_data->numscbs ) | ||
6262 | { | ||
6263 | printk(WARN_LEAD "CMDCMPLT with invalid SCB index %d\n", p->host_no, | ||
6264 | -1, -1, -1, scb_index); | ||
6265 | continue; | ||
6266 | } | ||
6267 | scb = p->scb_data->scb_array[scb_index]; | ||
6268 | if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL)) | ||
6269 | { | ||
6270 | printk(WARN_LEAD "CMDCMPLT without command for SCB %d, SCB flags " | ||
6271 | "0x%x, cmd 0x%lx\n", p->host_no, -1, -1, -1, scb_index, scb->flags, | ||
6272 | (unsigned long) scb->cmd); | ||
6273 | continue; | ||
6274 | } | ||
6275 | tindex = TARGET_INDEX(scb->cmd); | ||
6276 | aic_dev = AIC_DEV(scb->cmd); | ||
6277 | if (scb->flags & SCB_QUEUED_ABORT) | ||
6278 | { | ||
6279 | pause_sequencer(p); | ||
6280 | if ( ((aic_inb(p, LASTPHASE) & PHASE_MASK) != P_BUSFREE) && | ||
6281 | (aic_inb(p, SCB_TAG) == scb->hscb->tag) ) | ||
6282 | { | ||
6283 | unpause_sequencer(p, FALSE); | ||
6284 | continue; | ||
6285 | } | ||
6286 | aic7xxx_reset_device(p, scb->cmd->device->id, scb->cmd->device->channel, | ||
6287 | scb->cmd->device->lun, scb->hscb->tag); | ||
6288 | scb->flags &= ~(SCB_QUEUED_FOR_DONE | SCB_RESET | SCB_ABORT | | ||
6289 | SCB_QUEUED_ABORT); | ||
6290 | unpause_sequencer(p, FALSE); | ||
6291 | } | ||
6292 | else if (scb->flags & SCB_ABORT) | ||
6293 | { | ||
6294 | /* | ||
6295 | * We started to abort this, but it completed on us, let it | ||
6296 | * through as successful | ||
6297 | */ | ||
6298 | scb->flags &= ~(SCB_ABORT|SCB_RESET); | ||
6299 | } | ||
6300 | else if (scb->flags & SCB_SENSE) | ||
6301 | { | ||
6302 | char *buffer = &scb->cmd->sense_buffer[0]; | ||
6303 | |||
6304 | if (buffer[12] == 0x47 || buffer[12] == 0x54) | ||
6305 | { | ||
6306 | /* | ||
6307 | * Signal that we need to re-negotiate things. | ||
6308 | */ | ||
6309 | aic_dev->needppr = aic_dev->needppr_copy; | ||
6310 | aic_dev->needsdtr = aic_dev->needsdtr_copy; | ||
6311 | aic_dev->needwdtr = aic_dev->needwdtr_copy; | ||
6312 | } | ||
6313 | } | ||
6314 | cmd = scb->cmd; | ||
6315 | if (scb->hscb->residual_SG_segment_count != 0) | ||
6316 | { | ||
6317 | aic7xxx_calculate_residual(p, scb); | ||
6318 | } | ||
6319 | cmd->result |= (aic7xxx_error(cmd) << 16); | ||
6320 | aic7xxx_done(p, scb); | ||
6321 | } | ||
6322 | } | ||
6323 | |||
6324 | /*+F************************************************************************* | ||
6325 | * Function: | ||
6326 | * aic7xxx_isr | ||
6327 | * | ||
6328 | * Description: | ||
6329 | * SCSI controller interrupt handler. | ||
6330 | *-F*************************************************************************/ | ||
6331 | static void | ||
6332 | aic7xxx_isr(void *dev_id) | ||
6333 | { | ||
6334 | struct aic7xxx_host *p; | ||
6335 | unsigned char intstat; | ||
6336 | |||
6337 | p = dev_id; | ||
6338 | |||
6339 | /* | ||
6340 | * Just a few sanity checks. Make sure that we have an int pending. | ||
6341 | * Also, if PCI, then we are going to check for a PCI bus error status | ||
6342 | * should we get too many spurious interrupts. | ||
6343 | */ | ||
6344 | if (!((intstat = aic_inb(p, INTSTAT)) & INT_PEND)) | ||
6345 | { | ||
6346 | #ifdef CONFIG_PCI | ||
6347 | if ( (p->chip & AHC_PCI) && (p->spurious_int > 500) && | ||
6348 | !(p->flags & AHC_HANDLING_REQINITS) ) | ||
6349 | { | ||
6350 | if ( aic_inb(p, ERROR) & PCIERRSTAT ) | ||
6351 | { | ||
6352 | aic7xxx_pci_intr(p); | ||
6353 | } | ||
6354 | p->spurious_int = 0; | ||
6355 | } | ||
6356 | else if ( !(p->flags & AHC_HANDLING_REQINITS) ) | ||
6357 | { | ||
6358 | p->spurious_int++; | ||
6359 | } | ||
6360 | #endif | ||
6361 | return; | ||
6362 | } | ||
6363 | |||
6364 | p->spurious_int = 0; | ||
6365 | |||
6366 | /* | ||
6367 | * Keep track of interrupts for /proc/scsi | ||
6368 | */ | ||
6369 | p->isr_count++; | ||
6370 | |||
6371 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
6372 | if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) && | ||
6373 | (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) ) | ||
6374 | aic7xxx_check_scbs(p, "Bogus settings at start of interrupt."); | ||
6375 | #endif | ||
6376 | |||
6377 | /* | ||
6378 | * Handle all the interrupt sources - especially for SCSI | ||
6379 | * interrupts, we won't get a second chance at them. | ||
6380 | */ | ||
6381 | if (intstat & CMDCMPLT) | ||
6382 | { | ||
6383 | aic7xxx_handle_command_completion_intr(p); | ||
6384 | } | ||
6385 | |||
6386 | if (intstat & BRKADRINT) | ||
6387 | { | ||
6388 | int i; | ||
6389 | unsigned char errno = aic_inb(p, ERROR); | ||
6390 | |||
6391 | printk(KERN_ERR "(scsi%d) BRKADRINT error(0x%x):\n", p->host_no, errno); | ||
6392 | for (i = 0; i < ARRAY_SIZE(hard_error); i++) | ||
6393 | { | ||
6394 | if (errno & hard_error[i].errno) | ||
6395 | { | ||
6396 | printk(KERN_ERR " %s\n", hard_error[i].errmesg); | ||
6397 | } | ||
6398 | } | ||
6399 | printk(KERN_ERR "(scsi%d) SEQADDR=0x%x\n", p->host_no, | ||
6400 | (((aic_inb(p, SEQADDR1) << 8) & 0x100) | aic_inb(p, SEQADDR0))); | ||
6401 | if (aic7xxx_panic_on_abort) | ||
6402 | aic7xxx_panic_abort(p, NULL); | ||
6403 | #ifdef CONFIG_PCI | ||
6404 | if (errno & PCIERRSTAT) | ||
6405 | aic7xxx_pci_intr(p); | ||
6406 | #endif | ||
6407 | if (errno & (SQPARERR | ILLOPCODE | ILLSADDR)) | ||
6408 | { | ||
6409 | panic("aic7xxx: unrecoverable BRKADRINT.\n"); | ||
6410 | } | ||
6411 | if (errno & ILLHADDR) | ||
6412 | { | ||
6413 | printk(KERN_ERR "(scsi%d) BUG! Driver accessed chip without first " | ||
6414 | "pausing controller!\n", p->host_no); | ||
6415 | } | ||
6416 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
6417 | if (errno & DPARERR) | ||
6418 | { | ||
6419 | if (aic_inb(p, DMAPARAMS) & DIRECTION) | ||
6420 | printk("(scsi%d) while DMAing SCB from host to card.\n", p->host_no); | ||
6421 | else | ||
6422 | printk("(scsi%d) while DMAing SCB from card to host.\n", p->host_no); | ||
6423 | } | ||
6424 | #endif | ||
6425 | aic_outb(p, CLRPARERR | CLRBRKADRINT, CLRINT); | ||
6426 | unpause_sequencer(p, FALSE); | ||
6427 | } | ||
6428 | |||
6429 | if (intstat & SEQINT) | ||
6430 | { | ||
6431 | /* | ||
6432 | * Read the CCSCBCTL register to work around a bug in the Ultra2 cards | ||
6433 | */ | ||
6434 | if(p->features & AHC_ULTRA2) | ||
6435 | { | ||
6436 | aic_inb(p, CCSCBCTL); | ||
6437 | } | ||
6438 | aic7xxx_handle_seqint(p, intstat); | ||
6439 | } | ||
6440 | |||
6441 | if (intstat & SCSIINT) | ||
6442 | { | ||
6443 | aic7xxx_handle_scsiint(p, intstat); | ||
6444 | } | ||
6445 | |||
6446 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
6447 | if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) && | ||
6448 | (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) ) | ||
6449 | aic7xxx_check_scbs(p, "Bogus settings at end of interrupt."); | ||
6450 | #endif | ||
6451 | |||
6452 | } | ||
6453 | |||
6454 | /*+F************************************************************************* | ||
6455 | * Function: | ||
6456 | * do_aic7xxx_isr | ||
6457 | * | ||
6458 | * Description: | ||
6459 | * This is a gross hack to solve a problem in linux kernels 2.1.85 and | ||
6460 | * above. Please, children, do not try this at home, and if you ever see | ||
6461 | * anything like it, please inform the Gross Hack Police immediately | ||
6462 | *-F*************************************************************************/ | ||
6463 | static irqreturn_t | ||
6464 | do_aic7xxx_isr(int irq, void *dev_id) | ||
6465 | { | ||
6466 | unsigned long cpu_flags; | ||
6467 | struct aic7xxx_host *p; | ||
6468 | |||
6469 | p = dev_id; | ||
6470 | if(!p) | ||
6471 | return IRQ_NONE; | ||
6472 | spin_lock_irqsave(p->host->host_lock, cpu_flags); | ||
6473 | p->flags |= AHC_IN_ISR; | ||
6474 | do | ||
6475 | { | ||
6476 | aic7xxx_isr(dev_id); | ||
6477 | } while ( (aic_inb(p, INTSTAT) & INT_PEND) ); | ||
6478 | aic7xxx_done_cmds_complete(p); | ||
6479 | aic7xxx_run_waiting_queues(p); | ||
6480 | p->flags &= ~AHC_IN_ISR; | ||
6481 | spin_unlock_irqrestore(p->host->host_lock, cpu_flags); | ||
6482 | |||
6483 | return IRQ_HANDLED; | ||
6484 | } | ||
6485 | |||
6486 | /*+F************************************************************************* | ||
6487 | * Function: | ||
6488 | * aic7xxx_init_transinfo | ||
6489 | * | ||
6490 | * Description: | ||
6491 | * Set up the initial aic_dev values from the BIOS settings and from | ||
6492 | * INQUIRY results | ||
6493 | *-F*************************************************************************/ | ||
6494 | static void | ||
6495 | aic7xxx_init_transinfo(struct aic7xxx_host *p, struct aic_dev_data *aic_dev) | ||
6496 | { | ||
6497 | struct scsi_device *sdpnt = aic_dev->SDptr; | ||
6498 | unsigned char tindex; | ||
6499 | |||
6500 | tindex = sdpnt->id | (sdpnt->channel << 3); | ||
6501 | if (!(aic_dev->flags & DEVICE_DTR_SCANNED)) | ||
6502 | { | ||
6503 | aic_dev->flags |= DEVICE_DTR_SCANNED; | ||
6504 | |||
6505 | if ( sdpnt->wdtr && (p->features & AHC_WIDE) ) | ||
6506 | { | ||
6507 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; | ||
6508 | aic_dev->goal.width = p->user[tindex].width; | ||
6509 | } | ||
6510 | else | ||
6511 | { | ||
6512 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; | ||
6513 | pause_sequencer(p); | ||
6514 | aic7xxx_set_width(p, sdpnt->id, sdpnt->channel, sdpnt->lun, | ||
6515 | MSG_EXT_WDTR_BUS_8_BIT, (AHC_TRANS_ACTIVE | | ||
6516 | AHC_TRANS_GOAL | | ||
6517 | AHC_TRANS_CUR), aic_dev ); | ||
6518 | unpause_sequencer(p, FALSE); | ||
6519 | } | ||
6520 | if ( sdpnt->sdtr && p->user[tindex].offset ) | ||
6521 | { | ||
6522 | aic_dev->goal.period = p->user[tindex].period; | ||
6523 | aic_dev->goal.options = p->user[tindex].options; | ||
6524 | if (p->features & AHC_ULTRA2) | ||
6525 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; | ||
6526 | else if (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT) | ||
6527 | aic_dev->goal.offset = MAX_OFFSET_16BIT; | ||
6528 | else | ||
6529 | aic_dev->goal.offset = MAX_OFFSET_8BIT; | ||
6530 | if ( sdpnt->ppr && p->user[tindex].period <= 9 && | ||
6531 | p->user[tindex].options ) | ||
6532 | { | ||
6533 | aic_dev->needppr = aic_dev->needppr_copy = 1; | ||
6534 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; | ||
6535 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; | ||
6536 | aic_dev->flags |= DEVICE_SCSI_3; | ||
6537 | } | ||
6538 | else | ||
6539 | { | ||
6540 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; | ||
6541 | aic_dev->goal.period = max_t(unsigned char, 10, aic_dev->goal.period); | ||
6542 | aic_dev->goal.options = 0; | ||
6543 | } | ||
6544 | } | ||
6545 | else | ||
6546 | { | ||
6547 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; | ||
6548 | aic_dev->goal.period = 255; | ||
6549 | aic_dev->goal.offset = 0; | ||
6550 | aic_dev->goal.options = 0; | ||
6551 | } | ||
6552 | aic_dev->flags |= DEVICE_PRINT_DTR; | ||
6553 | } | ||
6554 | } | ||
6555 | |||
6556 | /*+F************************************************************************* | ||
6557 | * Function: | ||
6558 | * aic7xxx_slave_alloc | ||
6559 | * | ||
6560 | * Description: | ||
6561 | * Set up the initial aic_dev struct pointers | ||
6562 | *-F*************************************************************************/ | ||
6563 | static int | ||
6564 | aic7xxx_slave_alloc(struct scsi_device *SDptr) | ||
6565 | { | ||
6566 | struct aic7xxx_host *p = (struct aic7xxx_host *)SDptr->host->hostdata; | ||
6567 | struct aic_dev_data *aic_dev; | ||
6568 | |||
6569 | aic_dev = kmalloc(sizeof(struct aic_dev_data), GFP_KERNEL); | ||
6570 | if(!aic_dev) | ||
6571 | return 1; | ||
6572 | /* | ||
6573 | * Check to see if channel was scanned. | ||
6574 | */ | ||
6575 | |||
6576 | if (!(p->flags & AHC_A_SCANNED) && (SDptr->channel == 0)) | ||
6577 | { | ||
6578 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
6579 | printk(INFO_LEAD "Scanning channel for devices.\n", | ||
6580 | p->host_no, 0, -1, -1); | ||
6581 | p->flags |= AHC_A_SCANNED; | ||
6582 | } | ||
6583 | else | ||
6584 | { | ||
6585 | if (!(p->flags & AHC_B_SCANNED) && (SDptr->channel == 1)) | ||
6586 | { | ||
6587 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
6588 | printk(INFO_LEAD "Scanning channel for devices.\n", | ||
6589 | p->host_no, 1, -1, -1); | ||
6590 | p->flags |= AHC_B_SCANNED; | ||
6591 | } | ||
6592 | } | ||
6593 | |||
6594 | memset(aic_dev, 0, sizeof(struct aic_dev_data)); | ||
6595 | SDptr->hostdata = aic_dev; | ||
6596 | aic_dev->SDptr = SDptr; | ||
6597 | aic_dev->max_q_depth = 1; | ||
6598 | aic_dev->temp_q_depth = 1; | ||
6599 | scbq_init(&aic_dev->delayed_scbs); | ||
6600 | INIT_LIST_HEAD(&aic_dev->list); | ||
6601 | list_add_tail(&aic_dev->list, &p->aic_devs); | ||
6602 | return 0; | ||
6603 | } | ||
6604 | |||
6605 | /*+F************************************************************************* | ||
6606 | * Function: | ||
6607 | * aic7xxx_device_queue_depth | ||
6608 | * | ||
6609 | * Description: | ||
6610 | * Determines the queue depth for a given device. There are two ways | ||
6611 | * a queue depth can be obtained for a tagged queueing device. One | ||
6612 | * way is the default queue depth which is determined by whether | ||
6613 | * aic7xxx_default_queue_depth. The other is by the aic7xxx_tag_info | ||
6614 | * array. | ||
6615 | * | ||
6616 | * If tagged queueing isn't supported on the device, then we set the | ||
6617 | * depth to p->host->hostt->cmd_per_lun for internal driver queueing. | ||
6618 | * as the default queue depth. Otherwise, we use either 4 or 8 as the | ||
6619 | * default queue depth (dependent on the number of hardware SCBs). | ||
6620 | * The other way we determine queue depth is through the use of the | ||
6621 | * aic7xxx_tag_info array which is enabled by defining | ||
6622 | * AIC7XXX_TAGGED_QUEUEING_BY_DEVICE. This array can be initialized | ||
6623 | * with queue depths for individual devices. It also allows tagged | ||
6624 | * queueing to be [en|dis]abled for a specific adapter. | ||
6625 | *-F*************************************************************************/ | ||
6626 | static void | ||
6627 | aic7xxx_device_queue_depth(struct aic7xxx_host *p, struct scsi_device *device) | ||
6628 | { | ||
6629 | int tag_enabled = FALSE; | ||
6630 | struct aic_dev_data *aic_dev = device->hostdata; | ||
6631 | unsigned char tindex; | ||
6632 | |||
6633 | tindex = device->id | (device->channel << 3); | ||
6634 | |||
6635 | if (device->simple_tags) | ||
6636 | return; // We've already enabled this device | ||
6637 | |||
6638 | if (device->tagged_supported) | ||
6639 | { | ||
6640 | tag_enabled = TRUE; | ||
6641 | |||
6642 | if (!(p->discenable & (1 << tindex))) | ||
6643 | { | ||
6644 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
6645 | printk(INFO_LEAD "Disconnection disabled, unable to " | ||
6646 | "enable tagged queueing.\n", | ||
6647 | p->host_no, device->channel, device->id, device->lun); | ||
6648 | tag_enabled = FALSE; | ||
6649 | } | ||
6650 | else | ||
6651 | { | ||
6652 | if (p->instance >= ARRAY_SIZE(aic7xxx_tag_info)) | ||
6653 | { | ||
6654 | static int print_warning = TRUE; | ||
6655 | if(print_warning) | ||
6656 | { | ||
6657 | printk(KERN_INFO "aic7xxx: WARNING, insufficient tag_info instances for" | ||
6658 | " installed controllers.\n"); | ||
6659 | printk(KERN_INFO "aic7xxx: Please update the aic7xxx_tag_info array in" | ||
6660 | " the aic7xxx.c source file.\n"); | ||
6661 | print_warning = FALSE; | ||
6662 | } | ||
6663 | aic_dev->max_q_depth = aic_dev->temp_q_depth = | ||
6664 | aic7xxx_default_queue_depth; | ||
6665 | } | ||
6666 | else | ||
6667 | { | ||
6668 | |||
6669 | if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 255) | ||
6670 | { | ||
6671 | tag_enabled = FALSE; | ||
6672 | } | ||
6673 | else if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 0) | ||
6674 | { | ||
6675 | aic_dev->max_q_depth = aic_dev->temp_q_depth = | ||
6676 | aic7xxx_default_queue_depth; | ||
6677 | } | ||
6678 | else | ||
6679 | { | ||
6680 | aic_dev->max_q_depth = aic_dev->temp_q_depth = | ||
6681 | aic7xxx_tag_info[p->instance].tag_commands[tindex]; | ||
6682 | } | ||
6683 | } | ||
6684 | } | ||
6685 | } | ||
6686 | if (tag_enabled) | ||
6687 | { | ||
6688 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
6689 | { | ||
6690 | printk(INFO_LEAD "Tagged queuing enabled, queue depth %d.\n", | ||
6691 | p->host_no, device->channel, device->id, | ||
6692 | device->lun, aic_dev->max_q_depth); | ||
6693 | } | ||
6694 | scsi_adjust_queue_depth(device, MSG_ORDERED_TAG, aic_dev->max_q_depth); | ||
6695 | } | ||
6696 | else | ||
6697 | { | ||
6698 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) | ||
6699 | { | ||
6700 | printk(INFO_LEAD "Tagged queuing disabled, queue depth %d.\n", | ||
6701 | p->host_no, device->channel, device->id, | ||
6702 | device->lun, device->host->cmd_per_lun); | ||
6703 | } | ||
6704 | scsi_adjust_queue_depth(device, 0, device->host->cmd_per_lun); | ||
6705 | } | ||
6706 | return; | ||
6707 | } | ||
6708 | |||
6709 | /*+F************************************************************************* | ||
6710 | * Function: | ||
6711 | * aic7xxx_slave_destroy | ||
6712 | * | ||
6713 | * Description: | ||
6714 | * prepare for this device to go away | ||
6715 | *-F*************************************************************************/ | ||
6716 | static void | ||
6717 | aic7xxx_slave_destroy(struct scsi_device *SDptr) | ||
6718 | { | ||
6719 | struct aic_dev_data *aic_dev = SDptr->hostdata; | ||
6720 | |||
6721 | list_del(&aic_dev->list); | ||
6722 | SDptr->hostdata = NULL; | ||
6723 | kfree(aic_dev); | ||
6724 | return; | ||
6725 | } | ||
6726 | |||
6727 | /*+F************************************************************************* | ||
6728 | * Function: | ||
6729 | * aic7xxx_slave_configure | ||
6730 | * | ||
6731 | * Description: | ||
6732 | * Configure the device we are attaching to the controller. This is | ||
6733 | * where we get to do things like scan the INQUIRY data, set queue | ||
6734 | * depths, allocate command structs, etc. | ||
6735 | *-F*************************************************************************/ | ||
6736 | static int | ||
6737 | aic7xxx_slave_configure(struct scsi_device *SDptr) | ||
6738 | { | ||
6739 | struct aic7xxx_host *p = (struct aic7xxx_host *) SDptr->host->hostdata; | ||
6740 | struct aic_dev_data *aic_dev; | ||
6741 | int scbnum; | ||
6742 | |||
6743 | aic_dev = (struct aic_dev_data *)SDptr->hostdata; | ||
6744 | |||
6745 | aic7xxx_init_transinfo(p, aic_dev); | ||
6746 | aic7xxx_device_queue_depth(p, SDptr); | ||
6747 | if(list_empty(&aic_dev->list)) | ||
6748 | list_add_tail(&aic_dev->list, &p->aic_devs); | ||
6749 | |||
6750 | scbnum = 0; | ||
6751 | list_for_each_entry(aic_dev, &p->aic_devs, list) { | ||
6752 | scbnum += aic_dev->max_q_depth; | ||
6753 | } | ||
6754 | while (scbnum > p->scb_data->numscbs) | ||
6755 | { | ||
6756 | /* | ||
6757 | * Pre-allocate the needed SCBs to get around the possibility of having | ||
6758 | * to allocate some when memory is more or less exhausted and we need | ||
6759 | * the SCB in order to perform a swap operation (possible deadlock) | ||
6760 | */ | ||
6761 | if ( aic7xxx_allocate_scb(p) == 0 ) | ||
6762 | break; | ||
6763 | } | ||
6764 | |||
6765 | |||
6766 | return(0); | ||
6767 | } | ||
6768 | |||
6769 | /*+F************************************************************************* | ||
6770 | * Function: | ||
6771 | * aic7xxx_probe | ||
6772 | * | ||
6773 | * Description: | ||
6774 | * Probing for EISA boards: it looks like the first two bytes | ||
6775 | * are a manufacturer code - three characters, five bits each: | ||
6776 | * | ||
6777 | * BYTE 0 BYTE 1 BYTE 2 BYTE 3 | ||
6778 | * ?1111122 22233333 PPPPPPPP RRRRRRRR | ||
6779 | * | ||
6780 | * The characters are baselined off ASCII '@', so add that value | ||
6781 | * to each to get the real ASCII code for it. The next two bytes | ||
6782 | * appear to be a product and revision number, probably vendor- | ||
6783 | * specific. This is what is being searched for at each port, | ||
6784 | * and what should probably correspond to the ID= field in the | ||
6785 | * ECU's .cfg file for the card - if your card is not detected, | ||
6786 | * make sure your signature is listed in the array. | ||
6787 | * | ||
6788 | * The fourth byte's lowest bit seems to be an enabled/disabled | ||
6789 | * flag (rest of the bits are reserved?). | ||
6790 | * | ||
6791 | * NOTE: This function is only needed on Intel and Alpha platforms, | ||
6792 | * the other platforms we support don't have EISA/VLB busses. So, | ||
6793 | * we #ifdef this entire function to avoid compiler warnings about | ||
6794 | * an unused function. | ||
6795 | *-F*************************************************************************/ | ||
6796 | #if defined(__i386__) || defined(__alpha__) | ||
6797 | static int | ||
6798 | aic7xxx_probe(int slot, int base, ahc_flag_type *flags) | ||
6799 | { | ||
6800 | int i; | ||
6801 | unsigned char buf[4]; | ||
6802 | |||
6803 | static struct { | ||
6804 | int n; | ||
6805 | unsigned char signature[sizeof(buf)]; | ||
6806 | ahc_chip type; | ||
6807 | int bios_disabled; | ||
6808 | } AIC7xxx[] = { | ||
6809 | { 4, { 0x04, 0x90, 0x77, 0x70 }, | ||
6810 | AHC_AIC7770|AHC_EISA, FALSE }, /* mb 7770 */ | ||
6811 | { 4, { 0x04, 0x90, 0x77, 0x71 }, | ||
6812 | AHC_AIC7770|AHC_EISA, FALSE }, /* host adapter 274x */ | ||
6813 | { 4, { 0x04, 0x90, 0x77, 0x56 }, | ||
6814 | AHC_AIC7770|AHC_VL, FALSE }, /* 284x BIOS enabled */ | ||
6815 | { 4, { 0x04, 0x90, 0x77, 0x57 }, | ||
6816 | AHC_AIC7770|AHC_VL, TRUE } /* 284x BIOS disabled */ | ||
6817 | }; | ||
6818 | |||
6819 | /* | ||
6820 | * The VL-bus cards need to be primed by | ||
6821 | * writing before a signature check. | ||
6822 | */ | ||
6823 | for (i = 0; i < sizeof(buf); i++) | ||
6824 | { | ||
6825 | outb(0x80 + i, base); | ||
6826 | buf[i] = inb(base + i); | ||
6827 | } | ||
6828 | |||
6829 | for (i = 0; i < ARRAY_SIZE(AIC7xxx); i++) | ||
6830 | { | ||
6831 | /* | ||
6832 | * Signature match on enabled card? | ||
6833 | */ | ||
6834 | if (!memcmp(buf, AIC7xxx[i].signature, AIC7xxx[i].n)) | ||
6835 | { | ||
6836 | if (inb(base + 4) & 1) | ||
6837 | { | ||
6838 | if (AIC7xxx[i].bios_disabled) | ||
6839 | { | ||
6840 | *flags |= AHC_USEDEFAULTS; | ||
6841 | } | ||
6842 | else | ||
6843 | { | ||
6844 | *flags |= AHC_BIOS_ENABLED; | ||
6845 | } | ||
6846 | return (i); | ||
6847 | } | ||
6848 | |||
6849 | printk("aic7xxx: <Adaptec 7770 SCSI Host Adapter> " | ||
6850 | "disabled at slot %d, ignored.\n", slot); | ||
6851 | } | ||
6852 | } | ||
6853 | |||
6854 | return (-1); | ||
6855 | } | ||
6856 | #endif /* (__i386__) || (__alpha__) */ | ||
6857 | |||
6858 | |||
6859 | /*+F************************************************************************* | ||
6860 | * Function: | ||
6861 | * read_2840_seeprom | ||
6862 | * | ||
6863 | * Description: | ||
6864 | * Reads the 2840 serial EEPROM and returns 1 if successful and 0 if | ||
6865 | * not successful. | ||
6866 | * | ||
6867 | * See read_seeprom (for the 2940) for the instruction set of the 93C46 | ||
6868 | * chip. | ||
6869 | * | ||
6870 | * The 2840 interface to the 93C46 serial EEPROM is through the | ||
6871 | * STATUS_2840 and SEECTL_2840 registers. The CS_2840, CK_2840, and | ||
6872 | * DO_2840 bits of the SEECTL_2840 register are connected to the chip | ||
6873 | * select, clock, and data out lines respectively of the serial EEPROM. | ||
6874 | * The DI_2840 bit of the STATUS_2840 is connected to the data in line | ||
6875 | * of the serial EEPROM. The EEPROM_TF bit of STATUS_2840 register is | ||
6876 | * useful in that it gives us an 800 nsec timer. After a read from the | ||
6877 | * SEECTL_2840 register the timing flag is cleared and goes high 800 nsec | ||
6878 | * later. | ||
6879 | *-F*************************************************************************/ | ||
6880 | static int | ||
6881 | read_284x_seeprom(struct aic7xxx_host *p, struct seeprom_config *sc) | ||
6882 | { | ||
6883 | int i = 0, k = 0; | ||
6884 | unsigned char temp; | ||
6885 | unsigned short checksum = 0; | ||
6886 | unsigned short *seeprom = (unsigned short *) sc; | ||
6887 | struct seeprom_cmd { | ||
6888 | unsigned char len; | ||
6889 | unsigned char bits[3]; | ||
6890 | }; | ||
6891 | struct seeprom_cmd seeprom_read = {3, {1, 1, 0}}; | ||
6892 | |||
6893 | #define CLOCK_PULSE(p) \ | ||
6894 | while ((aic_inb(p, STATUS_2840) & EEPROM_TF) == 0) \ | ||
6895 | { \ | ||
6896 | ; /* Do nothing */ \ | ||
6897 | } \ | ||
6898 | (void) aic_inb(p, SEECTL_2840); | ||
6899 | |||
6900 | /* | ||
6901 | * Read the first 32 registers of the seeprom. For the 2840, | ||
6902 | * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers | ||
6903 | * but only the first 32 are used by Adaptec BIOS. The loop | ||
6904 | * will range from 0 to 31. | ||
6905 | */ | ||
6906 | for (k = 0; k < (sizeof(*sc) / 2); k++) | ||
6907 | { | ||
6908 | /* | ||
6909 | * Send chip select for one clock cycle. | ||
6910 | */ | ||
6911 | aic_outb(p, CK_2840 | CS_2840, SEECTL_2840); | ||
6912 | CLOCK_PULSE(p); | ||
6913 | |||
6914 | /* | ||
6915 | * Now we're ready to send the read command followed by the | ||
6916 | * address of the 16-bit register we want to read. | ||
6917 | */ | ||
6918 | for (i = 0; i < seeprom_read.len; i++) | ||
6919 | { | ||
6920 | temp = CS_2840 | seeprom_read.bits[i]; | ||
6921 | aic_outb(p, temp, SEECTL_2840); | ||
6922 | CLOCK_PULSE(p); | ||
6923 | temp = temp ^ CK_2840; | ||
6924 | aic_outb(p, temp, SEECTL_2840); | ||
6925 | CLOCK_PULSE(p); | ||
6926 | } | ||
6927 | /* | ||
6928 | * Send the 6 bit address (MSB first, LSB last). | ||
6929 | */ | ||
6930 | for (i = 5; i >= 0; i--) | ||
6931 | { | ||
6932 | temp = k; | ||
6933 | temp = (temp >> i) & 1; /* Mask out all but lower bit. */ | ||
6934 | temp = CS_2840 | temp; | ||
6935 | aic_outb(p, temp, SEECTL_2840); | ||
6936 | CLOCK_PULSE(p); | ||
6937 | temp = temp ^ CK_2840; | ||
6938 | aic_outb(p, temp, SEECTL_2840); | ||
6939 | CLOCK_PULSE(p); | ||
6940 | } | ||
6941 | |||
6942 | /* | ||
6943 | * Now read the 16 bit register. An initial 0 precedes the | ||
6944 | * register contents which begins with bit 15 (MSB) and ends | ||
6945 | * with bit 0 (LSB). The initial 0 will be shifted off the | ||
6946 | * top of our word as we let the loop run from 0 to 16. | ||
6947 | */ | ||
6948 | for (i = 0; i <= 16; i++) | ||
6949 | { | ||
6950 | temp = CS_2840; | ||
6951 | aic_outb(p, temp, SEECTL_2840); | ||
6952 | CLOCK_PULSE(p); | ||
6953 | temp = temp ^ CK_2840; | ||
6954 | seeprom[k] = (seeprom[k] << 1) | (aic_inb(p, STATUS_2840) & DI_2840); | ||
6955 | aic_outb(p, temp, SEECTL_2840); | ||
6956 | CLOCK_PULSE(p); | ||
6957 | } | ||
6958 | /* | ||
6959 | * The serial EEPROM has a checksum in the last word. Keep a | ||
6960 | * running checksum for all words read except for the last | ||
6961 | * word. We'll verify the checksum after all words have been | ||
6962 | * read. | ||
6963 | */ | ||
6964 | if (k < (sizeof(*sc) / 2) - 1) | ||
6965 | { | ||
6966 | checksum = checksum + seeprom[k]; | ||
6967 | } | ||
6968 | |||
6969 | /* | ||
6970 | * Reset the chip select for the next command cycle. | ||
6971 | */ | ||
6972 | aic_outb(p, 0, SEECTL_2840); | ||
6973 | CLOCK_PULSE(p); | ||
6974 | aic_outb(p, CK_2840, SEECTL_2840); | ||
6975 | CLOCK_PULSE(p); | ||
6976 | aic_outb(p, 0, SEECTL_2840); | ||
6977 | CLOCK_PULSE(p); | ||
6978 | } | ||
6979 | |||
6980 | #if 0 | ||
6981 | printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum); | ||
6982 | printk("Serial EEPROM:"); | ||
6983 | for (k = 0; k < (sizeof(*sc) / 2); k++) | ||
6984 | { | ||
6985 | if (((k % 8) == 0) && (k != 0)) | ||
6986 | { | ||
6987 | printk("\n "); | ||
6988 | } | ||
6989 | printk(" 0x%x", seeprom[k]); | ||
6990 | } | ||
6991 | printk("\n"); | ||
6992 | #endif | ||
6993 | |||
6994 | if (checksum != sc->checksum) | ||
6995 | { | ||
6996 | printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n"); | ||
6997 | return (0); | ||
6998 | } | ||
6999 | |||
7000 | return (1); | ||
7001 | #undef CLOCK_PULSE | ||
7002 | } | ||
7003 | |||
7004 | #define CLOCK_PULSE(p) \ | ||
7005 | do { \ | ||
7006 | int limit = 0; \ | ||
7007 | do { \ | ||
7008 | mb(); \ | ||
7009 | pause_sequencer(p); /* This is just to generate some PCI */ \ | ||
7010 | /* traffic so the PCI read is flushed */ \ | ||
7011 | /* it shouldn't be needed, but some */ \ | ||
7012 | /* chipsets do indeed appear to need */ \ | ||
7013 | /* something to force PCI reads to get */ \ | ||
7014 | /* flushed */ \ | ||
7015 | udelay(1); /* Do nothing */ \ | ||
7016 | } while (((aic_inb(p, SEECTL) & SEERDY) == 0) && (++limit < 1000)); \ | ||
7017 | } while(0) | ||
7018 | |||
7019 | /*+F************************************************************************* | ||
7020 | * Function: | ||
7021 | * acquire_seeprom | ||
7022 | * | ||
7023 | * Description: | ||
7024 | * Acquires access to the memory port on PCI controllers. | ||
7025 | *-F*************************************************************************/ | ||
7026 | static int | ||
7027 | acquire_seeprom(struct aic7xxx_host *p) | ||
7028 | { | ||
7029 | |||
7030 | /* | ||
7031 | * Request access of the memory port. When access is | ||
7032 | * granted, SEERDY will go high. We use a 1 second | ||
7033 | * timeout which should be near 1 second more than | ||
7034 | * is needed. Reason: after the 7870 chip reset, there | ||
7035 | * should be no contention. | ||
7036 | */ | ||
7037 | aic_outb(p, SEEMS, SEECTL); | ||
7038 | CLOCK_PULSE(p); | ||
7039 | if ((aic_inb(p, SEECTL) & SEERDY) == 0) | ||
7040 | { | ||
7041 | aic_outb(p, 0, SEECTL); | ||
7042 | return (0); | ||
7043 | } | ||
7044 | return (1); | ||
7045 | } | ||
7046 | |||
7047 | /*+F************************************************************************* | ||
7048 | * Function: | ||
7049 | * release_seeprom | ||
7050 | * | ||
7051 | * Description: | ||
7052 | * Releases access to the memory port on PCI controllers. | ||
7053 | *-F*************************************************************************/ | ||
7054 | static void | ||
7055 | release_seeprom(struct aic7xxx_host *p) | ||
7056 | { | ||
7057 | /* | ||
7058 | * Make sure the SEEPROM is ready before we release it. | ||
7059 | */ | ||
7060 | CLOCK_PULSE(p); | ||
7061 | aic_outb(p, 0, SEECTL); | ||
7062 | } | ||
7063 | |||
7064 | /*+F************************************************************************* | ||
7065 | * Function: | ||
7066 | * read_seeprom | ||
7067 | * | ||
7068 | * Description: | ||
7069 | * Reads the serial EEPROM and returns 1 if successful and 0 if | ||
7070 | * not successful. | ||
7071 | * | ||
7072 | * The instruction set of the 93C46/56/66 chips is as follows: | ||
7073 | * | ||
7074 | * Start OP | ||
7075 | * Function Bit Code Address Data Description | ||
7076 | * ------------------------------------------------------------------- | ||
7077 | * READ 1 10 A5 - A0 Reads data stored in memory, | ||
7078 | * starting at specified address | ||
7079 | * EWEN 1 00 11XXXX Write enable must precede | ||
7080 | * all programming modes | ||
7081 | * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0 | ||
7082 | * WRITE 1 01 A5 - A0 D15 - D0 Writes register | ||
7083 | * ERAL 1 00 10XXXX Erase all registers | ||
7084 | * WRAL 1 00 01XXXX D15 - D0 Writes to all registers | ||
7085 | * EWDS 1 00 00XXXX Disables all programming | ||
7086 | * instructions | ||
7087 | * *Note: A value of X for address is a don't care condition. | ||
7088 | * *Note: The 93C56 and 93C66 have 8 address bits. | ||
7089 | * | ||
7090 | * | ||
7091 | * The 93C46 has a four wire interface: clock, chip select, data in, and | ||
7092 | * data out. In order to perform one of the above functions, you need | ||
7093 | * to enable the chip select for a clock period (typically a minimum of | ||
7094 | * 1 usec, with the clock high and low a minimum of 750 and 250 nsec | ||
7095 | * respectively. While the chip select remains high, you can clock in | ||
7096 | * the instructions (above) starting with the start bit, followed by the | ||
7097 | * OP code, Address, and Data (if needed). For the READ instruction, the | ||
7098 | * requested 16-bit register contents is read from the data out line but | ||
7099 | * is preceded by an initial zero (leading 0, followed by 16-bits, MSB | ||
7100 | * first). The clock cycling from low to high initiates the next data | ||
7101 | * bit to be sent from the chip. | ||
7102 | * | ||
7103 | * The 78xx interface to the 93C46 serial EEPROM is through the SEECTL | ||
7104 | * register. After successful arbitration for the memory port, the | ||
7105 | * SEECS bit of the SEECTL register is connected to the chip select. | ||
7106 | * The SEECK, SEEDO, and SEEDI are connected to the clock, data out, | ||
7107 | * and data in lines respectively. The SEERDY bit of SEECTL is useful | ||
7108 | * in that it gives us an 800 nsec timer. After a write to the SEECTL | ||
7109 | * register, the SEERDY goes high 800 nsec later. The one exception | ||
7110 | * to this is when we first request access to the memory port. The | ||
7111 | * SEERDY goes high to signify that access has been granted and, for | ||
7112 | * this case, has no implied timing. | ||
7113 | *-F*************************************************************************/ | ||
7114 | static int | ||
7115 | read_seeprom(struct aic7xxx_host *p, int offset, | ||
7116 | unsigned short *scarray, unsigned int len, seeprom_chip_type chip) | ||
7117 | { | ||
7118 | int i = 0, k; | ||
7119 | unsigned char temp; | ||
7120 | unsigned short checksum = 0; | ||
7121 | struct seeprom_cmd { | ||
7122 | unsigned char len; | ||
7123 | unsigned char bits[3]; | ||
7124 | }; | ||
7125 | struct seeprom_cmd seeprom_read = {3, {1, 1, 0}}; | ||
7126 | |||
7127 | /* | ||
7128 | * Request access of the memory port. | ||
7129 | */ | ||
7130 | if (acquire_seeprom(p) == 0) | ||
7131 | { | ||
7132 | return (0); | ||
7133 | } | ||
7134 | |||
7135 | /* | ||
7136 | * Read 'len' registers of the seeprom. For the 7870, the 93C46 | ||
7137 | * SEEPROM is a 1024-bit device with 64 16-bit registers but only | ||
7138 | * the first 32 are used by Adaptec BIOS. Some adapters use the | ||
7139 | * 93C56 SEEPROM which is a 2048-bit device. The loop will range | ||
7140 | * from 0 to 'len' - 1. | ||
7141 | */ | ||
7142 | for (k = 0; k < len; k++) | ||
7143 | { | ||
7144 | /* | ||
7145 | * Send chip select for one clock cycle. | ||
7146 | */ | ||
7147 | aic_outb(p, SEEMS | SEECK | SEECS, SEECTL); | ||
7148 | CLOCK_PULSE(p); | ||
7149 | |||
7150 | /* | ||
7151 | * Now we're ready to send the read command followed by the | ||
7152 | * address of the 16-bit register we want to read. | ||
7153 | */ | ||
7154 | for (i = 0; i < seeprom_read.len; i++) | ||
7155 | { | ||
7156 | temp = SEEMS | SEECS | (seeprom_read.bits[i] << 1); | ||
7157 | aic_outb(p, temp, SEECTL); | ||
7158 | CLOCK_PULSE(p); | ||
7159 | temp = temp ^ SEECK; | ||
7160 | aic_outb(p, temp, SEECTL); | ||
7161 | CLOCK_PULSE(p); | ||
7162 | } | ||
7163 | /* | ||
7164 | * Send the 6 or 8 bit address (MSB first, LSB last). | ||
7165 | */ | ||
7166 | for (i = ((int) chip - 1); i >= 0; i--) | ||
7167 | { | ||
7168 | temp = k + offset; | ||
7169 | temp = (temp >> i) & 1; /* Mask out all but lower bit. */ | ||
7170 | temp = SEEMS | SEECS | (temp << 1); | ||
7171 | aic_outb(p, temp, SEECTL); | ||
7172 | CLOCK_PULSE(p); | ||
7173 | temp = temp ^ SEECK; | ||
7174 | aic_outb(p, temp, SEECTL); | ||
7175 | CLOCK_PULSE(p); | ||
7176 | } | ||
7177 | |||
7178 | /* | ||
7179 | * Now read the 16 bit register. An initial 0 precedes the | ||
7180 | * register contents which begins with bit 15 (MSB) and ends | ||
7181 | * with bit 0 (LSB). The initial 0 will be shifted off the | ||
7182 | * top of our word as we let the loop run from 0 to 16. | ||
7183 | */ | ||
7184 | for (i = 0; i <= 16; i++) | ||
7185 | { | ||
7186 | temp = SEEMS | SEECS; | ||
7187 | aic_outb(p, temp, SEECTL); | ||
7188 | CLOCK_PULSE(p); | ||
7189 | temp = temp ^ SEECK; | ||
7190 | scarray[k] = (scarray[k] << 1) | (aic_inb(p, SEECTL) & SEEDI); | ||
7191 | aic_outb(p, temp, SEECTL); | ||
7192 | CLOCK_PULSE(p); | ||
7193 | } | ||
7194 | |||
7195 | /* | ||
7196 | * The serial EEPROM should have a checksum in the last word. | ||
7197 | * Keep a running checksum for all words read except for the | ||
7198 | * last word. We'll verify the checksum after all words have | ||
7199 | * been read. | ||
7200 | */ | ||
7201 | if (k < (len - 1)) | ||
7202 | { | ||
7203 | checksum = checksum + scarray[k]; | ||
7204 | } | ||
7205 | |||
7206 | /* | ||
7207 | * Reset the chip select for the next command cycle. | ||
7208 | */ | ||
7209 | aic_outb(p, SEEMS, SEECTL); | ||
7210 | CLOCK_PULSE(p); | ||
7211 | aic_outb(p, SEEMS | SEECK, SEECTL); | ||
7212 | CLOCK_PULSE(p); | ||
7213 | aic_outb(p, SEEMS, SEECTL); | ||
7214 | CLOCK_PULSE(p); | ||
7215 | } | ||
7216 | |||
7217 | /* | ||
7218 | * Release access to the memory port and the serial EEPROM. | ||
7219 | */ | ||
7220 | release_seeprom(p); | ||
7221 | |||
7222 | #if 0 | ||
7223 | printk("Computed checksum 0x%x, checksum read 0x%x\n", | ||
7224 | checksum, scarray[len - 1]); | ||
7225 | printk("Serial EEPROM:"); | ||
7226 | for (k = 0; k < len; k++) | ||
7227 | { | ||
7228 | if (((k % 8) == 0) && (k != 0)) | ||
7229 | { | ||
7230 | printk("\n "); | ||
7231 | } | ||
7232 | printk(" 0x%x", scarray[k]); | ||
7233 | } | ||
7234 | printk("\n"); | ||
7235 | #endif | ||
7236 | if ( (checksum != scarray[len - 1]) || (checksum == 0) ) | ||
7237 | { | ||
7238 | return (0); | ||
7239 | } | ||
7240 | |||
7241 | return (1); | ||
7242 | } | ||
7243 | |||
7244 | /*+F************************************************************************* | ||
7245 | * Function: | ||
7246 | * read_brdctl | ||
7247 | * | ||
7248 | * Description: | ||
7249 | * Reads the BRDCTL register. | ||
7250 | *-F*************************************************************************/ | ||
7251 | static unsigned char | ||
7252 | read_brdctl(struct aic7xxx_host *p) | ||
7253 | { | ||
7254 | unsigned char brdctl, value; | ||
7255 | |||
7256 | /* | ||
7257 | * Make sure the SEEPROM is ready before we access it | ||
7258 | */ | ||
7259 | CLOCK_PULSE(p); | ||
7260 | if (p->features & AHC_ULTRA2) | ||
7261 | { | ||
7262 | brdctl = BRDRW_ULTRA2; | ||
7263 | aic_outb(p, brdctl, BRDCTL); | ||
7264 | CLOCK_PULSE(p); | ||
7265 | value = aic_inb(p, BRDCTL); | ||
7266 | CLOCK_PULSE(p); | ||
7267 | return(value); | ||
7268 | } | ||
7269 | brdctl = BRDRW; | ||
7270 | if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) || | ||
7271 | (p->flags & AHC_CHNLB) ) | ||
7272 | { | ||
7273 | brdctl |= BRDCS; | ||
7274 | } | ||
7275 | aic_outb(p, brdctl, BRDCTL); | ||
7276 | CLOCK_PULSE(p); | ||
7277 | value = aic_inb(p, BRDCTL); | ||
7278 | CLOCK_PULSE(p); | ||
7279 | aic_outb(p, 0, BRDCTL); | ||
7280 | CLOCK_PULSE(p); | ||
7281 | return (value); | ||
7282 | } | ||
7283 | |||
7284 | /*+F************************************************************************* | ||
7285 | * Function: | ||
7286 | * write_brdctl | ||
7287 | * | ||
7288 | * Description: | ||
7289 | * Writes a value to the BRDCTL register. | ||
7290 | *-F*************************************************************************/ | ||
7291 | static void | ||
7292 | write_brdctl(struct aic7xxx_host *p, unsigned char value) | ||
7293 | { | ||
7294 | unsigned char brdctl; | ||
7295 | |||
7296 | /* | ||
7297 | * Make sure the SEEPROM is ready before we access it | ||
7298 | */ | ||
7299 | CLOCK_PULSE(p); | ||
7300 | if (p->features & AHC_ULTRA2) | ||
7301 | { | ||
7302 | brdctl = value; | ||
7303 | aic_outb(p, brdctl, BRDCTL); | ||
7304 | CLOCK_PULSE(p); | ||
7305 | brdctl |= BRDSTB_ULTRA2; | ||
7306 | aic_outb(p, brdctl, BRDCTL); | ||
7307 | CLOCK_PULSE(p); | ||
7308 | brdctl &= ~BRDSTB_ULTRA2; | ||
7309 | aic_outb(p, brdctl, BRDCTL); | ||
7310 | CLOCK_PULSE(p); | ||
7311 | read_brdctl(p); | ||
7312 | CLOCK_PULSE(p); | ||
7313 | } | ||
7314 | else | ||
7315 | { | ||
7316 | brdctl = BRDSTB; | ||
7317 | if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) || | ||
7318 | (p->flags & AHC_CHNLB) ) | ||
7319 | { | ||
7320 | brdctl |= BRDCS; | ||
7321 | } | ||
7322 | brdctl = BRDSTB | BRDCS; | ||
7323 | aic_outb(p, brdctl, BRDCTL); | ||
7324 | CLOCK_PULSE(p); | ||
7325 | brdctl |= value; | ||
7326 | aic_outb(p, brdctl, BRDCTL); | ||
7327 | CLOCK_PULSE(p); | ||
7328 | brdctl &= ~BRDSTB; | ||
7329 | aic_outb(p, brdctl, BRDCTL); | ||
7330 | CLOCK_PULSE(p); | ||
7331 | brdctl &= ~BRDCS; | ||
7332 | aic_outb(p, brdctl, BRDCTL); | ||
7333 | CLOCK_PULSE(p); | ||
7334 | } | ||
7335 | } | ||
7336 | |||
7337 | /*+F************************************************************************* | ||
7338 | * Function: | ||
7339 | * aic785x_cable_detect | ||
7340 | * | ||
7341 | * Description: | ||
7342 | * Detect the cables that are present on aic785x class controller chips | ||
7343 | *-F*************************************************************************/ | ||
7344 | static void | ||
7345 | aic785x_cable_detect(struct aic7xxx_host *p, int *int_50, | ||
7346 | int *ext_present, int *eeprom) | ||
7347 | { | ||
7348 | unsigned char brdctl; | ||
7349 | |||
7350 | aic_outb(p, BRDRW | BRDCS, BRDCTL); | ||
7351 | CLOCK_PULSE(p); | ||
7352 | aic_outb(p, 0, BRDCTL); | ||
7353 | CLOCK_PULSE(p); | ||
7354 | brdctl = aic_inb(p, BRDCTL); | ||
7355 | CLOCK_PULSE(p); | ||
7356 | *int_50 = !(brdctl & BRDDAT5); | ||
7357 | *ext_present = !(brdctl & BRDDAT6); | ||
7358 | *eeprom = (aic_inb(p, SPIOCAP) & EEPROM); | ||
7359 | } | ||
7360 | |||
7361 | #undef CLOCK_PULSE | ||
7362 | |||
7363 | /*+F************************************************************************* | ||
7364 | * Function: | ||
7365 | * aic2940_uwpro_cable_detect | ||
7366 | * | ||
7367 | * Description: | ||
7368 | * Detect the cables that are present on the 2940-UWPro cards | ||
7369 | * | ||
7370 | * NOTE: This function assumes the SEEPROM will have already been acquired | ||
7371 | * prior to invocation of this function. | ||
7372 | *-F*************************************************************************/ | ||
7373 | static void | ||
7374 | aic2940_uwpro_wide_cable_detect(struct aic7xxx_host *p, int *int_68, | ||
7375 | int *ext_68, int *eeprom) | ||
7376 | { | ||
7377 | unsigned char brdctl; | ||
7378 | |||
7379 | /* | ||
7380 | * First read the status of our cables. Set the rom bank to | ||
7381 | * 0 since the bank setting serves as a multiplexor for the | ||
7382 | * cable detection logic. BRDDAT5 controls the bank switch. | ||
7383 | */ | ||
7384 | write_brdctl(p, 0); | ||
7385 | |||
7386 | /* | ||
7387 | * Now we read the state of the internal 68 connector. BRDDAT6 | ||
7388 | * is don't care, BRDDAT7 is internal 68. The cable is | ||
7389 | * present if the bit is 0 | ||
7390 | */ | ||
7391 | brdctl = read_brdctl(p); | ||
7392 | *int_68 = !(brdctl & BRDDAT7); | ||
7393 | |||
7394 | /* | ||
7395 | * Set the bank bit in brdctl and then read the external cable state | ||
7396 | * and the EEPROM status | ||
7397 | */ | ||
7398 | write_brdctl(p, BRDDAT5); | ||
7399 | brdctl = read_brdctl(p); | ||
7400 | |||
7401 | *ext_68 = !(brdctl & BRDDAT6); | ||
7402 | *eeprom = !(brdctl & BRDDAT7); | ||
7403 | |||
7404 | /* | ||
7405 | * We're done, the calling function will release the SEEPROM for us | ||
7406 | */ | ||
7407 | } | ||
7408 | |||
7409 | /*+F************************************************************************* | ||
7410 | * Function: | ||
7411 | * aic787x_cable_detect | ||
7412 | * | ||
7413 | * Description: | ||
7414 | * Detect the cables that are present on aic787x class controller chips | ||
7415 | * | ||
7416 | * NOTE: This function assumes the SEEPROM will have already been acquired | ||
7417 | * prior to invocation of this function. | ||
7418 | *-F*************************************************************************/ | ||
7419 | static void | ||
7420 | aic787x_cable_detect(struct aic7xxx_host *p, int *int_50, int *int_68, | ||
7421 | int *ext_present, int *eeprom) | ||
7422 | { | ||
7423 | unsigned char brdctl; | ||
7424 | |||
7425 | /* | ||
7426 | * First read the status of our cables. Set the rom bank to | ||
7427 | * 0 since the bank setting serves as a multiplexor for the | ||
7428 | * cable detection logic. BRDDAT5 controls the bank switch. | ||
7429 | */ | ||
7430 | write_brdctl(p, 0); | ||
7431 | |||
7432 | /* | ||
7433 | * Now we read the state of the two internal connectors. BRDDAT6 | ||
7434 | * is internal 50, BRDDAT7 is internal 68. For each, the cable is | ||
7435 | * present if the bit is 0 | ||
7436 | */ | ||
7437 | brdctl = read_brdctl(p); | ||
7438 | *int_50 = !(brdctl & BRDDAT6); | ||
7439 | *int_68 = !(brdctl & BRDDAT7); | ||
7440 | |||
7441 | /* | ||
7442 | * Set the bank bit in brdctl and then read the external cable state | ||
7443 | * and the EEPROM status | ||
7444 | */ | ||
7445 | write_brdctl(p, BRDDAT5); | ||
7446 | brdctl = read_brdctl(p); | ||
7447 | |||
7448 | *ext_present = !(brdctl & BRDDAT6); | ||
7449 | *eeprom = !(brdctl & BRDDAT7); | ||
7450 | |||
7451 | /* | ||
7452 | * We're done, the calling function will release the SEEPROM for us | ||
7453 | */ | ||
7454 | } | ||
7455 | |||
7456 | /*+F************************************************************************* | ||
7457 | * Function: | ||
7458 | * aic787x_ultra2_term_detect | ||
7459 | * | ||
7460 | * Description: | ||
7461 | * Detect the termination settings present on ultra2 class controllers | ||
7462 | * | ||
7463 | * NOTE: This function assumes the SEEPROM will have already been acquired | ||
7464 | * prior to invocation of this function. | ||
7465 | *-F*************************************************************************/ | ||
7466 | static void | ||
7467 | aic7xxx_ultra2_term_detect(struct aic7xxx_host *p, int *enableSE_low, | ||
7468 | int *enableSE_high, int *enableLVD_low, | ||
7469 | int *enableLVD_high, int *eprom_present) | ||
7470 | { | ||
7471 | unsigned char brdctl; | ||
7472 | |||
7473 | brdctl = read_brdctl(p); | ||
7474 | |||
7475 | *eprom_present = (brdctl & BRDDAT7); | ||
7476 | *enableSE_high = (brdctl & BRDDAT6); | ||
7477 | *enableSE_low = (brdctl & BRDDAT5); | ||
7478 | *enableLVD_high = (brdctl & BRDDAT4); | ||
7479 | *enableLVD_low = (brdctl & BRDDAT3); | ||
7480 | } | ||
7481 | |||
7482 | /*+F************************************************************************* | ||
7483 | * Function: | ||
7484 | * configure_termination | ||
7485 | * | ||
7486 | * Description: | ||
7487 | * Configures the termination settings on PCI adapters that have | ||
7488 | * SEEPROMs available. | ||
7489 | *-F*************************************************************************/ | ||
7490 | static void | ||
7491 | configure_termination(struct aic7xxx_host *p) | ||
7492 | { | ||
7493 | int internal50_present = 0; | ||
7494 | int internal68_present = 0; | ||
7495 | int external_present = 0; | ||
7496 | int eprom_present = 0; | ||
7497 | int enableSE_low = 0; | ||
7498 | int enableSE_high = 0; | ||
7499 | int enableLVD_low = 0; | ||
7500 | int enableLVD_high = 0; | ||
7501 | unsigned char brddat = 0; | ||
7502 | unsigned char max_target = 0; | ||
7503 | unsigned char sxfrctl1 = aic_inb(p, SXFRCTL1); | ||
7504 | |||
7505 | if (acquire_seeprom(p)) | ||
7506 | { | ||
7507 | if (p->features & (AHC_WIDE|AHC_TWIN)) | ||
7508 | max_target = 16; | ||
7509 | else | ||
7510 | max_target = 8; | ||
7511 | aic_outb(p, SEEMS | SEECS, SEECTL); | ||
7512 | sxfrctl1 &= ~STPWEN; | ||
7513 | /* | ||
7514 | * The termination/cable detection logic is split into three distinct | ||
7515 | * groups. Ultra2 and later controllers, 2940UW-Pro controllers, and | ||
7516 | * older 7850, 7860, 7870, 7880, and 7895 controllers. Each has its | ||
7517 | * own unique way of detecting their cables and writing the results | ||
7518 | * back to the card. | ||
7519 | */ | ||
7520 | if (p->features & AHC_ULTRA2) | ||
7521 | { | ||
7522 | /* | ||
7523 | * As long as user hasn't overridden term settings, always check the | ||
7524 | * cable detection logic | ||
7525 | */ | ||
7526 | if (aic7xxx_override_term == -1) | ||
7527 | { | ||
7528 | aic7xxx_ultra2_term_detect(p, &enableSE_low, &enableSE_high, | ||
7529 | &enableLVD_low, &enableLVD_high, | ||
7530 | &eprom_present); | ||
7531 | } | ||
7532 | |||
7533 | /* | ||
7534 | * If the user is overriding settings, then they have been preserved | ||
7535 | * to here as fake adapter_control entries. Parse them and allow | ||
7536 | * them to override the detected settings (if we even did detection). | ||
7537 | */ | ||
7538 | if (!(p->adapter_control & CFSEAUTOTERM)) | ||
7539 | { | ||
7540 | enableSE_low = (p->adapter_control & CFSTERM); | ||
7541 | enableSE_high = (p->adapter_control & CFWSTERM); | ||
7542 | } | ||
7543 | if (!(p->adapter_control & CFAUTOTERM)) | ||
7544 | { | ||
7545 | enableLVD_low = enableLVD_high = (p->adapter_control & CFLVDSTERM); | ||
7546 | } | ||
7547 | |||
7548 | /* | ||
7549 | * Now take those settings that we have and translate them into the | ||
7550 | * values that must be written into the registers. | ||
7551 | * | ||
7552 | * Flash Enable = BRDDAT7 | ||
7553 | * Secondary High Term Enable = BRDDAT6 | ||
7554 | * Secondary Low Term Enable = BRDDAT5 | ||
7555 | * LVD/Primary High Term Enable = BRDDAT4 | ||
7556 | * LVD/Primary Low Term Enable = STPWEN bit in SXFRCTL1 | ||
7557 | */ | ||
7558 | if (enableLVD_low != 0) | ||
7559 | { | ||
7560 | sxfrctl1 |= STPWEN; | ||
7561 | p->flags |= AHC_TERM_ENB_LVD; | ||
7562 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7563 | printk(KERN_INFO "(scsi%d) LVD/Primary Low byte termination " | ||
7564 | "Enabled\n", p->host_no); | ||
7565 | } | ||
7566 | |||
7567 | if (enableLVD_high != 0) | ||
7568 | { | ||
7569 | brddat |= BRDDAT4; | ||
7570 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7571 | printk(KERN_INFO "(scsi%d) LVD/Primary High byte termination " | ||
7572 | "Enabled\n", p->host_no); | ||
7573 | } | ||
7574 | |||
7575 | if (enableSE_low != 0) | ||
7576 | { | ||
7577 | brddat |= BRDDAT5; | ||
7578 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7579 | printk(KERN_INFO "(scsi%d) Secondary Low byte termination " | ||
7580 | "Enabled\n", p->host_no); | ||
7581 | } | ||
7582 | |||
7583 | if (enableSE_high != 0) | ||
7584 | { | ||
7585 | brddat |= BRDDAT6; | ||
7586 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7587 | printk(KERN_INFO "(scsi%d) Secondary High byte termination " | ||
7588 | "Enabled\n", p->host_no); | ||
7589 | } | ||
7590 | } | ||
7591 | else if (p->features & AHC_NEW_AUTOTERM) | ||
7592 | { | ||
7593 | /* | ||
7594 | * The 50 pin connector termination is controlled by STPWEN in the | ||
7595 | * SXFRCTL1 register. Since the Adaptec docs typically say the | ||
7596 | * controller is not allowed to be in the middle of a cable and | ||
7597 | * this is the only connection on that stub of the bus, there is | ||
7598 | * no need to even check for narrow termination, it's simply | ||
7599 | * always on. | ||
7600 | */ | ||
7601 | sxfrctl1 |= STPWEN; | ||
7602 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7603 | printk(KERN_INFO "(scsi%d) Narrow channel termination Enabled\n", | ||
7604 | p->host_no); | ||
7605 | |||
7606 | if (p->adapter_control & CFAUTOTERM) | ||
7607 | { | ||
7608 | aic2940_uwpro_wide_cable_detect(p, &internal68_present, | ||
7609 | &external_present, | ||
7610 | &eprom_present); | ||
7611 | printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, " | ||
7612 | "Ext-68 %s)\n", p->host_no, | ||
7613 | "Don't Care", | ||
7614 | internal68_present ? "YES" : "NO", | ||
7615 | external_present ? "YES" : "NO"); | ||
7616 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7617 | printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no, | ||
7618 | eprom_present ? "is" : "is not"); | ||
7619 | if (internal68_present && external_present) | ||
7620 | { | ||
7621 | brddat = 0; | ||
7622 | p->flags &= ~AHC_TERM_ENB_SE_HIGH; | ||
7623 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7624 | printk(KERN_INFO "(scsi%d) Wide channel termination Disabled\n", | ||
7625 | p->host_no); | ||
7626 | } | ||
7627 | else | ||
7628 | { | ||
7629 | brddat = BRDDAT6; | ||
7630 | p->flags |= AHC_TERM_ENB_SE_HIGH; | ||
7631 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7632 | printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n", | ||
7633 | p->host_no); | ||
7634 | } | ||
7635 | } | ||
7636 | else | ||
7637 | { | ||
7638 | /* | ||
7639 | * The termination of the Wide channel is done more like normal | ||
7640 | * though, and the setting of this termination is done by writing | ||
7641 | * either a 0 or 1 to BRDDAT6 of the BRDDAT register | ||
7642 | */ | ||
7643 | if (p->adapter_control & CFWSTERM) | ||
7644 | { | ||
7645 | brddat = BRDDAT6; | ||
7646 | p->flags |= AHC_TERM_ENB_SE_HIGH; | ||
7647 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7648 | printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n", | ||
7649 | p->host_no); | ||
7650 | } | ||
7651 | else | ||
7652 | { | ||
7653 | brddat = 0; | ||
7654 | } | ||
7655 | } | ||
7656 | } | ||
7657 | else | ||
7658 | { | ||
7659 | if (p->adapter_control & CFAUTOTERM) | ||
7660 | { | ||
7661 | if (p->flags & AHC_MOTHERBOARD) | ||
7662 | { | ||
7663 | printk(KERN_INFO "(scsi%d) Warning - detected auto-termination\n", | ||
7664 | p->host_no); | ||
7665 | printk(KERN_INFO "(scsi%d) Please verify driver detected settings " | ||
7666 | "are correct.\n", p->host_no); | ||
7667 | printk(KERN_INFO "(scsi%d) If not, then please properly set the " | ||
7668 | "device termination\n", p->host_no); | ||
7669 | printk(KERN_INFO "(scsi%d) in the Adaptec SCSI BIOS by hitting " | ||
7670 | "CTRL-A when prompted\n", p->host_no); | ||
7671 | printk(KERN_INFO "(scsi%d) during machine bootup.\n", p->host_no); | ||
7672 | } | ||
7673 | /* Configure auto termination. */ | ||
7674 | |||
7675 | if ( (p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870 ) | ||
7676 | { | ||
7677 | aic787x_cable_detect(p, &internal50_present, &internal68_present, | ||
7678 | &external_present, &eprom_present); | ||
7679 | } | ||
7680 | else | ||
7681 | { | ||
7682 | aic785x_cable_detect(p, &internal50_present, &external_present, | ||
7683 | &eprom_present); | ||
7684 | } | ||
7685 | |||
7686 | if (max_target <= 8) | ||
7687 | internal68_present = 0; | ||
7688 | |||
7689 | if (max_target > 8) | ||
7690 | { | ||
7691 | printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, " | ||
7692 | "Ext-68 %s)\n", p->host_no, | ||
7693 | internal50_present ? "YES" : "NO", | ||
7694 | internal68_present ? "YES" : "NO", | ||
7695 | external_present ? "YES" : "NO"); | ||
7696 | } | ||
7697 | else | ||
7698 | { | ||
7699 | printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Ext-50 %s)\n", | ||
7700 | p->host_no, | ||
7701 | internal50_present ? "YES" : "NO", | ||
7702 | external_present ? "YES" : "NO"); | ||
7703 | } | ||
7704 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7705 | printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no, | ||
7706 | eprom_present ? "is" : "is not"); | ||
7707 | |||
7708 | /* | ||
7709 | * Now set the termination based on what we found. BRDDAT6 | ||
7710 | * controls wide termination enable. | ||
7711 | * Flash Enable = BRDDAT7 | ||
7712 | * SE High Term Enable = BRDDAT6 | ||
7713 | */ | ||
7714 | if (internal50_present && internal68_present && external_present) | ||
7715 | { | ||
7716 | printk(KERN_INFO "(scsi%d) Illegal cable configuration!! Only two\n", | ||
7717 | p->host_no); | ||
7718 | printk(KERN_INFO "(scsi%d) connectors on the SCSI controller may be " | ||
7719 | "in use at a time!\n", p->host_no); | ||
7720 | /* | ||
7721 | * Force termination (low and high byte) on. This is safer than | ||
7722 | * leaving it completely off, especially since this message comes | ||
7723 | * most often from motherboard controllers that don't even have 3 | ||
7724 | * connectors, but instead are failing the cable detection. | ||
7725 | */ | ||
7726 | internal50_present = external_present = 0; | ||
7727 | enableSE_high = enableSE_low = 1; | ||
7728 | } | ||
7729 | |||
7730 | if ((max_target > 8) && | ||
7731 | ((external_present == 0) || (internal68_present == 0)) ) | ||
7732 | { | ||
7733 | brddat |= BRDDAT6; | ||
7734 | p->flags |= AHC_TERM_ENB_SE_HIGH; | ||
7735 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7736 | printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n", | ||
7737 | p->host_no); | ||
7738 | } | ||
7739 | |||
7740 | if ( ((internal50_present ? 1 : 0) + | ||
7741 | (internal68_present ? 1 : 0) + | ||
7742 | (external_present ? 1 : 0)) <= 1 ) | ||
7743 | { | ||
7744 | sxfrctl1 |= STPWEN; | ||
7745 | p->flags |= AHC_TERM_ENB_SE_LOW; | ||
7746 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7747 | printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n", | ||
7748 | p->host_no); | ||
7749 | } | ||
7750 | } | ||
7751 | else /* p->adapter_control & CFAUTOTERM */ | ||
7752 | { | ||
7753 | if (p->adapter_control & CFSTERM) | ||
7754 | { | ||
7755 | sxfrctl1 |= STPWEN; | ||
7756 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7757 | printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n", | ||
7758 | p->host_no); | ||
7759 | } | ||
7760 | |||
7761 | if (p->adapter_control & CFWSTERM) | ||
7762 | { | ||
7763 | brddat |= BRDDAT6; | ||
7764 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7765 | printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n", | ||
7766 | p->host_no); | ||
7767 | } | ||
7768 | } | ||
7769 | } | ||
7770 | |||
7771 | aic_outb(p, sxfrctl1, SXFRCTL1); | ||
7772 | write_brdctl(p, brddat); | ||
7773 | release_seeprom(p); | ||
7774 | } | ||
7775 | } | ||
7776 | |||
7777 | /*+F************************************************************************* | ||
7778 | * Function: | ||
7779 | * detect_maxscb | ||
7780 | * | ||
7781 | * Description: | ||
7782 | * Detects the maximum number of SCBs for the controller and returns | ||
7783 | * the count and a mask in p (p->maxscbs, p->qcntmask). | ||
7784 | *-F*************************************************************************/ | ||
7785 | static void | ||
7786 | detect_maxscb(struct aic7xxx_host *p) | ||
7787 | { | ||
7788 | int i; | ||
7789 | |||
7790 | /* | ||
7791 | * It's possible that we've already done this for multichannel | ||
7792 | * adapters. | ||
7793 | */ | ||
7794 | if (p->scb_data->maxhscbs == 0) | ||
7795 | { | ||
7796 | /* | ||
7797 | * We haven't initialized the SCB settings yet. Walk the SCBs to | ||
7798 | * determince how many there are. | ||
7799 | */ | ||
7800 | aic_outb(p, 0, FREE_SCBH); | ||
7801 | |||
7802 | for (i = 0; i < AIC7XXX_MAXSCB; i++) | ||
7803 | { | ||
7804 | aic_outb(p, i, SCBPTR); | ||
7805 | aic_outb(p, i, SCB_CONTROL); | ||
7806 | if (aic_inb(p, SCB_CONTROL) != i) | ||
7807 | break; | ||
7808 | aic_outb(p, 0, SCBPTR); | ||
7809 | if (aic_inb(p, SCB_CONTROL) != 0) | ||
7810 | break; | ||
7811 | |||
7812 | aic_outb(p, i, SCBPTR); | ||
7813 | aic_outb(p, 0, SCB_CONTROL); /* Clear the control byte. */ | ||
7814 | aic_outb(p, i + 1, SCB_NEXT); /* Set the next pointer. */ | ||
7815 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); /* Make the tag invalid. */ | ||
7816 | aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS); /* no busy untagged */ | ||
7817 | aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+1);/* targets active yet */ | ||
7818 | aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+2); | ||
7819 | aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+3); | ||
7820 | } | ||
7821 | |||
7822 | /* Make sure the last SCB terminates the free list. */ | ||
7823 | aic_outb(p, i - 1, SCBPTR); | ||
7824 | aic_outb(p, SCB_LIST_NULL, SCB_NEXT); | ||
7825 | |||
7826 | /* Ensure we clear the first (0) SCBs control byte. */ | ||
7827 | aic_outb(p, 0, SCBPTR); | ||
7828 | aic_outb(p, 0, SCB_CONTROL); | ||
7829 | |||
7830 | p->scb_data->maxhscbs = i; | ||
7831 | /* | ||
7832 | * Use direct indexing instead for speed | ||
7833 | */ | ||
7834 | if ( i == AIC7XXX_MAXSCB ) | ||
7835 | p->flags &= ~AHC_PAGESCBS; | ||
7836 | } | ||
7837 | |||
7838 | } | ||
7839 | |||
7840 | /*+F************************************************************************* | ||
7841 | * Function: | ||
7842 | * aic7xxx_register | ||
7843 | * | ||
7844 | * Description: | ||
7845 | * Register a Adaptec aic7xxx chip SCSI controller with the kernel. | ||
7846 | *-F*************************************************************************/ | ||
7847 | static int | ||
7848 | aic7xxx_register(struct scsi_host_template *template, struct aic7xxx_host *p, | ||
7849 | int reset_delay) | ||
7850 | { | ||
7851 | int i, result; | ||
7852 | int max_targets; | ||
7853 | int found = 1; | ||
7854 | unsigned char term, scsi_conf; | ||
7855 | struct Scsi_Host *host; | ||
7856 | |||
7857 | host = p->host; | ||
7858 | |||
7859 | p->scb_data->maxscbs = AIC7XXX_MAXSCB; | ||
7860 | host->can_queue = AIC7XXX_MAXSCB; | ||
7861 | host->cmd_per_lun = 3; | ||
7862 | host->sg_tablesize = AIC7XXX_MAX_SG; | ||
7863 | host->this_id = p->scsi_id; | ||
7864 | host->io_port = p->base; | ||
7865 | host->n_io_port = 0xFF; | ||
7866 | host->base = p->mbase; | ||
7867 | host->irq = p->irq; | ||
7868 | if (p->features & AHC_WIDE) | ||
7869 | { | ||
7870 | host->max_id = 16; | ||
7871 | } | ||
7872 | if (p->features & AHC_TWIN) | ||
7873 | { | ||
7874 | host->max_channel = 1; | ||
7875 | } | ||
7876 | |||
7877 | p->host = host; | ||
7878 | p->host_no = host->host_no; | ||
7879 | host->unique_id = p->instance; | ||
7880 | p->isr_count = 0; | ||
7881 | p->next = NULL; | ||
7882 | p->completeq.head = NULL; | ||
7883 | p->completeq.tail = NULL; | ||
7884 | scbq_init(&p->scb_data->free_scbs); | ||
7885 | scbq_init(&p->waiting_scbs); | ||
7886 | INIT_LIST_HEAD(&p->aic_devs); | ||
7887 | |||
7888 | /* | ||
7889 | * We currently have no commands of any type | ||
7890 | */ | ||
7891 | p->qinfifonext = 0; | ||
7892 | p->qoutfifonext = 0; | ||
7893 | |||
7894 | printk(KERN_INFO "(scsi%d) <%s> found at ", p->host_no, | ||
7895 | board_names[p->board_name_index]); | ||
7896 | switch(p->chip) | ||
7897 | { | ||
7898 | case (AHC_AIC7770|AHC_EISA): | ||
7899 | printk("EISA slot %d\n", p->pci_device_fn); | ||
7900 | break; | ||
7901 | case (AHC_AIC7770|AHC_VL): | ||
7902 | printk("VLB slot %d\n", p->pci_device_fn); | ||
7903 | break; | ||
7904 | default: | ||
7905 | printk("PCI %d/%d/%d\n", p->pci_bus, PCI_SLOT(p->pci_device_fn), | ||
7906 | PCI_FUNC(p->pci_device_fn)); | ||
7907 | break; | ||
7908 | } | ||
7909 | if (p->features & AHC_TWIN) | ||
7910 | { | ||
7911 | printk(KERN_INFO "(scsi%d) Twin Channel, A SCSI ID %d, B SCSI ID %d, ", | ||
7912 | p->host_no, p->scsi_id, p->scsi_id_b); | ||
7913 | } | ||
7914 | else | ||
7915 | { | ||
7916 | char *channel; | ||
7917 | |||
7918 | channel = ""; | ||
7919 | |||
7920 | if ((p->flags & AHC_MULTI_CHANNEL) != 0) | ||
7921 | { | ||
7922 | channel = " A"; | ||
7923 | |||
7924 | if ( (p->flags & (AHC_CHNLB|AHC_CHNLC)) != 0 ) | ||
7925 | { | ||
7926 | channel = (p->flags & AHC_CHNLB) ? " B" : " C"; | ||
7927 | } | ||
7928 | } | ||
7929 | if (p->features & AHC_WIDE) | ||
7930 | { | ||
7931 | printk(KERN_INFO "(scsi%d) Wide ", p->host_no); | ||
7932 | } | ||
7933 | else | ||
7934 | { | ||
7935 | printk(KERN_INFO "(scsi%d) Narrow ", p->host_no); | ||
7936 | } | ||
7937 | printk("Channel%s, SCSI ID=%d, ", channel, p->scsi_id); | ||
7938 | } | ||
7939 | aic_outb(p, 0, SEQ_FLAGS); | ||
7940 | |||
7941 | detect_maxscb(p); | ||
7942 | |||
7943 | printk("%d/%d SCBs\n", p->scb_data->maxhscbs, p->scb_data->maxscbs); | ||
7944 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7945 | { | ||
7946 | printk(KERN_INFO "(scsi%d) BIOS %sabled, IO Port 0x%lx, IRQ %d\n", | ||
7947 | p->host_no, (p->flags & AHC_BIOS_ENABLED) ? "en" : "dis", | ||
7948 | p->base, p->irq); | ||
7949 | printk(KERN_INFO "(scsi%d) IO Memory at 0x%lx, MMAP Memory at %p\n", | ||
7950 | p->host_no, p->mbase, p->maddr); | ||
7951 | } | ||
7952 | |||
7953 | #ifdef CONFIG_PCI | ||
7954 | /* | ||
7955 | * Now that we know our instance number, we can set the flags we need to | ||
7956 | * force termination if need be. | ||
7957 | */ | ||
7958 | if (aic7xxx_stpwlev != -1) | ||
7959 | { | ||
7960 | /* | ||
7961 | * This option only applies to PCI controllers. | ||
7962 | */ | ||
7963 | if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI) | ||
7964 | { | ||
7965 | unsigned char devconfig; | ||
7966 | |||
7967 | pci_read_config_byte(p->pdev, DEVCONFIG, &devconfig); | ||
7968 | if ( (aic7xxx_stpwlev >> p->instance) & 0x01 ) | ||
7969 | { | ||
7970 | devconfig |= STPWLEVEL; | ||
7971 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7972 | printk("(scsi%d) Force setting STPWLEVEL bit\n", p->host_no); | ||
7973 | } | ||
7974 | else | ||
7975 | { | ||
7976 | devconfig &= ~STPWLEVEL; | ||
7977 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
7978 | printk("(scsi%d) Force clearing STPWLEVEL bit\n", p->host_no); | ||
7979 | } | ||
7980 | pci_write_config_byte(p->pdev, DEVCONFIG, devconfig); | ||
7981 | } | ||
7982 | } | ||
7983 | #endif | ||
7984 | |||
7985 | /* | ||
7986 | * That took care of devconfig and stpwlev, now for the actual termination | ||
7987 | * settings. | ||
7988 | */ | ||
7989 | if (aic7xxx_override_term != -1) | ||
7990 | { | ||
7991 | /* | ||
7992 | * Again, this only applies to PCI controllers. We don't have problems | ||
7993 | * with the termination on 274x controllers to the best of my knowledge. | ||
7994 | */ | ||
7995 | if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI) | ||
7996 | { | ||
7997 | unsigned char term_override; | ||
7998 | |||
7999 | term_override = ( (aic7xxx_override_term >> (p->instance * 4)) & 0x0f); | ||
8000 | p->adapter_control &= | ||
8001 | ~(CFSTERM|CFWSTERM|CFLVDSTERM|CFAUTOTERM|CFSEAUTOTERM); | ||
8002 | if ( (p->features & AHC_ULTRA2) && (term_override & 0x0c) ) | ||
8003 | { | ||
8004 | p->adapter_control |= CFLVDSTERM; | ||
8005 | } | ||
8006 | if (term_override & 0x02) | ||
8007 | { | ||
8008 | p->adapter_control |= CFWSTERM; | ||
8009 | } | ||
8010 | if (term_override & 0x01) | ||
8011 | { | ||
8012 | p->adapter_control |= CFSTERM; | ||
8013 | } | ||
8014 | } | ||
8015 | } | ||
8016 | |||
8017 | if ( (p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1) ) | ||
8018 | { | ||
8019 | if (p->features & AHC_SPIOCAP) | ||
8020 | { | ||
8021 | if ( aic_inb(p, SPIOCAP) & SSPIOCPS ) | ||
8022 | /* | ||
8023 | * Update the settings in sxfrctl1 to match the termination | ||
8024 | * settings. | ||
8025 | */ | ||
8026 | configure_termination(p); | ||
8027 | } | ||
8028 | else if ((p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870) | ||
8029 | { | ||
8030 | configure_termination(p); | ||
8031 | } | ||
8032 | } | ||
8033 | |||
8034 | /* | ||
8035 | * Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels | ||
8036 | */ | ||
8037 | if (p->features & AHC_TWIN) | ||
8038 | { | ||
8039 | /* Select channel B */ | ||
8040 | aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL); | ||
8041 | |||
8042 | if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1)) | ||
8043 | term = (aic_inb(p, SXFRCTL1) & STPWEN); | ||
8044 | else | ||
8045 | term = ((p->flags & AHC_TERM_ENB_B) ? STPWEN : 0); | ||
8046 | |||
8047 | aic_outb(p, p->scsi_id_b, SCSIID); | ||
8048 | scsi_conf = aic_inb(p, SCSICONF + 1); | ||
8049 | aic_outb(p, DFON | SPIOEN, SXFRCTL0); | ||
8050 | aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term | | ||
8051 | ENSTIMER | ACTNEGEN, SXFRCTL1); | ||
8052 | aic_outb(p, 0, SIMODE0); | ||
8053 | aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1); | ||
8054 | aic_outb(p, 0, SCSIRATE); | ||
8055 | |||
8056 | /* Select channel A */ | ||
8057 | aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL); | ||
8058 | } | ||
8059 | |||
8060 | if (p->features & AHC_ULTRA2) | ||
8061 | { | ||
8062 | aic_outb(p, p->scsi_id, SCSIID_ULTRA2); | ||
8063 | } | ||
8064 | else | ||
8065 | { | ||
8066 | aic_outb(p, p->scsi_id, SCSIID); | ||
8067 | } | ||
8068 | if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1)) | ||
8069 | term = (aic_inb(p, SXFRCTL1) & STPWEN); | ||
8070 | else | ||
8071 | term = ((p->flags & (AHC_TERM_ENB_A|AHC_TERM_ENB_LVD)) ? STPWEN : 0); | ||
8072 | scsi_conf = aic_inb(p, SCSICONF); | ||
8073 | aic_outb(p, DFON | SPIOEN, SXFRCTL0); | ||
8074 | aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term | | ||
8075 | ENSTIMER | ACTNEGEN, SXFRCTL1); | ||
8076 | aic_outb(p, 0, SIMODE0); | ||
8077 | /* | ||
8078 | * If we are a cardbus adapter then don't enable SCSI reset detection. | ||
8079 | * We shouldn't likely be sharing SCSI busses with someone else, and | ||
8080 | * if we don't have a cable currently plugged into the controller then | ||
8081 | * we won't have a power source for the SCSI termination, which means | ||
8082 | * we'll see infinite incoming bus resets. | ||
8083 | */ | ||
8084 | if(p->flags & AHC_NO_STPWEN) | ||
8085 | aic_outb(p, ENSELTIMO | ENSCSIPERR, SIMODE1); | ||
8086 | else | ||
8087 | aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1); | ||
8088 | aic_outb(p, 0, SCSIRATE); | ||
8089 | if ( p->features & AHC_ULTRA2) | ||
8090 | aic_outb(p, 0, SCSIOFFSET); | ||
8091 | |||
8092 | /* | ||
8093 | * Look at the information that board initialization or the board | ||
8094 | * BIOS has left us. In the lower four bits of each target's | ||
8095 | * scratch space any value other than 0 indicates that we should | ||
8096 | * initiate synchronous transfers. If it's zero, the user or the | ||
8097 | * BIOS has decided to disable synchronous negotiation to that | ||
8098 | * target so we don't activate the needsdtr flag. | ||
8099 | */ | ||
8100 | if ((p->features & (AHC_TWIN|AHC_WIDE)) == 0) | ||
8101 | { | ||
8102 | max_targets = 8; | ||
8103 | } | ||
8104 | else | ||
8105 | { | ||
8106 | max_targets = 16; | ||
8107 | } | ||
8108 | |||
8109 | if (!(aic7xxx_no_reset)) | ||
8110 | { | ||
8111 | /* | ||
8112 | * If we reset the bus, then clear the transfer settings, else leave | ||
8113 | * them be. | ||
8114 | */ | ||
8115 | aic_outb(p, 0, ULTRA_ENB); | ||
8116 | aic_outb(p, 0, ULTRA_ENB + 1); | ||
8117 | p->ultraenb = 0; | ||
8118 | } | ||
8119 | |||
8120 | /* | ||
8121 | * Allocate enough hardware scbs to handle the maximum number of | ||
8122 | * concurrent transactions we can have. We have to make sure that | ||
8123 | * the allocated memory is contiguous memory. The Linux kmalloc | ||
8124 | * routine should only allocate contiguous memory, but note that | ||
8125 | * this could be a problem if kmalloc() is changed. | ||
8126 | */ | ||
8127 | { | ||
8128 | size_t array_size; | ||
8129 | unsigned int hscb_physaddr; | ||
8130 | |||
8131 | array_size = p->scb_data->maxscbs * sizeof(struct aic7xxx_hwscb); | ||
8132 | if (p->scb_data->hscbs == NULL) | ||
8133 | { | ||
8134 | /* pci_alloc_consistent enforces the alignment already and | ||
8135 | * clears the area as well. | ||
8136 | */ | ||
8137 | p->scb_data->hscbs = pci_alloc_consistent(p->pdev, array_size, | ||
8138 | &p->scb_data->hscbs_dma); | ||
8139 | /* We have to use pci_free_consistent, not kfree */ | ||
8140 | p->scb_data->hscb_kmalloc_ptr = NULL; | ||
8141 | p->scb_data->hscbs_dma_len = array_size; | ||
8142 | } | ||
8143 | if (p->scb_data->hscbs == NULL) | ||
8144 | { | ||
8145 | printk("(scsi%d) Unable to allocate hardware SCB array; " | ||
8146 | "failing detection.\n", p->host_no); | ||
8147 | aic_outb(p, 0, SIMODE1); | ||
8148 | p->irq = 0; | ||
8149 | return(0); | ||
8150 | } | ||
8151 | |||
8152 | hscb_physaddr = p->scb_data->hscbs_dma; | ||
8153 | aic_outb(p, hscb_physaddr & 0xFF, HSCB_ADDR); | ||
8154 | aic_outb(p, (hscb_physaddr >> 8) & 0xFF, HSCB_ADDR + 1); | ||
8155 | aic_outb(p, (hscb_physaddr >> 16) & 0xFF, HSCB_ADDR + 2); | ||
8156 | aic_outb(p, (hscb_physaddr >> 24) & 0xFF, HSCB_ADDR + 3); | ||
8157 | |||
8158 | /* Set up the fifo areas at the same time */ | ||
8159 | p->untagged_scbs = pci_alloc_consistent(p->pdev, 3*256, &p->fifo_dma); | ||
8160 | if (p->untagged_scbs == NULL) | ||
8161 | { | ||
8162 | printk("(scsi%d) Unable to allocate hardware FIFO arrays; " | ||
8163 | "failing detection.\n", p->host_no); | ||
8164 | p->irq = 0; | ||
8165 | return(0); | ||
8166 | } | ||
8167 | |||
8168 | p->qoutfifo = p->untagged_scbs + 256; | ||
8169 | p->qinfifo = p->qoutfifo + 256; | ||
8170 | for (i = 0; i < 256; i++) | ||
8171 | { | ||
8172 | p->untagged_scbs[i] = SCB_LIST_NULL; | ||
8173 | p->qinfifo[i] = SCB_LIST_NULL; | ||
8174 | p->qoutfifo[i] = SCB_LIST_NULL; | ||
8175 | } | ||
8176 | |||
8177 | hscb_physaddr = p->fifo_dma; | ||
8178 | aic_outb(p, hscb_physaddr & 0xFF, SCBID_ADDR); | ||
8179 | aic_outb(p, (hscb_physaddr >> 8) & 0xFF, SCBID_ADDR + 1); | ||
8180 | aic_outb(p, (hscb_physaddr >> 16) & 0xFF, SCBID_ADDR + 2); | ||
8181 | aic_outb(p, (hscb_physaddr >> 24) & 0xFF, SCBID_ADDR + 3); | ||
8182 | } | ||
8183 | |||
8184 | /* The Q-FIFOs we just set up are all empty */ | ||
8185 | aic_outb(p, 0, QINPOS); | ||
8186 | aic_outb(p, 0, KERNEL_QINPOS); | ||
8187 | aic_outb(p, 0, QOUTPOS); | ||
8188 | |||
8189 | if(p->features & AHC_QUEUE_REGS) | ||
8190 | { | ||
8191 | aic_outb(p, SCB_QSIZE_256, QOFF_CTLSTA); | ||
8192 | aic_outb(p, 0, SDSCB_QOFF); | ||
8193 | aic_outb(p, 0, SNSCB_QOFF); | ||
8194 | aic_outb(p, 0, HNSCB_QOFF); | ||
8195 | } | ||
8196 | |||
8197 | /* | ||
8198 | * We don't have any waiting selections or disconnected SCBs. | ||
8199 | */ | ||
8200 | aic_outb(p, SCB_LIST_NULL, WAITING_SCBH); | ||
8201 | aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH); | ||
8202 | |||
8203 | /* | ||
8204 | * Message out buffer starts empty | ||
8205 | */ | ||
8206 | aic_outb(p, MSG_NOOP, MSG_OUT); | ||
8207 | aic_outb(p, MSG_NOOP, LAST_MSG); | ||
8208 | |||
8209 | /* | ||
8210 | * Set all the other asundry items that haven't been set yet. | ||
8211 | * This includes just dumping init values to a lot of registers simply | ||
8212 | * to make sure they've been touched and are ready for use parity wise | ||
8213 | * speaking. | ||
8214 | */ | ||
8215 | aic_outb(p, 0, TMODE_CMDADDR); | ||
8216 | aic_outb(p, 0, TMODE_CMDADDR + 1); | ||
8217 | aic_outb(p, 0, TMODE_CMDADDR + 2); | ||
8218 | aic_outb(p, 0, TMODE_CMDADDR + 3); | ||
8219 | aic_outb(p, 0, TMODE_CMDADDR_NEXT); | ||
8220 | |||
8221 | /* | ||
8222 | * Link us into the list of valid hosts | ||
8223 | */ | ||
8224 | p->next = first_aic7xxx; | ||
8225 | first_aic7xxx = p; | ||
8226 | |||
8227 | /* | ||
8228 | * Allocate the first set of scbs for this controller. This is to stream- | ||
8229 | * line code elsewhere in the driver. If we have to check for the existence | ||
8230 | * of scbs in certain code sections, it slows things down. However, as | ||
8231 | * soon as we register the IRQ for this card, we could get an interrupt that | ||
8232 | * includes possibly the SCSI_RSTI interrupt. If we catch that interrupt | ||
8233 | * then we are likely to segfault if we don't have at least one chunk of | ||
8234 | * SCBs allocated or add checks all through the reset code to make sure | ||
8235 | * that the SCBs have been allocated which is an invalid running condition | ||
8236 | * and therefore I think it's preferable to simply pre-allocate the first | ||
8237 | * chunk of SCBs. | ||
8238 | */ | ||
8239 | aic7xxx_allocate_scb(p); | ||
8240 | |||
8241 | /* | ||
8242 | * Load the sequencer program, then re-enable the board - | ||
8243 | * resetting the AIC-7770 disables it, leaving the lights | ||
8244 | * on with nobody home. | ||
8245 | */ | ||
8246 | aic7xxx_loadseq(p); | ||
8247 | |||
8248 | /* | ||
8249 | * Make sure the AUTOFLUSHDIS bit is *not* set in the SBLKCTL register | ||
8250 | */ | ||
8251 | aic_outb(p, aic_inb(p, SBLKCTL) & ~AUTOFLUSHDIS, SBLKCTL); | ||
8252 | |||
8253 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) | ||
8254 | { | ||
8255 | aic_outb(p, ENABLE, BCTL); /* Enable the boards BUS drivers. */ | ||
8256 | } | ||
8257 | |||
8258 | if ( !(aic7xxx_no_reset) ) | ||
8259 | { | ||
8260 | if (p->features & AHC_TWIN) | ||
8261 | { | ||
8262 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
8263 | printk(KERN_INFO "(scsi%d) Resetting channel B\n", p->host_no); | ||
8264 | aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL); | ||
8265 | aic7xxx_reset_current_bus(p); | ||
8266 | aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL); | ||
8267 | } | ||
8268 | /* Reset SCSI bus A. */ | ||
8269 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
8270 | { /* In case we are a 3940, 3985, or 7895, print the right channel */ | ||
8271 | char *channel = ""; | ||
8272 | if (p->flags & AHC_MULTI_CHANNEL) | ||
8273 | { | ||
8274 | channel = " A"; | ||
8275 | if (p->flags & (AHC_CHNLB|AHC_CHNLC)) | ||
8276 | channel = (p->flags & AHC_CHNLB) ? " B" : " C"; | ||
8277 | } | ||
8278 | printk(KERN_INFO "(scsi%d) Resetting channel%s\n", p->host_no, channel); | ||
8279 | } | ||
8280 | |||
8281 | aic7xxx_reset_current_bus(p); | ||
8282 | |||
8283 | } | ||
8284 | else | ||
8285 | { | ||
8286 | if (!reset_delay) | ||
8287 | { | ||
8288 | printk(KERN_INFO "(scsi%d) Not resetting SCSI bus. Note: Don't use " | ||
8289 | "the no_reset\n", p->host_no); | ||
8290 | printk(KERN_INFO "(scsi%d) option unless you have a verifiable need " | ||
8291 | "for it.\n", p->host_no); | ||
8292 | } | ||
8293 | } | ||
8294 | |||
8295 | /* | ||
8296 | * Register IRQ with the kernel. Only allow sharing IRQs with | ||
8297 | * PCI devices. | ||
8298 | */ | ||
8299 | if (!(p->chip & AHC_PCI)) | ||
8300 | { | ||
8301 | result = (request_irq(p->irq, do_aic7xxx_isr, 0, "aic7xxx", p)); | ||
8302 | } | ||
8303 | else | ||
8304 | { | ||
8305 | result = (request_irq(p->irq, do_aic7xxx_isr, IRQF_SHARED, | ||
8306 | "aic7xxx", p)); | ||
8307 | if (result < 0) | ||
8308 | { | ||
8309 | result = (request_irq(p->irq, do_aic7xxx_isr, IRQF_DISABLED | IRQF_SHARED, | ||
8310 | "aic7xxx", p)); | ||
8311 | } | ||
8312 | } | ||
8313 | if (result < 0) | ||
8314 | { | ||
8315 | printk(KERN_WARNING "(scsi%d) Couldn't register IRQ %d, ignoring " | ||
8316 | "controller.\n", p->host_no, p->irq); | ||
8317 | aic_outb(p, 0, SIMODE1); | ||
8318 | p->irq = 0; | ||
8319 | return (0); | ||
8320 | } | ||
8321 | |||
8322 | if(aic_inb(p, INTSTAT) & INT_PEND) | ||
8323 | printk(INFO_LEAD "spurious interrupt during configuration, cleared.\n", | ||
8324 | p->host_no, -1, -1 , -1); | ||
8325 | aic7xxx_clear_intstat(p); | ||
8326 | |||
8327 | unpause_sequencer(p, /* unpause_always */ TRUE); | ||
8328 | |||
8329 | return (found); | ||
8330 | } | ||
8331 | |||
8332 | /*+F************************************************************************* | ||
8333 | * Function: | ||
8334 | * aic7xxx_chip_reset | ||
8335 | * | ||
8336 | * Description: | ||
8337 | * Perform a chip reset on the aic7xxx SCSI controller. The controller | ||
8338 | * is paused upon return. | ||
8339 | *-F*************************************************************************/ | ||
8340 | static int | ||
8341 | aic7xxx_chip_reset(struct aic7xxx_host *p) | ||
8342 | { | ||
8343 | unsigned char sblkctl; | ||
8344 | int wait; | ||
8345 | |||
8346 | /* | ||
8347 | * For some 274x boards, we must clear the CHIPRST bit and pause | ||
8348 | * the sequencer. For some reason, this makes the driver work. | ||
8349 | */ | ||
8350 | aic_outb(p, PAUSE | CHIPRST, HCNTRL); | ||
8351 | |||
8352 | /* | ||
8353 | * In the future, we may call this function as a last resort for | ||
8354 | * error handling. Let's be nice and not do any unnecessary delays. | ||
8355 | */ | ||
8356 | wait = 1000; /* 1 msec (1000 * 1 msec) */ | ||
8357 | while (--wait && !(aic_inb(p, HCNTRL) & CHIPRSTACK)) | ||
8358 | { | ||
8359 | udelay(1); /* 1 usec */ | ||
8360 | } | ||
8361 | |||
8362 | pause_sequencer(p); | ||
8363 | |||
8364 | sblkctl = aic_inb(p, SBLKCTL) & (SELBUSB|SELWIDE); | ||
8365 | if (p->chip & AHC_PCI) | ||
8366 | sblkctl &= ~SELBUSB; | ||
8367 | switch( sblkctl ) | ||
8368 | { | ||
8369 | case 0: /* normal narrow card */ | ||
8370 | break; | ||
8371 | case 2: /* Wide card */ | ||
8372 | p->features |= AHC_WIDE; | ||
8373 | break; | ||
8374 | case 8: /* Twin card */ | ||
8375 | p->features |= AHC_TWIN; | ||
8376 | p->flags |= AHC_MULTI_CHANNEL; | ||
8377 | break; | ||
8378 | default: /* hmmm...we don't know what this is */ | ||
8379 | printk(KERN_WARNING "aic7xxx: Unsupported adapter type %d, ignoring.\n", | ||
8380 | aic_inb(p, SBLKCTL) & 0x0a); | ||
8381 | return(-1); | ||
8382 | } | ||
8383 | return(0); | ||
8384 | } | ||
8385 | |||
8386 | /*+F************************************************************************* | ||
8387 | * Function: | ||
8388 | * aic7xxx_alloc | ||
8389 | * | ||
8390 | * Description: | ||
8391 | * Allocate and initialize a host structure. Returns NULL upon error | ||
8392 | * and a pointer to a aic7xxx_host struct upon success. | ||
8393 | *-F*************************************************************************/ | ||
8394 | static struct aic7xxx_host * | ||
8395 | aic7xxx_alloc(struct scsi_host_template *sht, struct aic7xxx_host *temp) | ||
8396 | { | ||
8397 | struct aic7xxx_host *p = NULL; | ||
8398 | struct Scsi_Host *host; | ||
8399 | |||
8400 | /* | ||
8401 | * Allocate a storage area by registering us with the mid-level | ||
8402 | * SCSI layer. | ||
8403 | */ | ||
8404 | host = scsi_register(sht, sizeof(struct aic7xxx_host)); | ||
8405 | |||
8406 | if (host != NULL) | ||
8407 | { | ||
8408 | p = (struct aic7xxx_host *) host->hostdata; | ||
8409 | memset(p, 0, sizeof(struct aic7xxx_host)); | ||
8410 | *p = *temp; | ||
8411 | p->host = host; | ||
8412 | |||
8413 | p->scb_data = kzalloc(sizeof(scb_data_type), GFP_ATOMIC); | ||
8414 | if (p->scb_data) | ||
8415 | { | ||
8416 | scbq_init (&p->scb_data->free_scbs); | ||
8417 | } | ||
8418 | else | ||
8419 | { | ||
8420 | /* | ||
8421 | * For some reason we don't have enough memory. Free the | ||
8422 | * allocated memory for the aic7xxx_host struct, and return NULL. | ||
8423 | */ | ||
8424 | release_region(p->base, MAXREG - MINREG); | ||
8425 | scsi_unregister(host); | ||
8426 | return(NULL); | ||
8427 | } | ||
8428 | p->host_no = host->host_no; | ||
8429 | } | ||
8430 | return (p); | ||
8431 | } | ||
8432 | |||
8433 | /*+F************************************************************************* | ||
8434 | * Function: | ||
8435 | * aic7xxx_free | ||
8436 | * | ||
8437 | * Description: | ||
8438 | * Frees and releases all resources associated with an instance of | ||
8439 | * the driver (struct aic7xxx_host *). | ||
8440 | *-F*************************************************************************/ | ||
8441 | static void | ||
8442 | aic7xxx_free(struct aic7xxx_host *p) | ||
8443 | { | ||
8444 | int i; | ||
8445 | |||
8446 | /* | ||
8447 | * Free the allocated hardware SCB space. | ||
8448 | */ | ||
8449 | if (p->scb_data != NULL) | ||
8450 | { | ||
8451 | struct aic7xxx_scb_dma *scb_dma = NULL; | ||
8452 | if (p->scb_data->hscbs != NULL) | ||
8453 | { | ||
8454 | pci_free_consistent(p->pdev, p->scb_data->hscbs_dma_len, | ||
8455 | p->scb_data->hscbs, p->scb_data->hscbs_dma); | ||
8456 | p->scb_data->hscbs = p->scb_data->hscb_kmalloc_ptr = NULL; | ||
8457 | } | ||
8458 | /* | ||
8459 | * Free the driver SCBs. These were allocated on an as-need | ||
8460 | * basis. We allocated these in groups depending on how many | ||
8461 | * we could fit into a given amount of RAM. The tail SCB for | ||
8462 | * these allocations has a pointer to the alloced area. | ||
8463 | */ | ||
8464 | for (i = 0; i < p->scb_data->numscbs; i++) | ||
8465 | { | ||
8466 | if (p->scb_data->scb_array[i]->scb_dma != scb_dma) | ||
8467 | { | ||
8468 | scb_dma = p->scb_data->scb_array[i]->scb_dma; | ||
8469 | pci_free_consistent(p->pdev, scb_dma->dma_len, | ||
8470 | (void *)((unsigned long)scb_dma->dma_address | ||
8471 | - scb_dma->dma_offset), | ||
8472 | scb_dma->dma_address); | ||
8473 | } | ||
8474 | kfree(p->scb_data->scb_array[i]->kmalloc_ptr); | ||
8475 | p->scb_data->scb_array[i] = NULL; | ||
8476 | } | ||
8477 | |||
8478 | /* | ||
8479 | * Free the SCB data area. | ||
8480 | */ | ||
8481 | kfree(p->scb_data); | ||
8482 | } | ||
8483 | |||
8484 | pci_free_consistent(p->pdev, 3*256, (void *)p->untagged_scbs, p->fifo_dma); | ||
8485 | } | ||
8486 | |||
8487 | /*+F************************************************************************* | ||
8488 | * Function: | ||
8489 | * aic7xxx_load_seeprom | ||
8490 | * | ||
8491 | * Description: | ||
8492 | * Load the seeprom and configure adapter and target settings. | ||
8493 | * Returns 1 if the load was successful and 0 otherwise. | ||
8494 | *-F*************************************************************************/ | ||
8495 | static void | ||
8496 | aic7xxx_load_seeprom(struct aic7xxx_host *p, unsigned char *sxfrctl1) | ||
8497 | { | ||
8498 | int have_seeprom = 0; | ||
8499 | int i, max_targets, mask; | ||
8500 | unsigned char scsirate, scsi_conf; | ||
8501 | unsigned short scarray[128]; | ||
8502 | struct seeprom_config *sc = (struct seeprom_config *) scarray; | ||
8503 | |||
8504 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
8505 | { | ||
8506 | printk(KERN_INFO "aic7xxx: Loading serial EEPROM..."); | ||
8507 | } | ||
8508 | switch (p->chip) | ||
8509 | { | ||
8510 | case (AHC_AIC7770|AHC_EISA): /* None of these adapters have seeproms. */ | ||
8511 | if (aic_inb(p, SCSICONF) & TERM_ENB) | ||
8512 | p->flags |= AHC_TERM_ENB_A; | ||
8513 | if ( (p->features & AHC_TWIN) && (aic_inb(p, SCSICONF + 1) & TERM_ENB) ) | ||
8514 | p->flags |= AHC_TERM_ENB_B; | ||
8515 | break; | ||
8516 | |||
8517 | case (AHC_AIC7770|AHC_VL): | ||
8518 | have_seeprom = read_284x_seeprom(p, (struct seeprom_config *) scarray); | ||
8519 | break; | ||
8520 | |||
8521 | default: | ||
8522 | have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)), | ||
8523 | scarray, p->sc_size, p->sc_type); | ||
8524 | if (!have_seeprom) | ||
8525 | { | ||
8526 | if(p->sc_type == C46) | ||
8527 | have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)), | ||
8528 | scarray, p->sc_size, C56_66); | ||
8529 | else | ||
8530 | have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)), | ||
8531 | scarray, p->sc_size, C46); | ||
8532 | } | ||
8533 | if (!have_seeprom) | ||
8534 | { | ||
8535 | p->sc_size = 128; | ||
8536 | have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)), | ||
8537 | scarray, p->sc_size, p->sc_type); | ||
8538 | if (!have_seeprom) | ||
8539 | { | ||
8540 | if(p->sc_type == C46) | ||
8541 | have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)), | ||
8542 | scarray, p->sc_size, C56_66); | ||
8543 | else | ||
8544 | have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)), | ||
8545 | scarray, p->sc_size, C46); | ||
8546 | } | ||
8547 | } | ||
8548 | break; | ||
8549 | } | ||
8550 | |||
8551 | if (!have_seeprom) | ||
8552 | { | ||
8553 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
8554 | { | ||
8555 | printk("\naic7xxx: No SEEPROM available.\n"); | ||
8556 | } | ||
8557 | p->flags |= AHC_NEWEEPROM_FMT; | ||
8558 | if (aic_inb(p, SCSISEQ) == 0) | ||
8559 | { | ||
8560 | p->flags |= AHC_USEDEFAULTS; | ||
8561 | p->flags &= ~AHC_BIOS_ENABLED; | ||
8562 | p->scsi_id = p->scsi_id_b = 7; | ||
8563 | *sxfrctl1 |= STPWEN; | ||
8564 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
8565 | { | ||
8566 | printk("aic7xxx: Using default values.\n"); | ||
8567 | } | ||
8568 | } | ||
8569 | else if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
8570 | { | ||
8571 | printk("aic7xxx: Using leftover BIOS values.\n"); | ||
8572 | } | ||
8573 | if ( ((p->chip & ~AHC_CHIPID_MASK) == AHC_PCI) && (*sxfrctl1 & STPWEN) ) | ||
8574 | { | ||
8575 | p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH; | ||
8576 | sc->adapter_control &= ~CFAUTOTERM; | ||
8577 | sc->adapter_control |= CFSTERM | CFWSTERM | CFLVDSTERM; | ||
8578 | } | ||
8579 | if (aic7xxx_extended) | ||
8580 | p->flags |= (AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B); | ||
8581 | else | ||
8582 | p->flags &= ~(AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B); | ||
8583 | } | ||
8584 | else | ||
8585 | { | ||
8586 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
8587 | { | ||
8588 | printk("done\n"); | ||
8589 | } | ||
8590 | |||
8591 | /* | ||
8592 | * Note things in our flags | ||
8593 | */ | ||
8594 | p->flags |= AHC_SEEPROM_FOUND; | ||
8595 | |||
8596 | /* | ||
8597 | * Update the settings in sxfrctl1 to match the termination settings. | ||
8598 | */ | ||
8599 | *sxfrctl1 = 0; | ||
8600 | |||
8601 | /* | ||
8602 | * Get our SCSI ID from the SEEPROM setting... | ||
8603 | */ | ||
8604 | p->scsi_id = (sc->brtime_id & CFSCSIID); | ||
8605 | |||
8606 | /* | ||
8607 | * First process the settings that are different between the VLB | ||
8608 | * and PCI adapter seeproms. | ||
8609 | */ | ||
8610 | if ((p->chip & AHC_CHIPID_MASK) == AHC_AIC7770) | ||
8611 | { | ||
8612 | /* VLB adapter seeproms */ | ||
8613 | if (sc->bios_control & CF284XEXTEND) | ||
8614 | p->flags |= AHC_EXTEND_TRANS_A; | ||
8615 | |||
8616 | if (sc->adapter_control & CF284XSTERM) | ||
8617 | { | ||
8618 | *sxfrctl1 |= STPWEN; | ||
8619 | p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH; | ||
8620 | } | ||
8621 | } | ||
8622 | else | ||
8623 | { | ||
8624 | /* PCI adapter seeproms */ | ||
8625 | if (sc->bios_control & CFEXTEND) | ||
8626 | p->flags |= AHC_EXTEND_TRANS_A; | ||
8627 | if (sc->bios_control & CFBIOSEN) | ||
8628 | p->flags |= AHC_BIOS_ENABLED; | ||
8629 | else | ||
8630 | p->flags &= ~AHC_BIOS_ENABLED; | ||
8631 | |||
8632 | if (sc->adapter_control & CFSTERM) | ||
8633 | { | ||
8634 | *sxfrctl1 |= STPWEN; | ||
8635 | p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH; | ||
8636 | } | ||
8637 | } | ||
8638 | memcpy(&p->sc, sc, sizeof(struct seeprom_config)); | ||
8639 | } | ||
8640 | |||
8641 | p->discenable = 0; | ||
8642 | |||
8643 | /* | ||
8644 | * Limit to 16 targets just in case. The 2842 for one is known to | ||
8645 | * blow the max_targets setting, future cards might also. | ||
8646 | */ | ||
8647 | max_targets = ((p->features & (AHC_TWIN | AHC_WIDE)) ? 16 : 8); | ||
8648 | |||
8649 | if (have_seeprom) | ||
8650 | { | ||
8651 | for (i = 0; i < max_targets; i++) | ||
8652 | { | ||
8653 | if( ((p->features & AHC_ULTRA) && | ||
8654 | !(sc->adapter_control & CFULTRAEN) && | ||
8655 | (sc->device_flags[i] & CFSYNCHISULTRA)) || | ||
8656 | (sc->device_flags[i] & CFNEWULTRAFORMAT) ) | ||
8657 | { | ||
8658 | p->flags |= AHC_NEWEEPROM_FMT; | ||
8659 | break; | ||
8660 | } | ||
8661 | } | ||
8662 | } | ||
8663 | |||
8664 | for (i = 0; i < max_targets; i++) | ||
8665 | { | ||
8666 | mask = (0x01 << i); | ||
8667 | if (!have_seeprom) | ||
8668 | { | ||
8669 | if (aic_inb(p, SCSISEQ) != 0) | ||
8670 | { | ||
8671 | /* | ||
8672 | * OK...the BIOS set things up and left behind the settings we need. | ||
8673 | * Just make our sc->device_flags[i] entry match what the card has | ||
8674 | * set for this device. | ||
8675 | */ | ||
8676 | p->discenable = | ||
8677 | ~(aic_inb(p, DISC_DSB) | (aic_inb(p, DISC_DSB + 1) << 8) ); | ||
8678 | p->ultraenb = | ||
8679 | (aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8) ); | ||
8680 | sc->device_flags[i] = (p->discenable & mask) ? CFDISC : 0; | ||
8681 | if (aic_inb(p, TARG_SCSIRATE + i) & WIDEXFER) | ||
8682 | sc->device_flags[i] |= CFWIDEB; | ||
8683 | if (p->features & AHC_ULTRA2) | ||
8684 | { | ||
8685 | if (aic_inb(p, TARG_OFFSET + i)) | ||
8686 | { | ||
8687 | sc->device_flags[i] |= CFSYNCH; | ||
8688 | sc->device_flags[i] |= (aic_inb(p, TARG_SCSIRATE + i) & 0x07); | ||
8689 | if ( (aic_inb(p, TARG_SCSIRATE + i) & 0x18) == 0x18 ) | ||
8690 | sc->device_flags[i] |= CFSYNCHISULTRA; | ||
8691 | } | ||
8692 | } | ||
8693 | else | ||
8694 | { | ||
8695 | if (aic_inb(p, TARG_SCSIRATE + i) & ~WIDEXFER) | ||
8696 | { | ||
8697 | sc->device_flags[i] |= CFSYNCH; | ||
8698 | if (p->features & AHC_ULTRA) | ||
8699 | sc->device_flags[i] |= ((p->ultraenb & mask) ? | ||
8700 | CFSYNCHISULTRA : 0); | ||
8701 | } | ||
8702 | } | ||
8703 | } | ||
8704 | else | ||
8705 | { | ||
8706 | /* | ||
8707 | * Assume the BIOS has NOT been run on this card and nothing between | ||
8708 | * the card and the devices is configured yet. | ||
8709 | */ | ||
8710 | sc->device_flags[i] = CFDISC; | ||
8711 | if (p->features & AHC_WIDE) | ||
8712 | sc->device_flags[i] |= CFWIDEB; | ||
8713 | if (p->features & AHC_ULTRA3) | ||
8714 | sc->device_flags[i] |= 2; | ||
8715 | else if (p->features & AHC_ULTRA2) | ||
8716 | sc->device_flags[i] |= 3; | ||
8717 | else if (p->features & AHC_ULTRA) | ||
8718 | sc->device_flags[i] |= CFSYNCHISULTRA; | ||
8719 | sc->device_flags[i] |= CFSYNCH; | ||
8720 | aic_outb(p, 0, TARG_SCSIRATE + i); | ||
8721 | if (p->features & AHC_ULTRA2) | ||
8722 | aic_outb(p, 0, TARG_OFFSET + i); | ||
8723 | } | ||
8724 | } | ||
8725 | if (sc->device_flags[i] & CFDISC) | ||
8726 | { | ||
8727 | p->discenable |= mask; | ||
8728 | } | ||
8729 | if (p->flags & AHC_NEWEEPROM_FMT) | ||
8730 | { | ||
8731 | if ( !(p->features & AHC_ULTRA2) ) | ||
8732 | { | ||
8733 | /* | ||
8734 | * I know of two different Ultra BIOSes that do this differently. | ||
8735 | * One on the Gigabyte 6BXU mb that wants flags[i] & CFXFER to | ||
8736 | * be == to 0x03 and SYNCHISULTRA to be true to mean 40MByte/s | ||
8737 | * while on the IBM Netfinity 5000 they want the same thing | ||
8738 | * to be something else, while flags[i] & CFXFER == 0x03 and | ||
8739 | * SYNCHISULTRA false should be 40MByte/s. So, we set both to | ||
8740 | * 40MByte/s and the lower speeds be damned. People will have | ||
8741 | * to select around the conversely mapped lower speeds in order | ||
8742 | * to select lower speeds on these boards. | ||
8743 | */ | ||
8744 | if ( (sc->device_flags[i] & CFNEWULTRAFORMAT) && | ||
8745 | ((sc->device_flags[i] & CFXFER) == 0x03) ) | ||
8746 | { | ||
8747 | sc->device_flags[i] &= ~CFXFER; | ||
8748 | sc->device_flags[i] |= CFSYNCHISULTRA; | ||
8749 | } | ||
8750 | if (sc->device_flags[i] & CFSYNCHISULTRA) | ||
8751 | { | ||
8752 | p->ultraenb |= mask; | ||
8753 | } | ||
8754 | } | ||
8755 | else if ( !(sc->device_flags[i] & CFNEWULTRAFORMAT) && | ||
8756 | (p->features & AHC_ULTRA2) && | ||
8757 | (sc->device_flags[i] & CFSYNCHISULTRA) ) | ||
8758 | { | ||
8759 | p->ultraenb |= mask; | ||
8760 | } | ||
8761 | } | ||
8762 | else if (sc->adapter_control & CFULTRAEN) | ||
8763 | { | ||
8764 | p->ultraenb |= mask; | ||
8765 | } | ||
8766 | if ( (sc->device_flags[i] & CFSYNCH) == 0) | ||
8767 | { | ||
8768 | sc->device_flags[i] &= ~CFXFER; | ||
8769 | p->ultraenb &= ~mask; | ||
8770 | p->user[i].offset = 0; | ||
8771 | p->user[i].period = 0; | ||
8772 | p->user[i].options = 0; | ||
8773 | } | ||
8774 | else | ||
8775 | { | ||
8776 | if (p->features & AHC_ULTRA3) | ||
8777 | { | ||
8778 | p->user[i].offset = MAX_OFFSET_ULTRA2; | ||
8779 | if( (sc->device_flags[i] & CFXFER) < 0x03 ) | ||
8780 | { | ||
8781 | scsirate = (sc->device_flags[i] & CFXFER); | ||
8782 | p->user[i].options = MSG_EXT_PPR_OPTION_DT_CRC; | ||
8783 | } | ||
8784 | else | ||
8785 | { | ||
8786 | scsirate = (sc->device_flags[i] & CFXFER) | | ||
8787 | ((p->ultraenb & mask) ? 0x18 : 0x10); | ||
8788 | p->user[i].options = 0; | ||
8789 | } | ||
8790 | p->user[i].period = aic7xxx_find_period(p, scsirate, | ||
8791 | AHC_SYNCRATE_ULTRA3); | ||
8792 | } | ||
8793 | else if (p->features & AHC_ULTRA2) | ||
8794 | { | ||
8795 | p->user[i].offset = MAX_OFFSET_ULTRA2; | ||
8796 | scsirate = (sc->device_flags[i] & CFXFER) | | ||
8797 | ((p->ultraenb & mask) ? 0x18 : 0x10); | ||
8798 | p->user[i].options = 0; | ||
8799 | p->user[i].period = aic7xxx_find_period(p, scsirate, | ||
8800 | AHC_SYNCRATE_ULTRA2); | ||
8801 | } | ||
8802 | else | ||
8803 | { | ||
8804 | scsirate = (sc->device_flags[i] & CFXFER) << 4; | ||
8805 | p->user[i].options = 0; | ||
8806 | p->user[i].offset = MAX_OFFSET_8BIT; | ||
8807 | if (p->features & AHC_ULTRA) | ||
8808 | { | ||
8809 | short ultraenb; | ||
8810 | ultraenb = aic_inb(p, ULTRA_ENB) | | ||
8811 | (aic_inb(p, ULTRA_ENB + 1) << 8); | ||
8812 | p->user[i].period = aic7xxx_find_period(p, scsirate, | ||
8813 | (p->ultraenb & mask) ? | ||
8814 | AHC_SYNCRATE_ULTRA : | ||
8815 | AHC_SYNCRATE_FAST); | ||
8816 | } | ||
8817 | else | ||
8818 | p->user[i].period = aic7xxx_find_period(p, scsirate, | ||
8819 | AHC_SYNCRATE_FAST); | ||
8820 | } | ||
8821 | } | ||
8822 | if ( (sc->device_flags[i] & CFWIDEB) && (p->features & AHC_WIDE) ) | ||
8823 | { | ||
8824 | p->user[i].width = MSG_EXT_WDTR_BUS_16_BIT; | ||
8825 | } | ||
8826 | else | ||
8827 | { | ||
8828 | p->user[i].width = MSG_EXT_WDTR_BUS_8_BIT; | ||
8829 | } | ||
8830 | } | ||
8831 | aic_outb(p, ~(p->discenable & 0xFF), DISC_DSB); | ||
8832 | aic_outb(p, ~((p->discenable >> 8) & 0xFF), DISC_DSB + 1); | ||
8833 | |||
8834 | /* | ||
8835 | * We set the p->ultraenb from the SEEPROM to begin with, but now we make | ||
8836 | * it match what is already down in the card. If we are doing a reset | ||
8837 | * on the card then this will get put back to a default state anyway. | ||
8838 | * This allows us to not have to pre-emptively negotiate when using the | ||
8839 | * no_reset option. | ||
8840 | */ | ||
8841 | if (p->features & AHC_ULTRA) | ||
8842 | p->ultraenb = aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8); | ||
8843 | |||
8844 | |||
8845 | scsi_conf = (p->scsi_id & HSCSIID); | ||
8846 | |||
8847 | if(have_seeprom) | ||
8848 | { | ||
8849 | p->adapter_control = sc->adapter_control; | ||
8850 | p->bios_control = sc->bios_control; | ||
8851 | |||
8852 | switch (p->chip & AHC_CHIPID_MASK) | ||
8853 | { | ||
8854 | case AHC_AIC7895: | ||
8855 | case AHC_AIC7896: | ||
8856 | case AHC_AIC7899: | ||
8857 | if (p->adapter_control & CFBPRIMARY) | ||
8858 | p->flags |= AHC_CHANNEL_B_PRIMARY; | ||
8859 | default: | ||
8860 | break; | ||
8861 | } | ||
8862 | |||
8863 | if (sc->adapter_control & CFSPARITY) | ||
8864 | scsi_conf |= ENSPCHK; | ||
8865 | } | ||
8866 | else | ||
8867 | { | ||
8868 | scsi_conf |= ENSPCHK | RESET_SCSI; | ||
8869 | } | ||
8870 | |||
8871 | /* | ||
8872 | * Only set the SCSICONF and SCSICONF + 1 registers if we are a PCI card. | ||
8873 | * The 2842 and 2742 cards already have these registers set and we don't | ||
8874 | * want to muck with them since we don't set all the bits they do. | ||
8875 | */ | ||
8876 | if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI ) | ||
8877 | { | ||
8878 | /* Set the host ID */ | ||
8879 | aic_outb(p, scsi_conf, SCSICONF); | ||
8880 | /* In case we are a wide card */ | ||
8881 | aic_outb(p, p->scsi_id, SCSICONF + 1); | ||
8882 | } | ||
8883 | } | ||
8884 | |||
8885 | /*+F************************************************************************* | ||
8886 | * Function: | ||
8887 | * aic7xxx_configure_bugs | ||
8888 | * | ||
8889 | * Description: | ||
8890 | * Take the card passed in and set the appropriate bug flags based upon | ||
8891 | * the card model. Also make any changes needed to device registers or | ||
8892 | * PCI registers while we are here. | ||
8893 | *-F*************************************************************************/ | ||
8894 | static void | ||
8895 | aic7xxx_configure_bugs(struct aic7xxx_host *p) | ||
8896 | { | ||
8897 | unsigned short tmp_word; | ||
8898 | |||
8899 | switch(p->chip & AHC_CHIPID_MASK) | ||
8900 | { | ||
8901 | case AHC_AIC7860: | ||
8902 | p->bugs |= AHC_BUG_PCI_2_1_RETRY; | ||
8903 | /* fall through */ | ||
8904 | case AHC_AIC7850: | ||
8905 | case AHC_AIC7870: | ||
8906 | p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI; | ||
8907 | break; | ||
8908 | case AHC_AIC7880: | ||
8909 | p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY | | ||
8910 | AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI; | ||
8911 | break; | ||
8912 | case AHC_AIC7890: | ||
8913 | p->bugs |= AHC_BUG_AUTOFLUSH | AHC_BUG_CACHETHEN; | ||
8914 | break; | ||
8915 | case AHC_AIC7892: | ||
8916 | p->bugs |= AHC_BUG_SCBCHAN_UPLOAD; | ||
8917 | break; | ||
8918 | case AHC_AIC7895: | ||
8919 | p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY | | ||
8920 | AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI; | ||
8921 | break; | ||
8922 | case AHC_AIC7896: | ||
8923 | p->bugs |= AHC_BUG_CACHETHEN_DIS; | ||
8924 | break; | ||
8925 | case AHC_AIC7899: | ||
8926 | p->bugs |= AHC_BUG_SCBCHAN_UPLOAD; | ||
8927 | break; | ||
8928 | default: | ||
8929 | /* Nothing to do */ | ||
8930 | break; | ||
8931 | } | ||
8932 | |||
8933 | /* | ||
8934 | * Now handle the bugs that require PCI register or card register tweaks | ||
8935 | */ | ||
8936 | pci_read_config_word(p->pdev, PCI_COMMAND, &tmp_word); | ||
8937 | if(p->bugs & AHC_BUG_PCI_MWI) | ||
8938 | { | ||
8939 | tmp_word &= ~PCI_COMMAND_INVALIDATE; | ||
8940 | } | ||
8941 | else | ||
8942 | { | ||
8943 | tmp_word |= PCI_COMMAND_INVALIDATE; | ||
8944 | } | ||
8945 | pci_write_config_word(p->pdev, PCI_COMMAND, tmp_word); | ||
8946 | |||
8947 | if(p->bugs & AHC_BUG_CACHETHEN) | ||
8948 | { | ||
8949 | aic_outb(p, aic_inb(p, DSCOMMAND0) & ~CACHETHEN, DSCOMMAND0); | ||
8950 | } | ||
8951 | else if (p->bugs & AHC_BUG_CACHETHEN_DIS) | ||
8952 | { | ||
8953 | aic_outb(p, aic_inb(p, DSCOMMAND0) | CACHETHEN, DSCOMMAND0); | ||
8954 | } | ||
8955 | |||
8956 | return; | ||
8957 | } | ||
8958 | |||
8959 | |||
8960 | /*+F************************************************************************* | ||
8961 | * Function: | ||
8962 | * aic7xxx_detect | ||
8963 | * | ||
8964 | * Description: | ||
8965 | * Try to detect and register an Adaptec 7770 or 7870 SCSI controller. | ||
8966 | * | ||
8967 | * XXX - This should really be called aic7xxx_probe(). A sequence of | ||
8968 | * probe(), attach()/detach(), and init() makes more sense than | ||
8969 | * one do-it-all function. This may be useful when (and if) the | ||
8970 | * mid-level SCSI code is overhauled. | ||
8971 | *-F*************************************************************************/ | ||
8972 | static int | ||
8973 | aic7xxx_detect(struct scsi_host_template *template) | ||
8974 | { | ||
8975 | struct aic7xxx_host *temp_p = NULL; | ||
8976 | struct aic7xxx_host *current_p = NULL; | ||
8977 | struct aic7xxx_host *list_p = NULL; | ||
8978 | int found = 0; | ||
8979 | #if defined(__i386__) || defined(__alpha__) | ||
8980 | ahc_flag_type flags = 0; | ||
8981 | int type; | ||
8982 | #endif | ||
8983 | unsigned char sxfrctl1; | ||
8984 | #if defined(__i386__) || defined(__alpha__) | ||
8985 | unsigned char hcntrl, hostconf; | ||
8986 | unsigned int slot, base; | ||
8987 | #endif | ||
8988 | |||
8989 | #ifdef MODULE | ||
8990 | /* | ||
8991 | * If we are called as a module, the aic7xxx pointer may not be null | ||
8992 | * and it would point to our bootup string, just like on the lilo | ||
8993 | * command line. IF not NULL, then process this config string with | ||
8994 | * aic7xxx_setup | ||
8995 | */ | ||
8996 | if(aic7xxx) | ||
8997 | aic7xxx_setup(aic7xxx); | ||
8998 | #endif | ||
8999 | |||
9000 | template->proc_name = "aic7xxx"; | ||
9001 | template->sg_tablesize = AIC7XXX_MAX_SG; | ||
9002 | |||
9003 | |||
9004 | #ifdef CONFIG_PCI | ||
9005 | /* | ||
9006 | * PCI-bus probe. | ||
9007 | */ | ||
9008 | { | ||
9009 | static struct | ||
9010 | { | ||
9011 | unsigned short vendor_id; | ||
9012 | unsigned short device_id; | ||
9013 | ahc_chip chip; | ||
9014 | ahc_flag_type flags; | ||
9015 | ahc_feature features; | ||
9016 | int board_name_index; | ||
9017 | unsigned short seeprom_size; | ||
9018 | unsigned short seeprom_type; | ||
9019 | } const aic_pdevs[] = { | ||
9020 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7810, AHC_NONE, | ||
9021 | AHC_FNONE, AHC_FENONE, 1, | ||
9022 | 32, C46 }, | ||
9023 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7850, AHC_AIC7850, | ||
9024 | AHC_PAGESCBS, AHC_AIC7850_FE, 5, | ||
9025 | 32, C46 }, | ||
9026 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7855, AHC_AIC7850, | ||
9027 | AHC_PAGESCBS, AHC_AIC7850_FE, 6, | ||
9028 | 32, C46 }, | ||
9029 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7821, AHC_AIC7860, | ||
9030 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9031 | AHC_AIC7860_FE, 7, | ||
9032 | 32, C46 }, | ||
9033 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_3860, AHC_AIC7860, | ||
9034 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9035 | AHC_AIC7860_FE, 7, | ||
9036 | 32, C46 }, | ||
9037 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860, | ||
9038 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9039 | AHC_AIC7860_FE, 7, | ||
9040 | 32, C46 }, | ||
9041 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860, | ||
9042 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9043 | AHC_AIC7860_FE, 7, | ||
9044 | 32, C46 }, | ||
9045 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7860, AHC_AIC7860, | ||
9046 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MOTHERBOARD, | ||
9047 | AHC_AIC7860_FE, 7, | ||
9048 | 32, C46 }, | ||
9049 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7861, AHC_AIC7860, | ||
9050 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9051 | AHC_AIC7860_FE, 8, | ||
9052 | 32, C46 }, | ||
9053 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7870, AHC_AIC7870, | ||
9054 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD, | ||
9055 | AHC_AIC7870_FE, 9, | ||
9056 | 32, C46 }, | ||
9057 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7871, AHC_AIC7870, | ||
9058 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE, 10, | ||
9059 | 32, C46 }, | ||
9060 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7872, AHC_AIC7870, | ||
9061 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9062 | AHC_AIC7870_FE, 11, | ||
9063 | 32, C56_66 }, | ||
9064 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7873, AHC_AIC7870, | ||
9065 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9066 | AHC_AIC7870_FE, 12, | ||
9067 | 32, C56_66 }, | ||
9068 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7874, AHC_AIC7870, | ||
9069 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE, 13, | ||
9070 | 32, C46 }, | ||
9071 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7880, AHC_AIC7880, | ||
9072 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD, | ||
9073 | AHC_AIC7880_FE, 14, | ||
9074 | 32, C46 }, | ||
9075 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7881, AHC_AIC7880, | ||
9076 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 15, | ||
9077 | 32, C46 }, | ||
9078 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7882, AHC_AIC7880, | ||
9079 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9080 | AHC_AIC7880_FE, 16, | ||
9081 | 32, C56_66 }, | ||
9082 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7883, AHC_AIC7880, | ||
9083 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9084 | AHC_AIC7880_FE, 17, | ||
9085 | 32, C56_66 }, | ||
9086 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7884, AHC_AIC7880, | ||
9087 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18, | ||
9088 | 32, C46 }, | ||
9089 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7885, AHC_AIC7880, | ||
9090 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18, | ||
9091 | 32, C46 }, | ||
9092 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7886, AHC_AIC7880, | ||
9093 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18, | ||
9094 | 32, C46 }, | ||
9095 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7887, AHC_AIC7880, | ||
9096 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE | AHC_NEW_AUTOTERM, 19, | ||
9097 | 32, C46 }, | ||
9098 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7888, AHC_AIC7880, | ||
9099 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18, | ||
9100 | 32, C46 }, | ||
9101 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7895, AHC_AIC7895, | ||
9102 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9103 | AHC_AIC7895_FE, 20, | ||
9104 | 32, C56_66 }, | ||
9105 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890, AHC_AIC7890, | ||
9106 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9107 | AHC_AIC7890_FE, 21, | ||
9108 | 32, C46 }, | ||
9109 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890B, AHC_AIC7890, | ||
9110 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9111 | AHC_AIC7890_FE, 21, | ||
9112 | 32, C46 }, | ||
9113 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2930U2, AHC_AIC7890, | ||
9114 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9115 | AHC_AIC7890_FE, 22, | ||
9116 | 32, C46 }, | ||
9117 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2940U2, AHC_AIC7890, | ||
9118 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9119 | AHC_AIC7890_FE, 23, | ||
9120 | 32, C46 }, | ||
9121 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7896, AHC_AIC7896, | ||
9122 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9123 | AHC_AIC7896_FE, 24, | ||
9124 | 32, C56_66 }, | ||
9125 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3940U2, AHC_AIC7896, | ||
9126 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9127 | AHC_AIC7896_FE, 25, | ||
9128 | 32, C56_66 }, | ||
9129 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3950U2D, AHC_AIC7896, | ||
9130 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9131 | AHC_AIC7896_FE, 26, | ||
9132 | 32, C56_66 }, | ||
9133 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_1480A, AHC_AIC7860, | ||
9134 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_NO_STPWEN, | ||
9135 | AHC_AIC7860_FE, 27, | ||
9136 | 32, C46 }, | ||
9137 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892A, AHC_AIC7892, | ||
9138 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9139 | AHC_AIC7892_FE, 28, | ||
9140 | 32, C46 }, | ||
9141 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892B, AHC_AIC7892, | ||
9142 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9143 | AHC_AIC7892_FE, 28, | ||
9144 | 32, C46 }, | ||
9145 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892D, AHC_AIC7892, | ||
9146 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9147 | AHC_AIC7892_FE, 28, | ||
9148 | 32, C46 }, | ||
9149 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892P, AHC_AIC7892, | ||
9150 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, | ||
9151 | AHC_AIC7892_FE, 28, | ||
9152 | 32, C46 }, | ||
9153 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899A, AHC_AIC7899, | ||
9154 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9155 | AHC_AIC7899_FE, 29, | ||
9156 | 32, C56_66 }, | ||
9157 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899B, AHC_AIC7899, | ||
9158 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9159 | AHC_AIC7899_FE, 29, | ||
9160 | 32, C56_66 }, | ||
9161 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899D, AHC_AIC7899, | ||
9162 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9163 | AHC_AIC7899_FE, 29, | ||
9164 | 32, C56_66 }, | ||
9165 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899P, AHC_AIC7899, | ||
9166 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, | ||
9167 | AHC_AIC7899_FE, 29, | ||
9168 | 32, C56_66 }, | ||
9169 | }; | ||
9170 | |||
9171 | unsigned short command; | ||
9172 | unsigned int devconfig, i, oldverbose; | ||
9173 | struct pci_dev *pdev = NULL; | ||
9174 | |||
9175 | for (i = 0; i < ARRAY_SIZE(aic_pdevs); i++) | ||
9176 | { | ||
9177 | pdev = NULL; | ||
9178 | while ((pdev = pci_get_device(aic_pdevs[i].vendor_id, | ||
9179 | aic_pdevs[i].device_id, | ||
9180 | pdev))) { | ||
9181 | if (pci_enable_device(pdev)) | ||
9182 | continue; | ||
9183 | if ( i == 0 ) /* We found one, but it's the 7810 RAID cont. */ | ||
9184 | { | ||
9185 | if (aic7xxx_verbose & (VERBOSE_PROBE|VERBOSE_PROBE2)) | ||
9186 | { | ||
9187 | printk(KERN_INFO "aic7xxx: The 7810 RAID controller is not " | ||
9188 | "supported by\n"); | ||
9189 | printk(KERN_INFO " this driver, we are ignoring it.\n"); | ||
9190 | } | ||
9191 | } | ||
9192 | else if ( (temp_p = kzalloc(sizeof(struct aic7xxx_host), | ||
9193 | GFP_ATOMIC)) != NULL ) | ||
9194 | { | ||
9195 | temp_p->chip = aic_pdevs[i].chip | AHC_PCI; | ||
9196 | temp_p->flags = aic_pdevs[i].flags; | ||
9197 | temp_p->features = aic_pdevs[i].features; | ||
9198 | temp_p->board_name_index = aic_pdevs[i].board_name_index; | ||
9199 | temp_p->sc_size = aic_pdevs[i].seeprom_size; | ||
9200 | temp_p->sc_type = aic_pdevs[i].seeprom_type; | ||
9201 | |||
9202 | /* | ||
9203 | * Read sundry information from PCI BIOS. | ||
9204 | */ | ||
9205 | temp_p->irq = pdev->irq; | ||
9206 | temp_p->pdev = pdev; | ||
9207 | temp_p->pci_bus = pdev->bus->number; | ||
9208 | temp_p->pci_device_fn = pdev->devfn; | ||
9209 | temp_p->base = pci_resource_start(pdev, 0); | ||
9210 | temp_p->mbase = pci_resource_start(pdev, 1); | ||
9211 | current_p = list_p; | ||
9212 | while(current_p && temp_p) | ||
9213 | { | ||
9214 | if ( ((current_p->pci_bus == temp_p->pci_bus) && | ||
9215 | (current_p->pci_device_fn == temp_p->pci_device_fn)) || | ||
9216 | (temp_p->base && (current_p->base == temp_p->base)) || | ||
9217 | (temp_p->mbase && (current_p->mbase == temp_p->mbase)) ) | ||
9218 | { | ||
9219 | /* duplicate PCI entry, skip it */ | ||
9220 | kfree(temp_p); | ||
9221 | temp_p = NULL; | ||
9222 | continue; | ||
9223 | } | ||
9224 | current_p = current_p->next; | ||
9225 | } | ||
9226 | if(pci_request_regions(temp_p->pdev, "aic7xxx")) | ||
9227 | { | ||
9228 | printk("aic7xxx: <%s> at PCI %d/%d/%d\n", | ||
9229 | board_names[aic_pdevs[i].board_name_index], | ||
9230 | temp_p->pci_bus, | ||
9231 | PCI_SLOT(temp_p->pci_device_fn), | ||
9232 | PCI_FUNC(temp_p->pci_device_fn)); | ||
9233 | printk("aic7xxx: I/O ports already in use, ignoring.\n"); | ||
9234 | kfree(temp_p); | ||
9235 | continue; | ||
9236 | } | ||
9237 | |||
9238 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
9239 | printk("aic7xxx: <%s> at PCI %d/%d\n", | ||
9240 | board_names[aic_pdevs[i].board_name_index], | ||
9241 | PCI_SLOT(pdev->devfn), | ||
9242 | PCI_FUNC(pdev->devfn)); | ||
9243 | pci_read_config_word(pdev, PCI_COMMAND, &command); | ||
9244 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
9245 | { | ||
9246 | printk("aic7xxx: Initial PCI_COMMAND value was 0x%x\n", | ||
9247 | (int)command); | ||
9248 | } | ||
9249 | #ifdef AIC7XXX_STRICT_PCI_SETUP | ||
9250 | command |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | | ||
9251 | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; | ||
9252 | #else | ||
9253 | command |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; | ||
9254 | #endif | ||
9255 | command &= ~PCI_COMMAND_INVALIDATE; | ||
9256 | if (aic7xxx_pci_parity == 0) | ||
9257 | command &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY); | ||
9258 | pci_write_config_word(pdev, PCI_COMMAND, command); | ||
9259 | #ifdef AIC7XXX_STRICT_PCI_SETUP | ||
9260 | pci_read_config_dword(pdev, DEVCONFIG, &devconfig); | ||
9261 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
9262 | { | ||
9263 | printk("aic7xxx: Initial DEVCONFIG value was 0x%x\n", devconfig); | ||
9264 | } | ||
9265 | devconfig |= 0x80000040; | ||
9266 | pci_write_config_dword(pdev, DEVCONFIG, devconfig); | ||
9267 | #endif /* AIC7XXX_STRICT_PCI_SETUP */ | ||
9268 | |||
9269 | temp_p->unpause = INTEN; | ||
9270 | temp_p->pause = temp_p->unpause | PAUSE; | ||
9271 | if ( ((temp_p->base == 0) && | ||
9272 | (temp_p->mbase == 0)) || | ||
9273 | (temp_p->irq == 0) ) | ||
9274 | { | ||
9275 | printk("aic7xxx: <%s> at PCI %d/%d/%d\n", | ||
9276 | board_names[aic_pdevs[i].board_name_index], | ||
9277 | temp_p->pci_bus, | ||
9278 | PCI_SLOT(temp_p->pci_device_fn), | ||
9279 | PCI_FUNC(temp_p->pci_device_fn)); | ||
9280 | printk("aic7xxx: Controller disabled by BIOS, ignoring.\n"); | ||
9281 | goto skip_pci_controller; | ||
9282 | } | ||
9283 | |||
9284 | #ifdef MMAPIO | ||
9285 | if ( !(temp_p->base) || !(temp_p->flags & AHC_MULTI_CHANNEL) || | ||
9286 | ((temp_p->chip != (AHC_AIC7870 | AHC_PCI)) && | ||
9287 | (temp_p->chip != (AHC_AIC7880 | AHC_PCI))) ) | ||
9288 | { | ||
9289 | temp_p->maddr = ioremap_nocache(temp_p->mbase, 256); | ||
9290 | if(temp_p->maddr) | ||
9291 | { | ||
9292 | /* | ||
9293 | * We need to check the I/O with the MMAPed address. Some machines | ||
9294 | * simply fail to work with MMAPed I/O and certain controllers. | ||
9295 | */ | ||
9296 | if(aic_inb(temp_p, HCNTRL) == 0xff) | ||
9297 | { | ||
9298 | /* | ||
9299 | * OK.....we failed our test....go back to programmed I/O | ||
9300 | */ | ||
9301 | printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n", | ||
9302 | board_names[aic_pdevs[i].board_name_index], | ||
9303 | temp_p->pci_bus, | ||
9304 | PCI_SLOT(temp_p->pci_device_fn), | ||
9305 | PCI_FUNC(temp_p->pci_device_fn)); | ||
9306 | printk(KERN_INFO "aic7xxx: MMAPed I/O failed, reverting to " | ||
9307 | "Programmed I/O.\n"); | ||
9308 | iounmap(temp_p->maddr); | ||
9309 | temp_p->maddr = NULL; | ||
9310 | if(temp_p->base == 0) | ||
9311 | { | ||
9312 | printk("aic7xxx: <%s> at PCI %d/%d/%d\n", | ||
9313 | board_names[aic_pdevs[i].board_name_index], | ||
9314 | temp_p->pci_bus, | ||
9315 | PCI_SLOT(temp_p->pci_device_fn), | ||
9316 | PCI_FUNC(temp_p->pci_device_fn)); | ||
9317 | printk("aic7xxx: Controller disabled by BIOS, ignoring.\n"); | ||
9318 | goto skip_pci_controller; | ||
9319 | } | ||
9320 | } | ||
9321 | } | ||
9322 | } | ||
9323 | #endif | ||
9324 | |||
9325 | /* | ||
9326 | * We HAVE to make sure the first pause_sequencer() and all other | ||
9327 | * subsequent I/O that isn't PCI config space I/O takes place | ||
9328 | * after the MMAPed I/O region is configured and tested. The | ||
9329 | * problem is the PowerPC architecture that doesn't support | ||
9330 | * programmed I/O at all, so we have to have the MMAP I/O set up | ||
9331 | * for this pause to even work on those machines. | ||
9332 | */ | ||
9333 | pause_sequencer(temp_p); | ||
9334 | |||
9335 | /* | ||
9336 | * Clear out any pending PCI error status messages. Also set | ||
9337 | * verbose to 0 so that we don't emit strange PCI error messages | ||
9338 | * while cleaning out the current status bits. | ||
9339 | */ | ||
9340 | oldverbose = aic7xxx_verbose; | ||
9341 | aic7xxx_verbose = 0; | ||
9342 | aic7xxx_pci_intr(temp_p); | ||
9343 | aic7xxx_verbose = oldverbose; | ||
9344 | |||
9345 | temp_p->bios_address = 0; | ||
9346 | |||
9347 | /* | ||
9348 | * Remember how the card was setup in case there is no seeprom. | ||
9349 | */ | ||
9350 | if (temp_p->features & AHC_ULTRA2) | ||
9351 | temp_p->scsi_id = aic_inb(temp_p, SCSIID_ULTRA2) & OID; | ||
9352 | else | ||
9353 | temp_p->scsi_id = aic_inb(temp_p, SCSIID) & OID; | ||
9354 | /* | ||
9355 | * Get current termination setting | ||
9356 | */ | ||
9357 | sxfrctl1 = aic_inb(temp_p, SXFRCTL1); | ||
9358 | |||
9359 | if (aic7xxx_chip_reset(temp_p) == -1) | ||
9360 | { | ||
9361 | goto skip_pci_controller; | ||
9362 | } | ||
9363 | /* | ||
9364 | * Very quickly put the term setting back into the register since | ||
9365 | * the chip reset may cause odd things to happen. This is to keep | ||
9366 | * LVD busses with lots of drives from draining the power out of | ||
9367 | * the diffsense line before we get around to running the | ||
9368 | * configure_termination() function. Also restore the STPWLEVEL | ||
9369 | * bit of DEVCONFIG | ||
9370 | */ | ||
9371 | aic_outb(temp_p, sxfrctl1, SXFRCTL1); | ||
9372 | pci_write_config_dword(temp_p->pdev, DEVCONFIG, devconfig); | ||
9373 | sxfrctl1 &= STPWEN; | ||
9374 | |||
9375 | /* | ||
9376 | * We need to set the CHNL? assignments before loading the SEEPROM | ||
9377 | * The 3940 and 3985 cards (original stuff, not any of the later | ||
9378 | * stuff) are 7870 and 7880 class chips. The Ultra2 stuff falls | ||
9379 | * under 7896 and 7897. The 7895 is in a class by itself :) | ||
9380 | */ | ||
9381 | switch (temp_p->chip & AHC_CHIPID_MASK) | ||
9382 | { | ||
9383 | case AHC_AIC7870: /* 3840 / 3985 */ | ||
9384 | case AHC_AIC7880: /* 3840 UW / 3985 UW */ | ||
9385 | if(temp_p->flags & AHC_MULTI_CHANNEL) | ||
9386 | { | ||
9387 | switch(PCI_SLOT(temp_p->pci_device_fn)) | ||
9388 | { | ||
9389 | case 5: | ||
9390 | temp_p->flags |= AHC_CHNLB; | ||
9391 | break; | ||
9392 | case 8: | ||
9393 | temp_p->flags |= AHC_CHNLB; | ||
9394 | break; | ||
9395 | case 12: | ||
9396 | temp_p->flags |= AHC_CHNLC; | ||
9397 | break; | ||
9398 | default: | ||
9399 | break; | ||
9400 | } | ||
9401 | } | ||
9402 | break; | ||
9403 | |||
9404 | case AHC_AIC7895: /* 7895 */ | ||
9405 | case AHC_AIC7896: /* 7896/7 */ | ||
9406 | case AHC_AIC7899: /* 7899 */ | ||
9407 | if (PCI_FUNC(pdev->devfn) != 0) | ||
9408 | { | ||
9409 | temp_p->flags |= AHC_CHNLB; | ||
9410 | } | ||
9411 | /* | ||
9412 | * The 7895 is the only chipset that sets the SCBSIZE32 param | ||
9413 | * in the DEVCONFIG register. The Ultra2 chipsets use | ||
9414 | * the DSCOMMAND0 register instead. | ||
9415 | */ | ||
9416 | if ((temp_p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) | ||
9417 | { | ||
9418 | pci_read_config_dword(pdev, DEVCONFIG, &devconfig); | ||
9419 | devconfig |= SCBSIZE32; | ||
9420 | pci_write_config_dword(pdev, DEVCONFIG, devconfig); | ||
9421 | } | ||
9422 | break; | ||
9423 | default: | ||
9424 | break; | ||
9425 | } | ||
9426 | |||
9427 | /* | ||
9428 | * Loading of the SEEPROM needs to come after we've set the flags | ||
9429 | * to indicate possible CHNLB and CHNLC assigments. Otherwise, | ||
9430 | * on 394x and 398x cards we'll end up reading the wrong settings | ||
9431 | * for channels B and C | ||
9432 | */ | ||
9433 | switch (temp_p->chip & AHC_CHIPID_MASK) | ||
9434 | { | ||
9435 | case AHC_AIC7892: | ||
9436 | case AHC_AIC7899: | ||
9437 | aic_outb(temp_p, 0, SCAMCTL); | ||
9438 | /* | ||
9439 | * Switch to the alt mode of the chip... | ||
9440 | */ | ||
9441 | aic_outb(temp_p, aic_inb(temp_p, SFUNCT) | ALT_MODE, SFUNCT); | ||
9442 | /* | ||
9443 | * Set our options...the last two items set our CRC after x byte | ||
9444 | * count in target mode... | ||
9445 | */ | ||
9446 | aic_outb(temp_p, AUTO_MSGOUT_DE | DIS_MSGIN_DUALEDGE, OPTIONMODE); | ||
9447 | aic_outb(temp_p, 0x00, 0x0b); | ||
9448 | aic_outb(temp_p, 0x10, 0x0a); | ||
9449 | /* | ||
9450 | * switch back to normal mode... | ||
9451 | */ | ||
9452 | aic_outb(temp_p, aic_inb(temp_p, SFUNCT) & ~ALT_MODE, SFUNCT); | ||
9453 | aic_outb(temp_p, CRCVALCHKEN | CRCENDCHKEN | CRCREQCHKEN | | ||
9454 | TARGCRCENDEN | TARGCRCCNTEN, | ||
9455 | CRCCONTROL1); | ||
9456 | aic_outb(temp_p, ((aic_inb(temp_p, DSCOMMAND0) | USCBSIZE32 | | ||
9457 | MPARCKEN | CIOPARCKEN | CACHETHEN) & | ||
9458 | ~DPARCKEN), DSCOMMAND0); | ||
9459 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); | ||
9460 | break; | ||
9461 | case AHC_AIC7890: | ||
9462 | case AHC_AIC7896: | ||
9463 | aic_outb(temp_p, 0, SCAMCTL); | ||
9464 | aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) | | ||
9465 | CACHETHEN | MPARCKEN | USCBSIZE32 | | ||
9466 | CIOPARCKEN) & ~DPARCKEN, DSCOMMAND0); | ||
9467 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); | ||
9468 | break; | ||
9469 | case AHC_AIC7850: | ||
9470 | case AHC_AIC7860: | ||
9471 | /* | ||
9472 | * Set the DSCOMMAND0 register on these cards different from | ||
9473 | * on the 789x cards. Also, read the SEEPROM as well. | ||
9474 | */ | ||
9475 | aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) | | ||
9476 | CACHETHEN | MPARCKEN) & ~DPARCKEN, | ||
9477 | DSCOMMAND0); | ||
9478 | /* FALLTHROUGH */ | ||
9479 | default: | ||
9480 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); | ||
9481 | break; | ||
9482 | case AHC_AIC7880: | ||
9483 | /* | ||
9484 | * Check the rev of the chipset before we change DSCOMMAND0 | ||
9485 | */ | ||
9486 | pci_read_config_dword(pdev, DEVCONFIG, &devconfig); | ||
9487 | if ((devconfig & 0xff) >= 1) | ||
9488 | { | ||
9489 | aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) | | ||
9490 | CACHETHEN | MPARCKEN) & ~DPARCKEN, | ||
9491 | DSCOMMAND0); | ||
9492 | } | ||
9493 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); | ||
9494 | break; | ||
9495 | } | ||
9496 | |||
9497 | |||
9498 | /* | ||
9499 | * and then we need another switch based on the type in order to | ||
9500 | * make sure the channel B primary flag is set properly on 7895 | ||
9501 | * controllers....Arrrgggghhh!!! We also have to catch the fact | ||
9502 | * that when you disable the BIOS on the 7895 on the Intel DK440LX | ||
9503 | * motherboard, and possibly others, it only sets the BIOS disabled | ||
9504 | * bit on the A channel...I think I'm starting to lean towards | ||
9505 | * going postal.... | ||
9506 | */ | ||
9507 | switch(temp_p->chip & AHC_CHIPID_MASK) | ||
9508 | { | ||
9509 | case AHC_AIC7895: | ||
9510 | case AHC_AIC7896: | ||
9511 | case AHC_AIC7899: | ||
9512 | current_p = list_p; | ||
9513 | while(current_p != NULL) | ||
9514 | { | ||
9515 | if ( (current_p->pci_bus == temp_p->pci_bus) && | ||
9516 | (PCI_SLOT(current_p->pci_device_fn) == | ||
9517 | PCI_SLOT(temp_p->pci_device_fn)) ) | ||
9518 | { | ||
9519 | if ( PCI_FUNC(current_p->pci_device_fn) == 0 ) | ||
9520 | { | ||
9521 | temp_p->flags |= | ||
9522 | (current_p->flags & AHC_CHANNEL_B_PRIMARY); | ||
9523 | temp_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS); | ||
9524 | temp_p->flags |= | ||
9525 | (current_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS)); | ||
9526 | } | ||
9527 | else | ||
9528 | { | ||
9529 | current_p->flags |= | ||
9530 | (temp_p->flags & AHC_CHANNEL_B_PRIMARY); | ||
9531 | current_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS); | ||
9532 | current_p->flags |= | ||
9533 | (temp_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS)); | ||
9534 | } | ||
9535 | } | ||
9536 | current_p = current_p->next; | ||
9537 | } | ||
9538 | break; | ||
9539 | default: | ||
9540 | break; | ||
9541 | } | ||
9542 | |||
9543 | /* | ||
9544 | * We only support external SCB RAM on the 7895/6/7 chipsets. | ||
9545 | * We could support it on the 7890/1 easy enough, but I don't | ||
9546 | * know of any 7890/1 based cards that have it. I do know | ||
9547 | * of 7895/6/7 cards that have it and they work properly. | ||
9548 | */ | ||
9549 | switch(temp_p->chip & AHC_CHIPID_MASK) | ||
9550 | { | ||
9551 | default: | ||
9552 | break; | ||
9553 | case AHC_AIC7895: | ||
9554 | case AHC_AIC7896: | ||
9555 | case AHC_AIC7899: | ||
9556 | pci_read_config_dword(pdev, DEVCONFIG, &devconfig); | ||
9557 | if (temp_p->features & AHC_ULTRA2) | ||
9558 | { | ||
9559 | if ( (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2) && | ||
9560 | (aic7xxx_scbram) ) | ||
9561 | { | ||
9562 | aic_outb(temp_p, | ||
9563 | aic_inb(temp_p, DSCOMMAND0) & ~SCBRAMSEL_ULTRA2, | ||
9564 | DSCOMMAND0); | ||
9565 | temp_p->flags |= AHC_EXTERNAL_SRAM; | ||
9566 | devconfig |= EXTSCBPEN; | ||
9567 | } | ||
9568 | else if (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2) | ||
9569 | { | ||
9570 | printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n", | ||
9571 | board_names[aic_pdevs[i].board_name_index], | ||
9572 | temp_p->pci_bus, | ||
9573 | PCI_SLOT(temp_p->pci_device_fn), | ||
9574 | PCI_FUNC(temp_p->pci_device_fn)); | ||
9575 | printk("aic7xxx: external SCB RAM detected, " | ||
9576 | "but not enabled\n"); | ||
9577 | } | ||
9578 | } | ||
9579 | else | ||
9580 | { | ||
9581 | if ((devconfig & RAMPSM) && (aic7xxx_scbram)) | ||
9582 | { | ||
9583 | devconfig &= ~SCBRAMSEL; | ||
9584 | devconfig |= EXTSCBPEN; | ||
9585 | temp_p->flags |= AHC_EXTERNAL_SRAM; | ||
9586 | } | ||
9587 | else if (devconfig & RAMPSM) | ||
9588 | { | ||
9589 | printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n", | ||
9590 | board_names[aic_pdevs[i].board_name_index], | ||
9591 | temp_p->pci_bus, | ||
9592 | PCI_SLOT(temp_p->pci_device_fn), | ||
9593 | PCI_FUNC(temp_p->pci_device_fn)); | ||
9594 | printk("aic7xxx: external SCB RAM detected, " | ||
9595 | "but not enabled\n"); | ||
9596 | } | ||
9597 | } | ||
9598 | pci_write_config_dword(pdev, DEVCONFIG, devconfig); | ||
9599 | if ( (temp_p->flags & AHC_EXTERNAL_SRAM) && | ||
9600 | (temp_p->flags & AHC_CHNLB) ) | ||
9601 | aic_outb(temp_p, 1, CCSCBBADDR); | ||
9602 | break; | ||
9603 | } | ||
9604 | |||
9605 | /* | ||
9606 | * Take the LED out of diagnostic mode | ||
9607 | */ | ||
9608 | aic_outb(temp_p, | ||
9609 | (aic_inb(temp_p, SBLKCTL) & ~(DIAGLEDEN | DIAGLEDON)), | ||
9610 | SBLKCTL); | ||
9611 | |||
9612 | /* | ||
9613 | * We don't know where this is set in the SEEPROM or by the | ||
9614 | * BIOS, so we default to 100%. On Ultra2 controllers, use 75% | ||
9615 | * instead. | ||
9616 | */ | ||
9617 | if (temp_p->features & AHC_ULTRA2) | ||
9618 | { | ||
9619 | aic_outb(temp_p, RD_DFTHRSH_MAX | WR_DFTHRSH_MAX, DFF_THRSH); | ||
9620 | } | ||
9621 | else | ||
9622 | { | ||
9623 | aic_outb(temp_p, DFTHRSH_100, DSPCISTATUS); | ||
9624 | } | ||
9625 | |||
9626 | /* | ||
9627 | * Call our function to fixup any bugs that exist on this chipset. | ||
9628 | * This may muck with PCI settings and other device settings, so | ||
9629 | * make sure it's after all the other PCI and device register | ||
9630 | * tweaks so it can back out bad settings on specific broken cards. | ||
9631 | */ | ||
9632 | aic7xxx_configure_bugs(temp_p); | ||
9633 | |||
9634 | /* Hold a pci device reference */ | ||
9635 | pci_dev_get(temp_p->pdev); | ||
9636 | |||
9637 | if ( list_p == NULL ) | ||
9638 | { | ||
9639 | list_p = current_p = temp_p; | ||
9640 | } | ||
9641 | else | ||
9642 | { | ||
9643 | current_p = list_p; | ||
9644 | while(current_p->next != NULL) | ||
9645 | current_p = current_p->next; | ||
9646 | current_p->next = temp_p; | ||
9647 | } | ||
9648 | temp_p->next = NULL; | ||
9649 | found++; | ||
9650 | continue; | ||
9651 | skip_pci_controller: | ||
9652 | #ifdef CONFIG_PCI | ||
9653 | pci_release_regions(temp_p->pdev); | ||
9654 | #endif | ||
9655 | kfree(temp_p); | ||
9656 | } /* Found an Adaptec PCI device. */ | ||
9657 | else /* Well, we found one, but we couldn't get any memory */ | ||
9658 | { | ||
9659 | printk("aic7xxx: Found <%s>\n", | ||
9660 | board_names[aic_pdevs[i].board_name_index]); | ||
9661 | printk(KERN_INFO "aic7xxx: Unable to allocate device memory, " | ||
9662 | "skipping.\n"); | ||
9663 | } | ||
9664 | } /* while(pdev=....) */ | ||
9665 | } /* for PCI_DEVICES */ | ||
9666 | } | ||
9667 | #endif /* CONFIG_PCI */ | ||
9668 | |||
9669 | #if defined(__i386__) || defined(__alpha__) | ||
9670 | /* | ||
9671 | * EISA/VL-bus card signature probe. | ||
9672 | */ | ||
9673 | slot = MINSLOT; | ||
9674 | while ( (slot <= MAXSLOT) && | ||
9675 | !(aic7xxx_no_probe) ) | ||
9676 | { | ||
9677 | base = SLOTBASE(slot) + MINREG; | ||
9678 | |||
9679 | if (!request_region(base, MAXREG - MINREG, "aic7xxx")) | ||
9680 | { | ||
9681 | /* | ||
9682 | * Some other driver has staked a | ||
9683 | * claim to this i/o region already. | ||
9684 | */ | ||
9685 | slot++; | ||
9686 | continue; /* back to the beginning of the for loop */ | ||
9687 | } | ||
9688 | flags = 0; | ||
9689 | type = aic7xxx_probe(slot, base + AHC_HID0, &flags); | ||
9690 | if (type == -1) | ||
9691 | { | ||
9692 | release_region(base, MAXREG - MINREG); | ||
9693 | slot++; | ||
9694 | continue; | ||
9695 | } | ||
9696 | temp_p = kmalloc(sizeof(struct aic7xxx_host), GFP_ATOMIC); | ||
9697 | if (temp_p == NULL) | ||
9698 | { | ||
9699 | printk(KERN_WARNING "aic7xxx: Unable to allocate device space.\n"); | ||
9700 | release_region(base, MAXREG - MINREG); | ||
9701 | slot++; | ||
9702 | continue; /* back to the beginning of the while loop */ | ||
9703 | } | ||
9704 | |||
9705 | /* | ||
9706 | * Pause the card preserving the IRQ type. Allow the operator | ||
9707 | * to override the IRQ trigger. | ||
9708 | */ | ||
9709 | if (aic7xxx_irq_trigger == 1) | ||
9710 | hcntrl = IRQMS; /* Level */ | ||
9711 | else if (aic7xxx_irq_trigger == 0) | ||
9712 | hcntrl = 0; /* Edge */ | ||
9713 | else | ||
9714 | hcntrl = inb(base + HCNTRL) & IRQMS; /* Default */ | ||
9715 | memset(temp_p, 0, sizeof(struct aic7xxx_host)); | ||
9716 | temp_p->unpause = hcntrl | INTEN; | ||
9717 | temp_p->pause = hcntrl | PAUSE | INTEN; | ||
9718 | temp_p->base = base; | ||
9719 | temp_p->mbase = 0; | ||
9720 | temp_p->maddr = NULL; | ||
9721 | temp_p->pci_bus = 0; | ||
9722 | temp_p->pci_device_fn = slot; | ||
9723 | aic_outb(temp_p, hcntrl | PAUSE, HCNTRL); | ||
9724 | while( (aic_inb(temp_p, HCNTRL) & PAUSE) == 0 ) ; | ||
9725 | if (aic7xxx_chip_reset(temp_p) == -1) | ||
9726 | temp_p->irq = 0; | ||
9727 | else | ||
9728 | temp_p->irq = aic_inb(temp_p, INTDEF) & 0x0F; | ||
9729 | temp_p->flags |= AHC_PAGESCBS; | ||
9730 | |||
9731 | switch (temp_p->irq) | ||
9732 | { | ||
9733 | case 9: | ||
9734 | case 10: | ||
9735 | case 11: | ||
9736 | case 12: | ||
9737 | case 14: | ||
9738 | case 15: | ||
9739 | break; | ||
9740 | |||
9741 | default: | ||
9742 | printk(KERN_WARNING "aic7xxx: Host adapter uses unsupported IRQ " | ||
9743 | "level %d, ignoring.\n", temp_p->irq); | ||
9744 | kfree(temp_p); | ||
9745 | release_region(base, MAXREG - MINREG); | ||
9746 | slot++; | ||
9747 | continue; /* back to the beginning of the while loop */ | ||
9748 | } | ||
9749 | |||
9750 | /* | ||
9751 | * We are committed now, everything has been checked and this card | ||
9752 | * has been found, now we just set it up | ||
9753 | */ | ||
9754 | |||
9755 | /* | ||
9756 | * Insert our new struct into the list at the end | ||
9757 | */ | ||
9758 | if (list_p == NULL) | ||
9759 | { | ||
9760 | list_p = current_p = temp_p; | ||
9761 | } | ||
9762 | else | ||
9763 | { | ||
9764 | current_p = list_p; | ||
9765 | while (current_p->next != NULL) | ||
9766 | current_p = current_p->next; | ||
9767 | current_p->next = temp_p; | ||
9768 | } | ||
9769 | |||
9770 | switch (type) | ||
9771 | { | ||
9772 | case 0: | ||
9773 | temp_p->board_name_index = 2; | ||
9774 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
9775 | printk("aic7xxx: <%s> at EISA %d\n", | ||
9776 | board_names[2], slot); | ||
9777 | /* FALLTHROUGH */ | ||
9778 | case 1: | ||
9779 | { | ||
9780 | temp_p->chip = AHC_AIC7770 | AHC_EISA; | ||
9781 | temp_p->features |= AHC_AIC7770_FE; | ||
9782 | temp_p->bios_control = aic_inb(temp_p, HA_274_BIOSCTRL); | ||
9783 | |||
9784 | /* | ||
9785 | * Get the primary channel information. Right now we don't | ||
9786 | * do anything with this, but someday we will be able to inform | ||
9787 | * the mid-level SCSI code which channel is primary. | ||
9788 | */ | ||
9789 | if (temp_p->board_name_index == 0) | ||
9790 | { | ||
9791 | temp_p->board_name_index = 3; | ||
9792 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
9793 | printk("aic7xxx: <%s> at EISA %d\n", | ||
9794 | board_names[3], slot); | ||
9795 | } | ||
9796 | if (temp_p->bios_control & CHANNEL_B_PRIMARY) | ||
9797 | { | ||
9798 | temp_p->flags |= AHC_CHANNEL_B_PRIMARY; | ||
9799 | } | ||
9800 | |||
9801 | if ((temp_p->bios_control & BIOSMODE) == BIOSDISABLED) | ||
9802 | { | ||
9803 | temp_p->flags &= ~AHC_BIOS_ENABLED; | ||
9804 | } | ||
9805 | else | ||
9806 | { | ||
9807 | temp_p->flags &= ~AHC_USEDEFAULTS; | ||
9808 | temp_p->flags |= AHC_BIOS_ENABLED; | ||
9809 | if ( (temp_p->bios_control & 0x20) == 0 ) | ||
9810 | { | ||
9811 | temp_p->bios_address = 0xcc000; | ||
9812 | temp_p->bios_address += (0x4000 * (temp_p->bios_control & 0x07)); | ||
9813 | } | ||
9814 | else | ||
9815 | { | ||
9816 | temp_p->bios_address = 0xd0000; | ||
9817 | temp_p->bios_address += (0x8000 * (temp_p->bios_control & 0x06)); | ||
9818 | } | ||
9819 | } | ||
9820 | temp_p->adapter_control = aic_inb(temp_p, SCSICONF) << 8; | ||
9821 | temp_p->adapter_control |= aic_inb(temp_p, SCSICONF + 1); | ||
9822 | if (temp_p->features & AHC_WIDE) | ||
9823 | { | ||
9824 | temp_p->scsi_id = temp_p->adapter_control & HWSCSIID; | ||
9825 | temp_p->scsi_id_b = temp_p->scsi_id; | ||
9826 | } | ||
9827 | else | ||
9828 | { | ||
9829 | temp_p->scsi_id = (temp_p->adapter_control >> 8) & HSCSIID; | ||
9830 | temp_p->scsi_id_b = temp_p->adapter_control & HSCSIID; | ||
9831 | } | ||
9832 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); | ||
9833 | break; | ||
9834 | } | ||
9835 | |||
9836 | case 2: | ||
9837 | case 3: | ||
9838 | temp_p->chip = AHC_AIC7770 | AHC_VL; | ||
9839 | temp_p->features |= AHC_AIC7770_FE; | ||
9840 | if (type == 2) | ||
9841 | temp_p->flags |= AHC_BIOS_ENABLED; | ||
9842 | else | ||
9843 | temp_p->flags &= ~AHC_BIOS_ENABLED; | ||
9844 | if (aic_inb(temp_p, SCSICONF) & TERM_ENB) | ||
9845 | sxfrctl1 = STPWEN; | ||
9846 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); | ||
9847 | temp_p->board_name_index = 4; | ||
9848 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
9849 | printk("aic7xxx: <%s> at VLB %d\n", | ||
9850 | board_names[2], slot); | ||
9851 | switch( aic_inb(temp_p, STATUS_2840) & BIOS_SEL ) | ||
9852 | { | ||
9853 | case 0x00: | ||
9854 | temp_p->bios_address = 0xe0000; | ||
9855 | break; | ||
9856 | case 0x20: | ||
9857 | temp_p->bios_address = 0xc8000; | ||
9858 | break; | ||
9859 | case 0x40: | ||
9860 | temp_p->bios_address = 0xd0000; | ||
9861 | break; | ||
9862 | case 0x60: | ||
9863 | temp_p->bios_address = 0xd8000; | ||
9864 | break; | ||
9865 | default: | ||
9866 | break; /* can't get here */ | ||
9867 | } | ||
9868 | break; | ||
9869 | |||
9870 | default: /* Won't get here. */ | ||
9871 | break; | ||
9872 | } | ||
9873 | if (aic7xxx_verbose & VERBOSE_PROBE2) | ||
9874 | { | ||
9875 | printk(KERN_INFO "aic7xxx: BIOS %sabled, IO Port 0x%lx, IRQ %d (%s)\n", | ||
9876 | (temp_p->flags & AHC_USEDEFAULTS) ? "dis" : "en", temp_p->base, | ||
9877 | temp_p->irq, | ||
9878 | (temp_p->pause & IRQMS) ? "level sensitive" : "edge triggered"); | ||
9879 | printk(KERN_INFO "aic7xxx: Extended translation %sabled.\n", | ||
9880 | (temp_p->flags & AHC_EXTEND_TRANS_A) ? "en" : "dis"); | ||
9881 | } | ||
9882 | |||
9883 | /* | ||
9884 | * All the 7770 based chipsets have this bug | ||
9885 | */ | ||
9886 | temp_p->bugs |= AHC_BUG_TMODE_WIDEODD; | ||
9887 | |||
9888 | /* | ||
9889 | * Set the FIFO threshold and the bus off time. | ||
9890 | */ | ||
9891 | hostconf = aic_inb(temp_p, HOSTCONF); | ||
9892 | aic_outb(temp_p, hostconf & DFTHRSH, BUSSPD); | ||
9893 | aic_outb(temp_p, (hostconf << 2) & BOFF, BUSTIME); | ||
9894 | slot++; | ||
9895 | found++; | ||
9896 | } | ||
9897 | |||
9898 | #endif /* defined(__i386__) || defined(__alpha__) */ | ||
9899 | |||
9900 | /* | ||
9901 | * Now, we re-order the probed devices by BIOS address and BUS class. | ||
9902 | * In general, we follow this algorithm to make the adapters show up | ||
9903 | * in the same order under linux that the computer finds them. | ||
9904 | * 1: All VLB/EISA cards with BIOS_ENABLED first, according to BIOS | ||
9905 | * address, going from lowest to highest. | ||
9906 | * 2: All PCI controllers with BIOS_ENABLED next, according to BIOS | ||
9907 | * address, going from lowest to highest. | ||
9908 | * 3: Remaining VLB/EISA controllers going in slot order. | ||
9909 | * 4: Remaining PCI controllers, going in PCI device order (reversible) | ||
9910 | */ | ||
9911 | |||
9912 | { | ||
9913 | struct aic7xxx_host *sort_list[4] = { NULL, NULL, NULL, NULL }; | ||
9914 | struct aic7xxx_host *vlb, *pci; | ||
9915 | struct aic7xxx_host *prev_p; | ||
9916 | struct aic7xxx_host *p; | ||
9917 | unsigned char left; | ||
9918 | |||
9919 | prev_p = vlb = pci = NULL; | ||
9920 | |||
9921 | temp_p = list_p; | ||
9922 | while (temp_p != NULL) | ||
9923 | { | ||
9924 | switch(temp_p->chip & ~AHC_CHIPID_MASK) | ||
9925 | { | ||
9926 | case AHC_EISA: | ||
9927 | case AHC_VL: | ||
9928 | { | ||
9929 | p = temp_p; | ||
9930 | if (p->flags & AHC_BIOS_ENABLED) | ||
9931 | vlb = sort_list[0]; | ||
9932 | else | ||
9933 | vlb = sort_list[2]; | ||
9934 | |||
9935 | if (vlb == NULL) | ||
9936 | { | ||
9937 | vlb = temp_p; | ||
9938 | temp_p = temp_p->next; | ||
9939 | vlb->next = NULL; | ||
9940 | } | ||
9941 | else | ||
9942 | { | ||
9943 | current_p = vlb; | ||
9944 | prev_p = NULL; | ||
9945 | while ( (current_p != NULL) && | ||
9946 | (current_p->bios_address < temp_p->bios_address)) | ||
9947 | { | ||
9948 | prev_p = current_p; | ||
9949 | current_p = current_p->next; | ||
9950 | } | ||
9951 | if (prev_p != NULL) | ||
9952 | { | ||
9953 | prev_p->next = temp_p; | ||
9954 | temp_p = temp_p->next; | ||
9955 | prev_p->next->next = current_p; | ||
9956 | } | ||
9957 | else | ||
9958 | { | ||
9959 | vlb = temp_p; | ||
9960 | temp_p = temp_p->next; | ||
9961 | vlb->next = current_p; | ||
9962 | } | ||
9963 | } | ||
9964 | |||
9965 | if (p->flags & AHC_BIOS_ENABLED) | ||
9966 | sort_list[0] = vlb; | ||
9967 | else | ||
9968 | sort_list[2] = vlb; | ||
9969 | |||
9970 | break; | ||
9971 | } | ||
9972 | default: /* All PCI controllers fall through to default */ | ||
9973 | { | ||
9974 | |||
9975 | p = temp_p; | ||
9976 | if (p->flags & AHC_BIOS_ENABLED) | ||
9977 | pci = sort_list[1]; | ||
9978 | else | ||
9979 | pci = sort_list[3]; | ||
9980 | |||
9981 | if (pci == NULL) | ||
9982 | { | ||
9983 | pci = temp_p; | ||
9984 | temp_p = temp_p->next; | ||
9985 | pci->next = NULL; | ||
9986 | } | ||
9987 | else | ||
9988 | { | ||
9989 | current_p = pci; | ||
9990 | prev_p = NULL; | ||
9991 | if (!aic7xxx_reverse_scan) | ||
9992 | { | ||
9993 | while ( (current_p != NULL) && | ||
9994 | ( (PCI_SLOT(current_p->pci_device_fn) | | ||
9995 | (current_p->pci_bus << 8)) < | ||
9996 | (PCI_SLOT(temp_p->pci_device_fn) | | ||
9997 | (temp_p->pci_bus << 8)) ) ) | ||
9998 | { | ||
9999 | prev_p = current_p; | ||
10000 | current_p = current_p->next; | ||
10001 | } | ||
10002 | } | ||
10003 | else | ||
10004 | { | ||
10005 | while ( (current_p != NULL) && | ||
10006 | ( (PCI_SLOT(current_p->pci_device_fn) | | ||
10007 | (current_p->pci_bus << 8)) > | ||
10008 | (PCI_SLOT(temp_p->pci_device_fn) | | ||
10009 | (temp_p->pci_bus << 8)) ) ) | ||
10010 | { | ||
10011 | prev_p = current_p; | ||
10012 | current_p = current_p->next; | ||
10013 | } | ||
10014 | } | ||
10015 | /* | ||
10016 | * Are we dealing with a 7895/6/7/9 where we need to sort the | ||
10017 | * channels as well, if so, the bios_address values should | ||
10018 | * be the same | ||
10019 | */ | ||
10020 | if ( (current_p) && (temp_p->flags & AHC_MULTI_CHANNEL) && | ||
10021 | (temp_p->pci_bus == current_p->pci_bus) && | ||
10022 | (PCI_SLOT(temp_p->pci_device_fn) == | ||
10023 | PCI_SLOT(current_p->pci_device_fn)) ) | ||
10024 | { | ||
10025 | if (temp_p->flags & AHC_CHNLB) | ||
10026 | { | ||
10027 | if ( !(temp_p->flags & AHC_CHANNEL_B_PRIMARY) ) | ||
10028 | { | ||
10029 | prev_p = current_p; | ||
10030 | current_p = current_p->next; | ||
10031 | } | ||
10032 | } | ||
10033 | else | ||
10034 | { | ||
10035 | if (temp_p->flags & AHC_CHANNEL_B_PRIMARY) | ||
10036 | { | ||
10037 | prev_p = current_p; | ||
10038 | current_p = current_p->next; | ||
10039 | } | ||
10040 | } | ||
10041 | } | ||
10042 | if (prev_p != NULL) | ||
10043 | { | ||
10044 | prev_p->next = temp_p; | ||
10045 | temp_p = temp_p->next; | ||
10046 | prev_p->next->next = current_p; | ||
10047 | } | ||
10048 | else | ||
10049 | { | ||
10050 | pci = temp_p; | ||
10051 | temp_p = temp_p->next; | ||
10052 | pci->next = current_p; | ||
10053 | } | ||
10054 | } | ||
10055 | |||
10056 | if (p->flags & AHC_BIOS_ENABLED) | ||
10057 | sort_list[1] = pci; | ||
10058 | else | ||
10059 | sort_list[3] = pci; | ||
10060 | |||
10061 | break; | ||
10062 | } | ||
10063 | } /* End of switch(temp_p->type) */ | ||
10064 | } /* End of while (temp_p != NULL) */ | ||
10065 | /* | ||
10066 | * At this point, the cards have been broken into 4 sorted lists, now | ||
10067 | * we run through the lists in order and register each controller | ||
10068 | */ | ||
10069 | { | ||
10070 | int i; | ||
10071 | |||
10072 | left = found; | ||
10073 | for (i=0; i<ARRAY_SIZE(sort_list); i++) | ||
10074 | { | ||
10075 | temp_p = sort_list[i]; | ||
10076 | while(temp_p != NULL) | ||
10077 | { | ||
10078 | template->name = board_names[temp_p->board_name_index]; | ||
10079 | p = aic7xxx_alloc(template, temp_p); | ||
10080 | if (p != NULL) | ||
10081 | { | ||
10082 | p->instance = found - left; | ||
10083 | if (aic7xxx_register(template, p, (--left)) == 0) | ||
10084 | { | ||
10085 | found--; | ||
10086 | aic7xxx_release(p->host); | ||
10087 | scsi_unregister(p->host); | ||
10088 | } | ||
10089 | else if (aic7xxx_dump_card) | ||
10090 | { | ||
10091 | pause_sequencer(p); | ||
10092 | aic7xxx_print_card(p); | ||
10093 | aic7xxx_print_scratch_ram(p); | ||
10094 | unpause_sequencer(p, TRUE); | ||
10095 | } | ||
10096 | } | ||
10097 | current_p = temp_p; | ||
10098 | temp_p = (struct aic7xxx_host *)temp_p->next; | ||
10099 | kfree(current_p); | ||
10100 | } | ||
10101 | } | ||
10102 | } | ||
10103 | } | ||
10104 | return (found); | ||
10105 | } | ||
10106 | |||
10107 | /*+F************************************************************************* | ||
10108 | * Function: | ||
10109 | * aic7xxx_buildscb | ||
10110 | * | ||
10111 | * Description: | ||
10112 | * Build a SCB. | ||
10113 | *-F*************************************************************************/ | ||
10114 | static void aic7xxx_buildscb(struct aic7xxx_host *p, struct scsi_cmnd *cmd, | ||
10115 | struct aic7xxx_scb *scb) | ||
10116 | { | ||
10117 | unsigned short mask; | ||
10118 | struct aic7xxx_hwscb *hscb; | ||
10119 | struct aic_dev_data *aic_dev = cmd->device->hostdata; | ||
10120 | struct scsi_device *sdptr = cmd->device; | ||
10121 | unsigned char tindex = TARGET_INDEX(cmd); | ||
10122 | int use_sg; | ||
10123 | |||
10124 | mask = (0x01 << tindex); | ||
10125 | hscb = scb->hscb; | ||
10126 | |||
10127 | /* | ||
10128 | * Setup the control byte if we need negotiation and have not | ||
10129 | * already requested it. | ||
10130 | */ | ||
10131 | hscb->control = 0; | ||
10132 | scb->tag_action = 0; | ||
10133 | |||
10134 | if (p->discenable & mask) | ||
10135 | { | ||
10136 | hscb->control |= DISCENB; | ||
10137 | /* We always force TEST_UNIT_READY to untagged */ | ||
10138 | if (cmd->cmnd[0] != TEST_UNIT_READY && sdptr->simple_tags) | ||
10139 | { | ||
10140 | hscb->control |= MSG_SIMPLE_Q_TAG; | ||
10141 | scb->tag_action = MSG_SIMPLE_Q_TAG; | ||
10142 | } | ||
10143 | } | ||
10144 | if ( !(aic_dev->dtr_pending) && | ||
10145 | (aic_dev->needppr || aic_dev->needwdtr || aic_dev->needsdtr) && | ||
10146 | (aic_dev->flags & DEVICE_DTR_SCANNED) ) | ||
10147 | { | ||
10148 | aic_dev->dtr_pending = 1; | ||
10149 | scb->tag_action = 0; | ||
10150 | hscb->control &= DISCENB; | ||
10151 | hscb->control |= MK_MESSAGE; | ||
10152 | if(aic_dev->needppr) | ||
10153 | { | ||
10154 | scb->flags |= SCB_MSGOUT_PPR; | ||
10155 | } | ||
10156 | else if(aic_dev->needwdtr) | ||
10157 | { | ||
10158 | scb->flags |= SCB_MSGOUT_WDTR; | ||
10159 | } | ||
10160 | else if(aic_dev->needsdtr) | ||
10161 | { | ||
10162 | scb->flags |= SCB_MSGOUT_SDTR; | ||
10163 | } | ||
10164 | scb->flags |= SCB_DTR_SCB; | ||
10165 | } | ||
10166 | hscb->target_channel_lun = ((cmd->device->id << 4) & 0xF0) | | ||
10167 | ((cmd->device->channel & 0x01) << 3) | (cmd->device->lun & 0x07); | ||
10168 | |||
10169 | /* | ||
10170 | * The interpretation of request_buffer and request_bufflen | ||
10171 | * changes depending on whether or not use_sg is zero; a | ||
10172 | * non-zero use_sg indicates the number of elements in the | ||
10173 | * scatter-gather array. | ||
10174 | */ | ||
10175 | |||
10176 | /* | ||
10177 | * XXX - this relies on the host data being stored in a | ||
10178 | * little-endian format. | ||
10179 | */ | ||
10180 | hscb->SCSI_cmd_length = cmd->cmd_len; | ||
10181 | memcpy(scb->cmnd, cmd->cmnd, cmd->cmd_len); | ||
10182 | hscb->SCSI_cmd_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, scb->cmnd)); | ||
10183 | |||
10184 | use_sg = scsi_dma_map(cmd); | ||
10185 | BUG_ON(use_sg < 0); | ||
10186 | |||
10187 | if (use_sg) { | ||
10188 | struct scatterlist *sg; /* Must be mid-level SCSI code scatterlist */ | ||
10189 | |||
10190 | /* | ||
10191 | * We must build an SG list in adapter format, as the kernel's SG list | ||
10192 | * cannot be used directly because of data field size (__alpha__) | ||
10193 | * differences and the kernel SG list uses virtual addresses where | ||
10194 | * we need physical addresses. | ||
10195 | */ | ||
10196 | int i; | ||
10197 | |||
10198 | scb->sg_length = 0; | ||
10199 | |||
10200 | |||
10201 | /* | ||
10202 | * Copy the segments into the SG array. NOTE!!! - We used to | ||
10203 | * have the first entry both in the data_pointer area and the first | ||
10204 | * SG element. That has changed somewhat. We still have the first | ||
10205 | * entry in both places, but now we download the address of | ||
10206 | * scb->sg_list[1] instead of 0 to the sg pointer in the hscb. | ||
10207 | */ | ||
10208 | scsi_for_each_sg(cmd, sg, use_sg, i) { | ||
10209 | unsigned int len = sg_dma_len(sg); | ||
10210 | scb->sg_list[i].address = cpu_to_le32(sg_dma_address(sg)); | ||
10211 | scb->sg_list[i].length = cpu_to_le32(len); | ||
10212 | scb->sg_length += len; | ||
10213 | } | ||
10214 | /* Copy the first SG into the data pointer area. */ | ||
10215 | hscb->data_pointer = scb->sg_list[0].address; | ||
10216 | hscb->data_count = scb->sg_list[0].length; | ||
10217 | scb->sg_count = i; | ||
10218 | hscb->SG_segment_count = i; | ||
10219 | hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[1])); | ||
10220 | } else { | ||
10221 | scb->sg_count = 0; | ||
10222 | scb->sg_length = 0; | ||
10223 | hscb->SG_segment_count = 0; | ||
10224 | hscb->SG_list_pointer = 0; | ||
10225 | hscb->data_count = 0; | ||
10226 | hscb->data_pointer = 0; | ||
10227 | } | ||
10228 | } | ||
10229 | |||
10230 | /*+F************************************************************************* | ||
10231 | * Function: | ||
10232 | * aic7xxx_queue | ||
10233 | * | ||
10234 | * Description: | ||
10235 | * Queue a SCB to the controller. | ||
10236 | *-F*************************************************************************/ | ||
10237 | static int aic7xxx_queue_lck(struct scsi_cmnd *cmd, void (*fn)(struct scsi_cmnd *)) | ||
10238 | { | ||
10239 | struct aic7xxx_host *p; | ||
10240 | struct aic7xxx_scb *scb; | ||
10241 | struct aic_dev_data *aic_dev; | ||
10242 | |||
10243 | p = (struct aic7xxx_host *) cmd->device->host->hostdata; | ||
10244 | |||
10245 | aic_dev = cmd->device->hostdata; | ||
10246 | #ifdef AIC7XXX_VERBOSE_DEBUGGING | ||
10247 | if (aic_dev->active_cmds > aic_dev->max_q_depth) | ||
10248 | { | ||
10249 | printk(WARN_LEAD "Commands queued exceeds queue " | ||
10250 | "depth, active=%d\n", | ||
10251 | p->host_no, CTL_OF_CMD(cmd), | ||
10252 | aic_dev->active_cmds); | ||
10253 | } | ||
10254 | #endif | ||
10255 | |||
10256 | scb = scbq_remove_head(&p->scb_data->free_scbs); | ||
10257 | if (scb == NULL) | ||
10258 | { | ||
10259 | aic7xxx_allocate_scb(p); | ||
10260 | scb = scbq_remove_head(&p->scb_data->free_scbs); | ||
10261 | if(scb == NULL) | ||
10262 | { | ||
10263 | printk(WARN_LEAD "Couldn't get a free SCB.\n", p->host_no, | ||
10264 | CTL_OF_CMD(cmd)); | ||
10265 | return 1; | ||
10266 | } | ||
10267 | } | ||
10268 | scb->cmd = cmd; | ||
10269 | |||
10270 | /* | ||
10271 | * Make sure the scsi_cmnd pointer is saved, the struct it points to | ||
10272 | * is set up properly, and the parity error flag is reset, then send | ||
10273 | * the SCB to the sequencer and watch the fun begin. | ||
10274 | */ | ||
10275 | aic7xxx_position(cmd) = scb->hscb->tag; | ||
10276 | cmd->scsi_done = fn; | ||
10277 | cmd->result = DID_OK; | ||
10278 | aic7xxx_error(cmd) = DID_OK; | ||
10279 | aic7xxx_status(cmd) = 0; | ||
10280 | cmd->host_scribble = NULL; | ||
10281 | |||
10282 | /* | ||
10283 | * Construct the SCB beforehand, so the sequencer is | ||
10284 | * paused a minimal amount of time. | ||
10285 | */ | ||
10286 | aic7xxx_buildscb(p, cmd, scb); | ||
10287 | |||
10288 | scb->flags |= SCB_ACTIVE | SCB_WAITINGQ; | ||
10289 | |||
10290 | scbq_insert_tail(&p->waiting_scbs, scb); | ||
10291 | aic7xxx_run_waiting_queues(p); | ||
10292 | return (0); | ||
10293 | } | ||
10294 | |||
10295 | static DEF_SCSI_QCMD(aic7xxx_queue) | ||
10296 | |||
10297 | /*+F************************************************************************* | ||
10298 | * Function: | ||
10299 | * aic7xxx_bus_device_reset | ||
10300 | * | ||
10301 | * Description: | ||
10302 | * Abort or reset the current SCSI command(s). If the scb has not | ||
10303 | * previously been aborted, then we attempt to send a BUS_DEVICE_RESET | ||
10304 | * message to the target. If the scb has previously been unsuccessfully | ||
10305 | * aborted, then we will reset the channel and have all devices renegotiate. | ||
10306 | * Returns an enumerated type that indicates the status of the operation. | ||
10307 | *-F*************************************************************************/ | ||
10308 | static int __aic7xxx_bus_device_reset(struct scsi_cmnd *cmd) | ||
10309 | { | ||
10310 | struct aic7xxx_host *p; | ||
10311 | struct aic7xxx_scb *scb; | ||
10312 | struct aic7xxx_hwscb *hscb; | ||
10313 | int channel; | ||
10314 | unsigned char saved_scbptr, lastphase; | ||
10315 | unsigned char hscb_index; | ||
10316 | int disconnected; | ||
10317 | struct aic_dev_data *aic_dev; | ||
10318 | |||
10319 | if(cmd == NULL) | ||
10320 | { | ||
10321 | printk(KERN_ERR "aic7xxx_bus_device_reset: called with NULL cmd!\n"); | ||
10322 | return FAILED; | ||
10323 | } | ||
10324 | p = (struct aic7xxx_host *)cmd->device->host->hostdata; | ||
10325 | aic_dev = AIC_DEV(cmd); | ||
10326 | if(aic7xxx_position(cmd) < p->scb_data->numscbs) | ||
10327 | scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]); | ||
10328 | else | ||
10329 | return FAILED; | ||
10330 | |||
10331 | hscb = scb->hscb; | ||
10332 | |||
10333 | aic7xxx_isr(p); | ||
10334 | aic7xxx_done_cmds_complete(p); | ||
10335 | /* If the command was already complete or just completed, then we didn't | ||
10336 | * do a reset, return FAILED */ | ||
10337 | if(!(scb->flags & SCB_ACTIVE)) | ||
10338 | return FAILED; | ||
10339 | |||
10340 | pause_sequencer(p); | ||
10341 | lastphase = aic_inb(p, LASTPHASE); | ||
10342 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) | ||
10343 | { | ||
10344 | printk(INFO_LEAD "Bus Device reset, scb flags 0x%x, ", | ||
10345 | p->host_no, CTL_OF_SCB(scb), scb->flags); | ||
10346 | switch (lastphase) | ||
10347 | { | ||
10348 | case P_DATAOUT: | ||
10349 | printk("Data-Out phase\n"); | ||
10350 | break; | ||
10351 | case P_DATAIN: | ||
10352 | printk("Data-In phase\n"); | ||
10353 | break; | ||
10354 | case P_COMMAND: | ||
10355 | printk("Command phase\n"); | ||
10356 | break; | ||
10357 | case P_MESGOUT: | ||
10358 | printk("Message-Out phase\n"); | ||
10359 | break; | ||
10360 | case P_STATUS: | ||
10361 | printk("Status phase\n"); | ||
10362 | break; | ||
10363 | case P_MESGIN: | ||
10364 | printk("Message-In phase\n"); | ||
10365 | break; | ||
10366 | default: | ||
10367 | /* | ||
10368 | * We're not in a valid phase, so assume we're idle. | ||
10369 | */ | ||
10370 | printk("while idle, LASTPHASE = 0x%x\n", lastphase); | ||
10371 | break; | ||
10372 | } | ||
10373 | printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 " | ||
10374 | "0x%x\n", p->host_no, CTL_OF_SCB(scb), | ||
10375 | aic_inb(p, SCSISIGI), | ||
10376 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), | ||
10377 | aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); | ||
10378 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n", p->host_no, | ||
10379 | CTL_OF_SCB(scb), | ||
10380 | (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0, | ||
10381 | aic_inb(p, SSTAT2), | ||
10382 | aic_inb(p, STCNT + 2) << 16 | aic_inb(p, STCNT + 1) << 8 | | ||
10383 | aic_inb(p, STCNT)); | ||
10384 | } | ||
10385 | |||
10386 | channel = cmd->device->channel; | ||
10387 | |||
10388 | /* | ||
10389 | * Send a Device Reset Message: | ||
10390 | * The target that is holding up the bus may not be the same as | ||
10391 | * the one that triggered this timeout (different commands have | ||
10392 | * different timeout lengths). Our strategy here is to queue an | ||
10393 | * abort message to the timed out target if it is disconnected. | ||
10394 | * Otherwise, if we have an active target we stuff the message buffer | ||
10395 | * with an abort message and assert ATN in the hopes that the target | ||
10396 | * will let go of the bus and go to the mesgout phase. If this | ||
10397 | * fails, we'll get another timeout a few seconds later which will | ||
10398 | * attempt a bus reset. | ||
10399 | */ | ||
10400 | saved_scbptr = aic_inb(p, SCBPTR); | ||
10401 | disconnected = FALSE; | ||
10402 | |||
10403 | if (lastphase != P_BUSFREE) | ||
10404 | { | ||
10405 | if (aic_inb(p, SCB_TAG) >= p->scb_data->numscbs) | ||
10406 | { | ||
10407 | printk(WARN_LEAD "Invalid SCB ID %d is active, " | ||
10408 | "SCB flags = 0x%x.\n", p->host_no, | ||
10409 | CTL_OF_CMD(cmd), scb->hscb->tag, scb->flags); | ||
10410 | unpause_sequencer(p, FALSE); | ||
10411 | return FAILED; | ||
10412 | } | ||
10413 | if (scb->hscb->tag == aic_inb(p, SCB_TAG)) | ||
10414 | { | ||
10415 | if ( (lastphase == P_MESGOUT) || (lastphase == P_MESGIN) ) | ||
10416 | { | ||
10417 | printk(WARN_LEAD "Device reset, Message buffer " | ||
10418 | "in use\n", p->host_no, CTL_OF_SCB(scb)); | ||
10419 | unpause_sequencer(p, FALSE); | ||
10420 | return FAILED; | ||
10421 | } | ||
10422 | |||
10423 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) | ||
10424 | printk(INFO_LEAD "Device reset message in " | ||
10425 | "message buffer\n", p->host_no, CTL_OF_SCB(scb)); | ||
10426 | scb->flags |= SCB_RESET | SCB_DEVICE_RESET; | ||
10427 | aic7xxx_error(cmd) = DID_RESET; | ||
10428 | aic_dev->flags |= BUS_DEVICE_RESET_PENDING; | ||
10429 | /* Send the abort message to the active SCB. */ | ||
10430 | aic_outb(p, HOST_MSG, MSG_OUT); | ||
10431 | aic_outb(p, lastphase | ATNO, SCSISIGO); | ||
10432 | unpause_sequencer(p, FALSE); | ||
10433 | spin_unlock_irq(p->host->host_lock); | ||
10434 | ssleep(1); | ||
10435 | spin_lock_irq(p->host->host_lock); | ||
10436 | if(aic_dev->flags & BUS_DEVICE_RESET_PENDING) | ||
10437 | return FAILED; | ||
10438 | else | ||
10439 | return SUCCESS; | ||
10440 | } | ||
10441 | } /* if (last_phase != P_BUSFREE).....indicates we are idle and can work */ | ||
10442 | /* | ||
10443 | * Simply set the MK_MESSAGE flag and the SEQINT handler will do | ||
10444 | * the rest on a reconnect/connect. | ||
10445 | */ | ||
10446 | scb->hscb->control |= MK_MESSAGE; | ||
10447 | scb->flags |= SCB_RESET | SCB_DEVICE_RESET; | ||
10448 | aic_dev->flags |= BUS_DEVICE_RESET_PENDING; | ||
10449 | /* | ||
10450 | * Check to see if the command is on the qinfifo. If it is, then we will | ||
10451 | * not need to queue the command again since the card should start it soon | ||
10452 | */ | ||
10453 | if (aic7xxx_search_qinfifo(p, cmd->device->channel, cmd->device->id, cmd->device->lun, hscb->tag, | ||
10454 | 0, TRUE, NULL) == 0) | ||
10455 | { | ||
10456 | disconnected = TRUE; | ||
10457 | if ((hscb_index = aic7xxx_find_scb(p, scb)) != SCB_LIST_NULL) | ||
10458 | { | ||
10459 | unsigned char scb_control; | ||
10460 | |||
10461 | aic_outb(p, hscb_index, SCBPTR); | ||
10462 | scb_control = aic_inb(p, SCB_CONTROL); | ||
10463 | /* | ||
10464 | * If the DISCONNECTED bit is not set in SCB_CONTROL, then we are | ||
10465 | * actually on the waiting list, not disconnected, and we don't | ||
10466 | * need to requeue the command. | ||
10467 | */ | ||
10468 | disconnected = (scb_control & DISCONNECTED); | ||
10469 | aic_outb(p, scb_control | MK_MESSAGE, SCB_CONTROL); | ||
10470 | } | ||
10471 | if (disconnected) | ||
10472 | { | ||
10473 | /* | ||
10474 | * Actually requeue this SCB in case we can select the | ||
10475 | * device before it reconnects. This can result in the command | ||
10476 | * being on the qinfifo twice, but we don't care because it will | ||
10477 | * all get cleaned up if/when the reset takes place. | ||
10478 | */ | ||
10479 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) | ||
10480 | printk(INFO_LEAD "Queueing device reset command.\n", p->host_no, | ||
10481 | CTL_OF_SCB(scb)); | ||
10482 | p->qinfifo[p->qinfifonext++] = scb->hscb->tag; | ||
10483 | if (p->features & AHC_QUEUE_REGS) | ||
10484 | aic_outb(p, p->qinfifonext, HNSCB_QOFF); | ||
10485 | else | ||
10486 | aic_outb(p, p->qinfifonext, KERNEL_QINPOS); | ||
10487 | scb->flags |= SCB_QUEUED_ABORT; | ||
10488 | } | ||
10489 | } | ||
10490 | aic_outb(p, saved_scbptr, SCBPTR); | ||
10491 | unpause_sequencer(p, FALSE); | ||
10492 | spin_unlock_irq(p->host->host_lock); | ||
10493 | msleep(1000/4); | ||
10494 | spin_lock_irq(p->host->host_lock); | ||
10495 | if(aic_dev->flags & BUS_DEVICE_RESET_PENDING) | ||
10496 | return FAILED; | ||
10497 | else | ||
10498 | return SUCCESS; | ||
10499 | } | ||
10500 | |||
10501 | static int aic7xxx_bus_device_reset(struct scsi_cmnd *cmd) | ||
10502 | { | ||
10503 | int rc; | ||
10504 | |||
10505 | spin_lock_irq(cmd->device->host->host_lock); | ||
10506 | rc = __aic7xxx_bus_device_reset(cmd); | ||
10507 | spin_unlock_irq(cmd->device->host->host_lock); | ||
10508 | |||
10509 | return rc; | ||
10510 | } | ||
10511 | |||
10512 | |||
10513 | /*+F************************************************************************* | ||
10514 | * Function: | ||
10515 | * aic7xxx_panic_abort | ||
10516 | * | ||
10517 | * Description: | ||
10518 | * Abort the current SCSI command(s). | ||
10519 | *-F*************************************************************************/ | ||
10520 | static void aic7xxx_panic_abort(struct aic7xxx_host *p, struct scsi_cmnd *cmd) | ||
10521 | { | ||
10522 | |||
10523 | printk("aic7xxx driver version %s\n", AIC7XXX_C_VERSION); | ||
10524 | printk("Controller type:\n %s\n", board_names[p->board_name_index]); | ||
10525 | printk("p->flags=0x%lx, p->chip=0x%x, p->features=0x%x, " | ||
10526 | "sequencer %s paused\n", | ||
10527 | p->flags, p->chip, p->features, | ||
10528 | (aic_inb(p, HCNTRL) & PAUSE) ? "is" : "isn't" ); | ||
10529 | pause_sequencer(p); | ||
10530 | disable_irq(p->irq); | ||
10531 | aic7xxx_print_card(p); | ||
10532 | aic7xxx_print_scratch_ram(p); | ||
10533 | spin_unlock_irq(p->host->host_lock); | ||
10534 | for(;;) barrier(); | ||
10535 | } | ||
10536 | |||
10537 | /*+F************************************************************************* | ||
10538 | * Function: | ||
10539 | * aic7xxx_abort | ||
10540 | * | ||
10541 | * Description: | ||
10542 | * Abort the current SCSI command(s). | ||
10543 | *-F*************************************************************************/ | ||
10544 | static int __aic7xxx_abort(struct scsi_cmnd *cmd) | ||
10545 | { | ||
10546 | struct aic7xxx_scb *scb = NULL; | ||
10547 | struct aic7xxx_host *p; | ||
10548 | int found=0, disconnected; | ||
10549 | unsigned char saved_hscbptr, hscbptr, scb_control; | ||
10550 | struct aic_dev_data *aic_dev; | ||
10551 | |||
10552 | if(cmd == NULL) | ||
10553 | { | ||
10554 | printk(KERN_ERR "aic7xxx_abort: called with NULL cmd!\n"); | ||
10555 | return FAILED; | ||
10556 | } | ||
10557 | p = (struct aic7xxx_host *)cmd->device->host->hostdata; | ||
10558 | aic_dev = AIC_DEV(cmd); | ||
10559 | if(aic7xxx_position(cmd) < p->scb_data->numscbs) | ||
10560 | scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]); | ||
10561 | else | ||
10562 | return FAILED; | ||
10563 | |||
10564 | aic7xxx_isr(p); | ||
10565 | aic7xxx_done_cmds_complete(p); | ||
10566 | /* If the command was already complete or just completed, then we didn't | ||
10567 | * do a reset, return FAILED */ | ||
10568 | if(!(scb->flags & SCB_ACTIVE)) | ||
10569 | return FAILED; | ||
10570 | |||
10571 | pause_sequencer(p); | ||
10572 | |||
10573 | /* | ||
10574 | * I added a new config option to the driver: "panic_on_abort" that will | ||
10575 | * cause the driver to panic and the machine to stop on the first abort | ||
10576 | * or reset call into the driver. At that point, it prints out a lot of | ||
10577 | * useful information for me which I can then use to try and debug the | ||
10578 | * problem. Simply enable the boot time prompt in order to activate this | ||
10579 | * code. | ||
10580 | */ | ||
10581 | if (aic7xxx_panic_on_abort) | ||
10582 | aic7xxx_panic_abort(p, cmd); | ||
10583 | |||
10584 | if (aic7xxx_verbose & VERBOSE_ABORT) | ||
10585 | { | ||
10586 | printk(INFO_LEAD "Aborting scb %d, flags 0x%x, SEQADDR 0x%x, LASTPHASE " | ||
10587 | "0x%x\n", | ||
10588 | p->host_no, CTL_OF_SCB(scb), scb->hscb->tag, scb->flags, | ||
10589 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), | ||
10590 | aic_inb(p, LASTPHASE)); | ||
10591 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n", | ||
10592 | p->host_no, CTL_OF_SCB(scb), (p->features & AHC_ULTRA2) ? | ||
10593 | aic_inb(p, SG_CACHEPTR) : 0, aic_inb(p, SG_COUNT), | ||
10594 | aic_inb(p, SCSISIGI)); | ||
10595 | printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n", | ||
10596 | p->host_no, CTL_OF_SCB(scb), aic_inb(p, SSTAT0), | ||
10597 | aic_inb(p, SSTAT1), aic_inb(p, SSTAT2)); | ||
10598 | } | ||
10599 | |||
10600 | if (scb->flags & SCB_WAITINGQ) | ||
10601 | { | ||
10602 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) | ||
10603 | printk(INFO_LEAD "SCB found on waiting list and " | ||
10604 | "aborted.\n", p->host_no, CTL_OF_SCB(scb)); | ||
10605 | scbq_remove(&p->waiting_scbs, scb); | ||
10606 | scbq_remove(&aic_dev->delayed_scbs, scb); | ||
10607 | aic_dev->active_cmds++; | ||
10608 | p->activescbs++; | ||
10609 | scb->flags &= ~(SCB_WAITINGQ | SCB_ACTIVE); | ||
10610 | scb->flags |= SCB_ABORT | SCB_QUEUED_FOR_DONE; | ||
10611 | goto success; | ||
10612 | } | ||
10613 | |||
10614 | /* | ||
10615 | * We just checked the waiting_q, now for the QINFIFO | ||
10616 | */ | ||
10617 | if ( ((found = aic7xxx_search_qinfifo(p, cmd->device->id, cmd->device->channel, | ||
10618 | cmd->device->lun, scb->hscb->tag, SCB_ABORT | SCB_QUEUED_FOR_DONE, | ||
10619 | FALSE, NULL)) != 0) && | ||
10620 | (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)) | ||
10621 | { | ||
10622 | printk(INFO_LEAD "SCB found in QINFIFO and aborted.\n", p->host_no, | ||
10623 | CTL_OF_SCB(scb)); | ||
10624 | goto success; | ||
10625 | } | ||
10626 | |||
10627 | /* | ||
10628 | * QINFIFO, waitingq, completeq done. Next, check WAITING_SCB list in card | ||
10629 | */ | ||
10630 | |||
10631 | saved_hscbptr = aic_inb(p, SCBPTR); | ||
10632 | if ((hscbptr = aic7xxx_find_scb(p, scb)) != SCB_LIST_NULL) | ||
10633 | { | ||
10634 | aic_outb(p, hscbptr, SCBPTR); | ||
10635 | scb_control = aic_inb(p, SCB_CONTROL); | ||
10636 | disconnected = scb_control & DISCONNECTED; | ||
10637 | /* | ||
10638 | * If the DISCONNECTED bit is not set in SCB_CONTROL, then we are | ||
10639 | * either currently active or on the waiting list. | ||
10640 | */ | ||
10641 | if(!disconnected && aic_inb(p, LASTPHASE) == P_BUSFREE) { | ||
10642 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) | ||
10643 | printk(INFO_LEAD "SCB found on hardware waiting" | ||
10644 | " list and aborted.\n", p->host_no, CTL_OF_SCB(scb)); | ||
10645 | /* If we are the only waiting command, stop the selection engine */ | ||
10646 | if (aic_inb(p, WAITING_SCBH) == hscbptr && aic_inb(p, SCB_NEXT) == | ||
10647 | SCB_LIST_NULL) | ||
10648 | { | ||
10649 | aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ); | ||
10650 | aic_outb(p, CLRSELTIMEO, CLRSINT1); | ||
10651 | aic_outb(p, SCB_LIST_NULL, WAITING_SCBH); | ||
10652 | } | ||
10653 | else | ||
10654 | { | ||
10655 | unsigned char prev, next; | ||
10656 | prev = SCB_LIST_NULL; | ||
10657 | next = aic_inb(p, WAITING_SCBH); | ||
10658 | while(next != SCB_LIST_NULL) | ||
10659 | { | ||
10660 | aic_outb(p, next, SCBPTR); | ||
10661 | if (next == hscbptr) | ||
10662 | { | ||
10663 | next = aic_inb(p, SCB_NEXT); | ||
10664 | if (prev != SCB_LIST_NULL) | ||
10665 | { | ||
10666 | aic_outb(p, prev, SCBPTR); | ||
10667 | aic_outb(p, next, SCB_NEXT); | ||
10668 | } | ||
10669 | else | ||
10670 | aic_outb(p, next, WAITING_SCBH); | ||
10671 | aic_outb(p, hscbptr, SCBPTR); | ||
10672 | next = SCB_LIST_NULL; | ||
10673 | } | ||
10674 | else | ||
10675 | { | ||
10676 | prev = next; | ||
10677 | next = aic_inb(p, SCB_NEXT); | ||
10678 | } | ||
10679 | } | ||
10680 | } | ||
10681 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); | ||
10682 | aic_outb(p, 0, SCB_CONTROL); | ||
10683 | aic7xxx_add_curscb_to_free_list(p); | ||
10684 | scb->flags = SCB_ABORT | SCB_QUEUED_FOR_DONE; | ||
10685 | goto success; | ||
10686 | } | ||
10687 | else if (!disconnected) | ||
10688 | { | ||
10689 | /* | ||
10690 | * We are the currently active command | ||
10691 | */ | ||
10692 | if((aic_inb(p, LASTPHASE) == P_MESGIN) || | ||
10693 | (aic_inb(p, LASTPHASE) == P_MESGOUT)) | ||
10694 | { | ||
10695 | /* | ||
10696 | * Message buffer busy, unable to abort | ||
10697 | */ | ||
10698 | printk(INFO_LEAD "message buffer busy, unable to abort.\n", | ||
10699 | p->host_no, CTL_OF_SCB(scb)); | ||
10700 | unpause_sequencer(p, FALSE); | ||
10701 | return FAILED; | ||
10702 | } | ||
10703 | /* Fallthrough to below, set ATNO after we set SCB_CONTROL */ | ||
10704 | } | ||
10705 | aic_outb(p, scb_control | MK_MESSAGE, SCB_CONTROL); | ||
10706 | if(!disconnected) | ||
10707 | { | ||
10708 | aic_outb(p, HOST_MSG, MSG_OUT); | ||
10709 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); | ||
10710 | } | ||
10711 | aic_outb(p, saved_hscbptr, SCBPTR); | ||
10712 | } | ||
10713 | else | ||
10714 | { | ||
10715 | /* | ||
10716 | * The scb isn't in the card at all and it is active and it isn't in | ||
10717 | * any of the queues, so it must be disconnected and paged out. Fall | ||
10718 | * through to the code below. | ||
10719 | */ | ||
10720 | disconnected = 1; | ||
10721 | } | ||
10722 | |||
10723 | p->flags |= AHC_ABORT_PENDING; | ||
10724 | scb->flags |= SCB_QUEUED_ABORT | SCB_ABORT | SCB_RECOVERY_SCB; | ||
10725 | scb->hscb->control |= MK_MESSAGE; | ||
10726 | if(disconnected) | ||
10727 | { | ||
10728 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) | ||
10729 | printk(INFO_LEAD "SCB disconnected. Queueing Abort" | ||
10730 | " SCB.\n", p->host_no, CTL_OF_SCB(scb)); | ||
10731 | p->qinfifo[p->qinfifonext++] = scb->hscb->tag; | ||
10732 | if (p->features & AHC_QUEUE_REGS) | ||
10733 | aic_outb(p, p->qinfifonext, HNSCB_QOFF); | ||
10734 | else | ||
10735 | aic_outb(p, p->qinfifonext, KERNEL_QINPOS); | ||
10736 | } | ||
10737 | unpause_sequencer(p, FALSE); | ||
10738 | spin_unlock_irq(p->host->host_lock); | ||
10739 | msleep(1000/4); | ||
10740 | spin_lock_irq(p->host->host_lock); | ||
10741 | if (p->flags & AHC_ABORT_PENDING) | ||
10742 | { | ||
10743 | if (aic7xxx_verbose & VERBOSE_ABORT_RETURN) | ||
10744 | printk(INFO_LEAD "Abort never delivered, returning FAILED\n", p->host_no, | ||
10745 | CTL_OF_CMD(cmd)); | ||
10746 | p->flags &= ~AHC_ABORT_PENDING; | ||
10747 | return FAILED; | ||
10748 | } | ||
10749 | if (aic7xxx_verbose & VERBOSE_ABORT_RETURN) | ||
10750 | printk(INFO_LEAD "Abort successful.\n", p->host_no, CTL_OF_CMD(cmd)); | ||
10751 | return SUCCESS; | ||
10752 | |||
10753 | success: | ||
10754 | if (aic7xxx_verbose & VERBOSE_ABORT_RETURN) | ||
10755 | printk(INFO_LEAD "Abort successful.\n", p->host_no, CTL_OF_CMD(cmd)); | ||
10756 | aic7xxx_run_done_queue(p, TRUE); | ||
10757 | unpause_sequencer(p, FALSE); | ||
10758 | return SUCCESS; | ||
10759 | } | ||
10760 | |||
10761 | static int aic7xxx_abort(struct scsi_cmnd *cmd) | ||
10762 | { | ||
10763 | int rc; | ||
10764 | |||
10765 | spin_lock_irq(cmd->device->host->host_lock); | ||
10766 | rc = __aic7xxx_abort(cmd); | ||
10767 | spin_unlock_irq(cmd->device->host->host_lock); | ||
10768 | |||
10769 | return rc; | ||
10770 | } | ||
10771 | |||
10772 | |||
10773 | /*+F************************************************************************* | ||
10774 | * Function: | ||
10775 | * aic7xxx_reset | ||
10776 | * | ||
10777 | * Description: | ||
10778 | * Resetting the bus always succeeds - is has to, otherwise the | ||
10779 | * kernel will panic! Try a surgical technique - sending a BUS | ||
10780 | * DEVICE RESET message - on the offending target before pulling | ||
10781 | * the SCSI bus reset line. | ||
10782 | *-F*************************************************************************/ | ||
10783 | static int aic7xxx_reset(struct scsi_cmnd *cmd) | ||
10784 | { | ||
10785 | struct aic7xxx_scb *scb; | ||
10786 | struct aic7xxx_host *p; | ||
10787 | struct aic_dev_data *aic_dev; | ||
10788 | |||
10789 | p = (struct aic7xxx_host *) cmd->device->host->hostdata; | ||
10790 | spin_lock_irq(p->host->host_lock); | ||
10791 | |||
10792 | aic_dev = AIC_DEV(cmd); | ||
10793 | if(aic7xxx_position(cmd) < p->scb_data->numscbs) | ||
10794 | { | ||
10795 | scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]); | ||
10796 | if (scb->cmd != cmd) | ||
10797 | scb = NULL; | ||
10798 | } | ||
10799 | else | ||
10800 | { | ||
10801 | scb = NULL; | ||
10802 | } | ||
10803 | |||
10804 | /* | ||
10805 | * I added a new config option to the driver: "panic_on_abort" that will | ||
10806 | * cause the driver to panic and the machine to stop on the first abort | ||
10807 | * or reset call into the driver. At that point, it prints out a lot of | ||
10808 | * useful information for me which I can then use to try and debug the | ||
10809 | * problem. Simply enable the boot time prompt in order to activate this | ||
10810 | * code. | ||
10811 | */ | ||
10812 | if (aic7xxx_panic_on_abort) | ||
10813 | aic7xxx_panic_abort(p, cmd); | ||
10814 | |||
10815 | pause_sequencer(p); | ||
10816 | |||
10817 | while((aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR)) | ||
10818 | { | ||
10819 | aic7xxx_isr(p); | ||
10820 | pause_sequencer(p); | ||
10821 | } | ||
10822 | aic7xxx_done_cmds_complete(p); | ||
10823 | |||
10824 | if(scb && (scb->cmd == NULL)) | ||
10825 | { | ||
10826 | /* | ||
10827 | * We just completed the command when we ran the isr stuff, so we no | ||
10828 | * longer have it. | ||
10829 | */ | ||
10830 | unpause_sequencer(p, FALSE); | ||
10831 | spin_unlock_irq(p->host->host_lock); | ||
10832 | return SUCCESS; | ||
10833 | } | ||
10834 | |||
10835 | /* | ||
10836 | * By this point, we want to already know what we are going to do and | ||
10837 | * only have the following code implement our course of action. | ||
10838 | */ | ||
10839 | aic7xxx_reset_channel(p, cmd->device->channel, TRUE); | ||
10840 | if (p->features & AHC_TWIN) | ||
10841 | { | ||
10842 | aic7xxx_reset_channel(p, cmd->device->channel ^ 0x01, TRUE); | ||
10843 | restart_sequencer(p); | ||
10844 | } | ||
10845 | aic_outb(p, aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE), SIMODE1); | ||
10846 | aic7xxx_clear_intstat(p); | ||
10847 | p->flags &= ~AHC_HANDLING_REQINITS; | ||
10848 | p->msg_type = MSG_TYPE_NONE; | ||
10849 | p->msg_index = 0; | ||
10850 | p->msg_len = 0; | ||
10851 | aic7xxx_run_done_queue(p, TRUE); | ||
10852 | unpause_sequencer(p, FALSE); | ||
10853 | spin_unlock_irq(p->host->host_lock); | ||
10854 | ssleep(2); | ||
10855 | return SUCCESS; | ||
10856 | } | ||
10857 | |||
10858 | /*+F************************************************************************* | ||
10859 | * Function: | ||
10860 | * aic7xxx_biosparam | ||
10861 | * | ||
10862 | * Description: | ||
10863 | * Return the disk geometry for the given SCSI device. | ||
10864 | * | ||
10865 | * Note: | ||
10866 | * This function is broken for today's really large drives and needs | ||
10867 | * fixed. | ||
10868 | *-F*************************************************************************/ | ||
10869 | static int | ||
10870 | aic7xxx_biosparam(struct scsi_device *sdev, struct block_device *bdev, | ||
10871 | sector_t capacity, int geom[]) | ||
10872 | { | ||
10873 | sector_t heads, sectors, cylinders; | ||
10874 | int ret; | ||
10875 | struct aic7xxx_host *p; | ||
10876 | unsigned char *buf; | ||
10877 | |||
10878 | p = (struct aic7xxx_host *) sdev->host->hostdata; | ||
10879 | buf = scsi_bios_ptable(bdev); | ||
10880 | |||
10881 | if ( buf ) | ||
10882 | { | ||
10883 | ret = scsi_partsize(buf, capacity, &geom[2], &geom[0], &geom[1]); | ||
10884 | kfree(buf); | ||
10885 | if ( ret != -1 ) | ||
10886 | return(ret); | ||
10887 | } | ||
10888 | |||
10889 | heads = 64; | ||
10890 | sectors = 32; | ||
10891 | cylinders = capacity >> 11; | ||
10892 | |||
10893 | if ((p->flags & AHC_EXTEND_TRANS_A) && (cylinders > 1024)) | ||
10894 | { | ||
10895 | heads = 255; | ||
10896 | sectors = 63; | ||
10897 | cylinders = capacity >> 14; | ||
10898 | if(capacity > (65535 * heads * sectors)) | ||
10899 | cylinders = 65535; | ||
10900 | else | ||
10901 | cylinders = ((unsigned int)capacity) / (unsigned int)(heads * sectors); | ||
10902 | } | ||
10903 | |||
10904 | geom[0] = (int)heads; | ||
10905 | geom[1] = (int)sectors; | ||
10906 | geom[2] = (int)cylinders; | ||
10907 | |||
10908 | return (0); | ||
10909 | } | ||
10910 | |||
10911 | /*+F************************************************************************* | ||
10912 | * Function: | ||
10913 | * aic7xxx_release | ||
10914 | * | ||
10915 | * Description: | ||
10916 | * Free the passed in Scsi_Host memory structures prior to unloading the | ||
10917 | * module. | ||
10918 | *-F*************************************************************************/ | ||
10919 | static int | ||
10920 | aic7xxx_release(struct Scsi_Host *host) | ||
10921 | { | ||
10922 | struct aic7xxx_host *p = (struct aic7xxx_host *) host->hostdata; | ||
10923 | struct aic7xxx_host *next, *prev; | ||
10924 | |||
10925 | if(p->irq) | ||
10926 | free_irq(p->irq, p); | ||
10927 | #ifdef MMAPIO | ||
10928 | if(p->maddr) | ||
10929 | { | ||
10930 | iounmap(p->maddr); | ||
10931 | } | ||
10932 | #endif /* MMAPIO */ | ||
10933 | if(!p->pdev) | ||
10934 | release_region(p->base, MAXREG - MINREG); | ||
10935 | #ifdef CONFIG_PCI | ||
10936 | else { | ||
10937 | pci_release_regions(p->pdev); | ||
10938 | pci_dev_put(p->pdev); | ||
10939 | } | ||
10940 | #endif | ||
10941 | prev = NULL; | ||
10942 | next = first_aic7xxx; | ||
10943 | while(next != NULL) | ||
10944 | { | ||
10945 | if(next == p) | ||
10946 | { | ||
10947 | if(prev == NULL) | ||
10948 | first_aic7xxx = next->next; | ||
10949 | else | ||
10950 | prev->next = next->next; | ||
10951 | } | ||
10952 | else | ||
10953 | { | ||
10954 | prev = next; | ||
10955 | } | ||
10956 | next = next->next; | ||
10957 | } | ||
10958 | aic7xxx_free(p); | ||
10959 | return(0); | ||
10960 | } | ||
10961 | |||
10962 | /*+F************************************************************************* | ||
10963 | * Function: | ||
10964 | * aic7xxx_print_card | ||
10965 | * | ||
10966 | * Description: | ||
10967 | * Print out all of the control registers on the card | ||
10968 | * | ||
10969 | * NOTE: This function is not yet safe for use on the VLB and EISA | ||
10970 | * controllers, so it isn't used on those controllers at all. | ||
10971 | *-F*************************************************************************/ | ||
10972 | static void | ||
10973 | aic7xxx_print_card(struct aic7xxx_host *p) | ||
10974 | { | ||
10975 | int i, j, k, chip; | ||
10976 | static struct register_ranges { | ||
10977 | int num_ranges; | ||
10978 | int range_val[32]; | ||
10979 | } cards_ds[] = { | ||
10980 | { 0, {0,} }, /* none */ | ||
10981 | {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1f, 0x1f, 0x60, 0x60, /*7771*/ | ||
10982 | 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9b, 0x9f} }, | ||
10983 | { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7850*/ | ||
10984 | 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} }, | ||
10985 | { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7860*/ | ||
10986 | 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} }, | ||
10987 | {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1c, 0x1f, 0x60, 0x60, /*7870*/ | ||
10988 | 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} }, | ||
10989 | {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1a, 0x1c, 0x1f, 0x60, 0x60, /*7880*/ | ||
10990 | 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} }, | ||
10991 | {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7890*/ | ||
10992 | 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f, | ||
10993 | 0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc, | ||
10994 | 0xfe, 0xff} }, | ||
10995 | {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1b, 0x1f, 0x60, 0x60, /*7895*/ | ||
10996 | 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, | ||
10997 | 0x9f, 0x9f, 0xe0, 0xf1} }, | ||
10998 | {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7896*/ | ||
10999 | 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f, | ||
11000 | 0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc, | ||
11001 | 0xfe, 0xff} }, | ||
11002 | {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7892*/ | ||
11003 | 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f, | ||
11004 | 0xe0, 0xf1, 0xf4, 0xfc} }, | ||
11005 | {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7899*/ | ||
11006 | 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f, | ||
11007 | 0xe0, 0xf1, 0xf4, 0xfc} }, | ||
11008 | }; | ||
11009 | chip = p->chip & AHC_CHIPID_MASK; | ||
11010 | printk("%s at ", | ||
11011 | board_names[p->board_name_index]); | ||
11012 | switch(p->chip & ~AHC_CHIPID_MASK) | ||
11013 | { | ||
11014 | case AHC_VL: | ||
11015 | printk("VLB Slot %d.\n", p->pci_device_fn); | ||
11016 | break; | ||
11017 | case AHC_EISA: | ||
11018 | printk("EISA Slot %d.\n", p->pci_device_fn); | ||
11019 | break; | ||
11020 | case AHC_PCI: | ||
11021 | default: | ||
11022 | printk("PCI %d/%d/%d.\n", p->pci_bus, PCI_SLOT(p->pci_device_fn), | ||
11023 | PCI_FUNC(p->pci_device_fn)); | ||
11024 | break; | ||
11025 | } | ||
11026 | |||
11027 | /* | ||
11028 | * the registers on the card.... | ||
11029 | */ | ||
11030 | printk("Card Dump:\n"); | ||
11031 | k = 0; | ||
11032 | for(i=0; i<cards_ds[chip].num_ranges; i++) | ||
11033 | { | ||
11034 | for(j = cards_ds[chip].range_val[ i * 2 ]; | ||
11035 | j <= cards_ds[chip].range_val[ i * 2 + 1 ] ; | ||
11036 | j++) | ||
11037 | { | ||
11038 | printk("%02x:%02x ", j, aic_inb(p, j)); | ||
11039 | if(++k == 13) | ||
11040 | { | ||
11041 | printk("\n"); | ||
11042 | k=0; | ||
11043 | } | ||
11044 | } | ||
11045 | } | ||
11046 | if(k != 0) | ||
11047 | printk("\n"); | ||
11048 | |||
11049 | /* | ||
11050 | * If this was an Ultra2 controller, then we just hosed the card in terms | ||
11051 | * of the QUEUE REGS. This function is only called at init time or by | ||
11052 | * the panic_abort function, so it's safe to assume a generic init time | ||
11053 | * setting here | ||
11054 | */ | ||
11055 | |||
11056 | if(p->features & AHC_QUEUE_REGS) | ||
11057 | { | ||
11058 | aic_outb(p, 0, SDSCB_QOFF); | ||
11059 | aic_outb(p, 0, SNSCB_QOFF); | ||
11060 | aic_outb(p, 0, HNSCB_QOFF); | ||
11061 | } | ||
11062 | |||
11063 | } | ||
11064 | |||
11065 | /*+F************************************************************************* | ||
11066 | * Function: | ||
11067 | * aic7xxx_print_scratch_ram | ||
11068 | * | ||
11069 | * Description: | ||
11070 | * Print out the scratch RAM values on the card. | ||
11071 | *-F*************************************************************************/ | ||
11072 | static void | ||
11073 | aic7xxx_print_scratch_ram(struct aic7xxx_host *p) | ||
11074 | { | ||
11075 | int i, k; | ||
11076 | |||
11077 | k = 0; | ||
11078 | printk("Scratch RAM:\n"); | ||
11079 | for(i = SRAM_BASE; i < SEQCTL; i++) | ||
11080 | { | ||
11081 | printk("%02x:%02x ", i, aic_inb(p, i)); | ||
11082 | if(++k == 13) | ||
11083 | { | ||
11084 | printk("\n"); | ||
11085 | k=0; | ||
11086 | } | ||
11087 | } | ||
11088 | if (p->features & AHC_MORE_SRAM) | ||
11089 | { | ||
11090 | for(i = TARG_OFFSET; i < 0x80; i++) | ||
11091 | { | ||
11092 | printk("%02x:%02x ", i, aic_inb(p, i)); | ||
11093 | if(++k == 13) | ||
11094 | { | ||
11095 | printk("\n"); | ||
11096 | k=0; | ||
11097 | } | ||
11098 | } | ||
11099 | } | ||
11100 | printk("\n"); | ||
11101 | } | ||
11102 | |||
11103 | |||
11104 | #include "aic7xxx_old/aic7xxx_proc.c" | ||
11105 | |||
11106 | MODULE_LICENSE("Dual BSD/GPL"); | ||
11107 | MODULE_VERSION(AIC7XXX_H_VERSION); | ||
11108 | |||
11109 | |||
11110 | static struct scsi_host_template driver_template = { | ||
11111 | .show_info = aic7xxx_show_info, | ||
11112 | .detect = aic7xxx_detect, | ||
11113 | .release = aic7xxx_release, | ||
11114 | .info = aic7xxx_info, | ||
11115 | .queuecommand = aic7xxx_queue, | ||
11116 | .slave_alloc = aic7xxx_slave_alloc, | ||
11117 | .slave_configure = aic7xxx_slave_configure, | ||
11118 | .slave_destroy = aic7xxx_slave_destroy, | ||
11119 | .bios_param = aic7xxx_biosparam, | ||
11120 | .eh_abort_handler = aic7xxx_abort, | ||
11121 | .eh_device_reset_handler = aic7xxx_bus_device_reset, | ||
11122 | .eh_host_reset_handler = aic7xxx_reset, | ||
11123 | .can_queue = 255, | ||
11124 | .this_id = -1, | ||
11125 | .max_sectors = 2048, | ||
11126 | .cmd_per_lun = 3, | ||
11127 | .use_clustering = ENABLE_CLUSTERING, | ||
11128 | }; | ||
11129 | |||
11130 | #include "scsi_module.c" | ||
11131 | |||
11132 | /* | ||
11133 | * Overrides for Emacs so that we almost follow Linus's tabbing style. | ||
11134 | * Emacs will notice this stuff at the end of the file and automatically | ||
11135 | * adjust the settings for this buffer only. This must remain at the end | ||
11136 | * of the file. | ||
11137 | * --------------------------------------------------------------------------- | ||
11138 | * Local variables: | ||
11139 | * c-indent-level: 2 | ||
11140 | * c-brace-imaginary-offset: 0 | ||
11141 | * c-brace-offset: -2 | ||
11142 | * c-argdecl-indent: 2 | ||
11143 | * c-label-offset: -2 | ||
11144 | * c-continued-statement-offset: 2 | ||
11145 | * c-continued-brace-offset: 0 | ||
11146 | * indent-tabs-mode: nil | ||
11147 | * tab-width: 8 | ||
11148 | * End: | ||
11149 | */ | ||
diff --git a/drivers/scsi/aic7xxx_old/aic7xxx.h b/drivers/scsi/aic7xxx_old/aic7xxx.h deleted file mode 100644 index 0116c8128a6b..000000000000 --- a/drivers/scsi/aic7xxx_old/aic7xxx.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /*+M************************************************************************* | ||
2 | * Adaptec AIC7xxx device driver for Linux. | ||
3 | * | ||
4 | * Copyright (c) 1994 John Aycock | ||
5 | * The University of Calgary Department of Computer Science. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2, or (at your option) | ||
10 | * any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; see the file COPYING. If not, write to | ||
19 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | ||
20 | * | ||
21 | * $Id: aic7xxx.h,v 3.2 1996/07/23 03:37:26 deang Exp $ | ||
22 | *-M*************************************************************************/ | ||
23 | #ifndef _aic7xxx_h | ||
24 | #define _aic7xxx_h | ||
25 | |||
26 | #define AIC7XXX_H_VERSION "5.2.0" | ||
27 | |||
28 | #endif /* _aic7xxx_h */ | ||
diff --git a/drivers/scsi/aic7xxx_old/aic7xxx.reg b/drivers/scsi/aic7xxx_old/aic7xxx.reg deleted file mode 100644 index f67b4bced01c..000000000000 --- a/drivers/scsi/aic7xxx_old/aic7xxx.reg +++ /dev/null | |||
@@ -1,1401 +0,0 @@ | |||
1 | /* | ||
2 | * Aic7xxx register and scratch ram definitions. | ||
3 | * | ||
4 | * Copyright (c) 1994-1998 Justin Gibbs. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * Redistribution and use in source and binary forms, with or without | ||
8 | * modification, are permitted provided that the following conditions | ||
9 | * are met: | ||
10 | * 1. Redistributions of source code must retain the above copyright | ||
11 | * notice, this list of conditions, and the following disclaimer, | ||
12 | * without modification, immediately at the beginning of the file. | ||
13 | * 2. The name of the author may not be used to endorse or promote products | ||
14 | * derived from this software without specific prior written permission. | ||
15 | * | ||
16 | * Where this Software is combined with software released under the terms of | ||
17 | * the GNU General Public License ("GPL") and the terms of the GPL would require the | ||
18 | * combined work to also be released under the terms of the GPL, the terms | ||
19 | * and conditions of this License will apply in addition to those of the | ||
20 | * GPL with the exception of any terms or conditions of this License that | ||
21 | * conflict with, or are expressly prohibited by, the GPL. | ||
22 | * | ||
23 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | ||
24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
26 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR | ||
27 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||
28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | ||
29 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
30 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
31 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||
32 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | ||
33 | * SUCH DAMAGE. | ||
34 | * | ||
35 | * $Id: aic7xxx.reg,v 1.4 1997/06/27 19:38:39 gibbs Exp $ | ||
36 | */ | ||
37 | |||
38 | /* | ||
39 | * This file is processed by the aic7xxx_asm utility for use in assembling | ||
40 | * firmware for the aic7xxx family of SCSI host adapters as well as to generate | ||
41 | * a C header file for use in the kernel portion of the Aic7xxx driver. | ||
42 | * | ||
43 | * All page numbers refer to the Adaptec AIC-7770 Data Book available from | ||
44 | * Adaptec's Technical Documents Department 1-800-934-2766 | ||
45 | */ | ||
46 | |||
47 | /* | ||
48 | * SCSI Sequence Control (p. 3-11). | ||
49 | * Each bit, when set starts a specific SCSI sequence on the bus | ||
50 | */ | ||
51 | register SCSISEQ { | ||
52 | address 0x000 | ||
53 | access_mode RW | ||
54 | bit TEMODE 0x80 | ||
55 | bit ENSELO 0x40 | ||
56 | bit ENSELI 0x20 | ||
57 | bit ENRSELI 0x10 | ||
58 | bit ENAUTOATNO 0x08 | ||
59 | bit ENAUTOATNI 0x04 | ||
60 | bit ENAUTOATNP 0x02 | ||
61 | bit SCSIRSTO 0x01 | ||
62 | } | ||
63 | |||
64 | /* | ||
65 | * SCSI Transfer Control 0 Register (pp. 3-13). | ||
66 | * Controls the SCSI module data path. | ||
67 | */ | ||
68 | register SXFRCTL0 { | ||
69 | address 0x001 | ||
70 | access_mode RW | ||
71 | bit DFON 0x80 | ||
72 | bit DFPEXP 0x40 | ||
73 | bit FAST20 0x20 | ||
74 | bit CLRSTCNT 0x10 | ||
75 | bit SPIOEN 0x08 | ||
76 | bit SCAMEN 0x04 | ||
77 | bit CLRCHN 0x02 | ||
78 | } | ||
79 | |||
80 | /* | ||
81 | * SCSI Transfer Control 1 Register (pp. 3-14,15). | ||
82 | * Controls the SCSI module data path. | ||
83 | */ | ||
84 | register SXFRCTL1 { | ||
85 | address 0x002 | ||
86 | access_mode RW | ||
87 | bit BITBUCKET 0x80 | ||
88 | bit SWRAPEN 0x40 | ||
89 | bit ENSPCHK 0x20 | ||
90 | mask STIMESEL 0x18 | ||
91 | bit ENSTIMER 0x04 | ||
92 | bit ACTNEGEN 0x02 | ||
93 | bit STPWEN 0x01 /* Powered Termination */ | ||
94 | } | ||
95 | |||
96 | /* | ||
97 | * SCSI Control Signal Read Register (p. 3-15). | ||
98 | * Reads the actual state of the SCSI bus pins | ||
99 | */ | ||
100 | register SCSISIGI { | ||
101 | address 0x003 | ||
102 | access_mode RO | ||
103 | bit CDI 0x80 | ||
104 | bit IOI 0x40 | ||
105 | bit MSGI 0x20 | ||
106 | bit ATNI 0x10 | ||
107 | bit SELI 0x08 | ||
108 | bit BSYI 0x04 | ||
109 | bit REQI 0x02 | ||
110 | bit ACKI 0x01 | ||
111 | /* | ||
112 | * Possible phases in SCSISIGI | ||
113 | */ | ||
114 | mask PHASE_MASK CDI|IOI|MSGI | ||
115 | mask P_DATAOUT 0x00 | ||
116 | mask P_DATAIN IOI | ||
117 | mask P_COMMAND CDI | ||
118 | mask P_MESGOUT CDI|MSGI | ||
119 | mask P_STATUS CDI|IOI | ||
120 | mask P_MESGIN CDI|IOI|MSGI | ||
121 | } | ||
122 | |||
123 | /* | ||
124 | * SCSI Control Signal Write Register (p. 3-16). | ||
125 | * Writing to this register modifies the control signals on the bus. Only | ||
126 | * those signals that are allowed in the current mode (Initiator/Target) are | ||
127 | * asserted. | ||
128 | */ | ||
129 | register SCSISIGO { | ||
130 | address 0x003 | ||
131 | access_mode WO | ||
132 | bit CDO 0x80 | ||
133 | bit IOO 0x40 | ||
134 | bit MSGO 0x20 | ||
135 | bit ATNO 0x10 | ||
136 | bit SELO 0x08 | ||
137 | bit BSYO 0x04 | ||
138 | bit REQO 0x02 | ||
139 | bit ACKO 0x01 | ||
140 | /* | ||
141 | * Possible phases to write into SCSISIG0 | ||
142 | */ | ||
143 | mask PHASE_MASK CDI|IOI|MSGI | ||
144 | mask P_DATAOUT 0x00 | ||
145 | mask P_DATAIN IOI | ||
146 | mask P_COMMAND CDI | ||
147 | mask P_MESGOUT CDI|MSGI | ||
148 | mask P_STATUS CDI|IOI | ||
149 | mask P_MESGIN CDI|IOI|MSGI | ||
150 | } | ||
151 | |||
152 | /* | ||
153 | * SCSI Rate Control (p. 3-17). | ||
154 | * Contents of this register determine the Synchronous SCSI data transfer | ||
155 | * rate and the maximum synchronous Req/Ack offset. An offset of 0 in the | ||
156 | * SOFS (3:0) bits disables synchronous data transfers. Any offset value | ||
157 | * greater than 0 enables synchronous transfers. | ||
158 | */ | ||
159 | register SCSIRATE { | ||
160 | address 0x004 | ||
161 | access_mode RW | ||
162 | bit WIDEXFER 0x80 /* Wide transfer control */ | ||
163 | mask SXFR 0x70 /* Sync transfer rate */ | ||
164 | mask SXFR_ULTRA2 0x7f /* Sync transfer rate */ | ||
165 | mask SOFS 0x0f /* Sync offset */ | ||
166 | } | ||
167 | |||
168 | /* | ||
169 | * SCSI ID (p. 3-18). | ||
170 | * Contains the ID of the board and the current target on the | ||
171 | * selected channel. | ||
172 | */ | ||
173 | register SCSIID { | ||
174 | address 0x005 | ||
175 | access_mode RW | ||
176 | mask TID 0xf0 /* Target ID mask */ | ||
177 | mask OID 0x0f /* Our ID mask */ | ||
178 | /* | ||
179 | * SCSI Maximum Offset (p. 4-61 aic7890/91 Data Book) | ||
180 | * The aic7890/91 allow an offset of up to 127 transfers in both wide | ||
181 | * and narrow mode. | ||
182 | */ | ||
183 | alias SCSIOFFSET | ||
184 | mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */ | ||
185 | } | ||
186 | |||
187 | /* | ||
188 | * SCSI Latched Data (p. 3-19). | ||
189 | * Read/Write latches used to transfer data on the SCSI bus during | ||
190 | * Automatic or Manual PIO mode. SCSIDATH can be used for the | ||
191 | * upper byte of a 16bit wide asynchronouse data phase transfer. | ||
192 | */ | ||
193 | register SCSIDATL { | ||
194 | address 0x006 | ||
195 | access_mode RW | ||
196 | } | ||
197 | |||
198 | register SCSIDATH { | ||
199 | address 0x007 | ||
200 | access_mode RW | ||
201 | } | ||
202 | |||
203 | /* | ||
204 | * SCSI Transfer Count (pp. 3-19,20) | ||
205 | * These registers count down the number of bytes transferred | ||
206 | * across the SCSI bus. The counter is decremented only once | ||
207 | * the data has been safely transferred. SDONE in SSTAT0 is | ||
208 | * set when STCNT goes to 0 | ||
209 | */ | ||
210 | register STCNT { | ||
211 | address 0x008 | ||
212 | size 3 | ||
213 | access_mode RW | ||
214 | } | ||
215 | |||
216 | /* | ||
217 | * Option Mode Register (Alternate Mode) (p. 5-198) | ||
218 | * This register is used to set certain options on Ultra3 based chips. | ||
219 | * The chip must be in alternate mode (bit ALT_MODE in SFUNCT must be set) | ||
220 | */ | ||
221 | register OPTIONMODE { | ||
222 | address 0x008 | ||
223 | access_mode RW | ||
224 | bit AUTORATEEN 0x80 | ||
225 | bit AUTOACKEN 0x40 | ||
226 | bit ATNMGMNTEN 0x20 | ||
227 | bit BUSFREEREV 0x10 | ||
228 | bit EXPPHASEDIS 0x08 | ||
229 | bit SCSIDATL_IMGEN 0x04 | ||
230 | bit AUTO_MSGOUT_DE 0x02 | ||
231 | bit DIS_MSGIN_DUALEDGE 0x01 | ||
232 | } | ||
233 | |||
234 | |||
235 | /* | ||
236 | * Clear SCSI Interrupt 0 (p. 3-20) | ||
237 | * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT0. | ||
238 | */ | ||
239 | register CLRSINT0 { | ||
240 | address 0x00b | ||
241 | access_mode WO | ||
242 | bit CLRSELDO 0x40 | ||
243 | bit CLRSELDI 0x20 | ||
244 | bit CLRSELINGO 0x10 | ||
245 | bit CLRSWRAP 0x08 | ||
246 | bit CLRSPIORDY 0x02 | ||
247 | } | ||
248 | |||
249 | /* | ||
250 | * SCSI Status 0 (p. 3-21) | ||
251 | * Contains one set of SCSI Interrupt codes | ||
252 | * These are most likely of interest to the sequencer | ||
253 | */ | ||
254 | register SSTAT0 { | ||
255 | address 0x00b | ||
256 | access_mode RO | ||
257 | bit TARGET 0x80 /* Board acting as target */ | ||
258 | bit SELDO 0x40 /* Selection Done */ | ||
259 | bit SELDI 0x20 /* Board has been selected */ | ||
260 | bit SELINGO 0x10 /* Selection In Progress */ | ||
261 | bit SWRAP 0x08 /* 24bit counter wrap */ | ||
262 | bit IOERR 0x08 /* LVD Tranceiver mode changed */ | ||
263 | bit SDONE 0x04 /* STCNT = 0x000000 */ | ||
264 | bit SPIORDY 0x02 /* SCSI PIO Ready */ | ||
265 | bit DMADONE 0x01 /* DMA transfer completed */ | ||
266 | } | ||
267 | |||
268 | /* | ||
269 | * Clear SCSI Interrupt 1 (p. 3-23) | ||
270 | * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1. | ||
271 | */ | ||
272 | register CLRSINT1 { | ||
273 | address 0x00c | ||
274 | access_mode WO | ||
275 | bit CLRSELTIMEO 0x80 | ||
276 | bit CLRATNO 0x40 | ||
277 | bit CLRSCSIRSTI 0x20 | ||
278 | bit CLRBUSFREE 0x08 | ||
279 | bit CLRSCSIPERR 0x04 | ||
280 | bit CLRPHASECHG 0x02 | ||
281 | bit CLRREQINIT 0x01 | ||
282 | } | ||
283 | |||
284 | /* | ||
285 | * SCSI Status 1 (p. 3-24) | ||
286 | */ | ||
287 | register SSTAT1 { | ||
288 | address 0x00c | ||
289 | access_mode RO | ||
290 | bit SELTO 0x80 | ||
291 | bit ATNTARG 0x40 | ||
292 | bit SCSIRSTI 0x20 | ||
293 | bit PHASEMIS 0x10 | ||
294 | bit BUSFREE 0x08 | ||
295 | bit SCSIPERR 0x04 | ||
296 | bit PHASECHG 0x02 | ||
297 | bit REQINIT 0x01 | ||
298 | } | ||
299 | |||
300 | /* | ||
301 | * SCSI Status 2 (pp. 3-25,26) | ||
302 | */ | ||
303 | register SSTAT2 { | ||
304 | address 0x00d | ||
305 | access_mode RO | ||
306 | bit OVERRUN 0x80 | ||
307 | bit SHVALID 0x40 | ||
308 | bit WIDE_RES 0x20 | ||
309 | bit EXP_ACTIVE 0x10 /* SCSI Expander Active */ | ||
310 | bit CRCVALERR 0x08 /* CRC Value Error */ | ||
311 | bit CRCENDERR 0x04 /* CRC End Error */ | ||
312 | bit CRCREQERR 0x02 /* CRC REQ Error */ | ||
313 | bit DUAL_EDGE_ERROR 0x01 /* Invalid pins for Dual Edge phase */ | ||
314 | mask SFCNT 0x1f | ||
315 | } | ||
316 | |||
317 | /* | ||
318 | * SCSI Status 3 (p. 3-26) | ||
319 | */ | ||
320 | register SSTAT3 { | ||
321 | address 0x00e | ||
322 | access_mode RO | ||
323 | mask SCSICNT 0xf0 | ||
324 | mask OFFCNT 0x0f | ||
325 | } | ||
326 | |||
327 | /* | ||
328 | * SCSI ID for the aic7890/91 chips | ||
329 | */ | ||
330 | register SCSIID_ULTRA2 { | ||
331 | address 0x00f | ||
332 | access_mode RW | ||
333 | mask TID 0xf0 /* Target ID mask */ | ||
334 | mask OID 0x0f /* Our ID mask */ | ||
335 | } | ||
336 | |||
337 | /* | ||
338 | * SCSI Interrupt Mode 1 (p. 3-28) | ||
339 | * Setting any bit will enable the corresponding function | ||
340 | * in SIMODE0 to interrupt via the IRQ pin. | ||
341 | */ | ||
342 | register SIMODE0 { | ||
343 | address 0x010 | ||
344 | access_mode RW | ||
345 | bit ENSELDO 0x40 | ||
346 | bit ENSELDI 0x20 | ||
347 | bit ENSELINGO 0x10 | ||
348 | bit ENSWRAP 0x08 | ||
349 | bit ENIOERR 0x08 /* LVD Tranceiver mode changes */ | ||
350 | bit ENSDONE 0x04 | ||
351 | bit ENSPIORDY 0x02 | ||
352 | bit ENDMADONE 0x01 | ||
353 | } | ||
354 | |||
355 | /* | ||
356 | * SCSI Interrupt Mode 1 (pp. 3-28,29) | ||
357 | * Setting any bit will enable the corresponding function | ||
358 | * in SIMODE1 to interrupt via the IRQ pin. | ||
359 | */ | ||
360 | register SIMODE1 { | ||
361 | address 0x011 | ||
362 | access_mode RW | ||
363 | bit ENSELTIMO 0x80 | ||
364 | bit ENATNTARG 0x40 | ||
365 | bit ENSCSIRST 0x20 | ||
366 | bit ENPHASEMIS 0x10 | ||
367 | bit ENBUSFREE 0x08 | ||
368 | bit ENSCSIPERR 0x04 | ||
369 | bit ENPHASECHG 0x02 | ||
370 | bit ENREQINIT 0x01 | ||
371 | } | ||
372 | |||
373 | /* | ||
374 | * SCSI Data Bus (High) (p. 3-29) | ||
375 | * This register reads data on the SCSI Data bus directly. | ||
376 | */ | ||
377 | register SCSIBUSL { | ||
378 | address 0x012 | ||
379 | access_mode RO | ||
380 | } | ||
381 | |||
382 | register SCSIBUSH { | ||
383 | address 0x013 | ||
384 | access_mode RO | ||
385 | } | ||
386 | |||
387 | /* | ||
388 | * SCSI/Host Address (p. 3-30) | ||
389 | * These registers hold the host address for the byte about to be | ||
390 | * transferred on the SCSI bus. They are counted up in the same | ||
391 | * manner as STCNT is counted down. SHADDR should always be used | ||
392 | * to determine the address of the last byte transferred since HADDR | ||
393 | * can be skewed by write ahead. | ||
394 | */ | ||
395 | register SHADDR { | ||
396 | address 0x014 | ||
397 | size 4 | ||
398 | access_mode RO | ||
399 | } | ||
400 | |||
401 | /* | ||
402 | * Selection Timeout Timer (p. 3-30) | ||
403 | */ | ||
404 | register SELTIMER { | ||
405 | address 0x018 | ||
406 | access_mode RW | ||
407 | bit STAGE6 0x20 | ||
408 | bit STAGE5 0x10 | ||
409 | bit STAGE4 0x08 | ||
410 | bit STAGE3 0x04 | ||
411 | bit STAGE2 0x02 | ||
412 | bit STAGE1 0x01 | ||
413 | } | ||
414 | |||
415 | /* | ||
416 | * Selection/Reselection ID (p. 3-31) | ||
417 | * Upper four bits are the device id. The ONEBIT is set when the re/selecting | ||
418 | * device did not set its own ID. | ||
419 | */ | ||
420 | register SELID { | ||
421 | address 0x019 | ||
422 | access_mode RW | ||
423 | mask SELID_MASK 0xf0 | ||
424 | bit ONEBIT 0x08 | ||
425 | } | ||
426 | |||
427 | /* | ||
428 | * Serial Port I/O Cabability register (p. 4-95 aic7860 Data Book) | ||
429 | * Indicates if external logic has been attached to the chip to | ||
430 | * perform the tasks of accessing a serial eeprom, testing termination | ||
431 | * strength, and performing cable detection. On the aic7860, most of | ||
432 | * these features are handled on chip, but on the aic7855 an attached | ||
433 | * aic3800 does the grunt work. | ||
434 | */ | ||
435 | register SPIOCAP { | ||
436 | address 0x01b | ||
437 | access_mode RW | ||
438 | bit SOFT1 0x80 | ||
439 | bit SOFT0 0x40 | ||
440 | bit SOFTCMDEN 0x20 | ||
441 | bit HAS_BRDCTL 0x10 /* External Board control */ | ||
442 | bit SEEPROM 0x08 /* External serial eeprom logic */ | ||
443 | bit EEPROM 0x04 /* Writable external BIOS ROM */ | ||
444 | bit ROM 0x02 /* Logic for accessing external ROM */ | ||
445 | bit SSPIOCPS 0x01 /* Termination and cable detection */ | ||
446 | } | ||
447 | |||
448 | /* | ||
449 | * SCSI Block Control (p. 3-32) | ||
450 | * Controls Bus type and channel selection. In a twin channel configuration | ||
451 | * addresses 0x00-0x1e are gated to the appropriate channel based on this | ||
452 | * register. SELWIDE allows for the coexistence of 8bit and 16bit devices | ||
453 | * on a wide bus. | ||
454 | */ | ||
455 | register SBLKCTL { | ||
456 | address 0x01f | ||
457 | access_mode RW | ||
458 | bit DIAGLEDEN 0x80 /* Aic78X0 only */ | ||
459 | bit DIAGLEDON 0x40 /* Aic78X0 only */ | ||
460 | bit AUTOFLUSHDIS 0x20 | ||
461 | bit SELBUSB 0x08 | ||
462 | bit ENAB40 0x08 /* LVD transceiver active */ | ||
463 | bit ENAB20 0x04 /* SE/HVD transceiver active */ | ||
464 | bit SELWIDE 0x02 | ||
465 | bit XCVR 0x01 /* External transceiver active */ | ||
466 | } | ||
467 | |||
468 | /* | ||
469 | * Sequencer Control (p. 3-33) | ||
470 | * Error detection mode and speed configuration | ||
471 | */ | ||
472 | register SEQCTL { | ||
473 | address 0x060 | ||
474 | access_mode RW | ||
475 | bit PERRORDIS 0x80 | ||
476 | bit PAUSEDIS 0x40 | ||
477 | bit FAILDIS 0x20 | ||
478 | bit FASTMODE 0x10 | ||
479 | bit BRKADRINTEN 0x08 | ||
480 | bit STEP 0x04 | ||
481 | bit SEQRESET 0x02 | ||
482 | bit LOADRAM 0x01 | ||
483 | } | ||
484 | |||
485 | /* | ||
486 | * Sequencer RAM Data (p. 3-34) | ||
487 | * Single byte window into the Scratch Ram area starting at the address | ||
488 | * specified by SEQADDR0 and SEQADDR1. To write a full word, simply write | ||
489 | * four bytes in succession. The SEQADDRs will increment after the most | ||
490 | * significant byte is written | ||
491 | */ | ||
492 | register SEQRAM { | ||
493 | address 0x061 | ||
494 | access_mode RW | ||
495 | } | ||
496 | |||
497 | /* | ||
498 | * Sequencer Address Registers (p. 3-35) | ||
499 | * Only the first bit of SEQADDR1 holds addressing information | ||
500 | */ | ||
501 | register SEQADDR0 { | ||
502 | address 0x062 | ||
503 | access_mode RW | ||
504 | } | ||
505 | |||
506 | register SEQADDR1 { | ||
507 | address 0x063 | ||
508 | access_mode RW | ||
509 | mask SEQADDR1_MASK 0x01 | ||
510 | } | ||
511 | |||
512 | /* | ||
513 | * Accumulator | ||
514 | * We cheat by passing arguments in the Accumulator up to the kernel driver | ||
515 | */ | ||
516 | register ACCUM { | ||
517 | address 0x064 | ||
518 | access_mode RW | ||
519 | accumulator | ||
520 | } | ||
521 | |||
522 | register SINDEX { | ||
523 | address 0x065 | ||
524 | access_mode RW | ||
525 | sindex | ||
526 | } | ||
527 | |||
528 | register DINDEX { | ||
529 | address 0x066 | ||
530 | access_mode RW | ||
531 | } | ||
532 | |||
533 | register ALLONES { | ||
534 | address 0x069 | ||
535 | access_mode RO | ||
536 | allones | ||
537 | } | ||
538 | |||
539 | register ALLZEROS { | ||
540 | address 0x06a | ||
541 | access_mode RO | ||
542 | allzeros | ||
543 | } | ||
544 | |||
545 | register NONE { | ||
546 | address 0x06a | ||
547 | access_mode WO | ||
548 | none | ||
549 | } | ||
550 | |||
551 | register FLAGS { | ||
552 | address 0x06b | ||
553 | access_mode RO | ||
554 | bit ZERO 0x02 | ||
555 | bit CARRY 0x01 | ||
556 | } | ||
557 | |||
558 | register SINDIR { | ||
559 | address 0x06c | ||
560 | access_mode RO | ||
561 | } | ||
562 | |||
563 | register DINDIR { | ||
564 | address 0x06d | ||
565 | access_mode WO | ||
566 | } | ||
567 | |||
568 | register FUNCTION1 { | ||
569 | address 0x06e | ||
570 | access_mode RW | ||
571 | } | ||
572 | |||
573 | register STACK { | ||
574 | address 0x06f | ||
575 | access_mode RO | ||
576 | } | ||
577 | |||
578 | /* | ||
579 | * Board Control (p. 3-43) | ||
580 | */ | ||
581 | register BCTL { | ||
582 | address 0x084 | ||
583 | access_mode RW | ||
584 | bit ACE 0x08 | ||
585 | bit ENABLE 0x01 | ||
586 | } | ||
587 | |||
588 | register DSCOMMAND0 { | ||
589 | address 0x084 | ||
590 | access_mode RW | ||
591 | bit CACHETHEN 0x80 | ||
592 | bit DPARCKEN 0x40 | ||
593 | bit MPARCKEN 0x20 | ||
594 | bit EXTREQLCK 0x10 | ||
595 | bit INTSCBRAMSEL 0x08 | ||
596 | bit RAMPS 0x04 | ||
597 | bit USCBSIZE32 0x02 | ||
598 | bit CIOPARCKEN 0x01 | ||
599 | } | ||
600 | |||
601 | /* | ||
602 | * On the aic78X0 chips, Board Control is replaced by the DSCommand | ||
603 | * register (p. 4-64) | ||
604 | */ | ||
605 | register DSCOMMAND { | ||
606 | address 0x084 | ||
607 | access_mode RW | ||
608 | bit CACHETHEN 0x80 /* Cache Threshold enable */ | ||
609 | bit DPARCKEN 0x40 /* Data Parity Check Enable */ | ||
610 | bit MPARCKEN 0x20 /* Memory Parity Check Enable */ | ||
611 | bit EXTREQLCK 0x10 /* External Request Lock */ | ||
612 | } | ||
613 | |||
614 | /* | ||
615 | * Bus On/Off Time (p. 3-44) | ||
616 | */ | ||
617 | register BUSTIME { | ||
618 | address 0x085 | ||
619 | access_mode RW | ||
620 | mask BOFF 0xf0 | ||
621 | mask BON 0x0f | ||
622 | } | ||
623 | |||
624 | /* | ||
625 | * Bus Speed (p. 3-45) | ||
626 | */ | ||
627 | register BUSSPD { | ||
628 | address 0x086 | ||
629 | access_mode RW | ||
630 | mask DFTHRSH 0xc0 | ||
631 | mask STBOFF 0x38 | ||
632 | mask STBON 0x07 | ||
633 | mask DFTHRSH_100 0xc0 | ||
634 | } | ||
635 | |||
636 | /* | ||
637 | * Host Control (p. 3-47) R/W | ||
638 | * Overall host control of the device. | ||
639 | */ | ||
640 | register HCNTRL { | ||
641 | address 0x087 | ||
642 | access_mode RW | ||
643 | bit POWRDN 0x40 | ||
644 | bit SWINT 0x10 | ||
645 | bit IRQMS 0x08 | ||
646 | bit PAUSE 0x04 | ||
647 | bit INTEN 0x02 | ||
648 | bit CHIPRST 0x01 | ||
649 | bit CHIPRSTACK 0x01 | ||
650 | } | ||
651 | |||
652 | /* | ||
653 | * Host Address (p. 3-48) | ||
654 | * This register contains the address of the byte about | ||
655 | * to be transferred across the host bus. | ||
656 | */ | ||
657 | register HADDR { | ||
658 | address 0x088 | ||
659 | size 4 | ||
660 | access_mode RW | ||
661 | } | ||
662 | |||
663 | register HCNT { | ||
664 | address 0x08c | ||
665 | size 3 | ||
666 | access_mode RW | ||
667 | } | ||
668 | |||
669 | /* | ||
670 | * SCB Pointer (p. 3-49) | ||
671 | * Gate one of the four SCBs into the SCBARRAY window. | ||
672 | */ | ||
673 | register SCBPTR { | ||
674 | address 0x090 | ||
675 | access_mode RW | ||
676 | } | ||
677 | |||
678 | /* | ||
679 | * Interrupt Status (p. 3-50) | ||
680 | * Status for system interrupts | ||
681 | */ | ||
682 | register INTSTAT { | ||
683 | address 0x091 | ||
684 | access_mode RW | ||
685 | bit BRKADRINT 0x08 | ||
686 | bit SCSIINT 0x04 | ||
687 | bit CMDCMPLT 0x02 | ||
688 | bit SEQINT 0x01 | ||
689 | mask BAD_PHASE SEQINT /* unknown scsi bus phase */ | ||
690 | mask SEND_REJECT 0x10|SEQINT /* sending a message reject */ | ||
691 | mask NO_IDENT 0x20|SEQINT /* no IDENTIFY after reconnect*/ | ||
692 | mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */ | ||
693 | mask EXTENDED_MSG 0x40|SEQINT /* Extended message received */ | ||
694 | mask WIDE_RESIDUE 0x50|SEQINT /* need kernel to back up */ | ||
695 | /* the SG array for us */ | ||
696 | mask REJECT_MSG 0x60|SEQINT /* Reject message received */ | ||
697 | mask BAD_STATUS 0x70|SEQINT /* Bad status from target */ | ||
698 | mask RESIDUAL 0x80|SEQINT /* Residual byte count != 0 */ | ||
699 | mask AWAITING_MSG 0xa0|SEQINT /* | ||
700 | * Kernel requested to specify | ||
701 | * a message to this target | ||
702 | * (command was null), so tell | ||
703 | * it that it can fill the | ||
704 | * message buffer. | ||
705 | */ | ||
706 | mask SEQ_SG_FIXUP 0xb0|SEQINT /* need help with fixing up | ||
707 | * the sg array pointer after | ||
708 | * a phasemis with no valid | ||
709 | * sg elements in the shadow | ||
710 | * pipeline. | ||
711 | */ | ||
712 | mask TRACEPOINT2 0xc0|SEQINT | ||
713 | mask MSGIN_PHASEMIS 0xd0|SEQINT /* | ||
714 | * Target changed phase on us | ||
715 | * when we were expecting | ||
716 | * another msgin byte. | ||
717 | */ | ||
718 | mask DATA_OVERRUN 0xe0|SEQINT /* | ||
719 | * Target attempted to write | ||
720 | * beyond the bounds of its | ||
721 | * command. | ||
722 | */ | ||
723 | |||
724 | mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */ | ||
725 | mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT) | ||
726 | } | ||
727 | |||
728 | /* | ||
729 | * Hard Error (p. 3-53) | ||
730 | * Reporting of catastrophic errors. You usually cannot recover from | ||
731 | * these without a full board reset. | ||
732 | */ | ||
733 | register ERROR { | ||
734 | address 0x092 | ||
735 | access_mode RO | ||
736 | bit CIOPARERR 0x80 /* Ultra2 only */ | ||
737 | bit PCIERRSTAT 0x40 /* PCI only */ | ||
738 | bit MPARERR 0x20 /* PCI only */ | ||
739 | bit DPARERR 0x10 /* PCI only */ | ||
740 | bit SQPARERR 0x08 | ||
741 | bit ILLOPCODE 0x04 | ||
742 | bit ILLSADDR 0x02 | ||
743 | bit DSCTMOUT 0x02 /* Ultra3 only */ | ||
744 | bit ILLHADDR 0x01 | ||
745 | } | ||
746 | |||
747 | /* | ||
748 | * Clear Interrupt Status (p. 3-52) | ||
749 | */ | ||
750 | register CLRINT { | ||
751 | address 0x092 | ||
752 | access_mode WO | ||
753 | bit CLRPARERR 0x10 /* PCI only */ | ||
754 | bit CLRBRKADRINT 0x08 | ||
755 | bit CLRSCSIINT 0x04 | ||
756 | bit CLRCMDINT 0x02 | ||
757 | bit CLRSEQINT 0x01 | ||
758 | } | ||
759 | |||
760 | register DFCNTRL { | ||
761 | address 0x093 | ||
762 | access_mode RW | ||
763 | bit PRELOADEN 0x80 /* aic7890 only */ | ||
764 | bit WIDEODD 0x40 | ||
765 | bit SCSIEN 0x20 | ||
766 | bit SDMAEN 0x10 | ||
767 | bit SDMAENACK 0x10 | ||
768 | bit HDMAEN 0x08 | ||
769 | bit HDMAENACK 0x08 | ||
770 | bit DIRECTION 0x04 | ||
771 | bit FIFOFLUSH 0x02 | ||
772 | bit FIFORESET 0x01 | ||
773 | } | ||
774 | |||
775 | register DFSTATUS { | ||
776 | address 0x094 | ||
777 | access_mode RO | ||
778 | bit PRELOAD_AVAIL 0x80 | ||
779 | bit DWORDEMP 0x20 | ||
780 | bit MREQPEND 0x10 | ||
781 | bit HDONE 0x08 | ||
782 | bit DFTHRESH 0x04 | ||
783 | bit FIFOFULL 0x02 | ||
784 | bit FIFOEMP 0x01 | ||
785 | } | ||
786 | |||
787 | register DFDAT { | ||
788 | address 0x099 | ||
789 | access_mode RW | ||
790 | } | ||
791 | |||
792 | /* | ||
793 | * SCB Auto Increment (p. 3-59) | ||
794 | * Byte offset into the SCB Array and an optional bit to allow auto | ||
795 | * incrementing of the address during download and upload operations | ||
796 | */ | ||
797 | register SCBCNT { | ||
798 | address 0x09a | ||
799 | access_mode RW | ||
800 | bit SCBAUTO 0x80 | ||
801 | mask SCBCNT_MASK 0x1f | ||
802 | } | ||
803 | |||
804 | /* | ||
805 | * Queue In FIFO (p. 3-60) | ||
806 | * Input queue for queued SCBs (commands that the seqencer has yet to start) | ||
807 | */ | ||
808 | register QINFIFO { | ||
809 | address 0x09b | ||
810 | access_mode RW | ||
811 | } | ||
812 | |||
813 | /* | ||
814 | * Queue In Count (p. 3-60) | ||
815 | * Number of queued SCBs | ||
816 | */ | ||
817 | register QINCNT { | ||
818 | address 0x09c | ||
819 | access_mode RO | ||
820 | } | ||
821 | |||
822 | /* | ||
823 | * SCSIDATL IMAGE Register (p. 5-104) | ||
824 | * Write to this register also go to SCSIDATL but this register will preserve | ||
825 | * the data for later reading as long as the SCSIDATL_IMGEN bit in the | ||
826 | * OPTIONMODE register is set. | ||
827 | */ | ||
828 | register SCSIDATL_IMG { | ||
829 | address 0x09c | ||
830 | access_mode RW | ||
831 | } | ||
832 | |||
833 | /* | ||
834 | * Queue Out FIFO (p. 3-61) | ||
835 | * Queue of SCBs that have completed and await the host | ||
836 | */ | ||
837 | register QOUTFIFO { | ||
838 | address 0x09d | ||
839 | access_mode WO | ||
840 | } | ||
841 | |||
842 | /* | ||
843 | * CRC Control 1 Register (p. 5-105) | ||
844 | * Control bits for the Ultra 160/m CRC facilities | ||
845 | */ | ||
846 | register CRCCONTROL1 { | ||
847 | address 0x09d | ||
848 | access_mode RW | ||
849 | bit CRCONSEEN 0x80 /* CRC ON Single Edge ENable */ | ||
850 | bit CRCVALCHKEN 0x40 /* CRC Value Check Enable */ | ||
851 | bit CRCENDCHKEN 0x20 /* CRC End Check Enable */ | ||
852 | bit CRCREQCHKEN 0x10 | ||
853 | bit TARGCRCENDEN 0x08 /* Enable End CRC transfer when target */ | ||
854 | bit TARGCRCCNTEN 0x04 /* Enable CRC transfer when target */ | ||
855 | } | ||
856 | |||
857 | /* | ||
858 | * Queue Out Count (p. 3-61) | ||
859 | * Number of queued SCBs in the Out FIFO | ||
860 | */ | ||
861 | register QOUTCNT { | ||
862 | address 0x09e | ||
863 | access_mode RO | ||
864 | } | ||
865 | |||
866 | /* | ||
867 | * SCSI Phase Register (p. 5-106) | ||
868 | * Current bus phase | ||
869 | */ | ||
870 | register SCSIPHASE { | ||
871 | address 0x09e | ||
872 | access_mode RO | ||
873 | bit SP_STATUS 0x20 | ||
874 | bit SP_COMMAND 0x10 | ||
875 | bit SP_MSG_IN 0x08 | ||
876 | bit SP_MSG_OUT 0x04 | ||
877 | bit SP_DATA_IN 0x02 | ||
878 | bit SP_DATA_OUT 0x01 | ||
879 | } | ||
880 | |||
881 | /* | ||
882 | * Special Function | ||
883 | */ | ||
884 | register SFUNCT { | ||
885 | address 0x09f | ||
886 | access_mode RW | ||
887 | bit ALT_MODE 0x80 | ||
888 | } | ||
889 | |||
890 | /* | ||
891 | * SCB Definition (p. 5-4) | ||
892 | */ | ||
893 | scb { | ||
894 | address 0x0a0 | ||
895 | SCB_CONTROL { | ||
896 | size 1 | ||
897 | bit MK_MESSAGE 0x80 | ||
898 | bit DISCENB 0x40 | ||
899 | bit TAG_ENB 0x20 | ||
900 | bit DISCONNECTED 0x04 | ||
901 | mask SCB_TAG_TYPE 0x03 | ||
902 | } | ||
903 | SCB_TCL { | ||
904 | size 1 | ||
905 | bit SELBUSB 0x08 | ||
906 | mask TID 0xf0 | ||
907 | mask LID 0x07 | ||
908 | } | ||
909 | SCB_TARGET_STATUS { | ||
910 | size 1 | ||
911 | } | ||
912 | SCB_SGCOUNT { | ||
913 | size 1 | ||
914 | } | ||
915 | SCB_SGPTR { | ||
916 | size 4 | ||
917 | } | ||
918 | SCB_RESID_SGCNT { | ||
919 | size 1 | ||
920 | } | ||
921 | SCB_RESID_DCNT { | ||
922 | size 3 | ||
923 | } | ||
924 | SCB_DATAPTR { | ||
925 | size 4 | ||
926 | } | ||
927 | SCB_DATACNT { | ||
928 | /* | ||
929 | * Really only 3 bytes, but padded to make | ||
930 | * the kernel's job easier. | ||
931 | */ | ||
932 | size 4 | ||
933 | } | ||
934 | SCB_CMDPTR { | ||
935 | size 4 | ||
936 | } | ||
937 | SCB_CMDLEN { | ||
938 | size 1 | ||
939 | } | ||
940 | SCB_TAG { | ||
941 | size 1 | ||
942 | } | ||
943 | SCB_NEXT { | ||
944 | size 1 | ||
945 | } | ||
946 | SCB_PREV { | ||
947 | size 1 | ||
948 | } | ||
949 | SCB_BUSYTARGETS { | ||
950 | size 4 | ||
951 | } | ||
952 | } | ||
953 | |||
954 | const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */ | ||
955 | |||
956 | /* --------------------- AHA-2840-only definitions -------------------- */ | ||
957 | |||
958 | register SEECTL_2840 { | ||
959 | address 0x0c0 | ||
960 | access_mode RW | ||
961 | bit CS_2840 0x04 | ||
962 | bit CK_2840 0x02 | ||
963 | bit DO_2840 0x01 | ||
964 | } | ||
965 | |||
966 | register STATUS_2840 { | ||
967 | address 0x0c1 | ||
968 | access_mode RW | ||
969 | bit EEPROM_TF 0x80 | ||
970 | mask BIOS_SEL 0x60 | ||
971 | mask ADSEL 0x1e | ||
972 | bit DI_2840 0x01 | ||
973 | } | ||
974 | |||
975 | /* --------------------- AIC-7870-only definitions -------------------- */ | ||
976 | |||
977 | register DSPCISTATUS { | ||
978 | address 0x086 | ||
979 | mask DFTHRSH_100 0xc0 | ||
980 | } | ||
981 | |||
982 | register CCHADDR { | ||
983 | address 0x0E0 | ||
984 | size 8 | ||
985 | } | ||
986 | |||
987 | register CCHCNT { | ||
988 | address 0x0E8 | ||
989 | } | ||
990 | |||
991 | register CCSGRAM { | ||
992 | address 0x0E9 | ||
993 | } | ||
994 | |||
995 | register CCSGADDR { | ||
996 | address 0x0EA | ||
997 | } | ||
998 | |||
999 | register CCSGCTL { | ||
1000 | address 0x0EB | ||
1001 | bit CCSGDONE 0x80 | ||
1002 | bit CCSGEN 0x08 | ||
1003 | bit FLAG 0x02 | ||
1004 | bit CCSGRESET 0x01 | ||
1005 | } | ||
1006 | |||
1007 | register CCSCBCNT { | ||
1008 | address 0xEF | ||
1009 | } | ||
1010 | |||
1011 | register CCSCBCTL { | ||
1012 | address 0x0EE | ||
1013 | bit CCSCBDONE 0x80 | ||
1014 | bit ARRDONE 0x40 /* SCB Array prefetch done */ | ||
1015 | bit CCARREN 0x10 | ||
1016 | bit CCSCBEN 0x08 | ||
1017 | bit CCSCBDIR 0x04 | ||
1018 | bit CCSCBRESET 0x01 | ||
1019 | } | ||
1020 | |||
1021 | register CCSCBADDR { | ||
1022 | address 0x0ED | ||
1023 | } | ||
1024 | |||
1025 | register CCSCBRAM { | ||
1026 | address 0xEC | ||
1027 | } | ||
1028 | |||
1029 | register CCSCBPTR { | ||
1030 | address 0x0F1 | ||
1031 | } | ||
1032 | |||
1033 | register HNSCB_QOFF { | ||
1034 | address 0x0F4 | ||
1035 | } | ||
1036 | |||
1037 | register HESCB_QOFF { | ||
1038 | address 0x0F5 | ||
1039 | } | ||
1040 | |||
1041 | register SNSCB_QOFF { | ||
1042 | address 0x0F6 | ||
1043 | } | ||
1044 | |||
1045 | register SESCB_QOFF { | ||
1046 | address 0x0F7 | ||
1047 | } | ||
1048 | |||
1049 | register SDSCB_QOFF { | ||
1050 | address 0x0F8 | ||
1051 | } | ||
1052 | |||
1053 | register QOFF_CTLSTA { | ||
1054 | address 0x0FA | ||
1055 | bit ESTABLISH_SCB_AVAIL 0x80 | ||
1056 | bit SCB_AVAIL 0x40 | ||
1057 | bit SNSCB_ROLLOVER 0x20 | ||
1058 | bit SDSCB_ROLLOVER 0x10 | ||
1059 | bit SESCB_ROLLOVER 0x08 | ||
1060 | mask SCB_QSIZE 0x07 | ||
1061 | mask SCB_QSIZE_256 0x06 | ||
1062 | } | ||
1063 | |||
1064 | register DFF_THRSH { | ||
1065 | address 0x0FB | ||
1066 | mask WR_DFTHRSH 0x70 | ||
1067 | mask RD_DFTHRSH 0x07 | ||
1068 | mask RD_DFTHRSH_MIN 0x00 | ||
1069 | mask RD_DFTHRSH_25 0x01 | ||
1070 | mask RD_DFTHRSH_50 0x02 | ||
1071 | mask RD_DFTHRSH_63 0x03 | ||
1072 | mask RD_DFTHRSH_75 0x04 | ||
1073 | mask RD_DFTHRSH_85 0x05 | ||
1074 | mask RD_DFTHRSH_90 0x06 | ||
1075 | mask RD_DFTHRSH_MAX 0x07 | ||
1076 | mask WR_DFTHRSH_MIN 0x00 | ||
1077 | mask WR_DFTHRSH_25 0x10 | ||
1078 | mask WR_DFTHRSH_50 0x20 | ||
1079 | mask WR_DFTHRSH_63 0x30 | ||
1080 | mask WR_DFTHRSH_75 0x40 | ||
1081 | mask WR_DFTHRSH_85 0x50 | ||
1082 | mask WR_DFTHRSH_90 0x60 | ||
1083 | mask WR_DFTHRSH_MAX 0x70 | ||
1084 | } | ||
1085 | |||
1086 | register SG_CACHEPTR { | ||
1087 | access_mode RW | ||
1088 | address 0x0fc | ||
1089 | mask SG_USER_DATA 0xfc | ||
1090 | bit LAST_SEG 0x02 | ||
1091 | bit LAST_SEG_DONE 0x01 | ||
1092 | } | ||
1093 | |||
1094 | register BRDCTL { | ||
1095 | address 0x01d | ||
1096 | bit BRDDAT7 0x80 | ||
1097 | bit BRDDAT6 0x40 | ||
1098 | bit BRDDAT5 0x20 | ||
1099 | bit BRDSTB 0x10 | ||
1100 | bit BRDCS 0x08 | ||
1101 | bit BRDRW 0x04 | ||
1102 | bit BRDCTL1 0x02 | ||
1103 | bit BRDCTL0 0x01 | ||
1104 | /* 7890 Definitions */ | ||
1105 | bit BRDDAT4 0x10 | ||
1106 | bit BRDDAT3 0x08 | ||
1107 | bit BRDDAT2 0x04 | ||
1108 | bit BRDRW_ULTRA2 0x02 | ||
1109 | bit BRDSTB_ULTRA2 0x01 | ||
1110 | } | ||
1111 | |||
1112 | /* | ||
1113 | * Serial EEPROM Control (p. 4-92 in 7870 Databook) | ||
1114 | * Controls the reading and writing of an external serial 1-bit | ||
1115 | * EEPROM Device. In order to access the serial EEPROM, you must | ||
1116 | * first set the SEEMS bit that generates a request to the memory | ||
1117 | * port for access to the serial EEPROM device. When the memory | ||
1118 | * port is not busy servicing another request, it reconfigures | ||
1119 | * to allow access to the serial EEPROM. When this happens, SEERDY | ||
1120 | * gets set high to verify that the memory port access has been | ||
1121 | * granted. | ||
1122 | * | ||
1123 | * After successful arbitration for the memory port, the SEECS bit of | ||
1124 | * the SEECTL register is connected to the chip select. The SEECK, | ||
1125 | * SEEDO, and SEEDI are connected to the clock, data out, and data in | ||
1126 | * lines respectively. The SEERDY bit of SEECTL is useful in that it | ||
1127 | * gives us an 800 nsec timer. After a write to the SEECTL register, | ||
1128 | * the SEERDY goes high 800 nsec later. The one exception to this is | ||
1129 | * when we first request access to the memory port. The SEERDY goes | ||
1130 | * high to signify that access has been granted and, for this case, has | ||
1131 | * no implied timing. | ||
1132 | * | ||
1133 | * See 93cx6.c for detailed information on the protocol necessary to | ||
1134 | * read the serial EEPROM. | ||
1135 | */ | ||
1136 | register SEECTL { | ||
1137 | address 0x01e | ||
1138 | bit EXTARBACK 0x80 | ||
1139 | bit EXTARBREQ 0x40 | ||
1140 | bit SEEMS 0x20 | ||
1141 | bit SEERDY 0x10 | ||
1142 | bit SEECS 0x08 | ||
1143 | bit SEECK 0x04 | ||
1144 | bit SEEDO 0x02 | ||
1145 | bit SEEDI 0x01 | ||
1146 | } | ||
1147 | /* ---------------------- Scratch RAM Offsets ------------------------- */ | ||
1148 | /* These offsets are either to values that are initialized by the board's | ||
1149 | * BIOS or are specified by the sequencer code. | ||
1150 | * | ||
1151 | * The host adapter card (at least the BIOS) uses 20-2f for SCSI | ||
1152 | * device information, 32-33 and 5a-5f as well. As it turns out, the | ||
1153 | * BIOS trashes 20-2f, writing the synchronous negotiation results | ||
1154 | * on top of the BIOS values, so we re-use those for our per-target | ||
1155 | * scratchspace (actually a value that can be copied directly into | ||
1156 | * SCSIRATE). The kernel driver will enable synchronous negotiation | ||
1157 | * for all targets that have a value other than 0 in the lower four | ||
1158 | * bits of the target scratch space. This should work regardless of | ||
1159 | * whether the bios has been installed. | ||
1160 | */ | ||
1161 | |||
1162 | scratch_ram { | ||
1163 | address 0x020 | ||
1164 | |||
1165 | /* | ||
1166 | * 1 byte per target starting at this address for configuration values | ||
1167 | */ | ||
1168 | TARG_SCSIRATE { | ||
1169 | size 16 | ||
1170 | } | ||
1171 | /* | ||
1172 | * Bit vector of targets that have ULTRA enabled. | ||
1173 | */ | ||
1174 | ULTRA_ENB { | ||
1175 | size 2 | ||
1176 | } | ||
1177 | /* | ||
1178 | * Bit vector of targets that have disconnection disabled. | ||
1179 | */ | ||
1180 | DISC_DSB { | ||
1181 | size 2 | ||
1182 | } | ||
1183 | /* | ||
1184 | * Single byte buffer used to designate the type or message | ||
1185 | * to send to a target. | ||
1186 | */ | ||
1187 | MSG_OUT { | ||
1188 | size 1 | ||
1189 | } | ||
1190 | /* Parameters for DMA Logic */ | ||
1191 | DMAPARAMS { | ||
1192 | size 1 | ||
1193 | bit PRELOADEN 0x80 | ||
1194 | bit WIDEODD 0x40 | ||
1195 | bit SCSIEN 0x20 | ||
1196 | bit SDMAEN 0x10 | ||
1197 | bit SDMAENACK 0x10 | ||
1198 | bit HDMAEN 0x08 | ||
1199 | bit HDMAENACK 0x08 | ||
1200 | bit DIRECTION 0x04 | ||
1201 | bit FIFOFLUSH 0x02 | ||
1202 | bit FIFORESET 0x01 | ||
1203 | } | ||
1204 | SEQ_FLAGS { | ||
1205 | size 1 | ||
1206 | bit IDENTIFY_SEEN 0x80 | ||
1207 | bit SCBPTR_VALID 0x20 | ||
1208 | bit DPHASE 0x10 | ||
1209 | bit AMTARGET 0x08 | ||
1210 | bit WIDE_BUS 0x02 | ||
1211 | bit TWIN_BUS 0x01 | ||
1212 | } | ||
1213 | /* | ||
1214 | * Temporary storage for the | ||
1215 | * target/channel/lun of a | ||
1216 | * reconnecting target | ||
1217 | */ | ||
1218 | SAVED_TCL { | ||
1219 | size 1 | ||
1220 | } | ||
1221 | /* Working value of the number of SG segments left */ | ||
1222 | SG_COUNT { | ||
1223 | size 1 | ||
1224 | } | ||
1225 | /* Working value of SG pointer */ | ||
1226 | SG_NEXT { | ||
1227 | size 4 | ||
1228 | } | ||
1229 | /* | ||
1230 | * The last bus phase as seen by the sequencer. | ||
1231 | */ | ||
1232 | LASTPHASE { | ||
1233 | size 1 | ||
1234 | bit CDI 0x80 | ||
1235 | bit IOI 0x40 | ||
1236 | bit MSGI 0x20 | ||
1237 | mask PHASE_MASK CDI|IOI|MSGI | ||
1238 | mask P_DATAOUT 0x00 | ||
1239 | mask P_DATAIN IOI | ||
1240 | mask P_COMMAND CDI | ||
1241 | mask P_MESGOUT CDI|MSGI | ||
1242 | mask P_STATUS CDI|IOI | ||
1243 | mask P_MESGIN CDI|IOI|MSGI | ||
1244 | mask P_BUSFREE 0x01 | ||
1245 | } | ||
1246 | /* | ||
1247 | * head of list of SCBs awaiting | ||
1248 | * selection | ||
1249 | */ | ||
1250 | WAITING_SCBH { | ||
1251 | size 1 | ||
1252 | } | ||
1253 | /* | ||
1254 | * head of list of SCBs that are | ||
1255 | * disconnected. Used for SCB | ||
1256 | * paging. | ||
1257 | */ | ||
1258 | DISCONNECTED_SCBH { | ||
1259 | size 1 | ||
1260 | } | ||
1261 | /* | ||
1262 | * head of list of SCBs that are | ||
1263 | * not in use. Used for SCB paging. | ||
1264 | */ | ||
1265 | FREE_SCBH { | ||
1266 | size 1 | ||
1267 | } | ||
1268 | /* | ||
1269 | * Address of the hardware scb array in the host. | ||
1270 | */ | ||
1271 | HSCB_ADDR { | ||
1272 | size 4 | ||
1273 | } | ||
1274 | /* | ||
1275 | * Address of the 256 byte array storing the SCBID of outstanding | ||
1276 | * untagged SCBs indexed by TCL. | ||
1277 | */ | ||
1278 | SCBID_ADDR { | ||
1279 | size 4 | ||
1280 | } | ||
1281 | /* | ||
1282 | * Address of the array of command descriptors used to store | ||
1283 | * information about incoming selections. | ||
1284 | */ | ||
1285 | TMODE_CMDADDR { | ||
1286 | size 4 | ||
1287 | } | ||
1288 | KERNEL_QINPOS { | ||
1289 | size 1 | ||
1290 | } | ||
1291 | QINPOS { | ||
1292 | size 1 | ||
1293 | } | ||
1294 | QOUTPOS { | ||
1295 | size 1 | ||
1296 | } | ||
1297 | /* | ||
1298 | * Offset into the command descriptor array for the next | ||
1299 | * available desciptor to use. | ||
1300 | */ | ||
1301 | TMODE_CMDADDR_NEXT { | ||
1302 | size 1 | ||
1303 | } | ||
1304 | ARG_1 { | ||
1305 | size 1 | ||
1306 | mask SEND_MSG 0x80 | ||
1307 | mask SEND_SENSE 0x40 | ||
1308 | mask SEND_REJ 0x20 | ||
1309 | mask MSGOUT_PHASEMIS 0x10 | ||
1310 | alias RETURN_1 | ||
1311 | } | ||
1312 | ARG_2 { | ||
1313 | size 1 | ||
1314 | alias RETURN_2 | ||
1315 | } | ||
1316 | |||
1317 | /* | ||
1318 | * Snapshot of MSG_OUT taken after each message is sent. | ||
1319 | */ | ||
1320 | LAST_MSG { | ||
1321 | size 1 | ||
1322 | } | ||
1323 | |||
1324 | /* | ||
1325 | * Number of times we have filled the CCSGRAM with prefetched | ||
1326 | * SG elements. | ||
1327 | */ | ||
1328 | PREFETCH_CNT { | ||
1329 | size 1 | ||
1330 | } | ||
1331 | |||
1332 | |||
1333 | /* | ||
1334 | * These are reserved registers in the card's scratch ram. Some of | ||
1335 | * the values are specified in the AHA2742 technical reference manual | ||
1336 | * and are initialized by the BIOS at boot time. | ||
1337 | */ | ||
1338 | SCSICONF { | ||
1339 | address 0x05a | ||
1340 | size 1 | ||
1341 | bit TERM_ENB 0x80 | ||
1342 | bit RESET_SCSI 0x40 | ||
1343 | mask HSCSIID 0x07 /* our SCSI ID */ | ||
1344 | mask HWSCSIID 0x0f /* our SCSI ID if Wide Bus */ | ||
1345 | } | ||
1346 | HOSTCONF { | ||
1347 | address 0x05d | ||
1348 | size 1 | ||
1349 | } | ||
1350 | HA_274_BIOSCTRL { | ||
1351 | address 0x05f | ||
1352 | size 1 | ||
1353 | mask BIOSMODE 0x30 | ||
1354 | mask BIOSDISABLED 0x30 | ||
1355 | bit CHANNEL_B_PRIMARY 0x08 | ||
1356 | } | ||
1357 | /* | ||
1358 | * Per target SCSI offset values for Ultra2 controllers. | ||
1359 | */ | ||
1360 | TARG_OFFSET { | ||
1361 | address 0x070 | ||
1362 | size 16 | ||
1363 | } | ||
1364 | } | ||
1365 | |||
1366 | const SCB_LIST_NULL 0xff | ||
1367 | |||
1368 | const CCSGADDR_MAX 0x80 | ||
1369 | const CCSGRAM_MAXSEGS 16 | ||
1370 | |||
1371 | /* Offsets into the SCBID array where different data is stored */ | ||
1372 | const UNTAGGEDSCB_OFFSET 0 | ||
1373 | const QOUTFIFO_OFFSET 1 | ||
1374 | const QINFIFO_OFFSET 2 | ||
1375 | |||
1376 | /* WDTR Message values */ | ||
1377 | const BUS_8_BIT 0x00 | ||
1378 | const BUS_16_BIT 0x01 | ||
1379 | const BUS_32_BIT 0x02 | ||
1380 | |||
1381 | /* Offset maximums */ | ||
1382 | const MAX_OFFSET_8BIT 0x0f | ||
1383 | const MAX_OFFSET_16BIT 0x08 | ||
1384 | const MAX_OFFSET_ULTRA2 0x7f | ||
1385 | const HOST_MSG 0xff | ||
1386 | |||
1387 | /* Target mode command processing constants */ | ||
1388 | const CMD_GROUP_CODE_SHIFT 0x05 | ||
1389 | const CMD_GROUP0_BYTE_DELTA -4 | ||
1390 | const CMD_GROUP2_BYTE_DELTA -6 | ||
1391 | const CMD_GROUP4_BYTE_DELTA 4 | ||
1392 | const CMD_GROUP5_BYTE_DELTA 11 | ||
1393 | |||
1394 | /* | ||
1395 | * Downloaded (kernel inserted) constants | ||
1396 | */ | ||
1397 | |||
1398 | /* | ||
1399 | * Number of command descriptors in the command descriptor array. | ||
1400 | */ | ||
1401 | const TMODE_NUMCMDS download | ||
diff --git a/drivers/scsi/aic7xxx_old/aic7xxx.seq b/drivers/scsi/aic7xxx_old/aic7xxx.seq deleted file mode 100644 index dc3bb81cff0c..000000000000 --- a/drivers/scsi/aic7xxx_old/aic7xxx.seq +++ /dev/null | |||
@@ -1,1539 +0,0 @@ | |||
1 | /* | ||
2 | * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD. | ||
3 | * | ||
4 | * Copyright (c) 1994-1999 Justin Gibbs. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * Redistribution and use in source and binary forms, with or without | ||
8 | * modification, are permitted provided that the following conditions | ||
9 | * are met: | ||
10 | * 1. Redistributions of source code must retain the above copyright | ||
11 | * notice, this list of conditions, and the following disclaimer, | ||
12 | * without modification, immediately at the beginning of the file. | ||
13 | * 2. The name of the author may not be used to endorse or promote products | ||
14 | * derived from this software without specific prior written permission. | ||
15 | * | ||
16 | * Where this Software is combined with software released under the terms of | ||
17 | * the GNU General Public License (GPL) and the terms of the GPL would require the | ||
18 | * combined work to also be released under the terms of the GPL, the terms | ||
19 | * and conditions of this License will apply in addition to those of the | ||
20 | * GPL with the exception of any terms or conditions of this License that | ||
21 | * conflict with, or are expressly prohibited by, the GPL. | ||
22 | * | ||
23 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | ||
24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
26 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR | ||
27 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||
28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | ||
29 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
30 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
31 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||
32 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | ||
33 | * SUCH DAMAGE. | ||
34 | * | ||
35 | * $Id: aic7xxx.seq,v 1.77 1998/06/28 02:58:57 gibbs Exp $ | ||
36 | */ | ||
37 | |||
38 | #include "aic7xxx.reg" | ||
39 | #include "scsi_message.h" | ||
40 | |||
41 | /* | ||
42 | * A few words on the waiting SCB list: | ||
43 | * After starting the selection hardware, we check for reconnecting targets | ||
44 | * as well as for our selection to complete just in case the reselection wins | ||
45 | * bus arbitration. The problem with this is that we must keep track of the | ||
46 | * SCB that we've already pulled from the QINFIFO and started the selection | ||
47 | * on just in case the reselection wins so that we can retry the selection at | ||
48 | * a later time. This problem cannot be resolved by holding a single entry | ||
49 | * in scratch ram since a reconnecting target can request sense and this will | ||
50 | * create yet another SCB waiting for selection. The solution used here is to | ||
51 | * use byte 27 of the SCB as a pseudo-next pointer and to thread a list | ||
52 | * of SCBs that are awaiting selection. Since 0-0xfe are valid SCB indexes, | ||
53 | * SCB_LIST_NULL is 0xff which is out of range. An entry is also added to | ||
54 | * this list every time a request sense occurs or after completing a non-tagged | ||
55 | * command for which a second SCB has been queued. The sequencer will | ||
56 | * automatically consume the entries. | ||
57 | */ | ||
58 | |||
59 | reset: | ||
60 | clr SCSISIGO; /* De-assert BSY */ | ||
61 | and SXFRCTL1, ~BITBUCKET; | ||
62 | /* Always allow reselection */ | ||
63 | mvi SCSISEQ, ENRSELI|ENAUTOATNP; | ||
64 | |||
65 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
66 | /* Ensure that no DMA operations are in progress */ | ||
67 | clr CCSGCTL; | ||
68 | clr CCSCBCTL; | ||
69 | } | ||
70 | |||
71 | call clear_target_state; | ||
72 | poll_for_work: | ||
73 | and SXFRCTL0, ~SPIOEN; | ||
74 | if ((p->features & AHC_QUEUE_REGS) == 0) { | ||
75 | mov A, QINPOS; | ||
76 | } | ||
77 | poll_for_work_loop: | ||
78 | if ((p->features & AHC_QUEUE_REGS) == 0) { | ||
79 | and SEQCTL, ~PAUSEDIS; | ||
80 | } | ||
81 | test SSTAT0, SELDO|SELDI jnz selection; | ||
82 | test SCSISEQ, ENSELO jnz poll_for_work; | ||
83 | if ((p->features & AHC_TWIN) != 0) { | ||
84 | /* | ||
85 | * Twin channel devices cannot handle things like SELTO | ||
86 | * interrupts on the "background" channel. So, if we | ||
87 | * are selecting, keep polling the current channel util | ||
88 | * either a selection or reselection occurs. | ||
89 | */ | ||
90 | xor SBLKCTL,SELBUSB; /* Toggle to the other bus */ | ||
91 | test SSTAT0, SELDO|SELDI jnz selection; | ||
92 | test SCSISEQ, ENSELO jnz poll_for_work; | ||
93 | xor SBLKCTL,SELBUSB; /* Toggle back */ | ||
94 | } | ||
95 | cmp WAITING_SCBH,SCB_LIST_NULL jne start_waiting; | ||
96 | test_queue: | ||
97 | /* Has the driver posted any work for us? */ | ||
98 | if ((p->features & AHC_QUEUE_REGS) != 0) { | ||
99 | test QOFF_CTLSTA, SCB_AVAIL jz poll_for_work_loop; | ||
100 | mov NONE, SNSCB_QOFF; | ||
101 | inc QINPOS; | ||
102 | } else { | ||
103 | or SEQCTL, PAUSEDIS; | ||
104 | cmp KERNEL_QINPOS, A je poll_for_work_loop; | ||
105 | inc QINPOS; | ||
106 | and SEQCTL, ~PAUSEDIS; | ||
107 | } | ||
108 | |||
109 | /* | ||
110 | * We have at least one queued SCB now and we don't have any | ||
111 | * SCBs in the list of SCBs awaiting selection. If we have | ||
112 | * any SCBs available for use, pull the tag from the QINFIFO | ||
113 | * and get to work on it. | ||
114 | */ | ||
115 | if ((p->flags & AHC_PAGESCBS) != 0) { | ||
116 | mov ALLZEROS call get_free_or_disc_scb; | ||
117 | } | ||
118 | |||
119 | dequeue_scb: | ||
120 | add A, -1, QINPOS; | ||
121 | mvi QINFIFO_OFFSET call fetch_byte; | ||
122 | |||
123 | if ((p->flags & AHC_PAGESCBS) == 0) { | ||
124 | /* In the non-paging case, the SCBID == hardware SCB index */ | ||
125 | mov SCBPTR, RETURN_2; | ||
126 | } | ||
127 | dma_queued_scb: | ||
128 | /* | ||
129 | * DMA the SCB from host ram into the current SCB location. | ||
130 | */ | ||
131 | mvi DMAPARAMS, HDMAEN|DIRECTION|FIFORESET; | ||
132 | mov RETURN_2 call dma_scb; | ||
133 | |||
134 | /* | ||
135 | * Preset the residual fields in case we never go through a data phase. | ||
136 | * This isn't done by the host so we can avoid a DMA to clear these | ||
137 | * fields for the normal case of I/O that completes without underrun | ||
138 | * or overrun conditions. | ||
139 | */ | ||
140 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
141 | bmov SCB_RESID_DCNT, SCB_DATACNT, 3; | ||
142 | } else { | ||
143 | mov SCB_RESID_DCNT[0],SCB_DATACNT[0]; | ||
144 | mov SCB_RESID_DCNT[1],SCB_DATACNT[1]; | ||
145 | mov SCB_RESID_DCNT[2],SCB_DATACNT[2]; | ||
146 | } | ||
147 | mov SCB_RESID_SGCNT, SCB_SGCOUNT; | ||
148 | |||
149 | start_scb: | ||
150 | /* | ||
151 | * Place us on the waiting list in case our selection | ||
152 | * doesn't win during bus arbitration. | ||
153 | */ | ||
154 | mov SCB_NEXT,WAITING_SCBH; | ||
155 | mov WAITING_SCBH, SCBPTR; | ||
156 | start_waiting: | ||
157 | /* | ||
158 | * Pull the first entry off of the waiting SCB list. | ||
159 | */ | ||
160 | mov SCBPTR, WAITING_SCBH; | ||
161 | call start_selection; | ||
162 | jmp poll_for_work; | ||
163 | |||
164 | start_selection: | ||
165 | if ((p->features & AHC_TWIN) != 0) { | ||
166 | and SINDEX,~SELBUSB,SBLKCTL;/* Clear channel select bit */ | ||
167 | and A,SELBUSB,SCB_TCL; /* Get new channel bit */ | ||
168 | or SINDEX,A; | ||
169 | mov SBLKCTL,SINDEX; /* select channel */ | ||
170 | } | ||
171 | initialize_scsiid: | ||
172 | if ((p->features & AHC_ULTRA2) != 0) { | ||
173 | and A, TID, SCB_TCL; /* Get target ID */ | ||
174 | and SCSIID_ULTRA2, OID; /* Clear old target */ | ||
175 | or SCSIID_ULTRA2, A; | ||
176 | } else { | ||
177 | and A, TID, SCB_TCL; /* Get target ID */ | ||
178 | and SCSIID, OID; /* Clear old target */ | ||
179 | or SCSIID, A; | ||
180 | } | ||
181 | mov SCSIDATL, ALLZEROS; /* clear out the latched */ | ||
182 | /* data register, this */ | ||
183 | /* fixes a bug on some */ | ||
184 | /* controllers where the */ | ||
185 | /* last byte written to */ | ||
186 | /* this register can leak */ | ||
187 | /* onto the data bus at */ | ||
188 | /* bad times, such as during */ | ||
189 | /* selection timeouts */ | ||
190 | mvi SCSISEQ, ENSELO|ENAUTOATNO|ENRSELI|ENAUTOATNP ret; | ||
191 | |||
192 | /* | ||
193 | * Initialize Ultra mode setting and clear the SCSI channel. | ||
194 | * SINDEX should contain any additional bit's the client wants | ||
195 | * set in SXFRCTL0. | ||
196 | */ | ||
197 | initialize_channel: | ||
198 | or SXFRCTL0, CLRSTCNT|CLRCHN, SINDEX; | ||
199 | if ((p->features & AHC_ULTRA) != 0) { | ||
200 | ultra: | ||
201 | mvi SINDEX, ULTRA_ENB+1; | ||
202 | test SAVED_TCL, 0x80 jnz ultra_2; /* Target ID > 7 */ | ||
203 | dec SINDEX; | ||
204 | ultra_2: | ||
205 | mov FUNCTION1,SAVED_TCL; | ||
206 | mov A,FUNCTION1; | ||
207 | test SINDIR, A jz ndx_dtr; | ||
208 | or SXFRCTL0, FAST20; | ||
209 | } | ||
210 | /* | ||
211 | * Initialize SCSIRATE with the appropriate value for this target. | ||
212 | * The SCSIRATE settings for each target are stored in an array | ||
213 | * based at TARG_SCSIRATE. | ||
214 | */ | ||
215 | ndx_dtr: | ||
216 | shr A,4,SAVED_TCL; | ||
217 | if ((p->features & AHC_TWIN) != 0) { | ||
218 | test SBLKCTL,SELBUSB jz ndx_dtr_2; | ||
219 | or SAVED_TCL, SELBUSB; | ||
220 | or A,0x08; /* Channel B entries add 8 */ | ||
221 | ndx_dtr_2: | ||
222 | } | ||
223 | |||
224 | if ((p->features & AHC_ULTRA2) != 0) { | ||
225 | add SINDEX, TARG_OFFSET, A; | ||
226 | mov SCSIOFFSET, SINDIR; | ||
227 | } | ||
228 | |||
229 | add SINDEX,TARG_SCSIRATE,A; | ||
230 | mov SCSIRATE,SINDIR ret; | ||
231 | |||
232 | |||
233 | selection: | ||
234 | test SSTAT0,SELDO jnz select_out; | ||
235 | /* | ||
236 | * Reselection has been initiated by a target. Make a note that we've been | ||
237 | * reselected, but haven't seen an IDENTIFY message from the target yet. | ||
238 | */ | ||
239 | initiator_reselect: | ||
240 | mvi CLRSINT0, CLRSELDI; | ||
241 | /* XXX test for and handle ONE BIT condition */ | ||
242 | and SAVED_TCL, SELID_MASK, SELID; | ||
243 | mvi CLRSINT1,CLRBUSFREE; | ||
244 | or SIMODE1, ENBUSFREE; /* | ||
245 | * We aren't expecting a | ||
246 | * bus free, so interrupt | ||
247 | * the kernel driver if it | ||
248 | * happens. | ||
249 | */ | ||
250 | mvi SPIOEN call initialize_channel; | ||
251 | mvi MSG_OUT, MSG_NOOP; /* No message to send */ | ||
252 | jmp ITloop; | ||
253 | |||
254 | /* | ||
255 | * After the selection, remove this SCB from the "waiting SCB" | ||
256 | * list. This is achieved by simply moving our "next" pointer into | ||
257 | * WAITING_SCBH. Our next pointer will be set to null the next time this | ||
258 | * SCB is used, so don't bother with it now. | ||
259 | */ | ||
260 | select_out: | ||
261 | /* Turn off the selection hardware */ | ||
262 | mvi SCSISEQ, ENRSELI|ENAUTOATNP; /* | ||
263 | * ATN on parity errors | ||
264 | * for "in" phases | ||
265 | */ | ||
266 | mvi CLRSINT0, CLRSELDO; | ||
267 | mov SCBPTR, WAITING_SCBH; | ||
268 | mov WAITING_SCBH,SCB_NEXT; | ||
269 | mov SAVED_TCL, SCB_TCL; | ||
270 | mvi CLRSINT1,CLRBUSFREE; | ||
271 | or SIMODE1, ENBUSFREE; /* | ||
272 | * We aren't expecting a | ||
273 | * bus free, so interrupt | ||
274 | * the kernel driver if it | ||
275 | * happens. | ||
276 | */ | ||
277 | mvi SPIOEN call initialize_channel; | ||
278 | /* | ||
279 | * As soon as we get a successful selection, the target should go | ||
280 | * into the message out phase since we have ATN asserted. | ||
281 | */ | ||
282 | mvi MSG_OUT, MSG_IDENTIFYFLAG; | ||
283 | or SEQ_FLAGS, IDENTIFY_SEEN; | ||
284 | |||
285 | /* | ||
286 | * Main loop for information transfer phases. Wait for the target | ||
287 | * to assert REQ before checking MSG, C/D and I/O for the bus phase. | ||
288 | */ | ||
289 | ITloop: | ||
290 | call phase_lock; | ||
291 | |||
292 | mov A, LASTPHASE; | ||
293 | |||
294 | test A, ~P_DATAIN jz p_data; | ||
295 | cmp A,P_COMMAND je p_command; | ||
296 | cmp A,P_MESGOUT je p_mesgout; | ||
297 | cmp A,P_STATUS je p_status; | ||
298 | cmp A,P_MESGIN je p_mesgin; | ||
299 | |||
300 | mvi INTSTAT,BAD_PHASE; /* unknown phase - signal driver */ | ||
301 | jmp ITloop; /* Try reading the bus again. */ | ||
302 | |||
303 | await_busfree: | ||
304 | and SIMODE1, ~ENBUSFREE; | ||
305 | call clear_target_state; | ||
306 | mov NONE, SCSIDATL; /* Ack the last byte */ | ||
307 | and SXFRCTL0, ~SPIOEN; | ||
308 | test SSTAT1,REQINIT|BUSFREE jz .; | ||
309 | test SSTAT1, BUSFREE jnz poll_for_work; | ||
310 | mvi INTSTAT, BAD_PHASE; | ||
311 | |||
312 | clear_target_state: | ||
313 | /* | ||
314 | * We assume that the kernel driver may reset us | ||
315 | * at any time, even in the middle of a DMA, so | ||
316 | * clear DFCNTRL too. | ||
317 | */ | ||
318 | clr DFCNTRL; | ||
319 | |||
320 | /* | ||
321 | * We don't know the target we will connect to, | ||
322 | * so default to narrow transfers to avoid | ||
323 | * parity problems. | ||
324 | */ | ||
325 | if ((p->features & AHC_ULTRA2) != 0) { | ||
326 | bmov SCSIRATE, ALLZEROS, 2; | ||
327 | } else { | ||
328 | clr SCSIRATE; | ||
329 | and SXFRCTL0, ~(FAST20); | ||
330 | } | ||
331 | mvi LASTPHASE, P_BUSFREE; | ||
332 | /* clear target specific flags */ | ||
333 | clr SEQ_FLAGS ret; | ||
334 | |||
335 | |||
336 | data_phase_reinit: | ||
337 | /* | ||
338 | * If we re-enter the data phase after going through another phase, the | ||
339 | * STCNT may have been cleared, so restore it from the residual field. | ||
340 | * On Ultra2, we have to put it into the HCNT field because we have to | ||
341 | * drop the data down into the shadow layer via the preload ability. | ||
342 | */ | ||
343 | if ((p->features & AHC_ULTRA2) != 0) { | ||
344 | bmov HADDR, SHADDR, 4; | ||
345 | bmov HCNT, SCB_RESID_DCNT, 3; | ||
346 | } | ||
347 | if ((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) { | ||
348 | bmov STCNT, SCB_RESID_DCNT, 3; | ||
349 | } | ||
350 | if ((p->features & AHC_CMD_CHAN) == 0) { | ||
351 | mvi DINDEX, STCNT; | ||
352 | mvi SCB_RESID_DCNT call bcopy_3; | ||
353 | } | ||
354 | jmp data_phase_loop; | ||
355 | p_data: | ||
356 | if ((p->features & AHC_ULTRA2) != 0) { | ||
357 | mvi DMAPARAMS, PRELOADEN|SCSIEN|HDMAEN; | ||
358 | } else { | ||
359 | mvi DMAPARAMS, WIDEODD|SCSIEN|SDMAEN|HDMAEN|FIFORESET; | ||
360 | } | ||
361 | test LASTPHASE, IOI jnz . + 2; | ||
362 | or DMAPARAMS, DIRECTION; | ||
363 | call assert; /* | ||
364 | * Ensure entering a data | ||
365 | * phase is okay - seen identify, etc. | ||
366 | */ | ||
367 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
368 | mvi CCSGADDR, CCSGADDR_MAX; | ||
369 | } | ||
370 | |||
371 | test SEQ_FLAGS, DPHASE jnz data_phase_reinit; | ||
372 | or SEQ_FLAGS, DPHASE; /* we've seen a data phase */ | ||
373 | /* | ||
374 | * Initialize the DMA address and counter from the SCB. | ||
375 | * Also set SG_COUNT and SG_NEXT in memory since we cannot | ||
376 | * modify the values in the SCB itself until we see a | ||
377 | * save data pointers message. | ||
378 | */ | ||
379 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
380 | bmov HADDR, SCB_DATAPTR, 7; | ||
381 | bmov SG_COUNT, SCB_SGCOUNT, 5; | ||
382 | if ((p->features & AHC_ULTRA2) == 0) { | ||
383 | bmov STCNT, HCNT, 3; | ||
384 | } | ||
385 | } else { | ||
386 | mvi DINDEX, HADDR; | ||
387 | mvi SCB_DATAPTR call bcopy_7; | ||
388 | call set_stcnt_from_hcnt; | ||
389 | mvi DINDEX, SG_COUNT; | ||
390 | mvi SCB_SGCOUNT call bcopy_5; | ||
391 | } | ||
392 | data_phase_loop: | ||
393 | /* Guard against overruns */ | ||
394 | test SG_COUNT, 0xff jnz data_phase_inbounds; | ||
395 | /* | ||
396 | * Turn on 'Bit Bucket' mode, set the transfer count to | ||
397 | * 16meg and let the target run until it changes phase. | ||
398 | * When the transfer completes, notify the host that we | ||
399 | * had an overrun. | ||
400 | */ | ||
401 | or SXFRCTL1,BITBUCKET; | ||
402 | and DMAPARAMS, ~(HDMAEN|SDMAEN); | ||
403 | if ((p->features & AHC_ULTRA2) != 0) { | ||
404 | bmov HCNT, ALLONES, 3; | ||
405 | } | ||
406 | if ((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) { | ||
407 | bmov STCNT, ALLONES, 3; | ||
408 | } | ||
409 | if ((p->features & AHC_CMD_CHAN) == 0) { | ||
410 | mvi STCNT[0], 0xFF; | ||
411 | mvi STCNT[1], 0xFF; | ||
412 | mvi STCNT[2], 0xFF; | ||
413 | } | ||
414 | |||
415 | data_phase_inbounds: | ||
416 | /* If we are the last SG block, tell the hardware. */ | ||
417 | if ((p->features & AHC_ULTRA2) != 0) { | ||
418 | shl A, 2, SG_COUNT; | ||
419 | cmp SG_COUNT,0x01 jne data_phase_wideodd; | ||
420 | or A, LAST_SEG; | ||
421 | } else { | ||
422 | cmp SG_COUNT,0x01 jne data_phase_wideodd; | ||
423 | and DMAPARAMS, ~WIDEODD; | ||
424 | } | ||
425 | data_phase_wideodd: | ||
426 | if ((p->features & AHC_ULTRA2) != 0) { | ||
427 | mov SG_CACHEPTR, A; | ||
428 | mov DFCNTRL, DMAPARAMS; /* start the operation */ | ||
429 | test SXFRCTL1, BITBUCKET jnz data_phase_overrun; | ||
430 | u2_preload_wait: | ||
431 | test SSTAT1, PHASEMIS jnz u2_phasemis; | ||
432 | test DFSTATUS, PRELOAD_AVAIL jz u2_preload_wait; | ||
433 | } else { | ||
434 | mov DMAPARAMS call dma; | ||
435 | data_phase_dma_done: | ||
436 | /* Go tell the host about any overruns */ | ||
437 | test SXFRCTL1,BITBUCKET jnz data_phase_overrun; | ||
438 | |||
439 | /* Exit if we had an underrun. dma clears SINDEX in this case. */ | ||
440 | test SINDEX,0xff jz data_phase_finish; | ||
441 | } | ||
442 | /* | ||
443 | * Advance the scatter-gather pointers | ||
444 | */ | ||
445 | sg_advance: | ||
446 | if ((p->features & AHC_ULTRA2) != 0) { | ||
447 | cmp SG_COUNT, 0x01 je u2_data_phase_finish; | ||
448 | } else { | ||
449 | dec SG_COUNT; | ||
450 | test SG_COUNT, 0xff jz data_phase_finish; | ||
451 | } | ||
452 | |||
453 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
454 | |||
455 | /* | ||
456 | * Do we have any prefetch left??? | ||
457 | */ | ||
458 | cmp CCSGADDR, CCSGADDR_MAX jne prefetch_avail; | ||
459 | |||
460 | /* | ||
461 | * Fetch MIN(CCSGADDR_MAX, (SG_COUNT * 8)) bytes. | ||
462 | */ | ||
463 | add A, -(CCSGRAM_MAXSEGS + 1), SG_COUNT; | ||
464 | mvi A, CCSGADDR_MAX; | ||
465 | jc . + 2; | ||
466 | shl A, 3, SG_COUNT; | ||
467 | mov CCHCNT, A; | ||
468 | bmov CCHADDR, SG_NEXT, 4; | ||
469 | mvi CCSGCTL, CCSGEN|CCSGRESET; | ||
470 | test CCSGCTL, CCSGDONE jz .; | ||
471 | and CCSGCTL, ~CCSGEN; | ||
472 | test CCSGCTL, CCSGEN jnz .; | ||
473 | mvi CCSGCTL, CCSGRESET; | ||
474 | prefetch_avail: | ||
475 | bmov HADDR, CCSGRAM, 8; | ||
476 | if ((p->features & AHC_ULTRA2) == 0) { | ||
477 | bmov STCNT, HCNT, 3; | ||
478 | } else { | ||
479 | dec SG_COUNT; | ||
480 | } | ||
481 | } else { | ||
482 | mvi DINDEX, HADDR; | ||
483 | mvi SG_NEXT call bcopy_4; | ||
484 | |||
485 | mvi HCNT[0],SG_SIZEOF; | ||
486 | clr HCNT[1]; | ||
487 | clr HCNT[2]; | ||
488 | |||
489 | or DFCNTRL, HDMAEN|DIRECTION|FIFORESET; | ||
490 | |||
491 | call dma_finish; | ||
492 | |||
493 | /* | ||
494 | * Copy data from FIFO into SCB data pointer and data count. | ||
495 | * This assumes that the SG segments are of the form: | ||
496 | * struct ahc_dma_seg { | ||
497 | * u_int32_t addr; four bytes, little-endian order | ||
498 | * u_int32_t len; four bytes, little endian order | ||
499 | * }; | ||
500 | */ | ||
501 | mvi DINDEX, HADDR; | ||
502 | call dfdat_in_7; | ||
503 | call set_stcnt_from_hcnt; | ||
504 | } | ||
505 | /* Advance the SG pointer */ | ||
506 | clr A; /* add sizeof(struct scatter) */ | ||
507 | add SG_NEXT[0],SG_SIZEOF; | ||
508 | adc SG_NEXT[1],A; | ||
509 | |||
510 | if ((p->features & AHC_ULTRA2) != 0) { | ||
511 | jmp data_phase_loop; | ||
512 | } else { | ||
513 | test SSTAT1, REQINIT jz .; | ||
514 | test SSTAT1,PHASEMIS jz data_phase_loop; | ||
515 | } | ||
516 | |||
517 | |||
518 | /* | ||
519 | * We've loaded all of our segments into the preload layer. Now, we simply | ||
520 | * have to wait for it to finish or for us to get a phasemis. And, since | ||
521 | * we'll get a phasemis if we do finish, all we really need to do is wait | ||
522 | * for a phasemis then check if we did actually complete all the segments. | ||
523 | */ | ||
524 | if ((p->features & AHC_ULTRA2) != 0) { | ||
525 | u2_data_phase_finish: | ||
526 | test SSTAT1, PHASEMIS jnz u2_phasemis; | ||
527 | test SG_CACHEPTR, LAST_SEG_DONE jz u2_data_phase_finish; | ||
528 | clr SG_COUNT; | ||
529 | test SSTAT1, REQINIT jz .; | ||
530 | test SSTAT1, PHASEMIS jz data_phase_loop; | ||
531 | u2_phasemis: | ||
532 | call ultra2_dmafinish; | ||
533 | test SG_CACHEPTR, LAST_SEG_DONE jnz data_phase_finish; | ||
534 | test SSTAT2, SHVALID jnz u2_fixup_residual; | ||
535 | mvi INTSTAT, SEQ_SG_FIXUP; | ||
536 | jmp data_phase_finish; | ||
537 | u2_fixup_residual: | ||
538 | shr ARG_1, 2, SG_CACHEPTR; | ||
539 | u2_phasemis_loop: | ||
540 | and A, 0x3f, SG_COUNT; | ||
541 | cmp ARG_1, A je data_phase_finish; | ||
542 | /* | ||
543 | * Subtract SG_SIZEOF from the SG_NEXT pointer and add 1 to the SG_COUNT | ||
544 | */ | ||
545 | clr A; | ||
546 | add SG_NEXT[0], -SG_SIZEOF; | ||
547 | adc SG_NEXT[1], 0xff; | ||
548 | inc SG_COUNT; | ||
549 | jmp u2_phasemis_loop; | ||
550 | } | ||
551 | |||
552 | data_phase_finish: | ||
553 | /* | ||
554 | * After a DMA finishes, save the SG and STCNT residuals back into the SCB | ||
555 | * We use STCNT instead of HCNT, since it's a reflection of how many bytes | ||
556 | * were transferred on the SCSI (as opposed to the host) bus. | ||
557 | */ | ||
558 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
559 | bmov SCB_RESID_DCNT, STCNT, 3; | ||
560 | mov SCB_RESID_SGCNT, SG_COUNT; | ||
561 | if ((p->features & AHC_ULTRA2) != 0) { | ||
562 | or SXFRCTL0, CLRSTCNT|CLRCHN; | ||
563 | } | ||
564 | } else { | ||
565 | mov SCB_RESID_DCNT[0],STCNT[0]; | ||
566 | mov SCB_RESID_DCNT[1],STCNT[1]; | ||
567 | mov SCB_RESID_DCNT[2],STCNT[2]; | ||
568 | mov SCB_RESID_SGCNT, SG_COUNT; | ||
569 | } | ||
570 | |||
571 | jmp ITloop; | ||
572 | |||
573 | data_phase_overrun: | ||
574 | /* | ||
575 | * Turn off BITBUCKET mode and notify the host | ||
576 | */ | ||
577 | if ((p->features & AHC_ULTRA2) != 0) { | ||
578 | /* | ||
579 | * Wait for the target to quit transferring data on the SCSI bus | ||
580 | */ | ||
581 | test SSTAT1, PHASEMIS jz .; | ||
582 | call ultra2_dmafinish; | ||
583 | } | ||
584 | and SXFRCTL1, ~BITBUCKET; | ||
585 | mvi INTSTAT,DATA_OVERRUN; | ||
586 | jmp ITloop; | ||
587 | |||
588 | |||
589 | |||
590 | |||
591 | /* | ||
592 | * Actually turn off the DMA hardware, save our current position into the | ||
593 | * proper residual variables, wait for the next REQ signal, then jump to | ||
594 | * the ITloop. Jumping to the ITloop ensures that if we happen to get | ||
595 | * brought into the data phase again (or are still in it after our last | ||
596 | * segment) that we will properly signal an overrun to the kernel. | ||
597 | */ | ||
598 | if ((p->features & AHC_ULTRA2) != 0) { | ||
599 | ultra2_dmafinish: | ||
600 | test DFCNTRL, DIRECTION jnz ultra2_dmahalt; | ||
601 | and DFCNTRL, ~SCSIEN; | ||
602 | test DFCNTRL, SCSIEN jnz .; | ||
603 | if ((p->bugs & AHC_BUG_AUTOFLUSH) != 0) { | ||
604 | or DFCNTRL, FIFOFLUSH; | ||
605 | } | ||
606 | ultra2_dmafifoflush: | ||
607 | if ((p->bugs & AHC_BUG_AUTOFLUSH) != 0) { | ||
608 | /* | ||
609 | * hardware bug alert! This needless set of jumps | ||
610 | * works around a glitch in the silicon. When the | ||
611 | * PCI DMA fifo goes empty, but there is still SCSI | ||
612 | * data to be flushed into the PCI DMA fifo (and from | ||
613 | * there on into main memory), the FIFOEMP bit will | ||
614 | * come on between the time when the PCI DMA buffer | ||
615 | * went empty and the next bit of data is copied from | ||
616 | * the SCSI fifo into the PCI fifo. It should only | ||
617 | * come on when both FIFOs (meaning the entire FIFO | ||
618 | * chain) are empty. Since it can take up to 4 cycles | ||
619 | * for new data to be copied from the SCSI fifo into | ||
620 | * the PCI fifo, testing for FIFOEMP status for 4 | ||
621 | * extra times gives the needed time for any | ||
622 | * remaining SCSI fifo data to be put in the PCI fifo | ||
623 | * before we declare it *truly* empty. | ||
624 | */ | ||
625 | test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush; | ||
626 | test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush; | ||
627 | test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush; | ||
628 | test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush; | ||
629 | } | ||
630 | test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush; | ||
631 | test DFSTATUS, MREQPEND jnz .; | ||
632 | ultra2_dmahalt: | ||
633 | and DFCNTRL, ~(HDMAEN|SCSIEN); | ||
634 | test DFCNTRL, (HDMAEN|SCSIEN) jnz .; | ||
635 | ret; | ||
636 | } | ||
637 | |||
638 | /* | ||
639 | * Command phase. Set up the DMA registers and let 'er rip. | ||
640 | */ | ||
641 | p_command: | ||
642 | call assert; | ||
643 | |||
644 | /* | ||
645 | * Load HADDR and HCNT. | ||
646 | */ | ||
647 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
648 | bmov HADDR, SCB_CMDPTR, 5; | ||
649 | bmov HCNT[1], ALLZEROS, 2; | ||
650 | if ((p->features & AHC_ULTRA2) == 0) { | ||
651 | bmov STCNT, HCNT, 3; | ||
652 | } | ||
653 | } else { | ||
654 | mvi DINDEX, HADDR; | ||
655 | mvi SCB_CMDPTR call bcopy_5; | ||
656 | clr HCNT[1]; | ||
657 | clr HCNT[2]; | ||
658 | call set_stcnt_from_hcnt; | ||
659 | } | ||
660 | |||
661 | if ((p->features & AHC_ULTRA2) == 0) { | ||
662 | mvi (SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET) call dma; | ||
663 | } else { | ||
664 | mvi DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN|DIRECTION); | ||
665 | test SSTAT0, SDONE jnz .; | ||
666 | p_command_dma_loop: | ||
667 | test SSTAT0, SDONE jnz p_command_ultra2_dma_done; | ||
668 | test SSTAT1,PHASEMIS jz p_command_dma_loop; /* ie. underrun */ | ||
669 | p_command_ultra2_dma_done: | ||
670 | test SCSISIGI, REQI jz p_command_ultra2_shutdown; | ||
671 | test SSTAT1, (PHASEMIS|REQINIT) jz p_command_ultra2_dma_done; | ||
672 | p_command_ultra2_shutdown: | ||
673 | and DFCNTRL, ~(HDMAEN|SCSIEN); | ||
674 | test DFCNTRL, (HDMAEN|SCSIEN) jnz .; | ||
675 | or SXFRCTL0, CLRSTCNT|CLRCHN; | ||
676 | } | ||
677 | jmp ITloop; | ||
678 | |||
679 | /* | ||
680 | * Status phase. Wait for the data byte to appear, then read it | ||
681 | * and store it into the SCB. | ||
682 | */ | ||
683 | p_status: | ||
684 | call assert; | ||
685 | |||
686 | mov SCB_TARGET_STATUS, SCSIDATL; | ||
687 | jmp ITloop; | ||
688 | |||
689 | /* | ||
690 | * Message out phase. If MSG_OUT is 0x80, build I full indentify message | ||
691 | * sequence and send it to the target. In addition, if the MK_MESSAGE bit | ||
692 | * is set in the SCB_CONTROL byte, interrupt the host and allow it to send | ||
693 | * it's own message. | ||
694 | * | ||
695 | * If MSG_OUT is == HOST_MSG, also interrupt the host and take a message. | ||
696 | * This is done to allow the host to send messages outside of an identify | ||
697 | * sequence while protecting the seqencer from testing the MK_MESSAGE bit | ||
698 | * on an SCB that might not be for the current nexus. (For example, a | ||
699 | * BDR message in response to a bad reselection would leave us pointed to | ||
700 | * an SCB that doesn't have anything to do with the current target). | ||
701 | * Otherwise, treat MSG_OUT as a 1 byte message to send (abort, abort tag, | ||
702 | * bus device reset). | ||
703 | * | ||
704 | * When there are no messages to send, MSG_OUT should be set to MSG_NOOP, | ||
705 | * in case the target decides to put us in this phase for some strange | ||
706 | * reason. | ||
707 | */ | ||
708 | p_mesgout_retry: | ||
709 | or SCSISIGO,ATNO,LASTPHASE;/* turn on ATN for the retry */ | ||
710 | p_mesgout: | ||
711 | mov SINDEX, MSG_OUT; | ||
712 | cmp SINDEX, MSG_IDENTIFYFLAG jne p_mesgout_from_host; | ||
713 | p_mesgout_identify: | ||
714 | if ((p->features & AHC_WIDE) != 0) { | ||
715 | and SINDEX,0xf,SCB_TCL; /* lun */ | ||
716 | } else { | ||
717 | and SINDEX,0x7,SCB_TCL; /* lun */ | ||
718 | } | ||
719 | and A,DISCENB,SCB_CONTROL; /* mask off disconnect privilege */ | ||
720 | or SINDEX,A; /* or in disconnect privilege */ | ||
721 | or SINDEX,MSG_IDENTIFYFLAG; | ||
722 | p_mesgout_mk_message: | ||
723 | test SCB_CONTROL,MK_MESSAGE jz p_mesgout_tag; | ||
724 | mov SCSIDATL, SINDEX; /* Send the last byte */ | ||
725 | jmp p_mesgout_from_host + 1;/* Skip HOST_MSG test */ | ||
726 | /* | ||
727 | * Send a tag message if TAG_ENB is set in the SCB control block. | ||
728 | * Use SCB_TAG (the position in the kernel's SCB array) as the tag value. | ||
729 | */ | ||
730 | p_mesgout_tag: | ||
731 | test SCB_CONTROL,TAG_ENB jz p_mesgout_onebyte; | ||
732 | mov SCSIDATL, SINDEX; /* Send the identify message */ | ||
733 | call phase_lock; | ||
734 | cmp LASTPHASE, P_MESGOUT jne p_mesgout_done; | ||
735 | and SCSIDATL,TAG_ENB|SCB_TAG_TYPE,SCB_CONTROL; | ||
736 | call phase_lock; | ||
737 | cmp LASTPHASE, P_MESGOUT jne p_mesgout_done; | ||
738 | mov SCB_TAG jmp p_mesgout_onebyte; | ||
739 | /* | ||
740 | * Interrupt the driver, and allow it to send a message | ||
741 | * if it asks. | ||
742 | */ | ||
743 | p_mesgout_from_host: | ||
744 | cmp SINDEX, HOST_MSG jne p_mesgout_onebyte; | ||
745 | mvi INTSTAT,AWAITING_MSG; | ||
746 | nop; | ||
747 | /* | ||
748 | * Did the host detect a phase change? | ||
749 | */ | ||
750 | cmp RETURN_1, MSGOUT_PHASEMIS je p_mesgout_done; | ||
751 | |||
752 | p_mesgout_onebyte: | ||
753 | mvi CLRSINT1, CLRATNO; | ||
754 | mov SCSIDATL, SINDEX; | ||
755 | |||
756 | /* | ||
757 | * If the next bus phase after ATN drops is a message out, it means | ||
758 | * that the target is requesting that the last message(s) be resent. | ||
759 | */ | ||
760 | call phase_lock; | ||
761 | cmp LASTPHASE, P_MESGOUT je p_mesgout_retry; | ||
762 | |||
763 | p_mesgout_done: | ||
764 | mvi CLRSINT1,CLRATNO; /* Be sure to turn ATNO off */ | ||
765 | mov LAST_MSG, MSG_OUT; | ||
766 | cmp MSG_OUT, MSG_IDENTIFYFLAG jne . + 2; | ||
767 | and SCB_CONTROL, ~MK_MESSAGE; | ||
768 | mvi MSG_OUT, MSG_NOOP; /* No message left */ | ||
769 | jmp ITloop; | ||
770 | |||
771 | /* | ||
772 | * Message in phase. Bytes are read using Automatic PIO mode. | ||
773 | */ | ||
774 | p_mesgin: | ||
775 | mvi ACCUM call inb_first; /* read the 1st message byte */ | ||
776 | |||
777 | test A,MSG_IDENTIFYFLAG jnz mesgin_identify; | ||
778 | cmp A,MSG_DISCONNECT je mesgin_disconnect; | ||
779 | cmp A,MSG_SAVEDATAPOINTER je mesgin_sdptrs; | ||
780 | cmp ALLZEROS,A je mesgin_complete; | ||
781 | cmp A,MSG_RESTOREPOINTERS je mesgin_rdptrs; | ||
782 | cmp A,MSG_EXTENDED je mesgin_extended; | ||
783 | cmp A,MSG_MESSAGE_REJECT je mesgin_reject; | ||
784 | cmp A,MSG_NOOP je mesgin_done; | ||
785 | cmp A,MSG_IGN_WIDE_RESIDUE je mesgin_wide_residue; | ||
786 | |||
787 | rej_mesgin: | ||
788 | /* | ||
789 | * We have no idea what this message in is, so we issue a message reject | ||
790 | * and hope for the best. In any case, rejection should be a rare | ||
791 | * occurrence - signal the driver when it happens. | ||
792 | */ | ||
793 | mvi INTSTAT,SEND_REJECT; /* let driver know */ | ||
794 | |||
795 | mvi MSG_MESSAGE_REJECT call mk_mesg; | ||
796 | |||
797 | mesgin_done: | ||
798 | mov NONE,SCSIDATL; /*dummy read from latch to ACK*/ | ||
799 | jmp ITloop; | ||
800 | |||
801 | |||
802 | mesgin_complete: | ||
803 | /* | ||
804 | * We got a "command complete" message, so put the SCB_TAG into the QOUTFIFO, | ||
805 | * and trigger a completion interrupt. Before doing so, check to see if there | ||
806 | * is a residual or the status byte is something other than STATUS_GOOD (0). | ||
807 | * In either of these conditions, we upload the SCB back to the host so it can | ||
808 | * process this information. In the case of a non zero status byte, we | ||
809 | * additionally interrupt the kernel driver synchronously, allowing it to | ||
810 | * decide if sense should be retrieved. If the kernel driver wishes to request | ||
811 | * sense, it will fill the kernel SCB with a request sense command and set | ||
812 | * RETURN_1 to SEND_SENSE. If RETURN_1 is set to SEND_SENSE we redownload | ||
813 | * the SCB, and process it as the next command by adding it to the waiting list. | ||
814 | * If the kernel driver does not wish to request sense, it need only clear | ||
815 | * RETURN_1, and the command is allowed to complete normally. We don't bother | ||
816 | * to post to the QOUTFIFO in the error cases since it would require extra | ||
817 | * work in the kernel driver to ensure that the entry was removed before the | ||
818 | * command complete code tried processing it. | ||
819 | */ | ||
820 | |||
821 | /* | ||
822 | * First check for residuals | ||
823 | */ | ||
824 | test SCB_RESID_SGCNT,0xff jnz upload_scb; | ||
825 | test SCB_TARGET_STATUS,0xff jz complete; /* Good Status? */ | ||
826 | upload_scb: | ||
827 | mvi DMAPARAMS, FIFORESET; | ||
828 | mov SCB_TAG call dma_scb; | ||
829 | check_status: | ||
830 | test SCB_TARGET_STATUS,0xff jz complete; /* Just a residual? */ | ||
831 | mvi INTSTAT,BAD_STATUS; /* let driver know */ | ||
832 | nop; | ||
833 | cmp RETURN_1, SEND_SENSE jne complete; | ||
834 | /* This SCB becomes the next to execute as it will retrieve sense */ | ||
835 | mvi DMAPARAMS, HDMAEN|DIRECTION|FIFORESET; | ||
836 | mov SCB_TAG call dma_scb; | ||
837 | add_to_waiting_list: | ||
838 | mov SCB_NEXT,WAITING_SCBH; | ||
839 | mov WAITING_SCBH, SCBPTR; | ||
840 | /* | ||
841 | * Prepare our selection hardware before the busfree so we have a | ||
842 | * high probability of winning arbitration. | ||
843 | */ | ||
844 | call start_selection; | ||
845 | jmp await_busfree; | ||
846 | |||
847 | complete: | ||
848 | /* If we are untagged, clear our address up in host ram */ | ||
849 | test SCB_CONTROL, TAG_ENB jnz complete_post; | ||
850 | mov A, SAVED_TCL; | ||
851 | mvi UNTAGGEDSCB_OFFSET call post_byte_setup; | ||
852 | mvi SCB_LIST_NULL call post_byte; | ||
853 | |||
854 | complete_post: | ||
855 | /* Post the SCB and issue an interrupt */ | ||
856 | if ((p->features & AHC_QUEUE_REGS) != 0) { | ||
857 | mov A, SDSCB_QOFF; | ||
858 | } else { | ||
859 | mov A, QOUTPOS; | ||
860 | } | ||
861 | mvi QOUTFIFO_OFFSET call post_byte_setup; | ||
862 | mov SCB_TAG call post_byte; | ||
863 | if ((p->features & AHC_QUEUE_REGS) == 0) { | ||
864 | inc QOUTPOS; | ||
865 | } | ||
866 | mvi INTSTAT,CMDCMPLT; | ||
867 | |||
868 | add_to_free_list: | ||
869 | call add_scb_to_free_list; | ||
870 | jmp await_busfree; | ||
871 | |||
872 | /* | ||
873 | * Is it an extended message? Copy the message to our message buffer and | ||
874 | * notify the host. The host will tell us whether to reject this message, | ||
875 | * respond to it with the message that the host placed in our message buffer, | ||
876 | * or simply to do nothing. | ||
877 | */ | ||
878 | mesgin_extended: | ||
879 | mvi INTSTAT,EXTENDED_MSG; /* let driver know */ | ||
880 | jmp ITloop; | ||
881 | |||
882 | /* | ||
883 | * Is it a disconnect message? Set a flag in the SCB to remind us | ||
884 | * and await the bus going free. | ||
885 | */ | ||
886 | mesgin_disconnect: | ||
887 | or SCB_CONTROL,DISCONNECTED; | ||
888 | call add_scb_to_disc_list; | ||
889 | jmp await_busfree; | ||
890 | |||
891 | /* | ||
892 | * Save data pointers message: | ||
893 | * Copying RAM values back to SCB, for Save Data Pointers message, but | ||
894 | * only if we've actually been into a data phase to change them. This | ||
895 | * protects against bogus data in scratch ram and the residual counts | ||
896 | * since they are only initialized when we go into data_in or data_out. | ||
897 | */ | ||
898 | mesgin_sdptrs: | ||
899 | test SEQ_FLAGS, DPHASE jz mesgin_done; | ||
900 | /* | ||
901 | * The SCB SGPTR becomes the next one we'll download, | ||
902 | * and the SCB DATAPTR becomes the current SHADDR. | ||
903 | * Use the residual number since STCNT is corrupted by | ||
904 | * any message transfer. | ||
905 | */ | ||
906 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
907 | bmov SCB_SGCOUNT, SG_COUNT, 5; | ||
908 | bmov SCB_DATAPTR, SHADDR, 4; | ||
909 | bmov SCB_DATACNT, SCB_RESID_DCNT, 3; | ||
910 | } else { | ||
911 | mvi DINDEX, SCB_SGCOUNT; | ||
912 | mvi SG_COUNT call bcopy_5; | ||
913 | mvi DINDEX, SCB_DATAPTR; | ||
914 | mvi SHADDR call bcopy_4; | ||
915 | mvi SCB_RESID_DCNT call bcopy_3; | ||
916 | } | ||
917 | jmp mesgin_done; | ||
918 | |||
919 | /* | ||
920 | * Restore pointers message? Data pointers are recopied from the | ||
921 | * SCB anytime we enter a data phase for the first time, so all | ||
922 | * we need to do is clear the DPHASE flag and let the data phase | ||
923 | * code do the rest. | ||
924 | */ | ||
925 | mesgin_rdptrs: | ||
926 | and SEQ_FLAGS, ~DPHASE; /* | ||
927 | * We'll reload them | ||
928 | * the next time through | ||
929 | * the dataphase. | ||
930 | */ | ||
931 | jmp mesgin_done; | ||
932 | |||
933 | /* | ||
934 | * Identify message? For a reconnecting target, this tells us the lun | ||
935 | * that the reconnection is for - find the correct SCB and switch to it, | ||
936 | * clearing the "disconnected" bit so we don't "find" it by accident later. | ||
937 | */ | ||
938 | mesgin_identify: | ||
939 | |||
940 | if ((p->features & AHC_WIDE) != 0) { | ||
941 | and A,0x0f; /* lun in lower four bits */ | ||
942 | } else { | ||
943 | and A,0x07; /* lun in lower three bits */ | ||
944 | } | ||
945 | or SAVED_TCL,A; /* SAVED_TCL should be complete now */ | ||
946 | |||
947 | mvi ARG_2, SCB_LIST_NULL; /* SCBID of prev SCB in disc List */ | ||
948 | call get_untagged_SCBID; | ||
949 | cmp ARG_1, SCB_LIST_NULL je snoop_tag; | ||
950 | if ((p->flags & AHC_PAGESCBS) != 0) { | ||
951 | test SEQ_FLAGS, SCBPTR_VALID jz use_retrieveSCB; | ||
952 | } | ||
953 | /* | ||
954 | * If the SCB was found in the disconnected list (as is | ||
955 | * always the case in non-paging scenarios), SCBPTR is already | ||
956 | * set to the correct SCB. So, simply setup the SCB and get | ||
957 | * on with things. | ||
958 | */ | ||
959 | mov SCBPTR call rem_scb_from_disc_list; | ||
960 | jmp setup_SCB; | ||
961 | /* | ||
962 | * Here we "snoop" the bus looking for a SIMPLE QUEUE TAG message. | ||
963 | * If we get one, we use the tag returned to find the proper | ||
964 | * SCB. With SCB paging, this requires using search for both tagged | ||
965 | * and non-tagged transactions since the SCB may exist in any slot. | ||
966 | * If we're not using SCB paging, we can use the tag as the direct | ||
967 | * index to the SCB. | ||
968 | */ | ||
969 | snoop_tag: | ||
970 | mov NONE,SCSIDATL; /* ACK Identify MSG */ | ||
971 | snoop_tag_loop: | ||
972 | call phase_lock; | ||
973 | cmp LASTPHASE, P_MESGIN jne not_found; | ||
974 | cmp SCSIBUSL,MSG_SIMPLE_Q_TAG jne not_found; | ||
975 | get_tag: | ||
976 | mvi ARG_1 call inb_next; /* tag value */ | ||
977 | |||
978 | use_retrieveSCB: | ||
979 | call retrieveSCB; | ||
980 | setup_SCB: | ||
981 | mov A, SAVED_TCL; | ||
982 | cmp SCB_TCL, A jne not_found_cleanup_scb; | ||
983 | test SCB_CONTROL,DISCONNECTED jz not_found_cleanup_scb; | ||
984 | and SCB_CONTROL,~DISCONNECTED; | ||
985 | or SEQ_FLAGS,IDENTIFY_SEEN; /* make note of IDENTIFY */ | ||
986 | /* See if the host wants to send a message upon reconnection */ | ||
987 | test SCB_CONTROL, MK_MESSAGE jz mesgin_done; | ||
988 | and SCB_CONTROL, ~MK_MESSAGE; | ||
989 | mvi HOST_MSG call mk_mesg; | ||
990 | jmp mesgin_done; | ||
991 | |||
992 | not_found_cleanup_scb: | ||
993 | test SCB_CONTROL, DISCONNECTED jz . + 3; | ||
994 | call add_scb_to_disc_list; | ||
995 | jmp not_found; | ||
996 | call add_scb_to_free_list; | ||
997 | not_found: | ||
998 | mvi INTSTAT, NO_MATCH; | ||
999 | mvi MSG_BUS_DEV_RESET call mk_mesg; | ||
1000 | jmp mesgin_done; | ||
1001 | |||
1002 | /* | ||
1003 | * Message reject? Let the kernel driver handle this. If we have an | ||
1004 | * outstanding WDTR or SDTR negotiation, assume that it's a response from | ||
1005 | * the target selecting 8bit or asynchronous transfer, otherwise just ignore | ||
1006 | * it since we have no clue what it pertains to. | ||
1007 | */ | ||
1008 | mesgin_reject: | ||
1009 | mvi INTSTAT, REJECT_MSG; | ||
1010 | jmp mesgin_done; | ||
1011 | |||
1012 | /* | ||
1013 | * Wide Residue. We handle the simple cases, but pass of the one hard case | ||
1014 | * to the kernel (when the residue byte happened to cause us to advance our | ||
1015 | * sg element array, so we know have to back that advance out). | ||
1016 | */ | ||
1017 | mesgin_wide_residue: | ||
1018 | mvi ARG_1 call inb_next; /* ACK the wide_residue and get */ | ||
1019 | /* the size byte */ | ||
1020 | /* | ||
1021 | * In order for this to be reliable, we have to do all sorts of horrible | ||
1022 | * magic in terms of resetting the datafifo and reloading the shadow layer | ||
1023 | * with the correct new values (so that a subsequent save data pointers | ||
1024 | * message will do the right thing). We let the kernel do that work. | ||
1025 | */ | ||
1026 | mvi INTSTAT, WIDE_RESIDUE; | ||
1027 | jmp mesgin_done; | ||
1028 | |||
1029 | /* | ||
1030 | * [ ADD MORE MESSAGE HANDLING HERE ] | ||
1031 | */ | ||
1032 | |||
1033 | /* | ||
1034 | * Locking the driver out, build a one-byte message passed in SINDEX | ||
1035 | * if there is no active message already. SINDEX is returned intact. | ||
1036 | */ | ||
1037 | mk_mesg: | ||
1038 | or SCSISIGO,ATNO,LASTPHASE;/* turn on ATNO */ | ||
1039 | mov MSG_OUT,SINDEX ret; | ||
1040 | |||
1041 | /* | ||
1042 | * Functions to read data in Automatic PIO mode. | ||
1043 | * | ||
1044 | * According to Adaptec's documentation, an ACK is not sent on input from | ||
1045 | * the target until SCSIDATL is read from. So we wait until SCSIDATL is | ||
1046 | * latched (the usual way), then read the data byte directly off the bus | ||
1047 | * using SCSIBUSL. When we have pulled the ATN line, or we just want to | ||
1048 | * acknowledge the byte, then we do a dummy read from SCISDATL. The SCSI | ||
1049 | * spec guarantees that the target will hold the data byte on the bus until | ||
1050 | * we send our ACK. | ||
1051 | * | ||
1052 | * The assumption here is that these are called in a particular sequence, | ||
1053 | * and that REQ is already set when inb_first is called. inb_{first,next} | ||
1054 | * use the same calling convention as inb. | ||
1055 | */ | ||
1056 | |||
1057 | inb_next: | ||
1058 | mov NONE,SCSIDATL; /*dummy read from latch to ACK*/ | ||
1059 | inb_next_wait: | ||
1060 | /* | ||
1061 | * If there is a parity error, wait for the kernel to | ||
1062 | * see the interrupt and prepare our message response | ||
1063 | * before continuing. | ||
1064 | */ | ||
1065 | test SSTAT1, REQINIT jz inb_next_wait; | ||
1066 | test SSTAT1, SCSIPERR jnz .; | ||
1067 | and LASTPHASE, PHASE_MASK, SCSISIGI; | ||
1068 | cmp LASTPHASE, P_MESGIN jne mesgin_phasemis; | ||
1069 | inb_first: | ||
1070 | mov DINDEX,SINDEX; | ||
1071 | mov DINDIR,SCSIBUSL ret; /*read byte directly from bus*/ | ||
1072 | inb_last: | ||
1073 | mov NONE,SCSIDATL ret; /*dummy read from latch to ACK*/ | ||
1074 | |||
1075 | |||
1076 | mesgin_phasemis: | ||
1077 | /* | ||
1078 | * We expected to receive another byte, but the target changed phase | ||
1079 | */ | ||
1080 | mvi INTSTAT, MSGIN_PHASEMIS; | ||
1081 | jmp ITloop; | ||
1082 | |||
1083 | /* | ||
1084 | * DMA data transfer. HADDR and HCNT must be loaded first, and | ||
1085 | * SINDEX should contain the value to load DFCNTRL with - 0x3d for | ||
1086 | * host->scsi, or 0x39 for scsi->host. The SCSI channel is cleared | ||
1087 | * during initialization. | ||
1088 | */ | ||
1089 | if ((p->features & AHC_ULTRA2) == 0) { | ||
1090 | dma: | ||
1091 | mov DFCNTRL,SINDEX; | ||
1092 | dma_loop: | ||
1093 | test SSTAT0,DMADONE jnz dma_dmadone; | ||
1094 | test SSTAT1,PHASEMIS jz dma_loop; /* ie. underrun */ | ||
1095 | dma_phasemis: | ||
1096 | test SSTAT0,SDONE jnz dma_checkfifo; | ||
1097 | mov SINDEX,ALLZEROS; /* Notify caller of phasemiss */ | ||
1098 | |||
1099 | /* | ||
1100 | * We will be "done" DMAing when the transfer count goes to zero, or | ||
1101 | * the target changes the phase (in light of this, it makes sense that | ||
1102 | * the DMA circuitry doesn't ACK when PHASEMIS is active). If we are | ||
1103 | * doing a SCSI->Host transfer, the data FIFO should be flushed auto- | ||
1104 | * magically on STCNT=0 or a phase change, so just wait for FIFO empty | ||
1105 | * status. | ||
1106 | */ | ||
1107 | dma_checkfifo: | ||
1108 | test DFCNTRL,DIRECTION jnz dma_fifoempty; | ||
1109 | dma_fifoflush: | ||
1110 | test DFSTATUS,FIFOEMP jz dma_fifoflush; | ||
1111 | |||
1112 | dma_fifoempty: | ||
1113 | /* Don't clobber an inprogress host data transfer */ | ||
1114 | test DFSTATUS, MREQPEND jnz dma_fifoempty; | ||
1115 | /* | ||
1116 | * Now shut the DMA enables off and make sure that the DMA enables are | ||
1117 | * actually off first lest we get an ILLSADDR. | ||
1118 | */ | ||
1119 | dma_dmadone: | ||
1120 | cmp LASTPHASE, P_COMMAND je dma_await_nreq; | ||
1121 | test SCSIRATE, 0x0f jnz dma_shutdown; | ||
1122 | dma_await_nreq: | ||
1123 | test SCSISIGI, REQI jz dma_shutdown; | ||
1124 | test SSTAT1, (PHASEMIS|REQINIT) jz dma_await_nreq; | ||
1125 | dma_shutdown: | ||
1126 | and DFCNTRL, ~(SCSIEN|SDMAEN|HDMAEN); | ||
1127 | dma_halt: | ||
1128 | /* | ||
1129 | * Some revisions of the aic7880 have a problem where, if the | ||
1130 | * data fifo is full, but the PCI input latch is not empty, | ||
1131 | * HDMAEN cannot be cleared. The fix used here is to attempt | ||
1132 | * to drain the data fifo until there is space for the input | ||
1133 | * latch to drain and HDMAEN de-asserts. | ||
1134 | */ | ||
1135 | if ((p->bugs & AHC_BUG_PCI_2_1_RETRY) != 0) { | ||
1136 | mov NONE, DFDAT; | ||
1137 | } | ||
1138 | test DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz dma_halt; | ||
1139 | } | ||
1140 | return: | ||
1141 | ret; | ||
1142 | |||
1143 | /* | ||
1144 | * Assert that if we've been reselected, then we've seen an IDENTIFY | ||
1145 | * message. | ||
1146 | */ | ||
1147 | assert: | ||
1148 | test SEQ_FLAGS,IDENTIFY_SEEN jnz return; /* seen IDENTIFY? */ | ||
1149 | |||
1150 | mvi INTSTAT,NO_IDENT ret; /* no - tell the kernel */ | ||
1151 | |||
1152 | /* | ||
1153 | * Locate a disconnected SCB either by SAVED_TCL (ARG_1 is SCB_LIST_NULL) | ||
1154 | * or by the SCBID ARG_1. The search begins at the SCB index passed in | ||
1155 | * via SINDEX which is an SCB that must be on the disconnected list. If | ||
1156 | * the SCB cannot be found, SINDEX will be SCB_LIST_NULL, otherwise, SCBPTR | ||
1157 | * is set to the proper SCB. | ||
1158 | */ | ||
1159 | findSCB: | ||
1160 | mov SCBPTR,SINDEX; /* Initialize SCBPTR */ | ||
1161 | cmp ARG_1, SCB_LIST_NULL jne findSCB_by_SCBID; | ||
1162 | mov A, SAVED_TCL; | ||
1163 | mvi SCB_TCL jmp findSCB_loop; /* &SCB_TCL -> SINDEX */ | ||
1164 | findSCB_by_SCBID: | ||
1165 | mov A, ARG_1; /* Tag passed in ARG_1 */ | ||
1166 | mvi SCB_TAG jmp findSCB_loop; /* &SCB_TAG -> SINDEX */ | ||
1167 | findSCB_next: | ||
1168 | mov ARG_2, SCBPTR; | ||
1169 | cmp SCB_NEXT, SCB_LIST_NULL je notFound; | ||
1170 | mov SCBPTR,SCB_NEXT; | ||
1171 | dec SINDEX; /* Last comparison moved us too far */ | ||
1172 | findSCB_loop: | ||
1173 | cmp SINDIR, A jne findSCB_next; | ||
1174 | mov SINDEX, SCBPTR ret; | ||
1175 | notFound: | ||
1176 | mvi SINDEX, SCB_LIST_NULL ret; | ||
1177 | |||
1178 | /* | ||
1179 | * Retrieve an SCB by SCBID first searching the disconnected list falling | ||
1180 | * back to DMA'ing the SCB down from the host. This routine assumes that | ||
1181 | * ARG_1 is the SCBID of interest and that SINDEX is the position in the | ||
1182 | * disconnected list to start the search from. If SINDEX is SCB_LIST_NULL, | ||
1183 | * we go directly to the host for the SCB. | ||
1184 | */ | ||
1185 | retrieveSCB: | ||
1186 | test SEQ_FLAGS, SCBPTR_VALID jz retrieve_from_host; | ||
1187 | mov SCBPTR call findSCB; /* Continue the search */ | ||
1188 | cmp SINDEX, SCB_LIST_NULL je retrieve_from_host; | ||
1189 | |||
1190 | /* | ||
1191 | * This routine expects SINDEX to contain the index of the SCB to be | ||
1192 | * removed, SCBPTR to be pointing to that SCB, and ARG_2 to be the | ||
1193 | * SCBID of the SCB just previous to this one in the list or SCB_LIST_NULL | ||
1194 | * if it is at the head. | ||
1195 | */ | ||
1196 | rem_scb_from_disc_list: | ||
1197 | /* Remove this SCB from the disconnection list */ | ||
1198 | cmp ARG_2, SCB_LIST_NULL je rHead; | ||
1199 | mov DINDEX, SCB_NEXT; | ||
1200 | mov SCBPTR, ARG_2; | ||
1201 | mov SCB_NEXT, DINDEX; | ||
1202 | mov SCBPTR, SINDEX ret; | ||
1203 | rHead: | ||
1204 | mov DISCONNECTED_SCBH,SCB_NEXT ret; | ||
1205 | |||
1206 | retrieve_from_host: | ||
1207 | /* | ||
1208 | * We didn't find it. Pull an SCB and DMA down the one we want. | ||
1209 | * We should never get here in the non-paging case. | ||
1210 | */ | ||
1211 | mov ALLZEROS call get_free_or_disc_scb; | ||
1212 | mvi DMAPARAMS, HDMAEN|DIRECTION|FIFORESET; | ||
1213 | /* Jump instead of call as we want to return anyway */ | ||
1214 | mov ARG_1 jmp dma_scb; | ||
1215 | |||
1216 | /* | ||
1217 | * Determine whether a target is using tagged or non-tagged transactions | ||
1218 | * by first looking for a matching transaction based on the TCL and if | ||
1219 | * that fails, looking up this device in the host's untagged SCB array. | ||
1220 | * The TCL to search for is assumed to be in SAVED_TCL. The value is | ||
1221 | * returned in ARG_1 (SCB_LIST_NULL for tagged, SCBID for non-tagged). | ||
1222 | * The SCBPTR_VALID bit is set in SEQ_FLAGS if we found the information | ||
1223 | * in an SCB instead of having to go to the host. | ||
1224 | */ | ||
1225 | get_untagged_SCBID: | ||
1226 | cmp DISCONNECTED_SCBH, SCB_LIST_NULL je get_SCBID_from_host; | ||
1227 | mvi ARG_1, SCB_LIST_NULL; | ||
1228 | mov DISCONNECTED_SCBH call findSCB; | ||
1229 | cmp SINDEX, SCB_LIST_NULL je get_SCBID_from_host; | ||
1230 | or SEQ_FLAGS, SCBPTR_VALID;/* Was in disconnected list */ | ||
1231 | test SCB_CONTROL, TAG_ENB jnz . + 2; | ||
1232 | mov ARG_1, SCB_TAG ret; | ||
1233 | mvi ARG_1, SCB_LIST_NULL ret; | ||
1234 | |||
1235 | /* | ||
1236 | * Fetch a byte from host memory given an index of (A + (256 * SINDEX)) | ||
1237 | * and a base address of SCBID_ADDR. The byte is returned in RETURN_2. | ||
1238 | */ | ||
1239 | fetch_byte: | ||
1240 | mov ARG_2, SINDEX; | ||
1241 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
1242 | mvi DINDEX, CCHADDR; | ||
1243 | mvi SCBID_ADDR call set_1byte_addr; | ||
1244 | mvi CCHCNT, 1; | ||
1245 | mvi CCSGCTL, CCSGEN|CCSGRESET; | ||
1246 | test CCSGCTL, CCSGDONE jz .; | ||
1247 | mvi CCSGCTL, CCSGRESET; | ||
1248 | bmov RETURN_2, CCSGRAM, 1 ret; | ||
1249 | } else { | ||
1250 | mvi DINDEX, HADDR; | ||
1251 | mvi SCBID_ADDR call set_1byte_addr; | ||
1252 | mvi HCNT[0], 1; | ||
1253 | clr HCNT[1]; | ||
1254 | clr HCNT[2]; | ||
1255 | mvi DFCNTRL, HDMAEN|DIRECTION|FIFORESET; | ||
1256 | call dma_finish; | ||
1257 | mov RETURN_2, DFDAT ret; | ||
1258 | } | ||
1259 | |||
1260 | /* | ||
1261 | * Prepare the hardware to post a byte to host memory given an | ||
1262 | * index of (A + (256 * SINDEX)) and a base address of SCBID_ADDR. | ||
1263 | */ | ||
1264 | post_byte_setup: | ||
1265 | mov ARG_2, SINDEX; | ||
1266 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
1267 | mvi DINDEX, CCHADDR; | ||
1268 | mvi SCBID_ADDR call set_1byte_addr; | ||
1269 | mvi CCHCNT, 1; | ||
1270 | mvi CCSCBCTL, CCSCBRESET ret; | ||
1271 | } else { | ||
1272 | mvi DINDEX, HADDR; | ||
1273 | mvi SCBID_ADDR call set_1byte_addr; | ||
1274 | mvi HCNT[0], 1; | ||
1275 | clr HCNT[1]; | ||
1276 | clr HCNT[2]; | ||
1277 | mvi DFCNTRL, FIFORESET ret; | ||
1278 | } | ||
1279 | |||
1280 | post_byte: | ||
1281 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
1282 | bmov CCSCBRAM, SINDEX, 1; | ||
1283 | or CCSCBCTL, CCSCBEN|CCSCBRESET; | ||
1284 | test CCSCBCTL, CCSCBDONE jz .; | ||
1285 | clr CCSCBCTL ret; | ||
1286 | } else { | ||
1287 | mov DFDAT, SINDEX; | ||
1288 | or DFCNTRL, HDMAEN|FIFOFLUSH; | ||
1289 | jmp dma_finish; | ||
1290 | } | ||
1291 | |||
1292 | get_SCBID_from_host: | ||
1293 | mov A, SAVED_TCL; | ||
1294 | mvi UNTAGGEDSCB_OFFSET call fetch_byte; | ||
1295 | mov RETURN_1, RETURN_2 ret; | ||
1296 | |||
1297 | phase_lock: | ||
1298 | test SSTAT1, REQINIT jz phase_lock; | ||
1299 | test SSTAT1, SCSIPERR jnz phase_lock; | ||
1300 | and SCSISIGO, PHASE_MASK, SCSISIGI; | ||
1301 | and LASTPHASE, PHASE_MASK, SCSISIGI ret; | ||
1302 | |||
1303 | if ((p->features & AHC_CMD_CHAN) == 0) { | ||
1304 | set_stcnt_from_hcnt: | ||
1305 | mov STCNT[0], HCNT[0]; | ||
1306 | mov STCNT[1], HCNT[1]; | ||
1307 | mov STCNT[2], HCNT[2] ret; | ||
1308 | |||
1309 | bcopy_7: | ||
1310 | mov DINDIR, SINDIR; | ||
1311 | mov DINDIR, SINDIR; | ||
1312 | bcopy_5: | ||
1313 | mov DINDIR, SINDIR; | ||
1314 | bcopy_4: | ||
1315 | mov DINDIR, SINDIR; | ||
1316 | bcopy_3: | ||
1317 | mov DINDIR, SINDIR; | ||
1318 | mov DINDIR, SINDIR; | ||
1319 | mov DINDIR, SINDIR ret; | ||
1320 | } | ||
1321 | |||
1322 | /* | ||
1323 | * Setup addr assuming that A is an index into | ||
1324 | * an array of 32byte objects, SINDEX contains | ||
1325 | * the base address of that array, and DINDEX | ||
1326 | * contains the base address of the location | ||
1327 | * to store the indexed address. | ||
1328 | */ | ||
1329 | set_32byte_addr: | ||
1330 | shr ARG_2, 3, A; | ||
1331 | shl A, 5; | ||
1332 | /* | ||
1333 | * Setup addr assuming that A + (ARG_1 * 256) is an | ||
1334 | * index into an array of 1byte objects, SINDEX contains | ||
1335 | * the base address of that array, and DINDEX contains | ||
1336 | * the base address of the location to store the computed | ||
1337 | * address. | ||
1338 | */ | ||
1339 | set_1byte_addr: | ||
1340 | add DINDIR, A, SINDIR; | ||
1341 | mov A, ARG_2; | ||
1342 | adc DINDIR, A, SINDIR; | ||
1343 | clr A; | ||
1344 | adc DINDIR, A, SINDIR; | ||
1345 | adc DINDIR, A, SINDIR ret; | ||
1346 | |||
1347 | /* | ||
1348 | * Either post or fetch and SCB from host memory based on the | ||
1349 | * DIRECTION bit in DMAPARAMS. The host SCB index is in SINDEX. | ||
1350 | */ | ||
1351 | dma_scb: | ||
1352 | mov A, SINDEX; | ||
1353 | if ((p->features & AHC_CMD_CHAN) != 0) { | ||
1354 | mvi DINDEX, CCHADDR; | ||
1355 | mvi HSCB_ADDR call set_32byte_addr; | ||
1356 | mov CCSCBPTR, SCBPTR; | ||
1357 | mvi CCHCNT, 32; | ||
1358 | test DMAPARAMS, DIRECTION jz dma_scb_tohost; | ||
1359 | mvi CCSCBCTL, CCARREN|CCSCBEN|CCSCBDIR|CCSCBRESET; | ||
1360 | cmp CCSCBCTL, CCSCBDONE|ARRDONE|CCARREN|CCSCBEN|CCSCBDIR jne .; | ||
1361 | jmp dma_scb_finish; | ||
1362 | dma_scb_tohost: | ||
1363 | if ((p->features & AHC_ULTRA2) == 0) { | ||
1364 | mvi CCSCBCTL, CCSCBRESET; | ||
1365 | bmov CCSCBRAM, SCB_CONTROL, 32; | ||
1366 | or CCSCBCTL, CCSCBEN|CCSCBRESET; | ||
1367 | test CCSCBCTL, CCSCBDONE jz .; | ||
1368 | } | ||
1369 | if ((p->features & AHC_ULTRA2) != 0) { | ||
1370 | if ((p->bugs & AHC_BUG_SCBCHAN_UPLOAD) != 0) { | ||
1371 | mvi CCSCBCTL, CCARREN|CCSCBRESET; | ||
1372 | cmp CCSCBCTL, ARRDONE|CCARREN jne .; | ||
1373 | mvi CCHCNT, 32; | ||
1374 | mvi CCSCBCTL, CCSCBEN|CCSCBRESET; | ||
1375 | cmp CCSCBCTL, CCSCBDONE|CCSCBEN jne .; | ||
1376 | } else { | ||
1377 | mvi CCSCBCTL, CCARREN|CCSCBEN|CCSCBRESET; | ||
1378 | cmp CCSCBCTL, CCSCBDONE|ARRDONE|CCARREN|CCSCBEN jne .; | ||
1379 | } | ||
1380 | } | ||
1381 | dma_scb_finish: | ||
1382 | clr CCSCBCTL; | ||
1383 | test CCSCBCTL, CCARREN|CCSCBEN jnz .; | ||
1384 | ret; | ||
1385 | } | ||
1386 | if ((p->features & AHC_CMD_CHAN) == 0) { | ||
1387 | mvi DINDEX, HADDR; | ||
1388 | mvi HSCB_ADDR call set_32byte_addr; | ||
1389 | mvi HCNT[0], 32; | ||
1390 | clr HCNT[1]; | ||
1391 | clr HCNT[2]; | ||
1392 | mov DFCNTRL, DMAPARAMS; | ||
1393 | test DMAPARAMS, DIRECTION jnz dma_scb_fromhost; | ||
1394 | /* Fill it with the SCB data */ | ||
1395 | copy_scb_tofifo: | ||
1396 | mvi SINDEX, SCB_CONTROL; | ||
1397 | add A, 32, SINDEX; | ||
1398 | copy_scb_tofifo_loop: | ||
1399 | mov DFDAT,SINDIR; | ||
1400 | mov DFDAT,SINDIR; | ||
1401 | mov DFDAT,SINDIR; | ||
1402 | mov DFDAT,SINDIR; | ||
1403 | mov DFDAT,SINDIR; | ||
1404 | mov DFDAT,SINDIR; | ||
1405 | mov DFDAT,SINDIR; | ||
1406 | mov DFDAT,SINDIR; | ||
1407 | cmp SINDEX, A jne copy_scb_tofifo_loop; | ||
1408 | or DFCNTRL, HDMAEN|FIFOFLUSH; | ||
1409 | jmp dma_finish; | ||
1410 | dma_scb_fromhost: | ||
1411 | mvi DINDEX, SCB_CONTROL; | ||
1412 | if ((p->bugs & AHC_BUG_PCI_2_1_RETRY) != 0) { | ||
1413 | /* | ||
1414 | * Set the A to -24. It it hits 0, then we let | ||
1415 | * our code fall through to dfdat_in_8 to complete | ||
1416 | * the last of the copy. | ||
1417 | * | ||
1418 | * Also, things happen 8 bytes at a time in this | ||
1419 | * case, so we may need to drain the fifo at most | ||
1420 | * 3 times to keep things flowing | ||
1421 | */ | ||
1422 | mvi A, -24; | ||
1423 | dma_scb_hang_fifo: | ||
1424 | /* Wait for the first bit of data to hit the fifo */ | ||
1425 | test DFSTATUS, FIFOEMP jnz .; | ||
1426 | dma_scb_hang_wait: | ||
1427 | /* OK, now they've started to transfer into the fifo, | ||
1428 | * so wait for them to stop trying to transfer any | ||
1429 | * more data. | ||
1430 | */ | ||
1431 | test DFSTATUS, MREQPEND jnz .; | ||
1432 | /* | ||
1433 | * OK, they started, then they stopped, now see if they | ||
1434 | * managed to complete the job before stopping. Try | ||
1435 | * it multiple times to give the chip a few cycles to | ||
1436 | * set the flag if it did complete. | ||
1437 | */ | ||
1438 | test DFSTATUS, HDONE jnz dma_scb_hang_dma_done; | ||
1439 | test DFSTATUS, HDONE jnz dma_scb_hang_dma_done; | ||
1440 | test DFSTATUS, HDONE jnz dma_scb_hang_dma_done; | ||
1441 | /* | ||
1442 | * Too bad, the chip didn't complete the DMA, but there | ||
1443 | * aren't any more memory requests pending, so that | ||
1444 | * means it stopped part way through and hung. That's | ||
1445 | * our bug, so now we drain what data there is in the | ||
1446 | * fifo in order to get things going again. | ||
1447 | */ | ||
1448 | dma_scb_hang_empty_fifo: | ||
1449 | call dfdat_in_8; | ||
1450 | add A, 8; | ||
1451 | add SINDEX, A, HCNT; | ||
1452 | /* | ||
1453 | * If there are another 8 bytes of data waiting in the | ||
1454 | * fifo, then the carry bit will be set as a result | ||
1455 | * of the above add command (unless A is non-negative, | ||
1456 | * in which case the carry bit won't be set). | ||
1457 | */ | ||
1458 | jc dma_scb_hang_empty_fifo; | ||
1459 | /* | ||
1460 | * We've emptied the fifo now, but we wouldn't have got | ||
1461 | * here if the memory transfer hadn't stopped part way | ||
1462 | * through, so go back up to the beginning of the | ||
1463 | * loop and start over. When it succeeds in getting | ||
1464 | * all the data down, HDONE will be set and we'll | ||
1465 | * jump to the code just below here. | ||
1466 | */ | ||
1467 | jmp dma_scb_hang_fifo; | ||
1468 | dma_scb_hang_dma_done: | ||
1469 | and DFCNTRL, ~HDMAEN; | ||
1470 | test DFCNTRL, HDMAEN jnz .; | ||
1471 | call dfdat_in_8; | ||
1472 | add A, 8; | ||
1473 | cmp A, 8 jne . - 2; | ||
1474 | ret; | ||
1475 | } else { | ||
1476 | call dma_finish; | ||
1477 | call dfdat_in_8; | ||
1478 | call dfdat_in_8; | ||
1479 | call dfdat_in_8; | ||
1480 | } | ||
1481 | dfdat_in_8: | ||
1482 | mov DINDIR,DFDAT; | ||
1483 | dfdat_in_7: | ||
1484 | mov DINDIR,DFDAT; | ||
1485 | mov DINDIR,DFDAT; | ||
1486 | mov DINDIR,DFDAT; | ||
1487 | mov DINDIR,DFDAT; | ||
1488 | mov DINDIR,DFDAT; | ||
1489 | mov DINDIR,DFDAT; | ||
1490 | mov DINDIR,DFDAT ret; | ||
1491 | } | ||
1492 | |||
1493 | |||
1494 | /* | ||
1495 | * Wait for DMA from host memory to data FIFO to complete, then disable | ||
1496 | * DMA and wait for it to acknowledge that it's off. | ||
1497 | */ | ||
1498 | if ((p->features & AHC_CMD_CHAN) == 0) { | ||
1499 | dma_finish: | ||
1500 | test DFSTATUS,HDONE jz dma_finish; | ||
1501 | /* Turn off DMA */ | ||
1502 | and DFCNTRL, ~HDMAEN; | ||
1503 | test DFCNTRL, HDMAEN jnz .; | ||
1504 | ret; | ||
1505 | } | ||
1506 | |||
1507 | add_scb_to_free_list: | ||
1508 | if ((p->flags & AHC_PAGESCBS) != 0) { | ||
1509 | mov SCB_NEXT, FREE_SCBH; | ||
1510 | mov FREE_SCBH, SCBPTR; | ||
1511 | } | ||
1512 | mvi SCB_TAG, SCB_LIST_NULL ret; | ||
1513 | |||
1514 | if ((p->flags & AHC_PAGESCBS) != 0) { | ||
1515 | get_free_or_disc_scb: | ||
1516 | cmp FREE_SCBH, SCB_LIST_NULL jne dequeue_free_scb; | ||
1517 | cmp DISCONNECTED_SCBH, SCB_LIST_NULL jne dequeue_disc_scb; | ||
1518 | return_error: | ||
1519 | mvi SINDEX, SCB_LIST_NULL ret; | ||
1520 | dequeue_disc_scb: | ||
1521 | mov SCBPTR, DISCONNECTED_SCBH; | ||
1522 | dma_up_scb: | ||
1523 | mvi DMAPARAMS, FIFORESET; | ||
1524 | mov SCB_TAG call dma_scb; | ||
1525 | unlink_disc_scb: | ||
1526 | mov DISCONNECTED_SCBH, SCB_NEXT ret; | ||
1527 | dequeue_free_scb: | ||
1528 | mov SCBPTR, FREE_SCBH; | ||
1529 | mov FREE_SCBH, SCB_NEXT ret; | ||
1530 | } | ||
1531 | |||
1532 | add_scb_to_disc_list: | ||
1533 | /* | ||
1534 | * Link this SCB into the DISCONNECTED list. This list holds the | ||
1535 | * candidates for paging out an SCB if one is needed for a new command. | ||
1536 | * Modifying the disconnected list is a critical(pause dissabled) section. | ||
1537 | */ | ||
1538 | mov SCB_NEXT, DISCONNECTED_SCBH; | ||
1539 | mov DISCONNECTED_SCBH, SCBPTR ret; | ||
diff --git a/drivers/scsi/aic7xxx_old/aic7xxx_proc.c b/drivers/scsi/aic7xxx_old/aic7xxx_proc.c deleted file mode 100644 index 976f45ccf2cf..000000000000 --- a/drivers/scsi/aic7xxx_old/aic7xxx_proc.c +++ /dev/null | |||
@@ -1,270 +0,0 @@ | |||
1 | /*+M************************************************************************* | ||
2 | * Adaptec AIC7xxx device driver proc support for Linux. | ||
3 | * | ||
4 | * Copyright (c) 1995, 1996 Dean W. Gehnert | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2, or (at your option) | ||
9 | * any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; see the file COPYING. If not, write to | ||
18 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | ||
19 | * | ||
20 | * ---------------------------------------------------------------- | ||
21 | * o Modified from the EATA-DMA /proc support. | ||
22 | * o Additional support for device block statistics provided by | ||
23 | * Matthew Jacob. | ||
24 | * o Correction of overflow by Heinz Mauelshagen | ||
25 | * o Adittional corrections by Doug Ledford | ||
26 | * | ||
27 | * Dean W. Gehnert, deang@teleport.com, 05/01/96 | ||
28 | * | ||
29 | * $Id: aic7xxx_proc.c,v 4.1 1997/06/97 08:23:42 deang Exp $ | ||
30 | *-M*************************************************************************/ | ||
31 | |||
32 | |||
33 | #define HDRB \ | ||
34 | " 0 - 4K 4 - 16K 16 - 64K 64 - 256K 256K - 1M 1M+" | ||
35 | |||
36 | |||
37 | /*+F************************************************************************* | ||
38 | * Function: | ||
39 | * aic7xxx_show_info | ||
40 | * | ||
41 | * Description: | ||
42 | * Return information to handle /proc support for the driver. | ||
43 | *-F*************************************************************************/ | ||
44 | int | ||
45 | aic7xxx_show_info(struct seq_file *m, struct Scsi_Host *HBAptr) | ||
46 | { | ||
47 | struct aic7xxx_host *p; | ||
48 | struct aic_dev_data *aic_dev; | ||
49 | struct scsi_device *sdptr; | ||
50 | unsigned char i; | ||
51 | unsigned char tindex; | ||
52 | |||
53 | for(p=first_aic7xxx; p && p->host != HBAptr; p=p->next) | ||
54 | ; | ||
55 | |||
56 | if (!p) | ||
57 | { | ||
58 | seq_printf(m, "Can't find adapter for host number %d\n", HBAptr->host_no); | ||
59 | return 0; | ||
60 | } | ||
61 | |||
62 | p = (struct aic7xxx_host *) HBAptr->hostdata; | ||
63 | |||
64 | seq_printf(m, "Adaptec AIC7xxx driver version: "); | ||
65 | seq_printf(m, "%s/", AIC7XXX_C_VERSION); | ||
66 | seq_printf(m, "%s", AIC7XXX_H_VERSION); | ||
67 | seq_printf(m, "\n"); | ||
68 | seq_printf(m, "Adapter Configuration:\n"); | ||
69 | seq_printf(m, " SCSI Adapter: %s\n", | ||
70 | board_names[p->board_name_index]); | ||
71 | if (p->flags & AHC_TWIN) | ||
72 | seq_printf(m, " Twin Channel Controller "); | ||
73 | else | ||
74 | { | ||
75 | char *channel = ""; | ||
76 | char *ultra = ""; | ||
77 | char *wide = "Narrow "; | ||
78 | if (p->flags & AHC_MULTI_CHANNEL) | ||
79 | { | ||
80 | channel = " Channel A"; | ||
81 | if (p->flags & (AHC_CHNLB|AHC_CHNLC)) | ||
82 | channel = (p->flags & AHC_CHNLB) ? " Channel B" : " Channel C"; | ||
83 | } | ||
84 | if (p->features & AHC_WIDE) | ||
85 | wide = "Wide "; | ||
86 | if (p->features & AHC_ULTRA3) | ||
87 | { | ||
88 | switch(p->chip & AHC_CHIPID_MASK) | ||
89 | { | ||
90 | case AHC_AIC7892: | ||
91 | case AHC_AIC7899: | ||
92 | ultra = "Ultra-160/m LVD/SE "; | ||
93 | break; | ||
94 | default: | ||
95 | ultra = "Ultra-3 LVD/SE "; | ||
96 | break; | ||
97 | } | ||
98 | } | ||
99 | else if (p->features & AHC_ULTRA2) | ||
100 | ultra = "Ultra-2 LVD/SE "; | ||
101 | else if (p->features & AHC_ULTRA) | ||
102 | ultra = "Ultra "; | ||
103 | seq_printf(m, " %s%sController%s ", | ||
104 | ultra, wide, channel); | ||
105 | } | ||
106 | switch(p->chip & ~AHC_CHIPID_MASK) | ||
107 | { | ||
108 | case AHC_VL: | ||
109 | seq_printf(m, "at VLB slot %d\n", p->pci_device_fn); | ||
110 | break; | ||
111 | case AHC_EISA: | ||
112 | seq_printf(m, "at EISA slot %d\n", p->pci_device_fn); | ||
113 | break; | ||
114 | default: | ||
115 | seq_printf(m, "at PCI %d/%d/%d\n", p->pci_bus, | ||
116 | PCI_SLOT(p->pci_device_fn), PCI_FUNC(p->pci_device_fn)); | ||
117 | break; | ||
118 | } | ||
119 | if( !(p->maddr) ) | ||
120 | { | ||
121 | seq_printf(m, " Programmed I/O Base: %lx\n", p->base); | ||
122 | } | ||
123 | else | ||
124 | { | ||
125 | seq_printf(m, " PCI MMAPed I/O Base: 0x%lx\n", p->mbase); | ||
126 | } | ||
127 | if( (p->chip & (AHC_VL | AHC_EISA)) ) | ||
128 | { | ||
129 | seq_printf(m, " BIOS Memory Address: 0x%08x\n", p->bios_address); | ||
130 | } | ||
131 | seq_printf(m, " Adapter SEEPROM Config: %s\n", | ||
132 | (p->flags & AHC_SEEPROM_FOUND) ? "SEEPROM found and used." : | ||
133 | ((p->flags & AHC_USEDEFAULTS) ? "SEEPROM not found, using defaults." : | ||
134 | "SEEPROM not found, using leftover BIOS values.") ); | ||
135 | seq_printf(m, " Adaptec SCSI BIOS: %s\n", | ||
136 | (p->flags & AHC_BIOS_ENABLED) ? "Enabled" : "Disabled"); | ||
137 | seq_printf(m, " IRQ: %d\n", HBAptr->irq); | ||
138 | seq_printf(m, " SCBs: Active %d, Max Active %d,\n", | ||
139 | p->activescbs, p->max_activescbs); | ||
140 | seq_printf(m, " Allocated %d, HW %d, " | ||
141 | "Page %d\n", p->scb_data->numscbs, p->scb_data->maxhscbs, | ||
142 | p->scb_data->maxscbs); | ||
143 | if (p->flags & AHC_EXTERNAL_SRAM) | ||
144 | seq_printf(m, " Using External SCB SRAM\n"); | ||
145 | seq_printf(m, " Interrupts: %ld", p->isr_count); | ||
146 | if (p->chip & AHC_EISA) | ||
147 | { | ||
148 | seq_printf(m, " %s\n", | ||
149 | (p->pause & IRQMS) ? "(Level Sensitive)" : "(Edge Triggered)"); | ||
150 | } | ||
151 | else | ||
152 | { | ||
153 | seq_printf(m, "\n"); | ||
154 | } | ||
155 | seq_printf(m, " BIOS Control Word: 0x%04x\n", | ||
156 | p->bios_control); | ||
157 | seq_printf(m, " Adapter Control Word: 0x%04x\n", | ||
158 | p->adapter_control); | ||
159 | seq_printf(m, " Extended Translation: %sabled\n", | ||
160 | (p->flags & AHC_EXTEND_TRANS_A) ? "En" : "Dis"); | ||
161 | seq_printf(m, "Disconnect Enable Flags: 0x%04x\n", p->discenable); | ||
162 | if (p->features & (AHC_ULTRA | AHC_ULTRA2)) | ||
163 | { | ||
164 | seq_printf(m, " Ultra Enable Flags: 0x%04x\n", p->ultraenb); | ||
165 | } | ||
166 | seq_printf(m, "Default Tag Queue Depth: %d\n", aic7xxx_default_queue_depth); | ||
167 | seq_printf(m, " Tagged Queue By Device array for aic7xxx host " | ||
168 | "instance %d:\n", p->instance); | ||
169 | seq_printf(m, " {"); | ||
170 | for(i=0; i < (MAX_TARGETS - 1); i++) | ||
171 | seq_printf(m, "%d,",aic7xxx_tag_info[p->instance].tag_commands[i]); | ||
172 | seq_printf(m, "%d}\n",aic7xxx_tag_info[p->instance].tag_commands[i]); | ||
173 | |||
174 | seq_printf(m, "\n"); | ||
175 | seq_printf(m, "Statistics:\n\n"); | ||
176 | list_for_each_entry(aic_dev, &p->aic_devs, list) | ||
177 | { | ||
178 | sdptr = aic_dev->SDptr; | ||
179 | tindex = sdptr->channel << 3 | sdptr->id; | ||
180 | seq_printf(m, "(scsi%d:%d:%d:%d)\n", | ||
181 | p->host_no, sdptr->channel, sdptr->id, sdptr->lun); | ||
182 | seq_printf(m, " Device using %s/%s", | ||
183 | (aic_dev->cur.width == MSG_EXT_WDTR_BUS_16_BIT) ? | ||
184 | "Wide" : "Narrow", | ||
185 | (aic_dev->cur.offset != 0) ? | ||
186 | "Sync transfers at " : "Async transfers.\n" ); | ||
187 | if (aic_dev->cur.offset != 0) | ||
188 | { | ||
189 | struct aic7xxx_syncrate *sync_rate; | ||
190 | unsigned char options = aic_dev->cur.options; | ||
191 | int period = aic_dev->cur.period; | ||
192 | int rate = (aic_dev->cur.width == | ||
193 | MSG_EXT_WDTR_BUS_16_BIT) ? 1 : 0; | ||
194 | |||
195 | sync_rate = aic7xxx_find_syncrate(p, &period, 0, &options); | ||
196 | if (sync_rate != NULL) | ||
197 | { | ||
198 | seq_printf(m, "%s MByte/sec, offset %d\n", | ||
199 | sync_rate->rate[rate], | ||
200 | aic_dev->cur.offset ); | ||
201 | } | ||
202 | else | ||
203 | { | ||
204 | seq_printf(m, "3.3 MByte/sec, offset %d\n", | ||
205 | aic_dev->cur.offset ); | ||
206 | } | ||
207 | } | ||
208 | seq_printf(m, " Transinfo settings: "); | ||
209 | seq_printf(m, "current(%d/%d/%d/%d), ", | ||
210 | aic_dev->cur.period, | ||
211 | aic_dev->cur.offset, | ||
212 | aic_dev->cur.width, | ||
213 | aic_dev->cur.options); | ||
214 | seq_printf(m, "goal(%d/%d/%d/%d), ", | ||
215 | aic_dev->goal.period, | ||
216 | aic_dev->goal.offset, | ||
217 | aic_dev->goal.width, | ||
218 | aic_dev->goal.options); | ||
219 | seq_printf(m, "user(%d/%d/%d/%d)\n", | ||
220 | p->user[tindex].period, | ||
221 | p->user[tindex].offset, | ||
222 | p->user[tindex].width, | ||
223 | p->user[tindex].options); | ||
224 | if(sdptr->simple_tags) | ||
225 | { | ||
226 | seq_printf(m, " Tagged Command Queueing Enabled, Ordered Tags %s, Depth %d/%d\n", sdptr->ordered_tags ? "Enabled" : "Disabled", sdptr->queue_depth, aic_dev->max_q_depth); | ||
227 | } | ||
228 | if(aic_dev->barrier_total) | ||
229 | seq_printf(m, " Total transfers %ld:\n (%ld/%ld/%ld/%ld reads/writes/REQ_BARRIER/Ordered Tags)\n", | ||
230 | aic_dev->r_total+aic_dev->w_total, aic_dev->r_total, aic_dev->w_total, | ||
231 | aic_dev->barrier_total, aic_dev->ordered_total); | ||
232 | else | ||
233 | seq_printf(m, " Total transfers %ld:\n (%ld/%ld reads/writes)\n", | ||
234 | aic_dev->r_total+aic_dev->w_total, aic_dev->r_total, aic_dev->w_total); | ||
235 | seq_printf(m, "%s\n", HDRB); | ||
236 | seq_printf(m, " Reads:"); | ||
237 | for (i = 0; i < ARRAY_SIZE(aic_dev->r_bins); i++) | ||
238 | { | ||
239 | seq_printf(m, " %10ld", aic_dev->r_bins[i]); | ||
240 | } | ||
241 | seq_printf(m, "\n"); | ||
242 | seq_printf(m, " Writes:"); | ||
243 | for (i = 0; i < ARRAY_SIZE(aic_dev->w_bins); i++) | ||
244 | { | ||
245 | seq_printf(m, " %10ld", aic_dev->w_bins[i]); | ||
246 | } | ||
247 | seq_printf(m, "\n"); | ||
248 | seq_printf(m, "\n\n"); | ||
249 | } | ||
250 | return 0; | ||
251 | } | ||
252 | |||
253 | /* | ||
254 | * Overrides for Emacs so that we follow Linus's tabbing style. | ||
255 | * Emacs will notice this stuff at the end of the file and automatically | ||
256 | * adjust the settings for this buffer only. This must remain at the end | ||
257 | * of the file. | ||
258 | * --------------------------------------------------------------------------- | ||
259 | * Local variables: | ||
260 | * c-indent-level: 2 | ||
261 | * c-brace-imaginary-offset: 0 | ||
262 | * c-brace-offset: -2 | ||
263 | * c-argdecl-indent: 2 | ||
264 | * c-label-offset: -2 | ||
265 | * c-continued-statement-offset: 2 | ||
266 | * c-continued-brace-offset: 0 | ||
267 | * indent-tabs-mode: nil | ||
268 | * tab-width: 8 | ||
269 | * End: | ||
270 | */ | ||
diff --git a/drivers/scsi/aic7xxx_old/aic7xxx_reg.h b/drivers/scsi/aic7xxx_old/aic7xxx_reg.h deleted file mode 100644 index 27f2334abc71..000000000000 --- a/drivers/scsi/aic7xxx_old/aic7xxx_reg.h +++ /dev/null | |||
@@ -1,629 +0,0 @@ | |||
1 | /* | ||
2 | * DO NOT EDIT - This file is automatically generated. | ||
3 | */ | ||
4 | |||
5 | #define SCSISEQ 0x00 | ||
6 | #define TEMODE 0x80 | ||
7 | #define ENSELO 0x40 | ||
8 | #define ENSELI 0x20 | ||
9 | #define ENRSELI 0x10 | ||
10 | #define ENAUTOATNO 0x08 | ||
11 | #define ENAUTOATNI 0x04 | ||
12 | #define ENAUTOATNP 0x02 | ||
13 | #define SCSIRSTO 0x01 | ||
14 | |||
15 | #define SXFRCTL0 0x01 | ||
16 | #define DFON 0x80 | ||
17 | #define DFPEXP 0x40 | ||
18 | #define FAST20 0x20 | ||
19 | #define CLRSTCNT 0x10 | ||
20 | #define SPIOEN 0x08 | ||
21 | #define SCAMEN 0x04 | ||
22 | #define CLRCHN 0x02 | ||
23 | |||
24 | #define SXFRCTL1 0x02 | ||
25 | #define BITBUCKET 0x80 | ||
26 | #define SWRAPEN 0x40 | ||
27 | #define ENSPCHK 0x20 | ||
28 | #define STIMESEL 0x18 | ||
29 | #define ENSTIMER 0x04 | ||
30 | #define ACTNEGEN 0x02 | ||
31 | #define STPWEN 0x01 | ||
32 | |||
33 | #define SCSISIGO 0x03 | ||
34 | #define CDO 0x80 | ||
35 | #define IOO 0x40 | ||
36 | #define MSGO 0x20 | ||
37 | #define ATNO 0x10 | ||
38 | #define SELO 0x08 | ||
39 | #define BSYO 0x04 | ||
40 | #define REQO 0x02 | ||
41 | #define ACKO 0x01 | ||
42 | |||
43 | #define SCSISIGI 0x03 | ||
44 | #define ATNI 0x10 | ||
45 | #define SELI 0x08 | ||
46 | #define BSYI 0x04 | ||
47 | #define REQI 0x02 | ||
48 | #define ACKI 0x01 | ||
49 | |||
50 | #define SCSIRATE 0x04 | ||
51 | #define WIDEXFER 0x80 | ||
52 | #define SXFR_ULTRA2 0x7f | ||
53 | #define SXFR 0x70 | ||
54 | #define SOFS 0x0f | ||
55 | |||
56 | #define SCSIID 0x05 | ||
57 | #define SCSIOFFSET 0x05 | ||
58 | #define SOFS_ULTRA2 0x7f | ||
59 | |||
60 | #define SCSIDATL 0x06 | ||
61 | |||
62 | #define SCSIDATH 0x07 | ||
63 | |||
64 | #define STCNT 0x08 | ||
65 | |||
66 | #define OPTIONMODE 0x08 | ||
67 | #define AUTORATEEN 0x80 | ||
68 | #define AUTOACKEN 0x40 | ||
69 | #define ATNMGMNTEN 0x20 | ||
70 | #define BUSFREEREV 0x10 | ||
71 | #define EXPPHASEDIS 0x08 | ||
72 | #define SCSIDATL_IMGEN 0x04 | ||
73 | #define AUTO_MSGOUT_DE 0x02 | ||
74 | #define DIS_MSGIN_DUALEDGE 0x01 | ||
75 | |||
76 | #define CLRSINT0 0x0b | ||
77 | #define CLRSELDO 0x40 | ||
78 | #define CLRSELDI 0x20 | ||
79 | #define CLRSELINGO 0x10 | ||
80 | #define CLRSWRAP 0x08 | ||
81 | #define CLRSPIORDY 0x02 | ||
82 | |||
83 | #define SSTAT0 0x0b | ||
84 | #define TARGET 0x80 | ||
85 | #define SELDO 0x40 | ||
86 | #define SELDI 0x20 | ||
87 | #define SELINGO 0x10 | ||
88 | #define IOERR 0x08 | ||
89 | #define SWRAP 0x08 | ||
90 | #define SDONE 0x04 | ||
91 | #define SPIORDY 0x02 | ||
92 | #define DMADONE 0x01 | ||
93 | |||
94 | #define CLRSINT1 0x0c | ||
95 | #define CLRSELTIMEO 0x80 | ||
96 | #define CLRATNO 0x40 | ||
97 | #define CLRSCSIRSTI 0x20 | ||
98 | #define CLRBUSFREE 0x08 | ||
99 | #define CLRSCSIPERR 0x04 | ||
100 | #define CLRPHASECHG 0x02 | ||
101 | #define CLRREQINIT 0x01 | ||
102 | |||
103 | #define SSTAT1 0x0c | ||
104 | #define SELTO 0x80 | ||
105 | #define ATNTARG 0x40 | ||
106 | #define SCSIRSTI 0x20 | ||
107 | #define PHASEMIS 0x10 | ||
108 | #define BUSFREE 0x08 | ||
109 | #define SCSIPERR 0x04 | ||
110 | #define PHASECHG 0x02 | ||
111 | #define REQINIT 0x01 | ||
112 | |||
113 | #define SSTAT2 0x0d | ||
114 | #define OVERRUN 0x80 | ||
115 | #define SHVALID 0x40 | ||
116 | #define WIDE_RES 0x20 | ||
117 | #define SFCNT 0x1f | ||
118 | #define EXP_ACTIVE 0x10 | ||
119 | #define CRCVALERR 0x08 | ||
120 | #define CRCENDERR 0x04 | ||
121 | #define CRCREQERR 0x02 | ||
122 | #define DUAL_EDGE_ERROR 0x01 | ||
123 | |||
124 | #define SSTAT3 0x0e | ||
125 | #define SCSICNT 0xf0 | ||
126 | #define OFFCNT 0x0f | ||
127 | |||
128 | #define SCSIID_ULTRA2 0x0f | ||
129 | #define OID 0x0f | ||
130 | |||
131 | #define SIMODE0 0x10 | ||
132 | #define ENSELDO 0x40 | ||
133 | #define ENSELDI 0x20 | ||
134 | #define ENSELINGO 0x10 | ||
135 | #define ENIOERR 0x08 | ||
136 | #define ENSWRAP 0x08 | ||
137 | #define ENSDONE 0x04 | ||
138 | #define ENSPIORDY 0x02 | ||
139 | #define ENDMADONE 0x01 | ||
140 | |||
141 | #define SIMODE1 0x11 | ||
142 | #define ENSELTIMO 0x80 | ||
143 | #define ENATNTARG 0x40 | ||
144 | #define ENSCSIRST 0x20 | ||
145 | #define ENPHASEMIS 0x10 | ||
146 | #define ENBUSFREE 0x08 | ||
147 | #define ENSCSIPERR 0x04 | ||
148 | #define ENPHASECHG 0x02 | ||
149 | #define ENREQINIT 0x01 | ||
150 | |||
151 | #define SCSIBUSL 0x12 | ||
152 | |||
153 | #define SCSIBUSH 0x13 | ||
154 | |||
155 | #define SHADDR 0x14 | ||
156 | |||
157 | #define SELTIMER 0x18 | ||
158 | #define STAGE6 0x20 | ||
159 | #define STAGE5 0x10 | ||
160 | #define STAGE4 0x08 | ||
161 | #define STAGE3 0x04 | ||
162 | #define STAGE2 0x02 | ||
163 | #define STAGE1 0x01 | ||
164 | |||
165 | #define SELID 0x19 | ||
166 | #define SELID_MASK 0xf0 | ||
167 | #define ONEBIT 0x08 | ||
168 | |||
169 | #define SPIOCAP 0x1b | ||
170 | #define SOFT1 0x80 | ||
171 | #define SOFT0 0x40 | ||
172 | #define SOFTCMDEN 0x20 | ||
173 | #define HAS_BRDCTL 0x10 | ||
174 | #define SEEPROM 0x08 | ||
175 | #define EEPROM 0x04 | ||
176 | #define ROM 0x02 | ||
177 | #define SSPIOCPS 0x01 | ||
178 | |||
179 | #define BRDCTL 0x1d | ||
180 | #define BRDDAT7 0x80 | ||
181 | #define BRDDAT6 0x40 | ||
182 | #define BRDDAT5 0x20 | ||
183 | #define BRDDAT4 0x10 | ||
184 | #define BRDSTB 0x10 | ||
185 | #define BRDCS 0x08 | ||
186 | #define BRDDAT3 0x08 | ||
187 | #define BRDDAT2 0x04 | ||
188 | #define BRDRW 0x04 | ||
189 | #define BRDRW_ULTRA2 0x02 | ||
190 | #define BRDCTL1 0x02 | ||
191 | #define BRDSTB_ULTRA2 0x01 | ||
192 | #define BRDCTL0 0x01 | ||
193 | |||
194 | #define SEECTL 0x1e | ||
195 | #define EXTARBACK 0x80 | ||
196 | #define EXTARBREQ 0x40 | ||
197 | #define SEEMS 0x20 | ||
198 | #define SEERDY 0x10 | ||
199 | #define SEECS 0x08 | ||
200 | #define SEECK 0x04 | ||
201 | #define SEEDO 0x02 | ||
202 | #define SEEDI 0x01 | ||
203 | |||
204 | #define SBLKCTL 0x1f | ||
205 | #define DIAGLEDEN 0x80 | ||
206 | #define DIAGLEDON 0x40 | ||
207 | #define AUTOFLUSHDIS 0x20 | ||
208 | #define ENAB40 0x08 | ||
209 | #define ENAB20 0x04 | ||
210 | #define SELWIDE 0x02 | ||
211 | #define XCVR 0x01 | ||
212 | |||
213 | #define SRAM_BASE 0x20 | ||
214 | |||
215 | #define TARG_SCSIRATE 0x20 | ||
216 | |||
217 | #define ULTRA_ENB 0x30 | ||
218 | |||
219 | #define DISC_DSB 0x32 | ||
220 | |||
221 | #define MSG_OUT 0x34 | ||
222 | |||
223 | #define DMAPARAMS 0x35 | ||
224 | #define PRELOADEN 0x80 | ||
225 | #define WIDEODD 0x40 | ||
226 | #define SCSIEN 0x20 | ||
227 | #define SDMAENACK 0x10 | ||
228 | #define SDMAEN 0x10 | ||
229 | #define HDMAEN 0x08 | ||
230 | #define HDMAENACK 0x08 | ||
231 | #define DIRECTION 0x04 | ||
232 | #define FIFOFLUSH 0x02 | ||
233 | #define FIFORESET 0x01 | ||
234 | |||
235 | #define SEQ_FLAGS 0x36 | ||
236 | #define IDENTIFY_SEEN 0x80 | ||
237 | #define SCBPTR_VALID 0x20 | ||
238 | #define DPHASE 0x10 | ||
239 | #define AMTARGET 0x08 | ||
240 | #define WIDE_BUS 0x02 | ||
241 | #define TWIN_BUS 0x01 | ||
242 | |||
243 | #define SAVED_TCL 0x37 | ||
244 | |||
245 | #define SG_COUNT 0x38 | ||
246 | |||
247 | #define SG_NEXT 0x39 | ||
248 | |||
249 | #define LASTPHASE 0x3d | ||
250 | #define P_MESGIN 0xe0 | ||
251 | #define PHASE_MASK 0xe0 | ||
252 | #define P_STATUS 0xc0 | ||
253 | #define P_MESGOUT 0xa0 | ||
254 | #define P_COMMAND 0x80 | ||
255 | #define CDI 0x80 | ||
256 | #define IOI 0x40 | ||
257 | #define P_DATAIN 0x40 | ||
258 | #define MSGI 0x20 | ||
259 | #define P_BUSFREE 0x01 | ||
260 | #define P_DATAOUT 0x00 | ||
261 | |||
262 | #define WAITING_SCBH 0x3e | ||
263 | |||
264 | #define DISCONNECTED_SCBH 0x3f | ||
265 | |||
266 | #define FREE_SCBH 0x40 | ||
267 | |||
268 | #define HSCB_ADDR 0x41 | ||
269 | |||
270 | #define SCBID_ADDR 0x45 | ||
271 | |||
272 | #define TMODE_CMDADDR 0x49 | ||
273 | |||
274 | #define KERNEL_QINPOS 0x4d | ||
275 | |||
276 | #define QINPOS 0x4e | ||
277 | |||
278 | #define QOUTPOS 0x4f | ||
279 | |||
280 | #define TMODE_CMDADDR_NEXT 0x50 | ||
281 | |||
282 | #define ARG_1 0x51 | ||
283 | #define RETURN_1 0x51 | ||
284 | #define SEND_MSG 0x80 | ||
285 | #define SEND_SENSE 0x40 | ||
286 | #define SEND_REJ 0x20 | ||
287 | #define MSGOUT_PHASEMIS 0x10 | ||
288 | |||
289 | #define ARG_2 0x52 | ||
290 | #define RETURN_2 0x52 | ||
291 | |||
292 | #define LAST_MSG 0x53 | ||
293 | |||
294 | #define PREFETCH_CNT 0x54 | ||
295 | |||
296 | #define SCSICONF 0x5a | ||
297 | #define TERM_ENB 0x80 | ||
298 | #define RESET_SCSI 0x40 | ||
299 | #define HWSCSIID 0x0f | ||
300 | #define HSCSIID 0x07 | ||
301 | |||
302 | #define HOSTCONF 0x5d | ||
303 | |||
304 | #define HA_274_BIOSCTRL 0x5f | ||
305 | #define BIOSMODE 0x30 | ||
306 | #define BIOSDISABLED 0x30 | ||
307 | #define CHANNEL_B_PRIMARY 0x08 | ||
308 | |||
309 | #define SEQCTL 0x60 | ||
310 | #define PERRORDIS 0x80 | ||
311 | #define PAUSEDIS 0x40 | ||
312 | #define FAILDIS 0x20 | ||
313 | #define FASTMODE 0x10 | ||
314 | #define BRKADRINTEN 0x08 | ||
315 | #define STEP 0x04 | ||
316 | #define SEQRESET 0x02 | ||
317 | #define LOADRAM 0x01 | ||
318 | |||
319 | #define SEQRAM 0x61 | ||
320 | |||
321 | #define SEQADDR0 0x62 | ||
322 | |||
323 | #define SEQADDR1 0x63 | ||
324 | #define SEQADDR1_MASK 0x01 | ||
325 | |||
326 | #define ACCUM 0x64 | ||
327 | |||
328 | #define SINDEX 0x65 | ||
329 | |||
330 | #define DINDEX 0x66 | ||
331 | |||
332 | #define ALLONES 0x69 | ||
333 | |||
334 | #define ALLZEROS 0x6a | ||
335 | |||
336 | #define NONE 0x6a | ||
337 | |||
338 | #define FLAGS 0x6b | ||
339 | #define ZERO 0x02 | ||
340 | #define CARRY 0x01 | ||
341 | |||
342 | #define SINDIR 0x6c | ||
343 | |||
344 | #define DINDIR 0x6d | ||
345 | |||
346 | #define FUNCTION1 0x6e | ||
347 | |||
348 | #define STACK 0x6f | ||
349 | |||
350 | #define TARG_OFFSET 0x70 | ||
351 | |||
352 | #define BCTL 0x84 | ||
353 | #define ACE 0x08 | ||
354 | #define ENABLE 0x01 | ||
355 | |||
356 | #define DSCOMMAND0 0x84 | ||
357 | #define INTSCBRAMSEL 0x08 | ||
358 | #define RAMPS 0x04 | ||
359 | #define USCBSIZE32 0x02 | ||
360 | #define CIOPARCKEN 0x01 | ||
361 | |||
362 | #define DSCOMMAND 0x84 | ||
363 | #define CACHETHEN 0x80 | ||
364 | #define DPARCKEN 0x40 | ||
365 | #define MPARCKEN 0x20 | ||
366 | #define EXTREQLCK 0x10 | ||
367 | |||
368 | #define BUSTIME 0x85 | ||
369 | #define BOFF 0xf0 | ||
370 | #define BON 0x0f | ||
371 | |||
372 | #define BUSSPD 0x86 | ||
373 | #define DFTHRSH 0xc0 | ||
374 | #define STBOFF 0x38 | ||
375 | #define STBON 0x07 | ||
376 | |||
377 | #define DSPCISTATUS 0x86 | ||
378 | #define DFTHRSH_100 0xc0 | ||
379 | |||
380 | #define HCNTRL 0x87 | ||
381 | #define POWRDN 0x40 | ||
382 | #define SWINT 0x10 | ||
383 | #define IRQMS 0x08 | ||
384 | #define PAUSE 0x04 | ||
385 | #define INTEN 0x02 | ||
386 | #define CHIPRST 0x01 | ||
387 | #define CHIPRSTACK 0x01 | ||
388 | |||
389 | #define HADDR 0x88 | ||
390 | |||
391 | #define HCNT 0x8c | ||
392 | |||
393 | #define SCBPTR 0x90 | ||
394 | |||
395 | #define INTSTAT 0x91 | ||
396 | #define SEQINT_MASK 0xf1 | ||
397 | #define DATA_OVERRUN 0xe1 | ||
398 | #define MSGIN_PHASEMIS 0xd1 | ||
399 | #define TRACEPOINT2 0xc1 | ||
400 | #define SEQ_SG_FIXUP 0xb1 | ||
401 | #define AWAITING_MSG 0xa1 | ||
402 | #define RESIDUAL 0x81 | ||
403 | #define BAD_STATUS 0x71 | ||
404 | #define REJECT_MSG 0x61 | ||
405 | #define WIDE_RESIDUE 0x51 | ||
406 | #define EXTENDED_MSG 0x41 | ||
407 | #define NO_MATCH 0x31 | ||
408 | #define NO_IDENT 0x21 | ||
409 | #define SEND_REJECT 0x11 | ||
410 | #define INT_PEND 0x0f | ||
411 | #define BRKADRINT 0x08 | ||
412 | #define SCSIINT 0x04 | ||
413 | #define CMDCMPLT 0x02 | ||
414 | #define BAD_PHASE 0x01 | ||
415 | #define SEQINT 0x01 | ||
416 | |||
417 | #define CLRINT 0x92 | ||
418 | #define CLRPARERR 0x10 | ||
419 | #define CLRBRKADRINT 0x08 | ||
420 | #define CLRSCSIINT 0x04 | ||
421 | #define CLRCMDINT 0x02 | ||
422 | #define CLRSEQINT 0x01 | ||
423 | |||
424 | #define ERROR 0x92 | ||
425 | #define CIOPARERR 0x80 | ||
426 | #define PCIERRSTAT 0x40 | ||
427 | #define MPARERR 0x20 | ||
428 | #define DPARERR 0x10 | ||
429 | #define SQPARERR 0x08 | ||
430 | #define ILLOPCODE 0x04 | ||
431 | #define DSCTMOUT 0x02 | ||
432 | #define ILLSADDR 0x02 | ||
433 | #define ILLHADDR 0x01 | ||
434 | |||
435 | #define DFCNTRL 0x93 | ||
436 | |||
437 | #define DFSTATUS 0x94 | ||
438 | #define PRELOAD_AVAIL 0x80 | ||
439 | #define DWORDEMP 0x20 | ||
440 | #define MREQPEND 0x10 | ||
441 | #define HDONE 0x08 | ||
442 | #define DFTHRESH 0x04 | ||
443 | #define FIFOFULL 0x02 | ||
444 | #define FIFOEMP 0x01 | ||
445 | |||
446 | #define DFDAT 0x99 | ||
447 | |||
448 | #define SCBCNT 0x9a | ||
449 | #define SCBAUTO 0x80 | ||
450 | #define SCBCNT_MASK 0x1f | ||
451 | |||
452 | #define QINFIFO 0x9b | ||
453 | |||
454 | #define QINCNT 0x9c | ||
455 | |||
456 | #define SCSIDATL_IMG 0x9c | ||
457 | |||
458 | #define QOUTFIFO 0x9d | ||
459 | |||
460 | #define CRCCONTROL1 0x9d | ||
461 | #define CRCONSEEN 0x80 | ||
462 | #define CRCVALCHKEN 0x40 | ||
463 | #define CRCENDCHKEN 0x20 | ||
464 | #define CRCREQCHKEN 0x10 | ||
465 | #define TARGCRCENDEN 0x08 | ||
466 | #define TARGCRCCNTEN 0x04 | ||
467 | |||
468 | #define SCSIPHASE 0x9e | ||
469 | #define SP_STATUS 0x20 | ||
470 | #define SP_COMMAND 0x10 | ||
471 | #define SP_MSG_IN 0x08 | ||
472 | #define SP_MSG_OUT 0x04 | ||
473 | #define SP_DATA_IN 0x02 | ||
474 | #define SP_DATA_OUT 0x01 | ||
475 | |||
476 | #define QOUTCNT 0x9e | ||
477 | |||
478 | #define SFUNCT 0x9f | ||
479 | #define ALT_MODE 0x80 | ||
480 | |||
481 | #define SCB_CONTROL 0xa0 | ||
482 | #define MK_MESSAGE 0x80 | ||
483 | #define DISCENB 0x40 | ||
484 | #define TAG_ENB 0x20 | ||
485 | #define DISCONNECTED 0x04 | ||
486 | #define SCB_TAG_TYPE 0x03 | ||
487 | |||
488 | #define SCB_BASE 0xa0 | ||
489 | |||
490 | #define SCB_TCL 0xa1 | ||
491 | #define TID 0xf0 | ||
492 | #define SELBUSB 0x08 | ||
493 | #define LID 0x07 | ||
494 | |||
495 | #define SCB_TARGET_STATUS 0xa2 | ||
496 | |||
497 | #define SCB_SGCOUNT 0xa3 | ||
498 | |||
499 | #define SCB_SGPTR 0xa4 | ||
500 | |||
501 | #define SCB_RESID_SGCNT 0xa8 | ||
502 | |||
503 | #define SCB_RESID_DCNT 0xa9 | ||
504 | |||
505 | #define SCB_DATAPTR 0xac | ||
506 | |||
507 | #define SCB_DATACNT 0xb0 | ||
508 | |||
509 | #define SCB_CMDPTR 0xb4 | ||
510 | |||
511 | #define SCB_CMDLEN 0xb8 | ||
512 | |||
513 | #define SCB_TAG 0xb9 | ||
514 | |||
515 | #define SCB_NEXT 0xba | ||
516 | |||
517 | #define SCB_PREV 0xbb | ||
518 | |||
519 | #define SCB_BUSYTARGETS 0xbc | ||
520 | |||
521 | #define SEECTL_2840 0xc0 | ||
522 | #define CS_2840 0x04 | ||
523 | #define CK_2840 0x02 | ||
524 | #define DO_2840 0x01 | ||
525 | |||
526 | #define STATUS_2840 0xc1 | ||
527 | #define EEPROM_TF 0x80 | ||
528 | #define BIOS_SEL 0x60 | ||
529 | #define ADSEL 0x1e | ||
530 | #define DI_2840 0x01 | ||
531 | |||
532 | #define CCHADDR 0xe0 | ||
533 | |||
534 | #define CCHCNT 0xe8 | ||
535 | |||
536 | #define CCSGRAM 0xe9 | ||
537 | |||
538 | #define CCSGADDR 0xea | ||
539 | |||
540 | #define CCSGCTL 0xeb | ||
541 | #define CCSGDONE 0x80 | ||
542 | #define CCSGEN 0x08 | ||
543 | #define FLAG 0x02 | ||
544 | #define CCSGRESET 0x01 | ||
545 | |||
546 | #define CCSCBRAM 0xec | ||
547 | |||
548 | #define CCSCBADDR 0xed | ||
549 | |||
550 | #define CCSCBCTL 0xee | ||
551 | #define CCSCBDONE 0x80 | ||
552 | #define ARRDONE 0x40 | ||
553 | #define CCARREN 0x10 | ||
554 | #define CCSCBEN 0x08 | ||
555 | #define CCSCBDIR 0x04 | ||
556 | #define CCSCBRESET 0x01 | ||
557 | |||
558 | #define CCSCBCNT 0xef | ||
559 | |||
560 | #define CCSCBPTR 0xf1 | ||
561 | |||
562 | #define HNSCB_QOFF 0xf4 | ||
563 | |||
564 | #define HESCB_QOFF 0xf5 | ||
565 | |||
566 | #define SNSCB_QOFF 0xf6 | ||
567 | |||
568 | #define SESCB_QOFF 0xf7 | ||
569 | |||
570 | #define SDSCB_QOFF 0xf8 | ||
571 | |||
572 | #define QOFF_CTLSTA 0xfa | ||
573 | #define ESTABLISH_SCB_AVAIL 0x80 | ||
574 | #define SCB_AVAIL 0x40 | ||
575 | #define SNSCB_ROLLOVER 0x20 | ||
576 | #define SDSCB_ROLLOVER 0x10 | ||
577 | #define SESCB_ROLLOVER 0x08 | ||
578 | #define SCB_QSIZE 0x07 | ||
579 | #define SCB_QSIZE_256 0x06 | ||
580 | |||
581 | #define DFF_THRSH 0xfb | ||
582 | #define WR_DFTHRSH 0x70 | ||
583 | #define WR_DFTHRSH_MAX 0x70 | ||
584 | #define WR_DFTHRSH_90 0x60 | ||
585 | #define WR_DFTHRSH_85 0x50 | ||
586 | #define WR_DFTHRSH_75 0x40 | ||
587 | #define WR_DFTHRSH_63 0x30 | ||
588 | #define WR_DFTHRSH_50 0x20 | ||
589 | #define WR_DFTHRSH_25 0x10 | ||
590 | #define RD_DFTHRSH_MAX 0x07 | ||
591 | #define RD_DFTHRSH 0x07 | ||
592 | #define RD_DFTHRSH_90 0x06 | ||
593 | #define RD_DFTHRSH_85 0x05 | ||
594 | #define RD_DFTHRSH_75 0x04 | ||
595 | #define RD_DFTHRSH_63 0x03 | ||
596 | #define RD_DFTHRSH_50 0x02 | ||
597 | #define RD_DFTHRSH_25 0x01 | ||
598 | #define WR_DFTHRSH_MIN 0x00 | ||
599 | #define RD_DFTHRSH_MIN 0x00 | ||
600 | |||
601 | #define SG_CACHEPTR 0xfc | ||
602 | #define SG_USER_DATA 0xfc | ||
603 | #define LAST_SEG 0x02 | ||
604 | #define LAST_SEG_DONE 0x01 | ||
605 | |||
606 | |||
607 | #define CMD_GROUP2_BYTE_DELTA 0xfa | ||
608 | #define MAX_OFFSET_8BIT 0x0f | ||
609 | #define BUS_16_BIT 0x01 | ||
610 | #define QINFIFO_OFFSET 0x02 | ||
611 | #define CMD_GROUP5_BYTE_DELTA 0x0b | ||
612 | #define CMD_GROUP_CODE_SHIFT 0x05 | ||
613 | #define MAX_OFFSET_ULTRA2 0x7f | ||
614 | #define MAX_OFFSET_16BIT 0x08 | ||
615 | #define BUS_8_BIT 0x00 | ||
616 | #define QOUTFIFO_OFFSET 0x01 | ||
617 | #define UNTAGGEDSCB_OFFSET 0x00 | ||
618 | #define CCSGRAM_MAXSEGS 0x10 | ||
619 | #define SCB_LIST_NULL 0xff | ||
620 | #define SG_SIZEOF 0x08 | ||
621 | #define CMD_GROUP4_BYTE_DELTA 0x04 | ||
622 | #define CMD_GROUP0_BYTE_DELTA 0xfc | ||
623 | #define HOST_MSG 0xff | ||
624 | #define BUS_32_BIT 0x02 | ||
625 | #define CCSGADDR_MAX 0x80 | ||
626 | |||
627 | |||
628 | /* Downloaded Constant Definitions */ | ||
629 | #define TMODE_NUMCMDS 0x00 | ||
diff --git a/drivers/scsi/aic7xxx_old/aic7xxx_seq.c b/drivers/scsi/aic7xxx_old/aic7xxx_seq.c deleted file mode 100644 index e1bc140e9735..000000000000 --- a/drivers/scsi/aic7xxx_old/aic7xxx_seq.c +++ /dev/null | |||
@@ -1,817 +0,0 @@ | |||
1 | /* | ||
2 | * DO NOT EDIT - This file is automatically generated. | ||
3 | */ | ||
4 | static unsigned char seqprog[] = { | ||
5 | 0xff, 0x6a, 0x06, 0x08, | ||
6 | 0x7f, 0x02, 0x04, 0x08, | ||
7 | 0x12, 0x6a, 0x00, 0x00, | ||
8 | 0xff, 0x6a, 0xd6, 0x09, | ||
9 | 0xff, 0x6a, 0xdc, 0x09, | ||
10 | 0x00, 0x65, 0xca, 0x58, | ||
11 | 0xf7, 0x01, 0x02, 0x08, | ||
12 | 0xff, 0x4e, 0xc8, 0x08, | ||
13 | 0xbf, 0x60, 0xc0, 0x08, | ||
14 | 0x60, 0x0b, 0x86, 0x68, | ||
15 | 0x40, 0x00, 0x0c, 0x68, | ||
16 | 0x08, 0x1f, 0x3e, 0x10, | ||
17 | 0x60, 0x0b, 0x86, 0x68, | ||
18 | 0x40, 0x00, 0x0c, 0x68, | ||
19 | 0x08, 0x1f, 0x3e, 0x10, | ||
20 | 0xff, 0x3e, 0x48, 0x60, | ||
21 | 0x40, 0xfa, 0x10, 0x78, | ||
22 | 0xff, 0xf6, 0xd4, 0x08, | ||
23 | 0x01, 0x4e, 0x9c, 0x18, | ||
24 | 0x40, 0x60, 0xc0, 0x00, | ||
25 | 0x00, 0x4d, 0x10, 0x70, | ||
26 | 0x01, 0x4e, 0x9c, 0x18, | ||
27 | 0xbf, 0x60, 0xc0, 0x08, | ||
28 | 0x00, 0x6a, 0x86, 0x5c, | ||
29 | 0xff, 0x4e, 0xc8, 0x18, | ||
30 | 0x02, 0x6a, 0x70, 0x5b, | ||
31 | 0xff, 0x52, 0x20, 0x09, | ||
32 | 0x0d, 0x6a, 0x6a, 0x00, | ||
33 | 0x00, 0x52, 0xe6, 0x5b, | ||
34 | 0x03, 0xb0, 0x52, 0x31, | ||
35 | 0xff, 0xb0, 0x52, 0x09, | ||
36 | 0xff, 0xb1, 0x54, 0x09, | ||
37 | 0xff, 0xb2, 0x56, 0x09, | ||
38 | 0xff, 0xa3, 0x50, 0x09, | ||
39 | 0xff, 0x3e, 0x74, 0x09, | ||
40 | 0xff, 0x90, 0x7c, 0x08, | ||
41 | 0xff, 0x3e, 0x20, 0x09, | ||
42 | 0x00, 0x65, 0x4e, 0x58, | ||
43 | 0x00, 0x65, 0x0c, 0x40, | ||
44 | 0xf7, 0x1f, 0xca, 0x08, | ||
45 | 0x08, 0xa1, 0xc8, 0x08, | ||
46 | 0x00, 0x65, 0xca, 0x00, | ||
47 | 0xff, 0x65, 0x3e, 0x08, | ||
48 | 0xf0, 0xa1, 0xc8, 0x08, | ||
49 | 0x0f, 0x0f, 0x1e, 0x08, | ||
50 | 0x00, 0x0f, 0x1e, 0x00, | ||
51 | 0xf0, 0xa1, 0xc8, 0x08, | ||
52 | 0x0f, 0x05, 0x0a, 0x08, | ||
53 | 0x00, 0x05, 0x0a, 0x00, | ||
54 | 0xff, 0x6a, 0x0c, 0x08, | ||
55 | 0x5a, 0x6a, 0x00, 0x04, | ||
56 | 0x12, 0x65, 0x02, 0x00, | ||
57 | 0x31, 0x6a, 0xca, 0x00, | ||
58 | 0x80, 0x37, 0x6e, 0x68, | ||
59 | 0xff, 0x65, 0xca, 0x18, | ||
60 | 0xff, 0x37, 0xdc, 0x08, | ||
61 | 0xff, 0x6e, 0xc8, 0x08, | ||
62 | 0x00, 0x6c, 0x76, 0x78, | ||
63 | 0x20, 0x01, 0x02, 0x00, | ||
64 | 0x4c, 0x37, 0xc8, 0x28, | ||
65 | 0x08, 0x1f, 0x7e, 0x78, | ||
66 | 0x08, 0x37, 0x6e, 0x00, | ||
67 | 0x08, 0x64, 0xc8, 0x00, | ||
68 | 0x70, 0x64, 0xca, 0x18, | ||
69 | 0xff, 0x6c, 0x0a, 0x08, | ||
70 | 0x20, 0x64, 0xca, 0x18, | ||
71 | 0xff, 0x6c, 0x08, 0x0c, | ||
72 | 0x40, 0x0b, 0x96, 0x68, | ||
73 | 0x20, 0x6a, 0x16, 0x00, | ||
74 | 0xf0, 0x19, 0x6e, 0x08, | ||
75 | 0x08, 0x6a, 0x18, 0x00, | ||
76 | 0x08, 0x11, 0x22, 0x00, | ||
77 | 0x08, 0x6a, 0x66, 0x58, | ||
78 | 0x08, 0x6a, 0x68, 0x00, | ||
79 | 0x00, 0x65, 0xaa, 0x40, | ||
80 | 0x12, 0x6a, 0x00, 0x00, | ||
81 | 0x40, 0x6a, 0x16, 0x00, | ||
82 | 0xff, 0x3e, 0x20, 0x09, | ||
83 | 0xff, 0xba, 0x7c, 0x08, | ||
84 | 0xff, 0xa1, 0x6e, 0x08, | ||
85 | 0x08, 0x6a, 0x18, 0x00, | ||
86 | 0x08, 0x11, 0x22, 0x00, | ||
87 | 0x08, 0x6a, 0x66, 0x58, | ||
88 | 0x80, 0x6a, 0x68, 0x00, | ||
89 | 0x80, 0x36, 0x6c, 0x00, | ||
90 | 0x00, 0x65, 0xba, 0x5b, | ||
91 | 0xff, 0x3d, 0xc8, 0x08, | ||
92 | 0xbf, 0x64, 0xe2, 0x78, | ||
93 | 0x80, 0x64, 0xc8, 0x71, | ||
94 | 0xa0, 0x64, 0xf8, 0x71, | ||
95 | 0xc0, 0x64, 0xf0, 0x71, | ||
96 | 0xe0, 0x64, 0x38, 0x72, | ||
97 | 0x01, 0x6a, 0x22, 0x01, | ||
98 | 0x00, 0x65, 0xaa, 0x40, | ||
99 | 0xf7, 0x11, 0x22, 0x08, | ||
100 | 0x00, 0x65, 0xca, 0x58, | ||
101 | 0xff, 0x06, 0xd4, 0x08, | ||
102 | 0xf7, 0x01, 0x02, 0x08, | ||
103 | 0x09, 0x0c, 0xc4, 0x78, | ||
104 | 0x08, 0x0c, 0x0c, 0x68, | ||
105 | 0x01, 0x6a, 0x22, 0x01, | ||
106 | 0xff, 0x6a, 0x26, 0x09, | ||
107 | 0x02, 0x6a, 0x08, 0x30, | ||
108 | 0xff, 0x6a, 0x08, 0x08, | ||
109 | 0xdf, 0x01, 0x02, 0x08, | ||
110 | 0x01, 0x6a, 0x7a, 0x00, | ||
111 | 0xff, 0x6a, 0x6c, 0x0c, | ||
112 | 0x04, 0x14, 0x10, 0x31, | ||
113 | 0x03, 0xa9, 0x18, 0x31, | ||
114 | 0x03, 0xa9, 0x10, 0x30, | ||
115 | 0x08, 0x6a, 0xcc, 0x00, | ||
116 | 0xa9, 0x6a, 0xd0, 0x5b, | ||
117 | 0x00, 0x65, 0x02, 0x41, | ||
118 | 0xa8, 0x6a, 0x6a, 0x00, | ||
119 | 0x79, 0x6a, 0x6a, 0x00, | ||
120 | 0x40, 0x3d, 0xea, 0x68, | ||
121 | 0x04, 0x35, 0x6a, 0x00, | ||
122 | 0x00, 0x65, 0x2a, 0x5b, | ||
123 | 0x80, 0x6a, 0xd4, 0x01, | ||
124 | 0x10, 0x36, 0xd6, 0x68, | ||
125 | 0x10, 0x36, 0x6c, 0x00, | ||
126 | 0x07, 0xac, 0x10, 0x31, | ||
127 | 0x05, 0xa3, 0x70, 0x30, | ||
128 | 0x03, 0x8c, 0x10, 0x30, | ||
129 | 0x88, 0x6a, 0xcc, 0x00, | ||
130 | 0xac, 0x6a, 0xc8, 0x5b, | ||
131 | 0x00, 0x65, 0xc2, 0x5b, | ||
132 | 0x38, 0x6a, 0xcc, 0x00, | ||
133 | 0xa3, 0x6a, 0xcc, 0x5b, | ||
134 | 0xff, 0x38, 0x12, 0x69, | ||
135 | 0x80, 0x02, 0x04, 0x00, | ||
136 | 0xe7, 0x35, 0x6a, 0x08, | ||
137 | 0x03, 0x69, 0x18, 0x31, | ||
138 | 0x03, 0x69, 0x10, 0x30, | ||
139 | 0xff, 0x6a, 0x10, 0x00, | ||
140 | 0xff, 0x6a, 0x12, 0x00, | ||
141 | 0xff, 0x6a, 0x14, 0x00, | ||
142 | 0x22, 0x38, 0xc8, 0x28, | ||
143 | 0x01, 0x38, 0x1c, 0x61, | ||
144 | 0x02, 0x64, 0xc8, 0x00, | ||
145 | 0x01, 0x38, 0x1c, 0x61, | ||
146 | 0xbf, 0x35, 0x6a, 0x08, | ||
147 | 0xff, 0x64, 0xf8, 0x09, | ||
148 | 0xff, 0x35, 0x26, 0x09, | ||
149 | 0x80, 0x02, 0xa4, 0x69, | ||
150 | 0x10, 0x0c, 0x7a, 0x69, | ||
151 | 0x80, 0x94, 0x22, 0x79, | ||
152 | 0x00, 0x35, 0x0a, 0x5b, | ||
153 | 0x80, 0x02, 0xa4, 0x69, | ||
154 | 0xff, 0x65, 0x94, 0x79, | ||
155 | 0x01, 0x38, 0x70, 0x71, | ||
156 | 0xff, 0x38, 0x70, 0x18, | ||
157 | 0xff, 0x38, 0x94, 0x79, | ||
158 | 0x80, 0xea, 0x4a, 0x61, | ||
159 | 0xef, 0x38, 0xc8, 0x18, | ||
160 | 0x80, 0x6a, 0xc8, 0x00, | ||
161 | 0x00, 0x65, 0x3c, 0x49, | ||
162 | 0x33, 0x38, 0xc8, 0x28, | ||
163 | 0xff, 0x64, 0xd0, 0x09, | ||
164 | 0x04, 0x39, 0xc0, 0x31, | ||
165 | 0x09, 0x6a, 0xd6, 0x01, | ||
166 | 0x80, 0xeb, 0x42, 0x79, | ||
167 | 0xf7, 0xeb, 0xd6, 0x09, | ||
168 | 0x08, 0xeb, 0x46, 0x69, | ||
169 | 0x01, 0x6a, 0xd6, 0x01, | ||
170 | 0x08, 0xe9, 0x10, 0x31, | ||
171 | 0x03, 0x8c, 0x10, 0x30, | ||
172 | 0xff, 0x38, 0x70, 0x18, | ||
173 | 0x88, 0x6a, 0xcc, 0x00, | ||
174 | 0x39, 0x6a, 0xce, 0x5b, | ||
175 | 0x08, 0x6a, 0x18, 0x01, | ||
176 | 0xff, 0x6a, 0x1a, 0x09, | ||
177 | 0xff, 0x6a, 0x1c, 0x09, | ||
178 | 0x0d, 0x93, 0x26, 0x01, | ||
179 | 0x00, 0x65, 0x78, 0x5c, | ||
180 | 0x88, 0x6a, 0xcc, 0x00, | ||
181 | 0x00, 0x65, 0x6a, 0x5c, | ||
182 | 0x00, 0x65, 0xc2, 0x5b, | ||
183 | 0xff, 0x6a, 0xc8, 0x08, | ||
184 | 0x08, 0x39, 0x72, 0x18, | ||
185 | 0x00, 0x3a, 0x74, 0x20, | ||
186 | 0x00, 0x65, 0x02, 0x41, | ||
187 | 0x01, 0x0c, 0x6c, 0x79, | ||
188 | 0x10, 0x0c, 0x02, 0x79, | ||
189 | 0x10, 0x0c, 0x7a, 0x69, | ||
190 | 0x01, 0xfc, 0x70, 0x79, | ||
191 | 0xff, 0x6a, 0x70, 0x08, | ||
192 | 0x01, 0x0c, 0x76, 0x79, | ||
193 | 0x10, 0x0c, 0x02, 0x79, | ||
194 | 0x00, 0x65, 0xae, 0x59, | ||
195 | 0x01, 0xfc, 0x94, 0x69, | ||
196 | 0x40, 0x0d, 0x84, 0x69, | ||
197 | 0xb1, 0x6a, 0x22, 0x01, | ||
198 | 0x00, 0x65, 0x94, 0x41, | ||
199 | 0x2e, 0xfc, 0xa2, 0x28, | ||
200 | 0x3f, 0x38, 0xc8, 0x08, | ||
201 | 0x00, 0x51, 0x94, 0x71, | ||
202 | 0xff, 0x6a, 0xc8, 0x08, | ||
203 | 0xf8, 0x39, 0x72, 0x18, | ||
204 | 0xff, 0x3a, 0x74, 0x20, | ||
205 | 0x01, 0x38, 0x70, 0x18, | ||
206 | 0x00, 0x65, 0x86, 0x41, | ||
207 | 0x03, 0x08, 0x52, 0x31, | ||
208 | 0xff, 0x38, 0x50, 0x09, | ||
209 | 0x12, 0x01, 0x02, 0x00, | ||
210 | 0xff, 0x08, 0x52, 0x09, | ||
211 | 0xff, 0x09, 0x54, 0x09, | ||
212 | 0xff, 0x0a, 0x56, 0x09, | ||
213 | 0xff, 0x38, 0x50, 0x09, | ||
214 | 0x00, 0x65, 0xaa, 0x40, | ||
215 | 0x10, 0x0c, 0xa4, 0x79, | ||
216 | 0x00, 0x65, 0xae, 0x59, | ||
217 | 0x7f, 0x02, 0x04, 0x08, | ||
218 | 0xe1, 0x6a, 0x22, 0x01, | ||
219 | 0x00, 0x65, 0xaa, 0x40, | ||
220 | 0x04, 0x93, 0xc2, 0x69, | ||
221 | 0xdf, 0x93, 0x26, 0x09, | ||
222 | 0x20, 0x93, 0xb2, 0x69, | ||
223 | 0x02, 0x93, 0x26, 0x01, | ||
224 | 0x01, 0x94, 0xb6, 0x79, | ||
225 | 0x01, 0x94, 0xb6, 0x79, | ||
226 | 0x01, 0x94, 0xb6, 0x79, | ||
227 | 0x01, 0x94, 0xb6, 0x79, | ||
228 | 0x01, 0x94, 0xb6, 0x79, | ||
229 | 0x10, 0x94, 0xc0, 0x69, | ||
230 | 0xd7, 0x93, 0x26, 0x09, | ||
231 | 0x28, 0x93, 0xc4, 0x69, | ||
232 | 0xff, 0x6a, 0xd4, 0x0c, | ||
233 | 0x00, 0x65, 0x2a, 0x5b, | ||
234 | 0x05, 0xb4, 0x10, 0x31, | ||
235 | 0x02, 0x6a, 0x1a, 0x31, | ||
236 | 0x03, 0x8c, 0x10, 0x30, | ||
237 | 0x88, 0x6a, 0xcc, 0x00, | ||
238 | 0xb4, 0x6a, 0xcc, 0x5b, | ||
239 | 0xff, 0x6a, 0x1a, 0x09, | ||
240 | 0xff, 0x6a, 0x1c, 0x09, | ||
241 | 0x00, 0x65, 0xc2, 0x5b, | ||
242 | 0x3d, 0x6a, 0x0a, 0x5b, | ||
243 | 0xac, 0x6a, 0x26, 0x01, | ||
244 | 0x04, 0x0b, 0xde, 0x69, | ||
245 | 0x04, 0x0b, 0xe4, 0x69, | ||
246 | 0x10, 0x0c, 0xe0, 0x79, | ||
247 | 0x02, 0x03, 0xe8, 0x79, | ||
248 | 0x11, 0x0c, 0xe4, 0x79, | ||
249 | 0xd7, 0x93, 0x26, 0x09, | ||
250 | 0x28, 0x93, 0xea, 0x69, | ||
251 | 0x12, 0x01, 0x02, 0x00, | ||
252 | 0x00, 0x65, 0xaa, 0x40, | ||
253 | 0x00, 0x65, 0x2a, 0x5b, | ||
254 | 0xff, 0x06, 0x44, 0x09, | ||
255 | 0x00, 0x65, 0xaa, 0x40, | ||
256 | 0x10, 0x3d, 0x06, 0x00, | ||
257 | 0xff, 0x34, 0xca, 0x08, | ||
258 | 0x80, 0x65, 0x1c, 0x62, | ||
259 | 0x0f, 0xa1, 0xca, 0x08, | ||
260 | 0x07, 0xa1, 0xca, 0x08, | ||
261 | 0x40, 0xa0, 0xc8, 0x08, | ||
262 | 0x00, 0x65, 0xca, 0x00, | ||
263 | 0x80, 0x65, 0xca, 0x00, | ||
264 | 0x80, 0xa0, 0x0c, 0x7a, | ||
265 | 0xff, 0x65, 0x0c, 0x08, | ||
266 | 0x00, 0x65, 0x1e, 0x42, | ||
267 | 0x20, 0xa0, 0x24, 0x7a, | ||
268 | 0xff, 0x65, 0x0c, 0x08, | ||
269 | 0x00, 0x65, 0xba, 0x5b, | ||
270 | 0xa0, 0x3d, 0x2c, 0x62, | ||
271 | 0x23, 0xa0, 0x0c, 0x08, | ||
272 | 0x00, 0x65, 0xba, 0x5b, | ||
273 | 0xa0, 0x3d, 0x2c, 0x62, | ||
274 | 0x00, 0xb9, 0x24, 0x42, | ||
275 | 0xff, 0x65, 0x24, 0x62, | ||
276 | 0xa1, 0x6a, 0x22, 0x01, | ||
277 | 0xff, 0x6a, 0xd4, 0x08, | ||
278 | 0x10, 0x51, 0x2c, 0x72, | ||
279 | 0x40, 0x6a, 0x18, 0x00, | ||
280 | 0xff, 0x65, 0x0c, 0x08, | ||
281 | 0x00, 0x65, 0xba, 0x5b, | ||
282 | 0xa0, 0x3d, 0xf6, 0x71, | ||
283 | 0x40, 0x6a, 0x18, 0x00, | ||
284 | 0xff, 0x34, 0xa6, 0x08, | ||
285 | 0x80, 0x34, 0x34, 0x62, | ||
286 | 0x7f, 0xa0, 0x40, 0x09, | ||
287 | 0x08, 0x6a, 0x68, 0x00, | ||
288 | 0x00, 0x65, 0xaa, 0x40, | ||
289 | 0x64, 0x6a, 0x00, 0x5b, | ||
290 | 0x80, 0x64, 0xaa, 0x6a, | ||
291 | 0x04, 0x64, 0x8c, 0x72, | ||
292 | 0x02, 0x64, 0x92, 0x72, | ||
293 | 0x00, 0x6a, 0x54, 0x72, | ||
294 | 0x03, 0x64, 0xa6, 0x72, | ||
295 | 0x01, 0x64, 0x88, 0x72, | ||
296 | 0x07, 0x64, 0xe8, 0x72, | ||
297 | 0x08, 0x64, 0x50, 0x72, | ||
298 | 0x23, 0x64, 0xec, 0x72, | ||
299 | 0x11, 0x6a, 0x22, 0x01, | ||
300 | 0x07, 0x6a, 0xf2, 0x5a, | ||
301 | 0xff, 0x06, 0xd4, 0x08, | ||
302 | 0x00, 0x65, 0xaa, 0x40, | ||
303 | 0xff, 0xa8, 0x58, 0x6a, | ||
304 | 0xff, 0xa2, 0x70, 0x7a, | ||
305 | 0x01, 0x6a, 0x6a, 0x00, | ||
306 | 0x00, 0xb9, 0xe6, 0x5b, | ||
307 | 0xff, 0xa2, 0x70, 0x7a, | ||
308 | 0x71, 0x6a, 0x22, 0x01, | ||
309 | 0xff, 0x6a, 0xd4, 0x08, | ||
310 | 0x40, 0x51, 0x70, 0x62, | ||
311 | 0x0d, 0x6a, 0x6a, 0x00, | ||
312 | 0x00, 0xb9, 0xe6, 0x5b, | ||
313 | 0xff, 0x3e, 0x74, 0x09, | ||
314 | 0xff, 0x90, 0x7c, 0x08, | ||
315 | 0x00, 0x65, 0x4e, 0x58, | ||
316 | 0x00, 0x65, 0xbc, 0x40, | ||
317 | 0x20, 0xa0, 0x78, 0x6a, | ||
318 | 0xff, 0x37, 0xc8, 0x08, | ||
319 | 0x00, 0x6a, 0x90, 0x5b, | ||
320 | 0xff, 0x6a, 0xa6, 0x5b, | ||
321 | 0xff, 0xf8, 0xc8, 0x08, | ||
322 | 0xff, 0x4f, 0xc8, 0x08, | ||
323 | 0x01, 0x6a, 0x90, 0x5b, | ||
324 | 0x00, 0xb9, 0xa6, 0x5b, | ||
325 | 0x01, 0x4f, 0x9e, 0x18, | ||
326 | 0x02, 0x6a, 0x22, 0x01, | ||
327 | 0x00, 0x65, 0x80, 0x5c, | ||
328 | 0x00, 0x65, 0xbc, 0x40, | ||
329 | 0x41, 0x6a, 0x22, 0x01, | ||
330 | 0x00, 0x65, 0xaa, 0x40, | ||
331 | 0x04, 0xa0, 0x40, 0x01, | ||
332 | 0x00, 0x65, 0x98, 0x5c, | ||
333 | 0x00, 0x65, 0xbc, 0x40, | ||
334 | 0x10, 0x36, 0x50, 0x7a, | ||
335 | 0x05, 0x38, 0x46, 0x31, | ||
336 | 0x04, 0x14, 0x58, 0x31, | ||
337 | 0x03, 0xa9, 0x60, 0x31, | ||
338 | 0xa3, 0x6a, 0xcc, 0x00, | ||
339 | 0x38, 0x6a, 0xcc, 0x5b, | ||
340 | 0xac, 0x6a, 0xcc, 0x00, | ||
341 | 0x14, 0x6a, 0xce, 0x5b, | ||
342 | 0xa9, 0x6a, 0xd0, 0x5b, | ||
343 | 0x00, 0x65, 0x50, 0x42, | ||
344 | 0xef, 0x36, 0x6c, 0x08, | ||
345 | 0x00, 0x65, 0x50, 0x42, | ||
346 | 0x0f, 0x64, 0xc8, 0x08, | ||
347 | 0x07, 0x64, 0xc8, 0x08, | ||
348 | 0x00, 0x37, 0x6e, 0x00, | ||
349 | 0xff, 0x6a, 0xa4, 0x00, | ||
350 | 0x00, 0x65, 0x60, 0x5b, | ||
351 | 0xff, 0x51, 0xbc, 0x72, | ||
352 | 0x20, 0x36, 0xc6, 0x7a, | ||
353 | 0x00, 0x90, 0x4e, 0x5b, | ||
354 | 0x00, 0x65, 0xc8, 0x42, | ||
355 | 0xff, 0x06, 0xd4, 0x08, | ||
356 | 0x00, 0x65, 0xba, 0x5b, | ||
357 | 0xe0, 0x3d, 0xe2, 0x62, | ||
358 | 0x20, 0x12, 0xe2, 0x62, | ||
359 | 0x51, 0x6a, 0xf6, 0x5a, | ||
360 | 0x00, 0x65, 0x48, 0x5b, | ||
361 | 0xff, 0x37, 0xc8, 0x08, | ||
362 | 0x00, 0xa1, 0xda, 0x62, | ||
363 | 0x04, 0xa0, 0xda, 0x7a, | ||
364 | 0xfb, 0xa0, 0x40, 0x09, | ||
365 | 0x80, 0x36, 0x6c, 0x00, | ||
366 | 0x80, 0xa0, 0x50, 0x7a, | ||
367 | 0x7f, 0xa0, 0x40, 0x09, | ||
368 | 0xff, 0x6a, 0xf2, 0x5a, | ||
369 | 0x00, 0x65, 0x50, 0x42, | ||
370 | 0x04, 0xa0, 0xe0, 0x7a, | ||
371 | 0x00, 0x65, 0x98, 0x5c, | ||
372 | 0x00, 0x65, 0xe2, 0x42, | ||
373 | 0x00, 0x65, 0x80, 0x5c, | ||
374 | 0x31, 0x6a, 0x22, 0x01, | ||
375 | 0x0c, 0x6a, 0xf2, 0x5a, | ||
376 | 0x00, 0x65, 0x50, 0x42, | ||
377 | 0x61, 0x6a, 0x22, 0x01, | ||
378 | 0x00, 0x65, 0x50, 0x42, | ||
379 | 0x51, 0x6a, 0xf6, 0x5a, | ||
380 | 0x51, 0x6a, 0x22, 0x01, | ||
381 | 0x00, 0x65, 0x50, 0x42, | ||
382 | 0x10, 0x3d, 0x06, 0x00, | ||
383 | 0xff, 0x65, 0x68, 0x0c, | ||
384 | 0xff, 0x06, 0xd4, 0x08, | ||
385 | 0x01, 0x0c, 0xf8, 0x7a, | ||
386 | 0x04, 0x0c, 0xfa, 0x6a, | ||
387 | 0xe0, 0x03, 0x7a, 0x08, | ||
388 | 0xe0, 0x3d, 0x06, 0x63, | ||
389 | 0xff, 0x65, 0xcc, 0x08, | ||
390 | 0xff, 0x12, 0xda, 0x0c, | ||
391 | 0xff, 0x06, 0xd4, 0x0c, | ||
392 | 0xd1, 0x6a, 0x22, 0x01, | ||
393 | 0x00, 0x65, 0xaa, 0x40, | ||
394 | 0xff, 0x65, 0x26, 0x09, | ||
395 | 0x01, 0x0b, 0x1a, 0x6b, | ||
396 | 0x10, 0x0c, 0x0c, 0x7b, | ||
397 | 0x04, 0x0b, 0x14, 0x6b, | ||
398 | 0xff, 0x6a, 0xca, 0x08, | ||
399 | 0x04, 0x93, 0x18, 0x6b, | ||
400 | 0x01, 0x94, 0x16, 0x7b, | ||
401 | 0x10, 0x94, 0x18, 0x6b, | ||
402 | 0x80, 0x3d, 0x1e, 0x73, | ||
403 | 0x0f, 0x04, 0x22, 0x6b, | ||
404 | 0x02, 0x03, 0x22, 0x7b, | ||
405 | 0x11, 0x0c, 0x1e, 0x7b, | ||
406 | 0xc7, 0x93, 0x26, 0x09, | ||
407 | 0xff, 0x99, 0xd4, 0x08, | ||
408 | 0x38, 0x93, 0x24, 0x6b, | ||
409 | 0xff, 0x6a, 0xd4, 0x0c, | ||
410 | 0x80, 0x36, 0x28, 0x6b, | ||
411 | 0x21, 0x6a, 0x22, 0x05, | ||
412 | 0xff, 0x65, 0x20, 0x09, | ||
413 | 0xff, 0x51, 0x36, 0x63, | ||
414 | 0xff, 0x37, 0xc8, 0x08, | ||
415 | 0xa1, 0x6a, 0x42, 0x43, | ||
416 | 0xff, 0x51, 0xc8, 0x08, | ||
417 | 0xb9, 0x6a, 0x42, 0x43, | ||
418 | 0xff, 0x90, 0xa4, 0x08, | ||
419 | 0xff, 0xba, 0x46, 0x73, | ||
420 | 0xff, 0xba, 0x20, 0x09, | ||
421 | 0xff, 0x65, 0xca, 0x18, | ||
422 | 0x00, 0x6c, 0x3a, 0x63, | ||
423 | 0xff, 0x90, 0xca, 0x0c, | ||
424 | 0xff, 0x6a, 0xca, 0x04, | ||
425 | 0x20, 0x36, 0x5a, 0x7b, | ||
426 | 0x00, 0x90, 0x2e, 0x5b, | ||
427 | 0xff, 0x65, 0x5a, 0x73, | ||
428 | 0xff, 0x52, 0x58, 0x73, | ||
429 | 0xff, 0xba, 0xcc, 0x08, | ||
430 | 0xff, 0x52, 0x20, 0x09, | ||
431 | 0xff, 0x66, 0x74, 0x09, | ||
432 | 0xff, 0x65, 0x20, 0x0d, | ||
433 | 0xff, 0xba, 0x7e, 0x0c, | ||
434 | 0x00, 0x6a, 0x86, 0x5c, | ||
435 | 0x0d, 0x6a, 0x6a, 0x00, | ||
436 | 0x00, 0x51, 0xe6, 0x43, | ||
437 | 0xff, 0x3f, 0xb4, 0x73, | ||
438 | 0xff, 0x6a, 0xa2, 0x00, | ||
439 | 0x00, 0x3f, 0x2e, 0x5b, | ||
440 | 0xff, 0x65, 0xb4, 0x73, | ||
441 | 0x20, 0x36, 0x6c, 0x00, | ||
442 | 0x20, 0xa0, 0x6e, 0x6b, | ||
443 | 0xff, 0xb9, 0xa2, 0x0c, | ||
444 | 0xff, 0x6a, 0xa2, 0x04, | ||
445 | 0xff, 0x65, 0xa4, 0x08, | ||
446 | 0xe0, 0x6a, 0xcc, 0x00, | ||
447 | 0x45, 0x6a, 0xda, 0x5b, | ||
448 | 0x01, 0x6a, 0xd0, 0x01, | ||
449 | 0x09, 0x6a, 0xd6, 0x01, | ||
450 | 0x80, 0xeb, 0x7a, 0x7b, | ||
451 | 0x01, 0x6a, 0xd6, 0x01, | ||
452 | 0x01, 0xe9, 0xa4, 0x34, | ||
453 | 0x88, 0x6a, 0xcc, 0x00, | ||
454 | 0x45, 0x6a, 0xda, 0x5b, | ||
455 | 0x01, 0x6a, 0x18, 0x01, | ||
456 | 0xff, 0x6a, 0x1a, 0x09, | ||
457 | 0xff, 0x6a, 0x1c, 0x09, | ||
458 | 0x0d, 0x6a, 0x26, 0x01, | ||
459 | 0x00, 0x65, 0x78, 0x5c, | ||
460 | 0xff, 0x99, 0xa4, 0x0c, | ||
461 | 0xff, 0x65, 0xa4, 0x08, | ||
462 | 0xe0, 0x6a, 0xcc, 0x00, | ||
463 | 0x45, 0x6a, 0xda, 0x5b, | ||
464 | 0x01, 0x6a, 0xd0, 0x01, | ||
465 | 0x01, 0x6a, 0xdc, 0x05, | ||
466 | 0x88, 0x6a, 0xcc, 0x00, | ||
467 | 0x45, 0x6a, 0xda, 0x5b, | ||
468 | 0x01, 0x6a, 0x18, 0x01, | ||
469 | 0xff, 0x6a, 0x1a, 0x09, | ||
470 | 0xff, 0x6a, 0x1c, 0x09, | ||
471 | 0x01, 0x6a, 0x26, 0x05, | ||
472 | 0x01, 0x65, 0xd8, 0x31, | ||
473 | 0x09, 0xee, 0xdc, 0x01, | ||
474 | 0x80, 0xee, 0xaa, 0x7b, | ||
475 | 0xff, 0x6a, 0xdc, 0x0d, | ||
476 | 0xff, 0x65, 0x32, 0x09, | ||
477 | 0x0a, 0x93, 0x26, 0x01, | ||
478 | 0x00, 0x65, 0x78, 0x44, | ||
479 | 0xff, 0x37, 0xc8, 0x08, | ||
480 | 0x00, 0x6a, 0x70, 0x5b, | ||
481 | 0xff, 0x52, 0xa2, 0x0c, | ||
482 | 0x01, 0x0c, 0xba, 0x7b, | ||
483 | 0x04, 0x0c, 0xba, 0x6b, | ||
484 | 0xe0, 0x03, 0x06, 0x08, | ||
485 | 0xe0, 0x03, 0x7a, 0x0c, | ||
486 | 0xff, 0x8c, 0x10, 0x08, | ||
487 | 0xff, 0x8d, 0x12, 0x08, | ||
488 | 0xff, 0x8e, 0x14, 0x0c, | ||
489 | 0xff, 0x6c, 0xda, 0x08, | ||
490 | 0xff, 0x6c, 0xda, 0x08, | ||
491 | 0xff, 0x6c, 0xda, 0x08, | ||
492 | 0xff, 0x6c, 0xda, 0x08, | ||
493 | 0xff, 0x6c, 0xda, 0x08, | ||
494 | 0xff, 0x6c, 0xda, 0x08, | ||
495 | 0xff, 0x6c, 0xda, 0x0c, | ||
496 | 0x3d, 0x64, 0xa4, 0x28, | ||
497 | 0x55, 0x64, 0xc8, 0x28, | ||
498 | 0x00, 0x6c, 0xda, 0x18, | ||
499 | 0xff, 0x52, 0xc8, 0x08, | ||
500 | 0x00, 0x6c, 0xda, 0x20, | ||
501 | 0xff, 0x6a, 0xc8, 0x08, | ||
502 | 0x00, 0x6c, 0xda, 0x20, | ||
503 | 0x00, 0x6c, 0xda, 0x24, | ||
504 | 0xff, 0x65, 0xc8, 0x08, | ||
505 | 0xe0, 0x6a, 0xcc, 0x00, | ||
506 | 0x41, 0x6a, 0xd6, 0x5b, | ||
507 | 0xff, 0x90, 0xe2, 0x09, | ||
508 | 0x20, 0x6a, 0xd0, 0x01, | ||
509 | 0x04, 0x35, 0xf8, 0x7b, | ||
510 | 0x1d, 0x6a, 0xdc, 0x01, | ||
511 | 0xdc, 0xee, 0xf4, 0x63, | ||
512 | 0x00, 0x65, 0x0e, 0x44, | ||
513 | 0x01, 0x6a, 0xdc, 0x01, | ||
514 | 0x20, 0xa0, 0xd8, 0x31, | ||
515 | 0x09, 0xee, 0xdc, 0x01, | ||
516 | 0x80, 0xee, 0xfe, 0x7b, | ||
517 | 0x11, 0x6a, 0xdc, 0x01, | ||
518 | 0x50, 0xee, 0x02, 0x64, | ||
519 | 0x20, 0x6a, 0xd0, 0x01, | ||
520 | 0x09, 0x6a, 0xdc, 0x01, | ||
521 | 0x88, 0xee, 0x08, 0x64, | ||
522 | 0x19, 0x6a, 0xdc, 0x01, | ||
523 | 0xd8, 0xee, 0x0c, 0x64, | ||
524 | 0xff, 0x6a, 0xdc, 0x09, | ||
525 | 0x18, 0xee, 0x10, 0x6c, | ||
526 | 0xff, 0x6a, 0xd4, 0x0c, | ||
527 | 0x88, 0x6a, 0xcc, 0x00, | ||
528 | 0x41, 0x6a, 0xd6, 0x5b, | ||
529 | 0x20, 0x6a, 0x18, 0x01, | ||
530 | 0xff, 0x6a, 0x1a, 0x09, | ||
531 | 0xff, 0x6a, 0x1c, 0x09, | ||
532 | 0xff, 0x35, 0x26, 0x09, | ||
533 | 0x04, 0x35, 0x3c, 0x6c, | ||
534 | 0xa0, 0x6a, 0xca, 0x00, | ||
535 | 0x20, 0x65, 0xc8, 0x18, | ||
536 | 0xff, 0x6c, 0x32, 0x09, | ||
537 | 0xff, 0x6c, 0x32, 0x09, | ||
538 | 0xff, 0x6c, 0x32, 0x09, | ||
539 | 0xff, 0x6c, 0x32, 0x09, | ||
540 | 0xff, 0x6c, 0x32, 0x09, | ||
541 | 0xff, 0x6c, 0x32, 0x09, | ||
542 | 0xff, 0x6c, 0x32, 0x09, | ||
543 | 0xff, 0x6c, 0x32, 0x09, | ||
544 | 0x00, 0x65, 0x26, 0x64, | ||
545 | 0x0a, 0x93, 0x26, 0x01, | ||
546 | 0x00, 0x65, 0x78, 0x44, | ||
547 | 0xa0, 0x6a, 0xcc, 0x00, | ||
548 | 0xe8, 0x6a, 0xc8, 0x00, | ||
549 | 0x01, 0x94, 0x40, 0x6c, | ||
550 | 0x10, 0x94, 0x42, 0x6c, | ||
551 | 0x08, 0x94, 0x54, 0x6c, | ||
552 | 0x08, 0x94, 0x54, 0x6c, | ||
553 | 0x08, 0x94, 0x54, 0x6c, | ||
554 | 0x00, 0x65, 0x68, 0x5c, | ||
555 | 0x08, 0x64, 0xc8, 0x18, | ||
556 | 0x00, 0x8c, 0xca, 0x18, | ||
557 | 0x00, 0x65, 0x4a, 0x4c, | ||
558 | 0x00, 0x65, 0x40, 0x44, | ||
559 | 0xf7, 0x93, 0x26, 0x09, | ||
560 | 0x08, 0x93, 0x56, 0x6c, | ||
561 | 0x00, 0x65, 0x68, 0x5c, | ||
562 | 0x08, 0x64, 0xc8, 0x18, | ||
563 | 0x08, 0x64, 0x58, 0x64, | ||
564 | 0xff, 0x6a, 0xd4, 0x0c, | ||
565 | 0x00, 0x65, 0x78, 0x5c, | ||
566 | 0x00, 0x65, 0x68, 0x5c, | ||
567 | 0x00, 0x65, 0x68, 0x5c, | ||
568 | 0x00, 0x65, 0x68, 0x5c, | ||
569 | 0xff, 0x99, 0xda, 0x08, | ||
570 | 0xff, 0x99, 0xda, 0x08, | ||
571 | 0xff, 0x99, 0xda, 0x08, | ||
572 | 0xff, 0x99, 0xda, 0x08, | ||
573 | 0xff, 0x99, 0xda, 0x08, | ||
574 | 0xff, 0x99, 0xda, 0x08, | ||
575 | 0xff, 0x99, 0xda, 0x08, | ||
576 | 0xff, 0x99, 0xda, 0x0c, | ||
577 | 0x08, 0x94, 0x78, 0x7c, | ||
578 | 0xf7, 0x93, 0x26, 0x09, | ||
579 | 0x08, 0x93, 0x7c, 0x6c, | ||
580 | 0xff, 0x6a, 0xd4, 0x0c, | ||
581 | 0xff, 0x40, 0x74, 0x09, | ||
582 | 0xff, 0x90, 0x80, 0x08, | ||
583 | 0xff, 0x6a, 0x72, 0x05, | ||
584 | 0xff, 0x40, 0x94, 0x64, | ||
585 | 0xff, 0x3f, 0x8c, 0x64, | ||
586 | 0xff, 0x6a, 0xca, 0x04, | ||
587 | 0xff, 0x3f, 0x20, 0x09, | ||
588 | 0x01, 0x6a, 0x6a, 0x00, | ||
589 | 0x00, 0xb9, 0xe6, 0x5b, | ||
590 | 0xff, 0xba, 0x7e, 0x0c, | ||
591 | 0xff, 0x40, 0x20, 0x09, | ||
592 | 0xff, 0xba, 0x80, 0x0c, | ||
593 | 0xff, 0x3f, 0x74, 0x09, | ||
594 | 0xff, 0x90, 0x7e, 0x0c, | ||
595 | }; | ||
596 | |||
597 | static int aic7xxx_patch15_func(struct aic7xxx_host *p); | ||
598 | |||
599 | static int | ||
600 | aic7xxx_patch15_func(struct aic7xxx_host *p) | ||
601 | { | ||
602 | return ((p->bugs & AHC_BUG_SCBCHAN_UPLOAD) != 0); | ||
603 | } | ||
604 | |||
605 | static int aic7xxx_patch14_func(struct aic7xxx_host *p); | ||
606 | |||
607 | static int | ||
608 | aic7xxx_patch14_func(struct aic7xxx_host *p) | ||
609 | { | ||
610 | return ((p->bugs & AHC_BUG_PCI_2_1_RETRY) != 0); | ||
611 | } | ||
612 | |||
613 | static int aic7xxx_patch13_func(struct aic7xxx_host *p); | ||
614 | |||
615 | static int | ||
616 | aic7xxx_patch13_func(struct aic7xxx_host *p) | ||
617 | { | ||
618 | return ((p->features & AHC_WIDE) != 0); | ||
619 | } | ||
620 | |||
621 | static int aic7xxx_patch12_func(struct aic7xxx_host *p); | ||
622 | |||
623 | static int | ||
624 | aic7xxx_patch12_func(struct aic7xxx_host *p) | ||
625 | { | ||
626 | return ((p->bugs & AHC_BUG_AUTOFLUSH) != 0); | ||
627 | } | ||
628 | |||
629 | static int aic7xxx_patch11_func(struct aic7xxx_host *p); | ||
630 | |||
631 | static int | ||
632 | aic7xxx_patch11_func(struct aic7xxx_host *p) | ||
633 | { | ||
634 | return ((p->features & AHC_ULTRA2) == 0); | ||
635 | } | ||
636 | |||
637 | static int aic7xxx_patch10_func(struct aic7xxx_host *p); | ||
638 | |||
639 | static int | ||
640 | aic7xxx_patch10_func(struct aic7xxx_host *p) | ||
641 | { | ||
642 | return ((p->features & AHC_CMD_CHAN) == 0); | ||
643 | } | ||
644 | |||
645 | static int aic7xxx_patch9_func(struct aic7xxx_host *p); | ||
646 | |||
647 | static int | ||
648 | aic7xxx_patch9_func(struct aic7xxx_host *p) | ||
649 | { | ||
650 | return ((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895); | ||
651 | } | ||
652 | |||
653 | static int aic7xxx_patch8_func(struct aic7xxx_host *p); | ||
654 | |||
655 | static int | ||
656 | aic7xxx_patch8_func(struct aic7xxx_host *p) | ||
657 | { | ||
658 | return ((p->features & AHC_ULTRA) != 0); | ||
659 | } | ||
660 | |||
661 | static int aic7xxx_patch7_func(struct aic7xxx_host *p); | ||
662 | |||
663 | static int | ||
664 | aic7xxx_patch7_func(struct aic7xxx_host *p) | ||
665 | { | ||
666 | return ((p->features & AHC_ULTRA2) != 0); | ||
667 | } | ||
668 | |||
669 | static int aic7xxx_patch6_func(struct aic7xxx_host *p); | ||
670 | |||
671 | static int | ||
672 | aic7xxx_patch6_func(struct aic7xxx_host *p) | ||
673 | { | ||
674 | return ((p->flags & AHC_PAGESCBS) == 0); | ||
675 | } | ||
676 | |||
677 | static int aic7xxx_patch5_func(struct aic7xxx_host *p); | ||
678 | |||
679 | static int | ||
680 | aic7xxx_patch5_func(struct aic7xxx_host *p) | ||
681 | { | ||
682 | return ((p->flags & AHC_PAGESCBS) != 0); | ||
683 | } | ||
684 | |||
685 | static int aic7xxx_patch4_func(struct aic7xxx_host *p); | ||
686 | |||
687 | static int | ||
688 | aic7xxx_patch4_func(struct aic7xxx_host *p) | ||
689 | { | ||
690 | return ((p->features & AHC_QUEUE_REGS) != 0); | ||
691 | } | ||
692 | |||
693 | static int aic7xxx_patch3_func(struct aic7xxx_host *p); | ||
694 | |||
695 | static int | ||
696 | aic7xxx_patch3_func(struct aic7xxx_host *p) | ||
697 | { | ||
698 | return ((p->features & AHC_TWIN) != 0); | ||
699 | } | ||
700 | |||
701 | static int aic7xxx_patch2_func(struct aic7xxx_host *p); | ||
702 | |||
703 | static int | ||
704 | aic7xxx_patch2_func(struct aic7xxx_host *p) | ||
705 | { | ||
706 | return ((p->features & AHC_QUEUE_REGS) == 0); | ||
707 | } | ||
708 | |||
709 | static int aic7xxx_patch1_func(struct aic7xxx_host *p); | ||
710 | |||
711 | static int | ||
712 | aic7xxx_patch1_func(struct aic7xxx_host *p) | ||
713 | { | ||
714 | return ((p->features & AHC_CMD_CHAN) != 0); | ||
715 | } | ||
716 | |||
717 | static int aic7xxx_patch0_func(struct aic7xxx_host *p); | ||
718 | |||
719 | static int | ||
720 | aic7xxx_patch0_func(struct aic7xxx_host *p) | ||
721 | { | ||
722 | return (0); | ||
723 | } | ||
724 | |||
725 | struct sequencer_patch { | ||
726 | int (*patch_func)(struct aic7xxx_host *); | ||
727 | unsigned int begin :10, | ||
728 | skip_instr :10, | ||
729 | skip_patch :12; | ||
730 | } sequencer_patches[] = { | ||
731 | { aic7xxx_patch1_func, 3, 2, 1 }, | ||
732 | { aic7xxx_patch2_func, 7, 1, 1 }, | ||
733 | { aic7xxx_patch2_func, 8, 1, 1 }, | ||
734 | { aic7xxx_patch3_func, 11, 4, 1 }, | ||
735 | { aic7xxx_patch4_func, 16, 3, 2 }, | ||
736 | { aic7xxx_patch0_func, 19, 4, 1 }, | ||
737 | { aic7xxx_patch5_func, 23, 1, 1 }, | ||
738 | { aic7xxx_patch6_func, 26, 1, 1 }, | ||
739 | { aic7xxx_patch1_func, 29, 1, 2 }, | ||
740 | { aic7xxx_patch0_func, 30, 3, 1 }, | ||
741 | { aic7xxx_patch3_func, 39, 4, 1 }, | ||
742 | { aic7xxx_patch7_func, 43, 3, 2 }, | ||
743 | { aic7xxx_patch0_func, 46, 3, 1 }, | ||
744 | { aic7xxx_patch8_func, 52, 7, 1 }, | ||
745 | { aic7xxx_patch3_func, 60, 3, 1 }, | ||
746 | { aic7xxx_patch7_func, 63, 2, 1 }, | ||
747 | { aic7xxx_patch7_func, 102, 1, 2 }, | ||
748 | { aic7xxx_patch0_func, 103, 2, 1 }, | ||
749 | { aic7xxx_patch7_func, 107, 2, 1 }, | ||
750 | { aic7xxx_patch9_func, 109, 1, 1 }, | ||
751 | { aic7xxx_patch10_func, 110, 2, 1 }, | ||
752 | { aic7xxx_patch7_func, 113, 1, 2 }, | ||
753 | { aic7xxx_patch0_func, 114, 1, 1 }, | ||
754 | { aic7xxx_patch1_func, 118, 1, 1 }, | ||
755 | { aic7xxx_patch1_func, 121, 3, 3 }, | ||
756 | { aic7xxx_patch11_func, 123, 1, 1 }, | ||
757 | { aic7xxx_patch0_func, 124, 5, 1 }, | ||
758 | { aic7xxx_patch7_func, 132, 1, 1 }, | ||
759 | { aic7xxx_patch9_func, 133, 1, 1 }, | ||
760 | { aic7xxx_patch10_func, 134, 3, 1 }, | ||
761 | { aic7xxx_patch7_func, 137, 3, 2 }, | ||
762 | { aic7xxx_patch0_func, 140, 2, 1 }, | ||
763 | { aic7xxx_patch7_func, 142, 5, 2 }, | ||
764 | { aic7xxx_patch0_func, 147, 3, 1 }, | ||
765 | { aic7xxx_patch7_func, 150, 1, 2 }, | ||
766 | { aic7xxx_patch0_func, 151, 2, 1 }, | ||
767 | { aic7xxx_patch1_func, 153, 15, 4 }, | ||
768 | { aic7xxx_patch11_func, 166, 1, 2 }, | ||
769 | { aic7xxx_patch0_func, 167, 1, 1 }, | ||
770 | { aic7xxx_patch0_func, 168, 10, 1 }, | ||
771 | { aic7xxx_patch7_func, 181, 1, 2 }, | ||
772 | { aic7xxx_patch0_func, 182, 2, 1 }, | ||
773 | { aic7xxx_patch7_func, 184, 18, 1 }, | ||
774 | { aic7xxx_patch1_func, 202, 3, 3 }, | ||
775 | { aic7xxx_patch7_func, 204, 1, 1 }, | ||
776 | { aic7xxx_patch0_func, 205, 4, 1 }, | ||
777 | { aic7xxx_patch7_func, 210, 2, 1 }, | ||
778 | { aic7xxx_patch7_func, 215, 13, 3 }, | ||
779 | { aic7xxx_patch12_func, 218, 1, 1 }, | ||
780 | { aic7xxx_patch12_func, 219, 4, 1 }, | ||
781 | { aic7xxx_patch1_func, 229, 3, 3 }, | ||
782 | { aic7xxx_patch11_func, 231, 1, 1 }, | ||
783 | { aic7xxx_patch0_func, 232, 5, 1 }, | ||
784 | { aic7xxx_patch11_func, 237, 1, 2 }, | ||
785 | { aic7xxx_patch0_func, 238, 9, 1 }, | ||
786 | { aic7xxx_patch13_func, 254, 1, 2 }, | ||
787 | { aic7xxx_patch0_func, 255, 1, 1 }, | ||
788 | { aic7xxx_patch4_func, 316, 1, 2 }, | ||
789 | { aic7xxx_patch0_func, 317, 1, 1 }, | ||
790 | { aic7xxx_patch2_func, 320, 1, 1 }, | ||
791 | { aic7xxx_patch1_func, 330, 3, 2 }, | ||
792 | { aic7xxx_patch0_func, 333, 5, 1 }, | ||
793 | { aic7xxx_patch13_func, 341, 1, 2 }, | ||
794 | { aic7xxx_patch0_func, 342, 1, 1 }, | ||
795 | { aic7xxx_patch5_func, 347, 1, 1 }, | ||
796 | { aic7xxx_patch11_func, 389, 15, 2 }, | ||
797 | { aic7xxx_patch14_func, 402, 1, 1 }, | ||
798 | { aic7xxx_patch1_func, 441, 7, 2 }, | ||
799 | { aic7xxx_patch0_func, 448, 8, 1 }, | ||
800 | { aic7xxx_patch1_func, 457, 4, 2 }, | ||
801 | { aic7xxx_patch0_func, 461, 6, 1 }, | ||
802 | { aic7xxx_patch1_func, 467, 4, 2 }, | ||
803 | { aic7xxx_patch0_func, 471, 3, 1 }, | ||
804 | { aic7xxx_patch10_func, 481, 10, 1 }, | ||
805 | { aic7xxx_patch1_func, 500, 22, 5 }, | ||
806 | { aic7xxx_patch11_func, 508, 4, 1 }, | ||
807 | { aic7xxx_patch7_func, 512, 7, 3 }, | ||
808 | { aic7xxx_patch15_func, 512, 5, 2 }, | ||
809 | { aic7xxx_patch0_func, 517, 2, 1 }, | ||
810 | { aic7xxx_patch10_func, 522, 50, 3 }, | ||
811 | { aic7xxx_patch14_func, 543, 17, 2 }, | ||
812 | { aic7xxx_patch0_func, 560, 4, 1 }, | ||
813 | { aic7xxx_patch10_func, 572, 4, 1 }, | ||
814 | { aic7xxx_patch5_func, 576, 2, 1 }, | ||
815 | { aic7xxx_patch5_func, 579, 9, 1 }, | ||
816 | |||
817 | }; | ||
diff --git a/drivers/scsi/aic7xxx_old/scsi_message.h b/drivers/scsi/aic7xxx_old/scsi_message.h deleted file mode 100644 index a79f89c65173..000000000000 --- a/drivers/scsi/aic7xxx_old/scsi_message.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* Messages (1 byte) */ /* I/T (M)andatory or (O)ptional */ | ||
2 | #define MSG_CMDCOMPLETE 0x00 /* M/M */ | ||
3 | #define MSG_EXTENDED 0x01 /* O/O */ | ||
4 | #define MSG_SAVEDATAPOINTER 0x02 /* O/O */ | ||
5 | #define MSG_RESTOREPOINTERS 0x03 /* O/O */ | ||
6 | #define MSG_DISCONNECT 0x04 /* O/O */ | ||
7 | #define MSG_INITIATOR_DET_ERR 0x05 /* M/M */ | ||
8 | #define MSG_ABORT 0x06 /* O/M */ | ||
9 | #define MSG_MESSAGE_REJECT 0x07 /* M/M */ | ||
10 | #define MSG_NOOP 0x08 /* M/M */ | ||
11 | #define MSG_PARITY_ERROR 0x09 /* M/M */ | ||
12 | #define MSG_LINK_CMD_COMPLETE 0x0a /* O/O */ | ||
13 | #define MSG_LINK_CMD_COMPLETEF 0x0b /* O/O */ | ||
14 | #define MSG_BUS_DEV_RESET 0x0c /* O/M */ | ||
15 | #define MSG_ABORT_TAG 0x0d /* O/O */ | ||
16 | #define MSG_CLEAR_QUEUE 0x0e /* O/O */ | ||
17 | #define MSG_INIT_RECOVERY 0x0f /* O/O */ | ||
18 | #define MSG_REL_RECOVERY 0x10 /* O/O */ | ||
19 | #define MSG_TERM_IO_PROC 0x11 /* O/O */ | ||
20 | |||
21 | /* Messages (2 byte) */ | ||
22 | #define MSG_SIMPLE_Q_TAG 0x20 /* O/O */ | ||
23 | #define MSG_HEAD_OF_Q_TAG 0x21 /* O/O */ | ||
24 | #define MSG_ORDERED_Q_TAG 0x22 /* O/O */ | ||
25 | #define MSG_IGN_WIDE_RESIDUE 0x23 /* O/O */ | ||
26 | |||
27 | /* Identify message */ /* M/M */ | ||
28 | #define MSG_IDENTIFYFLAG 0x80 | ||
29 | #define MSG_IDENTIFY_DISCFLAG 0x40 | ||
30 | #define MSG_IDENTIFY(lun, disc) (((disc) ? 0xc0 : MSG_IDENTIFYFLAG) | (lun)) | ||
31 | #define MSG_ISIDENTIFY(m) ((m) & MSG_IDENTIFYFLAG) | ||
32 | |||
33 | /* Extended messages (opcode and length) */ | ||
34 | #define MSG_EXT_SDTR 0x01 | ||
35 | #define MSG_EXT_SDTR_LEN 0x03 | ||
36 | |||
37 | #define MSG_EXT_WDTR 0x03 | ||
38 | #define MSG_EXT_WDTR_LEN 0x02 | ||
39 | #define MSG_EXT_WDTR_BUS_8_BIT 0x00 | ||
40 | #define MSG_EXT_WDTR_BUS_16_BIT 0x01 | ||
41 | #define MSG_EXT_WDTR_BUS_32_BIT 0x02 | ||
42 | |||
43 | #define MSG_EXT_PPR 0x04 | ||
44 | #define MSG_EXT_PPR_LEN 0x06 | ||
45 | #define MSG_EXT_PPR_OPTION_ST 0x00 | ||
46 | #define MSG_EXT_PPR_OPTION_DT_CRC 0x02 | ||
47 | #define MSG_EXT_PPR_OPTION_DT_UNITS 0x03 | ||
48 | #define MSG_EXT_PPR_OPTION_DT_CRC_QUICK 0x04 | ||
49 | #define MSG_EXT_PPR_OPTION_DT_UNITS_QUICK 0x05 | ||
diff --git a/drivers/scsi/aic7xxx_old/sequencer.h b/drivers/scsi/aic7xxx_old/sequencer.h deleted file mode 100644 index ee66855222b1..000000000000 --- a/drivers/scsi/aic7xxx_old/sequencer.h +++ /dev/null | |||
@@ -1,135 +0,0 @@ | |||
1 | /* | ||
2 | * Instruction formats for the sequencer program downloaded to | ||
3 | * Aic7xxx SCSI host adapters | ||
4 | * | ||
5 | * Copyright (c) 1997, 1998 Justin T. Gibbs. | ||
6 | * All rights reserved. | ||
7 | * | ||
8 | * Redistribution and use in source and binary forms, with or without | ||
9 | * modification, are permitted provided that the following conditions | ||
10 | * are met: | ||
11 | * 1. Redistributions of source code must retain the above copyright | ||
12 | * notice, this list of conditions, and the following disclaimer, | ||
13 | * without modification, immediately at the beginning of the file. | ||
14 | * 2. The name of the author may not be used to endorse or promote products | ||
15 | * derived from this software without specific prior written permission. | ||
16 | * | ||
17 | * Where this Software is combined with software released under the terms of | ||
18 | * the GNU General Public License ("GPL") and the terms of the GPL would require the | ||
19 | * combined work to also be released under the terms of the GPL, the terms | ||
20 | * and conditions of this License will apply in addition to those of the | ||
21 | * GPL with the exception of any terms or conditions of this License that | ||
22 | * conflict with, or are expressly prohibited by, the GPL. | ||
23 | * | ||
24 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | ||
25 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR | ||
28 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | ||
30 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
31 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
32 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||
33 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | ||
34 | * SUCH DAMAGE. | ||
35 | * | ||
36 | * $Id: sequencer.h,v 1.3 1997/09/27 19:37:31 gibbs Exp $ | ||
37 | */ | ||
38 | |||
39 | #ifdef __LITTLE_ENDIAN_BITFIELD | ||
40 | struct ins_format1 { | ||
41 | unsigned int | ||
42 | immediate : 8, | ||
43 | source : 9, | ||
44 | destination : 9, | ||
45 | ret : 1, | ||
46 | opcode : 4, | ||
47 | parity : 1; | ||
48 | }; | ||
49 | |||
50 | struct ins_format2 { | ||
51 | unsigned int | ||
52 | shift_control : 8, | ||
53 | source : 9, | ||
54 | destination : 9, | ||
55 | ret : 1, | ||
56 | opcode : 4, | ||
57 | parity : 1; | ||
58 | }; | ||
59 | |||
60 | struct ins_format3 { | ||
61 | unsigned int | ||
62 | immediate : 8, | ||
63 | source : 9, | ||
64 | address : 10, | ||
65 | opcode : 4, | ||
66 | parity : 1; | ||
67 | }; | ||
68 | #elif defined(__BIG_ENDIAN_BITFIELD) | ||
69 | struct ins_format1 { | ||
70 | unsigned int | ||
71 | parity : 1, | ||
72 | opcode : 4, | ||
73 | ret : 1, | ||
74 | destination : 9, | ||
75 | source : 9, | ||
76 | immediate : 8; | ||
77 | }; | ||
78 | |||
79 | struct ins_format2 { | ||
80 | unsigned int | ||
81 | parity : 1, | ||
82 | opcode : 4, | ||
83 | ret : 1, | ||
84 | destination : 9, | ||
85 | source : 9, | ||
86 | shift_control : 8; | ||
87 | }; | ||
88 | |||
89 | struct ins_format3 { | ||
90 | unsigned int | ||
91 | parity : 1, | ||
92 | opcode : 4, | ||
93 | address : 10, | ||
94 | source : 9, | ||
95 | immediate : 8; | ||
96 | }; | ||
97 | #endif | ||
98 | |||
99 | union ins_formats { | ||
100 | struct ins_format1 format1; | ||
101 | struct ins_format2 format2; | ||
102 | struct ins_format3 format3; | ||
103 | unsigned char bytes[4]; | ||
104 | unsigned int integer; | ||
105 | }; | ||
106 | struct instruction { | ||
107 | union ins_formats format; | ||
108 | unsigned int srcline; | ||
109 | struct symbol *patch_label; | ||
110 | struct { | ||
111 | struct instruction *stqe_next; | ||
112 | } links; | ||
113 | }; | ||
114 | |||
115 | #define AIC_OP_OR 0x0 | ||
116 | #define AIC_OP_AND 0x1 | ||
117 | #define AIC_OP_XOR 0x2 | ||
118 | #define AIC_OP_ADD 0x3 | ||
119 | #define AIC_OP_ADC 0x4 | ||
120 | #define AIC_OP_ROL 0x5 | ||
121 | #define AIC_OP_BMOV 0x6 | ||
122 | |||
123 | #define AIC_OP_JMP 0x8 | ||
124 | #define AIC_OP_JC 0x9 | ||
125 | #define AIC_OP_JNC 0xa | ||
126 | #define AIC_OP_CALL 0xb | ||
127 | #define AIC_OP_JNE 0xc | ||
128 | #define AIC_OP_JNZ 0xd | ||
129 | #define AIC_OP_JE 0xe | ||
130 | #define AIC_OP_JZ 0xf | ||
131 | |||
132 | /* Pseudo Ops */ | ||
133 | #define AIC_OP_SHL 0x10 | ||
134 | #define AIC_OP_SHR 0x20 | ||
135 | #define AIC_OP_ROR 0x30 | ||
diff --git a/drivers/scsi/be2iscsi/be_iscsi.c b/drivers/scsi/be2iscsi/be_iscsi.c index ffadbee0b4d9..889066d9d6fb 100644 --- a/drivers/scsi/be2iscsi/be_iscsi.c +++ b/drivers/scsi/be2iscsi/be_iscsi.c | |||
@@ -541,10 +541,8 @@ static int be2iscsi_get_if_param(struct beiscsi_hba *phba, | |||
541 | ip_type = BE2_IPV6; | 541 | ip_type = BE2_IPV6; |
542 | 542 | ||
543 | len = mgmt_get_if_info(phba, ip_type, &if_info); | 543 | len = mgmt_get_if_info(phba, ip_type, &if_info); |
544 | if (len) { | 544 | if (len) |
545 | kfree(if_info); | ||
546 | return len; | 545 | return len; |
547 | } | ||
548 | 546 | ||
549 | switch (param) { | 547 | switch (param) { |
550 | case ISCSI_NET_PARAM_IPV4_ADDR: | 548 | case ISCSI_NET_PARAM_IPV4_ADDR: |
@@ -569,7 +567,7 @@ static int be2iscsi_get_if_param(struct beiscsi_hba *phba, | |||
569 | break; | 567 | break; |
570 | case ISCSI_NET_PARAM_VLAN_ID: | 568 | case ISCSI_NET_PARAM_VLAN_ID: |
571 | if (if_info->vlan_priority == BEISCSI_VLAN_DISABLE) | 569 | if (if_info->vlan_priority == BEISCSI_VLAN_DISABLE) |
572 | return -EINVAL; | 570 | len = -EINVAL; |
573 | else | 571 | else |
574 | len = sprintf(buf, "%d\n", | 572 | len = sprintf(buf, "%d\n", |
575 | (if_info->vlan_priority & | 573 | (if_info->vlan_priority & |
@@ -577,7 +575,7 @@ static int be2iscsi_get_if_param(struct beiscsi_hba *phba, | |||
577 | break; | 575 | break; |
578 | case ISCSI_NET_PARAM_VLAN_PRIORITY: | 576 | case ISCSI_NET_PARAM_VLAN_PRIORITY: |
579 | if (if_info->vlan_priority == BEISCSI_VLAN_DISABLE) | 577 | if (if_info->vlan_priority == BEISCSI_VLAN_DISABLE) |
580 | return -EINVAL; | 578 | len = -EINVAL; |
581 | else | 579 | else |
582 | len = sprintf(buf, "%d\n", | 580 | len = sprintf(buf, "%d\n", |
583 | ((if_info->vlan_priority >> 13) & | 581 | ((if_info->vlan_priority >> 13) & |
diff --git a/drivers/scsi/bfa/bfa_core.c b/drivers/scsi/bfa/bfa_core.c index 520540a5fef6..e3f67b097a5c 100644 --- a/drivers/scsi/bfa/bfa_core.c +++ b/drivers/scsi/bfa/bfa_core.c | |||
@@ -1367,10 +1367,6 @@ bfa_faa_query(struct bfa_s *bfa, struct bfa_faa_attr_s *attr, | |||
1367 | struct bfa_iocfc_s *iocfc = &bfa->iocfc; | 1367 | struct bfa_iocfc_s *iocfc = &bfa->iocfc; |
1368 | bfa_status_t status; | 1368 | bfa_status_t status; |
1369 | 1369 | ||
1370 | iocfc->faa_args.faa_attr = attr; | ||
1371 | iocfc->faa_args.faa_cb.faa_cbfn = cbfn; | ||
1372 | iocfc->faa_args.faa_cb.faa_cbarg = cbarg; | ||
1373 | |||
1374 | status = bfa_faa_validate_request(bfa); | 1370 | status = bfa_faa_validate_request(bfa); |
1375 | if (status != BFA_STATUS_OK) | 1371 | if (status != BFA_STATUS_OK) |
1376 | return status; | 1372 | return status; |
@@ -1378,6 +1374,10 @@ bfa_faa_query(struct bfa_s *bfa, struct bfa_faa_attr_s *attr, | |||
1378 | if (iocfc->faa_args.busy == BFA_TRUE) | 1374 | if (iocfc->faa_args.busy == BFA_TRUE) |
1379 | return BFA_STATUS_DEVBUSY; | 1375 | return BFA_STATUS_DEVBUSY; |
1380 | 1376 | ||
1377 | iocfc->faa_args.faa_attr = attr; | ||
1378 | iocfc->faa_args.faa_cb.faa_cbfn = cbfn; | ||
1379 | iocfc->faa_args.faa_cb.faa_cbarg = cbarg; | ||
1380 | |||
1381 | iocfc->faa_args.busy = BFA_TRUE; | 1381 | iocfc->faa_args.busy = BFA_TRUE; |
1382 | memset(&faa_attr_req, 0, sizeof(struct bfi_faa_query_s)); | 1382 | memset(&faa_attr_req, 0, sizeof(struct bfi_faa_query_s)); |
1383 | bfi_h2i_set(faa_attr_req.mh, BFI_MC_IOCFC, | 1383 | bfi_h2i_set(faa_attr_req.mh, BFI_MC_IOCFC, |
diff --git a/drivers/scsi/bfa/bfa_defs.h b/drivers/scsi/bfa/bfa_defs.h index d40a79f5265f..877b86dd2837 100644 --- a/drivers/scsi/bfa/bfa_defs.h +++ b/drivers/scsi/bfa/bfa_defs.h | |||
@@ -132,6 +132,7 @@ enum bfa_status { | |||
132 | BFA_STATUS_ETIMER = 5, /* Timer expired - Retry, if persists, | 132 | BFA_STATUS_ETIMER = 5, /* Timer expired - Retry, if persists, |
133 | * contact support */ | 133 | * contact support */ |
134 | BFA_STATUS_EPROTOCOL = 6, /* Protocol error */ | 134 | BFA_STATUS_EPROTOCOL = 6, /* Protocol error */ |
135 | BFA_STATUS_BADFLASH = 9, /* Flash is bad */ | ||
135 | BFA_STATUS_SFP_UNSUPP = 10, /* Unsupported SFP - Replace SFP */ | 136 | BFA_STATUS_SFP_UNSUPP = 10, /* Unsupported SFP - Replace SFP */ |
136 | BFA_STATUS_UNKNOWN_VFID = 11, /* VF_ID not found */ | 137 | BFA_STATUS_UNKNOWN_VFID = 11, /* VF_ID not found */ |
137 | BFA_STATUS_DATACORRUPTED = 12, /* Diag returned data corrupted */ | 138 | BFA_STATUS_DATACORRUPTED = 12, /* Diag returned data corrupted */ |
diff --git a/drivers/scsi/bfa/bfa_fc.h b/drivers/scsi/bfa/bfa_fc.h index 562ef739b0bc..64069a0a3d0d 100644 --- a/drivers/scsi/bfa/bfa_fc.h +++ b/drivers/scsi/bfa/bfa_fc.h | |||
@@ -1026,7 +1026,7 @@ struct fc_alpabm_s { | |||
1026 | #define FC_ED_TOV 2 | 1026 | #define FC_ED_TOV 2 |
1027 | #define FC_REC_TOV (FC_ED_TOV + 1) | 1027 | #define FC_REC_TOV (FC_ED_TOV + 1) |
1028 | #define FC_RA_TOV 10 | 1028 | #define FC_RA_TOV 10 |
1029 | #define FC_ELS_TOV ((2 * FC_RA_TOV) + 1) | 1029 | #define FC_ELS_TOV (2 * FC_RA_TOV) |
1030 | #define FC_FCCT_TOV (3 * FC_RA_TOV) | 1030 | #define FC_FCCT_TOV (3 * FC_RA_TOV) |
1031 | 1031 | ||
1032 | /* | 1032 | /* |
diff --git a/drivers/scsi/bfa/bfa_fcs_lport.c b/drivers/scsi/bfa/bfa_fcs_lport.c index f5e4e61a0fd7..ff75ef891755 100644 --- a/drivers/scsi/bfa/bfa_fcs_lport.c +++ b/drivers/scsi/bfa/bfa_fcs_lport.c | |||
@@ -773,7 +773,20 @@ bfa_fcs_lport_uf_recv(struct bfa_fcs_lport_s *lport, | |||
773 | bfa_trc(lport->fcs, fchs->type); | 773 | bfa_trc(lport->fcs, fchs->type); |
774 | 774 | ||
775 | if (!bfa_fcs_lport_is_online(lport)) { | 775 | if (!bfa_fcs_lport_is_online(lport)) { |
776 | bfa_stats(lport, uf_recv_drops); | 776 | /* |
777 | * In direct attach topology, it is possible to get a PLOGI | ||
778 | * before the lport is online due to port feature | ||
779 | * (QoS/Trunk/FEC/CR), so send a rjt | ||
780 | */ | ||
781 | if ((fchs->type == FC_TYPE_ELS) && | ||
782 | (els_cmd->els_code == FC_ELS_PLOGI)) { | ||
783 | bfa_fcs_lport_send_ls_rjt(lport, fchs, | ||
784 | FC_LS_RJT_RSN_UNABLE_TO_PERF_CMD, | ||
785 | FC_LS_RJT_EXP_NO_ADDL_INFO); | ||
786 | bfa_stats(lport, plogi_rcvd); | ||
787 | } else | ||
788 | bfa_stats(lport, uf_recv_drops); | ||
789 | |||
777 | return; | 790 | return; |
778 | } | 791 | } |
779 | 792 | ||
diff --git a/drivers/scsi/bfa/bfa_ioc.c b/drivers/scsi/bfa/bfa_ioc.c index f78bcb6696b2..65180e15de6e 100644 --- a/drivers/scsi/bfa/bfa_ioc.c +++ b/drivers/scsi/bfa/bfa_ioc.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include "bfi_reg.h" | 21 | #include "bfi_reg.h" |
22 | #include "bfa_defs.h" | 22 | #include "bfa_defs.h" |
23 | #include "bfa_defs_svc.h" | 23 | #include "bfa_defs_svc.h" |
24 | #include "bfi.h" | ||
24 | 25 | ||
25 | BFA_TRC_FILE(CNA, IOC); | 26 | BFA_TRC_FILE(CNA, IOC); |
26 | 27 | ||
@@ -45,6 +46,14 @@ BFA_TRC_FILE(CNA, IOC); | |||
45 | 46 | ||
46 | #define BFA_DBG_FWTRC_OFF(_fn) (BFI_IOC_TRC_OFF + BFA_DBG_FWTRC_LEN * (_fn)) | 47 | #define BFA_DBG_FWTRC_OFF(_fn) (BFI_IOC_TRC_OFF + BFA_DBG_FWTRC_LEN * (_fn)) |
47 | 48 | ||
49 | #define bfa_ioc_state_disabled(__sm) \ | ||
50 | (((__sm) == BFI_IOC_UNINIT) || \ | ||
51 | ((__sm) == BFI_IOC_INITING) || \ | ||
52 | ((__sm) == BFI_IOC_HWINIT) || \ | ||
53 | ((__sm) == BFI_IOC_DISABLED) || \ | ||
54 | ((__sm) == BFI_IOC_FAIL) || \ | ||
55 | ((__sm) == BFI_IOC_CFG_DISABLED)) | ||
56 | |||
48 | /* | 57 | /* |
49 | * Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details. | 58 | * Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details. |
50 | */ | 59 | */ |
@@ -102,6 +111,12 @@ static void bfa_ioc_disable_comp(struct bfa_ioc_s *ioc); | |||
102 | static void bfa_ioc_lpu_stop(struct bfa_ioc_s *ioc); | 111 | static void bfa_ioc_lpu_stop(struct bfa_ioc_s *ioc); |
103 | static void bfa_ioc_fail_notify(struct bfa_ioc_s *ioc); | 112 | static void bfa_ioc_fail_notify(struct bfa_ioc_s *ioc); |
104 | static void bfa_ioc_pf_fwmismatch(struct bfa_ioc_s *ioc); | 113 | static void bfa_ioc_pf_fwmismatch(struct bfa_ioc_s *ioc); |
114 | static enum bfi_ioc_img_ver_cmp_e bfa_ioc_fw_ver_patch_cmp( | ||
115 | struct bfi_ioc_image_hdr_s *base_fwhdr, | ||
116 | struct bfi_ioc_image_hdr_s *fwhdr_to_cmp); | ||
117 | static enum bfi_ioc_img_ver_cmp_e bfa_ioc_flash_fwver_cmp( | ||
118 | struct bfa_ioc_s *ioc, | ||
119 | struct bfi_ioc_image_hdr_s *base_fwhdr); | ||
105 | 120 | ||
106 | /* | 121 | /* |
107 | * IOC state machine definitions/declarations | 122 | * IOC state machine definitions/declarations |
@@ -1454,28 +1469,42 @@ bfa_ioc_fwver_get(struct bfa_ioc_s *ioc, struct bfi_ioc_image_hdr_s *fwhdr) | |||
1454 | } | 1469 | } |
1455 | 1470 | ||
1456 | /* | 1471 | /* |
1457 | * Returns TRUE if same. | 1472 | * Returns TRUE if driver is willing to work with current smem f/w version. |
1458 | */ | 1473 | */ |
1459 | bfa_boolean_t | 1474 | bfa_boolean_t |
1460 | bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc, struct bfi_ioc_image_hdr_s *fwhdr) | 1475 | bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc, |
1476 | struct bfi_ioc_image_hdr_s *smem_fwhdr) | ||
1461 | { | 1477 | { |
1462 | struct bfi_ioc_image_hdr_s *drv_fwhdr; | 1478 | struct bfi_ioc_image_hdr_s *drv_fwhdr; |
1463 | int i; | 1479 | enum bfi_ioc_img_ver_cmp_e smem_flash_cmp, drv_smem_cmp; |
1464 | 1480 | ||
1465 | drv_fwhdr = (struct bfi_ioc_image_hdr_s *) | 1481 | drv_fwhdr = (struct bfi_ioc_image_hdr_s *) |
1466 | bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0); | 1482 | bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0); |
1467 | 1483 | ||
1468 | for (i = 0; i < BFI_IOC_MD5SUM_SZ; i++) { | 1484 | /* |
1469 | if (fwhdr->md5sum[i] != cpu_to_le32(drv_fwhdr->md5sum[i])) { | 1485 | * If smem is incompatible or old, driver should not work with it. |
1470 | bfa_trc(ioc, i); | 1486 | */ |
1471 | bfa_trc(ioc, fwhdr->md5sum[i]); | 1487 | drv_smem_cmp = bfa_ioc_fw_ver_patch_cmp(drv_fwhdr, smem_fwhdr); |
1472 | bfa_trc(ioc, drv_fwhdr->md5sum[i]); | 1488 | if (drv_smem_cmp == BFI_IOC_IMG_VER_INCOMP || |
1473 | return BFA_FALSE; | 1489 | drv_smem_cmp == BFI_IOC_IMG_VER_OLD) { |
1474 | } | 1490 | return BFA_FALSE; |
1475 | } | 1491 | } |
1476 | 1492 | ||
1477 | bfa_trc(ioc, fwhdr->md5sum[0]); | 1493 | /* |
1478 | return BFA_TRUE; | 1494 | * IF Flash has a better F/W than smem do not work with smem. |
1495 | * If smem f/w == flash f/w, as smem f/w not old | incmp, work with it. | ||
1496 | * If Flash is old or incomp work with smem iff smem f/w == drv f/w. | ||
1497 | */ | ||
1498 | smem_flash_cmp = bfa_ioc_flash_fwver_cmp(ioc, smem_fwhdr); | ||
1499 | |||
1500 | if (smem_flash_cmp == BFI_IOC_IMG_VER_BETTER) { | ||
1501 | return BFA_FALSE; | ||
1502 | } else if (smem_flash_cmp == BFI_IOC_IMG_VER_SAME) { | ||
1503 | return BFA_TRUE; | ||
1504 | } else { | ||
1505 | return (drv_smem_cmp == BFI_IOC_IMG_VER_SAME) ? | ||
1506 | BFA_TRUE : BFA_FALSE; | ||
1507 | } | ||
1479 | } | 1508 | } |
1480 | 1509 | ||
1481 | /* | 1510 | /* |
@@ -1485,17 +1514,9 @@ bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc, struct bfi_ioc_image_hdr_s *fwhdr) | |||
1485 | static bfa_boolean_t | 1514 | static bfa_boolean_t |
1486 | bfa_ioc_fwver_valid(struct bfa_ioc_s *ioc, u32 boot_env) | 1515 | bfa_ioc_fwver_valid(struct bfa_ioc_s *ioc, u32 boot_env) |
1487 | { | 1516 | { |
1488 | struct bfi_ioc_image_hdr_s fwhdr, *drv_fwhdr; | 1517 | struct bfi_ioc_image_hdr_s fwhdr; |
1489 | 1518 | ||
1490 | bfa_ioc_fwver_get(ioc, &fwhdr); | 1519 | bfa_ioc_fwver_get(ioc, &fwhdr); |
1491 | drv_fwhdr = (struct bfi_ioc_image_hdr_s *) | ||
1492 | bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0); | ||
1493 | |||
1494 | if (fwhdr.signature != cpu_to_le32(drv_fwhdr->signature)) { | ||
1495 | bfa_trc(ioc, fwhdr.signature); | ||
1496 | bfa_trc(ioc, drv_fwhdr->signature); | ||
1497 | return BFA_FALSE; | ||
1498 | } | ||
1499 | 1520 | ||
1500 | if (swab32(fwhdr.bootenv) != boot_env) { | 1521 | if (swab32(fwhdr.bootenv) != boot_env) { |
1501 | bfa_trc(ioc, fwhdr.bootenv); | 1522 | bfa_trc(ioc, fwhdr.bootenv); |
@@ -1506,6 +1527,168 @@ bfa_ioc_fwver_valid(struct bfa_ioc_s *ioc, u32 boot_env) | |||
1506 | return bfa_ioc_fwver_cmp(ioc, &fwhdr); | 1527 | return bfa_ioc_fwver_cmp(ioc, &fwhdr); |
1507 | } | 1528 | } |
1508 | 1529 | ||
1530 | static bfa_boolean_t | ||
1531 | bfa_ioc_fwver_md5_check(struct bfi_ioc_image_hdr_s *fwhdr_1, | ||
1532 | struct bfi_ioc_image_hdr_s *fwhdr_2) | ||
1533 | { | ||
1534 | int i; | ||
1535 | |||
1536 | for (i = 0; i < BFI_IOC_MD5SUM_SZ; i++) | ||
1537 | if (fwhdr_1->md5sum[i] != fwhdr_2->md5sum[i]) | ||
1538 | return BFA_FALSE; | ||
1539 | |||
1540 | return BFA_TRUE; | ||
1541 | } | ||
1542 | |||
1543 | /* | ||
1544 | * Returns TRUE if major minor and maintainence are same. | ||
1545 | * If patch versions are same, check for MD5 Checksum to be same. | ||
1546 | */ | ||
1547 | static bfa_boolean_t | ||
1548 | bfa_ioc_fw_ver_compatible(struct bfi_ioc_image_hdr_s *drv_fwhdr, | ||
1549 | struct bfi_ioc_image_hdr_s *fwhdr_to_cmp) | ||
1550 | { | ||
1551 | if (drv_fwhdr->signature != fwhdr_to_cmp->signature) | ||
1552 | return BFA_FALSE; | ||
1553 | |||
1554 | if (drv_fwhdr->fwver.major != fwhdr_to_cmp->fwver.major) | ||
1555 | return BFA_FALSE; | ||
1556 | |||
1557 | if (drv_fwhdr->fwver.minor != fwhdr_to_cmp->fwver.minor) | ||
1558 | return BFA_FALSE; | ||
1559 | |||
1560 | if (drv_fwhdr->fwver.maint != fwhdr_to_cmp->fwver.maint) | ||
1561 | return BFA_FALSE; | ||
1562 | |||
1563 | if (drv_fwhdr->fwver.patch == fwhdr_to_cmp->fwver.patch && | ||
1564 | drv_fwhdr->fwver.phase == fwhdr_to_cmp->fwver.phase && | ||
1565 | drv_fwhdr->fwver.build == fwhdr_to_cmp->fwver.build) { | ||
1566 | return bfa_ioc_fwver_md5_check(drv_fwhdr, fwhdr_to_cmp); | ||
1567 | } | ||
1568 | |||
1569 | return BFA_TRUE; | ||
1570 | } | ||
1571 | |||
1572 | static bfa_boolean_t | ||
1573 | bfa_ioc_flash_fwver_valid(struct bfi_ioc_image_hdr_s *flash_fwhdr) | ||
1574 | { | ||
1575 | if (flash_fwhdr->fwver.major == 0 || flash_fwhdr->fwver.major == 0xFF) | ||
1576 | return BFA_FALSE; | ||
1577 | |||
1578 | return BFA_TRUE; | ||
1579 | } | ||
1580 | |||
1581 | static bfa_boolean_t fwhdr_is_ga(struct bfi_ioc_image_hdr_s *fwhdr) | ||
1582 | { | ||
1583 | if (fwhdr->fwver.phase == 0 && | ||
1584 | fwhdr->fwver.build == 0) | ||
1585 | return BFA_TRUE; | ||
1586 | |||
1587 | return BFA_FALSE; | ||
1588 | } | ||
1589 | |||
1590 | /* | ||
1591 | * Returns TRUE if both are compatible and patch of fwhdr_to_cmp is better. | ||
1592 | */ | ||
1593 | static enum bfi_ioc_img_ver_cmp_e | ||
1594 | bfa_ioc_fw_ver_patch_cmp(struct bfi_ioc_image_hdr_s *base_fwhdr, | ||
1595 | struct bfi_ioc_image_hdr_s *fwhdr_to_cmp) | ||
1596 | { | ||
1597 | if (bfa_ioc_fw_ver_compatible(base_fwhdr, fwhdr_to_cmp) == BFA_FALSE) | ||
1598 | return BFI_IOC_IMG_VER_INCOMP; | ||
1599 | |||
1600 | if (fwhdr_to_cmp->fwver.patch > base_fwhdr->fwver.patch) | ||
1601 | return BFI_IOC_IMG_VER_BETTER; | ||
1602 | |||
1603 | else if (fwhdr_to_cmp->fwver.patch < base_fwhdr->fwver.patch) | ||
1604 | return BFI_IOC_IMG_VER_OLD; | ||
1605 | |||
1606 | /* | ||
1607 | * GA takes priority over internal builds of the same patch stream. | ||
1608 | * At this point major minor maint and patch numbers are same. | ||
1609 | */ | ||
1610 | |||
1611 | if (fwhdr_is_ga(base_fwhdr) == BFA_TRUE) { | ||
1612 | if (fwhdr_is_ga(fwhdr_to_cmp)) | ||
1613 | return BFI_IOC_IMG_VER_SAME; | ||
1614 | else | ||
1615 | return BFI_IOC_IMG_VER_OLD; | ||
1616 | } else { | ||
1617 | if (fwhdr_is_ga(fwhdr_to_cmp)) | ||
1618 | return BFI_IOC_IMG_VER_BETTER; | ||
1619 | } | ||
1620 | |||
1621 | if (fwhdr_to_cmp->fwver.phase > base_fwhdr->fwver.phase) | ||
1622 | return BFI_IOC_IMG_VER_BETTER; | ||
1623 | else if (fwhdr_to_cmp->fwver.phase < base_fwhdr->fwver.phase) | ||
1624 | return BFI_IOC_IMG_VER_OLD; | ||
1625 | |||
1626 | if (fwhdr_to_cmp->fwver.build > base_fwhdr->fwver.build) | ||
1627 | return BFI_IOC_IMG_VER_BETTER; | ||
1628 | else if (fwhdr_to_cmp->fwver.build < base_fwhdr->fwver.build) | ||
1629 | return BFI_IOC_IMG_VER_OLD; | ||
1630 | |||
1631 | /* | ||
1632 | * All Version Numbers are equal. | ||
1633 | * Md5 check to be done as a part of compatibility check. | ||
1634 | */ | ||
1635 | return BFI_IOC_IMG_VER_SAME; | ||
1636 | } | ||
1637 | |||
1638 | #define BFA_FLASH_PART_FWIMG_ADDR 0x100000 /* fw image address */ | ||
1639 | |||
1640 | bfa_status_t | ||
1641 | bfa_ioc_flash_img_get_chnk(struct bfa_ioc_s *ioc, u32 off, | ||
1642 | u32 *fwimg) | ||
1643 | { | ||
1644 | return bfa_flash_raw_read(ioc->pcidev.pci_bar_kva, | ||
1645 | BFA_FLASH_PART_FWIMG_ADDR + (off * sizeof(u32)), | ||
1646 | (char *)fwimg, BFI_FLASH_CHUNK_SZ); | ||
1647 | } | ||
1648 | |||
1649 | static enum bfi_ioc_img_ver_cmp_e | ||
1650 | bfa_ioc_flash_fwver_cmp(struct bfa_ioc_s *ioc, | ||
1651 | struct bfi_ioc_image_hdr_s *base_fwhdr) | ||
1652 | { | ||
1653 | struct bfi_ioc_image_hdr_s *flash_fwhdr; | ||
1654 | bfa_status_t status; | ||
1655 | u32 fwimg[BFI_FLASH_CHUNK_SZ_WORDS]; | ||
1656 | |||
1657 | status = bfa_ioc_flash_img_get_chnk(ioc, 0, fwimg); | ||
1658 | if (status != BFA_STATUS_OK) | ||
1659 | return BFI_IOC_IMG_VER_INCOMP; | ||
1660 | |||
1661 | flash_fwhdr = (struct bfi_ioc_image_hdr_s *) fwimg; | ||
1662 | if (bfa_ioc_flash_fwver_valid(flash_fwhdr) == BFA_TRUE) | ||
1663 | return bfa_ioc_fw_ver_patch_cmp(base_fwhdr, flash_fwhdr); | ||
1664 | else | ||
1665 | return BFI_IOC_IMG_VER_INCOMP; | ||
1666 | } | ||
1667 | |||
1668 | |||
1669 | /* | ||
1670 | * Invalidate fwver signature | ||
1671 | */ | ||
1672 | bfa_status_t | ||
1673 | bfa_ioc_fwsig_invalidate(struct bfa_ioc_s *ioc) | ||
1674 | { | ||
1675 | |||
1676 | u32 pgnum, pgoff; | ||
1677 | u32 loff = 0; | ||
1678 | enum bfi_ioc_state ioc_fwstate; | ||
1679 | |||
1680 | ioc_fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc); | ||
1681 | if (!bfa_ioc_state_disabled(ioc_fwstate)) | ||
1682 | return BFA_STATUS_ADAPTER_ENABLED; | ||
1683 | |||
1684 | pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff); | ||
1685 | pgoff = PSS_SMEM_PGOFF(loff); | ||
1686 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); | ||
1687 | bfa_mem_write(ioc->ioc_regs.smem_page_start, loff, BFA_IOC_FW_INV_SIGN); | ||
1688 | |||
1689 | return BFA_STATUS_OK; | ||
1690 | } | ||
1691 | |||
1509 | /* | 1692 | /* |
1510 | * Conditionally flush any pending message from firmware at start. | 1693 | * Conditionally flush any pending message from firmware at start. |
1511 | */ | 1694 | */ |
@@ -1544,8 +1727,8 @@ bfa_ioc_hwinit(struct bfa_ioc_s *ioc, bfa_boolean_t force) | |||
1544 | BFA_FALSE : bfa_ioc_fwver_valid(ioc, boot_env); | 1727 | BFA_FALSE : bfa_ioc_fwver_valid(ioc, boot_env); |
1545 | 1728 | ||
1546 | if (!fwvalid) { | 1729 | if (!fwvalid) { |
1547 | bfa_ioc_boot(ioc, boot_type, boot_env); | 1730 | if (bfa_ioc_boot(ioc, boot_type, boot_env) == BFA_STATUS_OK) |
1548 | bfa_ioc_poll_fwinit(ioc); | 1731 | bfa_ioc_poll_fwinit(ioc); |
1549 | return; | 1732 | return; |
1550 | } | 1733 | } |
1551 | 1734 | ||
@@ -1580,8 +1763,8 @@ bfa_ioc_hwinit(struct bfa_ioc_s *ioc, bfa_boolean_t force) | |||
1580 | /* | 1763 | /* |
1581 | * Initialize the h/w for any other states. | 1764 | * Initialize the h/w for any other states. |
1582 | */ | 1765 | */ |
1583 | bfa_ioc_boot(ioc, boot_type, boot_env); | 1766 | if (bfa_ioc_boot(ioc, boot_type, boot_env) == BFA_STATUS_OK) |
1584 | bfa_ioc_poll_fwinit(ioc); | 1767 | bfa_ioc_poll_fwinit(ioc); |
1585 | } | 1768 | } |
1586 | 1769 | ||
1587 | static void | 1770 | static void |
@@ -1684,7 +1867,7 @@ bfa_ioc_hb_monitor(struct bfa_ioc_s *ioc) | |||
1684 | /* | 1867 | /* |
1685 | * Initiate a full firmware download. | 1868 | * Initiate a full firmware download. |
1686 | */ | 1869 | */ |
1687 | static void | 1870 | static bfa_status_t |
1688 | bfa_ioc_download_fw(struct bfa_ioc_s *ioc, u32 boot_type, | 1871 | bfa_ioc_download_fw(struct bfa_ioc_s *ioc, u32 boot_type, |
1689 | u32 boot_env) | 1872 | u32 boot_env) |
1690 | { | 1873 | { |
@@ -1694,28 +1877,60 @@ bfa_ioc_download_fw(struct bfa_ioc_s *ioc, u32 boot_type, | |||
1694 | u32 chunkno = 0; | 1877 | u32 chunkno = 0; |
1695 | u32 i; | 1878 | u32 i; |
1696 | u32 asicmode; | 1879 | u32 asicmode; |
1880 | u32 fwimg_size; | ||
1881 | u32 fwimg_buf[BFI_FLASH_CHUNK_SZ_WORDS]; | ||
1882 | bfa_status_t status; | ||
1883 | |||
1884 | if (boot_env == BFI_FWBOOT_ENV_OS && | ||
1885 | boot_type == BFI_FWBOOT_TYPE_FLASH) { | ||
1886 | fwimg_size = BFI_FLASH_IMAGE_SZ/sizeof(u32); | ||
1887 | |||
1888 | status = bfa_ioc_flash_img_get_chnk(ioc, | ||
1889 | BFA_IOC_FLASH_CHUNK_ADDR(chunkno), fwimg_buf); | ||
1890 | if (status != BFA_STATUS_OK) | ||
1891 | return status; | ||
1892 | |||
1893 | fwimg = fwimg_buf; | ||
1894 | } else { | ||
1895 | fwimg_size = bfa_cb_image_get_size(bfa_ioc_asic_gen(ioc)); | ||
1896 | fwimg = bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), | ||
1897 | BFA_IOC_FLASH_CHUNK_ADDR(chunkno)); | ||
1898 | } | ||
1899 | |||
1900 | bfa_trc(ioc, fwimg_size); | ||
1697 | 1901 | ||
1698 | bfa_trc(ioc, bfa_cb_image_get_size(bfa_ioc_asic_gen(ioc))); | ||
1699 | fwimg = bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), chunkno); | ||
1700 | 1902 | ||
1701 | pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff); | 1903 | pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff); |
1702 | pgoff = PSS_SMEM_PGOFF(loff); | 1904 | pgoff = PSS_SMEM_PGOFF(loff); |
1703 | 1905 | ||
1704 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); | 1906 | writel(pgnum, ioc->ioc_regs.host_page_num_fn); |
1705 | 1907 | ||
1706 | for (i = 0; i < bfa_cb_image_get_size(bfa_ioc_asic_gen(ioc)); i++) { | 1908 | for (i = 0; i < fwimg_size; i++) { |
1707 | 1909 | ||
1708 | if (BFA_IOC_FLASH_CHUNK_NO(i) != chunkno) { | 1910 | if (BFA_IOC_FLASH_CHUNK_NO(i) != chunkno) { |
1709 | chunkno = BFA_IOC_FLASH_CHUNK_NO(i); | 1911 | chunkno = BFA_IOC_FLASH_CHUNK_NO(i); |
1710 | fwimg = bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), | 1912 | |
1913 | if (boot_env == BFI_FWBOOT_ENV_OS && | ||
1914 | boot_type == BFI_FWBOOT_TYPE_FLASH) { | ||
1915 | status = bfa_ioc_flash_img_get_chnk(ioc, | ||
1916 | BFA_IOC_FLASH_CHUNK_ADDR(chunkno), | ||
1917 | fwimg_buf); | ||
1918 | if (status != BFA_STATUS_OK) | ||
1919 | return status; | ||
1920 | |||
1921 | fwimg = fwimg_buf; | ||
1922 | } else { | ||
1923 | fwimg = bfa_cb_image_get_chunk( | ||
1924 | bfa_ioc_asic_gen(ioc), | ||
1711 | BFA_IOC_FLASH_CHUNK_ADDR(chunkno)); | 1925 | BFA_IOC_FLASH_CHUNK_ADDR(chunkno)); |
1926 | } | ||
1712 | } | 1927 | } |
1713 | 1928 | ||
1714 | /* | 1929 | /* |
1715 | * write smem | 1930 | * write smem |
1716 | */ | 1931 | */ |
1717 | bfa_mem_write(ioc->ioc_regs.smem_page_start, loff, | 1932 | bfa_mem_write(ioc->ioc_regs.smem_page_start, loff, |
1718 | cpu_to_le32(fwimg[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i)])); | 1933 | fwimg[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i)]); |
1719 | 1934 | ||
1720 | loff += sizeof(u32); | 1935 | loff += sizeof(u32); |
1721 | 1936 | ||
@@ -1733,8 +1948,12 @@ bfa_ioc_download_fw(struct bfa_ioc_s *ioc, u32 boot_type, | |||
1733 | ioc->ioc_regs.host_page_num_fn); | 1948 | ioc->ioc_regs.host_page_num_fn); |
1734 | 1949 | ||
1735 | /* | 1950 | /* |
1736 | * Set boot type and device mode at the end. | 1951 | * Set boot type, env and device mode at the end. |
1737 | */ | 1952 | */ |
1953 | if (boot_env == BFI_FWBOOT_ENV_OS && | ||
1954 | boot_type == BFI_FWBOOT_TYPE_FLASH) { | ||
1955 | boot_type = BFI_FWBOOT_TYPE_NORMAL; | ||
1956 | } | ||
1738 | asicmode = BFI_FWBOOT_DEVMODE(ioc->asic_gen, ioc->asic_mode, | 1957 | asicmode = BFI_FWBOOT_DEVMODE(ioc->asic_gen, ioc->asic_mode, |
1739 | ioc->port0_mode, ioc->port1_mode); | 1958 | ioc->port0_mode, ioc->port1_mode); |
1740 | bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_DEVMODE_OFF, | 1959 | bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_DEVMODE_OFF, |
@@ -1743,6 +1962,7 @@ bfa_ioc_download_fw(struct bfa_ioc_s *ioc, u32 boot_type, | |||
1743 | swab32(boot_type)); | 1962 | swab32(boot_type)); |
1744 | bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_ENV_OFF, | 1963 | bfa_mem_write(ioc->ioc_regs.smem_page_start, BFI_FWBOOT_ENV_OFF, |
1745 | swab32(boot_env)); | 1964 | swab32(boot_env)); |
1965 | return BFA_STATUS_OK; | ||
1746 | } | 1966 | } |
1747 | 1967 | ||
1748 | 1968 | ||
@@ -2002,13 +2222,30 @@ bfa_ioc_pll_init(struct bfa_ioc_s *ioc) | |||
2002 | * Interface used by diag module to do firmware boot with memory test | 2222 | * Interface used by diag module to do firmware boot with memory test |
2003 | * as the entry vector. | 2223 | * as the entry vector. |
2004 | */ | 2224 | */ |
2005 | void | 2225 | bfa_status_t |
2006 | bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, u32 boot_env) | 2226 | bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, u32 boot_env) |
2007 | { | 2227 | { |
2228 | struct bfi_ioc_image_hdr_s *drv_fwhdr; | ||
2229 | bfa_status_t status; | ||
2008 | bfa_ioc_stats(ioc, ioc_boots); | 2230 | bfa_ioc_stats(ioc, ioc_boots); |
2009 | 2231 | ||
2010 | if (bfa_ioc_pll_init(ioc) != BFA_STATUS_OK) | 2232 | if (bfa_ioc_pll_init(ioc) != BFA_STATUS_OK) |
2011 | return; | 2233 | return BFA_STATUS_FAILED; |
2234 | |||
2235 | if (boot_env == BFI_FWBOOT_ENV_OS && | ||
2236 | boot_type == BFI_FWBOOT_TYPE_NORMAL) { | ||
2237 | |||
2238 | drv_fwhdr = (struct bfi_ioc_image_hdr_s *) | ||
2239 | bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0); | ||
2240 | |||
2241 | /* | ||
2242 | * Work with Flash iff flash f/w is better than driver f/w. | ||
2243 | * Otherwise push drivers firmware. | ||
2244 | */ | ||
2245 | if (bfa_ioc_flash_fwver_cmp(ioc, drv_fwhdr) == | ||
2246 | BFI_IOC_IMG_VER_BETTER) | ||
2247 | boot_type = BFI_FWBOOT_TYPE_FLASH; | ||
2248 | } | ||
2012 | 2249 | ||
2013 | /* | 2250 | /* |
2014 | * Initialize IOC state of all functions on a chip reset. | 2251 | * Initialize IOC state of all functions on a chip reset. |
@@ -2022,8 +2259,14 @@ bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, u32 boot_env) | |||
2022 | } | 2259 | } |
2023 | 2260 | ||
2024 | bfa_ioc_msgflush(ioc); | 2261 | bfa_ioc_msgflush(ioc); |
2025 | bfa_ioc_download_fw(ioc, boot_type, boot_env); | 2262 | status = bfa_ioc_download_fw(ioc, boot_type, boot_env); |
2026 | bfa_ioc_lpu_start(ioc); | 2263 | if (status == BFA_STATUS_OK) |
2264 | bfa_ioc_lpu_start(ioc); | ||
2265 | else { | ||
2266 | WARN_ON(boot_type == BFI_FWBOOT_TYPE_MEMTEST); | ||
2267 | bfa_iocpf_timeout(ioc); | ||
2268 | } | ||
2269 | return status; | ||
2027 | } | 2270 | } |
2028 | 2271 | ||
2029 | /* | 2272 | /* |
@@ -2419,14 +2662,6 @@ bfa_ioc_fw_mismatch(struct bfa_ioc_s *ioc) | |||
2419 | bfa_fsm_cmp_state(&ioc->iocpf, bfa_iocpf_sm_mismatch); | 2662 | bfa_fsm_cmp_state(&ioc->iocpf, bfa_iocpf_sm_mismatch); |
2420 | } | 2663 | } |
2421 | 2664 | ||
2422 | #define bfa_ioc_state_disabled(__sm) \ | ||
2423 | (((__sm) == BFI_IOC_UNINIT) || \ | ||
2424 | ((__sm) == BFI_IOC_INITING) || \ | ||
2425 | ((__sm) == BFI_IOC_HWINIT) || \ | ||
2426 | ((__sm) == BFI_IOC_DISABLED) || \ | ||
2427 | ((__sm) == BFI_IOC_FAIL) || \ | ||
2428 | ((__sm) == BFI_IOC_CFG_DISABLED)) | ||
2429 | |||
2430 | /* | 2665 | /* |
2431 | * Check if adapter is disabled -- both IOCs should be in a disabled | 2666 | * Check if adapter is disabled -- both IOCs should be in a disabled |
2432 | * state. | 2667 | * state. |
@@ -6423,3 +6658,407 @@ bfa_fru_intr(void *fruarg, struct bfi_mbmsg_s *msg) | |||
6423 | WARN_ON(1); | 6658 | WARN_ON(1); |
6424 | } | 6659 | } |
6425 | } | 6660 | } |
6661 | |||
6662 | /* | ||
6663 | * register definitions | ||
6664 | */ | ||
6665 | #define FLI_CMD_REG 0x0001d000 | ||
6666 | #define FLI_RDDATA_REG 0x0001d010 | ||
6667 | #define FLI_ADDR_REG 0x0001d004 | ||
6668 | #define FLI_DEV_STATUS_REG 0x0001d014 | ||
6669 | |||
6670 | #define BFA_FLASH_FIFO_SIZE 128 /* fifo size */ | ||
6671 | #define BFA_FLASH_CHECK_MAX 10000 /* max # of status check */ | ||
6672 | #define BFA_FLASH_BLOCKING_OP_MAX 1000000 /* max # of blocking op check */ | ||
6673 | #define BFA_FLASH_WIP_MASK 0x01 /* write in progress bit mask */ | ||
6674 | |||
6675 | enum bfa_flash_cmd { | ||
6676 | BFA_FLASH_FAST_READ = 0x0b, /* fast read */ | ||
6677 | BFA_FLASH_READ_STATUS = 0x05, /* read status */ | ||
6678 | }; | ||
6679 | |||
6680 | /** | ||
6681 | * @brief hardware error definition | ||
6682 | */ | ||
6683 | enum bfa_flash_err { | ||
6684 | BFA_FLASH_NOT_PRESENT = -1, /*!< flash not present */ | ||
6685 | BFA_FLASH_UNINIT = -2, /*!< flash not initialized */ | ||
6686 | BFA_FLASH_BAD = -3, /*!< flash bad */ | ||
6687 | BFA_FLASH_BUSY = -4, /*!< flash busy */ | ||
6688 | BFA_FLASH_ERR_CMD_ACT = -5, /*!< command active never cleared */ | ||
6689 | BFA_FLASH_ERR_FIFO_CNT = -6, /*!< fifo count never cleared */ | ||
6690 | BFA_FLASH_ERR_WIP = -7, /*!< write-in-progress never cleared */ | ||
6691 | BFA_FLASH_ERR_TIMEOUT = -8, /*!< fli timeout */ | ||
6692 | BFA_FLASH_ERR_LEN = -9, /*!< invalid length */ | ||
6693 | }; | ||
6694 | |||
6695 | /** | ||
6696 | * @brief flash command register data structure | ||
6697 | */ | ||
6698 | union bfa_flash_cmd_reg_u { | ||
6699 | struct { | ||
6700 | #ifdef __BIG_ENDIAN | ||
6701 | u32 act:1; | ||
6702 | u32 rsv:1; | ||
6703 | u32 write_cnt:9; | ||
6704 | u32 read_cnt:9; | ||
6705 | u32 addr_cnt:4; | ||
6706 | u32 cmd:8; | ||
6707 | #else | ||
6708 | u32 cmd:8; | ||
6709 | u32 addr_cnt:4; | ||
6710 | u32 read_cnt:9; | ||
6711 | u32 write_cnt:9; | ||
6712 | u32 rsv:1; | ||
6713 | u32 act:1; | ||
6714 | #endif | ||
6715 | } r; | ||
6716 | u32 i; | ||
6717 | }; | ||
6718 | |||
6719 | /** | ||
6720 | * @brief flash device status register data structure | ||
6721 | */ | ||
6722 | union bfa_flash_dev_status_reg_u { | ||
6723 | struct { | ||
6724 | #ifdef __BIG_ENDIAN | ||
6725 | u32 rsv:21; | ||
6726 | u32 fifo_cnt:6; | ||
6727 | u32 busy:1; | ||
6728 | u32 init_status:1; | ||
6729 | u32 present:1; | ||
6730 | u32 bad:1; | ||
6731 | u32 good:1; | ||
6732 | #else | ||
6733 | u32 good:1; | ||
6734 | u32 bad:1; | ||
6735 | u32 present:1; | ||
6736 | u32 init_status:1; | ||
6737 | u32 busy:1; | ||
6738 | u32 fifo_cnt:6; | ||
6739 | u32 rsv:21; | ||
6740 | #endif | ||
6741 | } r; | ||
6742 | u32 i; | ||
6743 | }; | ||
6744 | |||
6745 | /** | ||
6746 | * @brief flash address register data structure | ||
6747 | */ | ||
6748 | union bfa_flash_addr_reg_u { | ||
6749 | struct { | ||
6750 | #ifdef __BIG_ENDIAN | ||
6751 | u32 addr:24; | ||
6752 | u32 dummy:8; | ||
6753 | #else | ||
6754 | u32 dummy:8; | ||
6755 | u32 addr:24; | ||
6756 | #endif | ||
6757 | } r; | ||
6758 | u32 i; | ||
6759 | }; | ||
6760 | |||
6761 | /** | ||
6762 | * dg flash_raw_private Flash raw private functions | ||
6763 | */ | ||
6764 | static void | ||
6765 | bfa_flash_set_cmd(void __iomem *pci_bar, u8 wr_cnt, | ||
6766 | u8 rd_cnt, u8 ad_cnt, u8 op) | ||
6767 | { | ||
6768 | union bfa_flash_cmd_reg_u cmd; | ||
6769 | |||
6770 | cmd.i = 0; | ||
6771 | cmd.r.act = 1; | ||
6772 | cmd.r.write_cnt = wr_cnt; | ||
6773 | cmd.r.read_cnt = rd_cnt; | ||
6774 | cmd.r.addr_cnt = ad_cnt; | ||
6775 | cmd.r.cmd = op; | ||
6776 | writel(cmd.i, (pci_bar + FLI_CMD_REG)); | ||
6777 | } | ||
6778 | |||
6779 | static void | ||
6780 | bfa_flash_set_addr(void __iomem *pci_bar, u32 address) | ||
6781 | { | ||
6782 | union bfa_flash_addr_reg_u addr; | ||
6783 | |||
6784 | addr.r.addr = address & 0x00ffffff; | ||
6785 | addr.r.dummy = 0; | ||
6786 | writel(addr.i, (pci_bar + FLI_ADDR_REG)); | ||
6787 | } | ||
6788 | |||
6789 | static int | ||
6790 | bfa_flash_cmd_act_check(void __iomem *pci_bar) | ||
6791 | { | ||
6792 | union bfa_flash_cmd_reg_u cmd; | ||
6793 | |||
6794 | cmd.i = readl(pci_bar + FLI_CMD_REG); | ||
6795 | |||
6796 | if (cmd.r.act) | ||
6797 | return BFA_FLASH_ERR_CMD_ACT; | ||
6798 | |||
6799 | return 0; | ||
6800 | } | ||
6801 | |||
6802 | /** | ||
6803 | * @brief | ||
6804 | * Flush FLI data fifo. | ||
6805 | * | ||
6806 | * @param[in] pci_bar - pci bar address | ||
6807 | * @param[in] dev_status - device status | ||
6808 | * | ||
6809 | * Return 0 on success, negative error number on error. | ||
6810 | */ | ||
6811 | static u32 | ||
6812 | bfa_flash_fifo_flush(void __iomem *pci_bar) | ||
6813 | { | ||
6814 | u32 i; | ||
6815 | u32 t; | ||
6816 | union bfa_flash_dev_status_reg_u dev_status; | ||
6817 | |||
6818 | dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG); | ||
6819 | |||
6820 | if (!dev_status.r.fifo_cnt) | ||
6821 | return 0; | ||
6822 | |||
6823 | /* fifo counter in terms of words */ | ||
6824 | for (i = 0; i < dev_status.r.fifo_cnt; i++) | ||
6825 | t = readl(pci_bar + FLI_RDDATA_REG); | ||
6826 | |||
6827 | /* | ||
6828 | * Check the device status. It may take some time. | ||
6829 | */ | ||
6830 | for (i = 0; i < BFA_FLASH_CHECK_MAX; i++) { | ||
6831 | dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG); | ||
6832 | if (!dev_status.r.fifo_cnt) | ||
6833 | break; | ||
6834 | } | ||
6835 | |||
6836 | if (dev_status.r.fifo_cnt) | ||
6837 | return BFA_FLASH_ERR_FIFO_CNT; | ||
6838 | |||
6839 | return 0; | ||
6840 | } | ||
6841 | |||
6842 | /** | ||
6843 | * @brief | ||
6844 | * Read flash status. | ||
6845 | * | ||
6846 | * @param[in] pci_bar - pci bar address | ||
6847 | * | ||
6848 | * Return 0 on success, negative error number on error. | ||
6849 | */ | ||
6850 | static u32 | ||
6851 | bfa_flash_status_read(void __iomem *pci_bar) | ||
6852 | { | ||
6853 | union bfa_flash_dev_status_reg_u dev_status; | ||
6854 | u32 status; | ||
6855 | u32 ret_status; | ||
6856 | int i; | ||
6857 | |||
6858 | status = bfa_flash_fifo_flush(pci_bar); | ||
6859 | if (status < 0) | ||
6860 | return status; | ||
6861 | |||
6862 | bfa_flash_set_cmd(pci_bar, 0, 4, 0, BFA_FLASH_READ_STATUS); | ||
6863 | |||
6864 | for (i = 0; i < BFA_FLASH_CHECK_MAX; i++) { | ||
6865 | status = bfa_flash_cmd_act_check(pci_bar); | ||
6866 | if (!status) | ||
6867 | break; | ||
6868 | } | ||
6869 | |||
6870 | if (status) | ||
6871 | return status; | ||
6872 | |||
6873 | dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG); | ||
6874 | if (!dev_status.r.fifo_cnt) | ||
6875 | return BFA_FLASH_BUSY; | ||
6876 | |||
6877 | ret_status = readl(pci_bar + FLI_RDDATA_REG); | ||
6878 | ret_status >>= 24; | ||
6879 | |||
6880 | status = bfa_flash_fifo_flush(pci_bar); | ||
6881 | if (status < 0) | ||
6882 | return status; | ||
6883 | |||
6884 | return ret_status; | ||
6885 | } | ||
6886 | |||
6887 | /** | ||
6888 | * @brief | ||
6889 | * Start flash read operation. | ||
6890 | * | ||
6891 | * @param[in] pci_bar - pci bar address | ||
6892 | * @param[in] offset - flash address offset | ||
6893 | * @param[in] len - read data length | ||
6894 | * @param[in] buf - read data buffer | ||
6895 | * | ||
6896 | * Return 0 on success, negative error number on error. | ||
6897 | */ | ||
6898 | static u32 | ||
6899 | bfa_flash_read_start(void __iomem *pci_bar, u32 offset, u32 len, | ||
6900 | char *buf) | ||
6901 | { | ||
6902 | u32 status; | ||
6903 | |||
6904 | /* | ||
6905 | * len must be mutiple of 4 and not exceeding fifo size | ||
6906 | */ | ||
6907 | if (len == 0 || len > BFA_FLASH_FIFO_SIZE || (len & 0x03) != 0) | ||
6908 | return BFA_FLASH_ERR_LEN; | ||
6909 | |||
6910 | /* | ||
6911 | * check status | ||
6912 | */ | ||
6913 | status = bfa_flash_status_read(pci_bar); | ||
6914 | if (status == BFA_FLASH_BUSY) | ||
6915 | status = bfa_flash_status_read(pci_bar); | ||
6916 | |||
6917 | if (status < 0) | ||
6918 | return status; | ||
6919 | |||
6920 | /* | ||
6921 | * check if write-in-progress bit is cleared | ||
6922 | */ | ||
6923 | if (status & BFA_FLASH_WIP_MASK) | ||
6924 | return BFA_FLASH_ERR_WIP; | ||
6925 | |||
6926 | bfa_flash_set_addr(pci_bar, offset); | ||
6927 | |||
6928 | bfa_flash_set_cmd(pci_bar, 0, (u8)len, 4, BFA_FLASH_FAST_READ); | ||
6929 | |||
6930 | return 0; | ||
6931 | } | ||
6932 | |||
6933 | /** | ||
6934 | * @brief | ||
6935 | * Check flash read operation. | ||
6936 | * | ||
6937 | * @param[in] pci_bar - pci bar address | ||
6938 | * | ||
6939 | * Return flash device status, 1 if busy, 0 if not. | ||
6940 | */ | ||
6941 | static u32 | ||
6942 | bfa_flash_read_check(void __iomem *pci_bar) | ||
6943 | { | ||
6944 | if (bfa_flash_cmd_act_check(pci_bar)) | ||
6945 | return 1; | ||
6946 | |||
6947 | return 0; | ||
6948 | } | ||
6949 | /** | ||
6950 | * @brief | ||
6951 | * End flash read operation. | ||
6952 | * | ||
6953 | * @param[in] pci_bar - pci bar address | ||
6954 | * @param[in] len - read data length | ||
6955 | * @param[in] buf - read data buffer | ||
6956 | * | ||
6957 | */ | ||
6958 | static void | ||
6959 | bfa_flash_read_end(void __iomem *pci_bar, u32 len, char *buf) | ||
6960 | { | ||
6961 | |||
6962 | u32 i; | ||
6963 | |||
6964 | /* | ||
6965 | * read data fifo up to 32 words | ||
6966 | */ | ||
6967 | for (i = 0; i < len; i += 4) { | ||
6968 | u32 w = readl(pci_bar + FLI_RDDATA_REG); | ||
6969 | *((u32 *) (buf + i)) = swab32(w); | ||
6970 | } | ||
6971 | |||
6972 | bfa_flash_fifo_flush(pci_bar); | ||
6973 | } | ||
6974 | |||
6975 | /** | ||
6976 | * @brief | ||
6977 | * Perform flash raw read. | ||
6978 | * | ||
6979 | * @param[in] pci_bar - pci bar address | ||
6980 | * @param[in] offset - flash partition address offset | ||
6981 | * @param[in] buf - read data buffer | ||
6982 | * @param[in] len - read data length | ||
6983 | * | ||
6984 | * Return status. | ||
6985 | */ | ||
6986 | |||
6987 | |||
6988 | #define FLASH_BLOCKING_OP_MAX 500 | ||
6989 | #define FLASH_SEM_LOCK_REG 0x18820 | ||
6990 | |||
6991 | static int | ||
6992 | bfa_raw_sem_get(void __iomem *bar) | ||
6993 | { | ||
6994 | int locked; | ||
6995 | |||
6996 | locked = readl((bar + FLASH_SEM_LOCK_REG)); | ||
6997 | return !locked; | ||
6998 | |||
6999 | } | ||
7000 | |||
7001 | bfa_status_t | ||
7002 | bfa_flash_sem_get(void __iomem *bar) | ||
7003 | { | ||
7004 | u32 n = FLASH_BLOCKING_OP_MAX; | ||
7005 | |||
7006 | while (!bfa_raw_sem_get(bar)) { | ||
7007 | if (--n <= 0) | ||
7008 | return BFA_STATUS_BADFLASH; | ||
7009 | udelay(10000); | ||
7010 | } | ||
7011 | return BFA_STATUS_OK; | ||
7012 | } | ||
7013 | |||
7014 | void | ||
7015 | bfa_flash_sem_put(void __iomem *bar) | ||
7016 | { | ||
7017 | writel(0, (bar + FLASH_SEM_LOCK_REG)); | ||
7018 | } | ||
7019 | |||
7020 | bfa_status_t | ||
7021 | bfa_flash_raw_read(void __iomem *pci_bar, u32 offset, char *buf, | ||
7022 | u32 len) | ||
7023 | { | ||
7024 | u32 n, status; | ||
7025 | u32 off, l, s, residue, fifo_sz; | ||
7026 | |||
7027 | residue = len; | ||
7028 | off = 0; | ||
7029 | fifo_sz = BFA_FLASH_FIFO_SIZE; | ||
7030 | status = bfa_flash_sem_get(pci_bar); | ||
7031 | if (status != BFA_STATUS_OK) | ||
7032 | return status; | ||
7033 | |||
7034 | while (residue) { | ||
7035 | s = offset + off; | ||
7036 | n = s / fifo_sz; | ||
7037 | l = (n + 1) * fifo_sz - s; | ||
7038 | if (l > residue) | ||
7039 | l = residue; | ||
7040 | |||
7041 | status = bfa_flash_read_start(pci_bar, offset + off, l, | ||
7042 | &buf[off]); | ||
7043 | if (status < 0) { | ||
7044 | bfa_flash_sem_put(pci_bar); | ||
7045 | return BFA_STATUS_FAILED; | ||
7046 | } | ||
7047 | |||
7048 | n = BFA_FLASH_BLOCKING_OP_MAX; | ||
7049 | while (bfa_flash_read_check(pci_bar)) { | ||
7050 | if (--n <= 0) { | ||
7051 | bfa_flash_sem_put(pci_bar); | ||
7052 | return BFA_STATUS_FAILED; | ||
7053 | } | ||
7054 | } | ||
7055 | |||
7056 | bfa_flash_read_end(pci_bar, l, &buf[off]); | ||
7057 | |||
7058 | residue -= l; | ||
7059 | off += l; | ||
7060 | } | ||
7061 | bfa_flash_sem_put(pci_bar); | ||
7062 | |||
7063 | return BFA_STATUS_OK; | ||
7064 | } | ||
diff --git a/drivers/scsi/bfa/bfa_ioc.h b/drivers/scsi/bfa/bfa_ioc.h index 90814fe85ac1..2e28392c2fb6 100644 --- a/drivers/scsi/bfa/bfa_ioc.h +++ b/drivers/scsi/bfa/bfa_ioc.h | |||
@@ -515,6 +515,8 @@ void bfa_flash_attach(struct bfa_flash_s *flash, struct bfa_ioc_s *ioc, | |||
515 | void *dev, struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg); | 515 | void *dev, struct bfa_trc_mod_s *trcmod, bfa_boolean_t mincfg); |
516 | void bfa_flash_memclaim(struct bfa_flash_s *flash, | 516 | void bfa_flash_memclaim(struct bfa_flash_s *flash, |
517 | u8 *dm_kva, u64 dm_pa, bfa_boolean_t mincfg); | 517 | u8 *dm_kva, u64 dm_pa, bfa_boolean_t mincfg); |
518 | bfa_status_t bfa_flash_raw_read(void __iomem *pci_bar_kva, | ||
519 | u32 offset, char *buf, u32 len); | ||
518 | 520 | ||
519 | /* | 521 | /* |
520 | * DIAG module specific | 522 | * DIAG module specific |
@@ -888,7 +890,7 @@ void bfa_ioc_enable(struct bfa_ioc_s *ioc); | |||
888 | void bfa_ioc_disable(struct bfa_ioc_s *ioc); | 890 | void bfa_ioc_disable(struct bfa_ioc_s *ioc); |
889 | bfa_boolean_t bfa_ioc_intx_claim(struct bfa_ioc_s *ioc); | 891 | bfa_boolean_t bfa_ioc_intx_claim(struct bfa_ioc_s *ioc); |
890 | 892 | ||
891 | void bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, | 893 | bfa_status_t bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type, |
892 | u32 boot_env); | 894 | u32 boot_env); |
893 | void bfa_ioc_isr(struct bfa_ioc_s *ioc, struct bfi_mbmsg_s *msg); | 895 | void bfa_ioc_isr(struct bfa_ioc_s *ioc, struct bfi_mbmsg_s *msg); |
894 | void bfa_ioc_error_isr(struct bfa_ioc_s *ioc); | 896 | void bfa_ioc_error_isr(struct bfa_ioc_s *ioc); |
@@ -919,6 +921,7 @@ bfa_status_t bfa_ioc_debug_fwtrc(struct bfa_ioc_s *ioc, void *trcdata, | |||
919 | int *trclen); | 921 | int *trclen); |
920 | bfa_status_t bfa_ioc_debug_fwcore(struct bfa_ioc_s *ioc, void *buf, | 922 | bfa_status_t bfa_ioc_debug_fwcore(struct bfa_ioc_s *ioc, void *buf, |
921 | u32 *offset, int *buflen); | 923 | u32 *offset, int *buflen); |
924 | bfa_status_t bfa_ioc_fwsig_invalidate(struct bfa_ioc_s *ioc); | ||
922 | bfa_boolean_t bfa_ioc_sem_get(void __iomem *sem_reg); | 925 | bfa_boolean_t bfa_ioc_sem_get(void __iomem *sem_reg); |
923 | void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc, | 926 | void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc, |
924 | struct bfi_ioc_image_hdr_s *fwhdr); | 927 | struct bfi_ioc_image_hdr_s *fwhdr); |
@@ -956,6 +959,8 @@ bfa_status_t bfa_ablk_optrom_en(struct bfa_ablk_s *ablk, | |||
956 | bfa_status_t bfa_ablk_optrom_dis(struct bfa_ablk_s *ablk, | 959 | bfa_status_t bfa_ablk_optrom_dis(struct bfa_ablk_s *ablk, |
957 | bfa_ablk_cbfn_t cbfn, void *cbarg); | 960 | bfa_ablk_cbfn_t cbfn, void *cbarg); |
958 | 961 | ||
962 | bfa_status_t bfa_ioc_flash_img_get_chnk(struct bfa_ioc_s *ioc, u32 off, | ||
963 | u32 *fwimg); | ||
959 | /* | 964 | /* |
960 | * bfa mfg wwn API functions | 965 | * bfa mfg wwn API functions |
961 | */ | 966 | */ |
diff --git a/drivers/scsi/bfa/bfa_ioc_cb.c b/drivers/scsi/bfa/bfa_ioc_cb.c index e3b928746674..453c2f5b5561 100644 --- a/drivers/scsi/bfa/bfa_ioc_cb.c +++ b/drivers/scsi/bfa/bfa_ioc_cb.c | |||
@@ -81,6 +81,29 @@ bfa_ioc_set_cb_hwif(struct bfa_ioc_s *ioc) | |||
81 | static bfa_boolean_t | 81 | static bfa_boolean_t |
82 | bfa_ioc_cb_firmware_lock(struct bfa_ioc_s *ioc) | 82 | bfa_ioc_cb_firmware_lock(struct bfa_ioc_s *ioc) |
83 | { | 83 | { |
84 | enum bfi_ioc_state alt_fwstate, cur_fwstate; | ||
85 | struct bfi_ioc_image_hdr_s fwhdr; | ||
86 | |||
87 | cur_fwstate = bfa_ioc_cb_get_cur_ioc_fwstate(ioc); | ||
88 | bfa_trc(ioc, cur_fwstate); | ||
89 | alt_fwstate = bfa_ioc_cb_get_alt_ioc_fwstate(ioc); | ||
90 | bfa_trc(ioc, alt_fwstate); | ||
91 | |||
92 | /* | ||
93 | * Uninit implies this is the only driver as of now. | ||
94 | */ | ||
95 | if (cur_fwstate == BFI_IOC_UNINIT) | ||
96 | return BFA_TRUE; | ||
97 | /* | ||
98 | * Check if another driver with a different firmware is active | ||
99 | */ | ||
100 | bfa_ioc_fwver_get(ioc, &fwhdr); | ||
101 | if (!bfa_ioc_fwver_cmp(ioc, &fwhdr) && | ||
102 | alt_fwstate != BFI_IOC_DISABLED) { | ||
103 | bfa_trc(ioc, alt_fwstate); | ||
104 | return BFA_FALSE; | ||
105 | } | ||
106 | |||
84 | return BFA_TRUE; | 107 | return BFA_TRUE; |
85 | } | 108 | } |
86 | 109 | ||
diff --git a/drivers/scsi/bfa/bfa_svc.c b/drivers/scsi/bfa/bfa_svc.c index 6c41e57fd752..625225f31081 100644 --- a/drivers/scsi/bfa/bfa_svc.c +++ b/drivers/scsi/bfa/bfa_svc.c | |||
@@ -6758,7 +6758,7 @@ bfa_dport_scn(struct bfa_dport_s *dport, struct bfi_diag_dport_scn_s *msg) | |||
6758 | dport->rp_pwwn = msg->info.teststart.pwwn; | 6758 | dport->rp_pwwn = msg->info.teststart.pwwn; |
6759 | dport->rp_nwwn = msg->info.teststart.nwwn; | 6759 | dport->rp_nwwn = msg->info.teststart.nwwn; |
6760 | dport->lpcnt = cpu_to_be32(msg->info.teststart.numfrm); | 6760 | dport->lpcnt = cpu_to_be32(msg->info.teststart.numfrm); |
6761 | bfa_dport_result_start(dport, BFA_DPORT_OPMODE_AUTO); | 6761 | bfa_dport_result_start(dport, msg->info.teststart.mode); |
6762 | break; | 6762 | break; |
6763 | 6763 | ||
6764 | case BFI_DPORT_SCN_SUBTESTSTART: | 6764 | case BFI_DPORT_SCN_SUBTESTSTART: |
diff --git a/drivers/scsi/bfa/bfad.c b/drivers/scsi/bfa/bfad.c index fc80a325a1e6..cc0fbcdc5192 100644 --- a/drivers/scsi/bfa/bfad.c +++ b/drivers/scsi/bfa/bfad.c | |||
@@ -63,9 +63,9 @@ int max_rport_logins = BFA_FCS_MAX_RPORT_LOGINS; | |||
63 | u32 bfi_image_cb_size, bfi_image_ct_size, bfi_image_ct2_size; | 63 | u32 bfi_image_cb_size, bfi_image_ct_size, bfi_image_ct2_size; |
64 | u32 *bfi_image_cb, *bfi_image_ct, *bfi_image_ct2; | 64 | u32 *bfi_image_cb, *bfi_image_ct, *bfi_image_ct2; |
65 | 65 | ||
66 | #define BFAD_FW_FILE_CB "cbfw-3.2.1.1.bin" | 66 | #define BFAD_FW_FILE_CB "cbfw-3.2.3.0.bin" |
67 | #define BFAD_FW_FILE_CT "ctfw-3.2.1.1.bin" | 67 | #define BFAD_FW_FILE_CT "ctfw-3.2.3.0.bin" |
68 | #define BFAD_FW_FILE_CT2 "ct2fw-3.2.1.1.bin" | 68 | #define BFAD_FW_FILE_CT2 "ct2fw-3.2.3.0.bin" |
69 | 69 | ||
70 | static u32 *bfad_load_fwimg(struct pci_dev *pdev); | 70 | static u32 *bfad_load_fwimg(struct pci_dev *pdev); |
71 | static void bfad_free_fwimg(void); | 71 | static void bfad_free_fwimg(void); |
@@ -204,6 +204,7 @@ static void | |||
204 | bfad_sm_created(struct bfad_s *bfad, enum bfad_sm_event event) | 204 | bfad_sm_created(struct bfad_s *bfad, enum bfad_sm_event event) |
205 | { | 205 | { |
206 | unsigned long flags; | 206 | unsigned long flags; |
207 | bfa_status_t ret; | ||
207 | 208 | ||
208 | bfa_trc(bfad, event); | 209 | bfa_trc(bfad, event); |
209 | 210 | ||
@@ -217,7 +218,7 @@ bfad_sm_created(struct bfad_s *bfad, enum bfad_sm_event event) | |||
217 | if (bfad_setup_intr(bfad)) { | 218 | if (bfad_setup_intr(bfad)) { |
218 | printk(KERN_WARNING "bfad%d: bfad_setup_intr failed\n", | 219 | printk(KERN_WARNING "bfad%d: bfad_setup_intr failed\n", |
219 | bfad->inst_no); | 220 | bfad->inst_no); |
220 | bfa_sm_send_event(bfad, BFAD_E_INTR_INIT_FAILED); | 221 | bfa_sm_send_event(bfad, BFAD_E_INIT_FAILED); |
221 | break; | 222 | break; |
222 | } | 223 | } |
223 | 224 | ||
@@ -242,8 +243,26 @@ bfad_sm_created(struct bfad_s *bfad, enum bfad_sm_event event) | |||
242 | printk(KERN_WARNING | 243 | printk(KERN_WARNING |
243 | "bfa %s: bfa init failed\n", | 244 | "bfa %s: bfa init failed\n", |
244 | bfad->pci_name); | 245 | bfad->pci_name); |
246 | spin_lock_irqsave(&bfad->bfad_lock, flags); | ||
247 | bfa_fcs_init(&bfad->bfa_fcs); | ||
248 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); | ||
249 | |||
250 | ret = bfad_cfg_pport(bfad, BFA_LPORT_ROLE_FCP_IM); | ||
251 | if (ret != BFA_STATUS_OK) { | ||
252 | init_completion(&bfad->comp); | ||
253 | |||
254 | spin_lock_irqsave(&bfad->bfad_lock, flags); | ||
255 | bfad->pport.flags |= BFAD_PORT_DELETE; | ||
256 | bfa_fcs_exit(&bfad->bfa_fcs); | ||
257 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); | ||
258 | |||
259 | wait_for_completion(&bfad->comp); | ||
260 | |||
261 | bfa_sm_send_event(bfad, BFAD_E_INIT_FAILED); | ||
262 | break; | ||
263 | } | ||
245 | bfad->bfad_flags |= BFAD_HAL_INIT_FAIL; | 264 | bfad->bfad_flags |= BFAD_HAL_INIT_FAIL; |
246 | bfa_sm_send_event(bfad, BFAD_E_INIT_FAILED); | 265 | bfa_sm_send_event(bfad, BFAD_E_HAL_INIT_FAILED); |
247 | } | 266 | } |
248 | 267 | ||
249 | break; | 268 | break; |
@@ -273,12 +292,14 @@ bfad_sm_initializing(struct bfad_s *bfad, enum bfad_sm_event event) | |||
273 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); | 292 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); |
274 | 293 | ||
275 | retval = bfad_start_ops(bfad); | 294 | retval = bfad_start_ops(bfad); |
276 | if (retval != BFA_STATUS_OK) | 295 | if (retval != BFA_STATUS_OK) { |
296 | bfa_sm_set_state(bfad, bfad_sm_failed); | ||
277 | break; | 297 | break; |
298 | } | ||
278 | bfa_sm_set_state(bfad, bfad_sm_operational); | 299 | bfa_sm_set_state(bfad, bfad_sm_operational); |
279 | break; | 300 | break; |
280 | 301 | ||
281 | case BFAD_E_INTR_INIT_FAILED: | 302 | case BFAD_E_INIT_FAILED: |
282 | bfa_sm_set_state(bfad, bfad_sm_uninit); | 303 | bfa_sm_set_state(bfad, bfad_sm_uninit); |
283 | kthread_stop(bfad->bfad_tsk); | 304 | kthread_stop(bfad->bfad_tsk); |
284 | spin_lock_irqsave(&bfad->bfad_lock, flags); | 305 | spin_lock_irqsave(&bfad->bfad_lock, flags); |
@@ -286,7 +307,7 @@ bfad_sm_initializing(struct bfad_s *bfad, enum bfad_sm_event event) | |||
286 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); | 307 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); |
287 | break; | 308 | break; |
288 | 309 | ||
289 | case BFAD_E_INIT_FAILED: | 310 | case BFAD_E_HAL_INIT_FAILED: |
290 | bfa_sm_set_state(bfad, bfad_sm_failed); | 311 | bfa_sm_set_state(bfad, bfad_sm_failed); |
291 | break; | 312 | break; |
292 | default: | 313 | default: |
@@ -310,13 +331,8 @@ bfad_sm_failed(struct bfad_s *bfad, enum bfad_sm_event event) | |||
310 | break; | 331 | break; |
311 | 332 | ||
312 | case BFAD_E_STOP: | 333 | case BFAD_E_STOP: |
313 | if (bfad->bfad_flags & BFAD_CFG_PPORT_DONE) | 334 | bfa_sm_set_state(bfad, bfad_sm_fcs_exit); |
314 | bfad_uncfg_pport(bfad); | 335 | bfa_sm_send_event(bfad, BFAD_E_FCS_EXIT_COMP); |
315 | if (bfad->bfad_flags & BFAD_FC4_PROBE_DONE) { | ||
316 | bfad_im_probe_undo(bfad); | ||
317 | bfad->bfad_flags &= ~BFAD_FC4_PROBE_DONE; | ||
318 | } | ||
319 | bfad_stop(bfad); | ||
320 | break; | 336 | break; |
321 | 337 | ||
322 | case BFAD_E_EXIT_COMP: | 338 | case BFAD_E_EXIT_COMP: |
@@ -824,7 +840,7 @@ bfad_drv_init(struct bfad_s *bfad) | |||
824 | printk(KERN_WARNING | 840 | printk(KERN_WARNING |
825 | "Not enough memory to attach all Brocade HBA ports, %s", | 841 | "Not enough memory to attach all Brocade HBA ports, %s", |
826 | "System may need more memory.\n"); | 842 | "System may need more memory.\n"); |
827 | goto out_hal_mem_alloc_failure; | 843 | return BFA_STATUS_FAILED; |
828 | } | 844 | } |
829 | 845 | ||
830 | bfad->bfa.trcmod = bfad->trcmod; | 846 | bfad->bfa.trcmod = bfad->trcmod; |
@@ -841,31 +857,11 @@ bfad_drv_init(struct bfad_s *bfad) | |||
841 | bfad->bfa_fcs.trcmod = bfad->trcmod; | 857 | bfad->bfa_fcs.trcmod = bfad->trcmod; |
842 | bfa_fcs_attach(&bfad->bfa_fcs, &bfad->bfa, bfad, BFA_FALSE); | 858 | bfa_fcs_attach(&bfad->bfa_fcs, &bfad->bfa, bfad, BFA_FALSE); |
843 | bfad->bfa_fcs.fdmi_enabled = fdmi_enable; | 859 | bfad->bfa_fcs.fdmi_enabled = fdmi_enable; |
844 | bfa_fcs_init(&bfad->bfa_fcs); | ||
845 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); | 860 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); |
846 | 861 | ||
847 | bfad->bfad_flags |= BFAD_DRV_INIT_DONE; | 862 | bfad->bfad_flags |= BFAD_DRV_INIT_DONE; |
848 | 863 | ||
849 | /* configure base port */ | ||
850 | rc = bfad_cfg_pport(bfad, BFA_LPORT_ROLE_FCP_IM); | ||
851 | if (rc != BFA_STATUS_OK) | ||
852 | goto out_cfg_pport_fail; | ||
853 | |||
854 | return BFA_STATUS_OK; | 864 | return BFA_STATUS_OK; |
855 | |||
856 | out_cfg_pport_fail: | ||
857 | /* fcs exit - on cfg pport failure */ | ||
858 | spin_lock_irqsave(&bfad->bfad_lock, flags); | ||
859 | init_completion(&bfad->comp); | ||
860 | bfad->pport.flags |= BFAD_PORT_DELETE; | ||
861 | bfa_fcs_exit(&bfad->bfa_fcs); | ||
862 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); | ||
863 | wait_for_completion(&bfad->comp); | ||
864 | /* bfa detach - free hal memory */ | ||
865 | bfa_detach(&bfad->bfa); | ||
866 | bfad_hal_mem_release(bfad); | ||
867 | out_hal_mem_alloc_failure: | ||
868 | return BFA_STATUS_FAILED; | ||
869 | } | 865 | } |
870 | 866 | ||
871 | void | 867 | void |
@@ -1009,13 +1005,19 @@ bfad_start_ops(struct bfad_s *bfad) { | |||
1009 | /* FCS driver info init */ | 1005 | /* FCS driver info init */ |
1010 | spin_lock_irqsave(&bfad->bfad_lock, flags); | 1006 | spin_lock_irqsave(&bfad->bfad_lock, flags); |
1011 | bfa_fcs_driver_info_init(&bfad->bfa_fcs, &driver_info); | 1007 | bfa_fcs_driver_info_init(&bfad->bfa_fcs, &driver_info); |
1008 | |||
1009 | if (bfad->bfad_flags & BFAD_CFG_PPORT_DONE) | ||
1010 | bfa_fcs_update_cfg(&bfad->bfa_fcs); | ||
1011 | else | ||
1012 | bfa_fcs_init(&bfad->bfa_fcs); | ||
1013 | |||
1012 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); | 1014 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); |
1013 | 1015 | ||
1014 | /* | 1016 | if (!(bfad->bfad_flags & BFAD_CFG_PPORT_DONE)) { |
1015 | * FCS update cfg - reset the pwwn/nwwn of fabric base logical port | 1017 | retval = bfad_cfg_pport(bfad, BFA_LPORT_ROLE_FCP_IM); |
1016 | * with values learned during bfa_init firmware GETATTR REQ. | 1018 | if (retval != BFA_STATUS_OK) |
1017 | */ | 1019 | return BFA_STATUS_FAILED; |
1018 | bfa_fcs_update_cfg(&bfad->bfa_fcs); | 1020 | } |
1019 | 1021 | ||
1020 | /* Setup fc host fixed attribute if the lk supports */ | 1022 | /* Setup fc host fixed attribute if the lk supports */ |
1021 | bfad_fc_host_init(bfad->pport.im_port); | 1023 | bfad_fc_host_init(bfad->pport.im_port); |
@@ -1026,10 +1028,6 @@ bfad_start_ops(struct bfad_s *bfad) { | |||
1026 | printk(KERN_WARNING "bfad_im_probe failed\n"); | 1028 | printk(KERN_WARNING "bfad_im_probe failed\n"); |
1027 | if (bfa_sm_cmp_state(bfad, bfad_sm_initializing)) | 1029 | if (bfa_sm_cmp_state(bfad, bfad_sm_initializing)) |
1028 | bfa_sm_set_state(bfad, bfad_sm_failed); | 1030 | bfa_sm_set_state(bfad, bfad_sm_failed); |
1029 | bfad_im_probe_undo(bfad); | ||
1030 | bfad->bfad_flags &= ~BFAD_FC4_PROBE_DONE; | ||
1031 | bfad_uncfg_pport(bfad); | ||
1032 | bfad_stop(bfad); | ||
1033 | return BFA_STATUS_FAILED; | 1031 | return BFA_STATUS_FAILED; |
1034 | } else | 1032 | } else |
1035 | bfad->bfad_flags |= BFAD_FC4_PROBE_DONE; | 1033 | bfad->bfad_flags |= BFAD_FC4_PROBE_DONE; |
@@ -1399,7 +1397,6 @@ bfad_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid) | |||
1399 | return 0; | 1397 | return 0; |
1400 | 1398 | ||
1401 | out_bfad_sm_failure: | 1399 | out_bfad_sm_failure: |
1402 | bfa_detach(&bfad->bfa); | ||
1403 | bfad_hal_mem_release(bfad); | 1400 | bfad_hal_mem_release(bfad); |
1404 | out_drv_init_failure: | 1401 | out_drv_init_failure: |
1405 | /* Remove the debugfs node for this bfad */ | 1402 | /* Remove the debugfs node for this bfad */ |
@@ -1534,7 +1531,7 @@ restart_bfa(struct bfad_s *bfad) | |||
1534 | if (bfad_setup_intr(bfad)) { | 1531 | if (bfad_setup_intr(bfad)) { |
1535 | dev_printk(KERN_WARNING, &pdev->dev, | 1532 | dev_printk(KERN_WARNING, &pdev->dev, |
1536 | "%s: bfad_setup_intr failed\n", bfad->pci_name); | 1533 | "%s: bfad_setup_intr failed\n", bfad->pci_name); |
1537 | bfa_sm_send_event(bfad, BFAD_E_INTR_INIT_FAILED); | 1534 | bfa_sm_send_event(bfad, BFAD_E_INIT_FAILED); |
1538 | return -1; | 1535 | return -1; |
1539 | } | 1536 | } |
1540 | 1537 | ||
@@ -1802,7 +1799,7 @@ out: | |||
1802 | static u32 * | 1799 | static u32 * |
1803 | bfad_load_fwimg(struct pci_dev *pdev) | 1800 | bfad_load_fwimg(struct pci_dev *pdev) |
1804 | { | 1801 | { |
1805 | if (pdev->device == BFA_PCI_DEVICE_ID_CT2) { | 1802 | if (bfa_asic_id_ct2(pdev->device)) { |
1806 | if (bfi_image_ct2_size == 0) | 1803 | if (bfi_image_ct2_size == 0) |
1807 | bfad_read_firmware(pdev, &bfi_image_ct2, | 1804 | bfad_read_firmware(pdev, &bfi_image_ct2, |
1808 | &bfi_image_ct2_size, BFAD_FW_FILE_CT2); | 1805 | &bfi_image_ct2_size, BFAD_FW_FILE_CT2); |
@@ -1812,12 +1809,14 @@ bfad_load_fwimg(struct pci_dev *pdev) | |||
1812 | bfad_read_firmware(pdev, &bfi_image_ct, | 1809 | bfad_read_firmware(pdev, &bfi_image_ct, |
1813 | &bfi_image_ct_size, BFAD_FW_FILE_CT); | 1810 | &bfi_image_ct_size, BFAD_FW_FILE_CT); |
1814 | return bfi_image_ct; | 1811 | return bfi_image_ct; |
1815 | } else { | 1812 | } else if (bfa_asic_id_cb(pdev->device)) { |
1816 | if (bfi_image_cb_size == 0) | 1813 | if (bfi_image_cb_size == 0) |
1817 | bfad_read_firmware(pdev, &bfi_image_cb, | 1814 | bfad_read_firmware(pdev, &bfi_image_cb, |
1818 | &bfi_image_cb_size, BFAD_FW_FILE_CB); | 1815 | &bfi_image_cb_size, BFAD_FW_FILE_CB); |
1819 | return bfi_image_cb; | 1816 | return bfi_image_cb; |
1820 | } | 1817 | } |
1818 | |||
1819 | return NULL; | ||
1821 | } | 1820 | } |
1822 | 1821 | ||
1823 | static void | 1822 | static void |
diff --git a/drivers/scsi/bfa/bfad_bsg.c b/drivers/scsi/bfa/bfad_bsg.c index 0467c349251a..157f6044a9bb 100644 --- a/drivers/scsi/bfa/bfad_bsg.c +++ b/drivers/scsi/bfa/bfad_bsg.c | |||
@@ -229,6 +229,18 @@ bfad_iocmd_iocfc_get_attr(struct bfad_s *bfad, void *cmd) | |||
229 | } | 229 | } |
230 | 230 | ||
231 | int | 231 | int |
232 | bfad_iocmd_ioc_fw_sig_inv(struct bfad_s *bfad, void *cmd) | ||
233 | { | ||
234 | struct bfa_bsg_gen_s *iocmd = (struct bfa_bsg_gen_s *)cmd; | ||
235 | unsigned long flags; | ||
236 | |||
237 | spin_lock_irqsave(&bfad->bfad_lock, flags); | ||
238 | iocmd->status = bfa_ioc_fwsig_invalidate(&bfad->bfa.ioc); | ||
239 | spin_unlock_irqrestore(&bfad->bfad_lock, flags); | ||
240 | return 0; | ||
241 | } | ||
242 | |||
243 | int | ||
232 | bfad_iocmd_iocfc_set_intr(struct bfad_s *bfad, void *cmd) | 244 | bfad_iocmd_iocfc_set_intr(struct bfad_s *bfad, void *cmd) |
233 | { | 245 | { |
234 | struct bfa_bsg_iocfc_intr_s *iocmd = (struct bfa_bsg_iocfc_intr_s *)cmd; | 246 | struct bfa_bsg_iocfc_intr_s *iocmd = (struct bfa_bsg_iocfc_intr_s *)cmd; |
@@ -2893,6 +2905,9 @@ bfad_iocmd_handler(struct bfad_s *bfad, unsigned int cmd, void *iocmd, | |||
2893 | case IOCMD_IOC_PCIFN_CFG: | 2905 | case IOCMD_IOC_PCIFN_CFG: |
2894 | rc = bfad_iocmd_ioc_get_pcifn_cfg(bfad, iocmd); | 2906 | rc = bfad_iocmd_ioc_get_pcifn_cfg(bfad, iocmd); |
2895 | break; | 2907 | break; |
2908 | case IOCMD_IOC_FW_SIG_INV: | ||
2909 | rc = bfad_iocmd_ioc_fw_sig_inv(bfad, iocmd); | ||
2910 | break; | ||
2896 | case IOCMD_PCIFN_CREATE: | 2911 | case IOCMD_PCIFN_CREATE: |
2897 | rc = bfad_iocmd_pcifn_create(bfad, iocmd); | 2912 | rc = bfad_iocmd_pcifn_create(bfad, iocmd); |
2898 | break; | 2913 | break; |
diff --git a/drivers/scsi/bfa/bfad_bsg.h b/drivers/scsi/bfa/bfad_bsg.h index 05f0fc9cf063..90abef691585 100644 --- a/drivers/scsi/bfa/bfad_bsg.h +++ b/drivers/scsi/bfa/bfad_bsg.h | |||
@@ -34,6 +34,7 @@ enum { | |||
34 | IOCMD_IOC_RESET_FWSTATS, | 34 | IOCMD_IOC_RESET_FWSTATS, |
35 | IOCMD_IOC_SET_ADAPTER_NAME, | 35 | IOCMD_IOC_SET_ADAPTER_NAME, |
36 | IOCMD_IOC_SET_PORT_NAME, | 36 | IOCMD_IOC_SET_PORT_NAME, |
37 | IOCMD_IOC_FW_SIG_INV, | ||
37 | IOCMD_IOCFC_GET_ATTR, | 38 | IOCMD_IOCFC_GET_ATTR, |
38 | IOCMD_IOCFC_SET_INTR, | 39 | IOCMD_IOCFC_SET_INTR, |
39 | IOCMD_PORT_ENABLE, | 40 | IOCMD_PORT_ENABLE, |
diff --git a/drivers/scsi/bfa/bfad_drv.h b/drivers/scsi/bfa/bfad_drv.h index 78d3401bc16b..8b97877d42cf 100644 --- a/drivers/scsi/bfa/bfad_drv.h +++ b/drivers/scsi/bfa/bfad_drv.h | |||
@@ -57,7 +57,7 @@ | |||
57 | #ifdef BFA_DRIVER_VERSION | 57 | #ifdef BFA_DRIVER_VERSION |
58 | #define BFAD_DRIVER_VERSION BFA_DRIVER_VERSION | 58 | #define BFAD_DRIVER_VERSION BFA_DRIVER_VERSION |
59 | #else | 59 | #else |
60 | #define BFAD_DRIVER_VERSION "3.2.21.1" | 60 | #define BFAD_DRIVER_VERSION "3.2.23.0" |
61 | #endif | 61 | #endif |
62 | 62 | ||
63 | #define BFAD_PROTO_NAME FCPI_NAME | 63 | #define BFAD_PROTO_NAME FCPI_NAME |
@@ -240,8 +240,8 @@ enum bfad_sm_event { | |||
240 | BFAD_E_KTHREAD_CREATE_FAILED = 2, | 240 | BFAD_E_KTHREAD_CREATE_FAILED = 2, |
241 | BFAD_E_INIT = 3, | 241 | BFAD_E_INIT = 3, |
242 | BFAD_E_INIT_SUCCESS = 4, | 242 | BFAD_E_INIT_SUCCESS = 4, |
243 | BFAD_E_INIT_FAILED = 5, | 243 | BFAD_E_HAL_INIT_FAILED = 5, |
244 | BFAD_E_INTR_INIT_FAILED = 6, | 244 | BFAD_E_INIT_FAILED = 6, |
245 | BFAD_E_FCS_EXIT_COMP = 7, | 245 | BFAD_E_FCS_EXIT_COMP = 7, |
246 | BFAD_E_EXIT_COMP = 8, | 246 | BFAD_E_EXIT_COMP = 8, |
247 | BFAD_E_STOP = 9 | 247 | BFAD_E_STOP = 9 |
diff --git a/drivers/scsi/bfa/bfi.h b/drivers/scsi/bfa/bfi.h index 37bd2564e83b..9ef91f907dec 100644 --- a/drivers/scsi/bfa/bfi.h +++ b/drivers/scsi/bfa/bfi.h | |||
@@ -46,6 +46,7 @@ | |||
46 | */ | 46 | */ |
47 | #define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */ | 47 | #define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */ |
48 | #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32)) | 48 | #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32)) |
49 | #define BFI_FLASH_IMAGE_SZ 0x100000 | ||
49 | 50 | ||
50 | /* | 51 | /* |
51 | * Msg header common to all msgs | 52 | * Msg header common to all msgs |
@@ -324,7 +325,29 @@ struct bfi_ioc_getattr_reply_s { | |||
324 | #define BFI_IOC_TRC_ENTS 256 | 325 | #define BFI_IOC_TRC_ENTS 256 |
325 | 326 | ||
326 | #define BFI_IOC_FW_SIGNATURE (0xbfadbfad) | 327 | #define BFI_IOC_FW_SIGNATURE (0xbfadbfad) |
328 | #define BFA_IOC_FW_INV_SIGN (0xdeaddead) | ||
327 | #define BFI_IOC_MD5SUM_SZ 4 | 329 | #define BFI_IOC_MD5SUM_SZ 4 |
330 | |||
331 | struct bfi_ioc_fwver_s { | ||
332 | #ifdef __BIG_ENDIAN | ||
333 | uint8_t patch; | ||
334 | uint8_t maint; | ||
335 | uint8_t minor; | ||
336 | uint8_t major; | ||
337 | uint8_t rsvd[2]; | ||
338 | uint8_t build; | ||
339 | uint8_t phase; | ||
340 | #else | ||
341 | uint8_t major; | ||
342 | uint8_t minor; | ||
343 | uint8_t maint; | ||
344 | uint8_t patch; | ||
345 | uint8_t phase; | ||
346 | uint8_t build; | ||
347 | uint8_t rsvd[2]; | ||
348 | #endif | ||
349 | }; | ||
350 | |||
328 | struct bfi_ioc_image_hdr_s { | 351 | struct bfi_ioc_image_hdr_s { |
329 | u32 signature; /* constant signature */ | 352 | u32 signature; /* constant signature */ |
330 | u8 asic_gen; /* asic generation */ | 353 | u8 asic_gen; /* asic generation */ |
@@ -333,10 +356,18 @@ struct bfi_ioc_image_hdr_s { | |||
333 | u8 port1_mode; /* device mode for port 1 */ | 356 | u8 port1_mode; /* device mode for port 1 */ |
334 | u32 exec; /* exec vector */ | 357 | u32 exec; /* exec vector */ |
335 | u32 bootenv; /* fimware boot env */ | 358 | u32 bootenv; /* fimware boot env */ |
336 | u32 rsvd_b[4]; | 359 | u32 rsvd_b[2]; |
360 | struct bfi_ioc_fwver_s fwver; | ||
337 | u32 md5sum[BFI_IOC_MD5SUM_SZ]; | 361 | u32 md5sum[BFI_IOC_MD5SUM_SZ]; |
338 | }; | 362 | }; |
339 | 363 | ||
364 | enum bfi_ioc_img_ver_cmp_e { | ||
365 | BFI_IOC_IMG_VER_INCOMP, | ||
366 | BFI_IOC_IMG_VER_OLD, | ||
367 | BFI_IOC_IMG_VER_SAME, | ||
368 | BFI_IOC_IMG_VER_BETTER | ||
369 | }; | ||
370 | |||
340 | #define BFI_FWBOOT_DEVMODE_OFF 4 | 371 | #define BFI_FWBOOT_DEVMODE_OFF 4 |
341 | #define BFI_FWBOOT_TYPE_OFF 8 | 372 | #define BFI_FWBOOT_TYPE_OFF 8 |
342 | #define BFI_FWBOOT_ENV_OFF 12 | 373 | #define BFI_FWBOOT_ENV_OFF 12 |
@@ -346,6 +377,12 @@ struct bfi_ioc_image_hdr_s { | |||
346 | ((u32)(__p0_mode)) << 8 | \ | 377 | ((u32)(__p0_mode)) << 8 | \ |
347 | ((u32)(__p1_mode))) | 378 | ((u32)(__p1_mode))) |
348 | 379 | ||
380 | enum bfi_fwboot_type { | ||
381 | BFI_FWBOOT_TYPE_NORMAL = 0, | ||
382 | BFI_FWBOOT_TYPE_FLASH = 1, | ||
383 | BFI_FWBOOT_TYPE_MEMTEST = 2, | ||
384 | }; | ||
385 | |||
349 | #define BFI_FWBOOT_TYPE_NORMAL 0 | 386 | #define BFI_FWBOOT_TYPE_NORMAL 0 |
350 | #define BFI_FWBOOT_TYPE_MEMTEST 2 | 387 | #define BFI_FWBOOT_TYPE_MEMTEST 2 |
351 | #define BFI_FWBOOT_ENV_OS 0 | 388 | #define BFI_FWBOOT_ENV_OS 0 |
@@ -1107,7 +1144,8 @@ struct bfi_diag_dport_scn_teststart_s { | |||
1107 | wwn_t pwwn; /* switch port wwn. 8 bytes */ | 1144 | wwn_t pwwn; /* switch port wwn. 8 bytes */ |
1108 | wwn_t nwwn; /* switch node wwn. 8 bytes */ | 1145 | wwn_t nwwn; /* switch node wwn. 8 bytes */ |
1109 | u8 type; /* bfa_diag_dport_test_type_e */ | 1146 | u8 type; /* bfa_diag_dport_test_type_e */ |
1110 | u8 rsvd[3]; | 1147 | u8 mode; /* bfa_diag_dport_test_opmode */ |
1148 | u8 rsvd[2]; | ||
1111 | u32 numfrm; /* from switch uint in 1M */ | 1149 | u32 numfrm; /* from switch uint in 1M */ |
1112 | }; | 1150 | }; |
1113 | 1151 | ||
diff --git a/drivers/scsi/gvp11.c b/drivers/scsi/gvp11.c index 2203ac281103..3b6f83ffddc4 100644 --- a/drivers/scsi/gvp11.c +++ b/drivers/scsi/gvp11.c | |||
@@ -310,7 +310,7 @@ static int gvp11_probe(struct zorro_dev *z, const struct zorro_device_id *ent) | |||
310 | if (!request_mem_region(address, 256, "wd33c93")) | 310 | if (!request_mem_region(address, 256, "wd33c93")) |
311 | return -EBUSY; | 311 | return -EBUSY; |
312 | 312 | ||
313 | regs = (struct gvp11_scsiregs *)(ZTWO_VADDR(address)); | 313 | regs = ZTWO_VADDR(address); |
314 | 314 | ||
315 | error = check_wd33c93(regs); | 315 | error = check_wd33c93(regs); |
316 | if (error) | 316 | if (error) |
diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c index f2c5005f312a..f28ea070d3df 100644 --- a/drivers/scsi/hosts.c +++ b/drivers/scsi/hosts.c | |||
@@ -169,6 +169,7 @@ void scsi_remove_host(struct Scsi_Host *shost) | |||
169 | spin_unlock_irqrestore(shost->host_lock, flags); | 169 | spin_unlock_irqrestore(shost->host_lock, flags); |
170 | 170 | ||
171 | scsi_autopm_get_host(shost); | 171 | scsi_autopm_get_host(shost); |
172 | flush_workqueue(shost->tmf_work_q); | ||
172 | scsi_forget_host(shost); | 173 | scsi_forget_host(shost); |
173 | mutex_unlock(&shost->scan_mutex); | 174 | mutex_unlock(&shost->scan_mutex); |
174 | scsi_proc_host_rm(shost); | 175 | scsi_proc_host_rm(shost); |
@@ -294,6 +295,8 @@ static void scsi_host_dev_release(struct device *dev) | |||
294 | 295 | ||
295 | scsi_proc_hostdir_rm(shost->hostt); | 296 | scsi_proc_hostdir_rm(shost->hostt); |
296 | 297 | ||
298 | if (shost->tmf_work_q) | ||
299 | destroy_workqueue(shost->tmf_work_q); | ||
297 | if (shost->ehandler) | 300 | if (shost->ehandler) |
298 | kthread_stop(shost->ehandler); | 301 | kthread_stop(shost->ehandler); |
299 | if (shost->work_q) | 302 | if (shost->work_q) |
@@ -316,11 +319,11 @@ static void scsi_host_dev_release(struct device *dev) | |||
316 | kfree(shost); | 319 | kfree(shost); |
317 | } | 320 | } |
318 | 321 | ||
319 | static unsigned int shost_eh_deadline; | 322 | static int shost_eh_deadline = -1; |
320 | 323 | ||
321 | module_param_named(eh_deadline, shost_eh_deadline, uint, S_IRUGO|S_IWUSR); | 324 | module_param_named(eh_deadline, shost_eh_deadline, int, S_IRUGO|S_IWUSR); |
322 | MODULE_PARM_DESC(eh_deadline, | 325 | MODULE_PARM_DESC(eh_deadline, |
323 | "SCSI EH timeout in seconds (should be between 1 and 2^32-1)"); | 326 | "SCSI EH timeout in seconds (should be between 0 and 2^31-1)"); |
324 | 327 | ||
325 | static struct device_type scsi_host_type = { | 328 | static struct device_type scsi_host_type = { |
326 | .name = "scsi_host", | 329 | .name = "scsi_host", |
@@ -360,7 +363,6 @@ struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *sht, int privsize) | |||
360 | INIT_LIST_HEAD(&shost->eh_cmd_q); | 363 | INIT_LIST_HEAD(&shost->eh_cmd_q); |
361 | INIT_LIST_HEAD(&shost->starved_list); | 364 | INIT_LIST_HEAD(&shost->starved_list); |
362 | init_waitqueue_head(&shost->host_wait); | 365 | init_waitqueue_head(&shost->host_wait); |
363 | |||
364 | mutex_init(&shost->scan_mutex); | 366 | mutex_init(&shost->scan_mutex); |
365 | 367 | ||
366 | /* | 368 | /* |
@@ -394,9 +396,18 @@ struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *sht, int privsize) | |||
394 | shost->unchecked_isa_dma = sht->unchecked_isa_dma; | 396 | shost->unchecked_isa_dma = sht->unchecked_isa_dma; |
395 | shost->use_clustering = sht->use_clustering; | 397 | shost->use_clustering = sht->use_clustering; |
396 | shost->ordered_tag = sht->ordered_tag; | 398 | shost->ordered_tag = sht->ordered_tag; |
397 | shost->eh_deadline = shost_eh_deadline * HZ; | ||
398 | shost->no_write_same = sht->no_write_same; | 399 | shost->no_write_same = sht->no_write_same; |
399 | 400 | ||
401 | if (shost_eh_deadline == -1) | ||
402 | shost->eh_deadline = -1; | ||
403 | else if ((ulong) shost_eh_deadline * HZ > INT_MAX) { | ||
404 | shost_printk(KERN_WARNING, shost, | ||
405 | "eh_deadline %u too large, setting to %u\n", | ||
406 | shost_eh_deadline, INT_MAX / HZ); | ||
407 | shost->eh_deadline = INT_MAX; | ||
408 | } else | ||
409 | shost->eh_deadline = shost_eh_deadline * HZ; | ||
410 | |||
400 | if (sht->supported_mode == MODE_UNKNOWN) | 411 | if (sht->supported_mode == MODE_UNKNOWN) |
401 | /* means we didn't set it ... default to INITIATOR */ | 412 | /* means we didn't set it ... default to INITIATOR */ |
402 | shost->active_mode = MODE_INITIATOR; | 413 | shost->active_mode = MODE_INITIATOR; |
@@ -444,9 +455,19 @@ struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *sht, int privsize) | |||
444 | goto fail_kfree; | 455 | goto fail_kfree; |
445 | } | 456 | } |
446 | 457 | ||
458 | shost->tmf_work_q = alloc_workqueue("scsi_tmf_%d", | ||
459 | WQ_UNBOUND | WQ_MEM_RECLAIM, | ||
460 | 1, shost->host_no); | ||
461 | if (!shost->tmf_work_q) { | ||
462 | printk(KERN_WARNING "scsi%d: failed to create tmf workq\n", | ||
463 | shost->host_no); | ||
464 | goto fail_kthread; | ||
465 | } | ||
447 | scsi_proc_hostdir_add(shost->hostt); | 466 | scsi_proc_hostdir_add(shost->hostt); |
448 | return shost; | 467 | return shost; |
449 | 468 | ||
469 | fail_kthread: | ||
470 | kthread_stop(shost->ehandler); | ||
450 | fail_kfree: | 471 | fail_kfree: |
451 | kfree(shost); | 472 | kfree(shost); |
452 | return NULL; | 473 | return NULL; |
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c index 20a5e6ecf945..868318a7067c 100644 --- a/drivers/scsi/hpsa.c +++ b/drivers/scsi/hpsa.c | |||
@@ -29,7 +29,6 @@ | |||
29 | #include <linux/delay.h> | 29 | #include <linux/delay.h> |
30 | #include <linux/fs.h> | 30 | #include <linux/fs.h> |
31 | #include <linux/timer.h> | 31 | #include <linux/timer.h> |
32 | #include <linux/seq_file.h> | ||
33 | #include <linux/init.h> | 32 | #include <linux/init.h> |
34 | #include <linux/spinlock.h> | 33 | #include <linux/spinlock.h> |
35 | #include <linux/compat.h> | 34 | #include <linux/compat.h> |
@@ -96,7 +95,6 @@ static const struct pci_device_id hpsa_pci_device_id[] = { | |||
96 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, | 95 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, |
97 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, | 96 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, |
98 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, | 97 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, |
99 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334D}, | ||
100 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, | 98 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, |
101 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, | 99 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, |
102 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, | 100 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, |
@@ -143,7 +141,6 @@ static struct board_type products[] = { | |||
143 | {0x3351103C, "Smart Array P420", &SA5_access}, | 141 | {0x3351103C, "Smart Array P420", &SA5_access}, |
144 | {0x3352103C, "Smart Array P421", &SA5_access}, | 142 | {0x3352103C, "Smart Array P421", &SA5_access}, |
145 | {0x3353103C, "Smart Array P822", &SA5_access}, | 143 | {0x3353103C, "Smart Array P822", &SA5_access}, |
146 | {0x334D103C, "Smart Array P822se", &SA5_access}, | ||
147 | {0x3354103C, "Smart Array P420i", &SA5_access}, | 144 | {0x3354103C, "Smart Array P420i", &SA5_access}, |
148 | {0x3355103C, "Smart Array P220i", &SA5_access}, | 145 | {0x3355103C, "Smart Array P220i", &SA5_access}, |
149 | {0x3356103C, "Smart Array P721m", &SA5_access}, | 146 | {0x3356103C, "Smart Array P721m", &SA5_access}, |
@@ -171,10 +168,6 @@ static struct board_type products[] = { | |||
171 | 168 | ||
172 | static int number_of_controllers; | 169 | static int number_of_controllers; |
173 | 170 | ||
174 | static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list); | ||
175 | static spinlock_t lockup_detector_lock; | ||
176 | static struct task_struct *hpsa_lockup_detector; | ||
177 | |||
178 | static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); | 171 | static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); |
179 | static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); | 172 | static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); |
180 | static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); | 173 | static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); |
@@ -1248,10 +1241,8 @@ static void complete_scsi_command(struct CommandList *cp) | |||
1248 | } | 1241 | } |
1249 | 1242 | ||
1250 | if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { | 1243 | if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { |
1251 | if (check_for_unit_attention(h, cp)) { | 1244 | if (check_for_unit_attention(h, cp)) |
1252 | cmd->result = DID_SOFT_ERROR << 16; | ||
1253 | break; | 1245 | break; |
1254 | } | ||
1255 | if (sense_key == ILLEGAL_REQUEST) { | 1246 | if (sense_key == ILLEGAL_REQUEST) { |
1256 | /* | 1247 | /* |
1257 | * SCSI REPORT_LUNS is commonly unsupported on | 1248 | * SCSI REPORT_LUNS is commonly unsupported on |
@@ -1783,6 +1774,7 @@ static unsigned char *ext_target_model[] = { | |||
1783 | "MSA2312", | 1774 | "MSA2312", |
1784 | "MSA2324", | 1775 | "MSA2324", |
1785 | "P2000 G3 SAS", | 1776 | "P2000 G3 SAS", |
1777 | "MSA 2040 SAS", | ||
1786 | NULL, | 1778 | NULL, |
1787 | }; | 1779 | }; |
1788 | 1780 | ||
@@ -3171,7 +3163,7 @@ static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) | |||
3171 | hpsa_pci_unmap(h->pdev, c, i, | 3163 | hpsa_pci_unmap(h->pdev, c, i, |
3172 | PCI_DMA_BIDIRECTIONAL); | 3164 | PCI_DMA_BIDIRECTIONAL); |
3173 | status = -ENOMEM; | 3165 | status = -ENOMEM; |
3174 | goto cleanup1; | 3166 | goto cleanup0; |
3175 | } | 3167 | } |
3176 | c->SG[i].Addr.lower = temp64.val32.lower; | 3168 | c->SG[i].Addr.lower = temp64.val32.lower; |
3177 | c->SG[i].Addr.upper = temp64.val32.upper; | 3169 | c->SG[i].Addr.upper = temp64.val32.upper; |
@@ -3187,24 +3179,23 @@ static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) | |||
3187 | /* Copy the error information out */ | 3179 | /* Copy the error information out */ |
3188 | memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); | 3180 | memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); |
3189 | if (copy_to_user(argp, ioc, sizeof(*ioc))) { | 3181 | if (copy_to_user(argp, ioc, sizeof(*ioc))) { |
3190 | cmd_special_free(h, c); | ||
3191 | status = -EFAULT; | 3182 | status = -EFAULT; |
3192 | goto cleanup1; | 3183 | goto cleanup0; |
3193 | } | 3184 | } |
3194 | if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) { | 3185 | if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) { |
3195 | /* Copy the data out of the buffer we created */ | 3186 | /* Copy the data out of the buffer we created */ |
3196 | BYTE __user *ptr = ioc->buf; | 3187 | BYTE __user *ptr = ioc->buf; |
3197 | for (i = 0; i < sg_used; i++) { | 3188 | for (i = 0; i < sg_used; i++) { |
3198 | if (copy_to_user(ptr, buff[i], buff_size[i])) { | 3189 | if (copy_to_user(ptr, buff[i], buff_size[i])) { |
3199 | cmd_special_free(h, c); | ||
3200 | status = -EFAULT; | 3190 | status = -EFAULT; |
3201 | goto cleanup1; | 3191 | goto cleanup0; |
3202 | } | 3192 | } |
3203 | ptr += buff_size[i]; | 3193 | ptr += buff_size[i]; |
3204 | } | 3194 | } |
3205 | } | 3195 | } |
3206 | cmd_special_free(h, c); | ||
3207 | status = 0; | 3196 | status = 0; |
3197 | cleanup0: | ||
3198 | cmd_special_free(h, c); | ||
3208 | cleanup1: | 3199 | cleanup1: |
3209 | if (buff) { | 3200 | if (buff) { |
3210 | for (i = 0; i < sg_used; i++) | 3201 | for (i = 0; i < sg_used; i++) |
@@ -3223,6 +3214,36 @@ static void check_ioctl_unit_attention(struct ctlr_info *h, | |||
3223 | c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) | 3214 | c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) |
3224 | (void) check_for_unit_attention(h, c); | 3215 | (void) check_for_unit_attention(h, c); |
3225 | } | 3216 | } |
3217 | |||
3218 | static int increment_passthru_count(struct ctlr_info *h) | ||
3219 | { | ||
3220 | unsigned long flags; | ||
3221 | |||
3222 | spin_lock_irqsave(&h->passthru_count_lock, flags); | ||
3223 | if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) { | ||
3224 | spin_unlock_irqrestore(&h->passthru_count_lock, flags); | ||
3225 | return -1; | ||
3226 | } | ||
3227 | h->passthru_count++; | ||
3228 | spin_unlock_irqrestore(&h->passthru_count_lock, flags); | ||
3229 | return 0; | ||
3230 | } | ||
3231 | |||
3232 | static void decrement_passthru_count(struct ctlr_info *h) | ||
3233 | { | ||
3234 | unsigned long flags; | ||
3235 | |||
3236 | spin_lock_irqsave(&h->passthru_count_lock, flags); | ||
3237 | if (h->passthru_count <= 0) { | ||
3238 | spin_unlock_irqrestore(&h->passthru_count_lock, flags); | ||
3239 | /* not expecting to get here. */ | ||
3240 | dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n"); | ||
3241 | return; | ||
3242 | } | ||
3243 | h->passthru_count--; | ||
3244 | spin_unlock_irqrestore(&h->passthru_count_lock, flags); | ||
3245 | } | ||
3246 | |||
3226 | /* | 3247 | /* |
3227 | * ioctl | 3248 | * ioctl |
3228 | */ | 3249 | */ |
@@ -3230,6 +3251,7 @@ static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) | |||
3230 | { | 3251 | { |
3231 | struct ctlr_info *h; | 3252 | struct ctlr_info *h; |
3232 | void __user *argp = (void __user *)arg; | 3253 | void __user *argp = (void __user *)arg; |
3254 | int rc; | ||
3233 | 3255 | ||
3234 | h = sdev_to_hba(dev); | 3256 | h = sdev_to_hba(dev); |
3235 | 3257 | ||
@@ -3244,9 +3266,17 @@ static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) | |||
3244 | case CCISS_GETDRIVVER: | 3266 | case CCISS_GETDRIVVER: |
3245 | return hpsa_getdrivver_ioctl(h, argp); | 3267 | return hpsa_getdrivver_ioctl(h, argp); |
3246 | case CCISS_PASSTHRU: | 3268 | case CCISS_PASSTHRU: |
3247 | return hpsa_passthru_ioctl(h, argp); | 3269 | if (increment_passthru_count(h)) |
3270 | return -EAGAIN; | ||
3271 | rc = hpsa_passthru_ioctl(h, argp); | ||
3272 | decrement_passthru_count(h); | ||
3273 | return rc; | ||
3248 | case CCISS_BIG_PASSTHRU: | 3274 | case CCISS_BIG_PASSTHRU: |
3249 | return hpsa_big_passthru_ioctl(h, argp); | 3275 | if (increment_passthru_count(h)) |
3276 | return -EAGAIN; | ||
3277 | rc = hpsa_big_passthru_ioctl(h, argp); | ||
3278 | decrement_passthru_count(h); | ||
3279 | return rc; | ||
3250 | default: | 3280 | default: |
3251 | return -ENOTTY; | 3281 | return -ENOTTY; |
3252 | } | 3282 | } |
@@ -3445,9 +3475,11 @@ static void start_io(struct ctlr_info *h) | |||
3445 | c = list_entry(h->reqQ.next, struct CommandList, list); | 3475 | c = list_entry(h->reqQ.next, struct CommandList, list); |
3446 | /* can't do anything if fifo is full */ | 3476 | /* can't do anything if fifo is full */ |
3447 | if ((h->access.fifo_full(h))) { | 3477 | if ((h->access.fifo_full(h))) { |
3478 | h->fifo_recently_full = 1; | ||
3448 | dev_warn(&h->pdev->dev, "fifo full\n"); | 3479 | dev_warn(&h->pdev->dev, "fifo full\n"); |
3449 | break; | 3480 | break; |
3450 | } | 3481 | } |
3482 | h->fifo_recently_full = 0; | ||
3451 | 3483 | ||
3452 | /* Get the first entry from the Request Q */ | 3484 | /* Get the first entry from the Request Q */ |
3453 | removeQ(c); | 3485 | removeQ(c); |
@@ -3501,15 +3533,41 @@ static inline int bad_tag(struct ctlr_info *h, u32 tag_index, | |||
3501 | static inline void finish_cmd(struct CommandList *c) | 3533 | static inline void finish_cmd(struct CommandList *c) |
3502 | { | 3534 | { |
3503 | unsigned long flags; | 3535 | unsigned long flags; |
3536 | int io_may_be_stalled = 0; | ||
3537 | struct ctlr_info *h = c->h; | ||
3504 | 3538 | ||
3505 | spin_lock_irqsave(&c->h->lock, flags); | 3539 | spin_lock_irqsave(&h->lock, flags); |
3506 | removeQ(c); | 3540 | removeQ(c); |
3507 | spin_unlock_irqrestore(&c->h->lock, flags); | 3541 | |
3542 | /* | ||
3543 | * Check for possibly stalled i/o. | ||
3544 | * | ||
3545 | * If a fifo_full condition is encountered, requests will back up | ||
3546 | * in h->reqQ. This queue is only emptied out by start_io which is | ||
3547 | * only called when a new i/o request comes in. If no i/o's are | ||
3548 | * forthcoming, the i/o's in h->reqQ can get stuck. So we call | ||
3549 | * start_io from here if we detect such a danger. | ||
3550 | * | ||
3551 | * Normally, we shouldn't hit this case, but pounding on the | ||
3552 | * CCISS_PASSTHRU ioctl can provoke it. Only call start_io if | ||
3553 | * commands_outstanding is low. We want to avoid calling | ||
3554 | * start_io from in here as much as possible, and esp. don't | ||
3555 | * want to get in a cycle where we call start_io every time | ||
3556 | * through here. | ||
3557 | */ | ||
3558 | if (unlikely(h->fifo_recently_full) && | ||
3559 | h->commands_outstanding < 5) | ||
3560 | io_may_be_stalled = 1; | ||
3561 | |||
3562 | spin_unlock_irqrestore(&h->lock, flags); | ||
3563 | |||
3508 | dial_up_lockup_detection_on_fw_flash_complete(c->h, c); | 3564 | dial_up_lockup_detection_on_fw_flash_complete(c->h, c); |
3509 | if (likely(c->cmd_type == CMD_SCSI)) | 3565 | if (likely(c->cmd_type == CMD_SCSI)) |
3510 | complete_scsi_command(c); | 3566 | complete_scsi_command(c); |
3511 | else if (c->cmd_type == CMD_IOCTL_PEND) | 3567 | else if (c->cmd_type == CMD_IOCTL_PEND) |
3512 | complete(c->waiting); | 3568 | complete(c->waiting); |
3569 | if (unlikely(io_may_be_stalled)) | ||
3570 | start_io(h); | ||
3513 | } | 3571 | } |
3514 | 3572 | ||
3515 | static inline u32 hpsa_tag_contains_index(u32 tag) | 3573 | static inline u32 hpsa_tag_contains_index(u32 tag) |
@@ -3785,6 +3843,13 @@ static int hpsa_controller_hard_reset(struct pci_dev *pdev, | |||
3785 | */ | 3843 | */ |
3786 | dev_info(&pdev->dev, "using doorbell to reset controller\n"); | 3844 | dev_info(&pdev->dev, "using doorbell to reset controller\n"); |
3787 | writel(use_doorbell, vaddr + SA5_DOORBELL); | 3845 | writel(use_doorbell, vaddr + SA5_DOORBELL); |
3846 | |||
3847 | /* PMC hardware guys tell us we need a 5 second delay after | ||
3848 | * doorbell reset and before any attempt to talk to the board | ||
3849 | * at all to ensure that this actually works and doesn't fall | ||
3850 | * over in some weird corner cases. | ||
3851 | */ | ||
3852 | msleep(5000); | ||
3788 | } else { /* Try to do it the PCI power state way */ | 3853 | } else { /* Try to do it the PCI power state way */ |
3789 | 3854 | ||
3790 | /* Quoting from the Open CISS Specification: "The Power | 3855 | /* Quoting from the Open CISS Specification: "The Power |
@@ -3981,16 +4046,6 @@ static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev) | |||
3981 | need a little pause here */ | 4046 | need a little pause here */ |
3982 | msleep(HPSA_POST_RESET_PAUSE_MSECS); | 4047 | msleep(HPSA_POST_RESET_PAUSE_MSECS); |
3983 | 4048 | ||
3984 | /* Wait for board to become not ready, then ready. */ | ||
3985 | dev_info(&pdev->dev, "Waiting for board to reset.\n"); | ||
3986 | rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); | ||
3987 | if (rc) { | ||
3988 | dev_warn(&pdev->dev, | ||
3989 | "failed waiting for board to reset." | ||
3990 | " Will try soft reset.\n"); | ||
3991 | rc = -ENOTSUPP; /* Not expected, but try soft reset later */ | ||
3992 | goto unmap_cfgtable; | ||
3993 | } | ||
3994 | rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); | 4049 | rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); |
3995 | if (rc) { | 4050 | if (rc) { |
3996 | dev_warn(&pdev->dev, | 4051 | dev_warn(&pdev->dev, |
@@ -4308,16 +4363,17 @@ static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) | |||
4308 | return true; | 4363 | return true; |
4309 | } | 4364 | } |
4310 | 4365 | ||
4311 | /* Need to enable prefetch in the SCSI core for 6400 in x86 */ | 4366 | static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) |
4312 | static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h) | ||
4313 | { | 4367 | { |
4314 | #ifdef CONFIG_X86 | 4368 | u32 driver_support; |
4315 | u32 prefetch; | ||
4316 | 4369 | ||
4317 | prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); | 4370 | #ifdef CONFIG_X86 |
4318 | prefetch |= 0x100; | 4371 | /* Need to enable prefetch in the SCSI core for 6400 in x86 */ |
4319 | writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); | 4372 | driver_support = readl(&(h->cfgtable->driver_support)); |
4373 | driver_support |= ENABLE_SCSI_PREFETCH; | ||
4320 | #endif | 4374 | #endif |
4375 | driver_support |= ENABLE_UNIT_ATTN; | ||
4376 | writel(driver_support, &(h->cfgtable->driver_support)); | ||
4321 | } | 4377 | } |
4322 | 4378 | ||
4323 | /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result | 4379 | /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result |
@@ -4427,7 +4483,7 @@ static int hpsa_pci_init(struct ctlr_info *h) | |||
4427 | err = -ENODEV; | 4483 | err = -ENODEV; |
4428 | goto err_out_free_res; | 4484 | goto err_out_free_res; |
4429 | } | 4485 | } |
4430 | hpsa_enable_scsi_prefetch(h); | 4486 | hpsa_set_driver_support_bits(h); |
4431 | hpsa_p600_dma_prefetch_quirk(h); | 4487 | hpsa_p600_dma_prefetch_quirk(h); |
4432 | err = hpsa_enter_simple_mode(h); | 4488 | err = hpsa_enter_simple_mode(h); |
4433 | if (err) | 4489 | if (err) |
@@ -4638,16 +4694,6 @@ static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) | |||
4638 | kfree(h); | 4694 | kfree(h); |
4639 | } | 4695 | } |
4640 | 4696 | ||
4641 | static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h) | ||
4642 | { | ||
4643 | assert_spin_locked(&lockup_detector_lock); | ||
4644 | if (!hpsa_lockup_detector) | ||
4645 | return; | ||
4646 | if (h->lockup_detected) | ||
4647 | return; /* already stopped the lockup detector */ | ||
4648 | list_del(&h->lockup_list); | ||
4649 | } | ||
4650 | |||
4651 | /* Called when controller lockup detected. */ | 4697 | /* Called when controller lockup detected. */ |
4652 | static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list) | 4698 | static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list) |
4653 | { | 4699 | { |
@@ -4666,8 +4712,6 @@ static void controller_lockup_detected(struct ctlr_info *h) | |||
4666 | { | 4712 | { |
4667 | unsigned long flags; | 4713 | unsigned long flags; |
4668 | 4714 | ||
4669 | assert_spin_locked(&lockup_detector_lock); | ||
4670 | remove_ctlr_from_lockup_detector_list(h); | ||
4671 | h->access.set_intr_mask(h, HPSA_INTR_OFF); | 4715 | h->access.set_intr_mask(h, HPSA_INTR_OFF); |
4672 | spin_lock_irqsave(&h->lock, flags); | 4716 | spin_lock_irqsave(&h->lock, flags); |
4673 | h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); | 4717 | h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); |
@@ -4687,7 +4731,6 @@ static void detect_controller_lockup(struct ctlr_info *h) | |||
4687 | u32 heartbeat; | 4731 | u32 heartbeat; |
4688 | unsigned long flags; | 4732 | unsigned long flags; |
4689 | 4733 | ||
4690 | assert_spin_locked(&lockup_detector_lock); | ||
4691 | now = get_jiffies_64(); | 4734 | now = get_jiffies_64(); |
4692 | /* If we've received an interrupt recently, we're ok. */ | 4735 | /* If we've received an interrupt recently, we're ok. */ |
4693 | if (time_after64(h->last_intr_timestamp + | 4736 | if (time_after64(h->last_intr_timestamp + |
@@ -4717,68 +4760,22 @@ static void detect_controller_lockup(struct ctlr_info *h) | |||
4717 | h->last_heartbeat_timestamp = now; | 4760 | h->last_heartbeat_timestamp = now; |
4718 | } | 4761 | } |
4719 | 4762 | ||
4720 | static int detect_controller_lockup_thread(void *notused) | 4763 | static void hpsa_monitor_ctlr_worker(struct work_struct *work) |
4721 | { | 4764 | { |
4722 | struct ctlr_info *h; | ||
4723 | unsigned long flags; | 4765 | unsigned long flags; |
4724 | 4766 | struct ctlr_info *h = container_of(to_delayed_work(work), | |
4725 | while (1) { | 4767 | struct ctlr_info, monitor_ctlr_work); |
4726 | struct list_head *this, *tmp; | 4768 | detect_controller_lockup(h); |
4727 | 4769 | if (h->lockup_detected) | |
4728 | schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL); | 4770 | return; |
4729 | if (kthread_should_stop()) | 4771 | spin_lock_irqsave(&h->lock, flags); |
4730 | break; | 4772 | if (h->remove_in_progress) { |
4731 | spin_lock_irqsave(&lockup_detector_lock, flags); | 4773 | spin_unlock_irqrestore(&h->lock, flags); |
4732 | list_for_each_safe(this, tmp, &hpsa_ctlr_list) { | ||
4733 | h = list_entry(this, struct ctlr_info, lockup_list); | ||
4734 | detect_controller_lockup(h); | ||
4735 | } | ||
4736 | spin_unlock_irqrestore(&lockup_detector_lock, flags); | ||
4737 | } | ||
4738 | return 0; | ||
4739 | } | ||
4740 | |||
4741 | static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h) | ||
4742 | { | ||
4743 | unsigned long flags; | ||
4744 | |||
4745 | h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; | ||
4746 | spin_lock_irqsave(&lockup_detector_lock, flags); | ||
4747 | list_add_tail(&h->lockup_list, &hpsa_ctlr_list); | ||
4748 | spin_unlock_irqrestore(&lockup_detector_lock, flags); | ||
4749 | } | ||
4750 | |||
4751 | static void start_controller_lockup_detector(struct ctlr_info *h) | ||
4752 | { | ||
4753 | /* Start the lockup detector thread if not already started */ | ||
4754 | if (!hpsa_lockup_detector) { | ||
4755 | spin_lock_init(&lockup_detector_lock); | ||
4756 | hpsa_lockup_detector = | ||
4757 | kthread_run(detect_controller_lockup_thread, | ||
4758 | NULL, HPSA); | ||
4759 | } | ||
4760 | if (!hpsa_lockup_detector) { | ||
4761 | dev_warn(&h->pdev->dev, | ||
4762 | "Could not start lockup detector thread\n"); | ||
4763 | return; | 4774 | return; |
4764 | } | 4775 | } |
4765 | add_ctlr_to_lockup_detector_list(h); | 4776 | schedule_delayed_work(&h->monitor_ctlr_work, |
4766 | } | 4777 | h->heartbeat_sample_interval); |
4767 | 4778 | spin_unlock_irqrestore(&h->lock, flags); | |
4768 | static void stop_controller_lockup_detector(struct ctlr_info *h) | ||
4769 | { | ||
4770 | unsigned long flags; | ||
4771 | |||
4772 | spin_lock_irqsave(&lockup_detector_lock, flags); | ||
4773 | remove_ctlr_from_lockup_detector_list(h); | ||
4774 | /* If the list of ctlr's to monitor is empty, stop the thread */ | ||
4775 | if (list_empty(&hpsa_ctlr_list)) { | ||
4776 | spin_unlock_irqrestore(&lockup_detector_lock, flags); | ||
4777 | kthread_stop(hpsa_lockup_detector); | ||
4778 | spin_lock_irqsave(&lockup_detector_lock, flags); | ||
4779 | hpsa_lockup_detector = NULL; | ||
4780 | } | ||
4781 | spin_unlock_irqrestore(&lockup_detector_lock, flags); | ||
4782 | } | 4779 | } |
4783 | 4780 | ||
4784 | static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | 4781 | static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
@@ -4822,6 +4819,7 @@ reinit_after_soft_reset: | |||
4822 | INIT_LIST_HEAD(&h->reqQ); | 4819 | INIT_LIST_HEAD(&h->reqQ); |
4823 | spin_lock_init(&h->lock); | 4820 | spin_lock_init(&h->lock); |
4824 | spin_lock_init(&h->scan_lock); | 4821 | spin_lock_init(&h->scan_lock); |
4822 | spin_lock_init(&h->passthru_count_lock); | ||
4825 | rc = hpsa_pci_init(h); | 4823 | rc = hpsa_pci_init(h); |
4826 | if (rc != 0) | 4824 | if (rc != 0) |
4827 | goto clean1; | 4825 | goto clean1; |
@@ -4925,7 +4923,12 @@ reinit_after_soft_reset: | |||
4925 | 4923 | ||
4926 | hpsa_hba_inquiry(h); | 4924 | hpsa_hba_inquiry(h); |
4927 | hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ | 4925 | hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ |
4928 | start_controller_lockup_detector(h); | 4926 | |
4927 | /* Monitor the controller for firmware lockups */ | ||
4928 | h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; | ||
4929 | INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); | ||
4930 | schedule_delayed_work(&h->monitor_ctlr_work, | ||
4931 | h->heartbeat_sample_interval); | ||
4929 | return 0; | 4932 | return 0; |
4930 | 4933 | ||
4931 | clean4: | 4934 | clean4: |
@@ -4942,6 +4945,15 @@ static void hpsa_flush_cache(struct ctlr_info *h) | |||
4942 | { | 4945 | { |
4943 | char *flush_buf; | 4946 | char *flush_buf; |
4944 | struct CommandList *c; | 4947 | struct CommandList *c; |
4948 | unsigned long flags; | ||
4949 | |||
4950 | /* Don't bother trying to flush the cache if locked up */ | ||
4951 | spin_lock_irqsave(&h->lock, flags); | ||
4952 | if (unlikely(h->lockup_detected)) { | ||
4953 | spin_unlock_irqrestore(&h->lock, flags); | ||
4954 | return; | ||
4955 | } | ||
4956 | spin_unlock_irqrestore(&h->lock, flags); | ||
4945 | 4957 | ||
4946 | flush_buf = kzalloc(4, GFP_KERNEL); | 4958 | flush_buf = kzalloc(4, GFP_KERNEL); |
4947 | if (!flush_buf) | 4959 | if (!flush_buf) |
@@ -4991,13 +5003,20 @@ static void hpsa_free_device_info(struct ctlr_info *h) | |||
4991 | static void hpsa_remove_one(struct pci_dev *pdev) | 5003 | static void hpsa_remove_one(struct pci_dev *pdev) |
4992 | { | 5004 | { |
4993 | struct ctlr_info *h; | 5005 | struct ctlr_info *h; |
5006 | unsigned long flags; | ||
4994 | 5007 | ||
4995 | if (pci_get_drvdata(pdev) == NULL) { | 5008 | if (pci_get_drvdata(pdev) == NULL) { |
4996 | dev_err(&pdev->dev, "unable to remove device\n"); | 5009 | dev_err(&pdev->dev, "unable to remove device\n"); |
4997 | return; | 5010 | return; |
4998 | } | 5011 | } |
4999 | h = pci_get_drvdata(pdev); | 5012 | h = pci_get_drvdata(pdev); |
5000 | stop_controller_lockup_detector(h); | 5013 | |
5014 | /* Get rid of any controller monitoring work items */ | ||
5015 | spin_lock_irqsave(&h->lock, flags); | ||
5016 | h->remove_in_progress = 1; | ||
5017 | cancel_delayed_work(&h->monitor_ctlr_work); | ||
5018 | spin_unlock_irqrestore(&h->lock, flags); | ||
5019 | |||
5001 | hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ | 5020 | hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ |
5002 | hpsa_shutdown(pdev); | 5021 | hpsa_shutdown(pdev); |
5003 | iounmap(h->vaddr); | 5022 | iounmap(h->vaddr); |
diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h index bc85e7244f40..01c328349c83 100644 --- a/drivers/scsi/hpsa.h +++ b/drivers/scsi/hpsa.h | |||
@@ -114,6 +114,11 @@ struct ctlr_info { | |||
114 | struct TransTable_struct *transtable; | 114 | struct TransTable_struct *transtable; |
115 | unsigned long transMethod; | 115 | unsigned long transMethod; |
116 | 116 | ||
117 | /* cap concurrent passthrus at some reasonable maximum */ | ||
118 | #define HPSA_MAX_CONCURRENT_PASSTHRUS (20) | ||
119 | spinlock_t passthru_count_lock; /* protects passthru_count */ | ||
120 | int passthru_count; | ||
121 | |||
117 | /* | 122 | /* |
118 | * Performant mode completion buffers | 123 | * Performant mode completion buffers |
119 | */ | 124 | */ |
@@ -130,7 +135,9 @@ struct ctlr_info { | |||
130 | u32 heartbeat_sample_interval; | 135 | u32 heartbeat_sample_interval; |
131 | atomic_t firmware_flash_in_progress; | 136 | atomic_t firmware_flash_in_progress; |
132 | u32 lockup_detected; | 137 | u32 lockup_detected; |
133 | struct list_head lockup_list; | 138 | struct delayed_work monitor_ctlr_work; |
139 | int remove_in_progress; | ||
140 | u32 fifo_recently_full; | ||
134 | /* Address of h->q[x] is passed to intr handler to know which queue */ | 141 | /* Address of h->q[x] is passed to intr handler to know which queue */ |
135 | u8 q[MAX_REPLY_QUEUES]; | 142 | u8 q[MAX_REPLY_QUEUES]; |
136 | u32 TMFSupportFlags; /* cache what task mgmt funcs are supported. */ | 143 | u32 TMFSupportFlags; /* cache what task mgmt funcs are supported. */ |
diff --git a/drivers/scsi/hpsa_cmd.h b/drivers/scsi/hpsa_cmd.h index a894f2eca7ac..bfc8c4ea66f8 100644 --- a/drivers/scsi/hpsa_cmd.h +++ b/drivers/scsi/hpsa_cmd.h | |||
@@ -356,7 +356,9 @@ struct CfgTable { | |||
356 | u32 TransMethodOffset; | 356 | u32 TransMethodOffset; |
357 | u8 ServerName[16]; | 357 | u8 ServerName[16]; |
358 | u32 HeartBeat; | 358 | u32 HeartBeat; |
359 | u32 SCSI_Prefetch; | 359 | u32 driver_support; |
360 | #define ENABLE_SCSI_PREFETCH 0x100 | ||
361 | #define ENABLE_UNIT_ATTN 0x01 | ||
360 | u32 MaxScatterGatherElements; | 362 | u32 MaxScatterGatherElements; |
361 | u32 MaxLogicalUnits; | 363 | u32 MaxLogicalUnits; |
362 | u32 MaxPhysicalDevices; | 364 | u32 MaxPhysicalDevices; |
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c index 573f4128b6b6..3f5b56a99892 100644 --- a/drivers/scsi/ipr.c +++ b/drivers/scsi/ipr.c | |||
@@ -220,7 +220,7 @@ module_param_named(max_devs, ipr_max_devs, int, 0); | |||
220 | MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. " | 220 | MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. " |
221 | "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]"); | 221 | "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]"); |
222 | module_param_named(number_of_msix, ipr_number_of_msix, int, 0); | 222 | module_param_named(number_of_msix, ipr_number_of_msix, int, 0); |
223 | MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 5). (default:2)"); | 223 | MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 16). (default:2)"); |
224 | MODULE_LICENSE("GPL"); | 224 | MODULE_LICENSE("GPL"); |
225 | MODULE_VERSION(IPR_DRIVER_VERSION); | 225 | MODULE_VERSION(IPR_DRIVER_VERSION); |
226 | 226 | ||
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h index cad1483f05da..9ce38a22647e 100644 --- a/drivers/scsi/ipr.h +++ b/drivers/scsi/ipr.h | |||
@@ -301,7 +301,7 @@ IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR) | |||
301 | * Dump literals | 301 | * Dump literals |
302 | */ | 302 | */ |
303 | #define IPR_FMT2_MAX_IOA_DUMP_SIZE (4 * 1024 * 1024) | 303 | #define IPR_FMT2_MAX_IOA_DUMP_SIZE (4 * 1024 * 1024) |
304 | #define IPR_FMT3_MAX_IOA_DUMP_SIZE (32 * 1024 * 1024) | 304 | #define IPR_FMT3_MAX_IOA_DUMP_SIZE (80 * 1024 * 1024) |
305 | #define IPR_FMT2_NUM_SDT_ENTRIES 511 | 305 | #define IPR_FMT2_NUM_SDT_ENTRIES 511 |
306 | #define IPR_FMT3_NUM_SDT_ENTRIES 0xFFF | 306 | #define IPR_FMT3_NUM_SDT_ENTRIES 0xFFF |
307 | #define IPR_FMT2_MAX_NUM_DUMP_PAGES ((IPR_FMT2_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1) | 307 | #define IPR_FMT2_MAX_NUM_DUMP_PAGES ((IPR_FMT2_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1) |
@@ -311,7 +311,7 @@ IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR) | |||
311 | * Misc literals | 311 | * Misc literals |
312 | */ | 312 | */ |
313 | #define IPR_NUM_IOADL_ENTRIES IPR_MAX_SGLIST | 313 | #define IPR_NUM_IOADL_ENTRIES IPR_MAX_SGLIST |
314 | #define IPR_MAX_MSIX_VECTORS 0x5 | 314 | #define IPR_MAX_MSIX_VECTORS 0x10 |
315 | #define IPR_MAX_HRRQ_NUM 0x10 | 315 | #define IPR_MAX_HRRQ_NUM 0x10 |
316 | #define IPR_INIT_HRRQ 0x0 | 316 | #define IPR_INIT_HRRQ 0x0 |
317 | 317 | ||
diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c index e3995612ea76..40462415291e 100644 --- a/drivers/scsi/libiscsi.c +++ b/drivers/scsi/libiscsi.c | |||
@@ -2945,6 +2945,7 @@ void iscsi_conn_teardown(struct iscsi_cls_conn *cls_conn) | |||
2945 | free_pages((unsigned long) conn->data, | 2945 | free_pages((unsigned long) conn->data, |
2946 | get_order(ISCSI_DEF_MAX_RECV_SEG_LEN)); | 2946 | get_order(ISCSI_DEF_MAX_RECV_SEG_LEN)); |
2947 | kfree(conn->persistent_address); | 2947 | kfree(conn->persistent_address); |
2948 | kfree(conn->local_ipaddr); | ||
2948 | kfifo_in(&session->cmdpool.queue, (void*)&conn->login_task, | 2949 | kfifo_in(&session->cmdpool.queue, (void*)&conn->login_task, |
2949 | sizeof(void*)); | 2950 | sizeof(void*)); |
2950 | if (session->leadconn == conn) | 2951 | if (session->leadconn == conn) |
@@ -3269,6 +3270,8 @@ int iscsi_set_param(struct iscsi_cls_conn *cls_conn, | |||
3269 | sscanf(buf, "%d", &val); | 3270 | sscanf(buf, "%d", &val); |
3270 | session->discovery_sess = !!val; | 3271 | session->discovery_sess = !!val; |
3271 | break; | 3272 | break; |
3273 | case ISCSI_PARAM_LOCAL_IPADDR: | ||
3274 | return iscsi_switch_str_param(&conn->local_ipaddr, buf); | ||
3272 | default: | 3275 | default: |
3273 | return -ENOSYS; | 3276 | return -ENOSYS; |
3274 | } | 3277 | } |
@@ -3542,6 +3545,9 @@ int iscsi_conn_get_param(struct iscsi_cls_conn *cls_conn, | |||
3542 | case ISCSI_PARAM_TCP_RECV_WSF: | 3545 | case ISCSI_PARAM_TCP_RECV_WSF: |
3543 | len = sprintf(buf, "%u\n", conn->tcp_recv_wsf); | 3546 | len = sprintf(buf, "%u\n", conn->tcp_recv_wsf); |
3544 | break; | 3547 | break; |
3548 | case ISCSI_PARAM_LOCAL_IPADDR: | ||
3549 | len = sprintf(buf, "%s\n", conn->local_ipaddr); | ||
3550 | break; | ||
3545 | default: | 3551 | default: |
3546 | return -ENOSYS; | 3552 | return -ENOSYS; |
3547 | } | 3553 | } |
diff --git a/drivers/scsi/libsas/sas_expander.c b/drivers/scsi/libsas/sas_expander.c index 446b85110a1f..0cac7d8fd0f7 100644 --- a/drivers/scsi/libsas/sas_expander.c +++ b/drivers/scsi/libsas/sas_expander.c | |||
@@ -2163,10 +2163,10 @@ int sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
2163 | } | 2163 | } |
2164 | 2164 | ||
2165 | /* do we need to support multiple segments? */ | 2165 | /* do we need to support multiple segments? */ |
2166 | if (bio_segments(req->bio) > 1 || bio_segments(rsp->bio) > 1) { | 2166 | if (bio_multiple_segments(req->bio) || |
2167 | printk("%s: multiple segments req %u %u, rsp %u %u\n", | 2167 | bio_multiple_segments(rsp->bio)) { |
2168 | __func__, bio_segments(req->bio), blk_rq_bytes(req), | 2168 | printk("%s: multiple segments req %u, rsp %u\n", |
2169 | bio_segments(rsp->bio), blk_rq_bytes(rsp)); | 2169 | __func__, blk_rq_bytes(req), blk_rq_bytes(rsp)); |
2170 | return -EINVAL; | 2170 | return -EINVAL; |
2171 | } | 2171 | } |
2172 | 2172 | ||
diff --git a/drivers/scsi/lpfc/lpfc_debugfs.c b/drivers/scsi/lpfc/lpfc_debugfs.c index 60084e6ad2f2..b800cc952ca6 100644 --- a/drivers/scsi/lpfc/lpfc_debugfs.c +++ b/drivers/scsi/lpfc/lpfc_debugfs.c | |||
@@ -4001,7 +4001,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport) | |||
4001 | goto debug_failed; | 4001 | goto debug_failed; |
4002 | } | 4002 | } |
4003 | } else | 4003 | } else |
4004 | phba->debug_dumpHBASlim = NULL; | 4004 | phba->debug_dumpHostSlim = NULL; |
4005 | 4005 | ||
4006 | /* Setup dumpData */ | 4006 | /* Setup dumpData */ |
4007 | snprintf(name, sizeof(name), "dumpData"); | 4007 | snprintf(name, sizeof(name), "dumpData"); |
diff --git a/drivers/scsi/mac_scsi.c b/drivers/scsi/mac_scsi.c index 858075723c87..f5cdc68cd5b6 100644 --- a/drivers/scsi/mac_scsi.c +++ b/drivers/scsi/mac_scsi.c | |||
@@ -260,6 +260,8 @@ int __init macscsi_detect(struct scsi_host_template * tpnt) | |||
260 | /* Once we support multiple 5380s (e.g. DuoDock) we'll do | 260 | /* Once we support multiple 5380s (e.g. DuoDock) we'll do |
261 | something different here */ | 261 | something different here */ |
262 | instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata)); | 262 | instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata)); |
263 | if (instance == NULL) | ||
264 | return 0; | ||
263 | 265 | ||
264 | if (macintosh_config->ident == MAC_MODEL_IIFX) { | 266 | if (macintosh_config->ident == MAC_MODEL_IIFX) { |
265 | mac_scsi_regp = via1+0x8000; | 267 | mac_scsi_regp = via1+0x8000; |
diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h index e9e543c58485..34452ea386ac 100644 --- a/drivers/scsi/megaraid/megaraid_sas.h +++ b/drivers/scsi/megaraid/megaraid_sas.h | |||
@@ -1527,7 +1527,6 @@ struct megasas_instance { | |||
1527 | u32 *reply_queue; | 1527 | u32 *reply_queue; |
1528 | dma_addr_t reply_queue_h; | 1528 | dma_addr_t reply_queue_h; |
1529 | 1529 | ||
1530 | unsigned long base_addr; | ||
1531 | struct megasas_register_set __iomem *reg_set; | 1530 | struct megasas_register_set __iomem *reg_set; |
1532 | u32 *reply_post_host_index_addr[MR_MAX_MSIX_REG_ARRAY]; | 1531 | u32 *reply_post_host_index_addr[MR_MAX_MSIX_REG_ARRAY]; |
1533 | struct megasas_pd_list pd_list[MEGASAS_MAX_PD]; | 1532 | struct megasas_pd_list pd_list[MEGASAS_MAX_PD]; |
diff --git a/drivers/scsi/megaraid/megaraid_sas_base.c b/drivers/scsi/megaraid/megaraid_sas_base.c index c99812bf2a73..3b7ad10497fe 100644 --- a/drivers/scsi/megaraid/megaraid_sas_base.c +++ b/drivers/scsi/megaraid/megaraid_sas_base.c | |||
@@ -3615,6 +3615,7 @@ static int megasas_init_fw(struct megasas_instance *instance) | |||
3615 | u32 max_sectors_1; | 3615 | u32 max_sectors_1; |
3616 | u32 max_sectors_2; | 3616 | u32 max_sectors_2; |
3617 | u32 tmp_sectors, msix_enable, scratch_pad_2; | 3617 | u32 tmp_sectors, msix_enable, scratch_pad_2; |
3618 | resource_size_t base_addr; | ||
3618 | struct megasas_register_set __iomem *reg_set; | 3619 | struct megasas_register_set __iomem *reg_set; |
3619 | struct megasas_ctrl_info *ctrl_info; | 3620 | struct megasas_ctrl_info *ctrl_info; |
3620 | unsigned long bar_list; | 3621 | unsigned long bar_list; |
@@ -3623,14 +3624,14 @@ static int megasas_init_fw(struct megasas_instance *instance) | |||
3623 | /* Find first memory bar */ | 3624 | /* Find first memory bar */ |
3624 | bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM); | 3625 | bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM); |
3625 | instance->bar = find_first_bit(&bar_list, sizeof(unsigned long)); | 3626 | instance->bar = find_first_bit(&bar_list, sizeof(unsigned long)); |
3626 | instance->base_addr = pci_resource_start(instance->pdev, instance->bar); | ||
3627 | if (pci_request_selected_regions(instance->pdev, instance->bar, | 3627 | if (pci_request_selected_regions(instance->pdev, instance->bar, |
3628 | "megasas: LSI")) { | 3628 | "megasas: LSI")) { |
3629 | printk(KERN_DEBUG "megasas: IO memory region busy!\n"); | 3629 | printk(KERN_DEBUG "megasas: IO memory region busy!\n"); |
3630 | return -EBUSY; | 3630 | return -EBUSY; |
3631 | } | 3631 | } |
3632 | 3632 | ||
3633 | instance->reg_set = ioremap_nocache(instance->base_addr, 8192); | 3633 | base_addr = pci_resource_start(instance->pdev, instance->bar); |
3634 | instance->reg_set = ioremap_nocache(base_addr, 8192); | ||
3634 | 3635 | ||
3635 | if (!instance->reg_set) { | 3636 | if (!instance->reg_set) { |
3636 | printk(KERN_DEBUG "megasas: Failed to map IO mem\n"); | 3637 | printk(KERN_DEBUG "megasas: Failed to map IO mem\n"); |
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c index 3901edc35812..bde63f7452bd 100644 --- a/drivers/scsi/mpt2sas/mpt2sas_base.c +++ b/drivers/scsi/mpt2sas/mpt2sas_base.c | |||
@@ -128,7 +128,7 @@ static int mpt2sas_remove_dead_ioc_func(void *arg) | |||
128 | pdev = ioc->pdev; | 128 | pdev = ioc->pdev; |
129 | if ((pdev == NULL)) | 129 | if ((pdev == NULL)) |
130 | return -1; | 130 | return -1; |
131 | pci_stop_and_remove_bus_device(pdev); | 131 | pci_stop_and_remove_bus_device_locked(pdev); |
132 | return 0; | 132 | return 0; |
133 | } | 133 | } |
134 | 134 | ||
diff --git a/drivers/scsi/mpt2sas/mpt2sas_transport.c b/drivers/scsi/mpt2sas/mpt2sas_transport.c index 9d26637308be..410f4a3e8888 100644 --- a/drivers/scsi/mpt2sas/mpt2sas_transport.c +++ b/drivers/scsi/mpt2sas/mpt2sas_transport.c | |||
@@ -1901,7 +1901,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1901 | struct MPT2SAS_ADAPTER *ioc = shost_priv(shost); | 1901 | struct MPT2SAS_ADAPTER *ioc = shost_priv(shost); |
1902 | Mpi2SmpPassthroughRequest_t *mpi_request; | 1902 | Mpi2SmpPassthroughRequest_t *mpi_request; |
1903 | Mpi2SmpPassthroughReply_t *mpi_reply; | 1903 | Mpi2SmpPassthroughReply_t *mpi_reply; |
1904 | int rc, i; | 1904 | int rc; |
1905 | u16 smid; | 1905 | u16 smid; |
1906 | u32 ioc_state; | 1906 | u32 ioc_state; |
1907 | unsigned long timeleft; | 1907 | unsigned long timeleft; |
@@ -1916,7 +1916,8 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1916 | void *pci_addr_out = NULL; | 1916 | void *pci_addr_out = NULL; |
1917 | u16 wait_state_count; | 1917 | u16 wait_state_count; |
1918 | struct request *rsp = req->next_rq; | 1918 | struct request *rsp = req->next_rq; |
1919 | struct bio_vec *bvec = NULL; | 1919 | struct bio_vec bvec; |
1920 | struct bvec_iter iter; | ||
1920 | 1921 | ||
1921 | if (!rsp) { | 1922 | if (!rsp) { |
1922 | printk(MPT2SAS_ERR_FMT "%s: the smp response space is " | 1923 | printk(MPT2SAS_ERR_FMT "%s: the smp response space is " |
@@ -1942,7 +1943,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1942 | ioc->transport_cmds.status = MPT2_CMD_PENDING; | 1943 | ioc->transport_cmds.status = MPT2_CMD_PENDING; |
1943 | 1944 | ||
1944 | /* Check if the request is split across multiple segments */ | 1945 | /* Check if the request is split across multiple segments */ |
1945 | if (bio_segments(req->bio) > 1) { | 1946 | if (bio_multiple_segments(req->bio)) { |
1946 | u32 offset = 0; | 1947 | u32 offset = 0; |
1947 | 1948 | ||
1948 | /* Allocate memory and copy the request */ | 1949 | /* Allocate memory and copy the request */ |
@@ -1955,11 +1956,11 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1955 | goto out; | 1956 | goto out; |
1956 | } | 1957 | } |
1957 | 1958 | ||
1958 | bio_for_each_segment(bvec, req->bio, i) { | 1959 | bio_for_each_segment(bvec, req->bio, iter) { |
1959 | memcpy(pci_addr_out + offset, | 1960 | memcpy(pci_addr_out + offset, |
1960 | page_address(bvec->bv_page) + bvec->bv_offset, | 1961 | page_address(bvec.bv_page) + bvec.bv_offset, |
1961 | bvec->bv_len); | 1962 | bvec.bv_len); |
1962 | offset += bvec->bv_len; | 1963 | offset += bvec.bv_len; |
1963 | } | 1964 | } |
1964 | } else { | 1965 | } else { |
1965 | dma_addr_out = pci_map_single(ioc->pdev, bio_data(req->bio), | 1966 | dma_addr_out = pci_map_single(ioc->pdev, bio_data(req->bio), |
@@ -1974,7 +1975,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1974 | 1975 | ||
1975 | /* Check if the response needs to be populated across | 1976 | /* Check if the response needs to be populated across |
1976 | * multiple segments */ | 1977 | * multiple segments */ |
1977 | if (bio_segments(rsp->bio) > 1) { | 1978 | if (bio_multiple_segments(rsp->bio)) { |
1978 | pci_addr_in = pci_alloc_consistent(ioc->pdev, blk_rq_bytes(rsp), | 1979 | pci_addr_in = pci_alloc_consistent(ioc->pdev, blk_rq_bytes(rsp), |
1979 | &pci_dma_in); | 1980 | &pci_dma_in); |
1980 | if (!pci_addr_in) { | 1981 | if (!pci_addr_in) { |
@@ -2041,7 +2042,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
2041 | sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT | | 2042 | sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT | |
2042 | MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC); | 2043 | MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC); |
2043 | sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT; | 2044 | sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT; |
2044 | if (bio_segments(req->bio) > 1) { | 2045 | if (bio_multiple_segments(req->bio)) { |
2045 | ioc->base_add_sg_single(psge, sgl_flags | | 2046 | ioc->base_add_sg_single(psge, sgl_flags | |
2046 | (blk_rq_bytes(req) - 4), pci_dma_out); | 2047 | (blk_rq_bytes(req) - 4), pci_dma_out); |
2047 | } else { | 2048 | } else { |
@@ -2057,7 +2058,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
2057 | MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER | | 2058 | MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER | |
2058 | MPI2_SGE_FLAGS_END_OF_LIST); | 2059 | MPI2_SGE_FLAGS_END_OF_LIST); |
2059 | sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT; | 2060 | sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT; |
2060 | if (bio_segments(rsp->bio) > 1) { | 2061 | if (bio_multiple_segments(rsp->bio)) { |
2061 | ioc->base_add_sg_single(psge, sgl_flags | | 2062 | ioc->base_add_sg_single(psge, sgl_flags | |
2062 | (blk_rq_bytes(rsp) + 4), pci_dma_in); | 2063 | (blk_rq_bytes(rsp) + 4), pci_dma_in); |
2063 | } else { | 2064 | } else { |
@@ -2102,23 +2103,23 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
2102 | le16_to_cpu(mpi_reply->ResponseDataLength); | 2103 | le16_to_cpu(mpi_reply->ResponseDataLength); |
2103 | /* check if the resp needs to be copied from the allocated | 2104 | /* check if the resp needs to be copied from the allocated |
2104 | * pci mem */ | 2105 | * pci mem */ |
2105 | if (bio_segments(rsp->bio) > 1) { | 2106 | if (bio_multiple_segments(rsp->bio)) { |
2106 | u32 offset = 0; | 2107 | u32 offset = 0; |
2107 | u32 bytes_to_copy = | 2108 | u32 bytes_to_copy = |
2108 | le16_to_cpu(mpi_reply->ResponseDataLength); | 2109 | le16_to_cpu(mpi_reply->ResponseDataLength); |
2109 | bio_for_each_segment(bvec, rsp->bio, i) { | 2110 | bio_for_each_segment(bvec, rsp->bio, iter) { |
2110 | if (bytes_to_copy <= bvec->bv_len) { | 2111 | if (bytes_to_copy <= bvec.bv_len) { |
2111 | memcpy(page_address(bvec->bv_page) + | 2112 | memcpy(page_address(bvec.bv_page) + |
2112 | bvec->bv_offset, pci_addr_in + | 2113 | bvec.bv_offset, pci_addr_in + |
2113 | offset, bytes_to_copy); | 2114 | offset, bytes_to_copy); |
2114 | break; | 2115 | break; |
2115 | } else { | 2116 | } else { |
2116 | memcpy(page_address(bvec->bv_page) + | 2117 | memcpy(page_address(bvec.bv_page) + |
2117 | bvec->bv_offset, pci_addr_in + | 2118 | bvec.bv_offset, pci_addr_in + |
2118 | offset, bvec->bv_len); | 2119 | offset, bvec.bv_len); |
2119 | bytes_to_copy -= bvec->bv_len; | 2120 | bytes_to_copy -= bvec.bv_len; |
2120 | } | 2121 | } |
2121 | offset += bvec->bv_len; | 2122 | offset += bvec.bv_len; |
2122 | } | 2123 | } |
2123 | } | 2124 | } |
2124 | } else { | 2125 | } else { |
diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index fa785062e97b..0cf4f7000f94 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c | |||
@@ -131,7 +131,7 @@ static int mpt3sas_remove_dead_ioc_func(void *arg) | |||
131 | pdev = ioc->pdev; | 131 | pdev = ioc->pdev; |
132 | if ((pdev == NULL)) | 132 | if ((pdev == NULL)) |
133 | return -1; | 133 | return -1; |
134 | pci_stop_and_remove_bus_device(pdev); | 134 | pci_stop_and_remove_bus_device_locked(pdev); |
135 | return 0; | 135 | return 0; |
136 | } | 136 | } |
137 | 137 | ||
diff --git a/drivers/scsi/mpt3sas/mpt3sas_transport.c b/drivers/scsi/mpt3sas/mpt3sas_transport.c index e771a88c6a74..65170cb1a00f 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_transport.c +++ b/drivers/scsi/mpt3sas/mpt3sas_transport.c | |||
@@ -1884,7 +1884,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1884 | struct MPT3SAS_ADAPTER *ioc = shost_priv(shost); | 1884 | struct MPT3SAS_ADAPTER *ioc = shost_priv(shost); |
1885 | Mpi2SmpPassthroughRequest_t *mpi_request; | 1885 | Mpi2SmpPassthroughRequest_t *mpi_request; |
1886 | Mpi2SmpPassthroughReply_t *mpi_reply; | 1886 | Mpi2SmpPassthroughReply_t *mpi_reply; |
1887 | int rc, i; | 1887 | int rc; |
1888 | u16 smid; | 1888 | u16 smid; |
1889 | u32 ioc_state; | 1889 | u32 ioc_state; |
1890 | unsigned long timeleft; | 1890 | unsigned long timeleft; |
@@ -1898,7 +1898,8 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1898 | void *pci_addr_out = NULL; | 1898 | void *pci_addr_out = NULL; |
1899 | u16 wait_state_count; | 1899 | u16 wait_state_count; |
1900 | struct request *rsp = req->next_rq; | 1900 | struct request *rsp = req->next_rq; |
1901 | struct bio_vec *bvec = NULL; | 1901 | struct bio_vec bvec; |
1902 | struct bvec_iter iter; | ||
1902 | 1903 | ||
1903 | if (!rsp) { | 1904 | if (!rsp) { |
1904 | pr_err(MPT3SAS_FMT "%s: the smp response space is missing\n", | 1905 | pr_err(MPT3SAS_FMT "%s: the smp response space is missing\n", |
@@ -1925,7 +1926,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1925 | ioc->transport_cmds.status = MPT3_CMD_PENDING; | 1926 | ioc->transport_cmds.status = MPT3_CMD_PENDING; |
1926 | 1927 | ||
1927 | /* Check if the request is split across multiple segments */ | 1928 | /* Check if the request is split across multiple segments */ |
1928 | if (req->bio->bi_vcnt > 1) { | 1929 | if (bio_multiple_segments(req->bio)) { |
1929 | u32 offset = 0; | 1930 | u32 offset = 0; |
1930 | 1931 | ||
1931 | /* Allocate memory and copy the request */ | 1932 | /* Allocate memory and copy the request */ |
@@ -1938,11 +1939,11 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1938 | goto out; | 1939 | goto out; |
1939 | } | 1940 | } |
1940 | 1941 | ||
1941 | bio_for_each_segment(bvec, req->bio, i) { | 1942 | bio_for_each_segment(bvec, req->bio, iter) { |
1942 | memcpy(pci_addr_out + offset, | 1943 | memcpy(pci_addr_out + offset, |
1943 | page_address(bvec->bv_page) + bvec->bv_offset, | 1944 | page_address(bvec.bv_page) + bvec.bv_offset, |
1944 | bvec->bv_len); | 1945 | bvec.bv_len); |
1945 | offset += bvec->bv_len; | 1946 | offset += bvec.bv_len; |
1946 | } | 1947 | } |
1947 | } else { | 1948 | } else { |
1948 | dma_addr_out = pci_map_single(ioc->pdev, bio_data(req->bio), | 1949 | dma_addr_out = pci_map_single(ioc->pdev, bio_data(req->bio), |
@@ -1957,7 +1958,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1957 | 1958 | ||
1958 | /* Check if the response needs to be populated across | 1959 | /* Check if the response needs to be populated across |
1959 | * multiple segments */ | 1960 | * multiple segments */ |
1960 | if (rsp->bio->bi_vcnt > 1) { | 1961 | if (bio_multiple_segments(rsp->bio)) { |
1961 | pci_addr_in = pci_alloc_consistent(ioc->pdev, blk_rq_bytes(rsp), | 1962 | pci_addr_in = pci_alloc_consistent(ioc->pdev, blk_rq_bytes(rsp), |
1962 | &pci_dma_in); | 1963 | &pci_dma_in); |
1963 | if (!pci_addr_in) { | 1964 | if (!pci_addr_in) { |
@@ -2018,7 +2019,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
2018 | mpi_request->RequestDataLength = cpu_to_le16(blk_rq_bytes(req) - 4); | 2019 | mpi_request->RequestDataLength = cpu_to_le16(blk_rq_bytes(req) - 4); |
2019 | psge = &mpi_request->SGL; | 2020 | psge = &mpi_request->SGL; |
2020 | 2021 | ||
2021 | if (req->bio->bi_vcnt > 1) | 2022 | if (bio_multiple_segments(req->bio)) |
2022 | ioc->build_sg(ioc, psge, pci_dma_out, (blk_rq_bytes(req) - 4), | 2023 | ioc->build_sg(ioc, psge, pci_dma_out, (blk_rq_bytes(req) - 4), |
2023 | pci_dma_in, (blk_rq_bytes(rsp) + 4)); | 2024 | pci_dma_in, (blk_rq_bytes(rsp) + 4)); |
2024 | else | 2025 | else |
@@ -2063,23 +2064,23 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
2063 | 2064 | ||
2064 | /* check if the resp needs to be copied from the allocated | 2065 | /* check if the resp needs to be copied from the allocated |
2065 | * pci mem */ | 2066 | * pci mem */ |
2066 | if (rsp->bio->bi_vcnt > 1) { | 2067 | if (bio_multiple_segments(rsp->bio)) { |
2067 | u32 offset = 0; | 2068 | u32 offset = 0; |
2068 | u32 bytes_to_copy = | 2069 | u32 bytes_to_copy = |
2069 | le16_to_cpu(mpi_reply->ResponseDataLength); | 2070 | le16_to_cpu(mpi_reply->ResponseDataLength); |
2070 | bio_for_each_segment(bvec, rsp->bio, i) { | 2071 | bio_for_each_segment(bvec, rsp->bio, iter) { |
2071 | if (bytes_to_copy <= bvec->bv_len) { | 2072 | if (bytes_to_copy <= bvec.bv_len) { |
2072 | memcpy(page_address(bvec->bv_page) + | 2073 | memcpy(page_address(bvec.bv_page) + |
2073 | bvec->bv_offset, pci_addr_in + | 2074 | bvec.bv_offset, pci_addr_in + |
2074 | offset, bytes_to_copy); | 2075 | offset, bytes_to_copy); |
2075 | break; | 2076 | break; |
2076 | } else { | 2077 | } else { |
2077 | memcpy(page_address(bvec->bv_page) + | 2078 | memcpy(page_address(bvec.bv_page) + |
2078 | bvec->bv_offset, pci_addr_in + | 2079 | bvec.bv_offset, pci_addr_in + |
2079 | offset, bvec->bv_len); | 2080 | offset, bvec.bv_len); |
2080 | bytes_to_copy -= bvec->bv_len; | 2081 | bytes_to_copy -= bvec.bv_len; |
2081 | } | 2082 | } |
2082 | offset += bvec->bv_len; | 2083 | offset += bvec.bv_len; |
2083 | } | 2084 | } |
2084 | } | 2085 | } |
2085 | } else { | 2086 | } else { |
diff --git a/drivers/scsi/osd/osd_initiator.c b/drivers/scsi/osd/osd_initiator.c index aa66361ed44b..bac04c2335aa 100644 --- a/drivers/scsi/osd/osd_initiator.c +++ b/drivers/scsi/osd/osd_initiator.c | |||
@@ -731,7 +731,7 @@ static int _osd_req_list_objects(struct osd_request *or, | |||
731 | 731 | ||
732 | bio->bi_rw &= ~REQ_WRITE; | 732 | bio->bi_rw &= ~REQ_WRITE; |
733 | or->in.bio = bio; | 733 | or->in.bio = bio; |
734 | or->in.total_bytes = bio->bi_size; | 734 | or->in.total_bytes = bio->bi_iter.bi_size; |
735 | return 0; | 735 | return 0; |
736 | } | 736 | } |
737 | 737 | ||
diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c index 5a522c5bbd43..97dabd39b092 100644 --- a/drivers/scsi/qla1280.c +++ b/drivers/scsi/qla1280.c | |||
@@ -2502,7 +2502,7 @@ qla1280_mailbox_command(struct scsi_qla_host *ha, uint8_t mr, uint16_t *mb) | |||
2502 | /* Issue set host interrupt command. */ | 2502 | /* Issue set host interrupt command. */ |
2503 | 2503 | ||
2504 | /* set up a timer just in case we're really jammed */ | 2504 | /* set up a timer just in case we're really jammed */ |
2505 | init_timer(&timer); | 2505 | init_timer_on_stack(&timer); |
2506 | timer.expires = jiffies + 20*HZ; | 2506 | timer.expires = jiffies + 20*HZ; |
2507 | timer.data = (unsigned long)ha; | 2507 | timer.data = (unsigned long)ha; |
2508 | timer.function = qla1280_mailbox_timeout; | 2508 | timer.function = qla1280_mailbox_timeout; |
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c index 5f174b83f56f..4a0d7c92181f 100644 --- a/drivers/scsi/qla2xxx/qla_attr.c +++ b/drivers/scsi/qla2xxx/qla_attr.c | |||
@@ -862,7 +862,7 @@ qla2x00_alloc_sysfs_attr(scsi_qla_host_t *vha) | |||
862 | } | 862 | } |
863 | 863 | ||
864 | void | 864 | void |
865 | qla2x00_free_sysfs_attr(scsi_qla_host_t *vha) | 865 | qla2x00_free_sysfs_attr(scsi_qla_host_t *vha, bool stop_beacon) |
866 | { | 866 | { |
867 | struct Scsi_Host *host = vha->host; | 867 | struct Scsi_Host *host = vha->host; |
868 | struct sysfs_entry *iter; | 868 | struct sysfs_entry *iter; |
@@ -880,7 +880,7 @@ qla2x00_free_sysfs_attr(scsi_qla_host_t *vha) | |||
880 | iter->attr); | 880 | iter->attr); |
881 | } | 881 | } |
882 | 882 | ||
883 | if (ha->beacon_blink_led == 1) | 883 | if (stop_beacon && ha->beacon_blink_led == 1) |
884 | ha->isp_ops->beacon_off(vha); | 884 | ha->isp_ops->beacon_off(vha); |
885 | } | 885 | } |
886 | 886 | ||
@@ -890,7 +890,7 @@ static ssize_t | |||
890 | qla2x00_drvr_version_show(struct device *dev, | 890 | qla2x00_drvr_version_show(struct device *dev, |
891 | struct device_attribute *attr, char *buf) | 891 | struct device_attribute *attr, char *buf) |
892 | { | 892 | { |
893 | return snprintf(buf, PAGE_SIZE, "%s\n", qla2x00_version_str); | 893 | return scnprintf(buf, PAGE_SIZE, "%s\n", qla2x00_version_str); |
894 | } | 894 | } |
895 | 895 | ||
896 | static ssize_t | 896 | static ssize_t |
@@ -901,7 +901,7 @@ qla2x00_fw_version_show(struct device *dev, | |||
901 | struct qla_hw_data *ha = vha->hw; | 901 | struct qla_hw_data *ha = vha->hw; |
902 | char fw_str[128]; | 902 | char fw_str[128]; |
903 | 903 | ||
904 | return snprintf(buf, PAGE_SIZE, "%s\n", | 904 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
905 | ha->isp_ops->fw_version_str(vha, fw_str)); | 905 | ha->isp_ops->fw_version_str(vha, fw_str)); |
906 | } | 906 | } |
907 | 907 | ||
@@ -914,15 +914,15 @@ qla2x00_serial_num_show(struct device *dev, struct device_attribute *attr, | |||
914 | uint32_t sn; | 914 | uint32_t sn; |
915 | 915 | ||
916 | if (IS_QLAFX00(vha->hw)) { | 916 | if (IS_QLAFX00(vha->hw)) { |
917 | return snprintf(buf, PAGE_SIZE, "%s\n", | 917 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
918 | vha->hw->mr.serial_num); | 918 | vha->hw->mr.serial_num); |
919 | } else if (IS_FWI2_CAPABLE(ha)) { | 919 | } else if (IS_FWI2_CAPABLE(ha)) { |
920 | qla2xxx_get_vpd_field(vha, "SN", buf, PAGE_SIZE); | 920 | qla2xxx_get_vpd_field(vha, "SN", buf, PAGE_SIZE - 1); |
921 | return snprintf(buf, PAGE_SIZE, "%s\n", buf); | 921 | return strlen(strcat(buf, "\n")); |
922 | } | 922 | } |
923 | 923 | ||
924 | sn = ((ha->serial0 & 0x1f) << 16) | (ha->serial2 << 8) | ha->serial1; | 924 | sn = ((ha->serial0 & 0x1f) << 16) | (ha->serial2 << 8) | ha->serial1; |
925 | return snprintf(buf, PAGE_SIZE, "%c%05d\n", 'A' + sn / 100000, | 925 | return scnprintf(buf, PAGE_SIZE, "%c%05d\n", 'A' + sn / 100000, |
926 | sn % 100000); | 926 | sn % 100000); |
927 | } | 927 | } |
928 | 928 | ||
@@ -931,7 +931,7 @@ qla2x00_isp_name_show(struct device *dev, struct device_attribute *attr, | |||
931 | char *buf) | 931 | char *buf) |
932 | { | 932 | { |
933 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 933 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
934 | return snprintf(buf, PAGE_SIZE, "ISP%04X\n", vha->hw->pdev->device); | 934 | return scnprintf(buf, PAGE_SIZE, "ISP%04X\n", vha->hw->pdev->device); |
935 | } | 935 | } |
936 | 936 | ||
937 | static ssize_t | 937 | static ssize_t |
@@ -942,10 +942,10 @@ qla2x00_isp_id_show(struct device *dev, struct device_attribute *attr, | |||
942 | struct qla_hw_data *ha = vha->hw; | 942 | struct qla_hw_data *ha = vha->hw; |
943 | 943 | ||
944 | if (IS_QLAFX00(vha->hw)) | 944 | if (IS_QLAFX00(vha->hw)) |
945 | return snprintf(buf, PAGE_SIZE, "%s\n", | 945 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
946 | vha->hw->mr.hw_version); | 946 | vha->hw->mr.hw_version); |
947 | 947 | ||
948 | return snprintf(buf, PAGE_SIZE, "%04x %04x %04x %04x\n", | 948 | return scnprintf(buf, PAGE_SIZE, "%04x %04x %04x %04x\n", |
949 | ha->product_id[0], ha->product_id[1], ha->product_id[2], | 949 | ha->product_id[0], ha->product_id[1], ha->product_id[2], |
950 | ha->product_id[3]); | 950 | ha->product_id[3]); |
951 | } | 951 | } |
@@ -956,11 +956,7 @@ qla2x00_model_name_show(struct device *dev, struct device_attribute *attr, | |||
956 | { | 956 | { |
957 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 957 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
958 | 958 | ||
959 | if (IS_QLAFX00(vha->hw)) | 959 | return scnprintf(buf, PAGE_SIZE, "%s\n", vha->hw->model_number); |
960 | return snprintf(buf, PAGE_SIZE, "%s\n", | ||
961 | vha->hw->mr.product_name); | ||
962 | |||
963 | return snprintf(buf, PAGE_SIZE, "%s\n", vha->hw->model_number); | ||
964 | } | 960 | } |
965 | 961 | ||
966 | static ssize_t | 962 | static ssize_t |
@@ -968,7 +964,7 @@ qla2x00_model_desc_show(struct device *dev, struct device_attribute *attr, | |||
968 | char *buf) | 964 | char *buf) |
969 | { | 965 | { |
970 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 966 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
971 | return snprintf(buf, PAGE_SIZE, "%s\n", | 967 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
972 | vha->hw->model_desc ? vha->hw->model_desc : ""); | 968 | vha->hw->model_desc ? vha->hw->model_desc : ""); |
973 | } | 969 | } |
974 | 970 | ||
@@ -979,7 +975,7 @@ qla2x00_pci_info_show(struct device *dev, struct device_attribute *attr, | |||
979 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 975 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
980 | char pci_info[30]; | 976 | char pci_info[30]; |
981 | 977 | ||
982 | return snprintf(buf, PAGE_SIZE, "%s\n", | 978 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
983 | vha->hw->isp_ops->pci_info_str(vha, pci_info)); | 979 | vha->hw->isp_ops->pci_info_str(vha, pci_info)); |
984 | } | 980 | } |
985 | 981 | ||
@@ -994,29 +990,29 @@ qla2x00_link_state_show(struct device *dev, struct device_attribute *attr, | |||
994 | if (atomic_read(&vha->loop_state) == LOOP_DOWN || | 990 | if (atomic_read(&vha->loop_state) == LOOP_DOWN || |
995 | atomic_read(&vha->loop_state) == LOOP_DEAD || | 991 | atomic_read(&vha->loop_state) == LOOP_DEAD || |
996 | vha->device_flags & DFLG_NO_CABLE) | 992 | vha->device_flags & DFLG_NO_CABLE) |
997 | len = snprintf(buf, PAGE_SIZE, "Link Down\n"); | 993 | len = scnprintf(buf, PAGE_SIZE, "Link Down\n"); |
998 | else if (atomic_read(&vha->loop_state) != LOOP_READY || | 994 | else if (atomic_read(&vha->loop_state) != LOOP_READY || |
999 | qla2x00_reset_active(vha)) | 995 | qla2x00_reset_active(vha)) |
1000 | len = snprintf(buf, PAGE_SIZE, "Unknown Link State\n"); | 996 | len = scnprintf(buf, PAGE_SIZE, "Unknown Link State\n"); |
1001 | else { | 997 | else { |
1002 | len = snprintf(buf, PAGE_SIZE, "Link Up - "); | 998 | len = scnprintf(buf, PAGE_SIZE, "Link Up - "); |
1003 | 999 | ||
1004 | switch (ha->current_topology) { | 1000 | switch (ha->current_topology) { |
1005 | case ISP_CFG_NL: | 1001 | case ISP_CFG_NL: |
1006 | len += snprintf(buf + len, PAGE_SIZE-len, "Loop\n"); | 1002 | len += scnprintf(buf + len, PAGE_SIZE-len, "Loop\n"); |
1007 | break; | 1003 | break; |
1008 | case ISP_CFG_FL: | 1004 | case ISP_CFG_FL: |
1009 | len += snprintf(buf + len, PAGE_SIZE-len, "FL_Port\n"); | 1005 | len += scnprintf(buf + len, PAGE_SIZE-len, "FL_Port\n"); |
1010 | break; | 1006 | break; |
1011 | case ISP_CFG_N: | 1007 | case ISP_CFG_N: |
1012 | len += snprintf(buf + len, PAGE_SIZE-len, | 1008 | len += scnprintf(buf + len, PAGE_SIZE-len, |
1013 | "N_Port to N_Port\n"); | 1009 | "N_Port to N_Port\n"); |
1014 | break; | 1010 | break; |
1015 | case ISP_CFG_F: | 1011 | case ISP_CFG_F: |
1016 | len += snprintf(buf + len, PAGE_SIZE-len, "F_Port\n"); | 1012 | len += scnprintf(buf + len, PAGE_SIZE-len, "F_Port\n"); |
1017 | break; | 1013 | break; |
1018 | default: | 1014 | default: |
1019 | len += snprintf(buf + len, PAGE_SIZE-len, "Loop\n"); | 1015 | len += scnprintf(buf + len, PAGE_SIZE-len, "Loop\n"); |
1020 | break; | 1016 | break; |
1021 | } | 1017 | } |
1022 | } | 1018 | } |
@@ -1032,10 +1028,10 @@ qla2x00_zio_show(struct device *dev, struct device_attribute *attr, | |||
1032 | 1028 | ||
1033 | switch (vha->hw->zio_mode) { | 1029 | switch (vha->hw->zio_mode) { |
1034 | case QLA_ZIO_MODE_6: | 1030 | case QLA_ZIO_MODE_6: |
1035 | len += snprintf(buf + len, PAGE_SIZE-len, "Mode 6\n"); | 1031 | len += scnprintf(buf + len, PAGE_SIZE-len, "Mode 6\n"); |
1036 | break; | 1032 | break; |
1037 | case QLA_ZIO_DISABLED: | 1033 | case QLA_ZIO_DISABLED: |
1038 | len += snprintf(buf + len, PAGE_SIZE-len, "Disabled\n"); | 1034 | len += scnprintf(buf + len, PAGE_SIZE-len, "Disabled\n"); |
1039 | break; | 1035 | break; |
1040 | } | 1036 | } |
1041 | return len; | 1037 | return len; |
@@ -1075,7 +1071,7 @@ qla2x00_zio_timer_show(struct device *dev, struct device_attribute *attr, | |||
1075 | { | 1071 | { |
1076 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1072 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1077 | 1073 | ||
1078 | return snprintf(buf, PAGE_SIZE, "%d us\n", vha->hw->zio_timer * 100); | 1074 | return scnprintf(buf, PAGE_SIZE, "%d us\n", vha->hw->zio_timer * 100); |
1079 | } | 1075 | } |
1080 | 1076 | ||
1081 | static ssize_t | 1077 | static ssize_t |
@@ -1105,9 +1101,9 @@ qla2x00_beacon_show(struct device *dev, struct device_attribute *attr, | |||
1105 | int len = 0; | 1101 | int len = 0; |
1106 | 1102 | ||
1107 | if (vha->hw->beacon_blink_led) | 1103 | if (vha->hw->beacon_blink_led) |
1108 | len += snprintf(buf + len, PAGE_SIZE-len, "Enabled\n"); | 1104 | len += scnprintf(buf + len, PAGE_SIZE-len, "Enabled\n"); |
1109 | else | 1105 | else |
1110 | len += snprintf(buf + len, PAGE_SIZE-len, "Disabled\n"); | 1106 | len += scnprintf(buf + len, PAGE_SIZE-len, "Disabled\n"); |
1111 | return len; | 1107 | return len; |
1112 | } | 1108 | } |
1113 | 1109 | ||
@@ -1149,7 +1145,7 @@ qla2x00_optrom_bios_version_show(struct device *dev, | |||
1149 | { | 1145 | { |
1150 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1146 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1151 | struct qla_hw_data *ha = vha->hw; | 1147 | struct qla_hw_data *ha = vha->hw; |
1152 | return snprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->bios_revision[1], | 1148 | return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->bios_revision[1], |
1153 | ha->bios_revision[0]); | 1149 | ha->bios_revision[0]); |
1154 | } | 1150 | } |
1155 | 1151 | ||
@@ -1159,7 +1155,7 @@ qla2x00_optrom_efi_version_show(struct device *dev, | |||
1159 | { | 1155 | { |
1160 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1156 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1161 | struct qla_hw_data *ha = vha->hw; | 1157 | struct qla_hw_data *ha = vha->hw; |
1162 | return snprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->efi_revision[1], | 1158 | return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->efi_revision[1], |
1163 | ha->efi_revision[0]); | 1159 | ha->efi_revision[0]); |
1164 | } | 1160 | } |
1165 | 1161 | ||
@@ -1169,7 +1165,7 @@ qla2x00_optrom_fcode_version_show(struct device *dev, | |||
1169 | { | 1165 | { |
1170 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1166 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1171 | struct qla_hw_data *ha = vha->hw; | 1167 | struct qla_hw_data *ha = vha->hw; |
1172 | return snprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->fcode_revision[1], | 1168 | return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->fcode_revision[1], |
1173 | ha->fcode_revision[0]); | 1169 | ha->fcode_revision[0]); |
1174 | } | 1170 | } |
1175 | 1171 | ||
@@ -1179,7 +1175,7 @@ qla2x00_optrom_fw_version_show(struct device *dev, | |||
1179 | { | 1175 | { |
1180 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1176 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1181 | struct qla_hw_data *ha = vha->hw; | 1177 | struct qla_hw_data *ha = vha->hw; |
1182 | return snprintf(buf, PAGE_SIZE, "%d.%02d.%02d %d\n", | 1178 | return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d %d\n", |
1183 | ha->fw_revision[0], ha->fw_revision[1], ha->fw_revision[2], | 1179 | ha->fw_revision[0], ha->fw_revision[1], ha->fw_revision[2], |
1184 | ha->fw_revision[3]); | 1180 | ha->fw_revision[3]); |
1185 | } | 1181 | } |
@@ -1192,9 +1188,9 @@ qla2x00_optrom_gold_fw_version_show(struct device *dev, | |||
1192 | struct qla_hw_data *ha = vha->hw; | 1188 | struct qla_hw_data *ha = vha->hw; |
1193 | 1189 | ||
1194 | if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha)) | 1190 | if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha)) |
1195 | return snprintf(buf, PAGE_SIZE, "\n"); | 1191 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1196 | 1192 | ||
1197 | return snprintf(buf, PAGE_SIZE, "%d.%02d.%02d (%d)\n", | 1193 | return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d (%d)\n", |
1198 | ha->gold_fw_version[0], ha->gold_fw_version[1], | 1194 | ha->gold_fw_version[0], ha->gold_fw_version[1], |
1199 | ha->gold_fw_version[2], ha->gold_fw_version[3]); | 1195 | ha->gold_fw_version[2], ha->gold_fw_version[3]); |
1200 | } | 1196 | } |
@@ -1204,7 +1200,7 @@ qla2x00_total_isp_aborts_show(struct device *dev, | |||
1204 | struct device_attribute *attr, char *buf) | 1200 | struct device_attribute *attr, char *buf) |
1205 | { | 1201 | { |
1206 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1202 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1207 | return snprintf(buf, PAGE_SIZE, "%d\n", | 1203 | return scnprintf(buf, PAGE_SIZE, "%d\n", |
1208 | vha->qla_stats.total_isp_aborts); | 1204 | vha->qla_stats.total_isp_aborts); |
1209 | } | 1205 | } |
1210 | 1206 | ||
@@ -1218,16 +1214,16 @@ qla24xx_84xx_fw_version_show(struct device *dev, | |||
1218 | struct qla_hw_data *ha = vha->hw; | 1214 | struct qla_hw_data *ha = vha->hw; |
1219 | 1215 | ||
1220 | if (!IS_QLA84XX(ha)) | 1216 | if (!IS_QLA84XX(ha)) |
1221 | return snprintf(buf, PAGE_SIZE, "\n"); | 1217 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1222 | 1218 | ||
1223 | if (ha->cs84xx->op_fw_version == 0) | 1219 | if (ha->cs84xx->op_fw_version == 0) |
1224 | rval = qla84xx_verify_chip(vha, status); | 1220 | rval = qla84xx_verify_chip(vha, status); |
1225 | 1221 | ||
1226 | if ((rval == QLA_SUCCESS) && (status[0] == 0)) | 1222 | if ((rval == QLA_SUCCESS) && (status[0] == 0)) |
1227 | return snprintf(buf, PAGE_SIZE, "%u\n", | 1223 | return scnprintf(buf, PAGE_SIZE, "%u\n", |
1228 | (uint32_t)ha->cs84xx->op_fw_version); | 1224 | (uint32_t)ha->cs84xx->op_fw_version); |
1229 | 1225 | ||
1230 | return snprintf(buf, PAGE_SIZE, "\n"); | 1226 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1231 | } | 1227 | } |
1232 | 1228 | ||
1233 | static ssize_t | 1229 | static ssize_t |
@@ -1238,9 +1234,9 @@ qla2x00_mpi_version_show(struct device *dev, struct device_attribute *attr, | |||
1238 | struct qla_hw_data *ha = vha->hw; | 1234 | struct qla_hw_data *ha = vha->hw; |
1239 | 1235 | ||
1240 | if (!IS_QLA81XX(ha) && !IS_QLA8031(ha) && !IS_QLA8044(ha)) | 1236 | if (!IS_QLA81XX(ha) && !IS_QLA8031(ha) && !IS_QLA8044(ha)) |
1241 | return snprintf(buf, PAGE_SIZE, "\n"); | 1237 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1242 | 1238 | ||
1243 | return snprintf(buf, PAGE_SIZE, "%d.%02d.%02d (%x)\n", | 1239 | return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d (%x)\n", |
1244 | ha->mpi_version[0], ha->mpi_version[1], ha->mpi_version[2], | 1240 | ha->mpi_version[0], ha->mpi_version[1], ha->mpi_version[2], |
1245 | ha->mpi_capabilities); | 1241 | ha->mpi_capabilities); |
1246 | } | 1242 | } |
@@ -1253,9 +1249,9 @@ qla2x00_phy_version_show(struct device *dev, struct device_attribute *attr, | |||
1253 | struct qla_hw_data *ha = vha->hw; | 1249 | struct qla_hw_data *ha = vha->hw; |
1254 | 1250 | ||
1255 | if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) | 1251 | if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) |
1256 | return snprintf(buf, PAGE_SIZE, "\n"); | 1252 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1257 | 1253 | ||
1258 | return snprintf(buf, PAGE_SIZE, "%d.%02d.%02d\n", | 1254 | return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d\n", |
1259 | ha->phy_version[0], ha->phy_version[1], ha->phy_version[2]); | 1255 | ha->phy_version[0], ha->phy_version[1], ha->phy_version[2]); |
1260 | } | 1256 | } |
1261 | 1257 | ||
@@ -1266,7 +1262,7 @@ qla2x00_flash_block_size_show(struct device *dev, | |||
1266 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1262 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1267 | struct qla_hw_data *ha = vha->hw; | 1263 | struct qla_hw_data *ha = vha->hw; |
1268 | 1264 | ||
1269 | return snprintf(buf, PAGE_SIZE, "0x%x\n", ha->fdt_block_size); | 1265 | return scnprintf(buf, PAGE_SIZE, "0x%x\n", ha->fdt_block_size); |
1270 | } | 1266 | } |
1271 | 1267 | ||
1272 | static ssize_t | 1268 | static ssize_t |
@@ -1276,9 +1272,9 @@ qla2x00_vlan_id_show(struct device *dev, struct device_attribute *attr, | |||
1276 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1272 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1277 | 1273 | ||
1278 | if (!IS_CNA_CAPABLE(vha->hw)) | 1274 | if (!IS_CNA_CAPABLE(vha->hw)) |
1279 | return snprintf(buf, PAGE_SIZE, "\n"); | 1275 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1280 | 1276 | ||
1281 | return snprintf(buf, PAGE_SIZE, "%d\n", vha->fcoe_vlan_id); | 1277 | return scnprintf(buf, PAGE_SIZE, "%d\n", vha->fcoe_vlan_id); |
1282 | } | 1278 | } |
1283 | 1279 | ||
1284 | static ssize_t | 1280 | static ssize_t |
@@ -1288,9 +1284,9 @@ qla2x00_vn_port_mac_address_show(struct device *dev, | |||
1288 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1284 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1289 | 1285 | ||
1290 | if (!IS_CNA_CAPABLE(vha->hw)) | 1286 | if (!IS_CNA_CAPABLE(vha->hw)) |
1291 | return snprintf(buf, PAGE_SIZE, "\n"); | 1287 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1292 | 1288 | ||
1293 | return snprintf(buf, PAGE_SIZE, "%pMR\n", vha->fcoe_vn_port_mac); | 1289 | return scnprintf(buf, PAGE_SIZE, "%pMR\n", vha->fcoe_vn_port_mac); |
1294 | } | 1290 | } |
1295 | 1291 | ||
1296 | static ssize_t | 1292 | static ssize_t |
@@ -1299,7 +1295,7 @@ qla2x00_fabric_param_show(struct device *dev, struct device_attribute *attr, | |||
1299 | { | 1295 | { |
1300 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1296 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1301 | 1297 | ||
1302 | return snprintf(buf, PAGE_SIZE, "%d\n", vha->hw->switch_cap); | 1298 | return scnprintf(buf, PAGE_SIZE, "%d\n", vha->hw->switch_cap); |
1303 | } | 1299 | } |
1304 | 1300 | ||
1305 | static ssize_t | 1301 | static ssize_t |
@@ -1320,10 +1316,10 @@ qla2x00_thermal_temp_show(struct device *dev, | |||
1320 | } | 1316 | } |
1321 | 1317 | ||
1322 | if (qla2x00_get_thermal_temp(vha, &temp) == QLA_SUCCESS) | 1318 | if (qla2x00_get_thermal_temp(vha, &temp) == QLA_SUCCESS) |
1323 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); | 1319 | return scnprintf(buf, PAGE_SIZE, "%d\n", temp); |
1324 | 1320 | ||
1325 | done: | 1321 | done: |
1326 | return snprintf(buf, PAGE_SIZE, "\n"); | 1322 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1327 | } | 1323 | } |
1328 | 1324 | ||
1329 | static ssize_t | 1325 | static ssize_t |
@@ -1337,7 +1333,7 @@ qla2x00_fw_state_show(struct device *dev, struct device_attribute *attr, | |||
1337 | 1333 | ||
1338 | if (IS_QLAFX00(vha->hw)) { | 1334 | if (IS_QLAFX00(vha->hw)) { |
1339 | pstate = qlafx00_fw_state_show(dev, attr, buf); | 1335 | pstate = qlafx00_fw_state_show(dev, attr, buf); |
1340 | return snprintf(buf, PAGE_SIZE, "0x%x\n", pstate); | 1336 | return scnprintf(buf, PAGE_SIZE, "0x%x\n", pstate); |
1341 | } | 1337 | } |
1342 | 1338 | ||
1343 | if (qla2x00_reset_active(vha)) | 1339 | if (qla2x00_reset_active(vha)) |
@@ -1348,7 +1344,7 @@ qla2x00_fw_state_show(struct device *dev, struct device_attribute *attr, | |||
1348 | if (rval != QLA_SUCCESS) | 1344 | if (rval != QLA_SUCCESS) |
1349 | memset(state, -1, sizeof(state)); | 1345 | memset(state, -1, sizeof(state)); |
1350 | 1346 | ||
1351 | return snprintf(buf, PAGE_SIZE, "0x%x 0x%x 0x%x 0x%x 0x%x\n", state[0], | 1347 | return scnprintf(buf, PAGE_SIZE, "0x%x 0x%x 0x%x 0x%x 0x%x\n", state[0], |
1352 | state[1], state[2], state[3], state[4]); | 1348 | state[1], state[2], state[3], state[4]); |
1353 | } | 1349 | } |
1354 | 1350 | ||
@@ -1359,9 +1355,9 @@ qla2x00_diag_requests_show(struct device *dev, | |||
1359 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1355 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1360 | 1356 | ||
1361 | if (!IS_BIDI_CAPABLE(vha->hw)) | 1357 | if (!IS_BIDI_CAPABLE(vha->hw)) |
1362 | return snprintf(buf, PAGE_SIZE, "\n"); | 1358 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1363 | 1359 | ||
1364 | return snprintf(buf, PAGE_SIZE, "%llu\n", vha->bidi_stats.io_count); | 1360 | return scnprintf(buf, PAGE_SIZE, "%llu\n", vha->bidi_stats.io_count); |
1365 | } | 1361 | } |
1366 | 1362 | ||
1367 | static ssize_t | 1363 | static ssize_t |
@@ -1371,9 +1367,9 @@ qla2x00_diag_megabytes_show(struct device *dev, | |||
1371 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); | 1367 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
1372 | 1368 | ||
1373 | if (!IS_BIDI_CAPABLE(vha->hw)) | 1369 | if (!IS_BIDI_CAPABLE(vha->hw)) |
1374 | return snprintf(buf, PAGE_SIZE, "\n"); | 1370 | return scnprintf(buf, PAGE_SIZE, "\n"); |
1375 | 1371 | ||
1376 | return snprintf(buf, PAGE_SIZE, "%llu\n", | 1372 | return scnprintf(buf, PAGE_SIZE, "%llu\n", |
1377 | vha->bidi_stats.transfer_bytes >> 20); | 1373 | vha->bidi_stats.transfer_bytes >> 20); |
1378 | } | 1374 | } |
1379 | 1375 | ||
@@ -1392,7 +1388,7 @@ qla2x00_fw_dump_size_show(struct device *dev, struct device_attribute *attr, | |||
1392 | else | 1388 | else |
1393 | size = ha->fw_dump_len; | 1389 | size = ha->fw_dump_len; |
1394 | 1390 | ||
1395 | return snprintf(buf, PAGE_SIZE, "%d\n", size); | 1391 | return scnprintf(buf, PAGE_SIZE, "%d\n", size); |
1396 | } | 1392 | } |
1397 | 1393 | ||
1398 | static DEVICE_ATTR(driver_version, S_IRUGO, qla2x00_drvr_version_show, NULL); | 1394 | static DEVICE_ATTR(driver_version, S_IRUGO, qla2x00_drvr_version_show, NULL); |
@@ -1994,6 +1990,8 @@ qla24xx_vport_delete(struct fc_vport *fc_vport) | |||
1994 | 1990 | ||
1995 | vha->flags.delete_progress = 1; | 1991 | vha->flags.delete_progress = 1; |
1996 | 1992 | ||
1993 | qlt_remove_target(ha, vha); | ||
1994 | |||
1997 | fc_remove_host(vha->host); | 1995 | fc_remove_host(vha->host); |
1998 | 1996 | ||
1999 | scsi_remove_host(vha->host); | 1997 | scsi_remove_host(vha->host); |
diff --git a/drivers/scsi/qla2xxx/qla_bsg.c b/drivers/scsi/qla2xxx/qla_bsg.c index aa57bf0af574..f15d03e6b7ee 100644 --- a/drivers/scsi/qla2xxx/qla_bsg.c +++ b/drivers/scsi/qla2xxx/qla_bsg.c | |||
@@ -2022,6 +2022,46 @@ done: | |||
2022 | } | 2022 | } |
2023 | 2023 | ||
2024 | static int | 2024 | static int |
2025 | qla26xx_serdes_op(struct fc_bsg_job *bsg_job) | ||
2026 | { | ||
2027 | struct Scsi_Host *host = bsg_job->shost; | ||
2028 | scsi_qla_host_t *vha = shost_priv(host); | ||
2029 | int rval = 0; | ||
2030 | struct qla_serdes_reg sr; | ||
2031 | |||
2032 | memset(&sr, 0, sizeof(sr)); | ||
2033 | |||
2034 | sg_copy_to_buffer(bsg_job->request_payload.sg_list, | ||
2035 | bsg_job->request_payload.sg_cnt, &sr, sizeof(sr)); | ||
2036 | |||
2037 | switch (sr.cmd) { | ||
2038 | case INT_SC_SERDES_WRITE_REG: | ||
2039 | rval = qla2x00_write_serdes_word(vha, sr.addr, sr.val); | ||
2040 | bsg_job->reply->reply_payload_rcv_len = 0; | ||
2041 | break; | ||
2042 | case INT_SC_SERDES_READ_REG: | ||
2043 | rval = qla2x00_read_serdes_word(vha, sr.addr, &sr.val); | ||
2044 | sg_copy_from_buffer(bsg_job->reply_payload.sg_list, | ||
2045 | bsg_job->reply_payload.sg_cnt, &sr, sizeof(sr)); | ||
2046 | bsg_job->reply->reply_payload_rcv_len = sizeof(sr); | ||
2047 | break; | ||
2048 | default: | ||
2049 | ql_log(ql_log_warn, vha, 0x708c, | ||
2050 | "Unknown serdes cmd %x.\n", sr.cmd); | ||
2051 | rval = -EDOM; | ||
2052 | break; | ||
2053 | } | ||
2054 | |||
2055 | bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] = | ||
2056 | rval ? EXT_STATUS_MAILBOX : 0; | ||
2057 | |||
2058 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); | ||
2059 | bsg_job->reply->result = DID_OK << 16; | ||
2060 | bsg_job->job_done(bsg_job); | ||
2061 | return 0; | ||
2062 | } | ||
2063 | |||
2064 | static int | ||
2025 | qla2x00_process_vendor_specific(struct fc_bsg_job *bsg_job) | 2065 | qla2x00_process_vendor_specific(struct fc_bsg_job *bsg_job) |
2026 | { | 2066 | { |
2027 | switch (bsg_job->request->rqst_data.h_vendor.vendor_cmd[0]) { | 2067 | switch (bsg_job->request->rqst_data.h_vendor.vendor_cmd[0]) { |
@@ -2069,6 +2109,10 @@ qla2x00_process_vendor_specific(struct fc_bsg_job *bsg_job) | |||
2069 | 2109 | ||
2070 | case QL_VND_FX00_MGMT_CMD: | 2110 | case QL_VND_FX00_MGMT_CMD: |
2071 | return qlafx00_mgmt_cmd(bsg_job); | 2111 | return qlafx00_mgmt_cmd(bsg_job); |
2112 | |||
2113 | case QL_VND_SERDES_OP: | ||
2114 | return qla26xx_serdes_op(bsg_job); | ||
2115 | |||
2072 | default: | 2116 | default: |
2073 | return -ENOSYS; | 2117 | return -ENOSYS; |
2074 | } | 2118 | } |
diff --git a/drivers/scsi/qla2xxx/qla_bsg.h b/drivers/scsi/qla2xxx/qla_bsg.h index 04f770332c2b..e5c2126221e9 100644 --- a/drivers/scsi/qla2xxx/qla_bsg.h +++ b/drivers/scsi/qla2xxx/qla_bsg.h | |||
@@ -23,6 +23,7 @@ | |||
23 | #define QL_VND_WRITE_I2C 0x10 | 23 | #define QL_VND_WRITE_I2C 0x10 |
24 | #define QL_VND_READ_I2C 0x11 | 24 | #define QL_VND_READ_I2C 0x11 |
25 | #define QL_VND_FX00_MGMT_CMD 0x12 | 25 | #define QL_VND_FX00_MGMT_CMD 0x12 |
26 | #define QL_VND_SERDES_OP 0x13 | ||
26 | 27 | ||
27 | /* BSG Vendor specific subcode returns */ | 28 | /* BSG Vendor specific subcode returns */ |
28 | #define EXT_STATUS_OK 0 | 29 | #define EXT_STATUS_OK 0 |
@@ -212,4 +213,16 @@ struct qla_i2c_access { | |||
212 | uint8_t buffer[0x40]; | 213 | uint8_t buffer[0x40]; |
213 | } __packed; | 214 | } __packed; |
214 | 215 | ||
216 | /* 26xx serdes register interface */ | ||
217 | |||
218 | /* serdes reg commands */ | ||
219 | #define INT_SC_SERDES_READ_REG 1 | ||
220 | #define INT_SC_SERDES_WRITE_REG 2 | ||
221 | |||
222 | struct qla_serdes_reg { | ||
223 | uint16_t cmd; | ||
224 | uint16_t addr; | ||
225 | uint16_t val; | ||
226 | } __packed; | ||
227 | |||
215 | #endif | 228 | #endif |
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c index ee5c1833eb73..f6103f553bb1 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.c +++ b/drivers/scsi/qla2xxx/qla_dbg.c | |||
@@ -11,8 +11,9 @@ | |||
11 | * ---------------------------------------------------------------------- | 11 | * ---------------------------------------------------------------------- |
12 | * | Level | Last Value Used | Holes | | 12 | * | Level | Last Value Used | Holes | |
13 | * ---------------------------------------------------------------------- | 13 | * ---------------------------------------------------------------------- |
14 | * | Module Init and Probe | 0x0159 | 0x4b,0xba,0xfa | | 14 | * | Module Init and Probe | 0x015b | 0x4b,0xba,0xfa | |
15 | * | Mailbox commands | 0x1181 | 0x111a-0x111b | | 15 | * | | | 0x0x015a | |
16 | * | Mailbox commands | 0x1187 | 0x111a-0x111b | | ||
16 | * | | | 0x1155-0x1158 | | 17 | * | | | 0x1155-0x1158 | |
17 | * | | | 0x1018-0x1019 | | 18 | * | | | 0x1018-0x1019 | |
18 | * | | | 0x1115-0x1116 | | 19 | * | | | 0x1115-0x1116 | |
@@ -26,7 +27,7 @@ | |||
26 | * | | | 0x302d,0x3033 | | 27 | * | | | 0x302d,0x3033 | |
27 | * | | | 0x3036,0x3038 | | 28 | * | | | 0x3036,0x3038 | |
28 | * | | | 0x303a | | 29 | * | | | 0x303a | |
29 | * | DPC Thread | 0x4022 | 0x4002,0x4013 | | 30 | * | DPC Thread | 0x4023 | 0x4002,0x4013 | |
30 | * | Async Events | 0x5087 | 0x502b-0x502f | | 31 | * | Async Events | 0x5087 | 0x502b-0x502f | |
31 | * | | | 0x5047,0x5052 | | 32 | * | | | 0x5047,0x5052 | |
32 | * | | | 0x5084,0x5075 | | 33 | * | | | 0x5084,0x5075 | |
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h index 93db74ef3461..e1fe95ef23e1 100644 --- a/drivers/scsi/qla2xxx/qla_def.h +++ b/drivers/scsi/qla2xxx/qla_def.h | |||
@@ -862,7 +862,6 @@ struct mbx_cmd_32 { | |||
862 | */ | 862 | */ |
863 | #define MBC_LOAD_RAM 1 /* Load RAM. */ | 863 | #define MBC_LOAD_RAM 1 /* Load RAM. */ |
864 | #define MBC_EXECUTE_FIRMWARE 2 /* Execute firmware. */ | 864 | #define MBC_EXECUTE_FIRMWARE 2 /* Execute firmware. */ |
865 | #define MBC_WRITE_RAM_WORD 4 /* Write RAM word. */ | ||
866 | #define MBC_READ_RAM_WORD 5 /* Read RAM word. */ | 865 | #define MBC_READ_RAM_WORD 5 /* Read RAM word. */ |
867 | #define MBC_MAILBOX_REGISTER_TEST 6 /* Wrap incoming mailboxes */ | 866 | #define MBC_MAILBOX_REGISTER_TEST 6 /* Wrap incoming mailboxes */ |
868 | #define MBC_VERIFY_CHECKSUM 7 /* Verify checksum. */ | 867 | #define MBC_VERIFY_CHECKSUM 7 /* Verify checksum. */ |
@@ -937,6 +936,8 @@ struct mbx_cmd_32 { | |||
937 | /* | 936 | /* |
938 | * ISP24xx mailbox commands | 937 | * ISP24xx mailbox commands |
939 | */ | 938 | */ |
939 | #define MBC_WRITE_SERDES 0x3 /* Write serdes word. */ | ||
940 | #define MBC_READ_SERDES 0x4 /* Read serdes word. */ | ||
940 | #define MBC_SERDES_PARAMS 0x10 /* Serdes Tx Parameters. */ | 941 | #define MBC_SERDES_PARAMS 0x10 /* Serdes Tx Parameters. */ |
941 | #define MBC_GET_IOCB_STATUS 0x12 /* Get IOCB status command. */ | 942 | #define MBC_GET_IOCB_STATUS 0x12 /* Get IOCB status command. */ |
942 | #define MBC_PORT_PARAMS 0x1A /* Port iDMA Parameters. */ | 943 | #define MBC_PORT_PARAMS 0x1A /* Port iDMA Parameters. */ |
@@ -2734,7 +2735,6 @@ struct req_que { | |||
2734 | srb_t **outstanding_cmds; | 2735 | srb_t **outstanding_cmds; |
2735 | uint32_t current_outstanding_cmd; | 2736 | uint32_t current_outstanding_cmd; |
2736 | uint16_t num_outstanding_cmds; | 2737 | uint16_t num_outstanding_cmds; |
2737 | #define MAX_Q_DEPTH 32 | ||
2738 | int max_q_depth; | 2738 | int max_q_depth; |
2739 | 2739 | ||
2740 | dma_addr_t dma_fx00; | 2740 | dma_addr_t dma_fx00; |
@@ -2750,6 +2750,13 @@ struct qlfc_fw { | |||
2750 | uint32_t len; | 2750 | uint32_t len; |
2751 | }; | 2751 | }; |
2752 | 2752 | ||
2753 | struct scsi_qlt_host { | ||
2754 | void *target_lport_ptr; | ||
2755 | struct mutex tgt_mutex; | ||
2756 | struct mutex tgt_host_action_mutex; | ||
2757 | struct qla_tgt *qla_tgt; | ||
2758 | }; | ||
2759 | |||
2753 | struct qlt_hw_data { | 2760 | struct qlt_hw_data { |
2754 | /* Protected by hw lock */ | 2761 | /* Protected by hw lock */ |
2755 | uint32_t enable_class_2:1; | 2762 | uint32_t enable_class_2:1; |
@@ -2765,15 +2772,11 @@ struct qlt_hw_data { | |||
2765 | uint32_t __iomem *atio_q_in; | 2772 | uint32_t __iomem *atio_q_in; |
2766 | uint32_t __iomem *atio_q_out; | 2773 | uint32_t __iomem *atio_q_out; |
2767 | 2774 | ||
2768 | void *target_lport_ptr; | ||
2769 | struct qla_tgt_func_tmpl *tgt_ops; | 2775 | struct qla_tgt_func_tmpl *tgt_ops; |
2770 | struct qla_tgt *qla_tgt; | ||
2771 | struct qla_tgt_cmd *cmds[DEFAULT_OUTSTANDING_COMMANDS]; | 2776 | struct qla_tgt_cmd *cmds[DEFAULT_OUTSTANDING_COMMANDS]; |
2772 | uint16_t current_handle; | 2777 | uint16_t current_handle; |
2773 | 2778 | ||
2774 | struct qla_tgt_vp_map *tgt_vp_map; | 2779 | struct qla_tgt_vp_map *tgt_vp_map; |
2775 | struct mutex tgt_mutex; | ||
2776 | struct mutex tgt_host_action_mutex; | ||
2777 | 2780 | ||
2778 | int saved_set; | 2781 | int saved_set; |
2779 | uint16_t saved_exchange_count; | 2782 | uint16_t saved_exchange_count; |
@@ -3302,12 +3305,7 @@ struct qla_hw_data { | |||
3302 | struct work_struct nic_core_reset; | 3305 | struct work_struct nic_core_reset; |
3303 | struct work_struct idc_state_handler; | 3306 | struct work_struct idc_state_handler; |
3304 | struct work_struct nic_core_unrecoverable; | 3307 | struct work_struct nic_core_unrecoverable; |
3305 | 3308 | struct work_struct board_disable; | |
3306 | #define HOST_QUEUE_RAMPDOWN_INTERVAL (60 * HZ) | ||
3307 | #define HOST_QUEUE_RAMPUP_INTERVAL (30 * HZ) | ||
3308 | unsigned long host_last_rampdown_time; | ||
3309 | unsigned long host_last_rampup_time; | ||
3310 | int cfg_lun_q_depth; | ||
3311 | 3309 | ||
3312 | struct mr_data_fx00 mr; | 3310 | struct mr_data_fx00 mr; |
3313 | 3311 | ||
@@ -3372,12 +3370,11 @@ typedef struct scsi_qla_host { | |||
3372 | #define MPI_RESET_NEEDED 19 /* Initiate MPI FW reset */ | 3370 | #define MPI_RESET_NEEDED 19 /* Initiate MPI FW reset */ |
3373 | #define ISP_QUIESCE_NEEDED 20 /* Driver need some quiescence */ | 3371 | #define ISP_QUIESCE_NEEDED 20 /* Driver need some quiescence */ |
3374 | #define SCR_PENDING 21 /* SCR in target mode */ | 3372 | #define SCR_PENDING 21 /* SCR in target mode */ |
3375 | #define HOST_RAMP_DOWN_QUEUE_DEPTH 22 | 3373 | #define PORT_UPDATE_NEEDED 22 |
3376 | #define HOST_RAMP_UP_QUEUE_DEPTH 23 | 3374 | #define FX00_RESET_RECOVERY 23 |
3377 | #define PORT_UPDATE_NEEDED 24 | 3375 | #define FX00_TARGET_SCAN 24 |
3378 | #define FX00_RESET_RECOVERY 25 | 3376 | #define FX00_CRITEMP_RECOVERY 25 |
3379 | #define FX00_TARGET_SCAN 26 | 3377 | #define FX00_HOST_INFO_RESEND 26 |
3380 | #define FX00_CRITEMP_RECOVERY 27 | ||
3381 | 3378 | ||
3382 | uint32_t device_flags; | 3379 | uint32_t device_flags; |
3383 | #define SWITCH_FOUND BIT_0 | 3380 | #define SWITCH_FOUND BIT_0 |
@@ -3441,6 +3438,7 @@ typedef struct scsi_qla_host { | |||
3441 | #define VP_ERR_FAB_LOGOUT 4 | 3438 | #define VP_ERR_FAB_LOGOUT 4 |
3442 | #define VP_ERR_ADAP_NORESOURCES 5 | 3439 | #define VP_ERR_ADAP_NORESOURCES 5 |
3443 | struct qla_hw_data *hw; | 3440 | struct qla_hw_data *hw; |
3441 | struct scsi_qlt_host vha_tgt; | ||
3444 | struct req_que *req; | 3442 | struct req_que *req; |
3445 | int fw_heartbeat_counter; | 3443 | int fw_heartbeat_counter; |
3446 | int seconds_since_last_heartbeat; | 3444 | int seconds_since_last_heartbeat; |
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h index 4446bf5fe292..1f426628a0a5 100644 --- a/drivers/scsi/qla2xxx/qla_gbl.h +++ b/drivers/scsi/qla2xxx/qla_gbl.h | |||
@@ -98,7 +98,6 @@ extern int qlport_down_retry; | |||
98 | extern int ql2xplogiabsentdevice; | 98 | extern int ql2xplogiabsentdevice; |
99 | extern int ql2xloginretrycount; | 99 | extern int ql2xloginretrycount; |
100 | extern int ql2xfdmienable; | 100 | extern int ql2xfdmienable; |
101 | extern int ql2xmaxqdepth; | ||
102 | extern int ql2xallocfwdump; | 101 | extern int ql2xallocfwdump; |
103 | extern int ql2xextended_error_logging; | 102 | extern int ql2xextended_error_logging; |
104 | extern int ql2xiidmaenable; | 103 | extern int ql2xiidmaenable; |
@@ -160,6 +159,9 @@ extern int qla83xx_clear_drv_presence(scsi_qla_host_t *vha); | |||
160 | extern int __qla83xx_clear_drv_presence(scsi_qla_host_t *vha); | 159 | extern int __qla83xx_clear_drv_presence(scsi_qla_host_t *vha); |
161 | extern int qla2x00_post_uevent_work(struct scsi_qla_host *, u32); | 160 | extern int qla2x00_post_uevent_work(struct scsi_qla_host *, u32); |
162 | 161 | ||
162 | extern int qla2x00_post_uevent_work(struct scsi_qla_host *, u32); | ||
163 | extern void qla2x00_disable_board_on_pci_error(struct work_struct *); | ||
164 | |||
163 | /* | 165 | /* |
164 | * Global Functions in qla_mid.c source file. | 166 | * Global Functions in qla_mid.c source file. |
165 | */ | 167 | */ |
@@ -339,6 +341,11 @@ extern int | |||
339 | qla2x00_system_error(scsi_qla_host_t *); | 341 | qla2x00_system_error(scsi_qla_host_t *); |
340 | 342 | ||
341 | extern int | 343 | extern int |
344 | qla2x00_write_serdes_word(scsi_qla_host_t *, uint16_t, uint16_t); | ||
345 | extern int | ||
346 | qla2x00_read_serdes_word(scsi_qla_host_t *, uint16_t, uint16_t *); | ||
347 | |||
348 | extern int | ||
342 | qla2x00_set_serdes_params(scsi_qla_host_t *, uint16_t, uint16_t, uint16_t); | 349 | qla2x00_set_serdes_params(scsi_qla_host_t *, uint16_t, uint16_t, uint16_t); |
343 | 350 | ||
344 | extern int | 351 | extern int |
@@ -455,6 +462,7 @@ extern uint8_t *qla25xx_read_nvram_data(scsi_qla_host_t *, uint8_t *, uint32_t, | |||
455 | extern int qla25xx_write_nvram_data(scsi_qla_host_t *, uint8_t *, uint32_t, | 462 | extern int qla25xx_write_nvram_data(scsi_qla_host_t *, uint8_t *, uint32_t, |
456 | uint32_t); | 463 | uint32_t); |
457 | extern int qla2x00_is_a_vp_did(scsi_qla_host_t *, uint32_t); | 464 | extern int qla2x00_is_a_vp_did(scsi_qla_host_t *, uint32_t); |
465 | bool qla2x00_check_reg_for_disconnect(scsi_qla_host_t *, uint32_t); | ||
458 | 466 | ||
459 | extern int qla2x00_beacon_on(struct scsi_qla_host *); | 467 | extern int qla2x00_beacon_on(struct scsi_qla_host *); |
460 | extern int qla2x00_beacon_off(struct scsi_qla_host *); | 468 | extern int qla2x00_beacon_off(struct scsi_qla_host *); |
@@ -541,10 +549,9 @@ struct fc_function_template; | |||
541 | extern struct fc_function_template qla2xxx_transport_functions; | 549 | extern struct fc_function_template qla2xxx_transport_functions; |
542 | extern struct fc_function_template qla2xxx_transport_vport_functions; | 550 | extern struct fc_function_template qla2xxx_transport_vport_functions; |
543 | extern void qla2x00_alloc_sysfs_attr(scsi_qla_host_t *); | 551 | extern void qla2x00_alloc_sysfs_attr(scsi_qla_host_t *); |
544 | extern void qla2x00_free_sysfs_attr(scsi_qla_host_t *); | 552 | extern void qla2x00_free_sysfs_attr(scsi_qla_host_t *, bool); |
545 | extern void qla2x00_init_host_attr(scsi_qla_host_t *); | 553 | extern void qla2x00_init_host_attr(scsi_qla_host_t *); |
546 | extern void qla2x00_alloc_sysfs_attr(scsi_qla_host_t *); | 554 | extern void qla2x00_alloc_sysfs_attr(scsi_qla_host_t *); |
547 | extern void qla2x00_free_sysfs_attr(scsi_qla_host_t *); | ||
548 | extern int qla2x00_loopback_test(scsi_qla_host_t *, struct msg_echo_lb *, uint16_t *); | 555 | extern int qla2x00_loopback_test(scsi_qla_host_t *, struct msg_echo_lb *, uint16_t *); |
549 | extern int qla2x00_echo_test(scsi_qla_host_t *, | 556 | extern int qla2x00_echo_test(scsi_qla_host_t *, |
550 | struct msg_echo_lb *, uint16_t *); | 557 | struct msg_echo_lb *, uint16_t *); |
@@ -725,7 +732,7 @@ extern inline void qla8044_set_qsnt_ready(struct scsi_qla_host *vha); | |||
725 | extern inline void qla8044_need_reset_handler(struct scsi_qla_host *vha); | 732 | extern inline void qla8044_need_reset_handler(struct scsi_qla_host *vha); |
726 | extern int qla8044_device_state_handler(struct scsi_qla_host *vha); | 733 | extern int qla8044_device_state_handler(struct scsi_qla_host *vha); |
727 | extern void qla8044_clear_qsnt_ready(struct scsi_qla_host *vha); | 734 | extern void qla8044_clear_qsnt_ready(struct scsi_qla_host *vha); |
728 | extern void qla8044_clear_drv_active(struct scsi_qla_host *vha); | 735 | extern void qla8044_clear_drv_active(struct qla_hw_data *); |
729 | void qla8044_get_minidump(struct scsi_qla_host *vha); | 736 | void qla8044_get_minidump(struct scsi_qla_host *vha); |
730 | int qla8044_collect_md_data(struct scsi_qla_host *vha); | 737 | int qla8044_collect_md_data(struct scsi_qla_host *vha); |
731 | extern int qla8044_md_get_template(scsi_qla_host_t *); | 738 | extern int qla8044_md_get_template(scsi_qla_host_t *); |
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index 03f715e7591e..e7e5f4facf7f 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
@@ -1694,6 +1694,8 @@ enable_82xx_npiv: | |||
1694 | if (!fw_major_version && ql2xallocfwdump | 1694 | if (!fw_major_version && ql2xallocfwdump |
1695 | && !(IS_P3P_TYPE(ha))) | 1695 | && !(IS_P3P_TYPE(ha))) |
1696 | qla2x00_alloc_fw_dump(vha); | 1696 | qla2x00_alloc_fw_dump(vha); |
1697 | } else { | ||
1698 | goto failed; | ||
1697 | } | 1699 | } |
1698 | } else { | 1700 | } else { |
1699 | ql_log(ql_log_fatal, vha, 0x00cd, | 1701 | ql_log(ql_log_fatal, vha, 0x00cd, |
diff --git a/drivers/scsi/qla2xxx/qla_inline.h b/drivers/scsi/qla2xxx/qla_inline.h index 957088b04611..ce8b5fb0f347 100644 --- a/drivers/scsi/qla2xxx/qla_inline.h +++ b/drivers/scsi/qla2xxx/qla_inline.h | |||
@@ -261,25 +261,6 @@ qla2x00_gid_list_size(struct qla_hw_data *ha) | |||
261 | } | 261 | } |
262 | 262 | ||
263 | static inline void | 263 | static inline void |
264 | qla2x00_do_host_ramp_up(scsi_qla_host_t *vha) | ||
265 | { | ||
266 | if (vha->hw->cfg_lun_q_depth >= ql2xmaxqdepth) | ||
267 | return; | ||
268 | |||
269 | /* Wait at least HOST_QUEUE_RAMPDOWN_INTERVAL before ramping up */ | ||
270 | if (time_before(jiffies, (vha->hw->host_last_rampdown_time + | ||
271 | HOST_QUEUE_RAMPDOWN_INTERVAL))) | ||
272 | return; | ||
273 | |||
274 | /* Wait at least HOST_QUEUE_RAMPUP_INTERVAL between each ramp up */ | ||
275 | if (time_before(jiffies, (vha->hw->host_last_rampup_time + | ||
276 | HOST_QUEUE_RAMPUP_INTERVAL))) | ||
277 | return; | ||
278 | |||
279 | set_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags); | ||
280 | } | ||
281 | |||
282 | static inline void | ||
283 | qla2x00_handle_mbx_completion(struct qla_hw_data *ha, int status) | 264 | qla2x00_handle_mbx_completion(struct qla_hw_data *ha, int status) |
284 | { | 265 | { |
285 | if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && | 266 | if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && |
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index ff9c86b1a0d8..9bc86b9e86b1 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c | |||
@@ -56,6 +56,16 @@ qla2100_intr_handler(int irq, void *dev_id) | |||
56 | vha = pci_get_drvdata(ha->pdev); | 56 | vha = pci_get_drvdata(ha->pdev); |
57 | for (iter = 50; iter--; ) { | 57 | for (iter = 50; iter--; ) { |
58 | hccr = RD_REG_WORD(®->hccr); | 58 | hccr = RD_REG_WORD(®->hccr); |
59 | /* Check for PCI disconnection */ | ||
60 | if (hccr == 0xffff) { | ||
61 | /* | ||
62 | * Schedule this on the default system workqueue so that | ||
63 | * all the adapter workqueues and the DPC thread can be | ||
64 | * shutdown cleanly. | ||
65 | */ | ||
66 | schedule_work(&ha->board_disable); | ||
67 | break; | ||
68 | } | ||
59 | if (hccr & HCCR_RISC_PAUSE) { | 69 | if (hccr & HCCR_RISC_PAUSE) { |
60 | if (pci_channel_offline(ha->pdev)) | 70 | if (pci_channel_offline(ha->pdev)) |
61 | break; | 71 | break; |
@@ -110,6 +120,22 @@ qla2100_intr_handler(int irq, void *dev_id) | |||
110 | return (IRQ_HANDLED); | 120 | return (IRQ_HANDLED); |
111 | } | 121 | } |
112 | 122 | ||
123 | bool | ||
124 | qla2x00_check_reg_for_disconnect(scsi_qla_host_t *vha, uint32_t reg) | ||
125 | { | ||
126 | /* Check for PCI disconnection */ | ||
127 | if (reg == 0xffffffff) { | ||
128 | /* | ||
129 | * Schedule this on the default system workqueue so that all the | ||
130 | * adapter workqueues and the DPC thread can be shutdown | ||
131 | * cleanly. | ||
132 | */ | ||
133 | schedule_work(&vha->hw->board_disable); | ||
134 | return true; | ||
135 | } else | ||
136 | return false; | ||
137 | } | ||
138 | |||
113 | /** | 139 | /** |
114 | * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. | 140 | * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. |
115 | * @irq: | 141 | * @irq: |
@@ -148,11 +174,14 @@ qla2300_intr_handler(int irq, void *dev_id) | |||
148 | vha = pci_get_drvdata(ha->pdev); | 174 | vha = pci_get_drvdata(ha->pdev); |
149 | for (iter = 50; iter--; ) { | 175 | for (iter = 50; iter--; ) { |
150 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | 176 | stat = RD_REG_DWORD(®->u.isp2300.host_status); |
177 | if (qla2x00_check_reg_for_disconnect(vha, stat)) | ||
178 | break; | ||
151 | if (stat & HSR_RISC_PAUSED) { | 179 | if (stat & HSR_RISC_PAUSED) { |
152 | if (unlikely(pci_channel_offline(ha->pdev))) | 180 | if (unlikely(pci_channel_offline(ha->pdev))) |
153 | break; | 181 | break; |
154 | 182 | ||
155 | hccr = RD_REG_WORD(®->hccr); | 183 | hccr = RD_REG_WORD(®->hccr); |
184 | |||
156 | if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) | 185 | if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) |
157 | ql_log(ql_log_warn, vha, 0x5026, | 186 | ql_log(ql_log_warn, vha, 0x5026, |
158 | "Parity error -- HCCR=%x, Dumping " | 187 | "Parity error -- HCCR=%x, Dumping " |
@@ -269,11 +298,18 @@ qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) | |||
269 | { "Complete", "Request Notification", "Time Extension" }; | 298 | { "Complete", "Request Notification", "Time Extension" }; |
270 | int rval; | 299 | int rval; |
271 | struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; | 300 | struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; |
301 | struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82; | ||
272 | uint16_t __iomem *wptr; | 302 | uint16_t __iomem *wptr; |
273 | uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; | 303 | uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; |
274 | 304 | ||
275 | /* Seed data -- mailbox1 -> mailbox7. */ | 305 | /* Seed data -- mailbox1 -> mailbox7. */ |
276 | wptr = (uint16_t __iomem *)®24->mailbox1; | 306 | if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) |
307 | wptr = (uint16_t __iomem *)®24->mailbox1; | ||
308 | else if (IS_QLA8044(vha->hw)) | ||
309 | wptr = (uint16_t __iomem *)®82->mailbox_out[1]; | ||
310 | else | ||
311 | return; | ||
312 | |||
277 | for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) | 313 | for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) |
278 | mb[cnt] = RD_REG_WORD(wptr); | 314 | mb[cnt] = RD_REG_WORD(wptr); |
279 | 315 | ||
@@ -287,7 +323,7 @@ qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) | |||
287 | case MBA_IDC_COMPLETE: | 323 | case MBA_IDC_COMPLETE: |
288 | if (mb[1] >> 15) { | 324 | if (mb[1] >> 15) { |
289 | vha->hw->flags.idc_compl_status = 1; | 325 | vha->hw->flags.idc_compl_status = 1; |
290 | if (vha->hw->notify_dcbx_comp) | 326 | if (vha->hw->notify_dcbx_comp && !vha->vp_idx) |
291 | complete(&vha->hw->dcbx_comp); | 327 | complete(&vha->hw->dcbx_comp); |
292 | } | 328 | } |
293 | break; | 329 | break; |
@@ -758,7 +794,7 @@ skip_rio: | |||
758 | ql_dbg(ql_dbg_async, vha, 0x500d, | 794 | ql_dbg(ql_dbg_async, vha, 0x500d, |
759 | "DCBX Completed -- %04x %04x %04x.\n", | 795 | "DCBX Completed -- %04x %04x %04x.\n", |
760 | mb[1], mb[2], mb[3]); | 796 | mb[1], mb[2], mb[3]); |
761 | if (ha->notify_dcbx_comp) | 797 | if (ha->notify_dcbx_comp && !vha->vp_idx) |
762 | complete(&ha->dcbx_comp); | 798 | complete(&ha->dcbx_comp); |
763 | 799 | ||
764 | } else | 800 | } else |
@@ -1032,7 +1068,7 @@ skip_rio: | |||
1032 | } | 1068 | } |
1033 | } | 1069 | } |
1034 | case MBA_IDC_COMPLETE: | 1070 | case MBA_IDC_COMPLETE: |
1035 | if (ha->notify_lb_portup_comp) | 1071 | if (ha->notify_lb_portup_comp && !vha->vp_idx) |
1036 | complete(&ha->lb_portup_comp); | 1072 | complete(&ha->lb_portup_comp); |
1037 | /* Fallthru */ | 1073 | /* Fallthru */ |
1038 | case MBA_IDC_TIME_EXT: | 1074 | case MBA_IDC_TIME_EXT: |
@@ -1991,7 +2027,6 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) | |||
1991 | 2027 | ||
1992 | /* Fast path completion. */ | 2028 | /* Fast path completion. */ |
1993 | if (comp_status == CS_COMPLETE && scsi_status == 0) { | 2029 | if (comp_status == CS_COMPLETE && scsi_status == 0) { |
1994 | qla2x00_do_host_ramp_up(vha); | ||
1995 | qla2x00_process_completed_request(vha, req, handle); | 2030 | qla2x00_process_completed_request(vha, req, handle); |
1996 | 2031 | ||
1997 | return; | 2032 | return; |
@@ -2250,9 +2285,6 @@ out: | |||
2250 | cp->cmnd, scsi_bufflen(cp), rsp_info_len, | 2285 | cp->cmnd, scsi_bufflen(cp), rsp_info_len, |
2251 | resid_len, fw_resid_len); | 2286 | resid_len, fw_resid_len); |
2252 | 2287 | ||
2253 | if (!res) | ||
2254 | qla2x00_do_host_ramp_up(vha); | ||
2255 | |||
2256 | if (rsp->status_srb == NULL) | 2288 | if (rsp->status_srb == NULL) |
2257 | sp->done(ha, sp, res); | 2289 | sp->done(ha, sp, res); |
2258 | } | 2290 | } |
@@ -2575,6 +2607,8 @@ qla24xx_intr_handler(int irq, void *dev_id) | |||
2575 | vha = pci_get_drvdata(ha->pdev); | 2607 | vha = pci_get_drvdata(ha->pdev); |
2576 | for (iter = 50; iter--; ) { | 2608 | for (iter = 50; iter--; ) { |
2577 | stat = RD_REG_DWORD(®->host_status); | 2609 | stat = RD_REG_DWORD(®->host_status); |
2610 | if (qla2x00_check_reg_for_disconnect(vha, stat)) | ||
2611 | break; | ||
2578 | if (stat & HSRX_RISC_PAUSED) { | 2612 | if (stat & HSRX_RISC_PAUSED) { |
2579 | if (unlikely(pci_channel_offline(ha->pdev))) | 2613 | if (unlikely(pci_channel_offline(ha->pdev))) |
2580 | break; | 2614 | break; |
@@ -2644,6 +2678,7 @@ qla24xx_msix_rsp_q(int irq, void *dev_id) | |||
2644 | struct device_reg_24xx __iomem *reg; | 2678 | struct device_reg_24xx __iomem *reg; |
2645 | struct scsi_qla_host *vha; | 2679 | struct scsi_qla_host *vha; |
2646 | unsigned long flags; | 2680 | unsigned long flags; |
2681 | uint32_t stat = 0; | ||
2647 | 2682 | ||
2648 | rsp = (struct rsp_que *) dev_id; | 2683 | rsp = (struct rsp_que *) dev_id; |
2649 | if (!rsp) { | 2684 | if (!rsp) { |
@@ -2657,11 +2692,19 @@ qla24xx_msix_rsp_q(int irq, void *dev_id) | |||
2657 | spin_lock_irqsave(&ha->hardware_lock, flags); | 2692 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2658 | 2693 | ||
2659 | vha = pci_get_drvdata(ha->pdev); | 2694 | vha = pci_get_drvdata(ha->pdev); |
2695 | /* | ||
2696 | * Use host_status register to check to PCI disconnection before we | ||
2697 | * we process the response queue. | ||
2698 | */ | ||
2699 | stat = RD_REG_DWORD(®->host_status); | ||
2700 | if (qla2x00_check_reg_for_disconnect(vha, stat)) | ||
2701 | goto out; | ||
2660 | qla24xx_process_response_queue(vha, rsp); | 2702 | qla24xx_process_response_queue(vha, rsp); |
2661 | if (!ha->flags.disable_msix_handshake) { | 2703 | if (!ha->flags.disable_msix_handshake) { |
2662 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | 2704 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
2663 | RD_REG_DWORD_RELAXED(®->hccr); | 2705 | RD_REG_DWORD_RELAXED(®->hccr); |
2664 | } | 2706 | } |
2707 | out: | ||
2665 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 2708 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2666 | 2709 | ||
2667 | return IRQ_HANDLED; | 2710 | return IRQ_HANDLED; |
@@ -2671,9 +2714,11 @@ static irqreturn_t | |||
2671 | qla25xx_msix_rsp_q(int irq, void *dev_id) | 2714 | qla25xx_msix_rsp_q(int irq, void *dev_id) |
2672 | { | 2715 | { |
2673 | struct qla_hw_data *ha; | 2716 | struct qla_hw_data *ha; |
2717 | scsi_qla_host_t *vha; | ||
2674 | struct rsp_que *rsp; | 2718 | struct rsp_que *rsp; |
2675 | struct device_reg_24xx __iomem *reg; | 2719 | struct device_reg_24xx __iomem *reg; |
2676 | unsigned long flags; | 2720 | unsigned long flags; |
2721 | uint32_t hccr = 0; | ||
2677 | 2722 | ||
2678 | rsp = (struct rsp_que *) dev_id; | 2723 | rsp = (struct rsp_que *) dev_id; |
2679 | if (!rsp) { | 2724 | if (!rsp) { |
@@ -2682,17 +2727,21 @@ qla25xx_msix_rsp_q(int irq, void *dev_id) | |||
2682 | return IRQ_NONE; | 2727 | return IRQ_NONE; |
2683 | } | 2728 | } |
2684 | ha = rsp->hw; | 2729 | ha = rsp->hw; |
2730 | vha = pci_get_drvdata(ha->pdev); | ||
2685 | 2731 | ||
2686 | /* Clear the interrupt, if enabled, for this response queue */ | 2732 | /* Clear the interrupt, if enabled, for this response queue */ |
2687 | if (!ha->flags.disable_msix_handshake) { | 2733 | if (!ha->flags.disable_msix_handshake) { |
2688 | reg = &ha->iobase->isp24; | 2734 | reg = &ha->iobase->isp24; |
2689 | spin_lock_irqsave(&ha->hardware_lock, flags); | 2735 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2690 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | 2736 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
2691 | RD_REG_DWORD_RELAXED(®->hccr); | 2737 | hccr = RD_REG_DWORD_RELAXED(®->hccr); |
2692 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 2738 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2693 | } | 2739 | } |
2740 | if (qla2x00_check_reg_for_disconnect(vha, hccr)) | ||
2741 | goto out; | ||
2694 | queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work); | 2742 | queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work); |
2695 | 2743 | ||
2744 | out: | ||
2696 | return IRQ_HANDLED; | 2745 | return IRQ_HANDLED; |
2697 | } | 2746 | } |
2698 | 2747 | ||
@@ -2723,6 +2772,8 @@ qla24xx_msix_default(int irq, void *dev_id) | |||
2723 | vha = pci_get_drvdata(ha->pdev); | 2772 | vha = pci_get_drvdata(ha->pdev); |
2724 | do { | 2773 | do { |
2725 | stat = RD_REG_DWORD(®->host_status); | 2774 | stat = RD_REG_DWORD(®->host_status); |
2775 | if (qla2x00_check_reg_for_disconnect(vha, stat)) | ||
2776 | break; | ||
2726 | if (stat & HSRX_RISC_PAUSED) { | 2777 | if (stat & HSRX_RISC_PAUSED) { |
2727 | if (unlikely(pci_channel_offline(ha->pdev))) | 2778 | if (unlikely(pci_channel_offline(ha->pdev))) |
2728 | break; | 2779 | break; |
@@ -2937,7 +2988,7 @@ msix_out: | |||
2937 | int | 2988 | int |
2938 | qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) | 2989 | qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) |
2939 | { | 2990 | { |
2940 | int ret; | 2991 | int ret = QLA_FUNCTION_FAILED; |
2941 | device_reg_t __iomem *reg = ha->iobase; | 2992 | device_reg_t __iomem *reg = ha->iobase; |
2942 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); | 2993 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
2943 | 2994 | ||
@@ -2971,10 +3022,12 @@ qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) | |||
2971 | ha->chip_revision, ha->fw_attributes); | 3022 | ha->chip_revision, ha->fw_attributes); |
2972 | goto clear_risc_ints; | 3023 | goto clear_risc_ints; |
2973 | } | 3024 | } |
2974 | ql_log(ql_log_info, vha, 0x0037, | 3025 | |
2975 | "MSI-X Falling back-to MSI mode -%d.\n", ret); | ||
2976 | skip_msix: | 3026 | skip_msix: |
2977 | 3027 | ||
3028 | ql_log(ql_log_info, vha, 0x0037, | ||
3029 | "Falling back-to MSI mode -%d.\n", ret); | ||
3030 | |||
2978 | if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && | 3031 | if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && |
2979 | !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha)) | 3032 | !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha)) |
2980 | goto skip_msi; | 3033 | goto skip_msi; |
@@ -2986,14 +3039,13 @@ skip_msix: | |||
2986 | ha->flags.msi_enabled = 1; | 3039 | ha->flags.msi_enabled = 1; |
2987 | } else | 3040 | } else |
2988 | ql_log(ql_log_warn, vha, 0x0039, | 3041 | ql_log(ql_log_warn, vha, 0x0039, |
2989 | "MSI-X; Falling back-to INTa mode -- %d.\n", ret); | 3042 | "Falling back-to INTa mode -- %d.\n", ret); |
3043 | skip_msi: | ||
2990 | 3044 | ||
2991 | /* Skip INTx on ISP82xx. */ | 3045 | /* Skip INTx on ISP82xx. */ |
2992 | if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) | 3046 | if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) |
2993 | return QLA_FUNCTION_FAILED; | 3047 | return QLA_FUNCTION_FAILED; |
2994 | 3048 | ||
2995 | skip_msi: | ||
2996 | |||
2997 | ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, | 3049 | ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, |
2998 | ha->flags.msi_enabled ? 0 : IRQF_SHARED, | 3050 | ha->flags.msi_enabled ? 0 : IRQF_SHARED, |
2999 | QLA2XXX_DRIVER_NAME, rsp); | 3051 | QLA2XXX_DRIVER_NAME, rsp); |
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index a9aae500e791..b94511ae0051 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c | |||
@@ -468,7 +468,7 @@ qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr) | |||
468 | mcp->mb[1] = MSW(risc_addr); | 468 | mcp->mb[1] = MSW(risc_addr); |
469 | mcp->mb[2] = LSW(risc_addr); | 469 | mcp->mb[2] = LSW(risc_addr); |
470 | mcp->mb[3] = 0; | 470 | mcp->mb[3] = 0; |
471 | if (IS_QLA81XX(ha) || IS_QLA83XX(ha)) { | 471 | if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha)) { |
472 | struct nvram_81xx *nv = ha->nvram; | 472 | struct nvram_81xx *nv = ha->nvram; |
473 | mcp->mb[4] = (nv->enhanced_features & | 473 | mcp->mb[4] = (nv->enhanced_features & |
474 | EXTENDED_BB_CREDITS); | 474 | EXTENDED_BB_CREDITS); |
@@ -1214,7 +1214,7 @@ qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size) | |||
1214 | mcp->mb[6] = MSW(MSD(ha->init_cb_dma)); | 1214 | mcp->mb[6] = MSW(MSD(ha->init_cb_dma)); |
1215 | mcp->mb[7] = LSW(MSD(ha->init_cb_dma)); | 1215 | mcp->mb[7] = LSW(MSD(ha->init_cb_dma)); |
1216 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | 1216 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
1217 | if ((IS_QLA81XX(ha) || IS_QLA83XX(ha)) && ha->ex_init_cb->ex_version) { | 1217 | if (ha->ex_init_cb && ha->ex_init_cb->ex_version) { |
1218 | mcp->mb[1] = BIT_0; | 1218 | mcp->mb[1] = BIT_0; |
1219 | mcp->mb[10] = MSW(ha->ex_init_cb_dma); | 1219 | mcp->mb[10] = MSW(ha->ex_init_cb_dma); |
1220 | mcp->mb[11] = LSW(ha->ex_init_cb_dma); | 1220 | mcp->mb[11] = LSW(ha->ex_init_cb_dma); |
@@ -2800,6 +2800,75 @@ qla2x00_system_error(scsi_qla_host_t *vha) | |||
2800 | return rval; | 2800 | return rval; |
2801 | } | 2801 | } |
2802 | 2802 | ||
2803 | int | ||
2804 | qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data) | ||
2805 | { | ||
2806 | int rval; | ||
2807 | mbx_cmd_t mc; | ||
2808 | mbx_cmd_t *mcp = &mc; | ||
2809 | |||
2810 | if (!IS_QLA2031(vha->hw)) | ||
2811 | return QLA_FUNCTION_FAILED; | ||
2812 | |||
2813 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182, | ||
2814 | "Entered %s.\n", __func__); | ||
2815 | |||
2816 | mcp->mb[0] = MBC_WRITE_SERDES; | ||
2817 | mcp->mb[1] = addr; | ||
2818 | mcp->mb[2] = data & 0xff; | ||
2819 | mcp->mb[3] = 0; | ||
2820 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | ||
2821 | mcp->in_mb = MBX_0; | ||
2822 | mcp->tov = MBX_TOV_SECONDS; | ||
2823 | mcp->flags = 0; | ||
2824 | rval = qla2x00_mailbox_command(vha, mcp); | ||
2825 | |||
2826 | if (rval != QLA_SUCCESS) { | ||
2827 | ql_dbg(ql_dbg_mbx, vha, 0x1183, | ||
2828 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | ||
2829 | } else { | ||
2830 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184, | ||
2831 | "Done %s.\n", __func__); | ||
2832 | } | ||
2833 | |||
2834 | return rval; | ||
2835 | } | ||
2836 | |||
2837 | int | ||
2838 | qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data) | ||
2839 | { | ||
2840 | int rval; | ||
2841 | mbx_cmd_t mc; | ||
2842 | mbx_cmd_t *mcp = &mc; | ||
2843 | |||
2844 | if (!IS_QLA2031(vha->hw)) | ||
2845 | return QLA_FUNCTION_FAILED; | ||
2846 | |||
2847 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185, | ||
2848 | "Entered %s.\n", __func__); | ||
2849 | |||
2850 | mcp->mb[0] = MBC_READ_SERDES; | ||
2851 | mcp->mb[1] = addr; | ||
2852 | mcp->mb[3] = 0; | ||
2853 | mcp->out_mb = MBX_3|MBX_1|MBX_0; | ||
2854 | mcp->in_mb = MBX_1|MBX_0; | ||
2855 | mcp->tov = MBX_TOV_SECONDS; | ||
2856 | mcp->flags = 0; | ||
2857 | rval = qla2x00_mailbox_command(vha, mcp); | ||
2858 | |||
2859 | *data = mcp->mb[1] & 0xff; | ||
2860 | |||
2861 | if (rval != QLA_SUCCESS) { | ||
2862 | ql_dbg(ql_dbg_mbx, vha, 0x1186, | ||
2863 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | ||
2864 | } else { | ||
2865 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187, | ||
2866 | "Done %s.\n", __func__); | ||
2867 | } | ||
2868 | |||
2869 | return rval; | ||
2870 | } | ||
2871 | |||
2803 | /** | 2872 | /** |
2804 | * qla2x00_set_serdes_params() - | 2873 | * qla2x00_set_serdes_params() - |
2805 | * @ha: HA context | 2874 | * @ha: HA context |
diff --git a/drivers/scsi/qla2xxx/qla_mr.c b/drivers/scsi/qla2xxx/qla_mr.c index 30d20e74e48a..ba6f8b139c98 100644 --- a/drivers/scsi/qla2xxx/qla_mr.c +++ b/drivers/scsi/qla2xxx/qla_mr.c | |||
@@ -1610,6 +1610,22 @@ qlafx00_timer_routine(scsi_qla_host_t *vha) | |||
1610 | ha->mr.fw_critemp_timer_tick--; | 1610 | ha->mr.fw_critemp_timer_tick--; |
1611 | } | 1611 | } |
1612 | } | 1612 | } |
1613 | if (ha->mr.host_info_resend) { | ||
1614 | /* | ||
1615 | * Incomplete host info might be sent to firmware | ||
1616 | * durinng system boot - info should be resend | ||
1617 | */ | ||
1618 | if (ha->mr.hinfo_resend_timer_tick == 0) { | ||
1619 | ha->mr.host_info_resend = false; | ||
1620 | set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags); | ||
1621 | ha->mr.hinfo_resend_timer_tick = | ||
1622 | QLAFX00_HINFO_RESEND_INTERVAL; | ||
1623 | qla2xxx_wake_dpc(vha); | ||
1624 | } else { | ||
1625 | ha->mr.hinfo_resend_timer_tick--; | ||
1626 | } | ||
1627 | } | ||
1628 | |||
1613 | } | 1629 | } |
1614 | 1630 | ||
1615 | /* | 1631 | /* |
@@ -1867,6 +1883,7 @@ qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type) | |||
1867 | goto done_free_sp; | 1883 | goto done_free_sp; |
1868 | } | 1884 | } |
1869 | break; | 1885 | break; |
1886 | case FXDISC_ABORT_IOCTL: | ||
1870 | default: | 1887 | default: |
1871 | break; | 1888 | break; |
1872 | } | 1889 | } |
@@ -1888,6 +1905,8 @@ qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type) | |||
1888 | p_sysid->sysname, SYSNAME_LENGTH); | 1905 | p_sysid->sysname, SYSNAME_LENGTH); |
1889 | strncpy(phost_info->nodename, | 1906 | strncpy(phost_info->nodename, |
1890 | p_sysid->nodename, NODENAME_LENGTH); | 1907 | p_sysid->nodename, NODENAME_LENGTH); |
1908 | if (!strcmp(phost_info->nodename, "(none)")) | ||
1909 | ha->mr.host_info_resend = true; | ||
1891 | strncpy(phost_info->release, | 1910 | strncpy(phost_info->release, |
1892 | p_sysid->release, RELEASE_LENGTH); | 1911 | p_sysid->release, RELEASE_LENGTH); |
1893 | strncpy(phost_info->version, | 1912 | strncpy(phost_info->version, |
@@ -1948,8 +1967,8 @@ qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type) | |||
1948 | if (fx_type == FXDISC_GET_CONFIG_INFO) { | 1967 | if (fx_type == FXDISC_GET_CONFIG_INFO) { |
1949 | struct config_info_data *pinfo = | 1968 | struct config_info_data *pinfo = |
1950 | (struct config_info_data *) fdisc->u.fxiocb.rsp_addr; | 1969 | (struct config_info_data *) fdisc->u.fxiocb.rsp_addr; |
1951 | memcpy(&vha->hw->mr.product_name, pinfo->product_name, | 1970 | strcpy(vha->hw->model_number, pinfo->model_num); |
1952 | sizeof(vha->hw->mr.product_name)); | 1971 | strcpy(vha->hw->model_desc, pinfo->model_description); |
1953 | memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name, | 1972 | memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name, |
1954 | sizeof(vha->hw->mr.symbolic_name)); | 1973 | sizeof(vha->hw->mr.symbolic_name)); |
1955 | memcpy(&vha->hw->mr.serial_num, pinfo->serial_num, | 1974 | memcpy(&vha->hw->mr.serial_num, pinfo->serial_num, |
@@ -1993,7 +2012,11 @@ qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type) | |||
1993 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146, | 2012 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146, |
1994 | (uint8_t *)pinfo, 16); | 2013 | (uint8_t *)pinfo, 16); |
1995 | memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE); | 2014 | memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE); |
1996 | } | 2015 | } else if (fx_type == FXDISC_ABORT_IOCTL) |
2016 | fdisc->u.fxiocb.result = | ||
2017 | (fdisc->u.fxiocb.result == cpu_to_le32(0x68)) ? | ||
2018 | cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED); | ||
2019 | |||
1997 | rval = le32_to_cpu(fdisc->u.fxiocb.result); | 2020 | rval = le32_to_cpu(fdisc->u.fxiocb.result); |
1998 | 2021 | ||
1999 | done_unmap_dma: | 2022 | done_unmap_dma: |
@@ -2092,6 +2115,10 @@ qlafx00_abort_command(srb_t *sp) | |||
2092 | /* Command not found. */ | 2115 | /* Command not found. */ |
2093 | return QLA_FUNCTION_FAILED; | 2116 | return QLA_FUNCTION_FAILED; |
2094 | } | 2117 | } |
2118 | if (sp->type == SRB_FXIOCB_DCMD) | ||
2119 | return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, | ||
2120 | FXDISC_ABORT_IOCTL); | ||
2121 | |||
2095 | return qlafx00_async_abt_cmd(sp); | 2122 | return qlafx00_async_abt_cmd(sp); |
2096 | } | 2123 | } |
2097 | 2124 | ||
@@ -2419,7 +2446,6 @@ qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) | |||
2419 | 2446 | ||
2420 | /* Fast path completion. */ | 2447 | /* Fast path completion. */ |
2421 | if (comp_status == CS_COMPLETE && scsi_status == 0) { | 2448 | if (comp_status == CS_COMPLETE && scsi_status == 0) { |
2422 | qla2x00_do_host_ramp_up(vha); | ||
2423 | qla2x00_process_completed_request(vha, req, handle); | 2449 | qla2x00_process_completed_request(vha, req, handle); |
2424 | return; | 2450 | return; |
2425 | } | 2451 | } |
@@ -2630,9 +2656,6 @@ check_scsi_status: | |||
2630 | rsp_info_len, resid_len, fw_resid_len, sense_len, | 2656 | rsp_info_len, resid_len, fw_resid_len, sense_len, |
2631 | par_sense_len, rsp_info_len); | 2657 | par_sense_len, rsp_info_len); |
2632 | 2658 | ||
2633 | if (!res) | ||
2634 | qla2x00_do_host_ramp_up(vha); | ||
2635 | |||
2636 | if (rsp->status_srb == NULL) | 2659 | if (rsp->status_srb == NULL) |
2637 | sp->done(ha, sp, res); | 2660 | sp->done(ha, sp, res); |
2638 | } | 2661 | } |
@@ -3021,6 +3044,8 @@ qlafx00_intr_handler(int irq, void *dev_id) | |||
3021 | vha = pci_get_drvdata(ha->pdev); | 3044 | vha = pci_get_drvdata(ha->pdev); |
3022 | for (iter = 50; iter--; clr_intr = 0) { | 3045 | for (iter = 50; iter--; clr_intr = 0) { |
3023 | stat = QLAFX00_RD_INTR_REG(ha); | 3046 | stat = QLAFX00_RD_INTR_REG(ha); |
3047 | if (qla2x00_check_reg_for_disconnect(vha, stat)) | ||
3048 | break; | ||
3024 | if ((stat & QLAFX00_HST_INT_STS_BITS) == 0) | 3049 | if ((stat & QLAFX00_HST_INT_STS_BITS) == 0) |
3025 | break; | 3050 | break; |
3026 | 3051 | ||
diff --git a/drivers/scsi/qla2xxx/qla_mr.h b/drivers/scsi/qla2xxx/qla_mr.h index 79a93c52baec..6cd7072cc0ff 100644 --- a/drivers/scsi/qla2xxx/qla_mr.h +++ b/drivers/scsi/qla2xxx/qla_mr.h | |||
@@ -304,7 +304,9 @@ struct register_host_info { | |||
304 | #define QLAFX00_TGT_NODE_LIST_SIZE (sizeof(uint32_t) * 32) | 304 | #define QLAFX00_TGT_NODE_LIST_SIZE (sizeof(uint32_t) * 32) |
305 | 305 | ||
306 | struct config_info_data { | 306 | struct config_info_data { |
307 | uint8_t product_name[256]; | 307 | uint8_t model_num[16]; |
308 | uint8_t model_description[80]; | ||
309 | uint8_t reserved0[160]; | ||
308 | uint8_t symbolic_name[64]; | 310 | uint8_t symbolic_name[64]; |
309 | uint8_t serial_num[32]; | 311 | uint8_t serial_num[32]; |
310 | uint8_t hw_version[16]; | 312 | uint8_t hw_version[16]; |
@@ -343,6 +345,7 @@ struct config_info_data { | |||
343 | #define FXDISC_GET_TGT_NODE_INFO 0x80 | 345 | #define FXDISC_GET_TGT_NODE_INFO 0x80 |
344 | #define FXDISC_GET_TGT_NODE_LIST 0x81 | 346 | #define FXDISC_GET_TGT_NODE_LIST 0x81 |
345 | #define FXDISC_REG_HOST_INFO 0x99 | 347 | #define FXDISC_REG_HOST_INFO 0x99 |
348 | #define FXDISC_ABORT_IOCTL 0xff | ||
346 | 349 | ||
347 | #define QLAFX00_HBA_ICNTRL_REG 0x20B08 | 350 | #define QLAFX00_HBA_ICNTRL_REG 0x20B08 |
348 | #define QLAFX00_ICR_ENB_MASK 0x80000000 | 351 | #define QLAFX00_ICR_ENB_MASK 0x80000000 |
@@ -490,7 +493,6 @@ struct qla_mt_iocb_rsp_fx00 { | |||
490 | #define FX00_DEF_RATOV 10 | 493 | #define FX00_DEF_RATOV 10 |
491 | 494 | ||
492 | struct mr_data_fx00 { | 495 | struct mr_data_fx00 { |
493 | uint8_t product_name[256]; | ||
494 | uint8_t symbolic_name[64]; | 496 | uint8_t symbolic_name[64]; |
495 | uint8_t serial_num[32]; | 497 | uint8_t serial_num[32]; |
496 | uint8_t hw_version[16]; | 498 | uint8_t hw_version[16]; |
@@ -511,6 +513,8 @@ struct mr_data_fx00 { | |||
511 | uint32_t old_aenmbx0_state; | 513 | uint32_t old_aenmbx0_state; |
512 | uint32_t critical_temperature; | 514 | uint32_t critical_temperature; |
513 | bool extended_io_enabled; | 515 | bool extended_io_enabled; |
516 | bool host_info_resend; | ||
517 | uint8_t hinfo_resend_timer_tick; | ||
514 | }; | 518 | }; |
515 | 519 | ||
516 | #define QLAFX00_EXTENDED_IO_EN_MASK 0x20 | 520 | #define QLAFX00_EXTENDED_IO_EN_MASK 0x20 |
@@ -537,7 +541,11 @@ struct mr_data_fx00 { | |||
537 | #define QLAFX00_RESET_INTERVAL 120 /* number of seconds */ | 541 | #define QLAFX00_RESET_INTERVAL 120 /* number of seconds */ |
538 | #define QLAFX00_MAX_RESET_INTERVAL 600 /* number of seconds */ | 542 | #define QLAFX00_MAX_RESET_INTERVAL 600 /* number of seconds */ |
539 | #define QLAFX00_CRITEMP_INTERVAL 60 /* number of seconds */ | 543 | #define QLAFX00_CRITEMP_INTERVAL 60 /* number of seconds */ |
544 | #define QLAFX00_HINFO_RESEND_INTERVAL 60 /* number of seconds */ | ||
540 | 545 | ||
541 | #define QLAFX00_CRITEMP_THRSHLD 80 /* Celsius degrees */ | 546 | #define QLAFX00_CRITEMP_THRSHLD 80 /* Celsius degrees */ |
542 | 547 | ||
548 | /* Max conncurrent IOs that can be queued */ | ||
549 | #define QLAFX00_MAX_CANQUEUE 1024 | ||
550 | |||
543 | #endif | 551 | #endif |
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c index 11ce53dcbe7e..1e6ba4a369e2 100644 --- a/drivers/scsi/qla2xxx/qla_nx.c +++ b/drivers/scsi/qla2xxx/qla_nx.c | |||
@@ -2096,6 +2096,7 @@ qla82xx_msix_default(int irq, void *dev_id) | |||
2096 | int status = 0; | 2096 | int status = 0; |
2097 | unsigned long flags; | 2097 | unsigned long flags; |
2098 | uint32_t stat = 0; | 2098 | uint32_t stat = 0; |
2099 | uint32_t host_int = 0; | ||
2099 | uint16_t mb[4]; | 2100 | uint16_t mb[4]; |
2100 | 2101 | ||
2101 | rsp = (struct rsp_que *) dev_id; | 2102 | rsp = (struct rsp_que *) dev_id; |
@@ -2111,7 +2112,10 @@ qla82xx_msix_default(int irq, void *dev_id) | |||
2111 | spin_lock_irqsave(&ha->hardware_lock, flags); | 2112 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2112 | vha = pci_get_drvdata(ha->pdev); | 2113 | vha = pci_get_drvdata(ha->pdev); |
2113 | do { | 2114 | do { |
2114 | if (RD_REG_DWORD(®->host_int)) { | 2115 | host_int = RD_REG_DWORD(®->host_int); |
2116 | if (qla2x00_check_reg_for_disconnect(vha, host_int)) | ||
2117 | break; | ||
2118 | if (host_int) { | ||
2115 | stat = RD_REG_DWORD(®->host_status); | 2119 | stat = RD_REG_DWORD(®->host_status); |
2116 | 2120 | ||
2117 | switch (stat & 0xff) { | 2121 | switch (stat & 0xff) { |
@@ -2156,6 +2160,7 @@ qla82xx_msix_rsp_q(int irq, void *dev_id) | |||
2156 | struct rsp_que *rsp; | 2160 | struct rsp_que *rsp; |
2157 | struct device_reg_82xx __iomem *reg; | 2161 | struct device_reg_82xx __iomem *reg; |
2158 | unsigned long flags; | 2162 | unsigned long flags; |
2163 | uint32_t host_int = 0; | ||
2159 | 2164 | ||
2160 | rsp = (struct rsp_que *) dev_id; | 2165 | rsp = (struct rsp_que *) dev_id; |
2161 | if (!rsp) { | 2166 | if (!rsp) { |
@@ -2168,8 +2173,12 @@ qla82xx_msix_rsp_q(int irq, void *dev_id) | |||
2168 | reg = &ha->iobase->isp82; | 2173 | reg = &ha->iobase->isp82; |
2169 | spin_lock_irqsave(&ha->hardware_lock, flags); | 2174 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2170 | vha = pci_get_drvdata(ha->pdev); | 2175 | vha = pci_get_drvdata(ha->pdev); |
2176 | host_int = RD_REG_DWORD(®->host_int); | ||
2177 | if (qla2x00_check_reg_for_disconnect(vha, host_int)) | ||
2178 | goto out; | ||
2171 | qla24xx_process_response_queue(vha, rsp); | 2179 | qla24xx_process_response_queue(vha, rsp); |
2172 | WRT_REG_DWORD(®->host_int, 0); | 2180 | WRT_REG_DWORD(®->host_int, 0); |
2181 | out: | ||
2173 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 2182 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2174 | return IRQ_HANDLED; | 2183 | return IRQ_HANDLED; |
2175 | } | 2184 | } |
@@ -2183,6 +2192,7 @@ qla82xx_poll(int irq, void *dev_id) | |||
2183 | struct device_reg_82xx __iomem *reg; | 2192 | struct device_reg_82xx __iomem *reg; |
2184 | int status = 0; | 2193 | int status = 0; |
2185 | uint32_t stat; | 2194 | uint32_t stat; |
2195 | uint32_t host_int = 0; | ||
2186 | uint16_t mb[4]; | 2196 | uint16_t mb[4]; |
2187 | unsigned long flags; | 2197 | unsigned long flags; |
2188 | 2198 | ||
@@ -2198,7 +2208,10 @@ qla82xx_poll(int irq, void *dev_id) | |||
2198 | spin_lock_irqsave(&ha->hardware_lock, flags); | 2208 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2199 | vha = pci_get_drvdata(ha->pdev); | 2209 | vha = pci_get_drvdata(ha->pdev); |
2200 | 2210 | ||
2201 | if (RD_REG_DWORD(®->host_int)) { | 2211 | host_int = RD_REG_DWORD(®->host_int); |
2212 | if (qla2x00_check_reg_for_disconnect(vha, host_int)) | ||
2213 | goto out; | ||
2214 | if (host_int) { | ||
2202 | stat = RD_REG_DWORD(®->host_status); | 2215 | stat = RD_REG_DWORD(®->host_status); |
2203 | switch (stat & 0xff) { | 2216 | switch (stat & 0xff) { |
2204 | case 0x1: | 2217 | case 0x1: |
@@ -2224,8 +2237,9 @@ qla82xx_poll(int irq, void *dev_id) | |||
2224 | stat * 0xff); | 2237 | stat * 0xff); |
2225 | break; | 2238 | break; |
2226 | } | 2239 | } |
2240 | WRT_REG_DWORD(®->host_int, 0); | ||
2227 | } | 2241 | } |
2228 | WRT_REG_DWORD(®->host_int, 0); | 2242 | out: |
2229 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 2243 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2230 | } | 2244 | } |
2231 | 2245 | ||
@@ -3003,7 +3017,7 @@ qla8xxx_dev_failed_handler(scsi_qla_host_t *vha) | |||
3003 | qla82xx_clear_drv_active(ha); | 3017 | qla82xx_clear_drv_active(ha); |
3004 | qla82xx_idc_unlock(ha); | 3018 | qla82xx_idc_unlock(ha); |
3005 | } else if (IS_QLA8044(ha)) { | 3019 | } else if (IS_QLA8044(ha)) { |
3006 | qla8044_clear_drv_active(vha); | 3020 | qla8044_clear_drv_active(ha); |
3007 | qla8044_idc_unlock(ha); | 3021 | qla8044_idc_unlock(ha); |
3008 | } | 3022 | } |
3009 | 3023 | ||
diff --git a/drivers/scsi/qla2xxx/qla_nx2.c b/drivers/scsi/qla2xxx/qla_nx2.c index 4f5d66b2168b..f60989d729a8 100644 --- a/drivers/scsi/qla2xxx/qla_nx2.c +++ b/drivers/scsi/qla2xxx/qla_nx2.c | |||
@@ -1257,10 +1257,10 @@ exit_start_fw: | |||
1257 | } | 1257 | } |
1258 | 1258 | ||
1259 | void | 1259 | void |
1260 | qla8044_clear_drv_active(struct scsi_qla_host *vha) | 1260 | qla8044_clear_drv_active(struct qla_hw_data *ha) |
1261 | { | 1261 | { |
1262 | uint32_t drv_active; | 1262 | uint32_t drv_active; |
1263 | struct qla_hw_data *ha = vha->hw; | 1263 | struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); |
1264 | 1264 | ||
1265 | drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX); | 1265 | drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX); |
1266 | drv_active &= ~(1 << (ha->portnum)); | 1266 | drv_active &= ~(1 << (ha->portnum)); |
@@ -1324,7 +1324,7 @@ qla8044_device_bootstrap(struct scsi_qla_host *vha) | |||
1324 | if (rval != QLA_SUCCESS) { | 1324 | if (rval != QLA_SUCCESS) { |
1325 | ql_log(ql_log_info, vha, 0xb0b3, | 1325 | ql_log(ql_log_info, vha, 0xb0b3, |
1326 | "%s: HW State: FAILED\n", __func__); | 1326 | "%s: HW State: FAILED\n", __func__); |
1327 | qla8044_clear_drv_active(vha); | 1327 | qla8044_clear_drv_active(ha); |
1328 | qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX, | 1328 | qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX, |
1329 | QLA8XXX_DEV_FAILED); | 1329 | QLA8XXX_DEV_FAILED); |
1330 | return rval; | 1330 | return rval; |
@@ -1555,6 +1555,15 @@ qla8044_need_reset_handler(struct scsi_qla_host *vha) | |||
1555 | qla8044_idc_lock(ha); | 1555 | qla8044_idc_lock(ha); |
1556 | } | 1556 | } |
1557 | 1557 | ||
1558 | drv_state = qla8044_rd_direct(vha, | ||
1559 | QLA8044_CRB_DRV_STATE_INDEX); | ||
1560 | drv_active = qla8044_rd_direct(vha, | ||
1561 | QLA8044_CRB_DRV_ACTIVE_INDEX); | ||
1562 | |||
1563 | ql_log(ql_log_info, vha, 0xb0c5, | ||
1564 | "%s(%ld): drv_state = 0x%x, drv_active = 0x%x\n", | ||
1565 | __func__, vha->host_no, drv_state, drv_active); | ||
1566 | |||
1558 | if (!ha->flags.nic_core_reset_owner) { | 1567 | if (!ha->flags.nic_core_reset_owner) { |
1559 | ql_dbg(ql_dbg_p3p, vha, 0xb0c3, | 1568 | ql_dbg(ql_dbg_p3p, vha, 0xb0c3, |
1560 | "%s(%ld): reset acknowledged\n", | 1569 | "%s(%ld): reset acknowledged\n", |
@@ -1580,23 +1589,15 @@ qla8044_need_reset_handler(struct scsi_qla_host *vha) | |||
1580 | 1589 | ||
1581 | dev_state = qla8044_rd_direct(vha, | 1590 | dev_state = qla8044_rd_direct(vha, |
1582 | QLA8044_CRB_DEV_STATE_INDEX); | 1591 | QLA8044_CRB_DEV_STATE_INDEX); |
1583 | } while (dev_state == QLA8XXX_DEV_NEED_RESET); | 1592 | } while (((drv_state & drv_active) != drv_active) && |
1593 | (dev_state == QLA8XXX_DEV_NEED_RESET)); | ||
1584 | } else { | 1594 | } else { |
1585 | qla8044_set_rst_ready(vha); | 1595 | qla8044_set_rst_ready(vha); |
1586 | 1596 | ||
1587 | /* wait for 10 seconds for reset ack from all functions */ | 1597 | /* wait for 10 seconds for reset ack from all functions */ |
1588 | reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); | 1598 | reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); |
1589 | 1599 | ||
1590 | drv_state = qla8044_rd_direct(vha, | 1600 | while ((drv_state & drv_active) != drv_active) { |
1591 | QLA8044_CRB_DRV_STATE_INDEX); | ||
1592 | drv_active = qla8044_rd_direct(vha, | ||
1593 | QLA8044_CRB_DRV_ACTIVE_INDEX); | ||
1594 | |||
1595 | ql_log(ql_log_info, vha, 0xb0c5, | ||
1596 | "%s(%ld): drv_state = 0x%x, drv_active = 0x%x\n", | ||
1597 | __func__, vha->host_no, drv_state, drv_active); | ||
1598 | |||
1599 | while (drv_state != drv_active) { | ||
1600 | if (time_after_eq(jiffies, reset_timeout)) { | 1601 | if (time_after_eq(jiffies, reset_timeout)) { |
1601 | ql_log(ql_log_info, vha, 0xb0c6, | 1602 | ql_log(ql_log_info, vha, 0xb0c6, |
1602 | "%s: RESET TIMEOUT!" | 1603 | "%s: RESET TIMEOUT!" |
@@ -1736,7 +1737,7 @@ qla8044_update_idc_reg(struct scsi_qla_host *vha) | |||
1736 | 1737 | ||
1737 | rval = qla8044_set_idc_ver(vha); | 1738 | rval = qla8044_set_idc_ver(vha); |
1738 | if (rval == QLA_FUNCTION_FAILED) | 1739 | if (rval == QLA_FUNCTION_FAILED) |
1739 | qla8044_clear_drv_active(vha); | 1740 | qla8044_clear_drv_active(ha); |
1740 | qla8044_idc_unlock(ha); | 1741 | qla8044_idc_unlock(ha); |
1741 | 1742 | ||
1742 | exit_update_idc_reg: | 1743 | exit_update_idc_reg: |
@@ -1859,7 +1860,7 @@ qla8044_device_state_handler(struct scsi_qla_host *vha) | |||
1859 | goto exit; | 1860 | goto exit; |
1860 | case QLA8XXX_DEV_COLD: | 1861 | case QLA8XXX_DEV_COLD: |
1861 | rval = qla8044_device_bootstrap(vha); | 1862 | rval = qla8044_device_bootstrap(vha); |
1862 | goto exit; | 1863 | break; |
1863 | case QLA8XXX_DEV_INITIALIZING: | 1864 | case QLA8XXX_DEV_INITIALIZING: |
1864 | qla8044_idc_unlock(ha); | 1865 | qla8044_idc_unlock(ha); |
1865 | msleep(1000); | 1866 | msleep(1000); |
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index 52be35e0300c..89a53002b585 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
@@ -110,7 +110,8 @@ MODULE_PARM_DESC(ql2xfdmienable, | |||
110 | "Enables FDMI registrations. " | 110 | "Enables FDMI registrations. " |
111 | "0 - no FDMI. Default is 1 - perform FDMI."); | 111 | "0 - no FDMI. Default is 1 - perform FDMI."); |
112 | 112 | ||
113 | int ql2xmaxqdepth = MAX_Q_DEPTH; | 113 | #define MAX_Q_DEPTH 32 |
114 | static int ql2xmaxqdepth = MAX_Q_DEPTH; | ||
114 | module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR); | 115 | module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR); |
115 | MODULE_PARM_DESC(ql2xmaxqdepth, | 116 | MODULE_PARM_DESC(ql2xmaxqdepth, |
116 | "Maximum queue depth to set for each LUN. " | 117 | "Maximum queue depth to set for each LUN. " |
@@ -728,10 +729,8 @@ qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd) | |||
728 | } | 729 | } |
729 | 730 | ||
730 | sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC); | 731 | sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC); |
731 | if (!sp) { | 732 | if (!sp) |
732 | set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags); | ||
733 | goto qc24_host_busy; | 733 | goto qc24_host_busy; |
734 | } | ||
735 | 734 | ||
736 | sp->u.scmd.cmd = cmd; | 735 | sp->u.scmd.cmd = cmd; |
737 | sp->type = SRB_SCSI_CMD; | 736 | sp->type = SRB_SCSI_CMD; |
@@ -744,7 +743,6 @@ qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd) | |||
744 | if (rval != QLA_SUCCESS) { | 743 | if (rval != QLA_SUCCESS) { |
745 | ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013, | 744 | ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013, |
746 | "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd); | 745 | "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd); |
747 | set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags); | ||
748 | goto qc24_host_busy_free_sp; | 746 | goto qc24_host_busy_free_sp; |
749 | } | 747 | } |
750 | 748 | ||
@@ -1474,81 +1472,6 @@ qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type) | |||
1474 | return tag_type; | 1472 | return tag_type; |
1475 | } | 1473 | } |
1476 | 1474 | ||
1477 | static void | ||
1478 | qla2x00_host_ramp_down_queuedepth(scsi_qla_host_t *vha) | ||
1479 | { | ||
1480 | scsi_qla_host_t *vp; | ||
1481 | struct Scsi_Host *shost; | ||
1482 | struct scsi_device *sdev; | ||
1483 | struct qla_hw_data *ha = vha->hw; | ||
1484 | unsigned long flags; | ||
1485 | |||
1486 | ha->host_last_rampdown_time = jiffies; | ||
1487 | |||
1488 | if (ha->cfg_lun_q_depth <= vha->host->cmd_per_lun) | ||
1489 | return; | ||
1490 | |||
1491 | if ((ha->cfg_lun_q_depth / 2) < vha->host->cmd_per_lun) | ||
1492 | ha->cfg_lun_q_depth = vha->host->cmd_per_lun; | ||
1493 | else | ||
1494 | ha->cfg_lun_q_depth = ha->cfg_lun_q_depth / 2; | ||
1495 | |||
1496 | /* | ||
1497 | * Geometrically ramp down the queue depth for all devices on this | ||
1498 | * adapter | ||
1499 | */ | ||
1500 | spin_lock_irqsave(&ha->vport_slock, flags); | ||
1501 | list_for_each_entry(vp, &ha->vp_list, list) { | ||
1502 | shost = vp->host; | ||
1503 | shost_for_each_device(sdev, shost) { | ||
1504 | if (sdev->queue_depth > shost->cmd_per_lun) { | ||
1505 | if (sdev->queue_depth < ha->cfg_lun_q_depth) | ||
1506 | continue; | ||
1507 | ql_dbg(ql_dbg_io, vp, 0x3031, | ||
1508 | "%ld:%d:%d: Ramping down queue depth to %d", | ||
1509 | vp->host_no, sdev->id, sdev->lun, | ||
1510 | ha->cfg_lun_q_depth); | ||
1511 | qla2x00_change_queue_depth(sdev, | ||
1512 | ha->cfg_lun_q_depth, SCSI_QDEPTH_DEFAULT); | ||
1513 | } | ||
1514 | } | ||
1515 | } | ||
1516 | spin_unlock_irqrestore(&ha->vport_slock, flags); | ||
1517 | |||
1518 | return; | ||
1519 | } | ||
1520 | |||
1521 | static void | ||
1522 | qla2x00_host_ramp_up_queuedepth(scsi_qla_host_t *vha) | ||
1523 | { | ||
1524 | scsi_qla_host_t *vp; | ||
1525 | struct Scsi_Host *shost; | ||
1526 | struct scsi_device *sdev; | ||
1527 | struct qla_hw_data *ha = vha->hw; | ||
1528 | unsigned long flags; | ||
1529 | |||
1530 | ha->host_last_rampup_time = jiffies; | ||
1531 | ha->cfg_lun_q_depth++; | ||
1532 | |||
1533 | /* | ||
1534 | * Linearly ramp up the queue depth for all devices on this | ||
1535 | * adapter | ||
1536 | */ | ||
1537 | spin_lock_irqsave(&ha->vport_slock, flags); | ||
1538 | list_for_each_entry(vp, &ha->vp_list, list) { | ||
1539 | shost = vp->host; | ||
1540 | shost_for_each_device(sdev, shost) { | ||
1541 | if (sdev->queue_depth > ha->cfg_lun_q_depth) | ||
1542 | continue; | ||
1543 | qla2x00_change_queue_depth(sdev, ha->cfg_lun_q_depth, | ||
1544 | SCSI_QDEPTH_RAMP_UP); | ||
1545 | } | ||
1546 | } | ||
1547 | spin_unlock_irqrestore(&ha->vport_slock, flags); | ||
1548 | |||
1549 | return; | ||
1550 | } | ||
1551 | |||
1552 | /** | 1475 | /** |
1553 | * qla2x00_config_dma_addressing() - Configure OS DMA addressing method. | 1476 | * qla2x00_config_dma_addressing() - Configure OS DMA addressing method. |
1554 | * @ha: HA context | 1477 | * @ha: HA context |
@@ -2424,7 +2347,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2424 | ha->init_cb_size = sizeof(init_cb_t); | 2347 | ha->init_cb_size = sizeof(init_cb_t); |
2425 | ha->link_data_rate = PORT_SPEED_UNKNOWN; | 2348 | ha->link_data_rate = PORT_SPEED_UNKNOWN; |
2426 | ha->optrom_size = OPTROM_SIZE_2300; | 2349 | ha->optrom_size = OPTROM_SIZE_2300; |
2427 | ha->cfg_lun_q_depth = ql2xmaxqdepth; | ||
2428 | 2350 | ||
2429 | /* Assign ISP specific operations. */ | 2351 | /* Assign ISP specific operations. */ |
2430 | if (IS_QLA2100(ha)) { | 2352 | if (IS_QLA2100(ha)) { |
@@ -2573,6 +2495,8 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2573 | ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; | 2495 | ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; |
2574 | ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL; | 2496 | ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL; |
2575 | ha->mr.fw_hbt_en = 1; | 2497 | ha->mr.fw_hbt_en = 1; |
2498 | ha->mr.host_info_resend = false; | ||
2499 | ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL; | ||
2576 | } | 2500 | } |
2577 | 2501 | ||
2578 | ql_dbg_pci(ql_dbg_init, pdev, 0x001e, | 2502 | ql_dbg_pci(ql_dbg_init, pdev, 0x001e, |
@@ -2638,7 +2562,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2638 | host = base_vha->host; | 2562 | host = base_vha->host; |
2639 | base_vha->req = req; | 2563 | base_vha->req = req; |
2640 | if (IS_QLAFX00(ha)) | 2564 | if (IS_QLAFX00(ha)) |
2641 | host->can_queue = 1024; | 2565 | host->can_queue = QLAFX00_MAX_CANQUEUE; |
2642 | else | 2566 | else |
2643 | host->can_queue = req->length + 128; | 2567 | host->can_queue = req->length + 128; |
2644 | if (IS_QLA2XXX_MIDTYPE(ha)) | 2568 | if (IS_QLA2XXX_MIDTYPE(ha)) |
@@ -2816,6 +2740,8 @@ que_init: | |||
2816 | */ | 2740 | */ |
2817 | qla2xxx_wake_dpc(base_vha); | 2741 | qla2xxx_wake_dpc(base_vha); |
2818 | 2742 | ||
2743 | INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error); | ||
2744 | |||
2819 | if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) { | 2745 | if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) { |
2820 | sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no); | 2746 | sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no); |
2821 | ha->dpc_lp_wq = create_singlethread_workqueue(wq_name); | 2747 | ha->dpc_lp_wq = create_singlethread_workqueue(wq_name); |
@@ -2955,7 +2881,7 @@ probe_hw_failed: | |||
2955 | } | 2881 | } |
2956 | if (IS_QLA8044(ha)) { | 2882 | if (IS_QLA8044(ha)) { |
2957 | qla8044_idc_lock(ha); | 2883 | qla8044_idc_lock(ha); |
2958 | qla8044_clear_drv_active(base_vha); | 2884 | qla8044_clear_drv_active(ha); |
2959 | qla8044_idc_unlock(ha); | 2885 | qla8044_idc_unlock(ha); |
2960 | } | 2886 | } |
2961 | iospace_config_failed: | 2887 | iospace_config_failed: |
@@ -2980,22 +2906,6 @@ probe_out: | |||
2980 | } | 2906 | } |
2981 | 2907 | ||
2982 | static void | 2908 | static void |
2983 | qla2x00_stop_dpc_thread(scsi_qla_host_t *vha) | ||
2984 | { | ||
2985 | struct qla_hw_data *ha = vha->hw; | ||
2986 | struct task_struct *t = ha->dpc_thread; | ||
2987 | |||
2988 | if (ha->dpc_thread == NULL) | ||
2989 | return; | ||
2990 | /* | ||
2991 | * qla2xxx_wake_dpc checks for ->dpc_thread | ||
2992 | * so we need to zero it out. | ||
2993 | */ | ||
2994 | ha->dpc_thread = NULL; | ||
2995 | kthread_stop(t); | ||
2996 | } | ||
2997 | |||
2998 | static void | ||
2999 | qla2x00_shutdown(struct pci_dev *pdev) | 2909 | qla2x00_shutdown(struct pci_dev *pdev) |
3000 | { | 2910 | { |
3001 | scsi_qla_host_t *vha; | 2911 | scsi_qla_host_t *vha; |
@@ -3038,29 +2948,14 @@ qla2x00_shutdown(struct pci_dev *pdev) | |||
3038 | qla2x00_free_fw_dump(ha); | 2948 | qla2x00_free_fw_dump(ha); |
3039 | } | 2949 | } |
3040 | 2950 | ||
2951 | /* Deletes all the virtual ports for a given ha */ | ||
3041 | static void | 2952 | static void |
3042 | qla2x00_remove_one(struct pci_dev *pdev) | 2953 | qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha) |
3043 | { | 2954 | { |
3044 | scsi_qla_host_t *base_vha, *vha; | 2955 | struct Scsi_Host *scsi_host; |
3045 | struct qla_hw_data *ha; | 2956 | scsi_qla_host_t *vha; |
3046 | unsigned long flags; | 2957 | unsigned long flags; |
3047 | 2958 | ||
3048 | /* | ||
3049 | * If the PCI device is disabled that means that probe failed and any | ||
3050 | * resources should be have cleaned up on probe exit. | ||
3051 | */ | ||
3052 | if (!atomic_read(&pdev->enable_cnt)) | ||
3053 | return; | ||
3054 | |||
3055 | base_vha = pci_get_drvdata(pdev); | ||
3056 | ha = base_vha->hw; | ||
3057 | |||
3058 | ha->flags.host_shutting_down = 1; | ||
3059 | |||
3060 | set_bit(UNLOADING, &base_vha->dpc_flags); | ||
3061 | if (IS_QLAFX00(ha)) | ||
3062 | qlafx00_driver_shutdown(base_vha, 20); | ||
3063 | |||
3064 | mutex_lock(&ha->vport_lock); | 2959 | mutex_lock(&ha->vport_lock); |
3065 | while (ha->cur_vport_count) { | 2960 | while (ha->cur_vport_count) { |
3066 | spin_lock_irqsave(&ha->vport_slock, flags); | 2961 | spin_lock_irqsave(&ha->vport_slock, flags); |
@@ -3068,7 +2963,7 @@ qla2x00_remove_one(struct pci_dev *pdev) | |||
3068 | BUG_ON(base_vha->list.next == &ha->vp_list); | 2963 | BUG_ON(base_vha->list.next == &ha->vp_list); |
3069 | /* This assumes first entry in ha->vp_list is always base vha */ | 2964 | /* This assumes first entry in ha->vp_list is always base vha */ |
3070 | vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list); | 2965 | vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list); |
3071 | scsi_host_get(vha->host); | 2966 | scsi_host = scsi_host_get(vha->host); |
3072 | 2967 | ||
3073 | spin_unlock_irqrestore(&ha->vport_slock, flags); | 2968 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
3074 | mutex_unlock(&ha->vport_lock); | 2969 | mutex_unlock(&ha->vport_lock); |
@@ -3079,27 +2974,12 @@ qla2x00_remove_one(struct pci_dev *pdev) | |||
3079 | mutex_lock(&ha->vport_lock); | 2974 | mutex_lock(&ha->vport_lock); |
3080 | } | 2975 | } |
3081 | mutex_unlock(&ha->vport_lock); | 2976 | mutex_unlock(&ha->vport_lock); |
2977 | } | ||
3082 | 2978 | ||
3083 | if (IS_QLA8031(ha)) { | 2979 | /* Stops all deferred work threads */ |
3084 | ql_dbg(ql_dbg_p3p, base_vha, 0xb07e, | 2980 | static void |
3085 | "Clearing fcoe driver presence.\n"); | 2981 | qla2x00_destroy_deferred_work(struct qla_hw_data *ha) |
3086 | if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS) | 2982 | { |
3087 | ql_dbg(ql_dbg_p3p, base_vha, 0xb079, | ||
3088 | "Error while clearing DRV-Presence.\n"); | ||
3089 | } | ||
3090 | |||
3091 | qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); | ||
3092 | |||
3093 | qla2x00_dfs_remove(base_vha); | ||
3094 | |||
3095 | qla84xx_put_chip(base_vha); | ||
3096 | |||
3097 | /* Disable timer */ | ||
3098 | if (base_vha->timer_active) | ||
3099 | qla2x00_stop_timer(base_vha); | ||
3100 | |||
3101 | base_vha->flags.online = 0; | ||
3102 | |||
3103 | /* Flush the work queue and remove it */ | 2983 | /* Flush the work queue and remove it */ |
3104 | if (ha->wq) { | 2984 | if (ha->wq) { |
3105 | flush_workqueue(ha->wq); | 2985 | flush_workqueue(ha->wq); |
@@ -3133,27 +3013,12 @@ qla2x00_remove_one(struct pci_dev *pdev) | |||
3133 | ha->dpc_thread = NULL; | 3013 | ha->dpc_thread = NULL; |
3134 | kthread_stop(t); | 3014 | kthread_stop(t); |
3135 | } | 3015 | } |
3136 | qlt_remove_target(ha, base_vha); | 3016 | } |
3137 | |||
3138 | qla2x00_free_sysfs_attr(base_vha); | ||
3139 | |||
3140 | fc_remove_host(base_vha->host); | ||
3141 | |||
3142 | scsi_remove_host(base_vha->host); | ||
3143 | |||
3144 | qla2x00_free_device(base_vha); | ||
3145 | |||
3146 | scsi_host_put(base_vha->host); | ||
3147 | 3017 | ||
3148 | if (IS_QLA8044(ha)) { | 3018 | static void |
3149 | qla8044_idc_lock(ha); | 3019 | qla2x00_unmap_iobases(struct qla_hw_data *ha) |
3150 | qla8044_clear_drv_active(base_vha); | 3020 | { |
3151 | qla8044_idc_unlock(ha); | ||
3152 | } | ||
3153 | if (IS_QLA82XX(ha)) { | 3021 | if (IS_QLA82XX(ha)) { |
3154 | qla82xx_idc_lock(ha); | ||
3155 | qla82xx_clear_drv_active(ha); | ||
3156 | qla82xx_idc_unlock(ha); | ||
3157 | 3022 | ||
3158 | iounmap((device_reg_t __iomem *)ha->nx_pcibase); | 3023 | iounmap((device_reg_t __iomem *)ha->nx_pcibase); |
3159 | if (!ql2xdbwr) | 3024 | if (!ql2xdbwr) |
@@ -3171,6 +3036,84 @@ qla2x00_remove_one(struct pci_dev *pdev) | |||
3171 | if (IS_QLA83XX(ha) && ha->msixbase) | 3036 | if (IS_QLA83XX(ha) && ha->msixbase) |
3172 | iounmap(ha->msixbase); | 3037 | iounmap(ha->msixbase); |
3173 | } | 3038 | } |
3039 | } | ||
3040 | |||
3041 | static void | ||
3042 | qla2x00_clear_drv_active(scsi_qla_host_t *vha) | ||
3043 | { | ||
3044 | struct qla_hw_data *ha = vha->hw; | ||
3045 | |||
3046 | if (IS_QLA8044(ha)) { | ||
3047 | qla8044_idc_lock(ha); | ||
3048 | qla8044_clear_drv_active(ha); | ||
3049 | qla8044_idc_unlock(ha); | ||
3050 | } else if (IS_QLA82XX(ha)) { | ||
3051 | qla82xx_idc_lock(ha); | ||
3052 | qla82xx_clear_drv_active(ha); | ||
3053 | qla82xx_idc_unlock(ha); | ||
3054 | } | ||
3055 | } | ||
3056 | |||
3057 | static void | ||
3058 | qla2x00_remove_one(struct pci_dev *pdev) | ||
3059 | { | ||
3060 | scsi_qla_host_t *base_vha; | ||
3061 | struct qla_hw_data *ha; | ||
3062 | |||
3063 | /* | ||
3064 | * If the PCI device is disabled that means that probe failed and any | ||
3065 | * resources should be have cleaned up on probe exit. | ||
3066 | */ | ||
3067 | if (!atomic_read(&pdev->enable_cnt)) | ||
3068 | return; | ||
3069 | |||
3070 | base_vha = pci_get_drvdata(pdev); | ||
3071 | ha = base_vha->hw; | ||
3072 | |||
3073 | set_bit(UNLOADING, &base_vha->dpc_flags); | ||
3074 | |||
3075 | if (IS_QLAFX00(ha)) | ||
3076 | qlafx00_driver_shutdown(base_vha, 20); | ||
3077 | |||
3078 | qla2x00_delete_all_vps(ha, base_vha); | ||
3079 | |||
3080 | if (IS_QLA8031(ha)) { | ||
3081 | ql_dbg(ql_dbg_p3p, base_vha, 0xb07e, | ||
3082 | "Clearing fcoe driver presence.\n"); | ||
3083 | if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS) | ||
3084 | ql_dbg(ql_dbg_p3p, base_vha, 0xb079, | ||
3085 | "Error while clearing DRV-Presence.\n"); | ||
3086 | } | ||
3087 | |||
3088 | qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); | ||
3089 | |||
3090 | qla2x00_dfs_remove(base_vha); | ||
3091 | |||
3092 | qla84xx_put_chip(base_vha); | ||
3093 | |||
3094 | /* Disable timer */ | ||
3095 | if (base_vha->timer_active) | ||
3096 | qla2x00_stop_timer(base_vha); | ||
3097 | |||
3098 | base_vha->flags.online = 0; | ||
3099 | |||
3100 | qla2x00_destroy_deferred_work(ha); | ||
3101 | |||
3102 | qlt_remove_target(ha, base_vha); | ||
3103 | |||
3104 | qla2x00_free_sysfs_attr(base_vha, true); | ||
3105 | |||
3106 | fc_remove_host(base_vha->host); | ||
3107 | |||
3108 | scsi_remove_host(base_vha->host); | ||
3109 | |||
3110 | qla2x00_free_device(base_vha); | ||
3111 | |||
3112 | scsi_host_put(base_vha->host); | ||
3113 | |||
3114 | qla2x00_clear_drv_active(base_vha); | ||
3115 | |||
3116 | qla2x00_unmap_iobases(ha); | ||
3174 | 3117 | ||
3175 | pci_release_selected_regions(ha->pdev, ha->bars); | 3118 | pci_release_selected_regions(ha->pdev, ha->bars); |
3176 | kfree(ha); | 3119 | kfree(ha); |
@@ -3192,9 +3135,8 @@ qla2x00_free_device(scsi_qla_host_t *vha) | |||
3192 | if (vha->timer_active) | 3135 | if (vha->timer_active) |
3193 | qla2x00_stop_timer(vha); | 3136 | qla2x00_stop_timer(vha); |
3194 | 3137 | ||
3195 | qla2x00_stop_dpc_thread(vha); | ||
3196 | |||
3197 | qla25xx_delete_queues(vha); | 3138 | qla25xx_delete_queues(vha); |
3139 | |||
3198 | if (ha->flags.fce_enabled) | 3140 | if (ha->flags.fce_enabled) |
3199 | qla2x00_disable_fce_trace(vha, NULL, NULL); | 3141 | qla2x00_disable_fce_trace(vha, NULL, NULL); |
3200 | 3142 | ||
@@ -4731,6 +4673,66 @@ exit: | |||
4731 | return rval; | 4673 | return rval; |
4732 | } | 4674 | } |
4733 | 4675 | ||
4676 | void | ||
4677 | qla2x00_disable_board_on_pci_error(struct work_struct *work) | ||
4678 | { | ||
4679 | struct qla_hw_data *ha = container_of(work, struct qla_hw_data, | ||
4680 | board_disable); | ||
4681 | struct pci_dev *pdev = ha->pdev; | ||
4682 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | ||
4683 | |||
4684 | ql_log(ql_log_warn, base_vha, 0x015b, | ||
4685 | "Disabling adapter.\n"); | ||
4686 | |||
4687 | set_bit(UNLOADING, &base_vha->dpc_flags); | ||
4688 | |||
4689 | qla2x00_delete_all_vps(ha, base_vha); | ||
4690 | |||
4691 | qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); | ||
4692 | |||
4693 | qla2x00_dfs_remove(base_vha); | ||
4694 | |||
4695 | qla84xx_put_chip(base_vha); | ||
4696 | |||
4697 | if (base_vha->timer_active) | ||
4698 | qla2x00_stop_timer(base_vha); | ||
4699 | |||
4700 | base_vha->flags.online = 0; | ||
4701 | |||
4702 | qla2x00_destroy_deferred_work(ha); | ||
4703 | |||
4704 | /* | ||
4705 | * Do not try to stop beacon blink as it will issue a mailbox | ||
4706 | * command. | ||
4707 | */ | ||
4708 | qla2x00_free_sysfs_attr(base_vha, false); | ||
4709 | |||
4710 | fc_remove_host(base_vha->host); | ||
4711 | |||
4712 | scsi_remove_host(base_vha->host); | ||
4713 | |||
4714 | base_vha->flags.init_done = 0; | ||
4715 | qla25xx_delete_queues(base_vha); | ||
4716 | qla2x00_free_irqs(base_vha); | ||
4717 | qla2x00_free_fcports(base_vha); | ||
4718 | qla2x00_mem_free(ha); | ||
4719 | qla82xx_md_free(base_vha); | ||
4720 | qla2x00_free_queues(ha); | ||
4721 | |||
4722 | scsi_host_put(base_vha->host); | ||
4723 | |||
4724 | qla2x00_unmap_iobases(ha); | ||
4725 | |||
4726 | pci_release_selected_regions(ha->pdev, ha->bars); | ||
4727 | kfree(ha); | ||
4728 | ha = NULL; | ||
4729 | |||
4730 | pci_disable_pcie_error_reporting(pdev); | ||
4731 | pci_disable_device(pdev); | ||
4732 | pci_set_drvdata(pdev, NULL); | ||
4733 | |||
4734 | } | ||
4735 | |||
4734 | /************************************************************************** | 4736 | /************************************************************************** |
4735 | * qla2x00_do_dpc | 4737 | * qla2x00_do_dpc |
4736 | * This kernel thread is a task that is schedule by the interrupt handler | 4738 | * This kernel thread is a task that is schedule by the interrupt handler |
@@ -4863,6 +4865,14 @@ qla2x00_do_dpc(void *data) | |||
4863 | ql_dbg(ql_dbg_dpc, base_vha, 0x401f, | 4865 | ql_dbg(ql_dbg_dpc, base_vha, 0x401f, |
4864 | "ISPFx00 Target Scan End\n"); | 4866 | "ISPFx00 Target Scan End\n"); |
4865 | } | 4867 | } |
4868 | if (test_and_clear_bit(FX00_HOST_INFO_RESEND, | ||
4869 | &base_vha->dpc_flags)) { | ||
4870 | ql_dbg(ql_dbg_dpc, base_vha, 0x4023, | ||
4871 | "ISPFx00 Host Info resend scheduled\n"); | ||
4872 | qlafx00_fx_disc(base_vha, | ||
4873 | &base_vha->hw->mr.fcport, | ||
4874 | FXDISC_REG_HOST_INFO); | ||
4875 | } | ||
4866 | } | 4876 | } |
4867 | 4877 | ||
4868 | if (test_and_clear_bit(ISP_ABORT_NEEDED, | 4878 | if (test_and_clear_bit(ISP_ABORT_NEEDED, |
@@ -4990,17 +5000,6 @@ loop_resync_check: | |||
4990 | qla2xxx_flash_npiv_conf(base_vha); | 5000 | qla2xxx_flash_npiv_conf(base_vha); |
4991 | } | 5001 | } |
4992 | 5002 | ||
4993 | if (test_and_clear_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, | ||
4994 | &base_vha->dpc_flags)) { | ||
4995 | /* Prevents simultaneous ramp up and down */ | ||
4996 | clear_bit(HOST_RAMP_UP_QUEUE_DEPTH, | ||
4997 | &base_vha->dpc_flags); | ||
4998 | qla2x00_host_ramp_down_queuedepth(base_vha); | ||
4999 | } | ||
5000 | |||
5001 | if (test_and_clear_bit(HOST_RAMP_UP_QUEUE_DEPTH, | ||
5002 | &base_vha->dpc_flags)) | ||
5003 | qla2x00_host_ramp_up_queuedepth(base_vha); | ||
5004 | intr_on_check: | 5003 | intr_on_check: |
5005 | if (!ha->interrupts_on) | 5004 | if (!ha->interrupts_on) |
5006 | ha->isp_ops->enable_intrs(ha); | 5005 | ha->isp_ops->enable_intrs(ha); |
@@ -5095,9 +5094,20 @@ qla2x00_timer(scsi_qla_host_t *vha) | |||
5095 | return; | 5094 | return; |
5096 | } | 5095 | } |
5097 | 5096 | ||
5098 | /* Hardware read to raise pending EEH errors during mailbox waits. */ | 5097 | /* |
5099 | if (!pci_channel_offline(ha->pdev)) | 5098 | * Hardware read to raise pending EEH errors during mailbox waits. If |
5099 | * the read returns -1 then disable the board. | ||
5100 | */ | ||
5101 | if (!pci_channel_offline(ha->pdev)) { | ||
5100 | pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); | 5102 | pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); |
5103 | if (w == 0xffff) | ||
5104 | /* | ||
5105 | * Schedule this on the default system workqueue so that | ||
5106 | * all the adapter workqueues and the DPC thread can be | ||
5107 | * shutdown cleanly. | ||
5108 | */ | ||
5109 | schedule_work(&ha->board_disable); | ||
5110 | } | ||
5101 | 5111 | ||
5102 | /* Make sure qla82xx_watchdog is run only for physical port */ | 5112 | /* Make sure qla82xx_watchdog is run only for physical port */ |
5103 | if (!vha->vp_idx && IS_P3P_TYPE(ha)) { | 5113 | if (!vha->vp_idx && IS_P3P_TYPE(ha)) { |
@@ -5182,7 +5192,6 @@ qla2x00_timer(scsi_qla_host_t *vha) | |||
5182 | "Loop down - seconds remaining %d.\n", | 5192 | "Loop down - seconds remaining %d.\n", |
5183 | atomic_read(&vha->loop_down_timer)); | 5193 | atomic_read(&vha->loop_down_timer)); |
5184 | } | 5194 | } |
5185 | |||
5186 | /* Check if beacon LED needs to be blinked for physical host only */ | 5195 | /* Check if beacon LED needs to be blinked for physical host only */ |
5187 | if (!vha->vp_idx && (ha->beacon_blink_led == 1)) { | 5196 | if (!vha->vp_idx && (ha->beacon_blink_led == 1)) { |
5188 | /* There is no beacon_blink function for ISP82xx */ | 5197 | /* There is no beacon_blink function for ISP82xx */ |
@@ -5206,9 +5215,7 @@ qla2x00_timer(scsi_qla_host_t *vha) | |||
5206 | test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) || | 5215 | test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) || |
5207 | test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) || | 5216 | test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) || |
5208 | test_bit(VP_DPC_NEEDED, &vha->dpc_flags) || | 5217 | test_bit(VP_DPC_NEEDED, &vha->dpc_flags) || |
5209 | test_bit(RELOGIN_NEEDED, &vha->dpc_flags) || | 5218 | test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) { |
5210 | test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags) || | ||
5211 | test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags))) { | ||
5212 | ql_dbg(ql_dbg_timer, vha, 0x600b, | 5219 | ql_dbg(ql_dbg_timer, vha, 0x600b, |
5213 | "isp_abort_needed=%d loop_resync_needed=%d " | 5220 | "isp_abort_needed=%d loop_resync_needed=%d " |
5214 | "fcport_update_needed=%d start_dpc=%d " | 5221 | "fcport_update_needed=%d start_dpc=%d " |
@@ -5221,15 +5228,12 @@ qla2x00_timer(scsi_qla_host_t *vha) | |||
5221 | ql_dbg(ql_dbg_timer, vha, 0x600c, | 5228 | ql_dbg(ql_dbg_timer, vha, 0x600c, |
5222 | "beacon_blink_needed=%d isp_unrecoverable=%d " | 5229 | "beacon_blink_needed=%d isp_unrecoverable=%d " |
5223 | "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d " | 5230 | "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d " |
5224 | "relogin_needed=%d, host_ramp_down_needed=%d " | 5231 | "relogin_needed=%d.\n", |
5225 | "host_ramp_up_needed=%d.\n", | ||
5226 | test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags), | 5232 | test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags), |
5227 | test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags), | 5233 | test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags), |
5228 | test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags), | 5234 | test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags), |
5229 | test_bit(VP_DPC_NEEDED, &vha->dpc_flags), | 5235 | test_bit(VP_DPC_NEEDED, &vha->dpc_flags), |
5230 | test_bit(RELOGIN_NEEDED, &vha->dpc_flags), | 5236 | test_bit(RELOGIN_NEEDED, &vha->dpc_flags)); |
5231 | test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags), | ||
5232 | test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags)); | ||
5233 | qla2xxx_wake_dpc(vha); | 5237 | qla2xxx_wake_dpc(vha); |
5234 | } | 5238 | } |
5235 | 5239 | ||
diff --git a/drivers/scsi/qla2xxx/qla_target.c b/drivers/scsi/qla2xxx/qla_target.c index 596480022b0a..2eb97d7e8d12 100644 --- a/drivers/scsi/qla2xxx/qla_target.c +++ b/drivers/scsi/qla2xxx/qla_target.c | |||
@@ -471,7 +471,7 @@ static void qlt_schedule_sess_for_deletion(struct qla_tgt_sess *sess, | |||
471 | schedule_delayed_work(&tgt->sess_del_work, 0); | 471 | schedule_delayed_work(&tgt->sess_del_work, 0); |
472 | else | 472 | else |
473 | schedule_delayed_work(&tgt->sess_del_work, | 473 | schedule_delayed_work(&tgt->sess_del_work, |
474 | jiffies - sess->expires); | 474 | sess->expires - jiffies); |
475 | } | 475 | } |
476 | 476 | ||
477 | /* ha->hardware_lock supposed to be held on entry */ | 477 | /* ha->hardware_lock supposed to be held on entry */ |
@@ -550,13 +550,14 @@ static void qlt_del_sess_work_fn(struct delayed_work *work) | |||
550 | struct scsi_qla_host *vha = tgt->vha; | 550 | struct scsi_qla_host *vha = tgt->vha; |
551 | struct qla_hw_data *ha = vha->hw; | 551 | struct qla_hw_data *ha = vha->hw; |
552 | struct qla_tgt_sess *sess; | 552 | struct qla_tgt_sess *sess; |
553 | unsigned long flags; | 553 | unsigned long flags, elapsed; |
554 | 554 | ||
555 | spin_lock_irqsave(&ha->hardware_lock, flags); | 555 | spin_lock_irqsave(&ha->hardware_lock, flags); |
556 | while (!list_empty(&tgt->del_sess_list)) { | 556 | while (!list_empty(&tgt->del_sess_list)) { |
557 | sess = list_entry(tgt->del_sess_list.next, typeof(*sess), | 557 | sess = list_entry(tgt->del_sess_list.next, typeof(*sess), |
558 | del_list_entry); | 558 | del_list_entry); |
559 | if (time_after_eq(jiffies, sess->expires)) { | 559 | elapsed = jiffies; |
560 | if (time_after_eq(elapsed, sess->expires)) { | ||
560 | qlt_undelete_sess(sess); | 561 | qlt_undelete_sess(sess); |
561 | 562 | ||
562 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf004, | 563 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf004, |
@@ -566,7 +567,7 @@ static void qlt_del_sess_work_fn(struct delayed_work *work) | |||
566 | ha->tgt.tgt_ops->put_sess(sess); | 567 | ha->tgt.tgt_ops->put_sess(sess); |
567 | } else { | 568 | } else { |
568 | schedule_delayed_work(&tgt->sess_del_work, | 569 | schedule_delayed_work(&tgt->sess_del_work, |
569 | jiffies - sess->expires); | 570 | sess->expires - elapsed); |
570 | break; | 571 | break; |
571 | } | 572 | } |
572 | } | 573 | } |
@@ -589,7 +590,7 @@ static struct qla_tgt_sess *qlt_create_sess( | |||
589 | 590 | ||
590 | /* Check to avoid double sessions */ | 591 | /* Check to avoid double sessions */ |
591 | spin_lock_irqsave(&ha->hardware_lock, flags); | 592 | spin_lock_irqsave(&ha->hardware_lock, flags); |
592 | list_for_each_entry(sess, &ha->tgt.qla_tgt->sess_list, | 593 | list_for_each_entry(sess, &vha->vha_tgt.qla_tgt->sess_list, |
593 | sess_list_entry) { | 594 | sess_list_entry) { |
594 | if (!memcmp(sess->port_name, fcport->port_name, WWN_SIZE)) { | 595 | if (!memcmp(sess->port_name, fcport->port_name, WWN_SIZE)) { |
595 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf005, | 596 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf005, |
@@ -626,7 +627,7 @@ static struct qla_tgt_sess *qlt_create_sess( | |||
626 | 627 | ||
627 | return NULL; | 628 | return NULL; |
628 | } | 629 | } |
629 | sess->tgt = ha->tgt.qla_tgt; | 630 | sess->tgt = vha->vha_tgt.qla_tgt; |
630 | sess->vha = vha; | 631 | sess->vha = vha; |
631 | sess->s_id = fcport->d_id; | 632 | sess->s_id = fcport->d_id; |
632 | sess->loop_id = fcport->loop_id; | 633 | sess->loop_id = fcport->loop_id; |
@@ -634,7 +635,7 @@ static struct qla_tgt_sess *qlt_create_sess( | |||
634 | 635 | ||
635 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf006, | 636 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf006, |
636 | "Adding sess %p to tgt %p via ->check_initiator_node_acl()\n", | 637 | "Adding sess %p to tgt %p via ->check_initiator_node_acl()\n", |
637 | sess, ha->tgt.qla_tgt); | 638 | sess, vha->vha_tgt.qla_tgt); |
638 | 639 | ||
639 | be_sid[0] = sess->s_id.b.domain; | 640 | be_sid[0] = sess->s_id.b.domain; |
640 | be_sid[1] = sess->s_id.b.area; | 641 | be_sid[1] = sess->s_id.b.area; |
@@ -661,8 +662,8 @@ static struct qla_tgt_sess *qlt_create_sess( | |||
661 | memcpy(sess->port_name, fcport->port_name, sizeof(sess->port_name)); | 662 | memcpy(sess->port_name, fcport->port_name, sizeof(sess->port_name)); |
662 | 663 | ||
663 | spin_lock_irqsave(&ha->hardware_lock, flags); | 664 | spin_lock_irqsave(&ha->hardware_lock, flags); |
664 | list_add_tail(&sess->sess_list_entry, &ha->tgt.qla_tgt->sess_list); | 665 | list_add_tail(&sess->sess_list_entry, &vha->vha_tgt.qla_tgt->sess_list); |
665 | ha->tgt.qla_tgt->sess_count++; | 666 | vha->vha_tgt.qla_tgt->sess_count++; |
666 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 667 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
667 | 668 | ||
668 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04b, | 669 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04b, |
@@ -681,7 +682,7 @@ static struct qla_tgt_sess *qlt_create_sess( | |||
681 | void qlt_fc_port_added(struct scsi_qla_host *vha, fc_port_t *fcport) | 682 | void qlt_fc_port_added(struct scsi_qla_host *vha, fc_port_t *fcport) |
682 | { | 683 | { |
683 | struct qla_hw_data *ha = vha->hw; | 684 | struct qla_hw_data *ha = vha->hw; |
684 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 685 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
685 | struct qla_tgt_sess *sess; | 686 | struct qla_tgt_sess *sess; |
686 | unsigned long flags; | 687 | unsigned long flags; |
687 | 688 | ||
@@ -691,6 +692,9 @@ void qlt_fc_port_added(struct scsi_qla_host *vha, fc_port_t *fcport) | |||
691 | if (!tgt || (fcport->port_type != FCT_INITIATOR)) | 692 | if (!tgt || (fcport->port_type != FCT_INITIATOR)) |
692 | return; | 693 | return; |
693 | 694 | ||
695 | if (qla_ini_mode_enabled(vha)) | ||
696 | return; | ||
697 | |||
694 | spin_lock_irqsave(&ha->hardware_lock, flags); | 698 | spin_lock_irqsave(&ha->hardware_lock, flags); |
695 | if (tgt->tgt_stop) { | 699 | if (tgt->tgt_stop) { |
696 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 700 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
@@ -700,9 +704,9 @@ void qlt_fc_port_added(struct scsi_qla_host *vha, fc_port_t *fcport) | |||
700 | if (!sess) { | 704 | if (!sess) { |
701 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 705 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
702 | 706 | ||
703 | mutex_lock(&ha->tgt.tgt_mutex); | 707 | mutex_lock(&vha->vha_tgt.tgt_mutex); |
704 | sess = qlt_create_sess(vha, fcport, false); | 708 | sess = qlt_create_sess(vha, fcport, false); |
705 | mutex_unlock(&ha->tgt.tgt_mutex); | 709 | mutex_unlock(&vha->vha_tgt.tgt_mutex); |
706 | 710 | ||
707 | spin_lock_irqsave(&ha->hardware_lock, flags); | 711 | spin_lock_irqsave(&ha->hardware_lock, flags); |
708 | } else { | 712 | } else { |
@@ -738,7 +742,7 @@ void qlt_fc_port_added(struct scsi_qla_host *vha, fc_port_t *fcport) | |||
738 | void qlt_fc_port_deleted(struct scsi_qla_host *vha, fc_port_t *fcport) | 742 | void qlt_fc_port_deleted(struct scsi_qla_host *vha, fc_port_t *fcport) |
739 | { | 743 | { |
740 | struct qla_hw_data *ha = vha->hw; | 744 | struct qla_hw_data *ha = vha->hw; |
741 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 745 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
742 | struct qla_tgt_sess *sess; | 746 | struct qla_tgt_sess *sess; |
743 | unsigned long flags; | 747 | unsigned long flags; |
744 | 748 | ||
@@ -805,12 +809,12 @@ void qlt_stop_phase1(struct qla_tgt *tgt) | |||
805 | * Mutex needed to sync with qla_tgt_fc_port_[added,deleted]. | 809 | * Mutex needed to sync with qla_tgt_fc_port_[added,deleted]. |
806 | * Lock is needed, because we still can get an incoming packet. | 810 | * Lock is needed, because we still can get an incoming packet. |
807 | */ | 811 | */ |
808 | mutex_lock(&ha->tgt.tgt_mutex); | 812 | mutex_lock(&vha->vha_tgt.tgt_mutex); |
809 | spin_lock_irqsave(&ha->hardware_lock, flags); | 813 | spin_lock_irqsave(&ha->hardware_lock, flags); |
810 | tgt->tgt_stop = 1; | 814 | tgt->tgt_stop = 1; |
811 | qlt_clear_tgt_db(tgt, true); | 815 | qlt_clear_tgt_db(tgt, true); |
812 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 816 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
813 | mutex_unlock(&ha->tgt.tgt_mutex); | 817 | mutex_unlock(&vha->vha_tgt.tgt_mutex); |
814 | 818 | ||
815 | flush_delayed_work(&tgt->sess_del_work); | 819 | flush_delayed_work(&tgt->sess_del_work); |
816 | 820 | ||
@@ -844,20 +848,21 @@ EXPORT_SYMBOL(qlt_stop_phase1); | |||
844 | void qlt_stop_phase2(struct qla_tgt *tgt) | 848 | void qlt_stop_phase2(struct qla_tgt *tgt) |
845 | { | 849 | { |
846 | struct qla_hw_data *ha = tgt->ha; | 850 | struct qla_hw_data *ha = tgt->ha; |
851 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); | ||
847 | unsigned long flags; | 852 | unsigned long flags; |
848 | 853 | ||
849 | if (tgt->tgt_stopped) { | 854 | if (tgt->tgt_stopped) { |
850 | ql_dbg(ql_dbg_tgt_mgt, tgt->vha, 0xf04f, | 855 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04f, |
851 | "Already in tgt->tgt_stopped state\n"); | 856 | "Already in tgt->tgt_stopped state\n"); |
852 | dump_stack(); | 857 | dump_stack(); |
853 | return; | 858 | return; |
854 | } | 859 | } |
855 | 860 | ||
856 | ql_dbg(ql_dbg_tgt_mgt, tgt->vha, 0xf00b, | 861 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf00b, |
857 | "Waiting for %d IRQ commands to complete (tgt %p)", | 862 | "Waiting for %d IRQ commands to complete (tgt %p)", |
858 | tgt->irq_cmd_count, tgt); | 863 | tgt->irq_cmd_count, tgt); |
859 | 864 | ||
860 | mutex_lock(&ha->tgt.tgt_mutex); | 865 | mutex_lock(&vha->vha_tgt.tgt_mutex); |
861 | spin_lock_irqsave(&ha->hardware_lock, flags); | 866 | spin_lock_irqsave(&ha->hardware_lock, flags); |
862 | while (tgt->irq_cmd_count != 0) { | 867 | while (tgt->irq_cmd_count != 0) { |
863 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 868 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
@@ -867,9 +872,9 @@ void qlt_stop_phase2(struct qla_tgt *tgt) | |||
867 | tgt->tgt_stop = 0; | 872 | tgt->tgt_stop = 0; |
868 | tgt->tgt_stopped = 1; | 873 | tgt->tgt_stopped = 1; |
869 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 874 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
870 | mutex_unlock(&ha->tgt.tgt_mutex); | 875 | mutex_unlock(&vha->vha_tgt.tgt_mutex); |
871 | 876 | ||
872 | ql_dbg(ql_dbg_tgt_mgt, tgt->vha, 0xf00c, "Stop of tgt %p finished", | 877 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf00c, "Stop of tgt %p finished", |
873 | tgt); | 878 | tgt); |
874 | } | 879 | } |
875 | EXPORT_SYMBOL(qlt_stop_phase2); | 880 | EXPORT_SYMBOL(qlt_stop_phase2); |
@@ -877,14 +882,14 @@ EXPORT_SYMBOL(qlt_stop_phase2); | |||
877 | /* Called from qlt_remove_target() -> qla2x00_remove_one() */ | 882 | /* Called from qlt_remove_target() -> qla2x00_remove_one() */ |
878 | static void qlt_release(struct qla_tgt *tgt) | 883 | static void qlt_release(struct qla_tgt *tgt) |
879 | { | 884 | { |
880 | struct qla_hw_data *ha = tgt->ha; | 885 | scsi_qla_host_t *vha = tgt->vha; |
881 | 886 | ||
882 | if ((ha->tgt.qla_tgt != NULL) && !tgt->tgt_stopped) | 887 | if ((vha->vha_tgt.qla_tgt != NULL) && !tgt->tgt_stopped) |
883 | qlt_stop_phase2(tgt); | 888 | qlt_stop_phase2(tgt); |
884 | 889 | ||
885 | ha->tgt.qla_tgt = NULL; | 890 | vha->vha_tgt.qla_tgt = NULL; |
886 | 891 | ||
887 | ql_dbg(ql_dbg_tgt_mgt, tgt->vha, 0xf00d, | 892 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf00d, |
888 | "Release of tgt %p finished\n", tgt); | 893 | "Release of tgt %p finished\n", tgt); |
889 | 894 | ||
890 | kfree(tgt); | 895 | kfree(tgt); |
@@ -948,8 +953,8 @@ static void qlt_send_notify_ack(struct scsi_qla_host *vha, | |||
948 | return; | 953 | return; |
949 | } | 954 | } |
950 | 955 | ||
951 | if (ha->tgt.qla_tgt != NULL) | 956 | if (vha->vha_tgt.qla_tgt != NULL) |
952 | ha->tgt.qla_tgt->notify_ack_expected++; | 957 | vha->vha_tgt.qla_tgt->notify_ack_expected++; |
953 | 958 | ||
954 | pkt->entry_type = NOTIFY_ACK_TYPE; | 959 | pkt->entry_type = NOTIFY_ACK_TYPE; |
955 | pkt->entry_count = 1; | 960 | pkt->entry_count = 1; |
@@ -1053,7 +1058,7 @@ static void qlt_24xx_send_abts_resp(struct scsi_qla_host *vha, | |||
1053 | /* Other bytes are zero */ | 1058 | /* Other bytes are zero */ |
1054 | } | 1059 | } |
1055 | 1060 | ||
1056 | ha->tgt.qla_tgt->abts_resp_expected++; | 1061 | vha->vha_tgt.qla_tgt->abts_resp_expected++; |
1057 | 1062 | ||
1058 | qla2x00_start_iocbs(vha, vha->req); | 1063 | qla2x00_start_iocbs(vha, vha->req); |
1059 | } | 1064 | } |
@@ -1205,7 +1210,7 @@ static void qlt_24xx_handle_abts(struct scsi_qla_host *vha, | |||
1205 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf012, | 1210 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf012, |
1206 | "qla_target(%d): task abort for non-existant session\n", | 1211 | "qla_target(%d): task abort for non-existant session\n", |
1207 | vha->vp_idx); | 1212 | vha->vp_idx); |
1208 | rc = qlt_sched_sess_work(ha->tgt.qla_tgt, | 1213 | rc = qlt_sched_sess_work(vha->vha_tgt.qla_tgt, |
1209 | QLA_TGT_SESS_WORK_ABORT, abts, sizeof(*abts)); | 1214 | QLA_TGT_SESS_WORK_ABORT, abts, sizeof(*abts)); |
1210 | if (rc != 0) { | 1215 | if (rc != 0) { |
1211 | qlt_24xx_send_abts_resp(vha, abts, FCP_TMF_REJECTED, | 1216 | qlt_24xx_send_abts_resp(vha, abts, FCP_TMF_REJECTED, |
@@ -2156,8 +2161,7 @@ static int qlt_prepare_srr_ctio(struct scsi_qla_host *vha, | |||
2156 | struct qla_tgt_cmd *cmd, void *ctio) | 2161 | struct qla_tgt_cmd *cmd, void *ctio) |
2157 | { | 2162 | { |
2158 | struct qla_tgt_srr_ctio *sc; | 2163 | struct qla_tgt_srr_ctio *sc; |
2159 | struct qla_hw_data *ha = vha->hw; | 2164 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
2160 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | ||
2161 | struct qla_tgt_srr_imm *imm; | 2165 | struct qla_tgt_srr_imm *imm; |
2162 | 2166 | ||
2163 | tgt->ctio_srr_id++; | 2167 | tgt->ctio_srr_id++; |
@@ -2473,7 +2477,7 @@ static void qlt_do_work(struct work_struct *work) | |||
2473 | struct qla_tgt_cmd *cmd = container_of(work, struct qla_tgt_cmd, work); | 2477 | struct qla_tgt_cmd *cmd = container_of(work, struct qla_tgt_cmd, work); |
2474 | scsi_qla_host_t *vha = cmd->vha; | 2478 | scsi_qla_host_t *vha = cmd->vha; |
2475 | struct qla_hw_data *ha = vha->hw; | 2479 | struct qla_hw_data *ha = vha->hw; |
2476 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 2480 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
2477 | struct qla_tgt_sess *sess = NULL; | 2481 | struct qla_tgt_sess *sess = NULL; |
2478 | struct atio_from_isp *atio = &cmd->atio; | 2482 | struct atio_from_isp *atio = &cmd->atio; |
2479 | unsigned char *cdb; | 2483 | unsigned char *cdb; |
@@ -2506,10 +2510,10 @@ static void qlt_do_work(struct work_struct *work) | |||
2506 | goto out_term; | 2510 | goto out_term; |
2507 | } | 2511 | } |
2508 | 2512 | ||
2509 | mutex_lock(&ha->tgt.tgt_mutex); | 2513 | mutex_lock(&vha->vha_tgt.tgt_mutex); |
2510 | sess = qlt_make_local_sess(vha, s_id); | 2514 | sess = qlt_make_local_sess(vha, s_id); |
2511 | /* sess has an extra creation ref. */ | 2515 | /* sess has an extra creation ref. */ |
2512 | mutex_unlock(&ha->tgt.tgt_mutex); | 2516 | mutex_unlock(&vha->vha_tgt.tgt_mutex); |
2513 | 2517 | ||
2514 | if (!sess) | 2518 | if (!sess) |
2515 | goto out_term; | 2519 | goto out_term; |
@@ -2575,8 +2579,7 @@ out_term: | |||
2575 | static int qlt_handle_cmd_for_atio(struct scsi_qla_host *vha, | 2579 | static int qlt_handle_cmd_for_atio(struct scsi_qla_host *vha, |
2576 | struct atio_from_isp *atio) | 2580 | struct atio_from_isp *atio) |
2577 | { | 2581 | { |
2578 | struct qla_hw_data *ha = vha->hw; | 2582 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
2579 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | ||
2580 | struct qla_tgt_cmd *cmd; | 2583 | struct qla_tgt_cmd *cmd; |
2581 | 2584 | ||
2582 | if (unlikely(tgt->tgt_stop)) { | 2585 | if (unlikely(tgt->tgt_stop)) { |
@@ -2592,11 +2595,9 @@ static int qlt_handle_cmd_for_atio(struct scsi_qla_host *vha, | |||
2592 | return -ENOMEM; | 2595 | return -ENOMEM; |
2593 | } | 2596 | } |
2594 | 2597 | ||
2595 | INIT_LIST_HEAD(&cmd->cmd_list); | ||
2596 | |||
2597 | memcpy(&cmd->atio, atio, sizeof(*atio)); | 2598 | memcpy(&cmd->atio, atio, sizeof(*atio)); |
2598 | cmd->state = QLA_TGT_STATE_NEW; | 2599 | cmd->state = QLA_TGT_STATE_NEW; |
2599 | cmd->tgt = ha->tgt.qla_tgt; | 2600 | cmd->tgt = vha->vha_tgt.qla_tgt; |
2600 | cmd->vha = vha; | 2601 | cmd->vha = vha; |
2601 | 2602 | ||
2602 | INIT_WORK(&cmd->work, qlt_do_work); | 2603 | INIT_WORK(&cmd->work, qlt_do_work); |
@@ -2722,7 +2723,7 @@ static int qlt_handle_task_mgmt(struct scsi_qla_host *vha, void *iocb) | |||
2722 | uint32_t lun, unpacked_lun; | 2723 | uint32_t lun, unpacked_lun; |
2723 | int lun_size, fn; | 2724 | int lun_size, fn; |
2724 | 2725 | ||
2725 | tgt = ha->tgt.qla_tgt; | 2726 | tgt = vha->vha_tgt.qla_tgt; |
2726 | 2727 | ||
2727 | lun = a->u.isp24.fcp_cmnd.lun; | 2728 | lun = a->u.isp24.fcp_cmnd.lun; |
2728 | lun_size = sizeof(a->u.isp24.fcp_cmnd.lun); | 2729 | lun_size = sizeof(a->u.isp24.fcp_cmnd.lun); |
@@ -2796,7 +2797,7 @@ static int qlt_abort_task(struct scsi_qla_host *vha, | |||
2796 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf025, | 2797 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf025, |
2797 | "qla_target(%d): task abort for unexisting " | 2798 | "qla_target(%d): task abort for unexisting " |
2798 | "session\n", vha->vp_idx); | 2799 | "session\n", vha->vp_idx); |
2799 | return qlt_sched_sess_work(ha->tgt.qla_tgt, | 2800 | return qlt_sched_sess_work(vha->vha_tgt.qla_tgt, |
2800 | QLA_TGT_SESS_WORK_ABORT, iocb, sizeof(*iocb)); | 2801 | QLA_TGT_SESS_WORK_ABORT, iocb, sizeof(*iocb)); |
2801 | } | 2802 | } |
2802 | 2803 | ||
@@ -2809,7 +2810,6 @@ static int qlt_abort_task(struct scsi_qla_host *vha, | |||
2809 | static int qlt_24xx_handle_els(struct scsi_qla_host *vha, | 2810 | static int qlt_24xx_handle_els(struct scsi_qla_host *vha, |
2810 | struct imm_ntfy_from_isp *iocb) | 2811 | struct imm_ntfy_from_isp *iocb) |
2811 | { | 2812 | { |
2812 | struct qla_hw_data *ha = vha->hw; | ||
2813 | int res = 0; | 2813 | int res = 0; |
2814 | 2814 | ||
2815 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf026, | 2815 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf026, |
@@ -2827,7 +2827,7 @@ static int qlt_24xx_handle_els(struct scsi_qla_host *vha, | |||
2827 | case ELS_PDISC: | 2827 | case ELS_PDISC: |
2828 | case ELS_ADISC: | 2828 | case ELS_ADISC: |
2829 | { | 2829 | { |
2830 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 2830 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
2831 | if (tgt->link_reinit_iocb_pending) { | 2831 | if (tgt->link_reinit_iocb_pending) { |
2832 | qlt_send_notify_ack(vha, &tgt->link_reinit_iocb, | 2832 | qlt_send_notify_ack(vha, &tgt->link_reinit_iocb, |
2833 | 0, 0, 0, 0, 0, 0); | 2833 | 0, 0, 0, 0, 0, 0); |
@@ -3201,8 +3201,7 @@ static void qlt_prepare_srr_imm(struct scsi_qla_host *vha, | |||
3201 | struct imm_ntfy_from_isp *iocb) | 3201 | struct imm_ntfy_from_isp *iocb) |
3202 | { | 3202 | { |
3203 | struct qla_tgt_srr_imm *imm; | 3203 | struct qla_tgt_srr_imm *imm; |
3204 | struct qla_hw_data *ha = vha->hw; | 3204 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
3205 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | ||
3206 | struct qla_tgt_srr_ctio *sctio; | 3205 | struct qla_tgt_srr_ctio *sctio; |
3207 | 3206 | ||
3208 | tgt->imm_srr_id++; | 3207 | tgt->imm_srr_id++; |
@@ -3312,7 +3311,7 @@ static void qlt_handle_imm_notify(struct scsi_qla_host *vha, | |||
3312 | 3311 | ||
3313 | case IMM_NTFY_LIP_LINK_REINIT: | 3312 | case IMM_NTFY_LIP_LINK_REINIT: |
3314 | { | 3313 | { |
3315 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 3314 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
3316 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf033, | 3315 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf033, |
3317 | "qla_target(%d): LINK REINIT (loop %#x, " | 3316 | "qla_target(%d): LINK REINIT (loop %#x, " |
3318 | "subcode %x)\n", vha->vp_idx, | 3317 | "subcode %x)\n", vha->vp_idx, |
@@ -3488,7 +3487,7 @@ static void qlt_24xx_atio_pkt(struct scsi_qla_host *vha, | |||
3488 | struct atio_from_isp *atio) | 3487 | struct atio_from_isp *atio) |
3489 | { | 3488 | { |
3490 | struct qla_hw_data *ha = vha->hw; | 3489 | struct qla_hw_data *ha = vha->hw; |
3491 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 3490 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
3492 | int rc; | 3491 | int rc; |
3493 | 3492 | ||
3494 | if (unlikely(tgt == NULL)) { | 3493 | if (unlikely(tgt == NULL)) { |
@@ -3590,7 +3589,7 @@ static void qlt_24xx_atio_pkt(struct scsi_qla_host *vha, | |||
3590 | static void qlt_response_pkt(struct scsi_qla_host *vha, response_t *pkt) | 3589 | static void qlt_response_pkt(struct scsi_qla_host *vha, response_t *pkt) |
3591 | { | 3590 | { |
3592 | struct qla_hw_data *ha = vha->hw; | 3591 | struct qla_hw_data *ha = vha->hw; |
3593 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 3592 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
3594 | 3593 | ||
3595 | if (unlikely(tgt == NULL)) { | 3594 | if (unlikely(tgt == NULL)) { |
3596 | ql_dbg(ql_dbg_tgt, vha, 0xe05d, | 3595 | ql_dbg(ql_dbg_tgt, vha, 0xe05d, |
@@ -3793,7 +3792,7 @@ void qlt_async_event(uint16_t code, struct scsi_qla_host *vha, | |||
3793 | uint16_t *mailbox) | 3792 | uint16_t *mailbox) |
3794 | { | 3793 | { |
3795 | struct qla_hw_data *ha = vha->hw; | 3794 | struct qla_hw_data *ha = vha->hw; |
3796 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 3795 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
3797 | int login_code; | 3796 | int login_code; |
3798 | 3797 | ||
3799 | ql_dbg(ql_dbg_tgt, vha, 0xe039, | 3798 | ql_dbg(ql_dbg_tgt, vha, 0xe039, |
@@ -3923,14 +3922,14 @@ static fc_port_t *qlt_get_port_database(struct scsi_qla_host *vha, | |||
3923 | static struct qla_tgt_sess *qlt_make_local_sess(struct scsi_qla_host *vha, | 3922 | static struct qla_tgt_sess *qlt_make_local_sess(struct scsi_qla_host *vha, |
3924 | uint8_t *s_id) | 3923 | uint8_t *s_id) |
3925 | { | 3924 | { |
3926 | struct qla_hw_data *ha = vha->hw; | ||
3927 | struct qla_tgt_sess *sess = NULL; | 3925 | struct qla_tgt_sess *sess = NULL; |
3928 | fc_port_t *fcport = NULL; | 3926 | fc_port_t *fcport = NULL; |
3929 | int rc, global_resets; | 3927 | int rc, global_resets; |
3930 | uint16_t loop_id = 0; | 3928 | uint16_t loop_id = 0; |
3931 | 3929 | ||
3932 | retry: | 3930 | retry: |
3933 | global_resets = atomic_read(&ha->tgt.qla_tgt->tgt_global_resets_count); | 3931 | global_resets = |
3932 | atomic_read(&vha->vha_tgt.qla_tgt->tgt_global_resets_count); | ||
3934 | 3933 | ||
3935 | rc = qla24xx_get_loop_id(vha, s_id, &loop_id); | 3934 | rc = qla24xx_get_loop_id(vha, s_id, &loop_id); |
3936 | if (rc != 0) { | 3935 | if (rc != 0) { |
@@ -3957,12 +3956,13 @@ retry: | |||
3957 | return NULL; | 3956 | return NULL; |
3958 | 3957 | ||
3959 | if (global_resets != | 3958 | if (global_resets != |
3960 | atomic_read(&ha->tgt.qla_tgt->tgt_global_resets_count)) { | 3959 | atomic_read(&vha->vha_tgt.qla_tgt->tgt_global_resets_count)) { |
3961 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf043, | 3960 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf043, |
3962 | "qla_target(%d): global reset during session discovery " | 3961 | "qla_target(%d): global reset during session discovery " |
3963 | "(counter was %d, new %d), retrying", vha->vp_idx, | 3962 | "(counter was %d, new %d), retrying", vha->vp_idx, |
3964 | global_resets, | 3963 | global_resets, |
3965 | atomic_read(&ha->tgt.qla_tgt->tgt_global_resets_count)); | 3964 | atomic_read(&vha->vha_tgt. |
3965 | qla_tgt->tgt_global_resets_count)); | ||
3966 | goto retry; | 3966 | goto retry; |
3967 | } | 3967 | } |
3968 | 3968 | ||
@@ -3997,10 +3997,10 @@ static void qlt_abort_work(struct qla_tgt *tgt, | |||
3997 | if (!sess) { | 3997 | if (!sess) { |
3998 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 3998 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
3999 | 3999 | ||
4000 | mutex_lock(&ha->tgt.tgt_mutex); | 4000 | mutex_lock(&vha->vha_tgt.tgt_mutex); |
4001 | sess = qlt_make_local_sess(vha, s_id); | 4001 | sess = qlt_make_local_sess(vha, s_id); |
4002 | /* sess has got an extra creation ref */ | 4002 | /* sess has got an extra creation ref */ |
4003 | mutex_unlock(&ha->tgt.tgt_mutex); | 4003 | mutex_unlock(&vha->vha_tgt.tgt_mutex); |
4004 | 4004 | ||
4005 | spin_lock_irqsave(&ha->hardware_lock, flags); | 4005 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4006 | if (!sess) | 4006 | if (!sess) |
@@ -4051,10 +4051,10 @@ static void qlt_tmr_work(struct qla_tgt *tgt, | |||
4051 | if (!sess) { | 4051 | if (!sess) { |
4052 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 4052 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
4053 | 4053 | ||
4054 | mutex_lock(&ha->tgt.tgt_mutex); | 4054 | mutex_lock(&vha->vha_tgt.tgt_mutex); |
4055 | sess = qlt_make_local_sess(vha, s_id); | 4055 | sess = qlt_make_local_sess(vha, s_id); |
4056 | /* sess has got an extra creation ref */ | 4056 | /* sess has got an extra creation ref */ |
4057 | mutex_unlock(&ha->tgt.tgt_mutex); | 4057 | mutex_unlock(&vha->vha_tgt.tgt_mutex); |
4058 | 4058 | ||
4059 | spin_lock_irqsave(&ha->hardware_lock, flags); | 4059 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4060 | if (!sess) | 4060 | if (!sess) |
@@ -4140,9 +4140,9 @@ int qlt_add_target(struct qla_hw_data *ha, struct scsi_qla_host *base_vha) | |||
4140 | } | 4140 | } |
4141 | 4141 | ||
4142 | ql_dbg(ql_dbg_tgt, base_vha, 0xe03b, | 4142 | ql_dbg(ql_dbg_tgt, base_vha, 0xe03b, |
4143 | "Registering target for host %ld(%p)", base_vha->host_no, ha); | 4143 | "Registering target for host %ld(%p).\n", base_vha->host_no, ha); |
4144 | 4144 | ||
4145 | BUG_ON((ha->tgt.qla_tgt != NULL) || (ha->tgt.tgt_ops != NULL)); | 4145 | BUG_ON(base_vha->vha_tgt.qla_tgt != NULL); |
4146 | 4146 | ||
4147 | tgt = kzalloc(sizeof(struct qla_tgt), GFP_KERNEL); | 4147 | tgt = kzalloc(sizeof(struct qla_tgt), GFP_KERNEL); |
4148 | if (!tgt) { | 4148 | if (!tgt) { |
@@ -4170,7 +4170,7 @@ int qlt_add_target(struct qla_hw_data *ha, struct scsi_qla_host *base_vha) | |||
4170 | INIT_WORK(&tgt->srr_work, qlt_handle_srr_work); | 4170 | INIT_WORK(&tgt->srr_work, qlt_handle_srr_work); |
4171 | atomic_set(&tgt->tgt_global_resets_count, 0); | 4171 | atomic_set(&tgt->tgt_global_resets_count, 0); |
4172 | 4172 | ||
4173 | ha->tgt.qla_tgt = tgt; | 4173 | base_vha->vha_tgt.qla_tgt = tgt; |
4174 | 4174 | ||
4175 | ql_dbg(ql_dbg_tgt, base_vha, 0xe067, | 4175 | ql_dbg(ql_dbg_tgt, base_vha, 0xe067, |
4176 | "qla_target(%d): using 64 Bit PCI addressing", | 4176 | "qla_target(%d): using 64 Bit PCI addressing", |
@@ -4191,16 +4191,16 @@ int qlt_add_target(struct qla_hw_data *ha, struct scsi_qla_host *base_vha) | |||
4191 | /* Must be called under tgt_host_action_mutex */ | 4191 | /* Must be called under tgt_host_action_mutex */ |
4192 | int qlt_remove_target(struct qla_hw_data *ha, struct scsi_qla_host *vha) | 4192 | int qlt_remove_target(struct qla_hw_data *ha, struct scsi_qla_host *vha) |
4193 | { | 4193 | { |
4194 | if (!ha->tgt.qla_tgt) | 4194 | if (!vha->vha_tgt.qla_tgt) |
4195 | return 0; | 4195 | return 0; |
4196 | 4196 | ||
4197 | mutex_lock(&qla_tgt_mutex); | 4197 | mutex_lock(&qla_tgt_mutex); |
4198 | list_del(&ha->tgt.qla_tgt->tgt_list_entry); | 4198 | list_del(&vha->vha_tgt.qla_tgt->tgt_list_entry); |
4199 | mutex_unlock(&qla_tgt_mutex); | 4199 | mutex_unlock(&qla_tgt_mutex); |
4200 | 4200 | ||
4201 | ql_dbg(ql_dbg_tgt, vha, 0xe03c, "Unregistering target for host %ld(%p)", | 4201 | ql_dbg(ql_dbg_tgt, vha, 0xe03c, "Unregistering target for host %ld(%p)", |
4202 | vha->host_no, ha); | 4202 | vha->host_no, ha); |
4203 | qlt_release(ha->tgt.qla_tgt); | 4203 | qlt_release(vha->vha_tgt.qla_tgt); |
4204 | 4204 | ||
4205 | return 0; | 4205 | return 0; |
4206 | } | 4206 | } |
@@ -4234,8 +4234,9 @@ static void qlt_lport_dump(struct scsi_qla_host *vha, u64 wwpn, | |||
4234 | * @callback: lport initialization callback for tcm_qla2xxx code | 4234 | * @callback: lport initialization callback for tcm_qla2xxx code |
4235 | * @target_lport_ptr: pointer for tcm_qla2xxx specific lport data | 4235 | * @target_lport_ptr: pointer for tcm_qla2xxx specific lport data |
4236 | */ | 4236 | */ |
4237 | int qlt_lport_register(struct qla_tgt_func_tmpl *qla_tgt_ops, u64 wwpn, | 4237 | int qlt_lport_register(void *target_lport_ptr, u64 phys_wwpn, |
4238 | int (*callback)(struct scsi_qla_host *), void *target_lport_ptr) | 4238 | u64 npiv_wwpn, u64 npiv_wwnn, |
4239 | int (*callback)(struct scsi_qla_host *, void *, u64, u64)) | ||
4239 | { | 4240 | { |
4240 | struct qla_tgt *tgt; | 4241 | struct qla_tgt *tgt; |
4241 | struct scsi_qla_host *vha; | 4242 | struct scsi_qla_host *vha; |
@@ -4254,14 +4255,11 @@ int qlt_lport_register(struct qla_tgt_func_tmpl *qla_tgt_ops, u64 wwpn, | |||
4254 | if (!host) | 4255 | if (!host) |
4255 | continue; | 4256 | continue; |
4256 | 4257 | ||
4257 | if (ha->tgt.tgt_ops != NULL) | ||
4258 | continue; | ||
4259 | |||
4260 | if (!(host->hostt->supported_mode & MODE_TARGET)) | 4258 | if (!(host->hostt->supported_mode & MODE_TARGET)) |
4261 | continue; | 4259 | continue; |
4262 | 4260 | ||
4263 | spin_lock_irqsave(&ha->hardware_lock, flags); | 4261 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4264 | if (host->active_mode & MODE_TARGET) { | 4262 | if ((!npiv_wwpn || !npiv_wwnn) && host->active_mode & MODE_TARGET) { |
4265 | pr_debug("MODE_TARGET already active on qla2xxx(%d)\n", | 4263 | pr_debug("MODE_TARGET already active on qla2xxx(%d)\n", |
4266 | host->host_no); | 4264 | host->host_no); |
4267 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 4265 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
@@ -4275,23 +4273,18 @@ int qlt_lport_register(struct qla_tgt_func_tmpl *qla_tgt_ops, u64 wwpn, | |||
4275 | " qla2xxx scsi_host\n"); | 4273 | " qla2xxx scsi_host\n"); |
4276 | continue; | 4274 | continue; |
4277 | } | 4275 | } |
4278 | qlt_lport_dump(vha, wwpn, b); | 4276 | qlt_lport_dump(vha, phys_wwpn, b); |
4279 | 4277 | ||
4280 | if (memcmp(vha->port_name, b, WWN_SIZE)) { | 4278 | if (memcmp(vha->port_name, b, WWN_SIZE)) { |
4281 | scsi_host_put(host); | 4279 | scsi_host_put(host); |
4282 | continue; | 4280 | continue; |
4283 | } | 4281 | } |
4284 | /* | ||
4285 | * Setup passed parameters ahead of invoking callback | ||
4286 | */ | ||
4287 | ha->tgt.tgt_ops = qla_tgt_ops; | ||
4288 | ha->tgt.target_lport_ptr = target_lport_ptr; | ||
4289 | rc = (*callback)(vha); | ||
4290 | if (rc != 0) { | ||
4291 | ha->tgt.tgt_ops = NULL; | ||
4292 | ha->tgt.target_lport_ptr = NULL; | ||
4293 | } | ||
4294 | mutex_unlock(&qla_tgt_mutex); | 4282 | mutex_unlock(&qla_tgt_mutex); |
4283 | |||
4284 | rc = (*callback)(vha, target_lport_ptr, npiv_wwpn, npiv_wwnn); | ||
4285 | if (rc != 0) | ||
4286 | scsi_host_put(host); | ||
4287 | |||
4295 | return rc; | 4288 | return rc; |
4296 | } | 4289 | } |
4297 | mutex_unlock(&qla_tgt_mutex); | 4290 | mutex_unlock(&qla_tgt_mutex); |
@@ -4312,7 +4305,7 @@ void qlt_lport_deregister(struct scsi_qla_host *vha) | |||
4312 | /* | 4305 | /* |
4313 | * Clear the target_lport_ptr qla_target_template pointer in qla_hw_data | 4306 | * Clear the target_lport_ptr qla_target_template pointer in qla_hw_data |
4314 | */ | 4307 | */ |
4315 | ha->tgt.target_lport_ptr = NULL; | 4308 | vha->vha_tgt.target_lport_ptr = NULL; |
4316 | ha->tgt.tgt_ops = NULL; | 4309 | ha->tgt.tgt_ops = NULL; |
4317 | /* | 4310 | /* |
4318 | * Release the Scsi_Host reference for the underlying qla2xxx host | 4311 | * Release the Scsi_Host reference for the underlying qla2xxx host |
@@ -4374,8 +4367,9 @@ void | |||
4374 | qlt_enable_vha(struct scsi_qla_host *vha) | 4367 | qlt_enable_vha(struct scsi_qla_host *vha) |
4375 | { | 4368 | { |
4376 | struct qla_hw_data *ha = vha->hw; | 4369 | struct qla_hw_data *ha = vha->hw; |
4377 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 4370 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
4378 | unsigned long flags; | 4371 | unsigned long flags; |
4372 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | ||
4379 | 4373 | ||
4380 | if (!tgt) { | 4374 | if (!tgt) { |
4381 | ql_dbg(ql_dbg_tgt, vha, 0xe069, | 4375 | ql_dbg(ql_dbg_tgt, vha, 0xe069, |
@@ -4390,9 +4384,14 @@ qlt_enable_vha(struct scsi_qla_host *vha) | |||
4390 | qlt_set_mode(vha); | 4384 | qlt_set_mode(vha); |
4391 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 4385 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
4392 | 4386 | ||
4393 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | 4387 | if (vha->vp_idx) { |
4394 | qla2xxx_wake_dpc(vha); | 4388 | qla24xx_disable_vp(vha); |
4395 | qla2x00_wait_for_hba_online(vha); | 4389 | qla24xx_enable_vp(vha); |
4390 | } else { | ||
4391 | set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); | ||
4392 | qla2xxx_wake_dpc(base_vha); | ||
4393 | qla2x00_wait_for_hba_online(base_vha); | ||
4394 | } | ||
4396 | } | 4395 | } |
4397 | EXPORT_SYMBOL(qlt_enable_vha); | 4396 | EXPORT_SYMBOL(qlt_enable_vha); |
4398 | 4397 | ||
@@ -4405,7 +4404,7 @@ void | |||
4405 | qlt_disable_vha(struct scsi_qla_host *vha) | 4404 | qlt_disable_vha(struct scsi_qla_host *vha) |
4406 | { | 4405 | { |
4407 | struct qla_hw_data *ha = vha->hw; | 4406 | struct qla_hw_data *ha = vha->hw; |
4408 | struct qla_tgt *tgt = ha->tgt.qla_tgt; | 4407 | struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; |
4409 | unsigned long flags; | 4408 | unsigned long flags; |
4410 | 4409 | ||
4411 | if (!tgt) { | 4410 | if (!tgt) { |
@@ -4436,8 +4435,10 @@ qlt_vport_create(struct scsi_qla_host *vha, struct qla_hw_data *ha) | |||
4436 | if (!qla_tgt_mode_enabled(vha)) | 4435 | if (!qla_tgt_mode_enabled(vha)) |
4437 | return; | 4436 | return; |
4438 | 4437 | ||
4439 | mutex_init(&ha->tgt.tgt_mutex); | 4438 | vha->vha_tgt.qla_tgt = NULL; |
4440 | mutex_init(&ha->tgt.tgt_host_action_mutex); | 4439 | |
4440 | mutex_init(&vha->vha_tgt.tgt_mutex); | ||
4441 | mutex_init(&vha->vha_tgt.tgt_host_action_mutex); | ||
4441 | 4442 | ||
4442 | qlt_clear_mode(vha); | 4443 | qlt_clear_mode(vha); |
4443 | 4444 | ||
@@ -4448,6 +4449,8 @@ qlt_vport_create(struct scsi_qla_host *vha, struct qla_hw_data *ha) | |||
4448 | * assigning the value appropriately. | 4449 | * assigning the value appropriately. |
4449 | */ | 4450 | */ |
4450 | ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; | 4451 | ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; |
4452 | |||
4453 | qlt_add_target(ha, vha); | ||
4451 | } | 4454 | } |
4452 | 4455 | ||
4453 | void | 4456 | void |
@@ -4766,8 +4769,8 @@ qlt_probe_one_stage1(struct scsi_qla_host *base_vha, struct qla_hw_data *ha) | |||
4766 | ISP_ATIO_Q_OUT(base_vha) = &ha->iobase->isp24.atio_q_out; | 4769 | ISP_ATIO_Q_OUT(base_vha) = &ha->iobase->isp24.atio_q_out; |
4767 | } | 4770 | } |
4768 | 4771 | ||
4769 | mutex_init(&ha->tgt.tgt_mutex); | 4772 | mutex_init(&base_vha->vha_tgt.tgt_mutex); |
4770 | mutex_init(&ha->tgt.tgt_host_action_mutex); | 4773 | mutex_init(&base_vha->vha_tgt.tgt_host_action_mutex); |
4771 | qlt_clear_mode(base_vha); | 4774 | qlt_clear_mode(base_vha); |
4772 | } | 4775 | } |
4773 | 4776 | ||
diff --git a/drivers/scsi/qla2xxx/qla_target.h b/drivers/scsi/qla2xxx/qla_target.h index b33e411f28a0..66e755cdde57 100644 --- a/drivers/scsi/qla2xxx/qla_target.h +++ b/drivers/scsi/qla2xxx/qla_target.h | |||
@@ -855,7 +855,6 @@ struct qla_tgt_cmd { | |||
855 | uint16_t loop_id; /* to save extra sess dereferences */ | 855 | uint16_t loop_id; /* to save extra sess dereferences */ |
856 | struct qla_tgt *tgt; /* to save extra sess dereferences */ | 856 | struct qla_tgt *tgt; /* to save extra sess dereferences */ |
857 | struct scsi_qla_host *vha; | 857 | struct scsi_qla_host *vha; |
858 | struct list_head cmd_list; | ||
859 | 858 | ||
860 | struct atio_from_isp atio; | 859 | struct atio_from_isp atio; |
861 | }; | 860 | }; |
@@ -932,8 +931,8 @@ void qlt_disable_vha(struct scsi_qla_host *); | |||
932 | */ | 931 | */ |
933 | extern int qlt_add_target(struct qla_hw_data *, struct scsi_qla_host *); | 932 | extern int qlt_add_target(struct qla_hw_data *, struct scsi_qla_host *); |
934 | extern int qlt_remove_target(struct qla_hw_data *, struct scsi_qla_host *); | 933 | extern int qlt_remove_target(struct qla_hw_data *, struct scsi_qla_host *); |
935 | extern int qlt_lport_register(struct qla_tgt_func_tmpl *, u64, | 934 | extern int qlt_lport_register(void *, u64, u64, u64, |
936 | int (*callback)(struct scsi_qla_host *), void *); | 935 | int (*callback)(struct scsi_qla_host *, void *, u64, u64)); |
937 | extern void qlt_lport_deregister(struct scsi_qla_host *); | 936 | extern void qlt_lport_deregister(struct scsi_qla_host *); |
938 | extern void qlt_unreg_sess(struct qla_tgt_sess *); | 937 | extern void qlt_unreg_sess(struct qla_tgt_sess *); |
939 | extern void qlt_fc_port_added(struct scsi_qla_host *, fc_port_t *); | 938 | extern void qlt_fc_port_added(struct scsi_qla_host *, fc_port_t *); |
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h index a808e293dae0..31d19535b015 100644 --- a/drivers/scsi/qla2xxx/qla_version.h +++ b/drivers/scsi/qla2xxx/qla_version.h | |||
@@ -7,7 +7,7 @@ | |||
7 | /* | 7 | /* |
8 | * Driver version | 8 | * Driver version |
9 | */ | 9 | */ |
10 | #define QLA2XXX_VERSION "8.06.00.08-k" | 10 | #define QLA2XXX_VERSION "8.06.00.12-k" |
11 | 11 | ||
12 | #define QLA_DRIVER_MAJOR_VER 8 | 12 | #define QLA_DRIVER_MAJOR_VER 8 |
13 | #define QLA_DRIVER_MINOR_VER 6 | 13 | #define QLA_DRIVER_MINOR_VER 6 |
diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.c b/drivers/scsi/qla2xxx/tcm_qla2xxx.c index 7eb19be35d46..75a141bbe74d 100644 --- a/drivers/scsi/qla2xxx/tcm_qla2xxx.c +++ b/drivers/scsi/qla2xxx/tcm_qla2xxx.c | |||
@@ -53,16 +53,6 @@ | |||
53 | struct workqueue_struct *tcm_qla2xxx_free_wq; | 53 | struct workqueue_struct *tcm_qla2xxx_free_wq; |
54 | struct workqueue_struct *tcm_qla2xxx_cmd_wq; | 54 | struct workqueue_struct *tcm_qla2xxx_cmd_wq; |
55 | 55 | ||
56 | static int tcm_qla2xxx_check_true(struct se_portal_group *se_tpg) | ||
57 | { | ||
58 | return 1; | ||
59 | } | ||
60 | |||
61 | static int tcm_qla2xxx_check_false(struct se_portal_group *se_tpg) | ||
62 | { | ||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | /* | 56 | /* |
67 | * Parse WWN. | 57 | * Parse WWN. |
68 | * If strict, we require lower-case hex and colon separators to be sure | 58 | * If strict, we require lower-case hex and colon separators to be sure |
@@ -174,7 +164,7 @@ static int tcm_qla2xxx_npiv_parse_wwn( | |||
174 | *wwnn = 0; | 164 | *wwnn = 0; |
175 | 165 | ||
176 | /* count may include a LF at end of string */ | 166 | /* count may include a LF at end of string */ |
177 | if (name[cnt-1] == '\n') | 167 | if (name[cnt-1] == '\n' || name[cnt-1] == 0) |
178 | cnt--; | 168 | cnt--; |
179 | 169 | ||
180 | /* validate we have enough characters for WWPN */ | 170 | /* validate we have enough characters for WWPN */ |
@@ -777,6 +767,9 @@ static void tcm_qla2xxx_put_session(struct se_session *se_sess) | |||
777 | 767 | ||
778 | static void tcm_qla2xxx_put_sess(struct qla_tgt_sess *sess) | 768 | static void tcm_qla2xxx_put_sess(struct qla_tgt_sess *sess) |
779 | { | 769 | { |
770 | if (!sess) | ||
771 | return; | ||
772 | |||
780 | assert_spin_locked(&sess->vha->hw->hardware_lock); | 773 | assert_spin_locked(&sess->vha->hw->hardware_lock); |
781 | kref_put(&sess->se_sess->sess_kref, tcm_qla2xxx_release_session); | 774 | kref_put(&sess->se_sess->sess_kref, tcm_qla2xxx_release_session); |
782 | } | 775 | } |
@@ -957,7 +950,6 @@ static ssize_t tcm_qla2xxx_tpg_store_enable( | |||
957 | struct tcm_qla2xxx_lport *lport = container_of(se_wwn, | 950 | struct tcm_qla2xxx_lport *lport = container_of(se_wwn, |
958 | struct tcm_qla2xxx_lport, lport_wwn); | 951 | struct tcm_qla2xxx_lport, lport_wwn); |
959 | struct scsi_qla_host *vha = lport->qla_vha; | 952 | struct scsi_qla_host *vha = lport->qla_vha; |
960 | struct qla_hw_data *ha = vha->hw; | ||
961 | struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg, | 953 | struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg, |
962 | struct tcm_qla2xxx_tpg, se_tpg); | 954 | struct tcm_qla2xxx_tpg, se_tpg); |
963 | unsigned long op; | 955 | unsigned long op; |
@@ -977,12 +969,12 @@ static ssize_t tcm_qla2xxx_tpg_store_enable( | |||
977 | atomic_set(&tpg->lport_tpg_enabled, 1); | 969 | atomic_set(&tpg->lport_tpg_enabled, 1); |
978 | qlt_enable_vha(vha); | 970 | qlt_enable_vha(vha); |
979 | } else { | 971 | } else { |
980 | if (!ha->tgt.qla_tgt) { | 972 | if (!vha->vha_tgt.qla_tgt) { |
981 | pr_err("truct qla_hw_data *ha->tgt.qla_tgt is NULL\n"); | 973 | pr_err("struct qla_hw_data *vha->vha_tgt.qla_tgt is NULL\n"); |
982 | return -ENODEV; | 974 | return -ENODEV; |
983 | } | 975 | } |
984 | atomic_set(&tpg->lport_tpg_enabled, 0); | 976 | atomic_set(&tpg->lport_tpg_enabled, 0); |
985 | qlt_stop_phase1(ha->tgt.qla_tgt); | 977 | qlt_stop_phase1(vha->vha_tgt.qla_tgt); |
986 | } | 978 | } |
987 | 979 | ||
988 | return count; | 980 | return count; |
@@ -1011,7 +1003,7 @@ static struct se_portal_group *tcm_qla2xxx_make_tpg( | |||
1011 | if (kstrtoul(name + 5, 10, &tpgt) || tpgt > USHRT_MAX) | 1003 | if (kstrtoul(name + 5, 10, &tpgt) || tpgt > USHRT_MAX) |
1012 | return ERR_PTR(-EINVAL); | 1004 | return ERR_PTR(-EINVAL); |
1013 | 1005 | ||
1014 | if (!lport->qla_npiv_vp && (tpgt != 1)) { | 1006 | if ((tpgt != 1)) { |
1015 | pr_err("In non NPIV mode, a single TPG=1 is used for HW port mappings\n"); | 1007 | pr_err("In non NPIV mode, a single TPG=1 is used for HW port mappings\n"); |
1016 | return ERR_PTR(-ENOSYS); | 1008 | return ERR_PTR(-ENOSYS); |
1017 | } | 1009 | } |
@@ -1038,11 +1030,8 @@ static struct se_portal_group *tcm_qla2xxx_make_tpg( | |||
1038 | kfree(tpg); | 1030 | kfree(tpg); |
1039 | return NULL; | 1031 | return NULL; |
1040 | } | 1032 | } |
1041 | /* | 1033 | |
1042 | * Setup local TPG=1 pointer for non NPIV mode. | 1034 | lport->tpg_1 = tpg; |
1043 | */ | ||
1044 | if (lport->qla_npiv_vp == NULL) | ||
1045 | lport->tpg_1 = tpg; | ||
1046 | 1035 | ||
1047 | return &tpg->se_tpg; | 1036 | return &tpg->se_tpg; |
1048 | } | 1037 | } |
@@ -1053,19 +1042,17 @@ static void tcm_qla2xxx_drop_tpg(struct se_portal_group *se_tpg) | |||
1053 | struct tcm_qla2xxx_tpg, se_tpg); | 1042 | struct tcm_qla2xxx_tpg, se_tpg); |
1054 | struct tcm_qla2xxx_lport *lport = tpg->lport; | 1043 | struct tcm_qla2xxx_lport *lport = tpg->lport; |
1055 | struct scsi_qla_host *vha = lport->qla_vha; | 1044 | struct scsi_qla_host *vha = lport->qla_vha; |
1056 | struct qla_hw_data *ha = vha->hw; | ||
1057 | /* | 1045 | /* |
1058 | * Call into qla2x_target.c LLD logic to shutdown the active | 1046 | * Call into qla2x_target.c LLD logic to shutdown the active |
1059 | * FC Nexuses and disable target mode operation for this qla_hw_data | 1047 | * FC Nexuses and disable target mode operation for this qla_hw_data |
1060 | */ | 1048 | */ |
1061 | if (ha->tgt.qla_tgt && !ha->tgt.qla_tgt->tgt_stop) | 1049 | if (vha->vha_tgt.qla_tgt && !vha->vha_tgt.qla_tgt->tgt_stop) |
1062 | qlt_stop_phase1(ha->tgt.qla_tgt); | 1050 | qlt_stop_phase1(vha->vha_tgt.qla_tgt); |
1063 | 1051 | ||
1064 | core_tpg_deregister(se_tpg); | 1052 | core_tpg_deregister(se_tpg); |
1065 | /* | 1053 | /* |
1066 | * Clear local TPG=1 pointer for non NPIV mode. | 1054 | * Clear local TPG=1 pointer for non NPIV mode. |
1067 | */ | 1055 | */ |
1068 | if (lport->qla_npiv_vp == NULL) | ||
1069 | lport->tpg_1 = NULL; | 1056 | lport->tpg_1 = NULL; |
1070 | 1057 | ||
1071 | kfree(tpg); | 1058 | kfree(tpg); |
@@ -1095,12 +1082,22 @@ static struct se_portal_group *tcm_qla2xxx_npiv_make_tpg( | |||
1095 | tpg->lport = lport; | 1082 | tpg->lport = lport; |
1096 | tpg->lport_tpgt = tpgt; | 1083 | tpg->lport_tpgt = tpgt; |
1097 | 1084 | ||
1085 | /* | ||
1086 | * By default allow READ-ONLY TPG demo-mode access w/ cached dynamic | ||
1087 | * NodeACLs | ||
1088 | */ | ||
1089 | tpg->tpg_attrib.generate_node_acls = 1; | ||
1090 | tpg->tpg_attrib.demo_mode_write_protect = 1; | ||
1091 | tpg->tpg_attrib.cache_dynamic_acls = 1; | ||
1092 | tpg->tpg_attrib.demo_mode_login_only = 1; | ||
1093 | |||
1098 | ret = core_tpg_register(&tcm_qla2xxx_npiv_fabric_configfs->tf_ops, wwn, | 1094 | ret = core_tpg_register(&tcm_qla2xxx_npiv_fabric_configfs->tf_ops, wwn, |
1099 | &tpg->se_tpg, tpg, TRANSPORT_TPG_TYPE_NORMAL); | 1095 | &tpg->se_tpg, tpg, TRANSPORT_TPG_TYPE_NORMAL); |
1100 | if (ret < 0) { | 1096 | if (ret < 0) { |
1101 | kfree(tpg); | 1097 | kfree(tpg); |
1102 | return NULL; | 1098 | return NULL; |
1103 | } | 1099 | } |
1100 | lport->tpg_1 = tpg; | ||
1104 | return &tpg->se_tpg; | 1101 | return &tpg->se_tpg; |
1105 | } | 1102 | } |
1106 | 1103 | ||
@@ -1111,13 +1108,12 @@ static struct qla_tgt_sess *tcm_qla2xxx_find_sess_by_s_id( | |||
1111 | scsi_qla_host_t *vha, | 1108 | scsi_qla_host_t *vha, |
1112 | const uint8_t *s_id) | 1109 | const uint8_t *s_id) |
1113 | { | 1110 | { |
1114 | struct qla_hw_data *ha = vha->hw; | ||
1115 | struct tcm_qla2xxx_lport *lport; | 1111 | struct tcm_qla2xxx_lport *lport; |
1116 | struct se_node_acl *se_nacl; | 1112 | struct se_node_acl *se_nacl; |
1117 | struct tcm_qla2xxx_nacl *nacl; | 1113 | struct tcm_qla2xxx_nacl *nacl; |
1118 | u32 key; | 1114 | u32 key; |
1119 | 1115 | ||
1120 | lport = ha->tgt.target_lport_ptr; | 1116 | lport = vha->vha_tgt.target_lport_ptr; |
1121 | if (!lport) { | 1117 | if (!lport) { |
1122 | pr_err("Unable to locate struct tcm_qla2xxx_lport\n"); | 1118 | pr_err("Unable to locate struct tcm_qla2xxx_lport\n"); |
1123 | dump_stack(); | 1119 | dump_stack(); |
@@ -1221,13 +1217,12 @@ static struct qla_tgt_sess *tcm_qla2xxx_find_sess_by_loop_id( | |||
1221 | scsi_qla_host_t *vha, | 1217 | scsi_qla_host_t *vha, |
1222 | const uint16_t loop_id) | 1218 | const uint16_t loop_id) |
1223 | { | 1219 | { |
1224 | struct qla_hw_data *ha = vha->hw; | ||
1225 | struct tcm_qla2xxx_lport *lport; | 1220 | struct tcm_qla2xxx_lport *lport; |
1226 | struct se_node_acl *se_nacl; | 1221 | struct se_node_acl *se_nacl; |
1227 | struct tcm_qla2xxx_nacl *nacl; | 1222 | struct tcm_qla2xxx_nacl *nacl; |
1228 | struct tcm_qla2xxx_fc_loopid *fc_loopid; | 1223 | struct tcm_qla2xxx_fc_loopid *fc_loopid; |
1229 | 1224 | ||
1230 | lport = ha->tgt.target_lport_ptr; | 1225 | lport = vha->vha_tgt.target_lport_ptr; |
1231 | if (!lport) { | 1226 | if (!lport) { |
1232 | pr_err("Unable to locate struct tcm_qla2xxx_lport\n"); | 1227 | pr_err("Unable to locate struct tcm_qla2xxx_lport\n"); |
1233 | dump_stack(); | 1228 | dump_stack(); |
@@ -1341,6 +1336,7 @@ static void tcm_qla2xxx_free_session(struct qla_tgt_sess *sess) | |||
1341 | { | 1336 | { |
1342 | struct qla_tgt *tgt = sess->tgt; | 1337 | struct qla_tgt *tgt = sess->tgt; |
1343 | struct qla_hw_data *ha = tgt->ha; | 1338 | struct qla_hw_data *ha = tgt->ha; |
1339 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); | ||
1344 | struct se_session *se_sess; | 1340 | struct se_session *se_sess; |
1345 | struct se_node_acl *se_nacl; | 1341 | struct se_node_acl *se_nacl; |
1346 | struct tcm_qla2xxx_lport *lport; | 1342 | struct tcm_qla2xxx_lport *lport; |
@@ -1357,7 +1353,7 @@ static void tcm_qla2xxx_free_session(struct qla_tgt_sess *sess) | |||
1357 | se_nacl = se_sess->se_node_acl; | 1353 | se_nacl = se_sess->se_node_acl; |
1358 | nacl = container_of(se_nacl, struct tcm_qla2xxx_nacl, se_node_acl); | 1354 | nacl = container_of(se_nacl, struct tcm_qla2xxx_nacl, se_node_acl); |
1359 | 1355 | ||
1360 | lport = ha->tgt.target_lport_ptr; | 1356 | lport = vha->vha_tgt.target_lport_ptr; |
1361 | if (!lport) { | 1357 | if (!lport) { |
1362 | pr_err("Unable to locate struct tcm_qla2xxx_lport\n"); | 1358 | pr_err("Unable to locate struct tcm_qla2xxx_lport\n"); |
1363 | dump_stack(); | 1359 | dump_stack(); |
@@ -1391,7 +1387,7 @@ static int tcm_qla2xxx_check_initiator_node_acl( | |||
1391 | unsigned char port_name[36]; | 1387 | unsigned char port_name[36]; |
1392 | unsigned long flags; | 1388 | unsigned long flags; |
1393 | 1389 | ||
1394 | lport = ha->tgt.target_lport_ptr; | 1390 | lport = vha->vha_tgt.target_lport_ptr; |
1395 | if (!lport) { | 1391 | if (!lport) { |
1396 | pr_err("Unable to locate struct tcm_qla2xxx_lport\n"); | 1392 | pr_err("Unable to locate struct tcm_qla2xxx_lport\n"); |
1397 | dump_stack(); | 1393 | dump_stack(); |
@@ -1455,7 +1451,8 @@ static void tcm_qla2xxx_update_sess(struct qla_tgt_sess *sess, port_id_t s_id, | |||
1455 | { | 1451 | { |
1456 | struct qla_tgt *tgt = sess->tgt; | 1452 | struct qla_tgt *tgt = sess->tgt; |
1457 | struct qla_hw_data *ha = tgt->ha; | 1453 | struct qla_hw_data *ha = tgt->ha; |
1458 | struct tcm_qla2xxx_lport *lport = ha->tgt.target_lport_ptr; | 1454 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
1455 | struct tcm_qla2xxx_lport *lport = vha->vha_tgt.target_lport_ptr; | ||
1459 | struct se_node_acl *se_nacl = sess->se_sess->se_node_acl; | 1456 | struct se_node_acl *se_nacl = sess->se_sess->se_node_acl; |
1460 | struct tcm_qla2xxx_nacl *nacl = container_of(se_nacl, | 1457 | struct tcm_qla2xxx_nacl *nacl = container_of(se_nacl, |
1461 | struct tcm_qla2xxx_nacl, se_node_acl); | 1458 | struct tcm_qla2xxx_nacl, se_node_acl); |
@@ -1562,15 +1559,18 @@ static int tcm_qla2xxx_init_lport(struct tcm_qla2xxx_lport *lport) | |||
1562 | return 0; | 1559 | return 0; |
1563 | } | 1560 | } |
1564 | 1561 | ||
1565 | static int tcm_qla2xxx_lport_register_cb(struct scsi_qla_host *vha) | 1562 | static int tcm_qla2xxx_lport_register_cb(struct scsi_qla_host *vha, |
1563 | void *target_lport_ptr, | ||
1564 | u64 npiv_wwpn, u64 npiv_wwnn) | ||
1566 | { | 1565 | { |
1567 | struct qla_hw_data *ha = vha->hw; | 1566 | struct qla_hw_data *ha = vha->hw; |
1568 | struct tcm_qla2xxx_lport *lport; | 1567 | struct tcm_qla2xxx_lport *lport = |
1568 | (struct tcm_qla2xxx_lport *)target_lport_ptr; | ||
1569 | /* | 1569 | /* |
1570 | * Setup local pointer to vha, NPIV VP pointer (if present) and | 1570 | * Setup tgt_ops, local pointer to vha and target_lport_ptr |
1571 | * vha->tcm_lport pointer | ||
1572 | */ | 1571 | */ |
1573 | lport = (struct tcm_qla2xxx_lport *)ha->tgt.target_lport_ptr; | 1572 | ha->tgt.tgt_ops = &tcm_qla2xxx_template; |
1573 | vha->vha_tgt.target_lport_ptr = target_lport_ptr; | ||
1574 | lport->qla_vha = vha; | 1574 | lport->qla_vha = vha; |
1575 | 1575 | ||
1576 | return 0; | 1576 | return 0; |
@@ -1602,8 +1602,8 @@ static struct se_wwn *tcm_qla2xxx_make_lport( | |||
1602 | if (ret != 0) | 1602 | if (ret != 0) |
1603 | goto out; | 1603 | goto out; |
1604 | 1604 | ||
1605 | ret = qlt_lport_register(&tcm_qla2xxx_template, wwpn, | 1605 | ret = qlt_lport_register(lport, wwpn, 0, 0, |
1606 | tcm_qla2xxx_lport_register_cb, lport); | 1606 | tcm_qla2xxx_lport_register_cb); |
1607 | if (ret != 0) | 1607 | if (ret != 0) |
1608 | goto out_lport; | 1608 | goto out_lport; |
1609 | 1609 | ||
@@ -1621,7 +1621,6 @@ static void tcm_qla2xxx_drop_lport(struct se_wwn *wwn) | |||
1621 | struct tcm_qla2xxx_lport *lport = container_of(wwn, | 1621 | struct tcm_qla2xxx_lport *lport = container_of(wwn, |
1622 | struct tcm_qla2xxx_lport, lport_wwn); | 1622 | struct tcm_qla2xxx_lport, lport_wwn); |
1623 | struct scsi_qla_host *vha = lport->qla_vha; | 1623 | struct scsi_qla_host *vha = lport->qla_vha; |
1624 | struct qla_hw_data *ha = vha->hw; | ||
1625 | struct se_node_acl *node; | 1624 | struct se_node_acl *node; |
1626 | u32 key = 0; | 1625 | u32 key = 0; |
1627 | 1626 | ||
@@ -1630,8 +1629,8 @@ static void tcm_qla2xxx_drop_lport(struct se_wwn *wwn) | |||
1630 | * shutdown of struct qla_tgt after the call to | 1629 | * shutdown of struct qla_tgt after the call to |
1631 | * qlt_stop_phase1() from tcm_qla2xxx_drop_tpg() above.. | 1630 | * qlt_stop_phase1() from tcm_qla2xxx_drop_tpg() above.. |
1632 | */ | 1631 | */ |
1633 | if (ha->tgt.qla_tgt && !ha->tgt.qla_tgt->tgt_stopped) | 1632 | if (vha->vha_tgt.qla_tgt && !vha->vha_tgt.qla_tgt->tgt_stopped) |
1634 | qlt_stop_phase2(ha->tgt.qla_tgt); | 1633 | qlt_stop_phase2(vha->vha_tgt.qla_tgt); |
1635 | 1634 | ||
1636 | qlt_lport_deregister(vha); | 1635 | qlt_lport_deregister(vha); |
1637 | 1636 | ||
@@ -1642,17 +1641,70 @@ static void tcm_qla2xxx_drop_lport(struct se_wwn *wwn) | |||
1642 | kfree(lport); | 1641 | kfree(lport); |
1643 | } | 1642 | } |
1644 | 1643 | ||
1644 | static int tcm_qla2xxx_lport_register_npiv_cb(struct scsi_qla_host *base_vha, | ||
1645 | void *target_lport_ptr, | ||
1646 | u64 npiv_wwpn, u64 npiv_wwnn) | ||
1647 | { | ||
1648 | struct fc_vport *vport; | ||
1649 | struct Scsi_Host *sh = base_vha->host; | ||
1650 | struct scsi_qla_host *npiv_vha; | ||
1651 | struct tcm_qla2xxx_lport *lport = | ||
1652 | (struct tcm_qla2xxx_lport *)target_lport_ptr; | ||
1653 | struct fc_vport_identifiers vport_id; | ||
1654 | |||
1655 | if (!qla_tgt_mode_enabled(base_vha)) { | ||
1656 | pr_err("qla2xxx base_vha not enabled for target mode\n"); | ||
1657 | return -EPERM; | ||
1658 | } | ||
1659 | |||
1660 | memset(&vport_id, 0, sizeof(vport_id)); | ||
1661 | vport_id.port_name = npiv_wwpn; | ||
1662 | vport_id.node_name = npiv_wwnn; | ||
1663 | vport_id.roles = FC_PORT_ROLE_FCP_INITIATOR; | ||
1664 | vport_id.vport_type = FC_PORTTYPE_NPIV; | ||
1665 | vport_id.disable = false; | ||
1666 | |||
1667 | vport = fc_vport_create(sh, 0, &vport_id); | ||
1668 | if (!vport) { | ||
1669 | pr_err("fc_vport_create failed for qla2xxx_npiv\n"); | ||
1670 | return -ENODEV; | ||
1671 | } | ||
1672 | /* | ||
1673 | * Setup local pointer to NPIV vhba + target_lport_ptr | ||
1674 | */ | ||
1675 | npiv_vha = (struct scsi_qla_host *)vport->dd_data; | ||
1676 | npiv_vha->vha_tgt.target_lport_ptr = target_lport_ptr; | ||
1677 | lport->qla_vha = npiv_vha; | ||
1678 | |||
1679 | scsi_host_get(npiv_vha->host); | ||
1680 | return 0; | ||
1681 | } | ||
1682 | |||
1683 | |||
1645 | static struct se_wwn *tcm_qla2xxx_npiv_make_lport( | 1684 | static struct se_wwn *tcm_qla2xxx_npiv_make_lport( |
1646 | struct target_fabric_configfs *tf, | 1685 | struct target_fabric_configfs *tf, |
1647 | struct config_group *group, | 1686 | struct config_group *group, |
1648 | const char *name) | 1687 | const char *name) |
1649 | { | 1688 | { |
1650 | struct tcm_qla2xxx_lport *lport; | 1689 | struct tcm_qla2xxx_lport *lport; |
1651 | u64 npiv_wwpn, npiv_wwnn; | 1690 | u64 phys_wwpn, npiv_wwpn, npiv_wwnn; |
1691 | char *p, tmp[128]; | ||
1652 | int ret; | 1692 | int ret; |
1653 | 1693 | ||
1654 | if (tcm_qla2xxx_npiv_parse_wwn(name, strlen(name)+1, | 1694 | snprintf(tmp, 128, "%s", name); |
1655 | &npiv_wwpn, &npiv_wwnn) < 0) | 1695 | |
1696 | p = strchr(tmp, '@'); | ||
1697 | if (!p) { | ||
1698 | pr_err("Unable to locate NPIV '@' seperator\n"); | ||
1699 | return ERR_PTR(-EINVAL); | ||
1700 | } | ||
1701 | *p++ = '\0'; | ||
1702 | |||
1703 | if (tcm_qla2xxx_parse_wwn(tmp, &phys_wwpn, 1) < 0) | ||
1704 | return ERR_PTR(-EINVAL); | ||
1705 | |||
1706 | if (tcm_qla2xxx_npiv_parse_wwn(p, strlen(p)+1, | ||
1707 | &npiv_wwpn, &npiv_wwnn) < 0) | ||
1656 | return ERR_PTR(-EINVAL); | 1708 | return ERR_PTR(-EINVAL); |
1657 | 1709 | ||
1658 | lport = kzalloc(sizeof(struct tcm_qla2xxx_lport), GFP_KERNEL); | 1710 | lport = kzalloc(sizeof(struct tcm_qla2xxx_lport), GFP_KERNEL); |
@@ -1666,12 +1718,19 @@ static struct se_wwn *tcm_qla2xxx_npiv_make_lport( | |||
1666 | TCM_QLA2XXX_NAMELEN, npiv_wwpn, npiv_wwnn); | 1718 | TCM_QLA2XXX_NAMELEN, npiv_wwpn, npiv_wwnn); |
1667 | sprintf(lport->lport_naa_name, "naa.%016llx", (unsigned long long) npiv_wwpn); | 1719 | sprintf(lport->lport_naa_name, "naa.%016llx", (unsigned long long) npiv_wwpn); |
1668 | 1720 | ||
1669 | /* FIXME: tcm_qla2xxx_npiv_make_lport */ | 1721 | ret = tcm_qla2xxx_init_lport(lport); |
1670 | ret = -ENOSYS; | ||
1671 | if (ret != 0) | 1722 | if (ret != 0) |
1672 | goto out; | 1723 | goto out; |
1673 | 1724 | ||
1725 | ret = qlt_lport_register(lport, phys_wwpn, npiv_wwpn, npiv_wwnn, | ||
1726 | tcm_qla2xxx_lport_register_npiv_cb); | ||
1727 | if (ret != 0) | ||
1728 | goto out_lport; | ||
1729 | |||
1674 | return &lport->lport_wwn; | 1730 | return &lport->lport_wwn; |
1731 | out_lport: | ||
1732 | vfree(lport->lport_loopid_map); | ||
1733 | btree_destroy32(&lport->lport_fcport_map); | ||
1675 | out: | 1734 | out: |
1676 | kfree(lport); | 1735 | kfree(lport); |
1677 | return ERR_PTR(ret); | 1736 | return ERR_PTR(ret); |
@@ -1681,14 +1740,16 @@ static void tcm_qla2xxx_npiv_drop_lport(struct se_wwn *wwn) | |||
1681 | { | 1740 | { |
1682 | struct tcm_qla2xxx_lport *lport = container_of(wwn, | 1741 | struct tcm_qla2xxx_lport *lport = container_of(wwn, |
1683 | struct tcm_qla2xxx_lport, lport_wwn); | 1742 | struct tcm_qla2xxx_lport, lport_wwn); |
1684 | struct scsi_qla_host *vha = lport->qla_vha; | 1743 | struct scsi_qla_host *npiv_vha = lport->qla_vha; |
1685 | struct Scsi_Host *sh = vha->host; | 1744 | struct qla_hw_data *ha = npiv_vha->hw; |
1745 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | ||
1746 | |||
1747 | scsi_host_put(npiv_vha->host); | ||
1686 | /* | 1748 | /* |
1687 | * Notify libfc that we want to release the lport->npiv_vport | 1749 | * Notify libfc that we want to release the vha->fc_vport |
1688 | */ | 1750 | */ |
1689 | fc_vport_terminate(lport->npiv_vport); | 1751 | fc_vport_terminate(npiv_vha->fc_vport); |
1690 | 1752 | scsi_host_put(base_vha->host); | |
1691 | scsi_host_put(sh); | ||
1692 | kfree(lport); | 1753 | kfree(lport); |
1693 | } | 1754 | } |
1694 | 1755 | ||
@@ -1769,14 +1830,16 @@ static struct target_core_fabric_ops tcm_qla2xxx_npiv_ops = { | |||
1769 | .tpg_get_pr_transport_id = tcm_qla2xxx_get_pr_transport_id, | 1830 | .tpg_get_pr_transport_id = tcm_qla2xxx_get_pr_transport_id, |
1770 | .tpg_get_pr_transport_id_len = tcm_qla2xxx_get_pr_transport_id_len, | 1831 | .tpg_get_pr_transport_id_len = tcm_qla2xxx_get_pr_transport_id_len, |
1771 | .tpg_parse_pr_out_transport_id = tcm_qla2xxx_parse_pr_out_transport_id, | 1832 | .tpg_parse_pr_out_transport_id = tcm_qla2xxx_parse_pr_out_transport_id, |
1772 | .tpg_check_demo_mode = tcm_qla2xxx_check_false, | 1833 | .tpg_check_demo_mode = tcm_qla2xxx_check_demo_mode, |
1773 | .tpg_check_demo_mode_cache = tcm_qla2xxx_check_true, | 1834 | .tpg_check_demo_mode_cache = tcm_qla2xxx_check_demo_mode_cache, |
1774 | .tpg_check_demo_mode_write_protect = tcm_qla2xxx_check_true, | 1835 | .tpg_check_demo_mode_write_protect = tcm_qla2xxx_check_demo_mode, |
1775 | .tpg_check_prod_mode_write_protect = tcm_qla2xxx_check_false, | 1836 | .tpg_check_prod_mode_write_protect = |
1837 | tcm_qla2xxx_check_prod_write_protect, | ||
1776 | .tpg_check_demo_mode_login_only = tcm_qla2xxx_check_demo_mode_login_only, | 1838 | .tpg_check_demo_mode_login_only = tcm_qla2xxx_check_demo_mode_login_only, |
1777 | .tpg_alloc_fabric_acl = tcm_qla2xxx_alloc_fabric_acl, | 1839 | .tpg_alloc_fabric_acl = tcm_qla2xxx_alloc_fabric_acl, |
1778 | .tpg_release_fabric_acl = tcm_qla2xxx_release_fabric_acl, | 1840 | .tpg_release_fabric_acl = tcm_qla2xxx_release_fabric_acl, |
1779 | .tpg_get_inst_index = tcm_qla2xxx_tpg_get_inst_index, | 1841 | .tpg_get_inst_index = tcm_qla2xxx_tpg_get_inst_index, |
1842 | .check_stop_free = tcm_qla2xxx_check_stop_free, | ||
1780 | .release_cmd = tcm_qla2xxx_release_cmd, | 1843 | .release_cmd = tcm_qla2xxx_release_cmd, |
1781 | .put_session = tcm_qla2xxx_put_session, | 1844 | .put_session = tcm_qla2xxx_put_session, |
1782 | .shutdown_session = tcm_qla2xxx_shutdown_session, | 1845 | .shutdown_session = tcm_qla2xxx_shutdown_session, |
@@ -1871,7 +1934,8 @@ static int tcm_qla2xxx_register_configfs(void) | |||
1871 | * Setup default attribute lists for various npiv_fabric->tf_cit_tmpl | 1934 | * Setup default attribute lists for various npiv_fabric->tf_cit_tmpl |
1872 | */ | 1935 | */ |
1873 | npiv_fabric->tf_cit_tmpl.tfc_wwn_cit.ct_attrs = tcm_qla2xxx_wwn_attrs; | 1936 | npiv_fabric->tf_cit_tmpl.tfc_wwn_cit.ct_attrs = tcm_qla2xxx_wwn_attrs; |
1874 | npiv_fabric->tf_cit_tmpl.tfc_tpg_base_cit.ct_attrs = NULL; | 1937 | npiv_fabric->tf_cit_tmpl.tfc_tpg_base_cit.ct_attrs = |
1938 | tcm_qla2xxx_tpg_attrs; | ||
1875 | npiv_fabric->tf_cit_tmpl.tfc_tpg_attrib_cit.ct_attrs = NULL; | 1939 | npiv_fabric->tf_cit_tmpl.tfc_tpg_attrib_cit.ct_attrs = NULL; |
1876 | npiv_fabric->tf_cit_tmpl.tfc_tpg_param_cit.ct_attrs = NULL; | 1940 | npiv_fabric->tf_cit_tmpl.tfc_tpg_param_cit.ct_attrs = NULL; |
1877 | npiv_fabric->tf_cit_tmpl.tfc_tpg_np_base_cit.ct_attrs = NULL; | 1941 | npiv_fabric->tf_cit_tmpl.tfc_tpg_np_base_cit.ct_attrs = NULL; |
diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.h b/drivers/scsi/qla2xxx/tcm_qla2xxx.h index 771f7b816443..275d8b9a7a34 100644 --- a/drivers/scsi/qla2xxx/tcm_qla2xxx.h +++ b/drivers/scsi/qla2xxx/tcm_qla2xxx.h | |||
@@ -70,12 +70,8 @@ struct tcm_qla2xxx_lport { | |||
70 | struct tcm_qla2xxx_fc_loopid *lport_loopid_map; | 70 | struct tcm_qla2xxx_fc_loopid *lport_loopid_map; |
71 | /* Pointer to struct scsi_qla_host from qla2xxx LLD */ | 71 | /* Pointer to struct scsi_qla_host from qla2xxx LLD */ |
72 | struct scsi_qla_host *qla_vha; | 72 | struct scsi_qla_host *qla_vha; |
73 | /* Pointer to struct scsi_qla_host for NPIV VP from qla2xxx LLD */ | ||
74 | struct scsi_qla_host *qla_npiv_vp; | ||
75 | /* Pointer to struct qla_tgt pointer */ | 73 | /* Pointer to struct qla_tgt pointer */ |
76 | struct qla_tgt lport_qla_tgt; | 74 | struct qla_tgt lport_qla_tgt; |
77 | /* Pointer to struct fc_vport for NPIV vport from libfc */ | ||
78 | struct fc_vport *npiv_vport; | ||
79 | /* Pointer to TPG=1 for non NPIV mode */ | 75 | /* Pointer to TPG=1 for non NPIV mode */ |
80 | struct tcm_qla2xxx_tpg *tpg_1; | 76 | struct tcm_qla2xxx_tpg *tpg_1; |
81 | /* Returned by tcm_qla2xxx_make_lport() */ | 77 | /* Returned by tcm_qla2xxx_make_lport() */ |
diff --git a/drivers/scsi/qla4xxx/ql4_bsg.c b/drivers/scsi/qla4xxx/ql4_bsg.c index cf8fdf1d1257..04a0027dbca0 100644 --- a/drivers/scsi/qla4xxx/ql4_bsg.c +++ b/drivers/scsi/qla4xxx/ql4_bsg.c | |||
@@ -446,6 +446,363 @@ leave: | |||
446 | return rval; | 446 | return rval; |
447 | } | 447 | } |
448 | 448 | ||
449 | static void ql4xxx_execute_diag_cmd(struct bsg_job *bsg_job) | ||
450 | { | ||
451 | struct Scsi_Host *host = iscsi_job_to_shost(bsg_job); | ||
452 | struct scsi_qla_host *ha = to_qla_host(host); | ||
453 | struct iscsi_bsg_request *bsg_req = bsg_job->request; | ||
454 | struct iscsi_bsg_reply *bsg_reply = bsg_job->reply; | ||
455 | uint8_t *rsp_ptr = NULL; | ||
456 | uint32_t mbox_cmd[MBOX_REG_COUNT]; | ||
457 | uint32_t mbox_sts[MBOX_REG_COUNT]; | ||
458 | int status = QLA_ERROR; | ||
459 | |||
460 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); | ||
461 | |||
462 | if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) { | ||
463 | ql4_printk(KERN_INFO, ha, "%s: Adapter reset in progress. Invalid Request\n", | ||
464 | __func__); | ||
465 | bsg_reply->result = DID_ERROR << 16; | ||
466 | goto exit_diag_mem_test; | ||
467 | } | ||
468 | |||
469 | bsg_reply->reply_payload_rcv_len = 0; | ||
470 | memcpy(mbox_cmd, &bsg_req->rqst_data.h_vendor.vendor_cmd[1], | ||
471 | sizeof(uint32_t) * MBOX_REG_COUNT); | ||
472 | |||
473 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
474 | "%s: mbox_cmd: %08X %08X %08X %08X %08X %08X %08X %08X\n", | ||
475 | __func__, mbox_cmd[0], mbox_cmd[1], mbox_cmd[2], | ||
476 | mbox_cmd[3], mbox_cmd[4], mbox_cmd[5], mbox_cmd[6], | ||
477 | mbox_cmd[7])); | ||
478 | |||
479 | status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 8, &mbox_cmd[0], | ||
480 | &mbox_sts[0]); | ||
481 | |||
482 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
483 | "%s: mbox_sts: %08X %08X %08X %08X %08X %08X %08X %08X\n", | ||
484 | __func__, mbox_sts[0], mbox_sts[1], mbox_sts[2], | ||
485 | mbox_sts[3], mbox_sts[4], mbox_sts[5], mbox_sts[6], | ||
486 | mbox_sts[7])); | ||
487 | |||
488 | if (status == QLA_SUCCESS) | ||
489 | bsg_reply->result = DID_OK << 16; | ||
490 | else | ||
491 | bsg_reply->result = DID_ERROR << 16; | ||
492 | |||
493 | /* Send mbox_sts to application */ | ||
494 | bsg_job->reply_len = sizeof(struct iscsi_bsg_reply) + sizeof(mbox_sts); | ||
495 | rsp_ptr = ((uint8_t *)bsg_reply) + sizeof(struct iscsi_bsg_reply); | ||
496 | memcpy(rsp_ptr, mbox_sts, sizeof(mbox_sts)); | ||
497 | |||
498 | exit_diag_mem_test: | ||
499 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
500 | "%s: bsg_reply->result = x%x, status = %s\n", | ||
501 | __func__, bsg_reply->result, STATUS(status))); | ||
502 | |||
503 | bsg_job_done(bsg_job, bsg_reply->result, | ||
504 | bsg_reply->reply_payload_rcv_len); | ||
505 | } | ||
506 | |||
507 | static int qla4_83xx_wait_for_loopback_config_comp(struct scsi_qla_host *ha, | ||
508 | int wait_for_link) | ||
509 | { | ||
510 | int status = QLA_SUCCESS; | ||
511 | |||
512 | if (!wait_for_completion_timeout(&ha->idc_comp, (IDC_COMP_TOV * HZ))) { | ||
513 | ql4_printk(KERN_INFO, ha, "%s: IDC Complete notification not received, Waiting for another %d timeout", | ||
514 | __func__, ha->idc_extend_tmo); | ||
515 | if (ha->idc_extend_tmo) { | ||
516 | if (!wait_for_completion_timeout(&ha->idc_comp, | ||
517 | (ha->idc_extend_tmo * HZ))) { | ||
518 | ha->notify_idc_comp = 0; | ||
519 | ha->notify_link_up_comp = 0; | ||
520 | ql4_printk(KERN_WARNING, ha, "%s: IDC Complete notification not received", | ||
521 | __func__); | ||
522 | status = QLA_ERROR; | ||
523 | goto exit_wait; | ||
524 | } else { | ||
525 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
526 | "%s: IDC Complete notification received\n", | ||
527 | __func__)); | ||
528 | } | ||
529 | } | ||
530 | } else { | ||
531 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
532 | "%s: IDC Complete notification received\n", | ||
533 | __func__)); | ||
534 | } | ||
535 | ha->notify_idc_comp = 0; | ||
536 | |||
537 | if (wait_for_link) { | ||
538 | if (!wait_for_completion_timeout(&ha->link_up_comp, | ||
539 | (IDC_COMP_TOV * HZ))) { | ||
540 | ha->notify_link_up_comp = 0; | ||
541 | ql4_printk(KERN_WARNING, ha, "%s: LINK UP notification not received", | ||
542 | __func__); | ||
543 | status = QLA_ERROR; | ||
544 | goto exit_wait; | ||
545 | } else { | ||
546 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
547 | "%s: LINK UP notification received\n", | ||
548 | __func__)); | ||
549 | } | ||
550 | ha->notify_link_up_comp = 0; | ||
551 | } | ||
552 | |||
553 | exit_wait: | ||
554 | return status; | ||
555 | } | ||
556 | |||
557 | static int qla4_83xx_pre_loopback_config(struct scsi_qla_host *ha, | ||
558 | uint32_t *mbox_cmd) | ||
559 | { | ||
560 | uint32_t config = 0; | ||
561 | int status = QLA_SUCCESS; | ||
562 | |||
563 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); | ||
564 | |||
565 | status = qla4_83xx_get_port_config(ha, &config); | ||
566 | if (status != QLA_SUCCESS) | ||
567 | goto exit_pre_loopback_config; | ||
568 | |||
569 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Default port config=%08X\n", | ||
570 | __func__, config)); | ||
571 | |||
572 | if ((config & ENABLE_INTERNAL_LOOPBACK) || | ||
573 | (config & ENABLE_EXTERNAL_LOOPBACK)) { | ||
574 | ql4_printk(KERN_INFO, ha, "%s: Loopback diagnostics already in progress. Invalid requiest\n", | ||
575 | __func__); | ||
576 | goto exit_pre_loopback_config; | ||
577 | } | ||
578 | |||
579 | if (mbox_cmd[1] == QL_DIAG_CMD_TEST_INT_LOOPBACK) | ||
580 | config |= ENABLE_INTERNAL_LOOPBACK; | ||
581 | |||
582 | if (mbox_cmd[1] == QL_DIAG_CMD_TEST_EXT_LOOPBACK) | ||
583 | config |= ENABLE_EXTERNAL_LOOPBACK; | ||
584 | |||
585 | config &= ~ENABLE_DCBX; | ||
586 | |||
587 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: New port config=%08X\n", | ||
588 | __func__, config)); | ||
589 | |||
590 | ha->notify_idc_comp = 1; | ||
591 | ha->notify_link_up_comp = 1; | ||
592 | |||
593 | /* get the link state */ | ||
594 | qla4xxx_get_firmware_state(ha); | ||
595 | |||
596 | status = qla4_83xx_set_port_config(ha, &config); | ||
597 | if (status != QLA_SUCCESS) { | ||
598 | ha->notify_idc_comp = 0; | ||
599 | ha->notify_link_up_comp = 0; | ||
600 | goto exit_pre_loopback_config; | ||
601 | } | ||
602 | exit_pre_loopback_config: | ||
603 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: status = %s\n", __func__, | ||
604 | STATUS(status))); | ||
605 | return status; | ||
606 | } | ||
607 | |||
608 | static int qla4_83xx_post_loopback_config(struct scsi_qla_host *ha, | ||
609 | uint32_t *mbox_cmd) | ||
610 | { | ||
611 | int status = QLA_SUCCESS; | ||
612 | uint32_t config = 0; | ||
613 | |||
614 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); | ||
615 | |||
616 | status = qla4_83xx_get_port_config(ha, &config); | ||
617 | if (status != QLA_SUCCESS) | ||
618 | goto exit_post_loopback_config; | ||
619 | |||
620 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: port config=%08X\n", __func__, | ||
621 | config)); | ||
622 | |||
623 | if (mbox_cmd[1] == QL_DIAG_CMD_TEST_INT_LOOPBACK) | ||
624 | config &= ~ENABLE_INTERNAL_LOOPBACK; | ||
625 | else if (mbox_cmd[1] == QL_DIAG_CMD_TEST_EXT_LOOPBACK) | ||
626 | config &= ~ENABLE_EXTERNAL_LOOPBACK; | ||
627 | |||
628 | config |= ENABLE_DCBX; | ||
629 | |||
630 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
631 | "%s: Restore default port config=%08X\n", __func__, | ||
632 | config)); | ||
633 | |||
634 | ha->notify_idc_comp = 1; | ||
635 | if (ha->addl_fw_state & FW_ADDSTATE_LINK_UP) | ||
636 | ha->notify_link_up_comp = 1; | ||
637 | |||
638 | status = qla4_83xx_set_port_config(ha, &config); | ||
639 | if (status != QLA_SUCCESS) { | ||
640 | ql4_printk(KERN_INFO, ha, "%s: Scheduling adapter reset\n", | ||
641 | __func__); | ||
642 | set_bit(DPC_RESET_HA, &ha->dpc_flags); | ||
643 | clear_bit(AF_LOOPBACK, &ha->flags); | ||
644 | goto exit_post_loopback_config; | ||
645 | } | ||
646 | |||
647 | exit_post_loopback_config: | ||
648 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: status = %s\n", __func__, | ||
649 | STATUS(status))); | ||
650 | return status; | ||
651 | } | ||
652 | |||
653 | static void qla4xxx_execute_diag_loopback_cmd(struct bsg_job *bsg_job) | ||
654 | { | ||
655 | struct Scsi_Host *host = iscsi_job_to_shost(bsg_job); | ||
656 | struct scsi_qla_host *ha = to_qla_host(host); | ||
657 | struct iscsi_bsg_request *bsg_req = bsg_job->request; | ||
658 | struct iscsi_bsg_reply *bsg_reply = bsg_job->reply; | ||
659 | uint8_t *rsp_ptr = NULL; | ||
660 | uint32_t mbox_cmd[MBOX_REG_COUNT]; | ||
661 | uint32_t mbox_sts[MBOX_REG_COUNT]; | ||
662 | int wait_for_link = 1; | ||
663 | int status = QLA_ERROR; | ||
664 | |||
665 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); | ||
666 | |||
667 | bsg_reply->reply_payload_rcv_len = 0; | ||
668 | |||
669 | if (test_bit(AF_LOOPBACK, &ha->flags)) { | ||
670 | ql4_printk(KERN_INFO, ha, "%s: Loopback Diagnostics already in progress. Invalid Request\n", | ||
671 | __func__); | ||
672 | bsg_reply->result = DID_ERROR << 16; | ||
673 | goto exit_loopback_cmd; | ||
674 | } | ||
675 | |||
676 | if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) { | ||
677 | ql4_printk(KERN_INFO, ha, "%s: Adapter reset in progress. Invalid Request\n", | ||
678 | __func__); | ||
679 | bsg_reply->result = DID_ERROR << 16; | ||
680 | goto exit_loopback_cmd; | ||
681 | } | ||
682 | |||
683 | memcpy(mbox_cmd, &bsg_req->rqst_data.h_vendor.vendor_cmd[1], | ||
684 | sizeof(uint32_t) * MBOX_REG_COUNT); | ||
685 | |||
686 | if (is_qla8032(ha) || is_qla8042(ha)) { | ||
687 | status = qla4_83xx_pre_loopback_config(ha, mbox_cmd); | ||
688 | if (status != QLA_SUCCESS) { | ||
689 | bsg_reply->result = DID_ERROR << 16; | ||
690 | goto exit_loopback_cmd; | ||
691 | } | ||
692 | |||
693 | status = qla4_83xx_wait_for_loopback_config_comp(ha, | ||
694 | wait_for_link); | ||
695 | if (status != QLA_SUCCESS) { | ||
696 | bsg_reply->result = DID_TIME_OUT << 16; | ||
697 | goto restore; | ||
698 | } | ||
699 | } | ||
700 | |||
701 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
702 | "%s: mbox_cmd: %08X %08X %08X %08X %08X %08X %08X %08X\n", | ||
703 | __func__, mbox_cmd[0], mbox_cmd[1], mbox_cmd[2], | ||
704 | mbox_cmd[3], mbox_cmd[4], mbox_cmd[5], mbox_cmd[6], | ||
705 | mbox_cmd[7])); | ||
706 | |||
707 | status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 8, &mbox_cmd[0], | ||
708 | &mbox_sts[0]); | ||
709 | |||
710 | if (status == QLA_SUCCESS) | ||
711 | bsg_reply->result = DID_OK << 16; | ||
712 | else | ||
713 | bsg_reply->result = DID_ERROR << 16; | ||
714 | |||
715 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
716 | "%s: mbox_sts: %08X %08X %08X %08X %08X %08X %08X %08X\n", | ||
717 | __func__, mbox_sts[0], mbox_sts[1], mbox_sts[2], | ||
718 | mbox_sts[3], mbox_sts[4], mbox_sts[5], mbox_sts[6], | ||
719 | mbox_sts[7])); | ||
720 | |||
721 | /* Send mbox_sts to application */ | ||
722 | bsg_job->reply_len = sizeof(struct iscsi_bsg_reply) + sizeof(mbox_sts); | ||
723 | rsp_ptr = ((uint8_t *)bsg_reply) + sizeof(struct iscsi_bsg_reply); | ||
724 | memcpy(rsp_ptr, mbox_sts, sizeof(mbox_sts)); | ||
725 | restore: | ||
726 | if (is_qla8032(ha) || is_qla8042(ha)) { | ||
727 | status = qla4_83xx_post_loopback_config(ha, mbox_cmd); | ||
728 | if (status != QLA_SUCCESS) { | ||
729 | bsg_reply->result = DID_ERROR << 16; | ||
730 | goto exit_loopback_cmd; | ||
731 | } | ||
732 | |||
733 | /* for pre_loopback_config() wait for LINK UP only | ||
734 | * if PHY LINK is UP */ | ||
735 | if (!(ha->addl_fw_state & FW_ADDSTATE_LINK_UP)) | ||
736 | wait_for_link = 0; | ||
737 | |||
738 | status = qla4_83xx_wait_for_loopback_config_comp(ha, | ||
739 | wait_for_link); | ||
740 | if (status != QLA_SUCCESS) { | ||
741 | bsg_reply->result = DID_TIME_OUT << 16; | ||
742 | goto exit_loopback_cmd; | ||
743 | } | ||
744 | } | ||
745 | exit_loopback_cmd: | ||
746 | DEBUG2(ql4_printk(KERN_INFO, ha, | ||
747 | "%s: bsg_reply->result = x%x, status = %s\n", | ||
748 | __func__, bsg_reply->result, STATUS(status))); | ||
749 | bsg_job_done(bsg_job, bsg_reply->result, | ||
750 | bsg_reply->reply_payload_rcv_len); | ||
751 | } | ||
752 | |||
753 | static int qla4xxx_execute_diag_test(struct bsg_job *bsg_job) | ||
754 | { | ||
755 | struct Scsi_Host *host = iscsi_job_to_shost(bsg_job); | ||
756 | struct scsi_qla_host *ha = to_qla_host(host); | ||
757 | struct iscsi_bsg_request *bsg_req = bsg_job->request; | ||
758 | uint32_t diag_cmd; | ||
759 | int rval = -EINVAL; | ||
760 | |||
761 | DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); | ||
762 | |||
763 | diag_cmd = bsg_req->rqst_data.h_vendor.vendor_cmd[1]; | ||
764 | if (diag_cmd == MBOX_CMD_DIAG_TEST) { | ||
765 | switch (bsg_req->rqst_data.h_vendor.vendor_cmd[2]) { | ||
766 | case QL_DIAG_CMD_TEST_DDR_SIZE: | ||
767 | case QL_DIAG_CMD_TEST_DDR_RW: | ||
768 | case QL_DIAG_CMD_TEST_ONCHIP_MEM_RW: | ||
769 | case QL_DIAG_CMD_TEST_NVRAM: | ||
770 | case QL_DIAG_CMD_TEST_FLASH_ROM: | ||
771 | case QL_DIAG_CMD_TEST_DMA_XFER: | ||
772 | case QL_DIAG_CMD_SELF_DDR_RW: | ||
773 | case QL_DIAG_CMD_SELF_ONCHIP_MEM_RW: | ||
774 | /* Execute diag test for adapter RAM/FLASH */ | ||
775 | ql4xxx_execute_diag_cmd(bsg_job); | ||
776 | /* Always return success as we want to sent bsg_reply | ||
777 | * to Application */ | ||
778 | rval = QLA_SUCCESS; | ||
779 | break; | ||
780 | |||
781 | case QL_DIAG_CMD_TEST_INT_LOOPBACK: | ||
782 | case QL_DIAG_CMD_TEST_EXT_LOOPBACK: | ||
783 | /* Execute diag test for Network */ | ||
784 | qla4xxx_execute_diag_loopback_cmd(bsg_job); | ||
785 | /* Always return success as we want to sent bsg_reply | ||
786 | * to Application */ | ||
787 | rval = QLA_SUCCESS; | ||
788 | break; | ||
789 | default: | ||
790 | ql4_printk(KERN_ERR, ha, "%s: Invalid diag test: 0x%x\n", | ||
791 | __func__, | ||
792 | bsg_req->rqst_data.h_vendor.vendor_cmd[2]); | ||
793 | } | ||
794 | } else if ((diag_cmd == MBOX_CMD_SET_LED_CONFIG) || | ||
795 | (diag_cmd == MBOX_CMD_GET_LED_CONFIG)) { | ||
796 | ql4xxx_execute_diag_cmd(bsg_job); | ||
797 | rval = QLA_SUCCESS; | ||
798 | } else { | ||
799 | ql4_printk(KERN_ERR, ha, "%s: Invalid diag cmd: 0x%x\n", | ||
800 | __func__, diag_cmd); | ||
801 | } | ||
802 | |||
803 | return rval; | ||
804 | } | ||
805 | |||
449 | /** | 806 | /** |
450 | * qla4xxx_process_vendor_specific - handle vendor specific bsg request | 807 | * qla4xxx_process_vendor_specific - handle vendor specific bsg request |
451 | * @job: iscsi_bsg_job to handle | 808 | * @job: iscsi_bsg_job to handle |
@@ -479,6 +836,9 @@ int qla4xxx_process_vendor_specific(struct bsg_job *bsg_job) | |||
479 | case QLISCSI_VND_GET_ACB: | 836 | case QLISCSI_VND_GET_ACB: |
480 | return qla4xxx_bsg_get_acb(bsg_job); | 837 | return qla4xxx_bsg_get_acb(bsg_job); |
481 | 838 | ||
839 | case QLISCSI_VND_DIAG_TEST: | ||
840 | return qla4xxx_execute_diag_test(bsg_job); | ||
841 | |||
482 | default: | 842 | default: |
483 | ql4_printk(KERN_ERR, ha, "%s: invalid BSG vendor command: " | 843 | ql4_printk(KERN_ERR, ha, "%s: invalid BSG vendor command: " |
484 | "0x%x\n", __func__, bsg_req->msgcode); | 844 | "0x%x\n", __func__, bsg_req->msgcode); |
diff --git a/drivers/scsi/qla4xxx/ql4_bsg.h b/drivers/scsi/qla4xxx/ql4_bsg.h index c6a0364509fd..88c2401910c0 100644 --- a/drivers/scsi/qla4xxx/ql4_bsg.h +++ b/drivers/scsi/qla4xxx/ql4_bsg.h | |||
@@ -15,5 +15,18 @@ | |||
15 | #define QLISCSI_VND_UPDATE_NVRAM 5 | 15 | #define QLISCSI_VND_UPDATE_NVRAM 5 |
16 | #define QLISCSI_VND_RESTORE_DEFAULTS 6 | 16 | #define QLISCSI_VND_RESTORE_DEFAULTS 6 |
17 | #define QLISCSI_VND_GET_ACB 7 | 17 | #define QLISCSI_VND_GET_ACB 7 |
18 | #define QLISCSI_VND_DIAG_TEST 8 | ||
19 | |||
20 | /* QLISCSI_VND_DIAG_CMD sub code */ | ||
21 | #define QL_DIAG_CMD_TEST_DDR_SIZE 0x2 | ||
22 | #define QL_DIAG_CMD_TEST_DDR_RW 0x3 | ||
23 | #define QL_DIAG_CMD_TEST_ONCHIP_MEM_RW 0x4 | ||
24 | #define QL_DIAG_CMD_TEST_NVRAM 0x5 /* Only ISP4XXX */ | ||
25 | #define QL_DIAG_CMD_TEST_FLASH_ROM 0x6 | ||
26 | #define QL_DIAG_CMD_TEST_INT_LOOPBACK 0x7 | ||
27 | #define QL_DIAG_CMD_TEST_EXT_LOOPBACK 0x8 | ||
28 | #define QL_DIAG_CMD_TEST_DMA_XFER 0x9 /* Only ISP4XXX */ | ||
29 | #define QL_DIAG_CMD_SELF_DDR_RW 0xC | ||
30 | #define QL_DIAG_CMD_SELF_ONCHIP_MEM_RW 0xD | ||
18 | 31 | ||
19 | #endif | 32 | #endif |
diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h index 084d1fd59c9e..aa67bb9a4426 100644 --- a/drivers/scsi/qla4xxx/ql4_def.h +++ b/drivers/scsi/qla4xxx/ql4_def.h | |||
@@ -73,6 +73,7 @@ | |||
73 | 73 | ||
74 | #define QLA_SUCCESS 0 | 74 | #define QLA_SUCCESS 0 |
75 | #define QLA_ERROR 1 | 75 | #define QLA_ERROR 1 |
76 | #define STATUS(status) status == QLA_ERROR ? "FAILED" : "SUCCEEDED" | ||
76 | 77 | ||
77 | /* | 78 | /* |
78 | * Data bit definitions | 79 | * Data bit definitions |
@@ -179,6 +180,10 @@ | |||
179 | n &= ~v; \ | 180 | n &= ~v; \ |
180 | } | 181 | } |
181 | 182 | ||
183 | #define OP_STATE(o, f, p) { \ | ||
184 | p = (o & f) ? "enable" : "disable"; \ | ||
185 | } | ||
186 | |||
182 | /* | 187 | /* |
183 | * Retry & Timeout Values | 188 | * Retry & Timeout Values |
184 | */ | 189 | */ |
@@ -206,6 +211,8 @@ | |||
206 | #define MAX_RESET_HA_RETRIES 2 | 211 | #define MAX_RESET_HA_RETRIES 2 |
207 | #define FW_ALIVE_WAIT_TOV 3 | 212 | #define FW_ALIVE_WAIT_TOV 3 |
208 | #define IDC_EXTEND_TOV 8 | 213 | #define IDC_EXTEND_TOV 8 |
214 | #define IDC_COMP_TOV 5 | ||
215 | #define LINK_UP_COMP_TOV 30 | ||
209 | 216 | ||
210 | #define CMD_SP(Cmnd) ((Cmnd)->SCp.ptr) | 217 | #define CMD_SP(Cmnd) ((Cmnd)->SCp.ptr) |
211 | 218 | ||
@@ -476,6 +483,34 @@ struct ipaddress_config { | |||
476 | uint16_t eth_mtu_size; | 483 | uint16_t eth_mtu_size; |
477 | uint16_t ipv4_port; | 484 | uint16_t ipv4_port; |
478 | uint16_t ipv6_port; | 485 | uint16_t ipv6_port; |
486 | uint8_t control; | ||
487 | uint16_t ipv6_tcp_options; | ||
488 | uint8_t tcp_wsf; | ||
489 | uint8_t ipv6_tcp_wsf; | ||
490 | uint8_t ipv4_tos; | ||
491 | uint8_t ipv4_cache_id; | ||
492 | uint8_t ipv6_cache_id; | ||
493 | uint8_t ipv4_alt_cid_len; | ||
494 | uint8_t ipv4_alt_cid[11]; | ||
495 | uint8_t ipv4_vid_len; | ||
496 | uint8_t ipv4_vid[11]; | ||
497 | uint8_t ipv4_ttl; | ||
498 | uint16_t ipv6_flow_lbl; | ||
499 | uint8_t ipv6_traffic_class; | ||
500 | uint8_t ipv6_hop_limit; | ||
501 | uint32_t ipv6_nd_reach_time; | ||
502 | uint32_t ipv6_nd_rexmit_timer; | ||
503 | uint32_t ipv6_nd_stale_timeout; | ||
504 | uint8_t ipv6_dup_addr_detect_count; | ||
505 | uint32_t ipv6_gw_advrt_mtu; | ||
506 | uint16_t def_timeout; | ||
507 | uint8_t abort_timer; | ||
508 | uint16_t iscsi_options; | ||
509 | uint16_t iscsi_max_pdu_size; | ||
510 | uint16_t iscsi_first_burst_len; | ||
511 | uint16_t iscsi_max_outstnd_r2t; | ||
512 | uint16_t iscsi_max_burst_len; | ||
513 | uint8_t iscsi_name[224]; | ||
479 | }; | 514 | }; |
480 | 515 | ||
481 | #define QL4_CHAP_MAX_NAME_LEN 256 | 516 | #define QL4_CHAP_MAX_NAME_LEN 256 |
@@ -790,6 +825,11 @@ struct scsi_qla_host { | |||
790 | uint32_t pf_bit; | 825 | uint32_t pf_bit; |
791 | struct qla4_83xx_idc_information idc_info; | 826 | struct qla4_83xx_idc_information idc_info; |
792 | struct addr_ctrl_blk *saved_acb; | 827 | struct addr_ctrl_blk *saved_acb; |
828 | int notify_idc_comp; | ||
829 | int notify_link_up_comp; | ||
830 | int idc_extend_tmo; | ||
831 | struct completion idc_comp; | ||
832 | struct completion link_up_comp; | ||
793 | }; | 833 | }; |
794 | 834 | ||
795 | struct ql4_task_data { | 835 | struct ql4_task_data { |
diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h index 1243e5942b76..8d4092b33c07 100644 --- a/drivers/scsi/qla4xxx/ql4_fw.h +++ b/drivers/scsi/qla4xxx/ql4_fw.h | |||
@@ -410,6 +410,7 @@ struct qla_flt_region { | |||
410 | #define DDB_DS_LOGIN_IN_PROCESS 0x07 | 410 | #define DDB_DS_LOGIN_IN_PROCESS 0x07 |
411 | #define MBOX_CMD_GET_FW_STATE 0x0069 | 411 | #define MBOX_CMD_GET_FW_STATE 0x0069 |
412 | #define MBOX_CMD_GET_INIT_FW_CTRL_BLOCK_DEFAULTS 0x006A | 412 | #define MBOX_CMD_GET_INIT_FW_CTRL_BLOCK_DEFAULTS 0x006A |
413 | #define MBOX_CMD_DIAG_TEST 0x0075 | ||
413 | #define MBOX_CMD_GET_SYS_INFO 0x0078 | 414 | #define MBOX_CMD_GET_SYS_INFO 0x0078 |
414 | #define MBOX_CMD_GET_NVRAM 0x0078 /* For 40xx */ | 415 | #define MBOX_CMD_GET_NVRAM 0x0078 /* For 40xx */ |
415 | #define MBOX_CMD_SET_NVRAM 0x0079 /* For 40xx */ | 416 | #define MBOX_CMD_SET_NVRAM 0x0079 /* For 40xx */ |
@@ -425,8 +426,17 @@ struct qla_flt_region { | |||
425 | #define MBOX_CMD_GET_IP_ADDR_STATE 0x0091 | 426 | #define MBOX_CMD_GET_IP_ADDR_STATE 0x0091 |
426 | #define MBOX_CMD_SEND_IPV6_ROUTER_SOL 0x0092 | 427 | #define MBOX_CMD_SEND_IPV6_ROUTER_SOL 0x0092 |
427 | #define MBOX_CMD_GET_DB_ENTRY_CURRENT_IP_ADDR 0x0093 | 428 | #define MBOX_CMD_GET_DB_ENTRY_CURRENT_IP_ADDR 0x0093 |
429 | #define MBOX_CMD_SET_PORT_CONFIG 0x0122 | ||
430 | #define MBOX_CMD_GET_PORT_CONFIG 0x0123 | ||
431 | #define MBOX_CMD_SET_LED_CONFIG 0x0125 | ||
432 | #define MBOX_CMD_GET_LED_CONFIG 0x0126 | ||
428 | #define MBOX_CMD_MINIDUMP 0x0129 | 433 | #define MBOX_CMD_MINIDUMP 0x0129 |
429 | 434 | ||
435 | /* Port Config */ | ||
436 | #define ENABLE_INTERNAL_LOOPBACK 0x04 | ||
437 | #define ENABLE_EXTERNAL_LOOPBACK 0x08 | ||
438 | #define ENABLE_DCBX 0x10 | ||
439 | |||
430 | /* Minidump subcommand */ | 440 | /* Minidump subcommand */ |
431 | #define MINIDUMP_GET_SIZE_SUBCOMMAND 0x00 | 441 | #define MINIDUMP_GET_SIZE_SUBCOMMAND 0x00 |
432 | #define MINIDUMP_GET_TMPLT_SUBCOMMAND 0x01 | 442 | #define MINIDUMP_GET_TMPLT_SUBCOMMAND 0x01 |
@@ -535,10 +545,6 @@ struct qla_flt_region { | |||
535 | #define FLASH_OPT_COMMIT 2 | 545 | #define FLASH_OPT_COMMIT 2 |
536 | #define FLASH_OPT_RMW_COMMIT 3 | 546 | #define FLASH_OPT_RMW_COMMIT 3 |
537 | 547 | ||
538 | /* Loopback type */ | ||
539 | #define ENABLE_INTERNAL_LOOPBACK 0x04 | ||
540 | #define ENABLE_EXTERNAL_LOOPBACK 0x08 | ||
541 | |||
542 | /* generic defines to enable/disable params */ | 548 | /* generic defines to enable/disable params */ |
543 | #define QL4_PARAM_DISABLE 0 | 549 | #define QL4_PARAM_DISABLE 0 |
544 | #define QL4_PARAM_ENABLE 1 | 550 | #define QL4_PARAM_ENABLE 1 |
@@ -551,6 +557,7 @@ struct addr_ctrl_blk { | |||
551 | #define IFCB_VER_MIN 0x01 | 557 | #define IFCB_VER_MIN 0x01 |
552 | #define IFCB_VER_MAX 0x02 | 558 | #define IFCB_VER_MAX 0x02 |
553 | uint8_t control; /* 01 */ | 559 | uint8_t control; /* 01 */ |
560 | #define CTRLOPT_NEW_CONN_DISABLE 0x0002 | ||
554 | 561 | ||
555 | uint16_t fw_options; /* 02-03 */ | 562 | uint16_t fw_options; /* 02-03 */ |
556 | #define FWOPT_HEARTBEAT_ENABLE 0x1000 | 563 | #define FWOPT_HEARTBEAT_ENABLE 0x1000 |
@@ -582,11 +589,40 @@ struct addr_ctrl_blk { | |||
582 | uint32_t shdwreg_addr_hi; /* 2C-2F */ | 589 | uint32_t shdwreg_addr_hi; /* 2C-2F */ |
583 | 590 | ||
584 | uint16_t iscsi_opts; /* 30-31 */ | 591 | uint16_t iscsi_opts; /* 30-31 */ |
592 | #define ISCSIOPTS_HEADER_DIGEST_EN 0x2000 | ||
593 | #define ISCSIOPTS_DATA_DIGEST_EN 0x1000 | ||
594 | #define ISCSIOPTS_IMMEDIATE_DATA_EN 0x0800 | ||
595 | #define ISCSIOPTS_INITIAL_R2T_EN 0x0400 | ||
596 | #define ISCSIOPTS_DATA_SEQ_INORDER_EN 0x0200 | ||
597 | #define ISCSIOPTS_DATA_PDU_INORDER_EN 0x0100 | ||
598 | #define ISCSIOPTS_CHAP_AUTH_EN 0x0080 | ||
599 | #define ISCSIOPTS_SNACK_EN 0x0040 | ||
600 | #define ISCSIOPTS_DISCOVERY_LOGOUT_EN 0x0020 | ||
601 | #define ISCSIOPTS_BIDI_CHAP_EN 0x0010 | ||
602 | #define ISCSIOPTS_DISCOVERY_AUTH_EN 0x0008 | ||
603 | #define ISCSIOPTS_STRICT_LOGIN_COMP_EN 0x0004 | ||
604 | #define ISCSIOPTS_ERL 0x0003 | ||
585 | uint16_t ipv4_tcp_opts; /* 32-33 */ | 605 | uint16_t ipv4_tcp_opts; /* 32-33 */ |
606 | #define TCPOPT_DELAYED_ACK_DISABLE 0x8000 | ||
586 | #define TCPOPT_DHCP_ENABLE 0x0200 | 607 | #define TCPOPT_DHCP_ENABLE 0x0200 |
608 | #define TCPOPT_DNS_SERVER_IP_EN 0x0100 | ||
609 | #define TCPOPT_SLP_DA_INFO_EN 0x0080 | ||
610 | #define TCPOPT_NAGLE_ALGO_DISABLE 0x0020 | ||
611 | #define TCPOPT_WINDOW_SCALE_DISABLE 0x0010 | ||
612 | #define TCPOPT_TIMER_SCALE 0x000E | ||
613 | #define TCPOPT_TIMESTAMP_ENABLE 0x0001 | ||
587 | uint16_t ipv4_ip_opts; /* 34-35 */ | 614 | uint16_t ipv4_ip_opts; /* 34-35 */ |
588 | #define IPOPT_IPV4_PROTOCOL_ENABLE 0x8000 | 615 | #define IPOPT_IPV4_PROTOCOL_ENABLE 0x8000 |
616 | #define IPOPT_IPV4_TOS_EN 0x4000 | ||
589 | #define IPOPT_VLAN_TAGGING_ENABLE 0x2000 | 617 | #define IPOPT_VLAN_TAGGING_ENABLE 0x2000 |
618 | #define IPOPT_GRAT_ARP_EN 0x1000 | ||
619 | #define IPOPT_ALT_CID_EN 0x0800 | ||
620 | #define IPOPT_REQ_VID_EN 0x0400 | ||
621 | #define IPOPT_USE_VID_EN 0x0200 | ||
622 | #define IPOPT_LEARN_IQN_EN 0x0100 | ||
623 | #define IPOPT_FRAGMENTATION_DISABLE 0x0010 | ||
624 | #define IPOPT_IN_FORWARD_EN 0x0008 | ||
625 | #define IPOPT_ARP_REDIRECT_EN 0x0004 | ||
590 | 626 | ||
591 | uint16_t iscsi_max_pdu_size; /* 36-37 */ | 627 | uint16_t iscsi_max_pdu_size; /* 36-37 */ |
592 | uint8_t ipv4_tos; /* 38 */ | 628 | uint8_t ipv4_tos; /* 38 */ |
@@ -637,15 +673,24 @@ struct addr_ctrl_blk { | |||
637 | uint32_t cookie; /* 200-203 */ | 673 | uint32_t cookie; /* 200-203 */ |
638 | uint16_t ipv6_port; /* 204-205 */ | 674 | uint16_t ipv6_port; /* 204-205 */ |
639 | uint16_t ipv6_opts; /* 206-207 */ | 675 | uint16_t ipv6_opts; /* 206-207 */ |
640 | #define IPV6_OPT_IPV6_PROTOCOL_ENABLE 0x8000 | 676 | #define IPV6_OPT_IPV6_PROTOCOL_ENABLE 0x8000 |
641 | #define IPV6_OPT_VLAN_TAGGING_ENABLE 0x2000 | 677 | #define IPV6_OPT_VLAN_TAGGING_ENABLE 0x2000 |
678 | #define IPV6_OPT_GRAT_NEIGHBOR_ADV_EN 0x1000 | ||
679 | #define IPV6_OPT_REDIRECT_EN 0x0004 | ||
642 | 680 | ||
643 | uint16_t ipv6_addtl_opts; /* 208-209 */ | 681 | uint16_t ipv6_addtl_opts; /* 208-209 */ |
682 | #define IPV6_ADDOPT_IGNORE_ICMP_ECHO_REQ 0x0040 | ||
683 | #define IPV6_ADDOPT_MLD_EN 0x0004 | ||
644 | #define IPV6_ADDOPT_NEIGHBOR_DISCOVERY_ADDR_ENABLE 0x0002 /* Pri ACB | 684 | #define IPV6_ADDOPT_NEIGHBOR_DISCOVERY_ADDR_ENABLE 0x0002 /* Pri ACB |
645 | Only */ | 685 | Only */ |
646 | #define IPV6_ADDOPT_AUTOCONFIG_LINK_LOCAL_ADDR 0x0001 | 686 | #define IPV6_ADDOPT_AUTOCONFIG_LINK_LOCAL_ADDR 0x0001 |
647 | 687 | ||
648 | uint16_t ipv6_tcp_opts; /* 20A-20B */ | 688 | uint16_t ipv6_tcp_opts; /* 20A-20B */ |
689 | #define IPV6_TCPOPT_DELAYED_ACK_DISABLE 0x8000 | ||
690 | #define IPV6_TCPOPT_NAGLE_ALGO_DISABLE 0x0020 | ||
691 | #define IPV6_TCPOPT_WINDOW_SCALE_DISABLE 0x0010 | ||
692 | #define IPV6_TCPOPT_TIMER_SCALE 0x000E | ||
693 | #define IPV6_TCPOPT_TIMESTAMP_EN 0x0001 | ||
649 | uint8_t ipv6_tcp_wsf; /* 20C */ | 694 | uint8_t ipv6_tcp_wsf; /* 20C */ |
650 | uint16_t ipv6_flow_lbl; /* 20D-20F */ | 695 | uint16_t ipv6_flow_lbl; /* 20D-20F */ |
651 | uint8_t ipv6_dflt_rtr_addr[16]; /* 210-21F */ | 696 | uint8_t ipv6_dflt_rtr_addr[16]; /* 210-21F */ |
@@ -1252,7 +1297,88 @@ struct response { | |||
1252 | }; | 1297 | }; |
1253 | 1298 | ||
1254 | struct ql_iscsi_stats { | 1299 | struct ql_iscsi_stats { |
1255 | uint8_t reserved1[656]; /* 0000-028F */ | 1300 | uint64_t mac_tx_frames; /* 0000–0007 */ |
1301 | uint64_t mac_tx_bytes; /* 0008–000F */ | ||
1302 | uint64_t mac_tx_multicast_frames; /* 0010–0017 */ | ||
1303 | uint64_t mac_tx_broadcast_frames; /* 0018–001F */ | ||
1304 | uint64_t mac_tx_pause_frames; /* 0020–0027 */ | ||
1305 | uint64_t mac_tx_control_frames; /* 0028–002F */ | ||
1306 | uint64_t mac_tx_deferral; /* 0030–0037 */ | ||
1307 | uint64_t mac_tx_excess_deferral; /* 0038–003F */ | ||
1308 | uint64_t mac_tx_late_collision; /* 0040–0047 */ | ||
1309 | uint64_t mac_tx_abort; /* 0048–004F */ | ||
1310 | uint64_t mac_tx_single_collision; /* 0050–0057 */ | ||
1311 | uint64_t mac_tx_multiple_collision; /* 0058–005F */ | ||
1312 | uint64_t mac_tx_collision; /* 0060–0067 */ | ||
1313 | uint64_t mac_tx_frames_dropped; /* 0068–006F */ | ||
1314 | uint64_t mac_tx_jumbo_frames; /* 0070–0077 */ | ||
1315 | uint64_t mac_rx_frames; /* 0078–007F */ | ||
1316 | uint64_t mac_rx_bytes; /* 0080–0087 */ | ||
1317 | uint64_t mac_rx_unknown_control_frames; /* 0088–008F */ | ||
1318 | uint64_t mac_rx_pause_frames; /* 0090–0097 */ | ||
1319 | uint64_t mac_rx_control_frames; /* 0098–009F */ | ||
1320 | uint64_t mac_rx_dribble; /* 00A0–00A7 */ | ||
1321 | uint64_t mac_rx_frame_length_error; /* 00A8–00AF */ | ||
1322 | uint64_t mac_rx_jabber; /* 00B0–00B7 */ | ||
1323 | uint64_t mac_rx_carrier_sense_error; /* 00B8–00BF */ | ||
1324 | uint64_t mac_rx_frame_discarded; /* 00C0–00C7 */ | ||
1325 | uint64_t mac_rx_frames_dropped; /* 00C8–00CF */ | ||
1326 | uint64_t mac_crc_error; /* 00D0–00D7 */ | ||
1327 | uint64_t mac_encoding_error; /* 00D8–00DF */ | ||
1328 | uint64_t mac_rx_length_error_large; /* 00E0–00E7 */ | ||
1329 | uint64_t mac_rx_length_error_small; /* 00E8–00EF */ | ||
1330 | uint64_t mac_rx_multicast_frames; /* 00F0–00F7 */ | ||
1331 | uint64_t mac_rx_broadcast_frames; /* 00F8–00FF */ | ||
1332 | uint64_t ip_tx_packets; /* 0100–0107 */ | ||
1333 | uint64_t ip_tx_bytes; /* 0108–010F */ | ||
1334 | uint64_t ip_tx_fragments; /* 0110–0117 */ | ||
1335 | uint64_t ip_rx_packets; /* 0118–011F */ | ||
1336 | uint64_t ip_rx_bytes; /* 0120–0127 */ | ||
1337 | uint64_t ip_rx_fragments; /* 0128–012F */ | ||
1338 | uint64_t ip_datagram_reassembly; /* 0130–0137 */ | ||
1339 | uint64_t ip_invalid_address_error; /* 0138–013F */ | ||
1340 | uint64_t ip_error_packets; /* 0140–0147 */ | ||
1341 | uint64_t ip_fragrx_overlap; /* 0148–014F */ | ||
1342 | uint64_t ip_fragrx_outoforder; /* 0150–0157 */ | ||
1343 | uint64_t ip_datagram_reassembly_timeout; /* 0158–015F */ | ||
1344 | uint64_t ipv6_tx_packets; /* 0160–0167 */ | ||
1345 | uint64_t ipv6_tx_bytes; /* 0168–016F */ | ||
1346 | uint64_t ipv6_tx_fragments; /* 0170–0177 */ | ||
1347 | uint64_t ipv6_rx_packets; /* 0178–017F */ | ||
1348 | uint64_t ipv6_rx_bytes; /* 0180–0187 */ | ||
1349 | uint64_t ipv6_rx_fragments; /* 0188–018F */ | ||
1350 | uint64_t ipv6_datagram_reassembly; /* 0190–0197 */ | ||
1351 | uint64_t ipv6_invalid_address_error; /* 0198–019F */ | ||
1352 | uint64_t ipv6_error_packets; /* 01A0–01A7 */ | ||
1353 | uint64_t ipv6_fragrx_overlap; /* 01A8–01AF */ | ||
1354 | uint64_t ipv6_fragrx_outoforder; /* 01B0–01B7 */ | ||
1355 | uint64_t ipv6_datagram_reassembly_timeout; /* 01B8–01BF */ | ||
1356 | uint64_t tcp_tx_segments; /* 01C0–01C7 */ | ||
1357 | uint64_t tcp_tx_bytes; /* 01C8–01CF */ | ||
1358 | uint64_t tcp_rx_segments; /* 01D0–01D7 */ | ||
1359 | uint64_t tcp_rx_byte; /* 01D8–01DF */ | ||
1360 | uint64_t tcp_duplicate_ack_retx; /* 01E0–01E7 */ | ||
1361 | uint64_t tcp_retx_timer_expired; /* 01E8–01EF */ | ||
1362 | uint64_t tcp_rx_duplicate_ack; /* 01F0–01F7 */ | ||
1363 | uint64_t tcp_rx_pure_ackr; /* 01F8–01FF */ | ||
1364 | uint64_t tcp_tx_delayed_ack; /* 0200–0207 */ | ||
1365 | uint64_t tcp_tx_pure_ack; /* 0208–020F */ | ||
1366 | uint64_t tcp_rx_segment_error; /* 0210–0217 */ | ||
1367 | uint64_t tcp_rx_segment_outoforder; /* 0218–021F */ | ||
1368 | uint64_t tcp_rx_window_probe; /* 0220–0227 */ | ||
1369 | uint64_t tcp_rx_window_update; /* 0228–022F */ | ||
1370 | uint64_t tcp_tx_window_probe_persist; /* 0230–0237 */ | ||
1371 | uint64_t ecc_error_correction; /* 0238–023F */ | ||
1372 | uint64_t iscsi_pdu_tx; /* 0240-0247 */ | ||
1373 | uint64_t iscsi_data_bytes_tx; /* 0248-024F */ | ||
1374 | uint64_t iscsi_pdu_rx; /* 0250-0257 */ | ||
1375 | uint64_t iscsi_data_bytes_rx; /* 0258-025F */ | ||
1376 | uint64_t iscsi_io_completed; /* 0260-0267 */ | ||
1377 | uint64_t iscsi_unexpected_io_rx; /* 0268-026F */ | ||
1378 | uint64_t iscsi_format_error; /* 0270-0277 */ | ||
1379 | uint64_t iscsi_hdr_digest_error; /* 0278-027F */ | ||
1380 | uint64_t iscsi_data_digest_error; /* 0280-0287 */ | ||
1381 | uint64_t iscsi_sequence_error; /* 0288-028F */ | ||
1256 | uint32_t tx_cmd_pdu; /* 0290-0293 */ | 1382 | uint32_t tx_cmd_pdu; /* 0290-0293 */ |
1257 | uint32_t tx_resp_pdu; /* 0294-0297 */ | 1383 | uint32_t tx_resp_pdu; /* 0294-0297 */ |
1258 | uint32_t rx_cmd_pdu; /* 0298-029B */ | 1384 | uint32_t rx_cmd_pdu; /* 0298-029B */ |
diff --git a/drivers/scsi/qla4xxx/ql4_glbl.h b/drivers/scsi/qla4xxx/ql4_glbl.h index 5cef2527180a..d67c50e0b896 100644 --- a/drivers/scsi/qla4xxx/ql4_glbl.h +++ b/drivers/scsi/qla4xxx/ql4_glbl.h | |||
@@ -276,6 +276,9 @@ int qla4xxx_get_acb(struct scsi_qla_host *ha, dma_addr_t acb_dma, | |||
276 | int qla4_84xx_config_acb(struct scsi_qla_host *ha, int acb_config); | 276 | int qla4_84xx_config_acb(struct scsi_qla_host *ha, int acb_config); |
277 | int qla4_83xx_ms_mem_write_128b(struct scsi_qla_host *ha, | 277 | int qla4_83xx_ms_mem_write_128b(struct scsi_qla_host *ha, |
278 | uint64_t addr, uint32_t *data, uint32_t count); | 278 | uint64_t addr, uint32_t *data, uint32_t count); |
279 | uint8_t qla4xxx_set_ipaddr_state(uint8_t fw_ipaddr_state); | ||
280 | int qla4_83xx_get_port_config(struct scsi_qla_host *ha, uint32_t *config); | ||
281 | int qla4_83xx_set_port_config(struct scsi_qla_host *ha, uint32_t *config); | ||
279 | 282 | ||
280 | extern int ql4xextended_error_logging; | 283 | extern int ql4xextended_error_logging; |
281 | extern int ql4xdontresethba; | 284 | extern int ql4xdontresethba; |
diff --git a/drivers/scsi/qla4xxx/ql4_isr.c b/drivers/scsi/qla4xxx/ql4_isr.c index 7dff09f09b71..a3c8bc7706c2 100644 --- a/drivers/scsi/qla4xxx/ql4_isr.c +++ b/drivers/scsi/qla4xxx/ql4_isr.c | |||
@@ -606,6 +606,36 @@ static int qla4_83xx_loopback_in_progress(struct scsi_qla_host *ha) | |||
606 | return rval; | 606 | return rval; |
607 | } | 607 | } |
608 | 608 | ||
609 | static void qla4xxx_update_ipaddr_state(struct scsi_qla_host *ha, | ||
610 | uint32_t ipaddr_idx, | ||
611 | uint32_t ipaddr_fw_state) | ||
612 | { | ||
613 | uint8_t ipaddr_state; | ||
614 | uint8_t ip_idx; | ||
615 | |||
616 | ip_idx = ipaddr_idx & 0xF; | ||
617 | ipaddr_state = qla4xxx_set_ipaddr_state((uint8_t)ipaddr_fw_state); | ||
618 | |||
619 | switch (ip_idx) { | ||
620 | case 0: | ||
621 | ha->ip_config.ipv4_addr_state = ipaddr_state; | ||
622 | break; | ||
623 | case 1: | ||
624 | ha->ip_config.ipv6_link_local_state = ipaddr_state; | ||
625 | break; | ||
626 | case 2: | ||
627 | ha->ip_config.ipv6_addr0_state = ipaddr_state; | ||
628 | break; | ||
629 | case 3: | ||
630 | ha->ip_config.ipv6_addr1_state = ipaddr_state; | ||
631 | break; | ||
632 | default: | ||
633 | ql4_printk(KERN_INFO, ha, "%s: Invalid IPADDR index %d\n", | ||
634 | __func__, ip_idx); | ||
635 | } | ||
636 | } | ||
637 | |||
638 | |||
609 | /** | 639 | /** |
610 | * qla4xxx_isr_decode_mailbox - decodes mailbox status | 640 | * qla4xxx_isr_decode_mailbox - decodes mailbox status |
611 | * @ha: Pointer to host adapter structure. | 641 | * @ha: Pointer to host adapter structure. |
@@ -620,6 +650,7 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
620 | int i; | 650 | int i; |
621 | uint32_t mbox_sts[MBOX_AEN_REG_COUNT]; | 651 | uint32_t mbox_sts[MBOX_AEN_REG_COUNT]; |
622 | __le32 __iomem *mailbox_out; | 652 | __le32 __iomem *mailbox_out; |
653 | uint32_t opcode = 0; | ||
623 | 654 | ||
624 | if (is_qla8032(ha) || is_qla8042(ha)) | 655 | if (is_qla8032(ha) || is_qla8042(ha)) |
625 | mailbox_out = &ha->qla4_83xx_reg->mailbox_out[0]; | 656 | mailbox_out = &ha->qla4_83xx_reg->mailbox_out[0]; |
@@ -698,6 +729,11 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
698 | qla4xxx_post_aen_work(ha, ISCSI_EVENT_LINKUP, | 729 | qla4xxx_post_aen_work(ha, ISCSI_EVENT_LINKUP, |
699 | sizeof(mbox_sts), | 730 | sizeof(mbox_sts), |
700 | (uint8_t *) mbox_sts); | 731 | (uint8_t *) mbox_sts); |
732 | |||
733 | if ((is_qla8032(ha) || is_qla8042(ha)) && | ||
734 | ha->notify_link_up_comp) | ||
735 | complete(&ha->link_up_comp); | ||
736 | |||
701 | break; | 737 | break; |
702 | 738 | ||
703 | case MBOX_ASTS_LINK_DOWN: | 739 | case MBOX_ASTS_LINK_DOWN: |
@@ -741,6 +777,8 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
741 | "mbox_sts[3]=%04x\n", ha->host_no, mbox_sts[0], | 777 | "mbox_sts[3]=%04x\n", ha->host_no, mbox_sts[0], |
742 | mbox_sts[2], mbox_sts[3]); | 778 | mbox_sts[2], mbox_sts[3]); |
743 | 779 | ||
780 | qla4xxx_update_ipaddr_state(ha, mbox_sts[5], | ||
781 | mbox_sts[3]); | ||
744 | /* mbox_sts[2] = Old ACB state | 782 | /* mbox_sts[2] = Old ACB state |
745 | * mbox_sts[3] = new ACB state */ | 783 | * mbox_sts[3] = new ACB state */ |
746 | if ((mbox_sts[3] == ACB_STATE_VALID) && | 784 | if ((mbox_sts[3] == ACB_STATE_VALID) && |
@@ -841,8 +879,6 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
841 | break; | 879 | break; |
842 | 880 | ||
843 | case MBOX_ASTS_IDC_REQUEST_NOTIFICATION: | 881 | case MBOX_ASTS_IDC_REQUEST_NOTIFICATION: |
844 | { | ||
845 | uint32_t opcode; | ||
846 | if (is_qla8032(ha) || is_qla8042(ha)) { | 882 | if (is_qla8032(ha) || is_qla8042(ha)) { |
847 | DEBUG2(ql4_printk(KERN_INFO, ha, | 883 | DEBUG2(ql4_printk(KERN_INFO, ha, |
848 | "scsi%ld: AEN %04x, mbox_sts[1]=%08x, mbox_sts[2]=%08x, mbox_sts[3]=%08x, mbox_sts[4]=%08x\n", | 884 | "scsi%ld: AEN %04x, mbox_sts[1]=%08x, mbox_sts[2]=%08x, mbox_sts[3]=%08x, mbox_sts[4]=%08x\n", |
@@ -862,7 +898,6 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
862 | } | 898 | } |
863 | } | 899 | } |
864 | break; | 900 | break; |
865 | } | ||
866 | 901 | ||
867 | case MBOX_ASTS_IDC_COMPLETE: | 902 | case MBOX_ASTS_IDC_COMPLETE: |
868 | if (is_qla8032(ha) || is_qla8042(ha)) { | 903 | if (is_qla8032(ha) || is_qla8042(ha)) { |
@@ -875,6 +910,14 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
875 | "scsi:%ld: AEN %04x IDC Complete notification\n", | 910 | "scsi:%ld: AEN %04x IDC Complete notification\n", |
876 | ha->host_no, mbox_sts[0])); | 911 | ha->host_no, mbox_sts[0])); |
877 | 912 | ||
913 | opcode = mbox_sts[1] >> 16; | ||
914 | if (ha->notify_idc_comp) | ||
915 | complete(&ha->idc_comp); | ||
916 | |||
917 | if ((opcode == MBOX_CMD_SET_PORT_CONFIG) || | ||
918 | (opcode == MBOX_CMD_PORT_RESET)) | ||
919 | ha->idc_info.info2 = mbox_sts[3]; | ||
920 | |||
878 | if (qla4_83xx_loopback_in_progress(ha)) { | 921 | if (qla4_83xx_loopback_in_progress(ha)) { |
879 | set_bit(AF_LOOPBACK, &ha->flags); | 922 | set_bit(AF_LOOPBACK, &ha->flags); |
880 | } else { | 923 | } else { |
@@ -907,6 +950,8 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
907 | DEBUG2(ql4_printk(KERN_INFO, ha, | 950 | DEBUG2(ql4_printk(KERN_INFO, ha, |
908 | "scsi%ld: AEN %04x Received IDC Extend Timeout notification\n", | 951 | "scsi%ld: AEN %04x Received IDC Extend Timeout notification\n", |
909 | ha->host_no, mbox_sts[0])); | 952 | ha->host_no, mbox_sts[0])); |
953 | /* new IDC timeout */ | ||
954 | ha->idc_extend_tmo = mbox_sts[1]; | ||
910 | break; | 955 | break; |
911 | 956 | ||
912 | case MBOX_ASTS_INITIALIZATION_FAILED: | 957 | case MBOX_ASTS_INITIALIZATION_FAILED: |
diff --git a/drivers/scsi/qla4xxx/ql4_mbx.c b/drivers/scsi/qla4xxx/ql4_mbx.c index 22cbd005bdf4..9ae8ca3b69f9 100644 --- a/drivers/scsi/qla4xxx/ql4_mbx.c +++ b/drivers/scsi/qla4xxx/ql4_mbx.c | |||
@@ -418,6 +418,38 @@ qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd, | |||
418 | return QLA_SUCCESS; | 418 | return QLA_SUCCESS; |
419 | } | 419 | } |
420 | 420 | ||
421 | uint8_t qla4xxx_set_ipaddr_state(uint8_t fw_ipaddr_state) | ||
422 | { | ||
423 | uint8_t ipaddr_state; | ||
424 | |||
425 | switch (fw_ipaddr_state) { | ||
426 | case IP_ADDRSTATE_UNCONFIGURED: | ||
427 | ipaddr_state = ISCSI_IPDDRESS_STATE_UNCONFIGURED; | ||
428 | break; | ||
429 | case IP_ADDRSTATE_INVALID: | ||
430 | ipaddr_state = ISCSI_IPDDRESS_STATE_INVALID; | ||
431 | break; | ||
432 | case IP_ADDRSTATE_ACQUIRING: | ||
433 | ipaddr_state = ISCSI_IPDDRESS_STATE_ACQUIRING; | ||
434 | break; | ||
435 | case IP_ADDRSTATE_TENTATIVE: | ||
436 | ipaddr_state = ISCSI_IPDDRESS_STATE_TENTATIVE; | ||
437 | break; | ||
438 | case IP_ADDRSTATE_DEPRICATED: | ||
439 | ipaddr_state = ISCSI_IPDDRESS_STATE_DEPRECATED; | ||
440 | break; | ||
441 | case IP_ADDRSTATE_PREFERRED: | ||
442 | ipaddr_state = ISCSI_IPDDRESS_STATE_VALID; | ||
443 | break; | ||
444 | case IP_ADDRSTATE_DISABLING: | ||
445 | ipaddr_state = ISCSI_IPDDRESS_STATE_DISABLING; | ||
446 | break; | ||
447 | default: | ||
448 | ipaddr_state = ISCSI_IPDDRESS_STATE_UNCONFIGURED; | ||
449 | } | ||
450 | return ipaddr_state; | ||
451 | } | ||
452 | |||
421 | static void | 453 | static void |
422 | qla4xxx_update_local_ip(struct scsi_qla_host *ha, | 454 | qla4xxx_update_local_ip(struct scsi_qla_host *ha, |
423 | struct addr_ctrl_blk *init_fw_cb) | 455 | struct addr_ctrl_blk *init_fw_cb) |
@@ -425,7 +457,7 @@ qla4xxx_update_local_ip(struct scsi_qla_host *ha, | |||
425 | ha->ip_config.tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts); | 457 | ha->ip_config.tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts); |
426 | ha->ip_config.ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts); | 458 | ha->ip_config.ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts); |
427 | ha->ip_config.ipv4_addr_state = | 459 | ha->ip_config.ipv4_addr_state = |
428 | le16_to_cpu(init_fw_cb->ipv4_addr_state); | 460 | qla4xxx_set_ipaddr_state(init_fw_cb->ipv4_addr_state); |
429 | ha->ip_config.eth_mtu_size = | 461 | ha->ip_config.eth_mtu_size = |
430 | le16_to_cpu(init_fw_cb->eth_mtu_size); | 462 | le16_to_cpu(init_fw_cb->eth_mtu_size); |
431 | ha->ip_config.ipv4_port = le16_to_cpu(init_fw_cb->ipv4_port); | 463 | ha->ip_config.ipv4_port = le16_to_cpu(init_fw_cb->ipv4_port); |
@@ -434,6 +466,8 @@ qla4xxx_update_local_ip(struct scsi_qla_host *ha, | |||
434 | ha->ip_config.ipv6_options = le16_to_cpu(init_fw_cb->ipv6_opts); | 466 | ha->ip_config.ipv6_options = le16_to_cpu(init_fw_cb->ipv6_opts); |
435 | ha->ip_config.ipv6_addl_options = | 467 | ha->ip_config.ipv6_addl_options = |
436 | le16_to_cpu(init_fw_cb->ipv6_addtl_opts); | 468 | le16_to_cpu(init_fw_cb->ipv6_addtl_opts); |
469 | ha->ip_config.ipv6_tcp_options = | ||
470 | le16_to_cpu(init_fw_cb->ipv6_tcp_opts); | ||
437 | } | 471 | } |
438 | 472 | ||
439 | /* Save IPv4 Address Info */ | 473 | /* Save IPv4 Address Info */ |
@@ -448,17 +482,65 @@ qla4xxx_update_local_ip(struct scsi_qla_host *ha, | |||
448 | sizeof(init_fw_cb->ipv4_gw_addr))); | 482 | sizeof(init_fw_cb->ipv4_gw_addr))); |
449 | 483 | ||
450 | ha->ip_config.ipv4_vlan_tag = be16_to_cpu(init_fw_cb->ipv4_vlan_tag); | 484 | ha->ip_config.ipv4_vlan_tag = be16_to_cpu(init_fw_cb->ipv4_vlan_tag); |
485 | ha->ip_config.control = init_fw_cb->control; | ||
486 | ha->ip_config.tcp_wsf = init_fw_cb->ipv4_tcp_wsf; | ||
487 | ha->ip_config.ipv4_tos = init_fw_cb->ipv4_tos; | ||
488 | ha->ip_config.ipv4_cache_id = init_fw_cb->ipv4_cacheid; | ||
489 | ha->ip_config.ipv4_alt_cid_len = init_fw_cb->ipv4_dhcp_alt_cid_len; | ||
490 | memcpy(ha->ip_config.ipv4_alt_cid, init_fw_cb->ipv4_dhcp_alt_cid, | ||
491 | min(sizeof(ha->ip_config.ipv4_alt_cid), | ||
492 | sizeof(init_fw_cb->ipv4_dhcp_alt_cid))); | ||
493 | ha->ip_config.ipv4_vid_len = init_fw_cb->ipv4_dhcp_vid_len; | ||
494 | memcpy(ha->ip_config.ipv4_vid, init_fw_cb->ipv4_dhcp_vid, | ||
495 | min(sizeof(ha->ip_config.ipv4_vid), | ||
496 | sizeof(init_fw_cb->ipv4_dhcp_vid))); | ||
497 | ha->ip_config.ipv4_ttl = init_fw_cb->ipv4_ttl; | ||
498 | ha->ip_config.def_timeout = le16_to_cpu(init_fw_cb->def_timeout); | ||
499 | ha->ip_config.abort_timer = init_fw_cb->abort_timer; | ||
500 | ha->ip_config.iscsi_options = le16_to_cpu(init_fw_cb->iscsi_opts); | ||
501 | ha->ip_config.iscsi_max_pdu_size = | ||
502 | le16_to_cpu(init_fw_cb->iscsi_max_pdu_size); | ||
503 | ha->ip_config.iscsi_first_burst_len = | ||
504 | le16_to_cpu(init_fw_cb->iscsi_fburst_len); | ||
505 | ha->ip_config.iscsi_max_outstnd_r2t = | ||
506 | le16_to_cpu(init_fw_cb->iscsi_max_outstnd_r2t); | ||
507 | ha->ip_config.iscsi_max_burst_len = | ||
508 | le16_to_cpu(init_fw_cb->iscsi_max_burst_len); | ||
509 | memcpy(ha->ip_config.iscsi_name, init_fw_cb->iscsi_name, | ||
510 | min(sizeof(ha->ip_config.iscsi_name), | ||
511 | sizeof(init_fw_cb->iscsi_name))); | ||
451 | 512 | ||
452 | if (is_ipv6_enabled(ha)) { | 513 | if (is_ipv6_enabled(ha)) { |
453 | /* Save IPv6 Address */ | 514 | /* Save IPv6 Address */ |
454 | ha->ip_config.ipv6_link_local_state = | 515 | ha->ip_config.ipv6_link_local_state = |
455 | le16_to_cpu(init_fw_cb->ipv6_lnk_lcl_addr_state); | 516 | qla4xxx_set_ipaddr_state(init_fw_cb->ipv6_lnk_lcl_addr_state); |
456 | ha->ip_config.ipv6_addr0_state = | 517 | ha->ip_config.ipv6_addr0_state = |
457 | le16_to_cpu(init_fw_cb->ipv6_addr0_state); | 518 | qla4xxx_set_ipaddr_state(init_fw_cb->ipv6_addr0_state); |
458 | ha->ip_config.ipv6_addr1_state = | 519 | ha->ip_config.ipv6_addr1_state = |
459 | le16_to_cpu(init_fw_cb->ipv6_addr1_state); | 520 | qla4xxx_set_ipaddr_state(init_fw_cb->ipv6_addr1_state); |
460 | ha->ip_config.ipv6_default_router_state = | 521 | |
461 | le16_to_cpu(init_fw_cb->ipv6_dflt_rtr_state); | 522 | switch (le16_to_cpu(init_fw_cb->ipv6_dflt_rtr_state)) { |
523 | case IPV6_RTRSTATE_UNKNOWN: | ||
524 | ha->ip_config.ipv6_default_router_state = | ||
525 | ISCSI_ROUTER_STATE_UNKNOWN; | ||
526 | break; | ||
527 | case IPV6_RTRSTATE_MANUAL: | ||
528 | ha->ip_config.ipv6_default_router_state = | ||
529 | ISCSI_ROUTER_STATE_MANUAL; | ||
530 | break; | ||
531 | case IPV6_RTRSTATE_ADVERTISED: | ||
532 | ha->ip_config.ipv6_default_router_state = | ||
533 | ISCSI_ROUTER_STATE_ADVERTISED; | ||
534 | break; | ||
535 | case IPV6_RTRSTATE_STALE: | ||
536 | ha->ip_config.ipv6_default_router_state = | ||
537 | ISCSI_ROUTER_STATE_STALE; | ||
538 | break; | ||
539 | default: | ||
540 | ha->ip_config.ipv6_default_router_state = | ||
541 | ISCSI_ROUTER_STATE_UNKNOWN; | ||
542 | } | ||
543 | |||
462 | ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE; | 544 | ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE; |
463 | ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80; | 545 | ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80; |
464 | 546 | ||
@@ -479,6 +561,23 @@ qla4xxx_update_local_ip(struct scsi_qla_host *ha, | |||
479 | ha->ip_config.ipv6_vlan_tag = | 561 | ha->ip_config.ipv6_vlan_tag = |
480 | be16_to_cpu(init_fw_cb->ipv6_vlan_tag); | 562 | be16_to_cpu(init_fw_cb->ipv6_vlan_tag); |
481 | ha->ip_config.ipv6_port = le16_to_cpu(init_fw_cb->ipv6_port); | 563 | ha->ip_config.ipv6_port = le16_to_cpu(init_fw_cb->ipv6_port); |
564 | ha->ip_config.ipv6_cache_id = init_fw_cb->ipv6_cache_id; | ||
565 | ha->ip_config.ipv6_flow_lbl = | ||
566 | le16_to_cpu(init_fw_cb->ipv6_flow_lbl); | ||
567 | ha->ip_config.ipv6_traffic_class = | ||
568 | init_fw_cb->ipv6_traffic_class; | ||
569 | ha->ip_config.ipv6_hop_limit = init_fw_cb->ipv6_hop_limit; | ||
570 | ha->ip_config.ipv6_nd_reach_time = | ||
571 | le32_to_cpu(init_fw_cb->ipv6_nd_reach_time); | ||
572 | ha->ip_config.ipv6_nd_rexmit_timer = | ||
573 | le32_to_cpu(init_fw_cb->ipv6_nd_rexmit_timer); | ||
574 | ha->ip_config.ipv6_nd_stale_timeout = | ||
575 | le32_to_cpu(init_fw_cb->ipv6_nd_stale_timeout); | ||
576 | ha->ip_config.ipv6_dup_addr_detect_count = | ||
577 | init_fw_cb->ipv6_dup_addr_detect_count; | ||
578 | ha->ip_config.ipv6_gw_advrt_mtu = | ||
579 | le32_to_cpu(init_fw_cb->ipv6_gw_advrt_mtu); | ||
580 | ha->ip_config.ipv6_tcp_wsf = init_fw_cb->ipv6_tcp_wsf; | ||
482 | } | 581 | } |
483 | } | 582 | } |
484 | 583 | ||
@@ -2317,3 +2416,46 @@ exit_config_acb: | |||
2317 | rval == QLA_SUCCESS ? "SUCCEEDED" : "FAILED")); | 2416 | rval == QLA_SUCCESS ? "SUCCEEDED" : "FAILED")); |
2318 | return rval; | 2417 | return rval; |
2319 | } | 2418 | } |
2419 | |||
2420 | int qla4_83xx_get_port_config(struct scsi_qla_host *ha, uint32_t *config) | ||
2421 | { | ||
2422 | uint32_t mbox_cmd[MBOX_REG_COUNT]; | ||
2423 | uint32_t mbox_sts[MBOX_REG_COUNT]; | ||
2424 | int status; | ||
2425 | |||
2426 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); | ||
2427 | memset(&mbox_sts, 0, sizeof(mbox_sts)); | ||
2428 | |||
2429 | mbox_cmd[0] = MBOX_CMD_GET_PORT_CONFIG; | ||
2430 | |||
2431 | status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT, | ||
2432 | mbox_cmd, mbox_sts); | ||
2433 | if (status == QLA_SUCCESS) | ||
2434 | *config = mbox_sts[1]; | ||
2435 | else | ||
2436 | ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__, | ||
2437 | mbox_sts[0]); | ||
2438 | |||
2439 | return status; | ||
2440 | } | ||
2441 | |||
2442 | int qla4_83xx_set_port_config(struct scsi_qla_host *ha, uint32_t *config) | ||
2443 | { | ||
2444 | uint32_t mbox_cmd[MBOX_REG_COUNT]; | ||
2445 | uint32_t mbox_sts[MBOX_REG_COUNT]; | ||
2446 | int status; | ||
2447 | |||
2448 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); | ||
2449 | memset(&mbox_sts, 0, sizeof(mbox_sts)); | ||
2450 | |||
2451 | mbox_cmd[0] = MBOX_CMD_SET_PORT_CONFIG; | ||
2452 | mbox_cmd[1] = *config; | ||
2453 | |||
2454 | status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT, | ||
2455 | mbox_cmd, mbox_sts); | ||
2456 | if (status != QLA_SUCCESS) | ||
2457 | ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__, | ||
2458 | mbox_sts[0]); | ||
2459 | |||
2460 | return status; | ||
2461 | } | ||
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c index a28d5e624aab..c21adc338cf1 100644 --- a/drivers/scsi/qla4xxx/ql4_os.c +++ b/drivers/scsi/qla4xxx/ql4_os.c | |||
@@ -151,6 +151,7 @@ static int qla4xxx_get_chap_list(struct Scsi_Host *shost, uint16_t chap_tbl_idx, | |||
151 | static int qla4xxx_delete_chap(struct Scsi_Host *shost, uint16_t chap_tbl_idx); | 151 | static int qla4xxx_delete_chap(struct Scsi_Host *shost, uint16_t chap_tbl_idx); |
152 | static int qla4xxx_set_chap_entry(struct Scsi_Host *shost, void *data, | 152 | static int qla4xxx_set_chap_entry(struct Scsi_Host *shost, void *data, |
153 | int len); | 153 | int len); |
154 | static int qla4xxx_get_host_stats(struct Scsi_Host *shost, char *buf, int len); | ||
154 | 155 | ||
155 | /* | 156 | /* |
156 | * SCSI host template entry points | 157 | * SCSI host template entry points |
@@ -262,6 +263,7 @@ static struct iscsi_transport qla4xxx_iscsi_transport = { | |||
262 | .login_flashnode = qla4xxx_sysfs_ddb_login, | 263 | .login_flashnode = qla4xxx_sysfs_ddb_login, |
263 | .logout_flashnode = qla4xxx_sysfs_ddb_logout, | 264 | .logout_flashnode = qla4xxx_sysfs_ddb_logout, |
264 | .logout_flashnode_sid = qla4xxx_sysfs_ddb_logout_sid, | 265 | .logout_flashnode_sid = qla4xxx_sysfs_ddb_logout_sid, |
266 | .get_host_stats = qla4xxx_get_host_stats, | ||
265 | }; | 267 | }; |
266 | 268 | ||
267 | static struct scsi_transport_template *qla4xxx_scsi_transport; | 269 | static struct scsi_transport_template *qla4xxx_scsi_transport; |
@@ -419,6 +421,7 @@ static umode_t qla4_attr_is_visible(int param_type, int param) | |||
419 | case ISCSI_PARAM_EXP_STATSN: | 421 | case ISCSI_PARAM_EXP_STATSN: |
420 | case ISCSI_PARAM_DISCOVERY_PARENT_IDX: | 422 | case ISCSI_PARAM_DISCOVERY_PARENT_IDX: |
421 | case ISCSI_PARAM_DISCOVERY_PARENT_TYPE: | 423 | case ISCSI_PARAM_DISCOVERY_PARENT_TYPE: |
424 | case ISCSI_PARAM_LOCAL_IPADDR: | ||
422 | return S_IRUGO; | 425 | return S_IRUGO; |
423 | default: | 426 | default: |
424 | return 0; | 427 | return 0; |
@@ -440,6 +443,65 @@ static umode_t qla4_attr_is_visible(int param_type, int param) | |||
440 | case ISCSI_NET_PARAM_VLAN_ENABLED: | 443 | case ISCSI_NET_PARAM_VLAN_ENABLED: |
441 | case ISCSI_NET_PARAM_MTU: | 444 | case ISCSI_NET_PARAM_MTU: |
442 | case ISCSI_NET_PARAM_PORT: | 445 | case ISCSI_NET_PARAM_PORT: |
446 | case ISCSI_NET_PARAM_IPADDR_STATE: | ||
447 | case ISCSI_NET_PARAM_IPV6_LINKLOCAL_STATE: | ||
448 | case ISCSI_NET_PARAM_IPV6_ROUTER_STATE: | ||
449 | case ISCSI_NET_PARAM_DELAYED_ACK_EN: | ||
450 | case ISCSI_NET_PARAM_TCP_NAGLE_DISABLE: | ||
451 | case ISCSI_NET_PARAM_TCP_WSF_DISABLE: | ||
452 | case ISCSI_NET_PARAM_TCP_WSF: | ||
453 | case ISCSI_NET_PARAM_TCP_TIMER_SCALE: | ||
454 | case ISCSI_NET_PARAM_TCP_TIMESTAMP_EN: | ||
455 | case ISCSI_NET_PARAM_CACHE_ID: | ||
456 | case ISCSI_NET_PARAM_IPV4_DHCP_DNS_ADDR_EN: | ||
457 | case ISCSI_NET_PARAM_IPV4_DHCP_SLP_DA_EN: | ||
458 | case ISCSI_NET_PARAM_IPV4_TOS_EN: | ||
459 | case ISCSI_NET_PARAM_IPV4_TOS: | ||
460 | case ISCSI_NET_PARAM_IPV4_GRAT_ARP_EN: | ||
461 | case ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID_EN: | ||
462 | case ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID: | ||
463 | case ISCSI_NET_PARAM_IPV4_DHCP_REQ_VENDOR_ID_EN: | ||
464 | case ISCSI_NET_PARAM_IPV4_DHCP_USE_VENDOR_ID_EN: | ||
465 | case ISCSI_NET_PARAM_IPV4_DHCP_VENDOR_ID: | ||
466 | case ISCSI_NET_PARAM_IPV4_DHCP_LEARN_IQN_EN: | ||
467 | case ISCSI_NET_PARAM_IPV4_FRAGMENT_DISABLE: | ||
468 | case ISCSI_NET_PARAM_IPV4_IN_FORWARD_EN: | ||
469 | case ISCSI_NET_PARAM_REDIRECT_EN: | ||
470 | case ISCSI_NET_PARAM_IPV4_TTL: | ||
471 | case ISCSI_NET_PARAM_IPV6_GRAT_NEIGHBOR_ADV_EN: | ||
472 | case ISCSI_NET_PARAM_IPV6_MLD_EN: | ||
473 | case ISCSI_NET_PARAM_IPV6_FLOW_LABEL: | ||
474 | case ISCSI_NET_PARAM_IPV6_TRAFFIC_CLASS: | ||
475 | case ISCSI_NET_PARAM_IPV6_HOP_LIMIT: | ||
476 | case ISCSI_NET_PARAM_IPV6_ND_REACHABLE_TMO: | ||
477 | case ISCSI_NET_PARAM_IPV6_ND_REXMIT_TIME: | ||
478 | case ISCSI_NET_PARAM_IPV6_ND_STALE_TMO: | ||
479 | case ISCSI_NET_PARAM_IPV6_DUP_ADDR_DETECT_CNT: | ||
480 | case ISCSI_NET_PARAM_IPV6_RTR_ADV_LINK_MTU: | ||
481 | return S_IRUGO; | ||
482 | default: | ||
483 | return 0; | ||
484 | } | ||
485 | case ISCSI_IFACE_PARAM: | ||
486 | switch (param) { | ||
487 | case ISCSI_IFACE_PARAM_DEF_TASKMGMT_TMO: | ||
488 | case ISCSI_IFACE_PARAM_HDRDGST_EN: | ||
489 | case ISCSI_IFACE_PARAM_DATADGST_EN: | ||
490 | case ISCSI_IFACE_PARAM_IMM_DATA_EN: | ||
491 | case ISCSI_IFACE_PARAM_INITIAL_R2T_EN: | ||
492 | case ISCSI_IFACE_PARAM_DATASEQ_INORDER_EN: | ||
493 | case ISCSI_IFACE_PARAM_PDU_INORDER_EN: | ||
494 | case ISCSI_IFACE_PARAM_ERL: | ||
495 | case ISCSI_IFACE_PARAM_MAX_RECV_DLENGTH: | ||
496 | case ISCSI_IFACE_PARAM_FIRST_BURST: | ||
497 | case ISCSI_IFACE_PARAM_MAX_R2T: | ||
498 | case ISCSI_IFACE_PARAM_MAX_BURST: | ||
499 | case ISCSI_IFACE_PARAM_CHAP_AUTH_EN: | ||
500 | case ISCSI_IFACE_PARAM_BIDI_CHAP_EN: | ||
501 | case ISCSI_IFACE_PARAM_DISCOVERY_AUTH_OPTIONAL: | ||
502 | case ISCSI_IFACE_PARAM_DISCOVERY_LOGOUT_EN: | ||
503 | case ISCSI_IFACE_PARAM_STRICT_LOGIN_COMP_EN: | ||
504 | case ISCSI_IFACE_PARAM_INITIATOR_NAME: | ||
443 | return S_IRUGO; | 505 | return S_IRUGO; |
444 | default: | 506 | default: |
445 | return 0; | 507 | return 0; |
@@ -511,6 +573,65 @@ static umode_t qla4_attr_is_visible(int param_type, int param) | |||
511 | return 0; | 573 | return 0; |
512 | } | 574 | } |
513 | 575 | ||
576 | /** | ||
577 | * qla4xxx_create chap_list - Create CHAP list from FLASH | ||
578 | * @ha: pointer to adapter structure | ||
579 | * | ||
580 | * Read flash and make a list of CHAP entries, during login when a CHAP entry | ||
581 | * is received, it will be checked in this list. If entry exist then the CHAP | ||
582 | * entry index is set in the DDB. If CHAP entry does not exist in this list | ||
583 | * then a new entry is added in FLASH in CHAP table and the index obtained is | ||
584 | * used in the DDB. | ||
585 | **/ | ||
586 | static void qla4xxx_create_chap_list(struct scsi_qla_host *ha) | ||
587 | { | ||
588 | int rval = 0; | ||
589 | uint8_t *chap_flash_data = NULL; | ||
590 | uint32_t offset; | ||
591 | dma_addr_t chap_dma; | ||
592 | uint32_t chap_size = 0; | ||
593 | |||
594 | if (is_qla40XX(ha)) | ||
595 | chap_size = MAX_CHAP_ENTRIES_40XX * | ||
596 | sizeof(struct ql4_chap_table); | ||
597 | else /* Single region contains CHAP info for both | ||
598 | * ports which is divided into half for each port. | ||
599 | */ | ||
600 | chap_size = ha->hw.flt_chap_size / 2; | ||
601 | |||
602 | chap_flash_data = dma_alloc_coherent(&ha->pdev->dev, chap_size, | ||
603 | &chap_dma, GFP_KERNEL); | ||
604 | if (!chap_flash_data) { | ||
605 | ql4_printk(KERN_ERR, ha, "No memory for chap_flash_data\n"); | ||
606 | return; | ||
607 | } | ||
608 | |||
609 | if (is_qla40XX(ha)) { | ||
610 | offset = FLASH_CHAP_OFFSET; | ||
611 | } else { | ||
612 | offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2); | ||
613 | if (ha->port_num == 1) | ||
614 | offset += chap_size; | ||
615 | } | ||
616 | |||
617 | rval = qla4xxx_get_flash(ha, chap_dma, offset, chap_size); | ||
618 | if (rval != QLA_SUCCESS) | ||
619 | goto exit_chap_list; | ||
620 | |||
621 | if (ha->chap_list == NULL) | ||
622 | ha->chap_list = vmalloc(chap_size); | ||
623 | if (ha->chap_list == NULL) { | ||
624 | ql4_printk(KERN_ERR, ha, "No memory for ha->chap_list\n"); | ||
625 | goto exit_chap_list; | ||
626 | } | ||
627 | |||
628 | memset(ha->chap_list, 0, chap_size); | ||
629 | memcpy(ha->chap_list, chap_flash_data, chap_size); | ||
630 | |||
631 | exit_chap_list: | ||
632 | dma_free_coherent(&ha->pdev->dev, chap_size, chap_flash_data, chap_dma); | ||
633 | } | ||
634 | |||
514 | static int qla4xxx_get_chap_by_index(struct scsi_qla_host *ha, | 635 | static int qla4xxx_get_chap_by_index(struct scsi_qla_host *ha, |
515 | int16_t chap_index, | 636 | int16_t chap_index, |
516 | struct ql4_chap_table **chap_entry) | 637 | struct ql4_chap_table **chap_entry) |
@@ -624,6 +745,8 @@ static int qla4xxx_get_chap_list(struct Scsi_Host *shost, uint16_t chap_tbl_idx, | |||
624 | goto exit_get_chap_list; | 745 | goto exit_get_chap_list; |
625 | } | 746 | } |
626 | 747 | ||
748 | qla4xxx_create_chap_list(ha); | ||
749 | |||
627 | chap_rec = (struct iscsi_chap_rec *) buf; | 750 | chap_rec = (struct iscsi_chap_rec *) buf; |
628 | mutex_lock(&ha->chap_sem); | 751 | mutex_lock(&ha->chap_sem); |
629 | for (i = chap_tbl_idx; i < max_chap_entries; i++) { | 752 | for (i = chap_tbl_idx; i < max_chap_entries; i++) { |
@@ -802,6 +925,7 @@ static int qla4xxx_set_chap_entry(struct Scsi_Host *shost, void *data, int len) | |||
802 | int type; | 925 | int type; |
803 | int rem = len; | 926 | int rem = len; |
804 | int rc = 0; | 927 | int rc = 0; |
928 | int size; | ||
805 | 929 | ||
806 | memset(&chap_rec, 0, sizeof(chap_rec)); | 930 | memset(&chap_rec, 0, sizeof(chap_rec)); |
807 | 931 | ||
@@ -816,12 +940,14 @@ static int qla4xxx_set_chap_entry(struct Scsi_Host *shost, void *data, int len) | |||
816 | chap_rec.chap_type = param_info->value[0]; | 940 | chap_rec.chap_type = param_info->value[0]; |
817 | break; | 941 | break; |
818 | case ISCSI_CHAP_PARAM_USERNAME: | 942 | case ISCSI_CHAP_PARAM_USERNAME: |
819 | memcpy(chap_rec.username, param_info->value, | 943 | size = min_t(size_t, sizeof(chap_rec.username), |
820 | param_info->len); | 944 | param_info->len); |
945 | memcpy(chap_rec.username, param_info->value, size); | ||
821 | break; | 946 | break; |
822 | case ISCSI_CHAP_PARAM_PASSWORD: | 947 | case ISCSI_CHAP_PARAM_PASSWORD: |
823 | memcpy(chap_rec.password, param_info->value, | 948 | size = min_t(size_t, sizeof(chap_rec.password), |
824 | param_info->len); | 949 | param_info->len); |
950 | memcpy(chap_rec.password, param_info->value, size); | ||
825 | break; | 951 | break; |
826 | case ISCSI_CHAP_PARAM_PASSWORD_LEN: | 952 | case ISCSI_CHAP_PARAM_PASSWORD_LEN: |
827 | chap_rec.password_length = param_info->value[0]; | 953 | chap_rec.password_length = param_info->value[0]; |
@@ -888,113 +1014,646 @@ exit_set_chap: | |||
888 | return rc; | 1014 | return rc; |
889 | } | 1015 | } |
890 | 1016 | ||
1017 | |||
1018 | static int qla4xxx_get_host_stats(struct Scsi_Host *shost, char *buf, int len) | ||
1019 | { | ||
1020 | struct scsi_qla_host *ha = to_qla_host(shost); | ||
1021 | struct iscsi_offload_host_stats *host_stats = NULL; | ||
1022 | int host_stats_size; | ||
1023 | int ret = 0; | ||
1024 | int ddb_idx = 0; | ||
1025 | struct ql_iscsi_stats *ql_iscsi_stats = NULL; | ||
1026 | int stats_size; | ||
1027 | dma_addr_t iscsi_stats_dma; | ||
1028 | |||
1029 | DEBUG2(ql4_printk(KERN_INFO, ha, "Func: %s\n", __func__)); | ||
1030 | |||
1031 | host_stats_size = sizeof(struct iscsi_offload_host_stats); | ||
1032 | |||
1033 | if (host_stats_size != len) { | ||
1034 | ql4_printk(KERN_INFO, ha, "%s: host_stats size mismatch expected = %d, is = %d\n", | ||
1035 | __func__, len, host_stats_size); | ||
1036 | ret = -EINVAL; | ||
1037 | goto exit_host_stats; | ||
1038 | } | ||
1039 | host_stats = (struct iscsi_offload_host_stats *)buf; | ||
1040 | |||
1041 | if (!buf) { | ||
1042 | ret = -ENOMEM; | ||
1043 | goto exit_host_stats; | ||
1044 | } | ||
1045 | |||
1046 | stats_size = PAGE_ALIGN(sizeof(struct ql_iscsi_stats)); | ||
1047 | |||
1048 | ql_iscsi_stats = dma_alloc_coherent(&ha->pdev->dev, stats_size, | ||
1049 | &iscsi_stats_dma, GFP_KERNEL); | ||
1050 | if (!ql_iscsi_stats) { | ||
1051 | ql4_printk(KERN_ERR, ha, | ||
1052 | "Unable to allocate memory for iscsi stats\n"); | ||
1053 | goto exit_host_stats; | ||
1054 | } | ||
1055 | |||
1056 | ret = qla4xxx_get_mgmt_data(ha, ddb_idx, stats_size, | ||
1057 | iscsi_stats_dma); | ||
1058 | if (ret != QLA_SUCCESS) { | ||
1059 | ql4_printk(KERN_ERR, ha, | ||
1060 | "Unable to retrieve iscsi stats\n"); | ||
1061 | goto exit_host_stats; | ||
1062 | } | ||
1063 | host_stats->mactx_frames = le64_to_cpu(ql_iscsi_stats->mac_tx_frames); | ||
1064 | host_stats->mactx_bytes = le64_to_cpu(ql_iscsi_stats->mac_tx_bytes); | ||
1065 | host_stats->mactx_multicast_frames = | ||
1066 | le64_to_cpu(ql_iscsi_stats->mac_tx_multicast_frames); | ||
1067 | host_stats->mactx_broadcast_frames = | ||
1068 | le64_to_cpu(ql_iscsi_stats->mac_tx_broadcast_frames); | ||
1069 | host_stats->mactx_pause_frames = | ||
1070 | le64_to_cpu(ql_iscsi_stats->mac_tx_pause_frames); | ||
1071 | host_stats->mactx_control_frames = | ||
1072 | le64_to_cpu(ql_iscsi_stats->mac_tx_control_frames); | ||
1073 | host_stats->mactx_deferral = | ||
1074 | le64_to_cpu(ql_iscsi_stats->mac_tx_deferral); | ||
1075 | host_stats->mactx_excess_deferral = | ||
1076 | le64_to_cpu(ql_iscsi_stats->mac_tx_excess_deferral); | ||
1077 | host_stats->mactx_late_collision = | ||
1078 | le64_to_cpu(ql_iscsi_stats->mac_tx_late_collision); | ||
1079 | host_stats->mactx_abort = le64_to_cpu(ql_iscsi_stats->mac_tx_abort); | ||
1080 | host_stats->mactx_single_collision = | ||
1081 | le64_to_cpu(ql_iscsi_stats->mac_tx_single_collision); | ||
1082 | host_stats->mactx_multiple_collision = | ||
1083 | le64_to_cpu(ql_iscsi_stats->mac_tx_multiple_collision); | ||
1084 | host_stats->mactx_collision = | ||
1085 | le64_to_cpu(ql_iscsi_stats->mac_tx_collision); | ||
1086 | host_stats->mactx_frames_dropped = | ||
1087 | le64_to_cpu(ql_iscsi_stats->mac_tx_frames_dropped); | ||
1088 | host_stats->mactx_jumbo_frames = | ||
1089 | le64_to_cpu(ql_iscsi_stats->mac_tx_jumbo_frames); | ||
1090 | host_stats->macrx_frames = le64_to_cpu(ql_iscsi_stats->mac_rx_frames); | ||
1091 | host_stats->macrx_bytes = le64_to_cpu(ql_iscsi_stats->mac_rx_bytes); | ||
1092 | host_stats->macrx_unknown_control_frames = | ||
1093 | le64_to_cpu(ql_iscsi_stats->mac_rx_unknown_control_frames); | ||
1094 | host_stats->macrx_pause_frames = | ||
1095 | le64_to_cpu(ql_iscsi_stats->mac_rx_pause_frames); | ||
1096 | host_stats->macrx_control_frames = | ||
1097 | le64_to_cpu(ql_iscsi_stats->mac_rx_control_frames); | ||
1098 | host_stats->macrx_dribble = | ||
1099 | le64_to_cpu(ql_iscsi_stats->mac_rx_dribble); | ||
1100 | host_stats->macrx_frame_length_error = | ||
1101 | le64_to_cpu(ql_iscsi_stats->mac_rx_frame_length_error); | ||
1102 | host_stats->macrx_jabber = le64_to_cpu(ql_iscsi_stats->mac_rx_jabber); | ||
1103 | host_stats->macrx_carrier_sense_error = | ||
1104 | le64_to_cpu(ql_iscsi_stats->mac_rx_carrier_sense_error); | ||
1105 | host_stats->macrx_frame_discarded = | ||
1106 | le64_to_cpu(ql_iscsi_stats->mac_rx_frame_discarded); | ||
1107 | host_stats->macrx_frames_dropped = | ||
1108 | le64_to_cpu(ql_iscsi_stats->mac_rx_frames_dropped); | ||
1109 | host_stats->mac_crc_error = le64_to_cpu(ql_iscsi_stats->mac_crc_error); | ||
1110 | host_stats->mac_encoding_error = | ||
1111 | le64_to_cpu(ql_iscsi_stats->mac_encoding_error); | ||
1112 | host_stats->macrx_length_error_large = | ||
1113 | le64_to_cpu(ql_iscsi_stats->mac_rx_length_error_large); | ||
1114 | host_stats->macrx_length_error_small = | ||
1115 | le64_to_cpu(ql_iscsi_stats->mac_rx_length_error_small); | ||
1116 | host_stats->macrx_multicast_frames = | ||
1117 | le64_to_cpu(ql_iscsi_stats->mac_rx_multicast_frames); | ||
1118 | host_stats->macrx_broadcast_frames = | ||
1119 | le64_to_cpu(ql_iscsi_stats->mac_rx_broadcast_frames); | ||
1120 | host_stats->iptx_packets = le64_to_cpu(ql_iscsi_stats->ip_tx_packets); | ||
1121 | host_stats->iptx_bytes = le64_to_cpu(ql_iscsi_stats->ip_tx_bytes); | ||
1122 | host_stats->iptx_fragments = | ||
1123 | le64_to_cpu(ql_iscsi_stats->ip_tx_fragments); | ||
1124 | host_stats->iprx_packets = le64_to_cpu(ql_iscsi_stats->ip_rx_packets); | ||
1125 | host_stats->iprx_bytes = le64_to_cpu(ql_iscsi_stats->ip_rx_bytes); | ||
1126 | host_stats->iprx_fragments = | ||
1127 | le64_to_cpu(ql_iscsi_stats->ip_rx_fragments); | ||
1128 | host_stats->ip_datagram_reassembly = | ||
1129 | le64_to_cpu(ql_iscsi_stats->ip_datagram_reassembly); | ||
1130 | host_stats->ip_invalid_address_error = | ||
1131 | le64_to_cpu(ql_iscsi_stats->ip_invalid_address_error); | ||
1132 | host_stats->ip_error_packets = | ||
1133 | le64_to_cpu(ql_iscsi_stats->ip_error_packets); | ||
1134 | host_stats->ip_fragrx_overlap = | ||
1135 | le64_to_cpu(ql_iscsi_stats->ip_fragrx_overlap); | ||
1136 | host_stats->ip_fragrx_outoforder = | ||
1137 | le64_to_cpu(ql_iscsi_stats->ip_fragrx_outoforder); | ||
1138 | host_stats->ip_datagram_reassembly_timeout = | ||
1139 | le64_to_cpu(ql_iscsi_stats->ip_datagram_reassembly_timeout); | ||
1140 | host_stats->ipv6tx_packets = | ||
1141 | le64_to_cpu(ql_iscsi_stats->ipv6_tx_packets); | ||
1142 | host_stats->ipv6tx_bytes = le64_to_cpu(ql_iscsi_stats->ipv6_tx_bytes); | ||
1143 | host_stats->ipv6tx_fragments = | ||
1144 | le64_to_cpu(ql_iscsi_stats->ipv6_tx_fragments); | ||
1145 | host_stats->ipv6rx_packets = | ||
1146 | le64_to_cpu(ql_iscsi_stats->ipv6_rx_packets); | ||
1147 | host_stats->ipv6rx_bytes = le64_to_cpu(ql_iscsi_stats->ipv6_rx_bytes); | ||
1148 | host_stats->ipv6rx_fragments = | ||
1149 | le64_to_cpu(ql_iscsi_stats->ipv6_rx_fragments); | ||
1150 | host_stats->ipv6_datagram_reassembly = | ||
1151 | le64_to_cpu(ql_iscsi_stats->ipv6_datagram_reassembly); | ||
1152 | host_stats->ipv6_invalid_address_error = | ||
1153 | le64_to_cpu(ql_iscsi_stats->ipv6_invalid_address_error); | ||
1154 | host_stats->ipv6_error_packets = | ||
1155 | le64_to_cpu(ql_iscsi_stats->ipv6_error_packets); | ||
1156 | host_stats->ipv6_fragrx_overlap = | ||
1157 | le64_to_cpu(ql_iscsi_stats->ipv6_fragrx_overlap); | ||
1158 | host_stats->ipv6_fragrx_outoforder = | ||
1159 | le64_to_cpu(ql_iscsi_stats->ipv6_fragrx_outoforder); | ||
1160 | host_stats->ipv6_datagram_reassembly_timeout = | ||
1161 | le64_to_cpu(ql_iscsi_stats->ipv6_datagram_reassembly_timeout); | ||
1162 | host_stats->tcptx_segments = | ||
1163 | le64_to_cpu(ql_iscsi_stats->tcp_tx_segments); | ||
1164 | host_stats->tcptx_bytes = le64_to_cpu(ql_iscsi_stats->tcp_tx_bytes); | ||
1165 | host_stats->tcprx_segments = | ||
1166 | le64_to_cpu(ql_iscsi_stats->tcp_rx_segments); | ||
1167 | host_stats->tcprx_byte = le64_to_cpu(ql_iscsi_stats->tcp_rx_byte); | ||
1168 | host_stats->tcp_duplicate_ack_retx = | ||
1169 | le64_to_cpu(ql_iscsi_stats->tcp_duplicate_ack_retx); | ||
1170 | host_stats->tcp_retx_timer_expired = | ||
1171 | le64_to_cpu(ql_iscsi_stats->tcp_retx_timer_expired); | ||
1172 | host_stats->tcprx_duplicate_ack = | ||
1173 | le64_to_cpu(ql_iscsi_stats->tcp_rx_duplicate_ack); | ||
1174 | host_stats->tcprx_pure_ackr = | ||
1175 | le64_to_cpu(ql_iscsi_stats->tcp_rx_pure_ackr); | ||
1176 | host_stats->tcptx_delayed_ack = | ||
1177 | le64_to_cpu(ql_iscsi_stats->tcp_tx_delayed_ack); | ||
1178 | host_stats->tcptx_pure_ack = | ||
1179 | le64_to_cpu(ql_iscsi_stats->tcp_tx_pure_ack); | ||
1180 | host_stats->tcprx_segment_error = | ||
1181 | le64_to_cpu(ql_iscsi_stats->tcp_rx_segment_error); | ||
1182 | host_stats->tcprx_segment_outoforder = | ||
1183 | le64_to_cpu(ql_iscsi_stats->tcp_rx_segment_outoforder); | ||
1184 | host_stats->tcprx_window_probe = | ||
1185 | le64_to_cpu(ql_iscsi_stats->tcp_rx_window_probe); | ||
1186 | host_stats->tcprx_window_update = | ||
1187 | le64_to_cpu(ql_iscsi_stats->tcp_rx_window_update); | ||
1188 | host_stats->tcptx_window_probe_persist = | ||
1189 | le64_to_cpu(ql_iscsi_stats->tcp_tx_window_probe_persist); | ||
1190 | host_stats->ecc_error_correction = | ||
1191 | le64_to_cpu(ql_iscsi_stats->ecc_error_correction); | ||
1192 | host_stats->iscsi_pdu_tx = le64_to_cpu(ql_iscsi_stats->iscsi_pdu_tx); | ||
1193 | host_stats->iscsi_data_bytes_tx = | ||
1194 | le64_to_cpu(ql_iscsi_stats->iscsi_data_bytes_tx); | ||
1195 | host_stats->iscsi_pdu_rx = le64_to_cpu(ql_iscsi_stats->iscsi_pdu_rx); | ||
1196 | host_stats->iscsi_data_bytes_rx = | ||
1197 | le64_to_cpu(ql_iscsi_stats->iscsi_data_bytes_rx); | ||
1198 | host_stats->iscsi_io_completed = | ||
1199 | le64_to_cpu(ql_iscsi_stats->iscsi_io_completed); | ||
1200 | host_stats->iscsi_unexpected_io_rx = | ||
1201 | le64_to_cpu(ql_iscsi_stats->iscsi_unexpected_io_rx); | ||
1202 | host_stats->iscsi_format_error = | ||
1203 | le64_to_cpu(ql_iscsi_stats->iscsi_format_error); | ||
1204 | host_stats->iscsi_hdr_digest_error = | ||
1205 | le64_to_cpu(ql_iscsi_stats->iscsi_hdr_digest_error); | ||
1206 | host_stats->iscsi_data_digest_error = | ||
1207 | le64_to_cpu(ql_iscsi_stats->iscsi_data_digest_error); | ||
1208 | host_stats->iscsi_sequence_error = | ||
1209 | le64_to_cpu(ql_iscsi_stats->iscsi_sequence_error); | ||
1210 | exit_host_stats: | ||
1211 | if (ql_iscsi_stats) | ||
1212 | dma_free_coherent(&ha->pdev->dev, host_stats_size, | ||
1213 | ql_iscsi_stats, iscsi_stats_dma); | ||
1214 | |||
1215 | ql4_printk(KERN_INFO, ha, "%s: Get host stats done\n", | ||
1216 | __func__); | ||
1217 | return ret; | ||
1218 | } | ||
1219 | |||
891 | static int qla4xxx_get_iface_param(struct iscsi_iface *iface, | 1220 | static int qla4xxx_get_iface_param(struct iscsi_iface *iface, |
892 | enum iscsi_param_type param_type, | 1221 | enum iscsi_param_type param_type, |
893 | int param, char *buf) | 1222 | int param, char *buf) |
894 | { | 1223 | { |
895 | struct Scsi_Host *shost = iscsi_iface_to_shost(iface); | 1224 | struct Scsi_Host *shost = iscsi_iface_to_shost(iface); |
896 | struct scsi_qla_host *ha = to_qla_host(shost); | 1225 | struct scsi_qla_host *ha = to_qla_host(shost); |
1226 | int ival; | ||
1227 | char *pval = NULL; | ||
897 | int len = -ENOSYS; | 1228 | int len = -ENOSYS; |
898 | 1229 | ||
899 | if (param_type != ISCSI_NET_PARAM) | 1230 | if (param_type == ISCSI_NET_PARAM) { |
900 | return -ENOSYS; | 1231 | switch (param) { |
1232 | case ISCSI_NET_PARAM_IPV4_ADDR: | ||
1233 | len = sprintf(buf, "%pI4\n", &ha->ip_config.ip_address); | ||
1234 | break; | ||
1235 | case ISCSI_NET_PARAM_IPV4_SUBNET: | ||
1236 | len = sprintf(buf, "%pI4\n", | ||
1237 | &ha->ip_config.subnet_mask); | ||
1238 | break; | ||
1239 | case ISCSI_NET_PARAM_IPV4_GW: | ||
1240 | len = sprintf(buf, "%pI4\n", &ha->ip_config.gateway); | ||
1241 | break; | ||
1242 | case ISCSI_NET_PARAM_IFACE_ENABLE: | ||
1243 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { | ||
1244 | OP_STATE(ha->ip_config.ipv4_options, | ||
1245 | IPOPT_IPV4_PROTOCOL_ENABLE, pval); | ||
1246 | } else { | ||
1247 | OP_STATE(ha->ip_config.ipv6_options, | ||
1248 | IPV6_OPT_IPV6_PROTOCOL_ENABLE, pval); | ||
1249 | } | ||
901 | 1250 | ||
902 | switch (param) { | 1251 | len = sprintf(buf, "%s\n", pval); |
903 | case ISCSI_NET_PARAM_IPV4_ADDR: | 1252 | break; |
904 | len = sprintf(buf, "%pI4\n", &ha->ip_config.ip_address); | 1253 | case ISCSI_NET_PARAM_IPV4_BOOTPROTO: |
905 | break; | ||
906 | case ISCSI_NET_PARAM_IPV4_SUBNET: | ||
907 | len = sprintf(buf, "%pI4\n", &ha->ip_config.subnet_mask); | ||
908 | break; | ||
909 | case ISCSI_NET_PARAM_IPV4_GW: | ||
910 | len = sprintf(buf, "%pI4\n", &ha->ip_config.gateway); | ||
911 | break; | ||
912 | case ISCSI_NET_PARAM_IFACE_ENABLE: | ||
913 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | ||
914 | len = sprintf(buf, "%s\n", | ||
915 | (ha->ip_config.ipv4_options & | ||
916 | IPOPT_IPV4_PROTOCOL_ENABLE) ? | ||
917 | "enabled" : "disabled"); | ||
918 | else if (iface->iface_type == ISCSI_IFACE_TYPE_IPV6) | ||
919 | len = sprintf(buf, "%s\n", | 1254 | len = sprintf(buf, "%s\n", |
920 | (ha->ip_config.ipv6_options & | 1255 | (ha->ip_config.tcp_options & |
921 | IPV6_OPT_IPV6_PROTOCOL_ENABLE) ? | 1256 | TCPOPT_DHCP_ENABLE) ? |
922 | "enabled" : "disabled"); | 1257 | "dhcp" : "static"); |
923 | break; | 1258 | break; |
924 | case ISCSI_NET_PARAM_IPV4_BOOTPROTO: | 1259 | case ISCSI_NET_PARAM_IPV6_ADDR: |
925 | len = sprintf(buf, "%s\n", | 1260 | if (iface->iface_num == 0) |
926 | (ha->ip_config.tcp_options & TCPOPT_DHCP_ENABLE) ? | 1261 | len = sprintf(buf, "%pI6\n", |
927 | "dhcp" : "static"); | 1262 | &ha->ip_config.ipv6_addr0); |
928 | break; | 1263 | if (iface->iface_num == 1) |
929 | case ISCSI_NET_PARAM_IPV6_ADDR: | 1264 | len = sprintf(buf, "%pI6\n", |
930 | if (iface->iface_num == 0) | 1265 | &ha->ip_config.ipv6_addr1); |
931 | len = sprintf(buf, "%pI6\n", &ha->ip_config.ipv6_addr0); | 1266 | break; |
932 | if (iface->iface_num == 1) | 1267 | case ISCSI_NET_PARAM_IPV6_LINKLOCAL: |
933 | len = sprintf(buf, "%pI6\n", &ha->ip_config.ipv6_addr1); | 1268 | len = sprintf(buf, "%pI6\n", |
934 | break; | 1269 | &ha->ip_config.ipv6_link_local_addr); |
935 | case ISCSI_NET_PARAM_IPV6_LINKLOCAL: | 1270 | break; |
936 | len = sprintf(buf, "%pI6\n", | 1271 | case ISCSI_NET_PARAM_IPV6_ROUTER: |
937 | &ha->ip_config.ipv6_link_local_addr); | 1272 | len = sprintf(buf, "%pI6\n", |
938 | break; | 1273 | &ha->ip_config.ipv6_default_router_addr); |
939 | case ISCSI_NET_PARAM_IPV6_ROUTER: | 1274 | break; |
940 | len = sprintf(buf, "%pI6\n", | 1275 | case ISCSI_NET_PARAM_IPV6_ADDR_AUTOCFG: |
941 | &ha->ip_config.ipv6_default_router_addr); | 1276 | pval = (ha->ip_config.ipv6_addl_options & |
942 | break; | 1277 | IPV6_ADDOPT_NEIGHBOR_DISCOVERY_ADDR_ENABLE) ? |
943 | case ISCSI_NET_PARAM_IPV6_ADDR_AUTOCFG: | 1278 | "nd" : "static"; |
944 | len = sprintf(buf, "%s\n", | 1279 | |
945 | (ha->ip_config.ipv6_addl_options & | 1280 | len = sprintf(buf, "%s\n", pval); |
946 | IPV6_ADDOPT_NEIGHBOR_DISCOVERY_ADDR_ENABLE) ? | 1281 | break; |
947 | "nd" : "static"); | 1282 | case ISCSI_NET_PARAM_IPV6_LINKLOCAL_AUTOCFG: |
948 | break; | 1283 | pval = (ha->ip_config.ipv6_addl_options & |
949 | case ISCSI_NET_PARAM_IPV6_LINKLOCAL_AUTOCFG: | 1284 | IPV6_ADDOPT_AUTOCONFIG_LINK_LOCAL_ADDR) ? |
950 | len = sprintf(buf, "%s\n", | 1285 | "auto" : "static"; |
951 | (ha->ip_config.ipv6_addl_options & | 1286 | |
952 | IPV6_ADDOPT_AUTOCONFIG_LINK_LOCAL_ADDR) ? | 1287 | len = sprintf(buf, "%s\n", pval); |
953 | "auto" : "static"); | 1288 | break; |
954 | break; | 1289 | case ISCSI_NET_PARAM_VLAN_ID: |
955 | case ISCSI_NET_PARAM_VLAN_ID: | 1290 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) |
956 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | 1291 | ival = ha->ip_config.ipv4_vlan_tag & |
1292 | ISCSI_MAX_VLAN_ID; | ||
1293 | else | ||
1294 | ival = ha->ip_config.ipv6_vlan_tag & | ||
1295 | ISCSI_MAX_VLAN_ID; | ||
1296 | |||
1297 | len = sprintf(buf, "%d\n", ival); | ||
1298 | break; | ||
1299 | case ISCSI_NET_PARAM_VLAN_PRIORITY: | ||
1300 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | ||
1301 | ival = (ha->ip_config.ipv4_vlan_tag >> 13) & | ||
1302 | ISCSI_MAX_VLAN_PRIORITY; | ||
1303 | else | ||
1304 | ival = (ha->ip_config.ipv6_vlan_tag >> 13) & | ||
1305 | ISCSI_MAX_VLAN_PRIORITY; | ||
1306 | |||
1307 | len = sprintf(buf, "%d\n", ival); | ||
1308 | break; | ||
1309 | case ISCSI_NET_PARAM_VLAN_ENABLED: | ||
1310 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { | ||
1311 | OP_STATE(ha->ip_config.ipv4_options, | ||
1312 | IPOPT_VLAN_TAGGING_ENABLE, pval); | ||
1313 | } else { | ||
1314 | OP_STATE(ha->ip_config.ipv6_options, | ||
1315 | IPV6_OPT_VLAN_TAGGING_ENABLE, pval); | ||
1316 | } | ||
1317 | len = sprintf(buf, "%s\n", pval); | ||
1318 | break; | ||
1319 | case ISCSI_NET_PARAM_MTU: | ||
1320 | len = sprintf(buf, "%d\n", ha->ip_config.eth_mtu_size); | ||
1321 | break; | ||
1322 | case ISCSI_NET_PARAM_PORT: | ||
1323 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | ||
1324 | len = sprintf(buf, "%d\n", | ||
1325 | ha->ip_config.ipv4_port); | ||
1326 | else | ||
1327 | len = sprintf(buf, "%d\n", | ||
1328 | ha->ip_config.ipv6_port); | ||
1329 | break; | ||
1330 | case ISCSI_NET_PARAM_IPADDR_STATE: | ||
1331 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { | ||
1332 | pval = iscsi_get_ipaddress_state_name( | ||
1333 | ha->ip_config.ipv4_addr_state); | ||
1334 | } else { | ||
1335 | if (iface->iface_num == 0) | ||
1336 | pval = iscsi_get_ipaddress_state_name( | ||
1337 | ha->ip_config.ipv6_addr0_state); | ||
1338 | else if (iface->iface_num == 1) | ||
1339 | pval = iscsi_get_ipaddress_state_name( | ||
1340 | ha->ip_config.ipv6_addr1_state); | ||
1341 | } | ||
1342 | |||
1343 | len = sprintf(buf, "%s\n", pval); | ||
1344 | break; | ||
1345 | case ISCSI_NET_PARAM_IPV6_LINKLOCAL_STATE: | ||
1346 | pval = iscsi_get_ipaddress_state_name( | ||
1347 | ha->ip_config.ipv6_link_local_state); | ||
1348 | len = sprintf(buf, "%s\n", pval); | ||
1349 | break; | ||
1350 | case ISCSI_NET_PARAM_IPV6_ROUTER_STATE: | ||
1351 | pval = iscsi_get_router_state_name( | ||
1352 | ha->ip_config.ipv6_default_router_state); | ||
1353 | len = sprintf(buf, "%s\n", pval); | ||
1354 | break; | ||
1355 | case ISCSI_NET_PARAM_DELAYED_ACK_EN: | ||
1356 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { | ||
1357 | OP_STATE(~ha->ip_config.tcp_options, | ||
1358 | TCPOPT_DELAYED_ACK_DISABLE, pval); | ||
1359 | } else { | ||
1360 | OP_STATE(~ha->ip_config.ipv6_tcp_options, | ||
1361 | IPV6_TCPOPT_DELAYED_ACK_DISABLE, pval); | ||
1362 | } | ||
1363 | len = sprintf(buf, "%s\n", pval); | ||
1364 | break; | ||
1365 | case ISCSI_NET_PARAM_TCP_NAGLE_DISABLE: | ||
1366 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { | ||
1367 | OP_STATE(~ha->ip_config.tcp_options, | ||
1368 | TCPOPT_NAGLE_ALGO_DISABLE, pval); | ||
1369 | } else { | ||
1370 | OP_STATE(~ha->ip_config.ipv6_tcp_options, | ||
1371 | IPV6_TCPOPT_NAGLE_ALGO_DISABLE, pval); | ||
1372 | } | ||
1373 | len = sprintf(buf, "%s\n", pval); | ||
1374 | break; | ||
1375 | case ISCSI_NET_PARAM_TCP_WSF_DISABLE: | ||
1376 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { | ||
1377 | OP_STATE(~ha->ip_config.tcp_options, | ||
1378 | TCPOPT_WINDOW_SCALE_DISABLE, pval); | ||
1379 | } else { | ||
1380 | OP_STATE(~ha->ip_config.ipv6_tcp_options, | ||
1381 | IPV6_TCPOPT_WINDOW_SCALE_DISABLE, | ||
1382 | pval); | ||
1383 | } | ||
1384 | len = sprintf(buf, "%s\n", pval); | ||
1385 | break; | ||
1386 | case ISCSI_NET_PARAM_TCP_WSF: | ||
1387 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | ||
1388 | len = sprintf(buf, "%d\n", | ||
1389 | ha->ip_config.tcp_wsf); | ||
1390 | else | ||
1391 | len = sprintf(buf, "%d\n", | ||
1392 | ha->ip_config.ipv6_tcp_wsf); | ||
1393 | break; | ||
1394 | case ISCSI_NET_PARAM_TCP_TIMER_SCALE: | ||
1395 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | ||
1396 | ival = (ha->ip_config.tcp_options & | ||
1397 | TCPOPT_TIMER_SCALE) >> 1; | ||
1398 | else | ||
1399 | ival = (ha->ip_config.ipv6_tcp_options & | ||
1400 | IPV6_TCPOPT_TIMER_SCALE) >> 1; | ||
1401 | |||
1402 | len = sprintf(buf, "%d\n", ival); | ||
1403 | break; | ||
1404 | case ISCSI_NET_PARAM_TCP_TIMESTAMP_EN: | ||
1405 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { | ||
1406 | OP_STATE(ha->ip_config.tcp_options, | ||
1407 | TCPOPT_TIMESTAMP_ENABLE, pval); | ||
1408 | } else { | ||
1409 | OP_STATE(ha->ip_config.ipv6_tcp_options, | ||
1410 | IPV6_TCPOPT_TIMESTAMP_EN, pval); | ||
1411 | } | ||
1412 | len = sprintf(buf, "%s\n", pval); | ||
1413 | break; | ||
1414 | case ISCSI_NET_PARAM_CACHE_ID: | ||
1415 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | ||
1416 | len = sprintf(buf, "%d\n", | ||
1417 | ha->ip_config.ipv4_cache_id); | ||
1418 | else | ||
1419 | len = sprintf(buf, "%d\n", | ||
1420 | ha->ip_config.ipv6_cache_id); | ||
1421 | break; | ||
1422 | case ISCSI_NET_PARAM_IPV4_DHCP_DNS_ADDR_EN: | ||
1423 | OP_STATE(ha->ip_config.tcp_options, | ||
1424 | TCPOPT_DNS_SERVER_IP_EN, pval); | ||
1425 | |||
1426 | len = sprintf(buf, "%s\n", pval); | ||
1427 | break; | ||
1428 | case ISCSI_NET_PARAM_IPV4_DHCP_SLP_DA_EN: | ||
1429 | OP_STATE(ha->ip_config.tcp_options, | ||
1430 | TCPOPT_SLP_DA_INFO_EN, pval); | ||
1431 | |||
1432 | len = sprintf(buf, "%s\n", pval); | ||
1433 | break; | ||
1434 | case ISCSI_NET_PARAM_IPV4_TOS_EN: | ||
1435 | OP_STATE(ha->ip_config.ipv4_options, | ||
1436 | IPOPT_IPV4_TOS_EN, pval); | ||
1437 | |||
1438 | len = sprintf(buf, "%s\n", pval); | ||
1439 | break; | ||
1440 | case ISCSI_NET_PARAM_IPV4_TOS: | ||
1441 | len = sprintf(buf, "%d\n", ha->ip_config.ipv4_tos); | ||
1442 | break; | ||
1443 | case ISCSI_NET_PARAM_IPV4_GRAT_ARP_EN: | ||
1444 | OP_STATE(ha->ip_config.ipv4_options, | ||
1445 | IPOPT_GRAT_ARP_EN, pval); | ||
1446 | |||
1447 | len = sprintf(buf, "%s\n", pval); | ||
1448 | break; | ||
1449 | case ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID_EN: | ||
1450 | OP_STATE(ha->ip_config.ipv4_options, IPOPT_ALT_CID_EN, | ||
1451 | pval); | ||
1452 | |||
1453 | len = sprintf(buf, "%s\n", pval); | ||
1454 | break; | ||
1455 | case ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID: | ||
1456 | pval = (ha->ip_config.ipv4_alt_cid_len) ? | ||
1457 | (char *)ha->ip_config.ipv4_alt_cid : ""; | ||
1458 | |||
1459 | len = sprintf(buf, "%s\n", pval); | ||
1460 | break; | ||
1461 | case ISCSI_NET_PARAM_IPV4_DHCP_REQ_VENDOR_ID_EN: | ||
1462 | OP_STATE(ha->ip_config.ipv4_options, | ||
1463 | IPOPT_REQ_VID_EN, pval); | ||
1464 | |||
1465 | len = sprintf(buf, "%s\n", pval); | ||
1466 | break; | ||
1467 | case ISCSI_NET_PARAM_IPV4_DHCP_USE_VENDOR_ID_EN: | ||
1468 | OP_STATE(ha->ip_config.ipv4_options, | ||
1469 | IPOPT_USE_VID_EN, pval); | ||
1470 | |||
1471 | len = sprintf(buf, "%s\n", pval); | ||
1472 | break; | ||
1473 | case ISCSI_NET_PARAM_IPV4_DHCP_VENDOR_ID: | ||
1474 | pval = (ha->ip_config.ipv4_vid_len) ? | ||
1475 | (char *)ha->ip_config.ipv4_vid : ""; | ||
1476 | |||
1477 | len = sprintf(buf, "%s\n", pval); | ||
1478 | break; | ||
1479 | case ISCSI_NET_PARAM_IPV4_DHCP_LEARN_IQN_EN: | ||
1480 | OP_STATE(ha->ip_config.ipv4_options, | ||
1481 | IPOPT_LEARN_IQN_EN, pval); | ||
1482 | |||
1483 | len = sprintf(buf, "%s\n", pval); | ||
1484 | break; | ||
1485 | case ISCSI_NET_PARAM_IPV4_FRAGMENT_DISABLE: | ||
1486 | OP_STATE(~ha->ip_config.ipv4_options, | ||
1487 | IPOPT_FRAGMENTATION_DISABLE, pval); | ||
1488 | |||
1489 | len = sprintf(buf, "%s\n", pval); | ||
1490 | break; | ||
1491 | case ISCSI_NET_PARAM_IPV4_IN_FORWARD_EN: | ||
1492 | OP_STATE(ha->ip_config.ipv4_options, | ||
1493 | IPOPT_IN_FORWARD_EN, pval); | ||
1494 | |||
1495 | len = sprintf(buf, "%s\n", pval); | ||
1496 | break; | ||
1497 | case ISCSI_NET_PARAM_REDIRECT_EN: | ||
1498 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { | ||
1499 | OP_STATE(ha->ip_config.ipv4_options, | ||
1500 | IPOPT_ARP_REDIRECT_EN, pval); | ||
1501 | } else { | ||
1502 | OP_STATE(ha->ip_config.ipv6_options, | ||
1503 | IPV6_OPT_REDIRECT_EN, pval); | ||
1504 | } | ||
1505 | len = sprintf(buf, "%s\n", pval); | ||
1506 | break; | ||
1507 | case ISCSI_NET_PARAM_IPV4_TTL: | ||
1508 | len = sprintf(buf, "%d\n", ha->ip_config.ipv4_ttl); | ||
1509 | break; | ||
1510 | case ISCSI_NET_PARAM_IPV6_GRAT_NEIGHBOR_ADV_EN: | ||
1511 | OP_STATE(ha->ip_config.ipv6_options, | ||
1512 | IPV6_OPT_GRAT_NEIGHBOR_ADV_EN, pval); | ||
1513 | |||
1514 | len = sprintf(buf, "%s\n", pval); | ||
1515 | break; | ||
1516 | case ISCSI_NET_PARAM_IPV6_MLD_EN: | ||
1517 | OP_STATE(ha->ip_config.ipv6_addl_options, | ||
1518 | IPV6_ADDOPT_MLD_EN, pval); | ||
1519 | |||
1520 | len = sprintf(buf, "%s\n", pval); | ||
1521 | break; | ||
1522 | case ISCSI_NET_PARAM_IPV6_FLOW_LABEL: | ||
1523 | len = sprintf(buf, "%u\n", ha->ip_config.ipv6_flow_lbl); | ||
1524 | break; | ||
1525 | case ISCSI_NET_PARAM_IPV6_TRAFFIC_CLASS: | ||
957 | len = sprintf(buf, "%d\n", | 1526 | len = sprintf(buf, "%d\n", |
958 | (ha->ip_config.ipv4_vlan_tag & | 1527 | ha->ip_config.ipv6_traffic_class); |
959 | ISCSI_MAX_VLAN_ID)); | 1528 | break; |
960 | else if (iface->iface_type == ISCSI_IFACE_TYPE_IPV6) | 1529 | case ISCSI_NET_PARAM_IPV6_HOP_LIMIT: |
961 | len = sprintf(buf, "%d\n", | 1530 | len = sprintf(buf, "%d\n", |
962 | (ha->ip_config.ipv6_vlan_tag & | 1531 | ha->ip_config.ipv6_hop_limit); |
963 | ISCSI_MAX_VLAN_ID)); | 1532 | break; |
964 | break; | 1533 | case ISCSI_NET_PARAM_IPV6_ND_REACHABLE_TMO: |
965 | case ISCSI_NET_PARAM_VLAN_PRIORITY: | ||
966 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | ||
967 | len = sprintf(buf, "%d\n", | 1534 | len = sprintf(buf, "%d\n", |
968 | ((ha->ip_config.ipv4_vlan_tag >> 13) & | 1535 | ha->ip_config.ipv6_nd_reach_time); |
969 | ISCSI_MAX_VLAN_PRIORITY)); | 1536 | break; |
970 | else if (iface->iface_type == ISCSI_IFACE_TYPE_IPV6) | 1537 | case ISCSI_NET_PARAM_IPV6_ND_REXMIT_TIME: |
971 | len = sprintf(buf, "%d\n", | 1538 | len = sprintf(buf, "%d\n", |
972 | ((ha->ip_config.ipv6_vlan_tag >> 13) & | 1539 | ha->ip_config.ipv6_nd_rexmit_timer); |
973 | ISCSI_MAX_VLAN_PRIORITY)); | 1540 | break; |
974 | break; | 1541 | case ISCSI_NET_PARAM_IPV6_ND_STALE_TMO: |
975 | case ISCSI_NET_PARAM_VLAN_ENABLED: | 1542 | len = sprintf(buf, "%d\n", |
976 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | 1543 | ha->ip_config.ipv6_nd_stale_timeout); |
977 | len = sprintf(buf, "%s\n", | 1544 | break; |
978 | (ha->ip_config.ipv4_options & | 1545 | case ISCSI_NET_PARAM_IPV6_DUP_ADDR_DETECT_CNT: |
979 | IPOPT_VLAN_TAGGING_ENABLE) ? | 1546 | len = sprintf(buf, "%d\n", |
980 | "enabled" : "disabled"); | 1547 | ha->ip_config.ipv6_dup_addr_detect_count); |
981 | else if (iface->iface_type == ISCSI_IFACE_TYPE_IPV6) | 1548 | break; |
982 | len = sprintf(buf, "%s\n", | 1549 | case ISCSI_NET_PARAM_IPV6_RTR_ADV_LINK_MTU: |
983 | (ha->ip_config.ipv6_options & | 1550 | len = sprintf(buf, "%d\n", |
984 | IPV6_OPT_VLAN_TAGGING_ENABLE) ? | 1551 | ha->ip_config.ipv6_gw_advrt_mtu); |
985 | "enabled" : "disabled"); | 1552 | break; |
986 | break; | 1553 | default: |
987 | case ISCSI_NET_PARAM_MTU: | 1554 | len = -ENOSYS; |
988 | len = sprintf(buf, "%d\n", ha->ip_config.eth_mtu_size); | 1555 | } |
989 | break; | 1556 | } else if (param_type == ISCSI_IFACE_PARAM) { |
990 | case ISCSI_NET_PARAM_PORT: | 1557 | switch (param) { |
991 | if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) | 1558 | case ISCSI_IFACE_PARAM_DEF_TASKMGMT_TMO: |
992 | len = sprintf(buf, "%d\n", ha->ip_config.ipv4_port); | 1559 | len = sprintf(buf, "%d\n", ha->ip_config.def_timeout); |
993 | else if (iface->iface_type == ISCSI_IFACE_TYPE_IPV6) | 1560 | break; |
994 | len = sprintf(buf, "%d\n", ha->ip_config.ipv6_port); | 1561 | case ISCSI_IFACE_PARAM_HDRDGST_EN: |
995 | break; | 1562 | OP_STATE(ha->ip_config.iscsi_options, |
996 | default: | 1563 | ISCSIOPTS_HEADER_DIGEST_EN, pval); |
997 | len = -ENOSYS; | 1564 | |
1565 | len = sprintf(buf, "%s\n", pval); | ||
1566 | break; | ||
1567 | case ISCSI_IFACE_PARAM_DATADGST_EN: | ||
1568 | OP_STATE(ha->ip_config.iscsi_options, | ||
1569 | ISCSIOPTS_DATA_DIGEST_EN, pval); | ||
1570 | |||
1571 | len = sprintf(buf, "%s\n", pval); | ||
1572 | break; | ||
1573 | case ISCSI_IFACE_PARAM_IMM_DATA_EN: | ||
1574 | OP_STATE(ha->ip_config.iscsi_options, | ||
1575 | ISCSIOPTS_IMMEDIATE_DATA_EN, pval); | ||
1576 | |||
1577 | len = sprintf(buf, "%s\n", pval); | ||
1578 | break; | ||
1579 | case ISCSI_IFACE_PARAM_INITIAL_R2T_EN: | ||
1580 | OP_STATE(ha->ip_config.iscsi_options, | ||
1581 | ISCSIOPTS_INITIAL_R2T_EN, pval); | ||
1582 | |||
1583 | len = sprintf(buf, "%s\n", pval); | ||
1584 | break; | ||
1585 | case ISCSI_IFACE_PARAM_DATASEQ_INORDER_EN: | ||
1586 | OP_STATE(ha->ip_config.iscsi_options, | ||
1587 | ISCSIOPTS_DATA_SEQ_INORDER_EN, pval); | ||
1588 | |||
1589 | len = sprintf(buf, "%s\n", pval); | ||
1590 | break; | ||
1591 | case ISCSI_IFACE_PARAM_PDU_INORDER_EN: | ||
1592 | OP_STATE(ha->ip_config.iscsi_options, | ||
1593 | ISCSIOPTS_DATA_PDU_INORDER_EN, pval); | ||
1594 | |||
1595 | len = sprintf(buf, "%s\n", pval); | ||
1596 | break; | ||
1597 | case ISCSI_IFACE_PARAM_ERL: | ||
1598 | len = sprintf(buf, "%d\n", | ||
1599 | (ha->ip_config.iscsi_options & | ||
1600 | ISCSIOPTS_ERL)); | ||
1601 | break; | ||
1602 | case ISCSI_IFACE_PARAM_MAX_RECV_DLENGTH: | ||
1603 | len = sprintf(buf, "%u\n", | ||
1604 | ha->ip_config.iscsi_max_pdu_size * | ||
1605 | BYTE_UNITS); | ||
1606 | break; | ||
1607 | case ISCSI_IFACE_PARAM_FIRST_BURST: | ||
1608 | len = sprintf(buf, "%u\n", | ||
1609 | ha->ip_config.iscsi_first_burst_len * | ||
1610 | BYTE_UNITS); | ||
1611 | break; | ||
1612 | case ISCSI_IFACE_PARAM_MAX_R2T: | ||
1613 | len = sprintf(buf, "%d\n", | ||
1614 | ha->ip_config.iscsi_max_outstnd_r2t); | ||
1615 | break; | ||
1616 | case ISCSI_IFACE_PARAM_MAX_BURST: | ||
1617 | len = sprintf(buf, "%u\n", | ||
1618 | ha->ip_config.iscsi_max_burst_len * | ||
1619 | BYTE_UNITS); | ||
1620 | break; | ||
1621 | case ISCSI_IFACE_PARAM_CHAP_AUTH_EN: | ||
1622 | OP_STATE(ha->ip_config.iscsi_options, | ||
1623 | ISCSIOPTS_CHAP_AUTH_EN, pval); | ||
1624 | |||
1625 | len = sprintf(buf, "%s\n", pval); | ||
1626 | break; | ||
1627 | case ISCSI_IFACE_PARAM_BIDI_CHAP_EN: | ||
1628 | OP_STATE(ha->ip_config.iscsi_options, | ||
1629 | ISCSIOPTS_BIDI_CHAP_EN, pval); | ||
1630 | |||
1631 | len = sprintf(buf, "%s\n", pval); | ||
1632 | break; | ||
1633 | case ISCSI_IFACE_PARAM_DISCOVERY_AUTH_OPTIONAL: | ||
1634 | OP_STATE(ha->ip_config.iscsi_options, | ||
1635 | ISCSIOPTS_DISCOVERY_AUTH_EN, pval); | ||
1636 | |||
1637 | len = sprintf(buf, "%s\n", pval); | ||
1638 | break; | ||
1639 | case ISCSI_IFACE_PARAM_DISCOVERY_LOGOUT_EN: | ||
1640 | OP_STATE(ha->ip_config.iscsi_options, | ||
1641 | ISCSIOPTS_DISCOVERY_LOGOUT_EN, pval); | ||
1642 | |||
1643 | len = sprintf(buf, "%s\n", pval); | ||
1644 | break; | ||
1645 | case ISCSI_IFACE_PARAM_STRICT_LOGIN_COMP_EN: | ||
1646 | OP_STATE(ha->ip_config.iscsi_options, | ||
1647 | ISCSIOPTS_STRICT_LOGIN_COMP_EN, pval); | ||
1648 | |||
1649 | len = sprintf(buf, "%s\n", pval); | ||
1650 | break; | ||
1651 | case ISCSI_IFACE_PARAM_INITIATOR_NAME: | ||
1652 | len = sprintf(buf, "%s\n", ha->ip_config.iscsi_name); | ||
1653 | break; | ||
1654 | default: | ||
1655 | len = -ENOSYS; | ||
1656 | } | ||
998 | } | 1657 | } |
999 | 1658 | ||
1000 | return len; | 1659 | return len; |
@@ -1366,8 +2025,8 @@ static void qla4xxx_set_ipv6(struct scsi_qla_host *ha, | |||
1366 | cpu_to_le16( | 2025 | cpu_to_le16( |
1367 | IPV6_ADDOPT_NEIGHBOR_DISCOVERY_ADDR_ENABLE); | 2026 | IPV6_ADDOPT_NEIGHBOR_DISCOVERY_ADDR_ENABLE); |
1368 | else | 2027 | else |
1369 | ql4_printk(KERN_ERR, ha, "Invalid autocfg setting for " | 2028 | ql4_printk(KERN_ERR, ha, |
1370 | "IPv6 addr\n"); | 2029 | "Invalid autocfg setting for IPv6 addr\n"); |
1371 | break; | 2030 | break; |
1372 | case ISCSI_NET_PARAM_IPV6_LINKLOCAL_AUTOCFG: | 2031 | case ISCSI_NET_PARAM_IPV6_LINKLOCAL_AUTOCFG: |
1373 | /* Autocfg applies to even interface */ | 2032 | /* Autocfg applies to even interface */ |
@@ -1383,8 +2042,8 @@ static void qla4xxx_set_ipv6(struct scsi_qla_host *ha, | |||
1383 | init_fw_cb->ipv6_addtl_opts &= cpu_to_le16( | 2042 | init_fw_cb->ipv6_addtl_opts &= cpu_to_le16( |
1384 | ~IPV6_ADDOPT_AUTOCONFIG_LINK_LOCAL_ADDR); | 2043 | ~IPV6_ADDOPT_AUTOCONFIG_LINK_LOCAL_ADDR); |
1385 | else | 2044 | else |
1386 | ql4_printk(KERN_ERR, ha, "Invalid autocfg setting for " | 2045 | ql4_printk(KERN_ERR, ha, |
1387 | "IPv6 linklocal addr\n"); | 2046 | "Invalid autocfg setting for IPv6 linklocal addr\n"); |
1388 | break; | 2047 | break; |
1389 | case ISCSI_NET_PARAM_IPV6_ROUTER_AUTOCFG: | 2048 | case ISCSI_NET_PARAM_IPV6_ROUTER_AUTOCFG: |
1390 | /* Autocfg applies to even interface */ | 2049 | /* Autocfg applies to even interface */ |
@@ -1433,6 +2092,135 @@ static void qla4xxx_set_ipv6(struct scsi_qla_host *ha, | |||
1433 | init_fw_cb->ipv6_port = | 2092 | init_fw_cb->ipv6_port = |
1434 | cpu_to_le16(*(uint16_t *)iface_param->value); | 2093 | cpu_to_le16(*(uint16_t *)iface_param->value); |
1435 | break; | 2094 | break; |
2095 | case ISCSI_NET_PARAM_DELAYED_ACK_EN: | ||
2096 | if (iface_param->iface_num & 0x1) | ||
2097 | break; | ||
2098 | if (iface_param->value[0] == ISCSI_NET_PARAM_DISABLE) | ||
2099 | init_fw_cb->ipv6_tcp_opts |= | ||
2100 | cpu_to_le16(IPV6_TCPOPT_DELAYED_ACK_DISABLE); | ||
2101 | else | ||
2102 | init_fw_cb->ipv6_tcp_opts &= | ||
2103 | cpu_to_le16(~IPV6_TCPOPT_DELAYED_ACK_DISABLE); | ||
2104 | break; | ||
2105 | case ISCSI_NET_PARAM_TCP_NAGLE_DISABLE: | ||
2106 | if (iface_param->iface_num & 0x1) | ||
2107 | break; | ||
2108 | if (iface_param->value[0] == ISCSI_NET_PARAM_DISABLE) | ||
2109 | init_fw_cb->ipv6_tcp_opts |= | ||
2110 | cpu_to_le16(IPV6_TCPOPT_NAGLE_ALGO_DISABLE); | ||
2111 | else | ||
2112 | init_fw_cb->ipv6_tcp_opts &= | ||
2113 | cpu_to_le16(~IPV6_TCPOPT_NAGLE_ALGO_DISABLE); | ||
2114 | break; | ||
2115 | case ISCSI_NET_PARAM_TCP_WSF_DISABLE: | ||
2116 | if (iface_param->iface_num & 0x1) | ||
2117 | break; | ||
2118 | if (iface_param->value[0] == ISCSI_NET_PARAM_DISABLE) | ||
2119 | init_fw_cb->ipv6_tcp_opts |= | ||
2120 | cpu_to_le16(IPV6_TCPOPT_WINDOW_SCALE_DISABLE); | ||
2121 | else | ||
2122 | init_fw_cb->ipv6_tcp_opts &= | ||
2123 | cpu_to_le16(~IPV6_TCPOPT_WINDOW_SCALE_DISABLE); | ||
2124 | break; | ||
2125 | case ISCSI_NET_PARAM_TCP_WSF: | ||
2126 | if (iface_param->iface_num & 0x1) | ||
2127 | break; | ||
2128 | init_fw_cb->ipv6_tcp_wsf = iface_param->value[0]; | ||
2129 | break; | ||
2130 | case ISCSI_NET_PARAM_TCP_TIMER_SCALE: | ||
2131 | if (iface_param->iface_num & 0x1) | ||
2132 | break; | ||
2133 | init_fw_cb->ipv6_tcp_opts &= | ||
2134 | cpu_to_le16(~IPV6_TCPOPT_TIMER_SCALE); | ||
2135 | init_fw_cb->ipv6_tcp_opts |= | ||
2136 | cpu_to_le16((iface_param->value[0] << 1) & | ||
2137 | IPV6_TCPOPT_TIMER_SCALE); | ||
2138 | break; | ||
2139 | case ISCSI_NET_PARAM_TCP_TIMESTAMP_EN: | ||
2140 | if (iface_param->iface_num & 0x1) | ||
2141 | break; | ||
2142 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2143 | init_fw_cb->ipv6_tcp_opts |= | ||
2144 | cpu_to_le16(IPV6_TCPOPT_TIMESTAMP_EN); | ||
2145 | else | ||
2146 | init_fw_cb->ipv6_tcp_opts &= | ||
2147 | cpu_to_le16(~IPV6_TCPOPT_TIMESTAMP_EN); | ||
2148 | break; | ||
2149 | case ISCSI_NET_PARAM_IPV6_GRAT_NEIGHBOR_ADV_EN: | ||
2150 | if (iface_param->iface_num & 0x1) | ||
2151 | break; | ||
2152 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2153 | init_fw_cb->ipv6_opts |= | ||
2154 | cpu_to_le16(IPV6_OPT_GRAT_NEIGHBOR_ADV_EN); | ||
2155 | else | ||
2156 | init_fw_cb->ipv6_opts &= | ||
2157 | cpu_to_le16(~IPV6_OPT_GRAT_NEIGHBOR_ADV_EN); | ||
2158 | break; | ||
2159 | case ISCSI_NET_PARAM_REDIRECT_EN: | ||
2160 | if (iface_param->iface_num & 0x1) | ||
2161 | break; | ||
2162 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2163 | init_fw_cb->ipv6_opts |= | ||
2164 | cpu_to_le16(IPV6_OPT_REDIRECT_EN); | ||
2165 | else | ||
2166 | init_fw_cb->ipv6_opts &= | ||
2167 | cpu_to_le16(~IPV6_OPT_REDIRECT_EN); | ||
2168 | break; | ||
2169 | case ISCSI_NET_PARAM_IPV6_MLD_EN: | ||
2170 | if (iface_param->iface_num & 0x1) | ||
2171 | break; | ||
2172 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2173 | init_fw_cb->ipv6_addtl_opts |= | ||
2174 | cpu_to_le16(IPV6_ADDOPT_MLD_EN); | ||
2175 | else | ||
2176 | init_fw_cb->ipv6_addtl_opts &= | ||
2177 | cpu_to_le16(~IPV6_ADDOPT_MLD_EN); | ||
2178 | break; | ||
2179 | case ISCSI_NET_PARAM_IPV6_FLOW_LABEL: | ||
2180 | if (iface_param->iface_num & 0x1) | ||
2181 | break; | ||
2182 | init_fw_cb->ipv6_flow_lbl = | ||
2183 | cpu_to_le16(*(uint16_t *)iface_param->value); | ||
2184 | break; | ||
2185 | case ISCSI_NET_PARAM_IPV6_TRAFFIC_CLASS: | ||
2186 | if (iface_param->iface_num & 0x1) | ||
2187 | break; | ||
2188 | init_fw_cb->ipv6_traffic_class = iface_param->value[0]; | ||
2189 | break; | ||
2190 | case ISCSI_NET_PARAM_IPV6_HOP_LIMIT: | ||
2191 | if (iface_param->iface_num & 0x1) | ||
2192 | break; | ||
2193 | init_fw_cb->ipv6_hop_limit = iface_param->value[0]; | ||
2194 | break; | ||
2195 | case ISCSI_NET_PARAM_IPV6_ND_REACHABLE_TMO: | ||
2196 | if (iface_param->iface_num & 0x1) | ||
2197 | break; | ||
2198 | init_fw_cb->ipv6_nd_reach_time = | ||
2199 | cpu_to_le32(*(uint32_t *)iface_param->value); | ||
2200 | break; | ||
2201 | case ISCSI_NET_PARAM_IPV6_ND_REXMIT_TIME: | ||
2202 | if (iface_param->iface_num & 0x1) | ||
2203 | break; | ||
2204 | init_fw_cb->ipv6_nd_rexmit_timer = | ||
2205 | cpu_to_le32(*(uint32_t *)iface_param->value); | ||
2206 | break; | ||
2207 | case ISCSI_NET_PARAM_IPV6_ND_STALE_TMO: | ||
2208 | if (iface_param->iface_num & 0x1) | ||
2209 | break; | ||
2210 | init_fw_cb->ipv6_nd_stale_timeout = | ||
2211 | cpu_to_le32(*(uint32_t *)iface_param->value); | ||
2212 | break; | ||
2213 | case ISCSI_NET_PARAM_IPV6_DUP_ADDR_DETECT_CNT: | ||
2214 | if (iface_param->iface_num & 0x1) | ||
2215 | break; | ||
2216 | init_fw_cb->ipv6_dup_addr_detect_count = iface_param->value[0]; | ||
2217 | break; | ||
2218 | case ISCSI_NET_PARAM_IPV6_RTR_ADV_LINK_MTU: | ||
2219 | if (iface_param->iface_num & 0x1) | ||
2220 | break; | ||
2221 | init_fw_cb->ipv6_gw_advrt_mtu = | ||
2222 | cpu_to_le32(*(uint32_t *)iface_param->value); | ||
2223 | break; | ||
1436 | default: | 2224 | default: |
1437 | ql4_printk(KERN_ERR, ha, "Unknown IPv6 param = %d\n", | 2225 | ql4_printk(KERN_ERR, ha, "Unknown IPv6 param = %d\n", |
1438 | iface_param->param); | 2226 | iface_param->param); |
@@ -1501,6 +2289,195 @@ static void qla4xxx_set_ipv4(struct scsi_qla_host *ha, | |||
1501 | init_fw_cb->ipv4_port = | 2289 | init_fw_cb->ipv4_port = |
1502 | cpu_to_le16(*(uint16_t *)iface_param->value); | 2290 | cpu_to_le16(*(uint16_t *)iface_param->value); |
1503 | break; | 2291 | break; |
2292 | case ISCSI_NET_PARAM_DELAYED_ACK_EN: | ||
2293 | if (iface_param->iface_num & 0x1) | ||
2294 | break; | ||
2295 | if (iface_param->value[0] == ISCSI_NET_PARAM_DISABLE) | ||
2296 | init_fw_cb->ipv4_tcp_opts |= | ||
2297 | cpu_to_le16(TCPOPT_DELAYED_ACK_DISABLE); | ||
2298 | else | ||
2299 | init_fw_cb->ipv4_tcp_opts &= | ||
2300 | cpu_to_le16(~TCPOPT_DELAYED_ACK_DISABLE); | ||
2301 | break; | ||
2302 | case ISCSI_NET_PARAM_TCP_NAGLE_DISABLE: | ||
2303 | if (iface_param->iface_num & 0x1) | ||
2304 | break; | ||
2305 | if (iface_param->value[0] == ISCSI_NET_PARAM_DISABLE) | ||
2306 | init_fw_cb->ipv4_tcp_opts |= | ||
2307 | cpu_to_le16(TCPOPT_NAGLE_ALGO_DISABLE); | ||
2308 | else | ||
2309 | init_fw_cb->ipv4_tcp_opts &= | ||
2310 | cpu_to_le16(~TCPOPT_NAGLE_ALGO_DISABLE); | ||
2311 | break; | ||
2312 | case ISCSI_NET_PARAM_TCP_WSF_DISABLE: | ||
2313 | if (iface_param->iface_num & 0x1) | ||
2314 | break; | ||
2315 | if (iface_param->value[0] == ISCSI_NET_PARAM_DISABLE) | ||
2316 | init_fw_cb->ipv4_tcp_opts |= | ||
2317 | cpu_to_le16(TCPOPT_WINDOW_SCALE_DISABLE); | ||
2318 | else | ||
2319 | init_fw_cb->ipv4_tcp_opts &= | ||
2320 | cpu_to_le16(~TCPOPT_WINDOW_SCALE_DISABLE); | ||
2321 | break; | ||
2322 | case ISCSI_NET_PARAM_TCP_WSF: | ||
2323 | if (iface_param->iface_num & 0x1) | ||
2324 | break; | ||
2325 | init_fw_cb->ipv4_tcp_wsf = iface_param->value[0]; | ||
2326 | break; | ||
2327 | case ISCSI_NET_PARAM_TCP_TIMER_SCALE: | ||
2328 | if (iface_param->iface_num & 0x1) | ||
2329 | break; | ||
2330 | init_fw_cb->ipv4_tcp_opts &= cpu_to_le16(~TCPOPT_TIMER_SCALE); | ||
2331 | init_fw_cb->ipv4_tcp_opts |= | ||
2332 | cpu_to_le16((iface_param->value[0] << 1) & | ||
2333 | TCPOPT_TIMER_SCALE); | ||
2334 | break; | ||
2335 | case ISCSI_NET_PARAM_TCP_TIMESTAMP_EN: | ||
2336 | if (iface_param->iface_num & 0x1) | ||
2337 | break; | ||
2338 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2339 | init_fw_cb->ipv4_tcp_opts |= | ||
2340 | cpu_to_le16(TCPOPT_TIMESTAMP_ENABLE); | ||
2341 | else | ||
2342 | init_fw_cb->ipv4_tcp_opts &= | ||
2343 | cpu_to_le16(~TCPOPT_TIMESTAMP_ENABLE); | ||
2344 | break; | ||
2345 | case ISCSI_NET_PARAM_IPV4_DHCP_DNS_ADDR_EN: | ||
2346 | if (iface_param->iface_num & 0x1) | ||
2347 | break; | ||
2348 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2349 | init_fw_cb->ipv4_tcp_opts |= | ||
2350 | cpu_to_le16(TCPOPT_DNS_SERVER_IP_EN); | ||
2351 | else | ||
2352 | init_fw_cb->ipv4_tcp_opts &= | ||
2353 | cpu_to_le16(~TCPOPT_DNS_SERVER_IP_EN); | ||
2354 | break; | ||
2355 | case ISCSI_NET_PARAM_IPV4_DHCP_SLP_DA_EN: | ||
2356 | if (iface_param->iface_num & 0x1) | ||
2357 | break; | ||
2358 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2359 | init_fw_cb->ipv4_tcp_opts |= | ||
2360 | cpu_to_le16(TCPOPT_SLP_DA_INFO_EN); | ||
2361 | else | ||
2362 | init_fw_cb->ipv4_tcp_opts &= | ||
2363 | cpu_to_le16(~TCPOPT_SLP_DA_INFO_EN); | ||
2364 | break; | ||
2365 | case ISCSI_NET_PARAM_IPV4_TOS_EN: | ||
2366 | if (iface_param->iface_num & 0x1) | ||
2367 | break; | ||
2368 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2369 | init_fw_cb->ipv4_ip_opts |= | ||
2370 | cpu_to_le16(IPOPT_IPV4_TOS_EN); | ||
2371 | else | ||
2372 | init_fw_cb->ipv4_ip_opts &= | ||
2373 | cpu_to_le16(~IPOPT_IPV4_TOS_EN); | ||
2374 | break; | ||
2375 | case ISCSI_NET_PARAM_IPV4_TOS: | ||
2376 | if (iface_param->iface_num & 0x1) | ||
2377 | break; | ||
2378 | init_fw_cb->ipv4_tos = iface_param->value[0]; | ||
2379 | break; | ||
2380 | case ISCSI_NET_PARAM_IPV4_GRAT_ARP_EN: | ||
2381 | if (iface_param->iface_num & 0x1) | ||
2382 | break; | ||
2383 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2384 | init_fw_cb->ipv4_ip_opts |= | ||
2385 | cpu_to_le16(IPOPT_GRAT_ARP_EN); | ||
2386 | else | ||
2387 | init_fw_cb->ipv4_ip_opts &= | ||
2388 | cpu_to_le16(~IPOPT_GRAT_ARP_EN); | ||
2389 | break; | ||
2390 | case ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID_EN: | ||
2391 | if (iface_param->iface_num & 0x1) | ||
2392 | break; | ||
2393 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2394 | init_fw_cb->ipv4_ip_opts |= | ||
2395 | cpu_to_le16(IPOPT_ALT_CID_EN); | ||
2396 | else | ||
2397 | init_fw_cb->ipv4_ip_opts &= | ||
2398 | cpu_to_le16(~IPOPT_ALT_CID_EN); | ||
2399 | break; | ||
2400 | case ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID: | ||
2401 | if (iface_param->iface_num & 0x1) | ||
2402 | break; | ||
2403 | memcpy(init_fw_cb->ipv4_dhcp_alt_cid, iface_param->value, | ||
2404 | (sizeof(init_fw_cb->ipv4_dhcp_alt_cid) - 1)); | ||
2405 | init_fw_cb->ipv4_dhcp_alt_cid_len = | ||
2406 | strlen(init_fw_cb->ipv4_dhcp_alt_cid); | ||
2407 | break; | ||
2408 | case ISCSI_NET_PARAM_IPV4_DHCP_REQ_VENDOR_ID_EN: | ||
2409 | if (iface_param->iface_num & 0x1) | ||
2410 | break; | ||
2411 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2412 | init_fw_cb->ipv4_ip_opts |= | ||
2413 | cpu_to_le16(IPOPT_REQ_VID_EN); | ||
2414 | else | ||
2415 | init_fw_cb->ipv4_ip_opts &= | ||
2416 | cpu_to_le16(~IPOPT_REQ_VID_EN); | ||
2417 | break; | ||
2418 | case ISCSI_NET_PARAM_IPV4_DHCP_USE_VENDOR_ID_EN: | ||
2419 | if (iface_param->iface_num & 0x1) | ||
2420 | break; | ||
2421 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2422 | init_fw_cb->ipv4_ip_opts |= | ||
2423 | cpu_to_le16(IPOPT_USE_VID_EN); | ||
2424 | else | ||
2425 | init_fw_cb->ipv4_ip_opts &= | ||
2426 | cpu_to_le16(~IPOPT_USE_VID_EN); | ||
2427 | break; | ||
2428 | case ISCSI_NET_PARAM_IPV4_DHCP_VENDOR_ID: | ||
2429 | if (iface_param->iface_num & 0x1) | ||
2430 | break; | ||
2431 | memcpy(init_fw_cb->ipv4_dhcp_vid, iface_param->value, | ||
2432 | (sizeof(init_fw_cb->ipv4_dhcp_vid) - 1)); | ||
2433 | init_fw_cb->ipv4_dhcp_vid_len = | ||
2434 | strlen(init_fw_cb->ipv4_dhcp_vid); | ||
2435 | break; | ||
2436 | case ISCSI_NET_PARAM_IPV4_DHCP_LEARN_IQN_EN: | ||
2437 | if (iface_param->iface_num & 0x1) | ||
2438 | break; | ||
2439 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2440 | init_fw_cb->ipv4_ip_opts |= | ||
2441 | cpu_to_le16(IPOPT_LEARN_IQN_EN); | ||
2442 | else | ||
2443 | init_fw_cb->ipv4_ip_opts &= | ||
2444 | cpu_to_le16(~IPOPT_LEARN_IQN_EN); | ||
2445 | break; | ||
2446 | case ISCSI_NET_PARAM_IPV4_FRAGMENT_DISABLE: | ||
2447 | if (iface_param->iface_num & 0x1) | ||
2448 | break; | ||
2449 | if (iface_param->value[0] == ISCSI_NET_PARAM_DISABLE) | ||
2450 | init_fw_cb->ipv4_ip_opts |= | ||
2451 | cpu_to_le16(IPOPT_FRAGMENTATION_DISABLE); | ||
2452 | else | ||
2453 | init_fw_cb->ipv4_ip_opts &= | ||
2454 | cpu_to_le16(~IPOPT_FRAGMENTATION_DISABLE); | ||
2455 | break; | ||
2456 | case ISCSI_NET_PARAM_IPV4_IN_FORWARD_EN: | ||
2457 | if (iface_param->iface_num & 0x1) | ||
2458 | break; | ||
2459 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2460 | init_fw_cb->ipv4_ip_opts |= | ||
2461 | cpu_to_le16(IPOPT_IN_FORWARD_EN); | ||
2462 | else | ||
2463 | init_fw_cb->ipv4_ip_opts &= | ||
2464 | cpu_to_le16(~IPOPT_IN_FORWARD_EN); | ||
2465 | break; | ||
2466 | case ISCSI_NET_PARAM_REDIRECT_EN: | ||
2467 | if (iface_param->iface_num & 0x1) | ||
2468 | break; | ||
2469 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2470 | init_fw_cb->ipv4_ip_opts |= | ||
2471 | cpu_to_le16(IPOPT_ARP_REDIRECT_EN); | ||
2472 | else | ||
2473 | init_fw_cb->ipv4_ip_opts &= | ||
2474 | cpu_to_le16(~IPOPT_ARP_REDIRECT_EN); | ||
2475 | break; | ||
2476 | case ISCSI_NET_PARAM_IPV4_TTL: | ||
2477 | if (iface_param->iface_num & 0x1) | ||
2478 | break; | ||
2479 | init_fw_cb->ipv4_ttl = iface_param->value[0]; | ||
2480 | break; | ||
1504 | default: | 2481 | default: |
1505 | ql4_printk(KERN_ERR, ha, "Unknown IPv4 param = %d\n", | 2482 | ql4_printk(KERN_ERR, ha, "Unknown IPv4 param = %d\n", |
1506 | iface_param->param); | 2483 | iface_param->param); |
@@ -1508,6 +2485,168 @@ static void qla4xxx_set_ipv4(struct scsi_qla_host *ha, | |||
1508 | } | 2485 | } |
1509 | } | 2486 | } |
1510 | 2487 | ||
2488 | static void qla4xxx_set_iscsi_param(struct scsi_qla_host *ha, | ||
2489 | struct iscsi_iface_param_info *iface_param, | ||
2490 | struct addr_ctrl_blk *init_fw_cb) | ||
2491 | { | ||
2492 | switch (iface_param->param) { | ||
2493 | case ISCSI_IFACE_PARAM_DEF_TASKMGMT_TMO: | ||
2494 | if (iface_param->iface_num & 0x1) | ||
2495 | break; | ||
2496 | init_fw_cb->def_timeout = | ||
2497 | cpu_to_le16(*(uint16_t *)iface_param->value); | ||
2498 | break; | ||
2499 | case ISCSI_IFACE_PARAM_HDRDGST_EN: | ||
2500 | if (iface_param->iface_num & 0x1) | ||
2501 | break; | ||
2502 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2503 | init_fw_cb->iscsi_opts |= | ||
2504 | cpu_to_le16(ISCSIOPTS_HEADER_DIGEST_EN); | ||
2505 | else | ||
2506 | init_fw_cb->iscsi_opts &= | ||
2507 | cpu_to_le16(~ISCSIOPTS_HEADER_DIGEST_EN); | ||
2508 | break; | ||
2509 | case ISCSI_IFACE_PARAM_DATADGST_EN: | ||
2510 | if (iface_param->iface_num & 0x1) | ||
2511 | break; | ||
2512 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2513 | init_fw_cb->iscsi_opts |= | ||
2514 | cpu_to_le16(ISCSIOPTS_DATA_DIGEST_EN); | ||
2515 | else | ||
2516 | init_fw_cb->iscsi_opts &= | ||
2517 | cpu_to_le16(~ISCSIOPTS_DATA_DIGEST_EN); | ||
2518 | break; | ||
2519 | case ISCSI_IFACE_PARAM_IMM_DATA_EN: | ||
2520 | if (iface_param->iface_num & 0x1) | ||
2521 | break; | ||
2522 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2523 | init_fw_cb->iscsi_opts |= | ||
2524 | cpu_to_le16(ISCSIOPTS_IMMEDIATE_DATA_EN); | ||
2525 | else | ||
2526 | init_fw_cb->iscsi_opts &= | ||
2527 | cpu_to_le16(~ISCSIOPTS_IMMEDIATE_DATA_EN); | ||
2528 | break; | ||
2529 | case ISCSI_IFACE_PARAM_INITIAL_R2T_EN: | ||
2530 | if (iface_param->iface_num & 0x1) | ||
2531 | break; | ||
2532 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2533 | init_fw_cb->iscsi_opts |= | ||
2534 | cpu_to_le16(ISCSIOPTS_INITIAL_R2T_EN); | ||
2535 | else | ||
2536 | init_fw_cb->iscsi_opts &= | ||
2537 | cpu_to_le16(~ISCSIOPTS_INITIAL_R2T_EN); | ||
2538 | break; | ||
2539 | case ISCSI_IFACE_PARAM_DATASEQ_INORDER_EN: | ||
2540 | if (iface_param->iface_num & 0x1) | ||
2541 | break; | ||
2542 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2543 | init_fw_cb->iscsi_opts |= | ||
2544 | cpu_to_le16(ISCSIOPTS_DATA_SEQ_INORDER_EN); | ||
2545 | else | ||
2546 | init_fw_cb->iscsi_opts &= | ||
2547 | cpu_to_le16(~ISCSIOPTS_DATA_SEQ_INORDER_EN); | ||
2548 | break; | ||
2549 | case ISCSI_IFACE_PARAM_PDU_INORDER_EN: | ||
2550 | if (iface_param->iface_num & 0x1) | ||
2551 | break; | ||
2552 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2553 | init_fw_cb->iscsi_opts |= | ||
2554 | cpu_to_le16(ISCSIOPTS_DATA_PDU_INORDER_EN); | ||
2555 | else | ||
2556 | init_fw_cb->iscsi_opts &= | ||
2557 | cpu_to_le16(~ISCSIOPTS_DATA_PDU_INORDER_EN); | ||
2558 | break; | ||
2559 | case ISCSI_IFACE_PARAM_ERL: | ||
2560 | if (iface_param->iface_num & 0x1) | ||
2561 | break; | ||
2562 | init_fw_cb->iscsi_opts &= cpu_to_le16(~ISCSIOPTS_ERL); | ||
2563 | init_fw_cb->iscsi_opts |= cpu_to_le16(iface_param->value[0] & | ||
2564 | ISCSIOPTS_ERL); | ||
2565 | break; | ||
2566 | case ISCSI_IFACE_PARAM_MAX_RECV_DLENGTH: | ||
2567 | if (iface_param->iface_num & 0x1) | ||
2568 | break; | ||
2569 | init_fw_cb->iscsi_max_pdu_size = | ||
2570 | cpu_to_le32(*(uint32_t *)iface_param->value) / | ||
2571 | BYTE_UNITS; | ||
2572 | break; | ||
2573 | case ISCSI_IFACE_PARAM_FIRST_BURST: | ||
2574 | if (iface_param->iface_num & 0x1) | ||
2575 | break; | ||
2576 | init_fw_cb->iscsi_fburst_len = | ||
2577 | cpu_to_le32(*(uint32_t *)iface_param->value) / | ||
2578 | BYTE_UNITS; | ||
2579 | break; | ||
2580 | case ISCSI_IFACE_PARAM_MAX_R2T: | ||
2581 | if (iface_param->iface_num & 0x1) | ||
2582 | break; | ||
2583 | init_fw_cb->iscsi_max_outstnd_r2t = | ||
2584 | cpu_to_le16(*(uint16_t *)iface_param->value); | ||
2585 | break; | ||
2586 | case ISCSI_IFACE_PARAM_MAX_BURST: | ||
2587 | if (iface_param->iface_num & 0x1) | ||
2588 | break; | ||
2589 | init_fw_cb->iscsi_max_burst_len = | ||
2590 | cpu_to_le32(*(uint32_t *)iface_param->value) / | ||
2591 | BYTE_UNITS; | ||
2592 | break; | ||
2593 | case ISCSI_IFACE_PARAM_CHAP_AUTH_EN: | ||
2594 | if (iface_param->iface_num & 0x1) | ||
2595 | break; | ||
2596 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2597 | init_fw_cb->iscsi_opts |= | ||
2598 | cpu_to_le16(ISCSIOPTS_CHAP_AUTH_EN); | ||
2599 | else | ||
2600 | init_fw_cb->iscsi_opts &= | ||
2601 | cpu_to_le16(~ISCSIOPTS_CHAP_AUTH_EN); | ||
2602 | break; | ||
2603 | case ISCSI_IFACE_PARAM_BIDI_CHAP_EN: | ||
2604 | if (iface_param->iface_num & 0x1) | ||
2605 | break; | ||
2606 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2607 | init_fw_cb->iscsi_opts |= | ||
2608 | cpu_to_le16(ISCSIOPTS_BIDI_CHAP_EN); | ||
2609 | else | ||
2610 | init_fw_cb->iscsi_opts &= | ||
2611 | cpu_to_le16(~ISCSIOPTS_BIDI_CHAP_EN); | ||
2612 | break; | ||
2613 | case ISCSI_IFACE_PARAM_DISCOVERY_AUTH_OPTIONAL: | ||
2614 | if (iface_param->iface_num & 0x1) | ||
2615 | break; | ||
2616 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2617 | init_fw_cb->iscsi_opts |= | ||
2618 | cpu_to_le16(ISCSIOPTS_DISCOVERY_AUTH_EN); | ||
2619 | else | ||
2620 | init_fw_cb->iscsi_opts &= | ||
2621 | cpu_to_le16(~ISCSIOPTS_DISCOVERY_AUTH_EN); | ||
2622 | break; | ||
2623 | case ISCSI_IFACE_PARAM_DISCOVERY_LOGOUT_EN: | ||
2624 | if (iface_param->iface_num & 0x1) | ||
2625 | break; | ||
2626 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2627 | init_fw_cb->iscsi_opts |= | ||
2628 | cpu_to_le16(ISCSIOPTS_DISCOVERY_LOGOUT_EN); | ||
2629 | else | ||
2630 | init_fw_cb->iscsi_opts &= | ||
2631 | cpu_to_le16(~ISCSIOPTS_DISCOVERY_LOGOUT_EN); | ||
2632 | break; | ||
2633 | case ISCSI_IFACE_PARAM_STRICT_LOGIN_COMP_EN: | ||
2634 | if (iface_param->iface_num & 0x1) | ||
2635 | break; | ||
2636 | if (iface_param->value[0] == ISCSI_NET_PARAM_ENABLE) | ||
2637 | init_fw_cb->iscsi_opts |= | ||
2638 | cpu_to_le16(ISCSIOPTS_STRICT_LOGIN_COMP_EN); | ||
2639 | else | ||
2640 | init_fw_cb->iscsi_opts &= | ||
2641 | cpu_to_le16(~ISCSIOPTS_STRICT_LOGIN_COMP_EN); | ||
2642 | break; | ||
2643 | default: | ||
2644 | ql4_printk(KERN_ERR, ha, "Unknown iscsi param = %d\n", | ||
2645 | iface_param->param); | ||
2646 | break; | ||
2647 | } | ||
2648 | } | ||
2649 | |||
1511 | static void | 2650 | static void |
1512 | qla4xxx_initcb_to_acb(struct addr_ctrl_blk *init_fw_cb) | 2651 | qla4xxx_initcb_to_acb(struct addr_ctrl_blk *init_fw_cb) |
1513 | { | 2652 | { |
@@ -1565,40 +2704,47 @@ qla4xxx_iface_set_param(struct Scsi_Host *shost, void *data, uint32_t len) | |||
1565 | nla_for_each_attr(attr, data, len, rem) { | 2704 | nla_for_each_attr(attr, data, len, rem) { |
1566 | iface_param = nla_data(attr); | 2705 | iface_param = nla_data(attr); |
1567 | 2706 | ||
1568 | if (iface_param->param_type != ISCSI_NET_PARAM) | 2707 | if (iface_param->param_type == ISCSI_NET_PARAM) { |
1569 | continue; | 2708 | switch (iface_param->iface_type) { |
1570 | 2709 | case ISCSI_IFACE_TYPE_IPV4: | |
1571 | switch (iface_param->iface_type) { | 2710 | switch (iface_param->iface_num) { |
1572 | case ISCSI_IFACE_TYPE_IPV4: | 2711 | case 0: |
1573 | switch (iface_param->iface_num) { | 2712 | qla4xxx_set_ipv4(ha, iface_param, |
1574 | case 0: | 2713 | init_fw_cb); |
1575 | qla4xxx_set_ipv4(ha, iface_param, init_fw_cb); | 2714 | break; |
1576 | break; | 2715 | default: |
1577 | default: | ||
1578 | /* Cannot have more than one IPv4 interface */ | 2716 | /* Cannot have more than one IPv4 interface */ |
1579 | ql4_printk(KERN_ERR, ha, "Invalid IPv4 iface " | 2717 | ql4_printk(KERN_ERR, ha, |
1580 | "number = %d\n", | 2718 | "Invalid IPv4 iface number = %d\n", |
1581 | iface_param->iface_num); | 2719 | iface_param->iface_num); |
2720 | break; | ||
2721 | } | ||
1582 | break; | 2722 | break; |
1583 | } | 2723 | case ISCSI_IFACE_TYPE_IPV6: |
1584 | break; | 2724 | switch (iface_param->iface_num) { |
1585 | case ISCSI_IFACE_TYPE_IPV6: | 2725 | case 0: |
1586 | switch (iface_param->iface_num) { | 2726 | case 1: |
1587 | case 0: | 2727 | qla4xxx_set_ipv6(ha, iface_param, |
1588 | case 1: | 2728 | init_fw_cb); |
1589 | qla4xxx_set_ipv6(ha, iface_param, init_fw_cb); | 2729 | break; |
2730 | default: | ||
2731 | /* Cannot have more than two IPv6 interface */ | ||
2732 | ql4_printk(KERN_ERR, ha, | ||
2733 | "Invalid IPv6 iface number = %d\n", | ||
2734 | iface_param->iface_num); | ||
2735 | break; | ||
2736 | } | ||
1590 | break; | 2737 | break; |
1591 | default: | 2738 | default: |
1592 | /* Cannot have more than two IPv6 interface */ | 2739 | ql4_printk(KERN_ERR, ha, |
1593 | ql4_printk(KERN_ERR, ha, "Invalid IPv6 iface " | 2740 | "Invalid iface type\n"); |
1594 | "number = %d\n", | ||
1595 | iface_param->iface_num); | ||
1596 | break; | 2741 | break; |
1597 | } | 2742 | } |
1598 | break; | 2743 | } else if (iface_param->param_type == ISCSI_IFACE_PARAM) { |
1599 | default: | 2744 | qla4xxx_set_iscsi_param(ha, iface_param, |
1600 | ql4_printk(KERN_ERR, ha, "Invalid iface type\n"); | 2745 | init_fw_cb); |
1601 | break; | 2746 | } else { |
2747 | continue; | ||
1602 | } | 2748 | } |
1603 | } | 2749 | } |
1604 | 2750 | ||
@@ -2538,6 +3684,7 @@ static void qla4xxx_copy_to_sess_conn_params(struct iscsi_conn *conn, | |||
2538 | unsigned long options = 0; | 3684 | unsigned long options = 0; |
2539 | uint16_t ddb_link; | 3685 | uint16_t ddb_link; |
2540 | uint16_t disc_parent; | 3686 | uint16_t disc_parent; |
3687 | char ip_addr[DDB_IPADDR_LEN]; | ||
2541 | 3688 | ||
2542 | options = le16_to_cpu(fw_ddb_entry->options); | 3689 | options = le16_to_cpu(fw_ddb_entry->options); |
2543 | conn->is_fw_assigned_ipv6 = test_bit(OPT_IS_FW_ASSIGNED_IPV6, &options); | 3690 | conn->is_fw_assigned_ipv6 = test_bit(OPT_IS_FW_ASSIGNED_IPV6, &options); |
@@ -2619,6 +3766,14 @@ static void qla4xxx_copy_to_sess_conn_params(struct iscsi_conn *conn, | |||
2619 | 3766 | ||
2620 | iscsi_set_param(conn->cls_conn, ISCSI_PARAM_TARGET_ALIAS, | 3767 | iscsi_set_param(conn->cls_conn, ISCSI_PARAM_TARGET_ALIAS, |
2621 | (char *)fw_ddb_entry->iscsi_alias, 0); | 3768 | (char *)fw_ddb_entry->iscsi_alias, 0); |
3769 | |||
3770 | options = le16_to_cpu(fw_ddb_entry->options); | ||
3771 | if (options & DDB_OPT_IPV6_DEVICE) { | ||
3772 | memset(ip_addr, 0, sizeof(ip_addr)); | ||
3773 | sprintf(ip_addr, "%pI6", fw_ddb_entry->link_local_ipv6_addr); | ||
3774 | iscsi_set_param(conn->cls_conn, ISCSI_PARAM_LOCAL_IPADDR, | ||
3775 | (char *)ip_addr, 0); | ||
3776 | } | ||
2622 | } | 3777 | } |
2623 | 3778 | ||
2624 | static void qla4xxx_copy_fwddb_param(struct scsi_qla_host *ha, | 3779 | static void qla4xxx_copy_fwddb_param(struct scsi_qla_host *ha, |
@@ -5030,64 +6185,6 @@ kset_free: | |||
5030 | } | 6185 | } |
5031 | 6186 | ||
5032 | 6187 | ||
5033 | /** | ||
5034 | * qla4xxx_create chap_list - Create CHAP list from FLASH | ||
5035 | * @ha: pointer to adapter structure | ||
5036 | * | ||
5037 | * Read flash and make a list of CHAP entries, during login when a CHAP entry | ||
5038 | * is received, it will be checked in this list. If entry exist then the CHAP | ||
5039 | * entry index is set in the DDB. If CHAP entry does not exist in this list | ||
5040 | * then a new entry is added in FLASH in CHAP table and the index obtained is | ||
5041 | * used in the DDB. | ||
5042 | **/ | ||
5043 | static void qla4xxx_create_chap_list(struct scsi_qla_host *ha) | ||
5044 | { | ||
5045 | int rval = 0; | ||
5046 | uint8_t *chap_flash_data = NULL; | ||
5047 | uint32_t offset; | ||
5048 | dma_addr_t chap_dma; | ||
5049 | uint32_t chap_size = 0; | ||
5050 | |||
5051 | if (is_qla40XX(ha)) | ||
5052 | chap_size = MAX_CHAP_ENTRIES_40XX * | ||
5053 | sizeof(struct ql4_chap_table); | ||
5054 | else /* Single region contains CHAP info for both | ||
5055 | * ports which is divided into half for each port. | ||
5056 | */ | ||
5057 | chap_size = ha->hw.flt_chap_size / 2; | ||
5058 | |||
5059 | chap_flash_data = dma_alloc_coherent(&ha->pdev->dev, chap_size, | ||
5060 | &chap_dma, GFP_KERNEL); | ||
5061 | if (!chap_flash_data) { | ||
5062 | ql4_printk(KERN_ERR, ha, "No memory for chap_flash_data\n"); | ||
5063 | return; | ||
5064 | } | ||
5065 | if (is_qla40XX(ha)) | ||
5066 | offset = FLASH_CHAP_OFFSET; | ||
5067 | else { | ||
5068 | offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2); | ||
5069 | if (ha->port_num == 1) | ||
5070 | offset += chap_size; | ||
5071 | } | ||
5072 | |||
5073 | rval = qla4xxx_get_flash(ha, chap_dma, offset, chap_size); | ||
5074 | if (rval != QLA_SUCCESS) | ||
5075 | goto exit_chap_list; | ||
5076 | |||
5077 | if (ha->chap_list == NULL) | ||
5078 | ha->chap_list = vmalloc(chap_size); | ||
5079 | if (ha->chap_list == NULL) { | ||
5080 | ql4_printk(KERN_ERR, ha, "No memory for ha->chap_list\n"); | ||
5081 | goto exit_chap_list; | ||
5082 | } | ||
5083 | |||
5084 | memcpy(ha->chap_list, chap_flash_data, chap_size); | ||
5085 | |||
5086 | exit_chap_list: | ||
5087 | dma_free_coherent(&ha->pdev->dev, chap_size, | ||
5088 | chap_flash_data, chap_dma); | ||
5089 | } | ||
5090 | |||
5091 | static void qla4xxx_get_param_ddb(struct ddb_entry *ddb_entry, | 6188 | static void qla4xxx_get_param_ddb(struct ddb_entry *ddb_entry, |
5092 | struct ql4_tuple_ddb *tddb) | 6189 | struct ql4_tuple_ddb *tddb) |
5093 | { | 6190 | { |
@@ -7521,6 +8618,9 @@ static int qla4xxx_probe_adapter(struct pci_dev *pdev, | |||
7521 | mutex_init(&ha->chap_sem); | 8618 | mutex_init(&ha->chap_sem); |
7522 | init_completion(&ha->mbx_intr_comp); | 8619 | init_completion(&ha->mbx_intr_comp); |
7523 | init_completion(&ha->disable_acb_comp); | 8620 | init_completion(&ha->disable_acb_comp); |
8621 | init_completion(&ha->idc_comp); | ||
8622 | init_completion(&ha->link_up_comp); | ||
8623 | init_completion(&ha->disable_acb_comp); | ||
7524 | 8624 | ||
7525 | spin_lock_init(&ha->hardware_lock); | 8625 | spin_lock_init(&ha->hardware_lock); |
7526 | spin_lock_init(&ha->work_lock); | 8626 | spin_lock_init(&ha->work_lock); |
diff --git a/drivers/scsi/qla4xxx/ql4_version.h b/drivers/scsi/qla4xxx/ql4_version.h index f4fef72c9bcd..9b2946658683 100644 --- a/drivers/scsi/qla4xxx/ql4_version.h +++ b/drivers/scsi/qla4xxx/ql4_version.h | |||
@@ -5,4 +5,4 @@ | |||
5 | * See LICENSE.qla4xxx for copyright and licensing details. | 5 | * See LICENSE.qla4xxx for copyright and licensing details. |
6 | */ | 6 | */ |
7 | 7 | ||
8 | #define QLA4XXX_DRIVER_VERSION "5.04.00-k1" | 8 | #define QLA4XXX_DRIVER_VERSION "5.04.00-k3" |
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index fe0bcb18fb26..d8afec8317cf 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c | |||
@@ -297,6 +297,7 @@ struct scsi_cmnd *scsi_get_command(struct scsi_device *dev, gfp_t gfp_mask) | |||
297 | 297 | ||
298 | cmd->device = dev; | 298 | cmd->device = dev; |
299 | INIT_LIST_HEAD(&cmd->list); | 299 | INIT_LIST_HEAD(&cmd->list); |
300 | INIT_DELAYED_WORK(&cmd->abort_work, scmd_eh_abort_handler); | ||
300 | spin_lock_irqsave(&dev->list_lock, flags); | 301 | spin_lock_irqsave(&dev->list_lock, flags); |
301 | list_add_tail(&cmd->list, &dev->cmd_list); | 302 | list_add_tail(&cmd->list, &dev->cmd_list); |
302 | spin_unlock_irqrestore(&dev->list_lock, flags); | 303 | spin_unlock_irqrestore(&dev->list_lock, flags); |
@@ -353,6 +354,8 @@ void scsi_put_command(struct scsi_cmnd *cmd) | |||
353 | list_del_init(&cmd->list); | 354 | list_del_init(&cmd->list); |
354 | spin_unlock_irqrestore(&cmd->device->list_lock, flags); | 355 | spin_unlock_irqrestore(&cmd->device->list_lock, flags); |
355 | 356 | ||
357 | cancel_delayed_work(&cmd->abort_work); | ||
358 | |||
356 | __scsi_put_command(cmd->device->host, cmd, &sdev->sdev_gendev); | 359 | __scsi_put_command(cmd->device->host, cmd, &sdev->sdev_gendev); |
357 | } | 360 | } |
358 | EXPORT_SYMBOL(scsi_put_command); | 361 | EXPORT_SYMBOL(scsi_put_command); |
@@ -742,15 +745,13 @@ int scsi_dispatch_cmd(struct scsi_cmnd *cmd) | |||
742 | } | 745 | } |
743 | 746 | ||
744 | /** | 747 | /** |
745 | * scsi_done - Enqueue the finished SCSI command into the done queue. | 748 | * scsi_done - Invoke completion on finished SCSI command. |
746 | * @cmd: The SCSI Command for which a low-level device driver (LLDD) gives | 749 | * @cmd: The SCSI Command for which a low-level device driver (LLDD) gives |
747 | * ownership back to SCSI Core -- i.e. the LLDD has finished with it. | 750 | * ownership back to SCSI Core -- i.e. the LLDD has finished with it. |
748 | * | 751 | * |
749 | * Description: This function is the mid-level's (SCSI Core) interrupt routine, | 752 | * Description: This function is the mid-level's (SCSI Core) interrupt routine, |
750 | * which regains ownership of the SCSI command (de facto) from a LLDD, and | 753 | * which regains ownership of the SCSI command (de facto) from a LLDD, and |
751 | * enqueues the command to the done queue for further processing. | 754 | * calls blk_complete_request() for further processing. |
752 | * | ||
753 | * This is the producer of the done queue who enqueues at the tail. | ||
754 | * | 755 | * |
755 | * This function is interrupt context safe. | 756 | * This function is interrupt context safe. |
756 | */ | 757 | */ |
diff --git a/drivers/scsi/scsi_debug.c b/drivers/scsi/scsi_debug.c index 80b8b10edf41..2decc6417518 100644 --- a/drivers/scsi/scsi_debug.c +++ b/drivers/scsi/scsi_debug.c | |||
@@ -2873,13 +2873,13 @@ static int scsi_debug_show_info(struct seq_file *m, struct Scsi_Host *host) | |||
2873 | return 0; | 2873 | return 0; |
2874 | } | 2874 | } |
2875 | 2875 | ||
2876 | static ssize_t sdebug_delay_show(struct device_driver * ddp, char * buf) | 2876 | static ssize_t delay_show(struct device_driver *ddp, char *buf) |
2877 | { | 2877 | { |
2878 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_delay); | 2878 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_delay); |
2879 | } | 2879 | } |
2880 | 2880 | ||
2881 | static ssize_t sdebug_delay_store(struct device_driver * ddp, | 2881 | static ssize_t delay_store(struct device_driver *ddp, const char *buf, |
2882 | const char * buf, size_t count) | 2882 | size_t count) |
2883 | { | 2883 | { |
2884 | int delay; | 2884 | int delay; |
2885 | char work[20]; | 2885 | char work[20]; |
@@ -2892,16 +2892,15 @@ static ssize_t sdebug_delay_store(struct device_driver * ddp, | |||
2892 | } | 2892 | } |
2893 | return -EINVAL; | 2893 | return -EINVAL; |
2894 | } | 2894 | } |
2895 | DRIVER_ATTR(delay, S_IRUGO | S_IWUSR, sdebug_delay_show, | 2895 | static DRIVER_ATTR_RW(delay); |
2896 | sdebug_delay_store); | ||
2897 | 2896 | ||
2898 | static ssize_t sdebug_opts_show(struct device_driver * ddp, char * buf) | 2897 | static ssize_t opts_show(struct device_driver *ddp, char *buf) |
2899 | { | 2898 | { |
2900 | return scnprintf(buf, PAGE_SIZE, "0x%x\n", scsi_debug_opts); | 2899 | return scnprintf(buf, PAGE_SIZE, "0x%x\n", scsi_debug_opts); |
2901 | } | 2900 | } |
2902 | 2901 | ||
2903 | static ssize_t sdebug_opts_store(struct device_driver * ddp, | 2902 | static ssize_t opts_store(struct device_driver *ddp, const char *buf, |
2904 | const char * buf, size_t count) | 2903 | size_t count) |
2905 | { | 2904 | { |
2906 | int opts; | 2905 | int opts; |
2907 | char work[20]; | 2906 | char work[20]; |
@@ -2921,15 +2920,14 @@ opts_done: | |||
2921 | scsi_debug_cmnd_count = 0; | 2920 | scsi_debug_cmnd_count = 0; |
2922 | return count; | 2921 | return count; |
2923 | } | 2922 | } |
2924 | DRIVER_ATTR(opts, S_IRUGO | S_IWUSR, sdebug_opts_show, | 2923 | static DRIVER_ATTR_RW(opts); |
2925 | sdebug_opts_store); | ||
2926 | 2924 | ||
2927 | static ssize_t sdebug_ptype_show(struct device_driver * ddp, char * buf) | 2925 | static ssize_t ptype_show(struct device_driver *ddp, char *buf) |
2928 | { | 2926 | { |
2929 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_ptype); | 2927 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_ptype); |
2930 | } | 2928 | } |
2931 | static ssize_t sdebug_ptype_store(struct device_driver * ddp, | 2929 | static ssize_t ptype_store(struct device_driver *ddp, const char *buf, |
2932 | const char * buf, size_t count) | 2930 | size_t count) |
2933 | { | 2931 | { |
2934 | int n; | 2932 | int n; |
2935 | 2933 | ||
@@ -2939,14 +2937,14 @@ static ssize_t sdebug_ptype_store(struct device_driver * ddp, | |||
2939 | } | 2937 | } |
2940 | return -EINVAL; | 2938 | return -EINVAL; |
2941 | } | 2939 | } |
2942 | DRIVER_ATTR(ptype, S_IRUGO | S_IWUSR, sdebug_ptype_show, sdebug_ptype_store); | 2940 | static DRIVER_ATTR_RW(ptype); |
2943 | 2941 | ||
2944 | static ssize_t sdebug_dsense_show(struct device_driver * ddp, char * buf) | 2942 | static ssize_t dsense_show(struct device_driver *ddp, char *buf) |
2945 | { | 2943 | { |
2946 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dsense); | 2944 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dsense); |
2947 | } | 2945 | } |
2948 | static ssize_t sdebug_dsense_store(struct device_driver * ddp, | 2946 | static ssize_t dsense_store(struct device_driver *ddp, const char *buf, |
2949 | const char * buf, size_t count) | 2947 | size_t count) |
2950 | { | 2948 | { |
2951 | int n; | 2949 | int n; |
2952 | 2950 | ||
@@ -2956,15 +2954,14 @@ static ssize_t sdebug_dsense_store(struct device_driver * ddp, | |||
2956 | } | 2954 | } |
2957 | return -EINVAL; | 2955 | return -EINVAL; |
2958 | } | 2956 | } |
2959 | DRIVER_ATTR(dsense, S_IRUGO | S_IWUSR, sdebug_dsense_show, | 2957 | static DRIVER_ATTR_RW(dsense); |
2960 | sdebug_dsense_store); | ||
2961 | 2958 | ||
2962 | static ssize_t sdebug_fake_rw_show(struct device_driver * ddp, char * buf) | 2959 | static ssize_t fake_rw_show(struct device_driver *ddp, char *buf) |
2963 | { | 2960 | { |
2964 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_fake_rw); | 2961 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_fake_rw); |
2965 | } | 2962 | } |
2966 | static ssize_t sdebug_fake_rw_store(struct device_driver * ddp, | 2963 | static ssize_t fake_rw_store(struct device_driver *ddp, const char *buf, |
2967 | const char * buf, size_t count) | 2964 | size_t count) |
2968 | { | 2965 | { |
2969 | int n; | 2966 | int n; |
2970 | 2967 | ||
@@ -2974,15 +2971,14 @@ static ssize_t sdebug_fake_rw_store(struct device_driver * ddp, | |||
2974 | } | 2971 | } |
2975 | return -EINVAL; | 2972 | return -EINVAL; |
2976 | } | 2973 | } |
2977 | DRIVER_ATTR(fake_rw, S_IRUGO | S_IWUSR, sdebug_fake_rw_show, | 2974 | static DRIVER_ATTR_RW(fake_rw); |
2978 | sdebug_fake_rw_store); | ||
2979 | 2975 | ||
2980 | static ssize_t sdebug_no_lun_0_show(struct device_driver * ddp, char * buf) | 2976 | static ssize_t no_lun_0_show(struct device_driver *ddp, char *buf) |
2981 | { | 2977 | { |
2982 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_no_lun_0); | 2978 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_no_lun_0); |
2983 | } | 2979 | } |
2984 | static ssize_t sdebug_no_lun_0_store(struct device_driver * ddp, | 2980 | static ssize_t no_lun_0_store(struct device_driver *ddp, const char *buf, |
2985 | const char * buf, size_t count) | 2981 | size_t count) |
2986 | { | 2982 | { |
2987 | int n; | 2983 | int n; |
2988 | 2984 | ||
@@ -2992,15 +2988,14 @@ static ssize_t sdebug_no_lun_0_store(struct device_driver * ddp, | |||
2992 | } | 2988 | } |
2993 | return -EINVAL; | 2989 | return -EINVAL; |
2994 | } | 2990 | } |
2995 | DRIVER_ATTR(no_lun_0, S_IRUGO | S_IWUSR, sdebug_no_lun_0_show, | 2991 | static DRIVER_ATTR_RW(no_lun_0); |
2996 | sdebug_no_lun_0_store); | ||
2997 | 2992 | ||
2998 | static ssize_t sdebug_num_tgts_show(struct device_driver * ddp, char * buf) | 2993 | static ssize_t num_tgts_show(struct device_driver *ddp, char *buf) |
2999 | { | 2994 | { |
3000 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_num_tgts); | 2995 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_num_tgts); |
3001 | } | 2996 | } |
3002 | static ssize_t sdebug_num_tgts_store(struct device_driver * ddp, | 2997 | static ssize_t num_tgts_store(struct device_driver *ddp, const char *buf, |
3003 | const char * buf, size_t count) | 2998 | size_t count) |
3004 | { | 2999 | { |
3005 | int n; | 3000 | int n; |
3006 | 3001 | ||
@@ -3011,27 +3006,26 @@ static ssize_t sdebug_num_tgts_store(struct device_driver * ddp, | |||
3011 | } | 3006 | } |
3012 | return -EINVAL; | 3007 | return -EINVAL; |
3013 | } | 3008 | } |
3014 | DRIVER_ATTR(num_tgts, S_IRUGO | S_IWUSR, sdebug_num_tgts_show, | 3009 | static DRIVER_ATTR_RW(num_tgts); |
3015 | sdebug_num_tgts_store); | ||
3016 | 3010 | ||
3017 | static ssize_t sdebug_dev_size_mb_show(struct device_driver * ddp, char * buf) | 3011 | static ssize_t dev_size_mb_show(struct device_driver *ddp, char *buf) |
3018 | { | 3012 | { |
3019 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dev_size_mb); | 3013 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dev_size_mb); |
3020 | } | 3014 | } |
3021 | DRIVER_ATTR(dev_size_mb, S_IRUGO, sdebug_dev_size_mb_show, NULL); | 3015 | static DRIVER_ATTR_RO(dev_size_mb); |
3022 | 3016 | ||
3023 | static ssize_t sdebug_num_parts_show(struct device_driver * ddp, char * buf) | 3017 | static ssize_t num_parts_show(struct device_driver *ddp, char *buf) |
3024 | { | 3018 | { |
3025 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_num_parts); | 3019 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_num_parts); |
3026 | } | 3020 | } |
3027 | DRIVER_ATTR(num_parts, S_IRUGO, sdebug_num_parts_show, NULL); | 3021 | static DRIVER_ATTR_RO(num_parts); |
3028 | 3022 | ||
3029 | static ssize_t sdebug_every_nth_show(struct device_driver * ddp, char * buf) | 3023 | static ssize_t every_nth_show(struct device_driver *ddp, char *buf) |
3030 | { | 3024 | { |
3031 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_every_nth); | 3025 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_every_nth); |
3032 | } | 3026 | } |
3033 | static ssize_t sdebug_every_nth_store(struct device_driver * ddp, | 3027 | static ssize_t every_nth_store(struct device_driver *ddp, const char *buf, |
3034 | const char * buf, size_t count) | 3028 | size_t count) |
3035 | { | 3029 | { |
3036 | int nth; | 3030 | int nth; |
3037 | 3031 | ||
@@ -3042,15 +3036,14 @@ static ssize_t sdebug_every_nth_store(struct device_driver * ddp, | |||
3042 | } | 3036 | } |
3043 | return -EINVAL; | 3037 | return -EINVAL; |
3044 | } | 3038 | } |
3045 | DRIVER_ATTR(every_nth, S_IRUGO | S_IWUSR, sdebug_every_nth_show, | 3039 | static DRIVER_ATTR_RW(every_nth); |
3046 | sdebug_every_nth_store); | ||
3047 | 3040 | ||
3048 | static ssize_t sdebug_max_luns_show(struct device_driver * ddp, char * buf) | 3041 | static ssize_t max_luns_show(struct device_driver *ddp, char *buf) |
3049 | { | 3042 | { |
3050 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_max_luns); | 3043 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_max_luns); |
3051 | } | 3044 | } |
3052 | static ssize_t sdebug_max_luns_store(struct device_driver * ddp, | 3045 | static ssize_t max_luns_store(struct device_driver *ddp, const char *buf, |
3053 | const char * buf, size_t count) | 3046 | size_t count) |
3054 | { | 3047 | { |
3055 | int n; | 3048 | int n; |
3056 | 3049 | ||
@@ -3061,15 +3054,14 @@ static ssize_t sdebug_max_luns_store(struct device_driver * ddp, | |||
3061 | } | 3054 | } |
3062 | return -EINVAL; | 3055 | return -EINVAL; |
3063 | } | 3056 | } |
3064 | DRIVER_ATTR(max_luns, S_IRUGO | S_IWUSR, sdebug_max_luns_show, | 3057 | static DRIVER_ATTR_RW(max_luns); |
3065 | sdebug_max_luns_store); | ||
3066 | 3058 | ||
3067 | static ssize_t sdebug_max_queue_show(struct device_driver * ddp, char * buf) | 3059 | static ssize_t max_queue_show(struct device_driver *ddp, char *buf) |
3068 | { | 3060 | { |
3069 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_max_queue); | 3061 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_max_queue); |
3070 | } | 3062 | } |
3071 | static ssize_t sdebug_max_queue_store(struct device_driver * ddp, | 3063 | static ssize_t max_queue_store(struct device_driver *ddp, const char *buf, |
3072 | const char * buf, size_t count) | 3064 | size_t count) |
3073 | { | 3065 | { |
3074 | int n; | 3066 | int n; |
3075 | 3067 | ||
@@ -3080,27 +3072,26 @@ static ssize_t sdebug_max_queue_store(struct device_driver * ddp, | |||
3080 | } | 3072 | } |
3081 | return -EINVAL; | 3073 | return -EINVAL; |
3082 | } | 3074 | } |
3083 | DRIVER_ATTR(max_queue, S_IRUGO | S_IWUSR, sdebug_max_queue_show, | 3075 | static DRIVER_ATTR_RW(max_queue); |
3084 | sdebug_max_queue_store); | ||
3085 | 3076 | ||
3086 | static ssize_t sdebug_no_uld_show(struct device_driver * ddp, char * buf) | 3077 | static ssize_t no_uld_show(struct device_driver *ddp, char *buf) |
3087 | { | 3078 | { |
3088 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_no_uld); | 3079 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_no_uld); |
3089 | } | 3080 | } |
3090 | DRIVER_ATTR(no_uld, S_IRUGO, sdebug_no_uld_show, NULL); | 3081 | static DRIVER_ATTR_RO(no_uld); |
3091 | 3082 | ||
3092 | static ssize_t sdebug_scsi_level_show(struct device_driver * ddp, char * buf) | 3083 | static ssize_t scsi_level_show(struct device_driver *ddp, char *buf) |
3093 | { | 3084 | { |
3094 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_scsi_level); | 3085 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_scsi_level); |
3095 | } | 3086 | } |
3096 | DRIVER_ATTR(scsi_level, S_IRUGO, sdebug_scsi_level_show, NULL); | 3087 | static DRIVER_ATTR_RO(scsi_level); |
3097 | 3088 | ||
3098 | static ssize_t sdebug_virtual_gb_show(struct device_driver * ddp, char * buf) | 3089 | static ssize_t virtual_gb_show(struct device_driver *ddp, char *buf) |
3099 | { | 3090 | { |
3100 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_virtual_gb); | 3091 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_virtual_gb); |
3101 | } | 3092 | } |
3102 | static ssize_t sdebug_virtual_gb_store(struct device_driver * ddp, | 3093 | static ssize_t virtual_gb_store(struct device_driver *ddp, const char *buf, |
3103 | const char * buf, size_t count) | 3094 | size_t count) |
3104 | { | 3095 | { |
3105 | int n; | 3096 | int n; |
3106 | 3097 | ||
@@ -3113,16 +3104,15 @@ static ssize_t sdebug_virtual_gb_store(struct device_driver * ddp, | |||
3113 | } | 3104 | } |
3114 | return -EINVAL; | 3105 | return -EINVAL; |
3115 | } | 3106 | } |
3116 | DRIVER_ATTR(virtual_gb, S_IRUGO | S_IWUSR, sdebug_virtual_gb_show, | 3107 | static DRIVER_ATTR_RW(virtual_gb); |
3117 | sdebug_virtual_gb_store); | ||
3118 | 3108 | ||
3119 | static ssize_t sdebug_add_host_show(struct device_driver * ddp, char * buf) | 3109 | static ssize_t add_host_show(struct device_driver *ddp, char *buf) |
3120 | { | 3110 | { |
3121 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_add_host); | 3111 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_add_host); |
3122 | } | 3112 | } |
3123 | 3113 | ||
3124 | static ssize_t sdebug_add_host_store(struct device_driver * ddp, | 3114 | static ssize_t add_host_store(struct device_driver *ddp, const char *buf, |
3125 | const char * buf, size_t count) | 3115 | size_t count) |
3126 | { | 3116 | { |
3127 | int delta_hosts; | 3117 | int delta_hosts; |
3128 | 3118 | ||
@@ -3139,16 +3129,14 @@ static ssize_t sdebug_add_host_store(struct device_driver * ddp, | |||
3139 | } | 3129 | } |
3140 | return count; | 3130 | return count; |
3141 | } | 3131 | } |
3142 | DRIVER_ATTR(add_host, S_IRUGO | S_IWUSR, sdebug_add_host_show, | 3132 | static DRIVER_ATTR_RW(add_host); |
3143 | sdebug_add_host_store); | ||
3144 | 3133 | ||
3145 | static ssize_t sdebug_vpd_use_hostno_show(struct device_driver * ddp, | 3134 | static ssize_t vpd_use_hostno_show(struct device_driver *ddp, char *buf) |
3146 | char * buf) | ||
3147 | { | 3135 | { |
3148 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_vpd_use_hostno); | 3136 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_vpd_use_hostno); |
3149 | } | 3137 | } |
3150 | static ssize_t sdebug_vpd_use_hostno_store(struct device_driver * ddp, | 3138 | static ssize_t vpd_use_hostno_store(struct device_driver *ddp, const char *buf, |
3151 | const char * buf, size_t count) | 3139 | size_t count) |
3152 | { | 3140 | { |
3153 | int n; | 3141 | int n; |
3154 | 3142 | ||
@@ -3158,40 +3146,39 @@ static ssize_t sdebug_vpd_use_hostno_store(struct device_driver * ddp, | |||
3158 | } | 3146 | } |
3159 | return -EINVAL; | 3147 | return -EINVAL; |
3160 | } | 3148 | } |
3161 | DRIVER_ATTR(vpd_use_hostno, S_IRUGO | S_IWUSR, sdebug_vpd_use_hostno_show, | 3149 | static DRIVER_ATTR_RW(vpd_use_hostno); |
3162 | sdebug_vpd_use_hostno_store); | ||
3163 | 3150 | ||
3164 | static ssize_t sdebug_sector_size_show(struct device_driver * ddp, char * buf) | 3151 | static ssize_t sector_size_show(struct device_driver *ddp, char *buf) |
3165 | { | 3152 | { |
3166 | return scnprintf(buf, PAGE_SIZE, "%u\n", scsi_debug_sector_size); | 3153 | return scnprintf(buf, PAGE_SIZE, "%u\n", scsi_debug_sector_size); |
3167 | } | 3154 | } |
3168 | DRIVER_ATTR(sector_size, S_IRUGO, sdebug_sector_size_show, NULL); | 3155 | static DRIVER_ATTR_RO(sector_size); |
3169 | 3156 | ||
3170 | static ssize_t sdebug_dix_show(struct device_driver *ddp, char *buf) | 3157 | static ssize_t dix_show(struct device_driver *ddp, char *buf) |
3171 | { | 3158 | { |
3172 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dix); | 3159 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dix); |
3173 | } | 3160 | } |
3174 | DRIVER_ATTR(dix, S_IRUGO, sdebug_dix_show, NULL); | 3161 | static DRIVER_ATTR_RO(dix); |
3175 | 3162 | ||
3176 | static ssize_t sdebug_dif_show(struct device_driver *ddp, char *buf) | 3163 | static ssize_t dif_show(struct device_driver *ddp, char *buf) |
3177 | { | 3164 | { |
3178 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dif); | 3165 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dif); |
3179 | } | 3166 | } |
3180 | DRIVER_ATTR(dif, S_IRUGO, sdebug_dif_show, NULL); | 3167 | static DRIVER_ATTR_RO(dif); |
3181 | 3168 | ||
3182 | static ssize_t sdebug_guard_show(struct device_driver *ddp, char *buf) | 3169 | static ssize_t guard_show(struct device_driver *ddp, char *buf) |
3183 | { | 3170 | { |
3184 | return scnprintf(buf, PAGE_SIZE, "%u\n", scsi_debug_guard); | 3171 | return scnprintf(buf, PAGE_SIZE, "%u\n", scsi_debug_guard); |
3185 | } | 3172 | } |
3186 | DRIVER_ATTR(guard, S_IRUGO, sdebug_guard_show, NULL); | 3173 | static DRIVER_ATTR_RO(guard); |
3187 | 3174 | ||
3188 | static ssize_t sdebug_ato_show(struct device_driver *ddp, char *buf) | 3175 | static ssize_t ato_show(struct device_driver *ddp, char *buf) |
3189 | { | 3176 | { |
3190 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_ato); | 3177 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_ato); |
3191 | } | 3178 | } |
3192 | DRIVER_ATTR(ato, S_IRUGO, sdebug_ato_show, NULL); | 3179 | static DRIVER_ATTR_RO(ato); |
3193 | 3180 | ||
3194 | static ssize_t sdebug_map_show(struct device_driver *ddp, char *buf) | 3181 | static ssize_t map_show(struct device_driver *ddp, char *buf) |
3195 | { | 3182 | { |
3196 | ssize_t count; | 3183 | ssize_t count; |
3197 | 3184 | ||
@@ -3206,15 +3193,14 @@ static ssize_t sdebug_map_show(struct device_driver *ddp, char *buf) | |||
3206 | 3193 | ||
3207 | return count; | 3194 | return count; |
3208 | } | 3195 | } |
3209 | DRIVER_ATTR(map, S_IRUGO, sdebug_map_show, NULL); | 3196 | static DRIVER_ATTR_RO(map); |
3210 | 3197 | ||
3211 | static ssize_t sdebug_removable_show(struct device_driver *ddp, | 3198 | static ssize_t removable_show(struct device_driver *ddp, char *buf) |
3212 | char *buf) | ||
3213 | { | 3199 | { |
3214 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_removable ? 1 : 0); | 3200 | return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_removable ? 1 : 0); |
3215 | } | 3201 | } |
3216 | static ssize_t sdebug_removable_store(struct device_driver *ddp, | 3202 | static ssize_t removable_store(struct device_driver *ddp, const char *buf, |
3217 | const char *buf, size_t count) | 3203 | size_t count) |
3218 | { | 3204 | { |
3219 | int n; | 3205 | int n; |
3220 | 3206 | ||
@@ -3224,74 +3210,43 @@ static ssize_t sdebug_removable_store(struct device_driver *ddp, | |||
3224 | } | 3210 | } |
3225 | return -EINVAL; | 3211 | return -EINVAL; |
3226 | } | 3212 | } |
3227 | DRIVER_ATTR(removable, S_IRUGO | S_IWUSR, sdebug_removable_show, | 3213 | static DRIVER_ATTR_RW(removable); |
3228 | sdebug_removable_store); | ||
3229 | 3214 | ||
3230 | 3215 | /* Note: The following array creates attribute files in the | |
3231 | /* Note: The following function creates attribute files in the | ||
3232 | /sys/bus/pseudo/drivers/scsi_debug directory. The advantage of these | 3216 | /sys/bus/pseudo/drivers/scsi_debug directory. The advantage of these |
3233 | files (over those found in the /sys/module/scsi_debug/parameters | 3217 | files (over those found in the /sys/module/scsi_debug/parameters |
3234 | directory) is that auxiliary actions can be triggered when an attribute | 3218 | directory) is that auxiliary actions can be triggered when an attribute |
3235 | is changed. For example see: sdebug_add_host_store() above. | 3219 | is changed. For example see: sdebug_add_host_store() above. |
3236 | */ | 3220 | */ |
3237 | static int do_create_driverfs_files(void) | ||
3238 | { | ||
3239 | int ret; | ||
3240 | 3221 | ||
3241 | ret = driver_create_file(&sdebug_driverfs_driver, &driver_attr_add_host); | 3222 | static struct attribute *sdebug_drv_attrs[] = { |
3242 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_delay); | 3223 | &driver_attr_delay.attr, |
3243 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_dev_size_mb); | 3224 | &driver_attr_opts.attr, |
3244 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_dsense); | 3225 | &driver_attr_ptype.attr, |
3245 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_every_nth); | 3226 | &driver_attr_dsense.attr, |
3246 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_fake_rw); | 3227 | &driver_attr_fake_rw.attr, |
3247 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_max_luns); | 3228 | &driver_attr_no_lun_0.attr, |
3248 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_max_queue); | 3229 | &driver_attr_num_tgts.attr, |
3249 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_no_lun_0); | 3230 | &driver_attr_dev_size_mb.attr, |
3250 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_no_uld); | 3231 | &driver_attr_num_parts.attr, |
3251 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_num_parts); | 3232 | &driver_attr_every_nth.attr, |
3252 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_num_tgts); | 3233 | &driver_attr_max_luns.attr, |
3253 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_ptype); | 3234 | &driver_attr_max_queue.attr, |
3254 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_opts); | 3235 | &driver_attr_no_uld.attr, |
3255 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_removable); | 3236 | &driver_attr_scsi_level.attr, |
3256 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_scsi_level); | 3237 | &driver_attr_virtual_gb.attr, |
3257 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_virtual_gb); | 3238 | &driver_attr_add_host.attr, |
3258 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_vpd_use_hostno); | 3239 | &driver_attr_vpd_use_hostno.attr, |
3259 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_sector_size); | 3240 | &driver_attr_sector_size.attr, |
3260 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_dix); | 3241 | &driver_attr_dix.attr, |
3261 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_dif); | 3242 | &driver_attr_dif.attr, |
3262 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_guard); | 3243 | &driver_attr_guard.attr, |
3263 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_ato); | 3244 | &driver_attr_ato.attr, |
3264 | ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_map); | 3245 | &driver_attr_map.attr, |
3265 | return ret; | 3246 | &driver_attr_removable.attr, |
3266 | } | 3247 | NULL, |
3267 | 3248 | }; | |
3268 | static void do_remove_driverfs_files(void) | 3249 | ATTRIBUTE_GROUPS(sdebug_drv); |
3269 | { | ||
3270 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_map); | ||
3271 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_ato); | ||
3272 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_guard); | ||
3273 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_dif); | ||
3274 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_dix); | ||
3275 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_sector_size); | ||
3276 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_vpd_use_hostno); | ||
3277 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_virtual_gb); | ||
3278 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_scsi_level); | ||
3279 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_opts); | ||
3280 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_ptype); | ||
3281 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_removable); | ||
3282 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_num_tgts); | ||
3283 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_num_parts); | ||
3284 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_no_uld); | ||
3285 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_no_lun_0); | ||
3286 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_max_queue); | ||
3287 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_max_luns); | ||
3288 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_fake_rw); | ||
3289 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_every_nth); | ||
3290 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_dsense); | ||
3291 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_dev_size_mb); | ||
3292 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_delay); | ||
3293 | driver_remove_file(&sdebug_driverfs_driver, &driver_attr_add_host); | ||
3294 | } | ||
3295 | 3250 | ||
3296 | struct device *pseudo_primary; | 3251 | struct device *pseudo_primary; |
3297 | 3252 | ||
@@ -3456,12 +3411,6 @@ static int __init scsi_debug_init(void) | |||
3456 | ret); | 3411 | ret); |
3457 | goto bus_unreg; | 3412 | goto bus_unreg; |
3458 | } | 3413 | } |
3459 | ret = do_create_driverfs_files(); | ||
3460 | if (ret < 0) { | ||
3461 | printk(KERN_WARNING "scsi_debug: driver_create_file error: %d\n", | ||
3462 | ret); | ||
3463 | goto del_files; | ||
3464 | } | ||
3465 | 3414 | ||
3466 | init_all_queued(); | 3415 | init_all_queued(); |
3467 | 3416 | ||
@@ -3482,9 +3431,6 @@ static int __init scsi_debug_init(void) | |||
3482 | } | 3431 | } |
3483 | return 0; | 3432 | return 0; |
3484 | 3433 | ||
3485 | del_files: | ||
3486 | do_remove_driverfs_files(); | ||
3487 | driver_unregister(&sdebug_driverfs_driver); | ||
3488 | bus_unreg: | 3434 | bus_unreg: |
3489 | bus_unregister(&pseudo_lld_bus); | 3435 | bus_unregister(&pseudo_lld_bus); |
3490 | dev_unreg: | 3436 | dev_unreg: |
@@ -3506,7 +3452,6 @@ static void __exit scsi_debug_exit(void) | |||
3506 | stop_all_queued(); | 3452 | stop_all_queued(); |
3507 | for (; k; k--) | 3453 | for (; k; k--) |
3508 | sdebug_remove_adapter(); | 3454 | sdebug_remove_adapter(); |
3509 | do_remove_driverfs_files(); | ||
3510 | driver_unregister(&sdebug_driverfs_driver); | 3455 | driver_unregister(&sdebug_driverfs_driver); |
3511 | bus_unregister(&pseudo_lld_bus); | 3456 | bus_unregister(&pseudo_lld_bus); |
3512 | root_device_unregister(pseudo_primary); | 3457 | root_device_unregister(pseudo_primary); |
@@ -4096,4 +4041,5 @@ static struct bus_type pseudo_lld_bus = { | |||
4096 | .match = pseudo_lld_bus_match, | 4041 | .match = pseudo_lld_bus_match, |
4097 | .probe = sdebug_driver_probe, | 4042 | .probe = sdebug_driver_probe, |
4098 | .remove = sdebug_driver_remove, | 4043 | .remove = sdebug_driver_remove, |
4044 | .drv_groups = sdebug_drv_groups, | ||
4099 | }; | 4045 | }; |
diff --git a/drivers/scsi/scsi_error.c b/drivers/scsi/scsi_error.c index e8bee9f0ad0f..78b004da2885 100644 --- a/drivers/scsi/scsi_error.c +++ b/drivers/scsi/scsi_error.c | |||
@@ -53,6 +53,8 @@ static void scsi_eh_done(struct scsi_cmnd *scmd); | |||
53 | #define HOST_RESET_SETTLE_TIME (10) | 53 | #define HOST_RESET_SETTLE_TIME (10) |
54 | 54 | ||
55 | static int scsi_eh_try_stu(struct scsi_cmnd *scmd); | 55 | static int scsi_eh_try_stu(struct scsi_cmnd *scmd); |
56 | static int scsi_try_to_abort_cmd(struct scsi_host_template *, | ||
57 | struct scsi_cmnd *); | ||
56 | 58 | ||
57 | /* called with shost->host_lock held */ | 59 | /* called with shost->host_lock held */ |
58 | void scsi_eh_wakeup(struct Scsi_Host *shost) | 60 | void scsi_eh_wakeup(struct Scsi_Host *shost) |
@@ -89,17 +91,138 @@ EXPORT_SYMBOL_GPL(scsi_schedule_eh); | |||
89 | 91 | ||
90 | static int scsi_host_eh_past_deadline(struct Scsi_Host *shost) | 92 | static int scsi_host_eh_past_deadline(struct Scsi_Host *shost) |
91 | { | 93 | { |
92 | if (!shost->last_reset || !shost->eh_deadline) | 94 | if (!shost->last_reset || shost->eh_deadline == -1) |
93 | return 0; | 95 | return 0; |
94 | 96 | ||
95 | if (time_before(jiffies, | 97 | /* |
96 | shost->last_reset + shost->eh_deadline)) | 98 | * 32bit accesses are guaranteed to be atomic |
99 | * (on all supported architectures), so instead | ||
100 | * of using a spinlock we can as well double check | ||
101 | * if eh_deadline has been set to 'off' during the | ||
102 | * time_before call. | ||
103 | */ | ||
104 | if (time_before(jiffies, shost->last_reset + shost->eh_deadline) && | ||
105 | shost->eh_deadline > -1) | ||
97 | return 0; | 106 | return 0; |
98 | 107 | ||
99 | return 1; | 108 | return 1; |
100 | } | 109 | } |
101 | 110 | ||
102 | /** | 111 | /** |
112 | * scmd_eh_abort_handler - Handle command aborts | ||
113 | * @work: command to be aborted. | ||
114 | */ | ||
115 | void | ||
116 | scmd_eh_abort_handler(struct work_struct *work) | ||
117 | { | ||
118 | struct scsi_cmnd *scmd = | ||
119 | container_of(work, struct scsi_cmnd, abort_work.work); | ||
120 | struct scsi_device *sdev = scmd->device; | ||
121 | int rtn; | ||
122 | |||
123 | if (scsi_host_eh_past_deadline(sdev->host)) { | ||
124 | SCSI_LOG_ERROR_RECOVERY(3, | ||
125 | scmd_printk(KERN_INFO, scmd, | ||
126 | "scmd %p eh timeout, not aborting\n", | ||
127 | scmd)); | ||
128 | } else { | ||
129 | SCSI_LOG_ERROR_RECOVERY(3, | ||
130 | scmd_printk(KERN_INFO, scmd, | ||
131 | "aborting command %p\n", scmd)); | ||
132 | rtn = scsi_try_to_abort_cmd(sdev->host->hostt, scmd); | ||
133 | if (rtn == SUCCESS) { | ||
134 | scmd->result |= DID_TIME_OUT << 16; | ||
135 | if (scsi_host_eh_past_deadline(sdev->host)) { | ||
136 | SCSI_LOG_ERROR_RECOVERY(3, | ||
137 | scmd_printk(KERN_INFO, scmd, | ||
138 | "scmd %p eh timeout, " | ||
139 | "not retrying aborted " | ||
140 | "command\n", scmd)); | ||
141 | } else if (!scsi_noretry_cmd(scmd) && | ||
142 | (++scmd->retries <= scmd->allowed)) { | ||
143 | SCSI_LOG_ERROR_RECOVERY(3, | ||
144 | scmd_printk(KERN_WARNING, scmd, | ||
145 | "scmd %p retry " | ||
146 | "aborted command\n", scmd)); | ||
147 | scsi_queue_insert(scmd, SCSI_MLQUEUE_EH_RETRY); | ||
148 | return; | ||
149 | } else { | ||
150 | SCSI_LOG_ERROR_RECOVERY(3, | ||
151 | scmd_printk(KERN_WARNING, scmd, | ||
152 | "scmd %p finish " | ||
153 | "aborted command\n", scmd)); | ||
154 | scsi_finish_command(scmd); | ||
155 | return; | ||
156 | } | ||
157 | } else { | ||
158 | SCSI_LOG_ERROR_RECOVERY(3, | ||
159 | scmd_printk(KERN_INFO, scmd, | ||
160 | "scmd %p abort failed, rtn %d\n", | ||
161 | scmd, rtn)); | ||
162 | } | ||
163 | } | ||
164 | |||
165 | if (!scsi_eh_scmd_add(scmd, 0)) { | ||
166 | SCSI_LOG_ERROR_RECOVERY(3, | ||
167 | scmd_printk(KERN_WARNING, scmd, | ||
168 | "scmd %p terminate " | ||
169 | "aborted command\n", scmd)); | ||
170 | scmd->result |= DID_TIME_OUT << 16; | ||
171 | scsi_finish_command(scmd); | ||
172 | } | ||
173 | } | ||
174 | |||
175 | /** | ||
176 | * scsi_abort_command - schedule a command abort | ||
177 | * @scmd: scmd to abort. | ||
178 | * | ||
179 | * We only need to abort commands after a command timeout | ||
180 | */ | ||
181 | static int | ||
182 | scsi_abort_command(struct scsi_cmnd *scmd) | ||
183 | { | ||
184 | struct scsi_device *sdev = scmd->device; | ||
185 | struct Scsi_Host *shost = sdev->host; | ||
186 | unsigned long flags; | ||
187 | |||
188 | if (scmd->eh_eflags & SCSI_EH_ABORT_SCHEDULED) { | ||
189 | /* | ||
190 | * Retry after abort failed, escalate to next level. | ||
191 | */ | ||
192 | SCSI_LOG_ERROR_RECOVERY(3, | ||
193 | scmd_printk(KERN_INFO, scmd, | ||
194 | "scmd %p previous abort failed\n", scmd)); | ||
195 | cancel_delayed_work(&scmd->abort_work); | ||
196 | return FAILED; | ||
197 | } | ||
198 | |||
199 | /* | ||
200 | * Do not try a command abort if | ||
201 | * SCSI EH has already started. | ||
202 | */ | ||
203 | spin_lock_irqsave(shost->host_lock, flags); | ||
204 | if (scsi_host_in_recovery(shost)) { | ||
205 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
206 | SCSI_LOG_ERROR_RECOVERY(3, | ||
207 | scmd_printk(KERN_INFO, scmd, | ||
208 | "scmd %p not aborting, host in recovery\n", | ||
209 | scmd)); | ||
210 | return FAILED; | ||
211 | } | ||
212 | |||
213 | if (shost->eh_deadline != -1 && !shost->last_reset) | ||
214 | shost->last_reset = jiffies; | ||
215 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
216 | |||
217 | scmd->eh_eflags |= SCSI_EH_ABORT_SCHEDULED; | ||
218 | SCSI_LOG_ERROR_RECOVERY(3, | ||
219 | scmd_printk(KERN_INFO, scmd, | ||
220 | "scmd %p abort scheduled\n", scmd)); | ||
221 | queue_delayed_work(shost->tmf_work_q, &scmd->abort_work, HZ / 100); | ||
222 | return SUCCESS; | ||
223 | } | ||
224 | |||
225 | /** | ||
103 | * scsi_eh_scmd_add - add scsi cmd to error handling. | 226 | * scsi_eh_scmd_add - add scsi cmd to error handling. |
104 | * @scmd: scmd to run eh on. | 227 | * @scmd: scmd to run eh on. |
105 | * @eh_flag: optional SCSI_EH flag. | 228 | * @eh_flag: optional SCSI_EH flag. |
@@ -121,10 +244,12 @@ int scsi_eh_scmd_add(struct scsi_cmnd *scmd, int eh_flag) | |||
121 | if (scsi_host_set_state(shost, SHOST_CANCEL_RECOVERY)) | 244 | if (scsi_host_set_state(shost, SHOST_CANCEL_RECOVERY)) |
122 | goto out_unlock; | 245 | goto out_unlock; |
123 | 246 | ||
124 | if (shost->eh_deadline && !shost->last_reset) | 247 | if (shost->eh_deadline != -1 && !shost->last_reset) |
125 | shost->last_reset = jiffies; | 248 | shost->last_reset = jiffies; |
126 | 249 | ||
127 | ret = 1; | 250 | ret = 1; |
251 | if (scmd->eh_eflags & SCSI_EH_ABORT_SCHEDULED) | ||
252 | eh_flag &= ~SCSI_EH_CANCEL_CMD; | ||
128 | scmd->eh_eflags |= eh_flag; | 253 | scmd->eh_eflags |= eh_flag; |
129 | list_add_tail(&scmd->eh_entry, &shost->eh_cmd_q); | 254 | list_add_tail(&scmd->eh_entry, &shost->eh_cmd_q); |
130 | shost->host_failed++; | 255 | shost->host_failed++; |
@@ -153,7 +278,7 @@ enum blk_eh_timer_return scsi_times_out(struct request *req) | |||
153 | trace_scsi_dispatch_cmd_timeout(scmd); | 278 | trace_scsi_dispatch_cmd_timeout(scmd); |
154 | scsi_log_completion(scmd, TIMEOUT_ERROR); | 279 | scsi_log_completion(scmd, TIMEOUT_ERROR); |
155 | 280 | ||
156 | if (host->eh_deadline && !host->last_reset) | 281 | if (host->eh_deadline != -1 && !host->last_reset) |
157 | host->last_reset = jiffies; | 282 | host->last_reset = jiffies; |
158 | 283 | ||
159 | if (host->transportt->eh_timed_out) | 284 | if (host->transportt->eh_timed_out) |
@@ -161,6 +286,10 @@ enum blk_eh_timer_return scsi_times_out(struct request *req) | |||
161 | else if (host->hostt->eh_timed_out) | 286 | else if (host->hostt->eh_timed_out) |
162 | rtn = host->hostt->eh_timed_out(scmd); | 287 | rtn = host->hostt->eh_timed_out(scmd); |
163 | 288 | ||
289 | if (rtn == BLK_EH_NOT_HANDLED && !host->hostt->no_async_abort) | ||
290 | if (scsi_abort_command(scmd) == SUCCESS) | ||
291 | return BLK_EH_NOT_HANDLED; | ||
292 | |||
164 | scmd->result |= DID_TIME_OUT << 16; | 293 | scmd->result |= DID_TIME_OUT << 16; |
165 | 294 | ||
166 | if (unlikely(rtn == BLK_EH_NOT_HANDLED && | 295 | if (unlikely(rtn == BLK_EH_NOT_HANDLED && |
@@ -941,12 +1070,6 @@ retry: | |||
941 | 1070 | ||
942 | scsi_eh_restore_cmnd(scmd, &ses); | 1071 | scsi_eh_restore_cmnd(scmd, &ses); |
943 | 1072 | ||
944 | if (scmd->request->cmd_type != REQ_TYPE_BLOCK_PC) { | ||
945 | struct scsi_driver *sdrv = scsi_cmd_to_driver(scmd); | ||
946 | if (sdrv->eh_action) | ||
947 | rtn = sdrv->eh_action(scmd, cmnd, cmnd_size, rtn); | ||
948 | } | ||
949 | |||
950 | return rtn; | 1073 | return rtn; |
951 | } | 1074 | } |
952 | 1075 | ||
@@ -964,6 +1087,16 @@ static int scsi_request_sense(struct scsi_cmnd *scmd) | |||
964 | return scsi_send_eh_cmnd(scmd, NULL, 0, scmd->device->eh_timeout, ~0); | 1087 | return scsi_send_eh_cmnd(scmd, NULL, 0, scmd->device->eh_timeout, ~0); |
965 | } | 1088 | } |
966 | 1089 | ||
1090 | static int scsi_eh_action(struct scsi_cmnd *scmd, int rtn) | ||
1091 | { | ||
1092 | if (scmd->request->cmd_type != REQ_TYPE_BLOCK_PC) { | ||
1093 | struct scsi_driver *sdrv = scsi_cmd_to_driver(scmd); | ||
1094 | if (sdrv->eh_action) | ||
1095 | rtn = sdrv->eh_action(scmd, rtn); | ||
1096 | } | ||
1097 | return rtn; | ||
1098 | } | ||
1099 | |||
967 | /** | 1100 | /** |
968 | * scsi_eh_finish_cmd - Handle a cmd that eh is finished with. | 1101 | * scsi_eh_finish_cmd - Handle a cmd that eh is finished with. |
969 | * @scmd: Original SCSI cmd that eh has finished. | 1102 | * @scmd: Original SCSI cmd that eh has finished. |
@@ -1010,7 +1143,6 @@ int scsi_eh_get_sense(struct list_head *work_q, | |||
1010 | struct scsi_cmnd *scmd, *next; | 1143 | struct scsi_cmnd *scmd, *next; |
1011 | struct Scsi_Host *shost; | 1144 | struct Scsi_Host *shost; |
1012 | int rtn; | 1145 | int rtn; |
1013 | unsigned long flags; | ||
1014 | 1146 | ||
1015 | list_for_each_entry_safe(scmd, next, work_q, eh_entry) { | 1147 | list_for_each_entry_safe(scmd, next, work_q, eh_entry) { |
1016 | if ((scmd->eh_eflags & SCSI_EH_CANCEL_CMD) || | 1148 | if ((scmd->eh_eflags & SCSI_EH_CANCEL_CMD) || |
@@ -1018,16 +1150,13 @@ int scsi_eh_get_sense(struct list_head *work_q, | |||
1018 | continue; | 1150 | continue; |
1019 | 1151 | ||
1020 | shost = scmd->device->host; | 1152 | shost = scmd->device->host; |
1021 | spin_lock_irqsave(shost->host_lock, flags); | ||
1022 | if (scsi_host_eh_past_deadline(shost)) { | 1153 | if (scsi_host_eh_past_deadline(shost)) { |
1023 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1024 | SCSI_LOG_ERROR_RECOVERY(3, | 1154 | SCSI_LOG_ERROR_RECOVERY(3, |
1025 | shost_printk(KERN_INFO, shost, | 1155 | shost_printk(KERN_INFO, shost, |
1026 | "skip %s, past eh deadline\n", | 1156 | "skip %s, past eh deadline\n", |
1027 | __func__)); | 1157 | __func__)); |
1028 | break; | 1158 | break; |
1029 | } | 1159 | } |
1030 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1031 | SCSI_LOG_ERROR_RECOVERY(2, scmd_printk(KERN_INFO, scmd, | 1160 | SCSI_LOG_ERROR_RECOVERY(2, scmd_printk(KERN_INFO, scmd, |
1032 | "%s: requesting sense\n", | 1161 | "%s: requesting sense\n", |
1033 | current->comm)); | 1162 | current->comm)); |
@@ -1113,26 +1242,21 @@ static int scsi_eh_test_devices(struct list_head *cmd_list, | |||
1113 | struct scsi_cmnd *scmd, *next; | 1242 | struct scsi_cmnd *scmd, *next; |
1114 | struct scsi_device *sdev; | 1243 | struct scsi_device *sdev; |
1115 | int finish_cmds; | 1244 | int finish_cmds; |
1116 | unsigned long flags; | ||
1117 | 1245 | ||
1118 | while (!list_empty(cmd_list)) { | 1246 | while (!list_empty(cmd_list)) { |
1119 | scmd = list_entry(cmd_list->next, struct scsi_cmnd, eh_entry); | 1247 | scmd = list_entry(cmd_list->next, struct scsi_cmnd, eh_entry); |
1120 | sdev = scmd->device; | 1248 | sdev = scmd->device; |
1121 | 1249 | ||
1122 | if (!try_stu) { | 1250 | if (!try_stu) { |
1123 | spin_lock_irqsave(sdev->host->host_lock, flags); | ||
1124 | if (scsi_host_eh_past_deadline(sdev->host)) { | 1251 | if (scsi_host_eh_past_deadline(sdev->host)) { |
1125 | /* Push items back onto work_q */ | 1252 | /* Push items back onto work_q */ |
1126 | list_splice_init(cmd_list, work_q); | 1253 | list_splice_init(cmd_list, work_q); |
1127 | spin_unlock_irqrestore(sdev->host->host_lock, | ||
1128 | flags); | ||
1129 | SCSI_LOG_ERROR_RECOVERY(3, | 1254 | SCSI_LOG_ERROR_RECOVERY(3, |
1130 | shost_printk(KERN_INFO, sdev->host, | 1255 | shost_printk(KERN_INFO, sdev->host, |
1131 | "skip %s, past eh deadline", | 1256 | "skip %s, past eh deadline", |
1132 | __func__)); | 1257 | __func__)); |
1133 | break; | 1258 | break; |
1134 | } | 1259 | } |
1135 | spin_unlock_irqrestore(sdev->host->host_lock, flags); | ||
1136 | } | 1260 | } |
1137 | 1261 | ||
1138 | finish_cmds = !scsi_device_online(scmd->device) || | 1262 | finish_cmds = !scsi_device_online(scmd->device) || |
@@ -1142,7 +1266,9 @@ static int scsi_eh_test_devices(struct list_head *cmd_list, | |||
1142 | 1266 | ||
1143 | list_for_each_entry_safe(scmd, next, cmd_list, eh_entry) | 1267 | list_for_each_entry_safe(scmd, next, cmd_list, eh_entry) |
1144 | if (scmd->device == sdev) { | 1268 | if (scmd->device == sdev) { |
1145 | if (finish_cmds) | 1269 | if (finish_cmds && |
1270 | (try_stu || | ||
1271 | scsi_eh_action(scmd, SUCCESS) == SUCCESS)) | ||
1146 | scsi_eh_finish_cmd(scmd, done_q); | 1272 | scsi_eh_finish_cmd(scmd, done_q); |
1147 | else | 1273 | else |
1148 | list_move_tail(&scmd->eh_entry, work_q); | 1274 | list_move_tail(&scmd->eh_entry, work_q); |
@@ -1171,15 +1297,12 @@ static int scsi_eh_abort_cmds(struct list_head *work_q, | |||
1171 | LIST_HEAD(check_list); | 1297 | LIST_HEAD(check_list); |
1172 | int rtn; | 1298 | int rtn; |
1173 | struct Scsi_Host *shost; | 1299 | struct Scsi_Host *shost; |
1174 | unsigned long flags; | ||
1175 | 1300 | ||
1176 | list_for_each_entry_safe(scmd, next, work_q, eh_entry) { | 1301 | list_for_each_entry_safe(scmd, next, work_q, eh_entry) { |
1177 | if (!(scmd->eh_eflags & SCSI_EH_CANCEL_CMD)) | 1302 | if (!(scmd->eh_eflags & SCSI_EH_CANCEL_CMD)) |
1178 | continue; | 1303 | continue; |
1179 | shost = scmd->device->host; | 1304 | shost = scmd->device->host; |
1180 | spin_lock_irqsave(shost->host_lock, flags); | ||
1181 | if (scsi_host_eh_past_deadline(shost)) { | 1305 | if (scsi_host_eh_past_deadline(shost)) { |
1182 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1183 | list_splice_init(&check_list, work_q); | 1306 | list_splice_init(&check_list, work_q); |
1184 | SCSI_LOG_ERROR_RECOVERY(3, | 1307 | SCSI_LOG_ERROR_RECOVERY(3, |
1185 | shost_printk(KERN_INFO, shost, | 1308 | shost_printk(KERN_INFO, shost, |
@@ -1187,7 +1310,6 @@ static int scsi_eh_abort_cmds(struct list_head *work_q, | |||
1187 | __func__)); | 1310 | __func__)); |
1188 | return list_empty(work_q); | 1311 | return list_empty(work_q); |
1189 | } | 1312 | } |
1190 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1191 | SCSI_LOG_ERROR_RECOVERY(3, printk("%s: aborting cmd:" | 1313 | SCSI_LOG_ERROR_RECOVERY(3, printk("%s: aborting cmd:" |
1192 | "0x%p\n", current->comm, | 1314 | "0x%p\n", current->comm, |
1193 | scmd)); | 1315 | scmd)); |
@@ -1251,19 +1373,15 @@ static int scsi_eh_stu(struct Scsi_Host *shost, | |||
1251 | { | 1373 | { |
1252 | struct scsi_cmnd *scmd, *stu_scmd, *next; | 1374 | struct scsi_cmnd *scmd, *stu_scmd, *next; |
1253 | struct scsi_device *sdev; | 1375 | struct scsi_device *sdev; |
1254 | unsigned long flags; | ||
1255 | 1376 | ||
1256 | shost_for_each_device(sdev, shost) { | 1377 | shost_for_each_device(sdev, shost) { |
1257 | spin_lock_irqsave(shost->host_lock, flags); | ||
1258 | if (scsi_host_eh_past_deadline(shost)) { | 1378 | if (scsi_host_eh_past_deadline(shost)) { |
1259 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1260 | SCSI_LOG_ERROR_RECOVERY(3, | 1379 | SCSI_LOG_ERROR_RECOVERY(3, |
1261 | shost_printk(KERN_INFO, shost, | 1380 | shost_printk(KERN_INFO, shost, |
1262 | "skip %s, past eh deadline\n", | 1381 | "skip %s, past eh deadline\n", |
1263 | __func__)); | 1382 | __func__)); |
1264 | break; | 1383 | break; |
1265 | } | 1384 | } |
1266 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1267 | stu_scmd = NULL; | 1385 | stu_scmd = NULL; |
1268 | list_for_each_entry(scmd, work_q, eh_entry) | 1386 | list_for_each_entry(scmd, work_q, eh_entry) |
1269 | if (scmd->device == sdev && SCSI_SENSE_VALID(scmd) && | 1387 | if (scmd->device == sdev && SCSI_SENSE_VALID(scmd) && |
@@ -1283,7 +1401,8 @@ static int scsi_eh_stu(struct Scsi_Host *shost, | |||
1283 | !scsi_eh_tur(stu_scmd)) { | 1401 | !scsi_eh_tur(stu_scmd)) { |
1284 | list_for_each_entry_safe(scmd, next, | 1402 | list_for_each_entry_safe(scmd, next, |
1285 | work_q, eh_entry) { | 1403 | work_q, eh_entry) { |
1286 | if (scmd->device == sdev) | 1404 | if (scmd->device == sdev && |
1405 | scsi_eh_action(scmd, SUCCESS) == SUCCESS) | ||
1287 | scsi_eh_finish_cmd(scmd, done_q); | 1406 | scsi_eh_finish_cmd(scmd, done_q); |
1288 | } | 1407 | } |
1289 | } | 1408 | } |
@@ -1316,20 +1435,16 @@ static int scsi_eh_bus_device_reset(struct Scsi_Host *shost, | |||
1316 | { | 1435 | { |
1317 | struct scsi_cmnd *scmd, *bdr_scmd, *next; | 1436 | struct scsi_cmnd *scmd, *bdr_scmd, *next; |
1318 | struct scsi_device *sdev; | 1437 | struct scsi_device *sdev; |
1319 | unsigned long flags; | ||
1320 | int rtn; | 1438 | int rtn; |
1321 | 1439 | ||
1322 | shost_for_each_device(sdev, shost) { | 1440 | shost_for_each_device(sdev, shost) { |
1323 | spin_lock_irqsave(shost->host_lock, flags); | ||
1324 | if (scsi_host_eh_past_deadline(shost)) { | 1441 | if (scsi_host_eh_past_deadline(shost)) { |
1325 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1326 | SCSI_LOG_ERROR_RECOVERY(3, | 1442 | SCSI_LOG_ERROR_RECOVERY(3, |
1327 | shost_printk(KERN_INFO, shost, | 1443 | shost_printk(KERN_INFO, shost, |
1328 | "skip %s, past eh deadline\n", | 1444 | "skip %s, past eh deadline\n", |
1329 | __func__)); | 1445 | __func__)); |
1330 | break; | 1446 | break; |
1331 | } | 1447 | } |
1332 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1333 | bdr_scmd = NULL; | 1448 | bdr_scmd = NULL; |
1334 | list_for_each_entry(scmd, work_q, eh_entry) | 1449 | list_for_each_entry(scmd, work_q, eh_entry) |
1335 | if (scmd->device == sdev) { | 1450 | if (scmd->device == sdev) { |
@@ -1350,7 +1465,8 @@ static int scsi_eh_bus_device_reset(struct Scsi_Host *shost, | |||
1350 | !scsi_eh_tur(bdr_scmd)) { | 1465 | !scsi_eh_tur(bdr_scmd)) { |
1351 | list_for_each_entry_safe(scmd, next, | 1466 | list_for_each_entry_safe(scmd, next, |
1352 | work_q, eh_entry) { | 1467 | work_q, eh_entry) { |
1353 | if (scmd->device == sdev) | 1468 | if (scmd->device == sdev && |
1469 | scsi_eh_action(scmd, rtn) != FAILED) | ||
1354 | scsi_eh_finish_cmd(scmd, | 1470 | scsi_eh_finish_cmd(scmd, |
1355 | done_q); | 1471 | done_q); |
1356 | } | 1472 | } |
@@ -1389,11 +1505,8 @@ static int scsi_eh_target_reset(struct Scsi_Host *shost, | |||
1389 | struct scsi_cmnd *next, *scmd; | 1505 | struct scsi_cmnd *next, *scmd; |
1390 | int rtn; | 1506 | int rtn; |
1391 | unsigned int id; | 1507 | unsigned int id; |
1392 | unsigned long flags; | ||
1393 | 1508 | ||
1394 | spin_lock_irqsave(shost->host_lock, flags); | ||
1395 | if (scsi_host_eh_past_deadline(shost)) { | 1509 | if (scsi_host_eh_past_deadline(shost)) { |
1396 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1397 | /* push back on work queue for further processing */ | 1510 | /* push back on work queue for further processing */ |
1398 | list_splice_init(&check_list, work_q); | 1511 | list_splice_init(&check_list, work_q); |
1399 | list_splice_init(&tmp_list, work_q); | 1512 | list_splice_init(&tmp_list, work_q); |
@@ -1403,7 +1516,6 @@ static int scsi_eh_target_reset(struct Scsi_Host *shost, | |||
1403 | __func__)); | 1516 | __func__)); |
1404 | return list_empty(work_q); | 1517 | return list_empty(work_q); |
1405 | } | 1518 | } |
1406 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1407 | 1519 | ||
1408 | scmd = list_entry(tmp_list.next, struct scsi_cmnd, eh_entry); | 1520 | scmd = list_entry(tmp_list.next, struct scsi_cmnd, eh_entry); |
1409 | id = scmd_id(scmd); | 1521 | id = scmd_id(scmd); |
@@ -1448,7 +1560,6 @@ static int scsi_eh_bus_reset(struct Scsi_Host *shost, | |||
1448 | LIST_HEAD(check_list); | 1560 | LIST_HEAD(check_list); |
1449 | unsigned int channel; | 1561 | unsigned int channel; |
1450 | int rtn; | 1562 | int rtn; |
1451 | unsigned long flags; | ||
1452 | 1563 | ||
1453 | /* | 1564 | /* |
1454 | * we really want to loop over the various channels, and do this on | 1565 | * we really want to loop over the various channels, and do this on |
@@ -1458,9 +1569,7 @@ static int scsi_eh_bus_reset(struct Scsi_Host *shost, | |||
1458 | */ | 1569 | */ |
1459 | 1570 | ||
1460 | for (channel = 0; channel <= shost->max_channel; channel++) { | 1571 | for (channel = 0; channel <= shost->max_channel; channel++) { |
1461 | spin_lock_irqsave(shost->host_lock, flags); | ||
1462 | if (scsi_host_eh_past_deadline(shost)) { | 1572 | if (scsi_host_eh_past_deadline(shost)) { |
1463 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1464 | list_splice_init(&check_list, work_q); | 1573 | list_splice_init(&check_list, work_q); |
1465 | SCSI_LOG_ERROR_RECOVERY(3, | 1574 | SCSI_LOG_ERROR_RECOVERY(3, |
1466 | shost_printk(KERN_INFO, shost, | 1575 | shost_printk(KERN_INFO, shost, |
@@ -1468,7 +1577,6 @@ static int scsi_eh_bus_reset(struct Scsi_Host *shost, | |||
1468 | __func__)); | 1577 | __func__)); |
1469 | return list_empty(work_q); | 1578 | return list_empty(work_q); |
1470 | } | 1579 | } |
1471 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
1472 | 1580 | ||
1473 | chan_scmd = NULL; | 1581 | chan_scmd = NULL; |
1474 | list_for_each_entry(scmd, work_q, eh_entry) { | 1582 | list_for_each_entry(scmd, work_q, eh_entry) { |
@@ -1569,7 +1677,7 @@ static void scsi_eh_offline_sdevs(struct list_head *work_q, | |||
1569 | } | 1677 | } |
1570 | 1678 | ||
1571 | /** | 1679 | /** |
1572 | * scsi_noretry_cmd - determinte if command should be failed fast | 1680 | * scsi_noretry_cmd - determine if command should be failed fast |
1573 | * @scmd: SCSI cmd to examine. | 1681 | * @scmd: SCSI cmd to examine. |
1574 | */ | 1682 | */ |
1575 | int scsi_noretry_cmd(struct scsi_cmnd *scmd) | 1683 | int scsi_noretry_cmd(struct scsi_cmnd *scmd) |
@@ -1577,6 +1685,8 @@ int scsi_noretry_cmd(struct scsi_cmnd *scmd) | |||
1577 | switch (host_byte(scmd->result)) { | 1685 | switch (host_byte(scmd->result)) { |
1578 | case DID_OK: | 1686 | case DID_OK: |
1579 | break; | 1687 | break; |
1688 | case DID_TIME_OUT: | ||
1689 | goto check_type; | ||
1580 | case DID_BUS_BUSY: | 1690 | case DID_BUS_BUSY: |
1581 | return (scmd->request->cmd_flags & REQ_FAILFAST_TRANSPORT); | 1691 | return (scmd->request->cmd_flags & REQ_FAILFAST_TRANSPORT); |
1582 | case DID_PARITY: | 1692 | case DID_PARITY: |
@@ -1590,18 +1700,19 @@ int scsi_noretry_cmd(struct scsi_cmnd *scmd) | |||
1590 | return (scmd->request->cmd_flags & REQ_FAILFAST_DRIVER); | 1700 | return (scmd->request->cmd_flags & REQ_FAILFAST_DRIVER); |
1591 | } | 1701 | } |
1592 | 1702 | ||
1593 | switch (status_byte(scmd->result)) { | 1703 | if (status_byte(scmd->result) != CHECK_CONDITION) |
1594 | case CHECK_CONDITION: | 1704 | return 0; |
1595 | /* | ||
1596 | * assume caller has checked sense and determinted | ||
1597 | * the check condition was retryable. | ||
1598 | */ | ||
1599 | if (scmd->request->cmd_flags & REQ_FAILFAST_DEV || | ||
1600 | scmd->request->cmd_type == REQ_TYPE_BLOCK_PC) | ||
1601 | return 1; | ||
1602 | } | ||
1603 | 1705 | ||
1604 | return 0; | 1706 | check_type: |
1707 | /* | ||
1708 | * assume caller has checked sense and determined | ||
1709 | * the check condition was retryable. | ||
1710 | */ | ||
1711 | if (scmd->request->cmd_flags & REQ_FAILFAST_DEV || | ||
1712 | scmd->request->cmd_type == REQ_TYPE_BLOCK_PC) | ||
1713 | return 1; | ||
1714 | else | ||
1715 | return 0; | ||
1605 | } | 1716 | } |
1606 | 1717 | ||
1607 | /** | 1718 | /** |
@@ -1651,9 +1762,13 @@ int scsi_decide_disposition(struct scsi_cmnd *scmd) | |||
1651 | * looks good. drop through, and check the next byte. | 1762 | * looks good. drop through, and check the next byte. |
1652 | */ | 1763 | */ |
1653 | break; | 1764 | break; |
1765 | case DID_ABORT: | ||
1766 | if (scmd->eh_eflags & SCSI_EH_ABORT_SCHEDULED) { | ||
1767 | scmd->result |= DID_TIME_OUT << 16; | ||
1768 | return SUCCESS; | ||
1769 | } | ||
1654 | case DID_NO_CONNECT: | 1770 | case DID_NO_CONNECT: |
1655 | case DID_BAD_TARGET: | 1771 | case DID_BAD_TARGET: |
1656 | case DID_ABORT: | ||
1657 | /* | 1772 | /* |
1658 | * note - this means that we just report the status back | 1773 | * note - this means that we just report the status back |
1659 | * to the top level driver, not that we actually think | 1774 | * to the top level driver, not that we actually think |
@@ -1999,7 +2114,7 @@ static void scsi_unjam_host(struct Scsi_Host *shost) | |||
1999 | scsi_eh_ready_devs(shost, &eh_work_q, &eh_done_q); | 2114 | scsi_eh_ready_devs(shost, &eh_work_q, &eh_done_q); |
2000 | 2115 | ||
2001 | spin_lock_irqsave(shost->host_lock, flags); | 2116 | spin_lock_irqsave(shost->host_lock, flags); |
2002 | if (shost->eh_deadline) | 2117 | if (shost->eh_deadline != -1) |
2003 | shost->last_reset = 0; | 2118 | shost->last_reset = 0; |
2004 | spin_unlock_irqrestore(shost->host_lock, flags); | 2119 | spin_unlock_irqrestore(shost->host_lock, flags); |
2005 | scsi_eh_flush_done_q(&eh_done_q); | 2120 | scsi_eh_flush_done_q(&eh_done_q); |
diff --git a/drivers/scsi/scsi_pm.c b/drivers/scsi/scsi_pm.c index af4c050ce6e4..001e9ceda4c3 100644 --- a/drivers/scsi/scsi_pm.c +++ b/drivers/scsi/scsi_pm.c | |||
@@ -16,6 +16,8 @@ | |||
16 | 16 | ||
17 | #include "scsi_priv.h" | 17 | #include "scsi_priv.h" |
18 | 18 | ||
19 | #ifdef CONFIG_PM_SLEEP | ||
20 | |||
19 | static int scsi_dev_type_suspend(struct device *dev, int (*cb)(struct device *)) | 21 | static int scsi_dev_type_suspend(struct device *dev, int (*cb)(struct device *)) |
20 | { | 22 | { |
21 | int err; | 23 | int err; |
@@ -43,8 +45,6 @@ static int scsi_dev_type_resume(struct device *dev, int (*cb)(struct device *)) | |||
43 | return err; | 45 | return err; |
44 | } | 46 | } |
45 | 47 | ||
46 | #ifdef CONFIG_PM_SLEEP | ||
47 | |||
48 | static int | 48 | static int |
49 | scsi_bus_suspend_common(struct device *dev, int (*cb)(struct device *)) | 49 | scsi_bus_suspend_common(struct device *dev, int (*cb)(struct device *)) |
50 | { | 50 | { |
@@ -145,38 +145,22 @@ static int scsi_bus_restore(struct device *dev) | |||
145 | 145 | ||
146 | #ifdef CONFIG_PM_RUNTIME | 146 | #ifdef CONFIG_PM_RUNTIME |
147 | 147 | ||
148 | static int sdev_blk_runtime_suspend(struct scsi_device *sdev, | 148 | static int sdev_runtime_suspend(struct device *dev) |
149 | int (*cb)(struct device *)) | ||
150 | { | 149 | { |
150 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | ||
151 | struct scsi_device *sdev = to_scsi_device(dev); | ||
151 | int err; | 152 | int err; |
152 | 153 | ||
153 | err = blk_pre_runtime_suspend(sdev->request_queue); | 154 | err = blk_pre_runtime_suspend(sdev->request_queue); |
154 | if (err) | 155 | if (err) |
155 | return err; | 156 | return err; |
156 | if (cb) | 157 | if (pm && pm->runtime_suspend) |
157 | err = cb(&sdev->sdev_gendev); | 158 | err = pm->runtime_suspend(dev); |
158 | blk_post_runtime_suspend(sdev->request_queue, err); | 159 | blk_post_runtime_suspend(sdev->request_queue, err); |
159 | 160 | ||
160 | return err; | 161 | return err; |
161 | } | 162 | } |
162 | 163 | ||
163 | static int sdev_runtime_suspend(struct device *dev) | ||
164 | { | ||
165 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | ||
166 | int (*cb)(struct device *) = pm ? pm->runtime_suspend : NULL; | ||
167 | struct scsi_device *sdev = to_scsi_device(dev); | ||
168 | int err; | ||
169 | |||
170 | if (sdev->request_queue->dev) | ||
171 | return sdev_blk_runtime_suspend(sdev, cb); | ||
172 | |||
173 | err = scsi_dev_type_suspend(dev, cb); | ||
174 | if (err == -EAGAIN) | ||
175 | pm_schedule_suspend(dev, jiffies_to_msecs( | ||
176 | round_jiffies_up_relative(HZ/10))); | ||
177 | return err; | ||
178 | } | ||
179 | |||
180 | static int scsi_runtime_suspend(struct device *dev) | 164 | static int scsi_runtime_suspend(struct device *dev) |
181 | { | 165 | { |
182 | int err = 0; | 166 | int err = 0; |
@@ -190,31 +174,20 @@ static int scsi_runtime_suspend(struct device *dev) | |||
190 | return err; | 174 | return err; |
191 | } | 175 | } |
192 | 176 | ||
193 | static int sdev_blk_runtime_resume(struct scsi_device *sdev, | 177 | static int sdev_runtime_resume(struct device *dev) |
194 | int (*cb)(struct device *)) | ||
195 | { | 178 | { |
179 | struct scsi_device *sdev = to_scsi_device(dev); | ||
180 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | ||
196 | int err = 0; | 181 | int err = 0; |
197 | 182 | ||
198 | blk_pre_runtime_resume(sdev->request_queue); | 183 | blk_pre_runtime_resume(sdev->request_queue); |
199 | if (cb) | 184 | if (pm && pm->runtime_resume) |
200 | err = cb(&sdev->sdev_gendev); | 185 | err = pm->runtime_resume(dev); |
201 | blk_post_runtime_resume(sdev->request_queue, err); | 186 | blk_post_runtime_resume(sdev->request_queue, err); |
202 | 187 | ||
203 | return err; | 188 | return err; |
204 | } | 189 | } |
205 | 190 | ||
206 | static int sdev_runtime_resume(struct device *dev) | ||
207 | { | ||
208 | struct scsi_device *sdev = to_scsi_device(dev); | ||
209 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | ||
210 | int (*cb)(struct device *) = pm ? pm->runtime_resume : NULL; | ||
211 | |||
212 | if (sdev->request_queue->dev) | ||
213 | return sdev_blk_runtime_resume(sdev, cb); | ||
214 | else | ||
215 | return scsi_dev_type_resume(dev, cb); | ||
216 | } | ||
217 | |||
218 | static int scsi_runtime_resume(struct device *dev) | 191 | static int scsi_runtime_resume(struct device *dev) |
219 | { | 192 | { |
220 | int err = 0; | 193 | int err = 0; |
@@ -235,14 +208,11 @@ static int scsi_runtime_idle(struct device *dev) | |||
235 | /* Insert hooks here for targets, hosts, and transport classes */ | 208 | /* Insert hooks here for targets, hosts, and transport classes */ |
236 | 209 | ||
237 | if (scsi_is_sdev_device(dev)) { | 210 | if (scsi_is_sdev_device(dev)) { |
238 | struct scsi_device *sdev = to_scsi_device(dev); | 211 | pm_runtime_mark_last_busy(dev); |
239 | 212 | pm_runtime_autosuspend(dev); | |
240 | if (sdev->request_queue->dev) { | 213 | return -EBUSY; |
241 | pm_runtime_mark_last_busy(dev); | ||
242 | pm_runtime_autosuspend(dev); | ||
243 | return -EBUSY; | ||
244 | } | ||
245 | } | 214 | } |
215 | |||
246 | return 0; | 216 | return 0; |
247 | } | 217 | } |
248 | 218 | ||
diff --git a/drivers/scsi/scsi_priv.h b/drivers/scsi/scsi_priv.h index 8f9a0cadc296..f079a598bed4 100644 --- a/drivers/scsi/scsi_priv.h +++ b/drivers/scsi/scsi_priv.h | |||
@@ -19,6 +19,7 @@ struct scsi_nl_hdr; | |||
19 | * Scsi Error Handler Flags | 19 | * Scsi Error Handler Flags |
20 | */ | 20 | */ |
21 | #define SCSI_EH_CANCEL_CMD 0x0001 /* Cancel this cmd */ | 21 | #define SCSI_EH_CANCEL_CMD 0x0001 /* Cancel this cmd */ |
22 | #define SCSI_EH_ABORT_SCHEDULED 0x0002 /* Abort has been scheduled */ | ||
22 | 23 | ||
23 | #define SCSI_SENSE_VALID(scmd) \ | 24 | #define SCSI_SENSE_VALID(scmd) \ |
24 | (((scmd)->sense_buffer[0] & 0x70) == 0x70) | 25 | (((scmd)->sense_buffer[0] & 0x70) == 0x70) |
@@ -66,6 +67,7 @@ extern int __init scsi_init_devinfo(void); | |||
66 | extern void scsi_exit_devinfo(void); | 67 | extern void scsi_exit_devinfo(void); |
67 | 68 | ||
68 | /* scsi_error.c */ | 69 | /* scsi_error.c */ |
70 | extern void scmd_eh_abort_handler(struct work_struct *work); | ||
69 | extern enum blk_eh_timer_return scsi_times_out(struct request *req); | 71 | extern enum blk_eh_timer_return scsi_times_out(struct request *req); |
70 | extern int scsi_error_handler(void *host); | 72 | extern int scsi_error_handler(void *host); |
71 | extern int scsi_decide_disposition(struct scsi_cmnd *cmd); | 73 | extern int scsi_decide_disposition(struct scsi_cmnd *cmd); |
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c index 8ff62c26a41c..9117d0bf408e 100644 --- a/drivers/scsi/scsi_sysfs.c +++ b/drivers/scsi/scsi_sysfs.c | |||
@@ -287,7 +287,9 @@ show_shost_eh_deadline(struct device *dev, | |||
287 | { | 287 | { |
288 | struct Scsi_Host *shost = class_to_shost(dev); | 288 | struct Scsi_Host *shost = class_to_shost(dev); |
289 | 289 | ||
290 | return sprintf(buf, "%d\n", shost->eh_deadline / HZ); | 290 | if (shost->eh_deadline == -1) |
291 | return snprintf(buf, strlen("off") + 2, "off\n"); | ||
292 | return sprintf(buf, "%u\n", shost->eh_deadline / HZ); | ||
291 | } | 293 | } |
292 | 294 | ||
293 | static ssize_t | 295 | static ssize_t |
@@ -296,22 +298,34 @@ store_shost_eh_deadline(struct device *dev, struct device_attribute *attr, | |||
296 | { | 298 | { |
297 | struct Scsi_Host *shost = class_to_shost(dev); | 299 | struct Scsi_Host *shost = class_to_shost(dev); |
298 | int ret = -EINVAL; | 300 | int ret = -EINVAL; |
299 | int deadline; | 301 | unsigned long deadline, flags; |
300 | unsigned long flags; | ||
301 | 302 | ||
302 | if (shost->transportt && shost->transportt->eh_strategy_handler) | 303 | if (shost->transportt && shost->transportt->eh_strategy_handler) |
303 | return ret; | 304 | return ret; |
304 | 305 | ||
305 | if (sscanf(buf, "%d\n", &deadline) == 1) { | 306 | if (!strncmp(buf, "off", strlen("off"))) |
306 | spin_lock_irqsave(shost->host_lock, flags); | 307 | deadline = -1; |
307 | if (scsi_host_in_recovery(shost)) | 308 | else { |
308 | ret = -EBUSY; | 309 | ret = kstrtoul(buf, 10, &deadline); |
309 | else { | 310 | if (ret) |
311 | return ret; | ||
312 | if (deadline * HZ > UINT_MAX) | ||
313 | return -EINVAL; | ||
314 | } | ||
315 | |||
316 | spin_lock_irqsave(shost->host_lock, flags); | ||
317 | if (scsi_host_in_recovery(shost)) | ||
318 | ret = -EBUSY; | ||
319 | else { | ||
320 | if (deadline == -1) | ||
321 | shost->eh_deadline = -1; | ||
322 | else | ||
310 | shost->eh_deadline = deadline * HZ; | 323 | shost->eh_deadline = deadline * HZ; |
311 | ret = count; | 324 | |
312 | } | 325 | ret = count; |
313 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
314 | } | 326 | } |
327 | spin_unlock_irqrestore(shost->host_lock, flags); | ||
328 | |||
315 | return ret; | 329 | return ret; |
316 | } | 330 | } |
317 | 331 | ||
diff --git a/drivers/scsi/scsi_transport_iscsi.c b/drivers/scsi/scsi_transport_iscsi.c index de5b4d9bb022..0102a2d70dd8 100644 --- a/drivers/scsi/scsi_transport_iscsi.c +++ b/drivers/scsi/scsi_transport_iscsi.c | |||
@@ -305,20 +305,71 @@ show_##type##_##name(struct device *dev, struct device_attribute *attr, \ | |||
305 | iscsi_iface_attr_show(type, name, ISCSI_NET_PARAM, param) \ | 305 | iscsi_iface_attr_show(type, name, ISCSI_NET_PARAM, param) \ |
306 | static ISCSI_IFACE_ATTR(type, name, S_IRUGO, show_##type##_##name, NULL); | 306 | static ISCSI_IFACE_ATTR(type, name, S_IRUGO, show_##type##_##name, NULL); |
307 | 307 | ||
308 | /* generic read only ipvi4 attribute */ | 308 | #define iscsi_iface_attr(type, name, param) \ |
309 | iscsi_iface_attr_show(type, name, ISCSI_IFACE_PARAM, param) \ | ||
310 | static ISCSI_IFACE_ATTR(type, name, S_IRUGO, show_##type##_##name, NULL); | ||
311 | |||
312 | /* generic read only ipv4 attribute */ | ||
309 | iscsi_iface_net_attr(ipv4_iface, ipaddress, ISCSI_NET_PARAM_IPV4_ADDR); | 313 | iscsi_iface_net_attr(ipv4_iface, ipaddress, ISCSI_NET_PARAM_IPV4_ADDR); |
310 | iscsi_iface_net_attr(ipv4_iface, gateway, ISCSI_NET_PARAM_IPV4_GW); | 314 | iscsi_iface_net_attr(ipv4_iface, gateway, ISCSI_NET_PARAM_IPV4_GW); |
311 | iscsi_iface_net_attr(ipv4_iface, subnet, ISCSI_NET_PARAM_IPV4_SUBNET); | 315 | iscsi_iface_net_attr(ipv4_iface, subnet, ISCSI_NET_PARAM_IPV4_SUBNET); |
312 | iscsi_iface_net_attr(ipv4_iface, bootproto, ISCSI_NET_PARAM_IPV4_BOOTPROTO); | 316 | iscsi_iface_net_attr(ipv4_iface, bootproto, ISCSI_NET_PARAM_IPV4_BOOTPROTO); |
317 | iscsi_iface_net_attr(ipv4_iface, dhcp_dns_address_en, | ||
318 | ISCSI_NET_PARAM_IPV4_DHCP_DNS_ADDR_EN); | ||
319 | iscsi_iface_net_attr(ipv4_iface, dhcp_slp_da_info_en, | ||
320 | ISCSI_NET_PARAM_IPV4_DHCP_SLP_DA_EN); | ||
321 | iscsi_iface_net_attr(ipv4_iface, tos_en, ISCSI_NET_PARAM_IPV4_TOS_EN); | ||
322 | iscsi_iface_net_attr(ipv4_iface, tos, ISCSI_NET_PARAM_IPV4_TOS); | ||
323 | iscsi_iface_net_attr(ipv4_iface, grat_arp_en, | ||
324 | ISCSI_NET_PARAM_IPV4_GRAT_ARP_EN); | ||
325 | iscsi_iface_net_attr(ipv4_iface, dhcp_alt_client_id_en, | ||
326 | ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID_EN); | ||
327 | iscsi_iface_net_attr(ipv4_iface, dhcp_alt_client_id, | ||
328 | ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID); | ||
329 | iscsi_iface_net_attr(ipv4_iface, dhcp_req_vendor_id_en, | ||
330 | ISCSI_NET_PARAM_IPV4_DHCP_REQ_VENDOR_ID_EN); | ||
331 | iscsi_iface_net_attr(ipv4_iface, dhcp_use_vendor_id_en, | ||
332 | ISCSI_NET_PARAM_IPV4_DHCP_USE_VENDOR_ID_EN); | ||
333 | iscsi_iface_net_attr(ipv4_iface, dhcp_vendor_id, | ||
334 | ISCSI_NET_PARAM_IPV4_DHCP_VENDOR_ID); | ||
335 | iscsi_iface_net_attr(ipv4_iface, dhcp_learn_iqn_en, | ||
336 | ISCSI_NET_PARAM_IPV4_DHCP_LEARN_IQN_EN); | ||
337 | iscsi_iface_net_attr(ipv4_iface, fragment_disable, | ||
338 | ISCSI_NET_PARAM_IPV4_FRAGMENT_DISABLE); | ||
339 | iscsi_iface_net_attr(ipv4_iface, incoming_forwarding_en, | ||
340 | ISCSI_NET_PARAM_IPV4_IN_FORWARD_EN); | ||
341 | iscsi_iface_net_attr(ipv4_iface, ttl, ISCSI_NET_PARAM_IPV4_TTL); | ||
313 | 342 | ||
314 | /* generic read only ipv6 attribute */ | 343 | /* generic read only ipv6 attribute */ |
315 | iscsi_iface_net_attr(ipv6_iface, ipaddress, ISCSI_NET_PARAM_IPV6_ADDR); | 344 | iscsi_iface_net_attr(ipv6_iface, ipaddress, ISCSI_NET_PARAM_IPV6_ADDR); |
316 | iscsi_iface_net_attr(ipv6_iface, link_local_addr, ISCSI_NET_PARAM_IPV6_LINKLOCAL); | 345 | iscsi_iface_net_attr(ipv6_iface, link_local_addr, |
346 | ISCSI_NET_PARAM_IPV6_LINKLOCAL); | ||
317 | iscsi_iface_net_attr(ipv6_iface, router_addr, ISCSI_NET_PARAM_IPV6_ROUTER); | 347 | iscsi_iface_net_attr(ipv6_iface, router_addr, ISCSI_NET_PARAM_IPV6_ROUTER); |
318 | iscsi_iface_net_attr(ipv6_iface, ipaddr_autocfg, | 348 | iscsi_iface_net_attr(ipv6_iface, ipaddr_autocfg, |
319 | ISCSI_NET_PARAM_IPV6_ADDR_AUTOCFG); | 349 | ISCSI_NET_PARAM_IPV6_ADDR_AUTOCFG); |
320 | iscsi_iface_net_attr(ipv6_iface, link_local_autocfg, | 350 | iscsi_iface_net_attr(ipv6_iface, link_local_autocfg, |
321 | ISCSI_NET_PARAM_IPV6_LINKLOCAL_AUTOCFG); | 351 | ISCSI_NET_PARAM_IPV6_LINKLOCAL_AUTOCFG); |
352 | iscsi_iface_net_attr(ipv6_iface, link_local_state, | ||
353 | ISCSI_NET_PARAM_IPV6_LINKLOCAL_STATE); | ||
354 | iscsi_iface_net_attr(ipv6_iface, router_state, | ||
355 | ISCSI_NET_PARAM_IPV6_ROUTER_STATE); | ||
356 | iscsi_iface_net_attr(ipv6_iface, grat_neighbor_adv_en, | ||
357 | ISCSI_NET_PARAM_IPV6_GRAT_NEIGHBOR_ADV_EN); | ||
358 | iscsi_iface_net_attr(ipv6_iface, mld_en, ISCSI_NET_PARAM_IPV6_MLD_EN); | ||
359 | iscsi_iface_net_attr(ipv6_iface, flow_label, ISCSI_NET_PARAM_IPV6_FLOW_LABEL); | ||
360 | iscsi_iface_net_attr(ipv6_iface, traffic_class, | ||
361 | ISCSI_NET_PARAM_IPV6_TRAFFIC_CLASS); | ||
362 | iscsi_iface_net_attr(ipv6_iface, hop_limit, ISCSI_NET_PARAM_IPV6_HOP_LIMIT); | ||
363 | iscsi_iface_net_attr(ipv6_iface, nd_reachable_tmo, | ||
364 | ISCSI_NET_PARAM_IPV6_ND_REACHABLE_TMO); | ||
365 | iscsi_iface_net_attr(ipv6_iface, nd_rexmit_time, | ||
366 | ISCSI_NET_PARAM_IPV6_ND_REXMIT_TIME); | ||
367 | iscsi_iface_net_attr(ipv6_iface, nd_stale_tmo, | ||
368 | ISCSI_NET_PARAM_IPV6_ND_STALE_TMO); | ||
369 | iscsi_iface_net_attr(ipv6_iface, dup_addr_detect_cnt, | ||
370 | ISCSI_NET_PARAM_IPV6_DUP_ADDR_DETECT_CNT); | ||
371 | iscsi_iface_net_attr(ipv6_iface, router_adv_link_mtu, | ||
372 | ISCSI_NET_PARAM_IPV6_RTR_ADV_LINK_MTU); | ||
322 | 373 | ||
323 | /* common read only iface attribute */ | 374 | /* common read only iface attribute */ |
324 | iscsi_iface_net_attr(iface, enabled, ISCSI_NET_PARAM_IFACE_ENABLE); | 375 | iscsi_iface_net_attr(iface, enabled, ISCSI_NET_PARAM_IFACE_ENABLE); |
@@ -327,6 +378,40 @@ iscsi_iface_net_attr(iface, vlan_priority, ISCSI_NET_PARAM_VLAN_PRIORITY); | |||
327 | iscsi_iface_net_attr(iface, vlan_enabled, ISCSI_NET_PARAM_VLAN_ENABLED); | 378 | iscsi_iface_net_attr(iface, vlan_enabled, ISCSI_NET_PARAM_VLAN_ENABLED); |
328 | iscsi_iface_net_attr(iface, mtu, ISCSI_NET_PARAM_MTU); | 379 | iscsi_iface_net_attr(iface, mtu, ISCSI_NET_PARAM_MTU); |
329 | iscsi_iface_net_attr(iface, port, ISCSI_NET_PARAM_PORT); | 380 | iscsi_iface_net_attr(iface, port, ISCSI_NET_PARAM_PORT); |
381 | iscsi_iface_net_attr(iface, ipaddress_state, ISCSI_NET_PARAM_IPADDR_STATE); | ||
382 | iscsi_iface_net_attr(iface, delayed_ack_en, ISCSI_NET_PARAM_DELAYED_ACK_EN); | ||
383 | iscsi_iface_net_attr(iface, tcp_nagle_disable, | ||
384 | ISCSI_NET_PARAM_TCP_NAGLE_DISABLE); | ||
385 | iscsi_iface_net_attr(iface, tcp_wsf_disable, ISCSI_NET_PARAM_TCP_WSF_DISABLE); | ||
386 | iscsi_iface_net_attr(iface, tcp_wsf, ISCSI_NET_PARAM_TCP_WSF); | ||
387 | iscsi_iface_net_attr(iface, tcp_timer_scale, ISCSI_NET_PARAM_TCP_TIMER_SCALE); | ||
388 | iscsi_iface_net_attr(iface, tcp_timestamp_en, ISCSI_NET_PARAM_TCP_TIMESTAMP_EN); | ||
389 | iscsi_iface_net_attr(iface, cache_id, ISCSI_NET_PARAM_CACHE_ID); | ||
390 | iscsi_iface_net_attr(iface, redirect_en, ISCSI_NET_PARAM_REDIRECT_EN); | ||
391 | |||
392 | /* common iscsi specific settings attributes */ | ||
393 | iscsi_iface_attr(iface, def_taskmgmt_tmo, ISCSI_IFACE_PARAM_DEF_TASKMGMT_TMO); | ||
394 | iscsi_iface_attr(iface, header_digest, ISCSI_IFACE_PARAM_HDRDGST_EN); | ||
395 | iscsi_iface_attr(iface, data_digest, ISCSI_IFACE_PARAM_DATADGST_EN); | ||
396 | iscsi_iface_attr(iface, immediate_data, ISCSI_IFACE_PARAM_IMM_DATA_EN); | ||
397 | iscsi_iface_attr(iface, initial_r2t, ISCSI_IFACE_PARAM_INITIAL_R2T_EN); | ||
398 | iscsi_iface_attr(iface, data_seq_in_order, | ||
399 | ISCSI_IFACE_PARAM_DATASEQ_INORDER_EN); | ||
400 | iscsi_iface_attr(iface, data_pdu_in_order, ISCSI_IFACE_PARAM_PDU_INORDER_EN); | ||
401 | iscsi_iface_attr(iface, erl, ISCSI_IFACE_PARAM_ERL); | ||
402 | iscsi_iface_attr(iface, max_recv_dlength, ISCSI_IFACE_PARAM_MAX_RECV_DLENGTH); | ||
403 | iscsi_iface_attr(iface, first_burst_len, ISCSI_IFACE_PARAM_FIRST_BURST); | ||
404 | iscsi_iface_attr(iface, max_outstanding_r2t, ISCSI_IFACE_PARAM_MAX_R2T); | ||
405 | iscsi_iface_attr(iface, max_burst_len, ISCSI_IFACE_PARAM_MAX_BURST); | ||
406 | iscsi_iface_attr(iface, chap_auth, ISCSI_IFACE_PARAM_CHAP_AUTH_EN); | ||
407 | iscsi_iface_attr(iface, bidi_chap, ISCSI_IFACE_PARAM_BIDI_CHAP_EN); | ||
408 | iscsi_iface_attr(iface, discovery_auth_optional, | ||
409 | ISCSI_IFACE_PARAM_DISCOVERY_AUTH_OPTIONAL); | ||
410 | iscsi_iface_attr(iface, discovery_logout, | ||
411 | ISCSI_IFACE_PARAM_DISCOVERY_LOGOUT_EN); | ||
412 | iscsi_iface_attr(iface, strict_login_comp_en, | ||
413 | ISCSI_IFACE_PARAM_STRICT_LOGIN_COMP_EN); | ||
414 | iscsi_iface_attr(iface, initiator_name, ISCSI_IFACE_PARAM_INITIATOR_NAME); | ||
330 | 415 | ||
331 | static umode_t iscsi_iface_attr_is_visible(struct kobject *kobj, | 416 | static umode_t iscsi_iface_attr_is_visible(struct kobject *kobj, |
332 | struct attribute *attr, int i) | 417 | struct attribute *attr, int i) |
@@ -335,6 +420,7 @@ static umode_t iscsi_iface_attr_is_visible(struct kobject *kobj, | |||
335 | struct iscsi_iface *iface = iscsi_dev_to_iface(dev); | 420 | struct iscsi_iface *iface = iscsi_dev_to_iface(dev); |
336 | struct iscsi_transport *t = iface->transport; | 421 | struct iscsi_transport *t = iface->transport; |
337 | int param; | 422 | int param; |
423 | int param_type; | ||
338 | 424 | ||
339 | if (attr == &dev_attr_iface_enabled.attr) | 425 | if (attr == &dev_attr_iface_enabled.attr) |
340 | param = ISCSI_NET_PARAM_IFACE_ENABLE; | 426 | param = ISCSI_NET_PARAM_IFACE_ENABLE; |
@@ -348,6 +434,60 @@ static umode_t iscsi_iface_attr_is_visible(struct kobject *kobj, | |||
348 | param = ISCSI_NET_PARAM_MTU; | 434 | param = ISCSI_NET_PARAM_MTU; |
349 | else if (attr == &dev_attr_iface_port.attr) | 435 | else if (attr == &dev_attr_iface_port.attr) |
350 | param = ISCSI_NET_PARAM_PORT; | 436 | param = ISCSI_NET_PARAM_PORT; |
437 | else if (attr == &dev_attr_iface_ipaddress_state.attr) | ||
438 | param = ISCSI_NET_PARAM_IPADDR_STATE; | ||
439 | else if (attr == &dev_attr_iface_delayed_ack_en.attr) | ||
440 | param = ISCSI_NET_PARAM_DELAYED_ACK_EN; | ||
441 | else if (attr == &dev_attr_iface_tcp_nagle_disable.attr) | ||
442 | param = ISCSI_NET_PARAM_TCP_NAGLE_DISABLE; | ||
443 | else if (attr == &dev_attr_iface_tcp_wsf_disable.attr) | ||
444 | param = ISCSI_NET_PARAM_TCP_WSF_DISABLE; | ||
445 | else if (attr == &dev_attr_iface_tcp_wsf.attr) | ||
446 | param = ISCSI_NET_PARAM_TCP_WSF; | ||
447 | else if (attr == &dev_attr_iface_tcp_timer_scale.attr) | ||
448 | param = ISCSI_NET_PARAM_TCP_TIMER_SCALE; | ||
449 | else if (attr == &dev_attr_iface_tcp_timestamp_en.attr) | ||
450 | param = ISCSI_NET_PARAM_TCP_TIMESTAMP_EN; | ||
451 | else if (attr == &dev_attr_iface_cache_id.attr) | ||
452 | param = ISCSI_NET_PARAM_CACHE_ID; | ||
453 | else if (attr == &dev_attr_iface_redirect_en.attr) | ||
454 | param = ISCSI_NET_PARAM_REDIRECT_EN; | ||
455 | else if (attr == &dev_attr_iface_def_taskmgmt_tmo.attr) | ||
456 | param = ISCSI_IFACE_PARAM_DEF_TASKMGMT_TMO; | ||
457 | else if (attr == &dev_attr_iface_header_digest.attr) | ||
458 | param = ISCSI_IFACE_PARAM_HDRDGST_EN; | ||
459 | else if (attr == &dev_attr_iface_data_digest.attr) | ||
460 | param = ISCSI_IFACE_PARAM_DATADGST_EN; | ||
461 | else if (attr == &dev_attr_iface_immediate_data.attr) | ||
462 | param = ISCSI_IFACE_PARAM_IMM_DATA_EN; | ||
463 | else if (attr == &dev_attr_iface_initial_r2t.attr) | ||
464 | param = ISCSI_IFACE_PARAM_INITIAL_R2T_EN; | ||
465 | else if (attr == &dev_attr_iface_data_seq_in_order.attr) | ||
466 | param = ISCSI_IFACE_PARAM_DATASEQ_INORDER_EN; | ||
467 | else if (attr == &dev_attr_iface_data_pdu_in_order.attr) | ||
468 | param = ISCSI_IFACE_PARAM_PDU_INORDER_EN; | ||
469 | else if (attr == &dev_attr_iface_erl.attr) | ||
470 | param = ISCSI_IFACE_PARAM_ERL; | ||
471 | else if (attr == &dev_attr_iface_max_recv_dlength.attr) | ||
472 | param = ISCSI_IFACE_PARAM_MAX_RECV_DLENGTH; | ||
473 | else if (attr == &dev_attr_iface_first_burst_len.attr) | ||
474 | param = ISCSI_IFACE_PARAM_FIRST_BURST; | ||
475 | else if (attr == &dev_attr_iface_max_outstanding_r2t.attr) | ||
476 | param = ISCSI_IFACE_PARAM_MAX_R2T; | ||
477 | else if (attr == &dev_attr_iface_max_burst_len.attr) | ||
478 | param = ISCSI_IFACE_PARAM_MAX_BURST; | ||
479 | else if (attr == &dev_attr_iface_chap_auth.attr) | ||
480 | param = ISCSI_IFACE_PARAM_CHAP_AUTH_EN; | ||
481 | else if (attr == &dev_attr_iface_bidi_chap.attr) | ||
482 | param = ISCSI_IFACE_PARAM_BIDI_CHAP_EN; | ||
483 | else if (attr == &dev_attr_iface_discovery_auth_optional.attr) | ||
484 | param = ISCSI_IFACE_PARAM_DISCOVERY_AUTH_OPTIONAL; | ||
485 | else if (attr == &dev_attr_iface_discovery_logout.attr) | ||
486 | param = ISCSI_IFACE_PARAM_DISCOVERY_LOGOUT_EN; | ||
487 | else if (attr == &dev_attr_iface_strict_login_comp_en.attr) | ||
488 | param = ISCSI_IFACE_PARAM_STRICT_LOGIN_COMP_EN; | ||
489 | else if (attr == &dev_attr_iface_initiator_name.attr) | ||
490 | param = ISCSI_IFACE_PARAM_INITIATOR_NAME; | ||
351 | else if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { | 491 | else if (iface->iface_type == ISCSI_IFACE_TYPE_IPV4) { |
352 | if (attr == &dev_attr_ipv4_iface_ipaddress.attr) | 492 | if (attr == &dev_attr_ipv4_iface_ipaddress.attr) |
353 | param = ISCSI_NET_PARAM_IPV4_ADDR; | 493 | param = ISCSI_NET_PARAM_IPV4_ADDR; |
@@ -357,6 +497,42 @@ static umode_t iscsi_iface_attr_is_visible(struct kobject *kobj, | |||
357 | param = ISCSI_NET_PARAM_IPV4_SUBNET; | 497 | param = ISCSI_NET_PARAM_IPV4_SUBNET; |
358 | else if (attr == &dev_attr_ipv4_iface_bootproto.attr) | 498 | else if (attr == &dev_attr_ipv4_iface_bootproto.attr) |
359 | param = ISCSI_NET_PARAM_IPV4_BOOTPROTO; | 499 | param = ISCSI_NET_PARAM_IPV4_BOOTPROTO; |
500 | else if (attr == | ||
501 | &dev_attr_ipv4_iface_dhcp_dns_address_en.attr) | ||
502 | param = ISCSI_NET_PARAM_IPV4_DHCP_DNS_ADDR_EN; | ||
503 | else if (attr == | ||
504 | &dev_attr_ipv4_iface_dhcp_slp_da_info_en.attr) | ||
505 | param = ISCSI_NET_PARAM_IPV4_DHCP_SLP_DA_EN; | ||
506 | else if (attr == &dev_attr_ipv4_iface_tos_en.attr) | ||
507 | param = ISCSI_NET_PARAM_IPV4_TOS_EN; | ||
508 | else if (attr == &dev_attr_ipv4_iface_tos.attr) | ||
509 | param = ISCSI_NET_PARAM_IPV4_TOS; | ||
510 | else if (attr == &dev_attr_ipv4_iface_grat_arp_en.attr) | ||
511 | param = ISCSI_NET_PARAM_IPV4_GRAT_ARP_EN; | ||
512 | else if (attr == | ||
513 | &dev_attr_ipv4_iface_dhcp_alt_client_id_en.attr) | ||
514 | param = ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID_EN; | ||
515 | else if (attr == &dev_attr_ipv4_iface_dhcp_alt_client_id.attr) | ||
516 | param = ISCSI_NET_PARAM_IPV4_DHCP_ALT_CLIENT_ID; | ||
517 | else if (attr == | ||
518 | &dev_attr_ipv4_iface_dhcp_req_vendor_id_en.attr) | ||
519 | param = ISCSI_NET_PARAM_IPV4_DHCP_REQ_VENDOR_ID_EN; | ||
520 | else if (attr == | ||
521 | &dev_attr_ipv4_iface_dhcp_use_vendor_id_en.attr) | ||
522 | param = ISCSI_NET_PARAM_IPV4_DHCP_USE_VENDOR_ID_EN; | ||
523 | else if (attr == &dev_attr_ipv4_iface_dhcp_vendor_id.attr) | ||
524 | param = ISCSI_NET_PARAM_IPV4_DHCP_VENDOR_ID; | ||
525 | else if (attr == | ||
526 | &dev_attr_ipv4_iface_dhcp_learn_iqn_en.attr) | ||
527 | param = ISCSI_NET_PARAM_IPV4_DHCP_LEARN_IQN_EN; | ||
528 | else if (attr == | ||
529 | &dev_attr_ipv4_iface_fragment_disable.attr) | ||
530 | param = ISCSI_NET_PARAM_IPV4_FRAGMENT_DISABLE; | ||
531 | else if (attr == | ||
532 | &dev_attr_ipv4_iface_incoming_forwarding_en.attr) | ||
533 | param = ISCSI_NET_PARAM_IPV4_IN_FORWARD_EN; | ||
534 | else if (attr == &dev_attr_ipv4_iface_ttl.attr) | ||
535 | param = ISCSI_NET_PARAM_IPV4_TTL; | ||
360 | else | 536 | else |
361 | return 0; | 537 | return 0; |
362 | } else if (iface->iface_type == ISCSI_IFACE_TYPE_IPV6) { | 538 | } else if (iface->iface_type == ISCSI_IFACE_TYPE_IPV6) { |
@@ -370,6 +546,31 @@ static umode_t iscsi_iface_attr_is_visible(struct kobject *kobj, | |||
370 | param = ISCSI_NET_PARAM_IPV6_ADDR_AUTOCFG; | 546 | param = ISCSI_NET_PARAM_IPV6_ADDR_AUTOCFG; |
371 | else if (attr == &dev_attr_ipv6_iface_link_local_autocfg.attr) | 547 | else if (attr == &dev_attr_ipv6_iface_link_local_autocfg.attr) |
372 | param = ISCSI_NET_PARAM_IPV6_LINKLOCAL_AUTOCFG; | 548 | param = ISCSI_NET_PARAM_IPV6_LINKLOCAL_AUTOCFG; |
549 | else if (attr == &dev_attr_ipv6_iface_link_local_state.attr) | ||
550 | param = ISCSI_NET_PARAM_IPV6_LINKLOCAL_STATE; | ||
551 | else if (attr == &dev_attr_ipv6_iface_router_state.attr) | ||
552 | param = ISCSI_NET_PARAM_IPV6_ROUTER_STATE; | ||
553 | else if (attr == | ||
554 | &dev_attr_ipv6_iface_grat_neighbor_adv_en.attr) | ||
555 | param = ISCSI_NET_PARAM_IPV6_GRAT_NEIGHBOR_ADV_EN; | ||
556 | else if (attr == &dev_attr_ipv6_iface_mld_en.attr) | ||
557 | param = ISCSI_NET_PARAM_IPV6_MLD_EN; | ||
558 | else if (attr == &dev_attr_ipv6_iface_flow_label.attr) | ||
559 | param = ISCSI_NET_PARAM_IPV6_FLOW_LABEL; | ||
560 | else if (attr == &dev_attr_ipv6_iface_traffic_class.attr) | ||
561 | param = ISCSI_NET_PARAM_IPV6_TRAFFIC_CLASS; | ||
562 | else if (attr == &dev_attr_ipv6_iface_hop_limit.attr) | ||
563 | param = ISCSI_NET_PARAM_IPV6_HOP_LIMIT; | ||
564 | else if (attr == &dev_attr_ipv6_iface_nd_reachable_tmo.attr) | ||
565 | param = ISCSI_NET_PARAM_IPV6_ND_REACHABLE_TMO; | ||
566 | else if (attr == &dev_attr_ipv6_iface_nd_rexmit_time.attr) | ||
567 | param = ISCSI_NET_PARAM_IPV6_ND_REXMIT_TIME; | ||
568 | else if (attr == &dev_attr_ipv6_iface_nd_stale_tmo.attr) | ||
569 | param = ISCSI_NET_PARAM_IPV6_ND_STALE_TMO; | ||
570 | else if (attr == &dev_attr_ipv6_iface_dup_addr_detect_cnt.attr) | ||
571 | param = ISCSI_NET_PARAM_IPV6_DUP_ADDR_DETECT_CNT; | ||
572 | else if (attr == &dev_attr_ipv6_iface_router_adv_link_mtu.attr) | ||
573 | param = ISCSI_NET_PARAM_IPV6_RTR_ADV_LINK_MTU; | ||
373 | else | 574 | else |
374 | return 0; | 575 | return 0; |
375 | } else { | 576 | } else { |
@@ -377,7 +578,32 @@ static umode_t iscsi_iface_attr_is_visible(struct kobject *kobj, | |||
377 | return 0; | 578 | return 0; |
378 | } | 579 | } |
379 | 580 | ||
380 | return t->attr_is_visible(ISCSI_NET_PARAM, param); | 581 | switch (param) { |
582 | case ISCSI_IFACE_PARAM_DEF_TASKMGMT_TMO: | ||
583 | case ISCSI_IFACE_PARAM_HDRDGST_EN: | ||
584 | case ISCSI_IFACE_PARAM_DATADGST_EN: | ||
585 | case ISCSI_IFACE_PARAM_IMM_DATA_EN: | ||
586 | case ISCSI_IFACE_PARAM_INITIAL_R2T_EN: | ||
587 | case ISCSI_IFACE_PARAM_DATASEQ_INORDER_EN: | ||
588 | case ISCSI_IFACE_PARAM_PDU_INORDER_EN: | ||
589 | case ISCSI_IFACE_PARAM_ERL: | ||
590 | case ISCSI_IFACE_PARAM_MAX_RECV_DLENGTH: | ||
591 | case ISCSI_IFACE_PARAM_FIRST_BURST: | ||
592 | case ISCSI_IFACE_PARAM_MAX_R2T: | ||
593 | case ISCSI_IFACE_PARAM_MAX_BURST: | ||
594 | case ISCSI_IFACE_PARAM_CHAP_AUTH_EN: | ||
595 | case ISCSI_IFACE_PARAM_BIDI_CHAP_EN: | ||
596 | case ISCSI_IFACE_PARAM_DISCOVERY_AUTH_OPTIONAL: | ||
597 | case ISCSI_IFACE_PARAM_DISCOVERY_LOGOUT_EN: | ||
598 | case ISCSI_IFACE_PARAM_STRICT_LOGIN_COMP_EN: | ||
599 | case ISCSI_IFACE_PARAM_INITIATOR_NAME: | ||
600 | param_type = ISCSI_IFACE_PARAM; | ||
601 | break; | ||
602 | default: | ||
603 | param_type = ISCSI_NET_PARAM; | ||
604 | } | ||
605 | |||
606 | return t->attr_is_visible(param_type, param); | ||
381 | } | 607 | } |
382 | 608 | ||
383 | static struct attribute *iscsi_iface_attrs[] = { | 609 | static struct attribute *iscsi_iface_attrs[] = { |
@@ -396,6 +622,59 @@ static struct attribute *iscsi_iface_attrs[] = { | |||
396 | &dev_attr_ipv6_iface_link_local_autocfg.attr, | 622 | &dev_attr_ipv6_iface_link_local_autocfg.attr, |
397 | &dev_attr_iface_mtu.attr, | 623 | &dev_attr_iface_mtu.attr, |
398 | &dev_attr_iface_port.attr, | 624 | &dev_attr_iface_port.attr, |
625 | &dev_attr_iface_ipaddress_state.attr, | ||
626 | &dev_attr_iface_delayed_ack_en.attr, | ||
627 | &dev_attr_iface_tcp_nagle_disable.attr, | ||
628 | &dev_attr_iface_tcp_wsf_disable.attr, | ||
629 | &dev_attr_iface_tcp_wsf.attr, | ||
630 | &dev_attr_iface_tcp_timer_scale.attr, | ||
631 | &dev_attr_iface_tcp_timestamp_en.attr, | ||
632 | &dev_attr_iface_cache_id.attr, | ||
633 | &dev_attr_iface_redirect_en.attr, | ||
634 | &dev_attr_iface_def_taskmgmt_tmo.attr, | ||
635 | &dev_attr_iface_header_digest.attr, | ||
636 | &dev_attr_iface_data_digest.attr, | ||
637 | &dev_attr_iface_immediate_data.attr, | ||
638 | &dev_attr_iface_initial_r2t.attr, | ||
639 | &dev_attr_iface_data_seq_in_order.attr, | ||
640 | &dev_attr_iface_data_pdu_in_order.attr, | ||
641 | &dev_attr_iface_erl.attr, | ||
642 | &dev_attr_iface_max_recv_dlength.attr, | ||
643 | &dev_attr_iface_first_burst_len.attr, | ||
644 | &dev_attr_iface_max_outstanding_r2t.attr, | ||
645 | &dev_attr_iface_max_burst_len.attr, | ||
646 | &dev_attr_iface_chap_auth.attr, | ||
647 | &dev_attr_iface_bidi_chap.attr, | ||
648 | &dev_attr_iface_discovery_auth_optional.attr, | ||
649 | &dev_attr_iface_discovery_logout.attr, | ||
650 | &dev_attr_iface_strict_login_comp_en.attr, | ||
651 | &dev_attr_iface_initiator_name.attr, | ||
652 | &dev_attr_ipv4_iface_dhcp_dns_address_en.attr, | ||
653 | &dev_attr_ipv4_iface_dhcp_slp_da_info_en.attr, | ||
654 | &dev_attr_ipv4_iface_tos_en.attr, | ||
655 | &dev_attr_ipv4_iface_tos.attr, | ||
656 | &dev_attr_ipv4_iface_grat_arp_en.attr, | ||
657 | &dev_attr_ipv4_iface_dhcp_alt_client_id_en.attr, | ||
658 | &dev_attr_ipv4_iface_dhcp_alt_client_id.attr, | ||
659 | &dev_attr_ipv4_iface_dhcp_req_vendor_id_en.attr, | ||
660 | &dev_attr_ipv4_iface_dhcp_use_vendor_id_en.attr, | ||
661 | &dev_attr_ipv4_iface_dhcp_vendor_id.attr, | ||
662 | &dev_attr_ipv4_iface_dhcp_learn_iqn_en.attr, | ||
663 | &dev_attr_ipv4_iface_fragment_disable.attr, | ||
664 | &dev_attr_ipv4_iface_incoming_forwarding_en.attr, | ||
665 | &dev_attr_ipv4_iface_ttl.attr, | ||
666 | &dev_attr_ipv6_iface_link_local_state.attr, | ||
667 | &dev_attr_ipv6_iface_router_state.attr, | ||
668 | &dev_attr_ipv6_iface_grat_neighbor_adv_en.attr, | ||
669 | &dev_attr_ipv6_iface_mld_en.attr, | ||
670 | &dev_attr_ipv6_iface_flow_label.attr, | ||
671 | &dev_attr_ipv6_iface_traffic_class.attr, | ||
672 | &dev_attr_ipv6_iface_hop_limit.attr, | ||
673 | &dev_attr_ipv6_iface_nd_reachable_tmo.attr, | ||
674 | &dev_attr_ipv6_iface_nd_rexmit_time.attr, | ||
675 | &dev_attr_ipv6_iface_nd_stale_tmo.attr, | ||
676 | &dev_attr_ipv6_iface_dup_addr_detect_cnt.attr, | ||
677 | &dev_attr_ipv6_iface_router_adv_link_mtu.attr, | ||
399 | NULL, | 678 | NULL, |
400 | }; | 679 | }; |
401 | 680 | ||
@@ -404,6 +683,61 @@ static struct attribute_group iscsi_iface_group = { | |||
404 | .is_visible = iscsi_iface_attr_is_visible, | 683 | .is_visible = iscsi_iface_attr_is_visible, |
405 | }; | 684 | }; |
406 | 685 | ||
686 | /* convert iscsi_ipaddress_state values to ascii string name */ | ||
687 | static const struct { | ||
688 | enum iscsi_ipaddress_state value; | ||
689 | char *name; | ||
690 | } iscsi_ipaddress_state_names[] = { | ||
691 | {ISCSI_IPDDRESS_STATE_UNCONFIGURED, "Unconfigured" }, | ||
692 | {ISCSI_IPDDRESS_STATE_ACQUIRING, "Acquiring" }, | ||
693 | {ISCSI_IPDDRESS_STATE_TENTATIVE, "Tentative" }, | ||
694 | {ISCSI_IPDDRESS_STATE_VALID, "Valid" }, | ||
695 | {ISCSI_IPDDRESS_STATE_DISABLING, "Disabling" }, | ||
696 | {ISCSI_IPDDRESS_STATE_INVALID, "Invalid" }, | ||
697 | {ISCSI_IPDDRESS_STATE_DEPRECATED, "Deprecated" }, | ||
698 | }; | ||
699 | |||
700 | char *iscsi_get_ipaddress_state_name(enum iscsi_ipaddress_state port_state) | ||
701 | { | ||
702 | int i; | ||
703 | char *state = NULL; | ||
704 | |||
705 | for (i = 0; i < ARRAY_SIZE(iscsi_ipaddress_state_names); i++) { | ||
706 | if (iscsi_ipaddress_state_names[i].value == port_state) { | ||
707 | state = iscsi_ipaddress_state_names[i].name; | ||
708 | break; | ||
709 | } | ||
710 | } | ||
711 | return state; | ||
712 | } | ||
713 | EXPORT_SYMBOL_GPL(iscsi_get_ipaddress_state_name); | ||
714 | |||
715 | /* convert iscsi_router_state values to ascii string name */ | ||
716 | static const struct { | ||
717 | enum iscsi_router_state value; | ||
718 | char *name; | ||
719 | } iscsi_router_state_names[] = { | ||
720 | {ISCSI_ROUTER_STATE_UNKNOWN, "Unknown" }, | ||
721 | {ISCSI_ROUTER_STATE_ADVERTISED, "Advertised" }, | ||
722 | {ISCSI_ROUTER_STATE_MANUAL, "Manual" }, | ||
723 | {ISCSI_ROUTER_STATE_STALE, "Stale" }, | ||
724 | }; | ||
725 | |||
726 | char *iscsi_get_router_state_name(enum iscsi_router_state router_state) | ||
727 | { | ||
728 | int i; | ||
729 | char *state = NULL; | ||
730 | |||
731 | for (i = 0; i < ARRAY_SIZE(iscsi_router_state_names); i++) { | ||
732 | if (iscsi_router_state_names[i].value == router_state) { | ||
733 | state = iscsi_router_state_names[i].name; | ||
734 | break; | ||
735 | } | ||
736 | } | ||
737 | return state; | ||
738 | } | ||
739 | EXPORT_SYMBOL_GPL(iscsi_get_router_state_name); | ||
740 | |||
407 | struct iscsi_iface * | 741 | struct iscsi_iface * |
408 | iscsi_create_iface(struct Scsi_Host *shost, struct iscsi_transport *transport, | 742 | iscsi_create_iface(struct Scsi_Host *shost, struct iscsi_transport *transport, |
409 | uint32_t iface_type, uint32_t iface_num, int dd_size) | 743 | uint32_t iface_type, uint32_t iface_num, int dd_size) |
@@ -3082,6 +3416,73 @@ exit_logout_sid: | |||
3082 | } | 3416 | } |
3083 | 3417 | ||
3084 | static int | 3418 | static int |
3419 | iscsi_get_host_stats(struct iscsi_transport *transport, struct nlmsghdr *nlh) | ||
3420 | { | ||
3421 | struct iscsi_uevent *ev = nlmsg_data(nlh); | ||
3422 | struct Scsi_Host *shost = NULL; | ||
3423 | struct iscsi_internal *priv; | ||
3424 | struct sk_buff *skbhost_stats; | ||
3425 | struct nlmsghdr *nlhhost_stats; | ||
3426 | struct iscsi_uevent *evhost_stats; | ||
3427 | int host_stats_size = 0; | ||
3428 | int len, err = 0; | ||
3429 | char *buf; | ||
3430 | |||
3431 | if (!transport->get_host_stats) | ||
3432 | return -EINVAL; | ||
3433 | |||
3434 | priv = iscsi_if_transport_lookup(transport); | ||
3435 | if (!priv) | ||
3436 | return -EINVAL; | ||
3437 | |||
3438 | host_stats_size = sizeof(struct iscsi_offload_host_stats); | ||
3439 | len = nlmsg_total_size(sizeof(*ev) + host_stats_size); | ||
3440 | |||
3441 | shost = scsi_host_lookup(ev->u.get_host_stats.host_no); | ||
3442 | if (!shost) { | ||
3443 | pr_err("%s: failed. Cound not find host no %u\n", | ||
3444 | __func__, ev->u.get_host_stats.host_no); | ||
3445 | return -ENODEV; | ||
3446 | } | ||
3447 | |||
3448 | do { | ||
3449 | int actual_size; | ||
3450 | |||
3451 | skbhost_stats = alloc_skb(len, GFP_KERNEL); | ||
3452 | if (!skbhost_stats) { | ||
3453 | pr_err("cannot deliver host stats: OOM\n"); | ||
3454 | err = -ENOMEM; | ||
3455 | goto exit_host_stats; | ||
3456 | } | ||
3457 | |||
3458 | nlhhost_stats = __nlmsg_put(skbhost_stats, 0, 0, 0, | ||
3459 | (len - sizeof(*nlhhost_stats)), 0); | ||
3460 | evhost_stats = nlmsg_data(nlhhost_stats); | ||
3461 | memset(evhost_stats, 0, sizeof(*evhost_stats)); | ||
3462 | evhost_stats->transport_handle = iscsi_handle(transport); | ||
3463 | evhost_stats->type = nlh->nlmsg_type; | ||
3464 | evhost_stats->u.get_host_stats.host_no = | ||
3465 | ev->u.get_host_stats.host_no; | ||
3466 | buf = (char *)((char *)evhost_stats + sizeof(*evhost_stats)); | ||
3467 | memset(buf, 0, host_stats_size); | ||
3468 | |||
3469 | err = transport->get_host_stats(shost, buf, host_stats_size); | ||
3470 | |||
3471 | actual_size = nlmsg_total_size(sizeof(*ev) + host_stats_size); | ||
3472 | skb_trim(skbhost_stats, NLMSG_ALIGN(actual_size)); | ||
3473 | nlhhost_stats->nlmsg_len = actual_size; | ||
3474 | |||
3475 | err = iscsi_multicast_skb(skbhost_stats, ISCSI_NL_GRP_ISCSID, | ||
3476 | GFP_KERNEL); | ||
3477 | } while (err < 0 && err != -ECONNREFUSED); | ||
3478 | |||
3479 | exit_host_stats: | ||
3480 | scsi_host_put(shost); | ||
3481 | return err; | ||
3482 | } | ||
3483 | |||
3484 | |||
3485 | static int | ||
3085 | iscsi_if_recv_msg(struct sk_buff *skb, struct nlmsghdr *nlh, uint32_t *group) | 3486 | iscsi_if_recv_msg(struct sk_buff *skb, struct nlmsghdr *nlh, uint32_t *group) |
3086 | { | 3487 | { |
3087 | int err = 0; | 3488 | int err = 0; |
@@ -3260,6 +3661,9 @@ iscsi_if_recv_msg(struct sk_buff *skb, struct nlmsghdr *nlh, uint32_t *group) | |||
3260 | err = iscsi_set_chap(transport, ev, | 3661 | err = iscsi_set_chap(transport, ev, |
3261 | nlmsg_attrlen(nlh, sizeof(*ev))); | 3662 | nlmsg_attrlen(nlh, sizeof(*ev))); |
3262 | break; | 3663 | break; |
3664 | case ISCSI_UEVENT_GET_HOST_STATS: | ||
3665 | err = iscsi_get_host_stats(transport, nlh); | ||
3666 | break; | ||
3263 | default: | 3667 | default: |
3264 | err = -ENOSYS; | 3668 | err = -ENOSYS; |
3265 | break; | 3669 | break; |
@@ -3368,6 +3772,7 @@ iscsi_conn_attr(ipv6_flow_label, ISCSI_PARAM_IPV6_FLOW_LABEL); | |||
3368 | iscsi_conn_attr(is_fw_assigned_ipv6, ISCSI_PARAM_IS_FW_ASSIGNED_IPV6); | 3772 | iscsi_conn_attr(is_fw_assigned_ipv6, ISCSI_PARAM_IS_FW_ASSIGNED_IPV6); |
3369 | iscsi_conn_attr(tcp_xmit_wsf, ISCSI_PARAM_TCP_XMIT_WSF); | 3773 | iscsi_conn_attr(tcp_xmit_wsf, ISCSI_PARAM_TCP_XMIT_WSF); |
3370 | iscsi_conn_attr(tcp_recv_wsf, ISCSI_PARAM_TCP_RECV_WSF); | 3774 | iscsi_conn_attr(tcp_recv_wsf, ISCSI_PARAM_TCP_RECV_WSF); |
3775 | iscsi_conn_attr(local_ipaddr, ISCSI_PARAM_LOCAL_IPADDR); | ||
3371 | 3776 | ||
3372 | 3777 | ||
3373 | #define iscsi_conn_ep_attr_show(param) \ | 3778 | #define iscsi_conn_ep_attr_show(param) \ |
@@ -3437,6 +3842,7 @@ static struct attribute *iscsi_conn_attrs[] = { | |||
3437 | &dev_attr_conn_is_fw_assigned_ipv6.attr, | 3842 | &dev_attr_conn_is_fw_assigned_ipv6.attr, |
3438 | &dev_attr_conn_tcp_xmit_wsf.attr, | 3843 | &dev_attr_conn_tcp_xmit_wsf.attr, |
3439 | &dev_attr_conn_tcp_recv_wsf.attr, | 3844 | &dev_attr_conn_tcp_recv_wsf.attr, |
3845 | &dev_attr_conn_local_ipaddr.attr, | ||
3440 | NULL, | 3846 | NULL, |
3441 | }; | 3847 | }; |
3442 | 3848 | ||
@@ -3506,6 +3912,8 @@ static umode_t iscsi_conn_attr_is_visible(struct kobject *kobj, | |||
3506 | param = ISCSI_PARAM_TCP_XMIT_WSF; | 3912 | param = ISCSI_PARAM_TCP_XMIT_WSF; |
3507 | else if (attr == &dev_attr_conn_tcp_recv_wsf.attr) | 3913 | else if (attr == &dev_attr_conn_tcp_recv_wsf.attr) |
3508 | param = ISCSI_PARAM_TCP_RECV_WSF; | 3914 | param = ISCSI_PARAM_TCP_RECV_WSF; |
3915 | else if (attr == &dev_attr_conn_local_ipaddr.attr) | ||
3916 | param = ISCSI_PARAM_LOCAL_IPADDR; | ||
3509 | else { | 3917 | else { |
3510 | WARN_ONCE(1, "Invalid conn attr"); | 3918 | WARN_ONCE(1, "Invalid conn attr"); |
3511 | return 0; | 3919 | return 0; |
diff --git a/drivers/scsi/scsi_transport_srp.c b/drivers/scsi/scsi_transport_srp.c index 2700a5a09bd4..d47ffc8d3e43 100644 --- a/drivers/scsi/scsi_transport_srp.c +++ b/drivers/scsi/scsi_transport_srp.c | |||
@@ -64,10 +64,14 @@ static inline struct Scsi_Host *rport_to_shost(struct srp_rport *r) | |||
64 | 64 | ||
65 | /** | 65 | /** |
66 | * srp_tmo_valid() - check timeout combination validity | 66 | * srp_tmo_valid() - check timeout combination validity |
67 | * @reconnect_delay: Reconnect delay in seconds. | ||
68 | * @fast_io_fail_tmo: Fast I/O fail timeout in seconds. | ||
69 | * @dev_loss_tmo: Device loss timeout in seconds. | ||
67 | * | 70 | * |
68 | * The combination of the timeout parameters must be such that SCSI commands | 71 | * The combination of the timeout parameters must be such that SCSI commands |
69 | * are finished in a reasonable time. Hence do not allow the fast I/O fail | 72 | * are finished in a reasonable time. Hence do not allow the fast I/O fail |
70 | * timeout to exceed SCSI_DEVICE_BLOCK_MAX_TIMEOUT. Furthermore, these | 73 | * timeout to exceed SCSI_DEVICE_BLOCK_MAX_TIMEOUT nor allow dev_loss_tmo to |
74 | * exceed that limit if failing I/O fast has been disabled. Furthermore, these | ||
71 | * parameters must be such that multipath can detect failed paths timely. | 75 | * parameters must be such that multipath can detect failed paths timely. |
72 | * Hence do not allow all three parameters to be disabled simultaneously. | 76 | * Hence do not allow all three parameters to be disabled simultaneously. |
73 | */ | 77 | */ |
@@ -79,6 +83,9 @@ int srp_tmo_valid(int reconnect_delay, int fast_io_fail_tmo, int dev_loss_tmo) | |||
79 | return -EINVAL; | 83 | return -EINVAL; |
80 | if (fast_io_fail_tmo > SCSI_DEVICE_BLOCK_MAX_TIMEOUT) | 84 | if (fast_io_fail_tmo > SCSI_DEVICE_BLOCK_MAX_TIMEOUT) |
81 | return -EINVAL; | 85 | return -EINVAL; |
86 | if (fast_io_fail_tmo < 0 && | ||
87 | dev_loss_tmo > SCSI_DEVICE_BLOCK_MAX_TIMEOUT) | ||
88 | return -EINVAL; | ||
82 | if (dev_loss_tmo >= LONG_MAX / HZ) | 89 | if (dev_loss_tmo >= LONG_MAX / HZ) |
83 | return -EINVAL; | 90 | return -EINVAL; |
84 | if (fast_io_fail_tmo >= 0 && dev_loss_tmo >= 0 && | 91 | if (fast_io_fail_tmo >= 0 && dev_loss_tmo >= 0 && |
@@ -368,6 +375,7 @@ invalid: | |||
368 | 375 | ||
369 | /** | 376 | /** |
370 | * srp_reconnect_work() - reconnect and schedule a new attempt if necessary | 377 | * srp_reconnect_work() - reconnect and schedule a new attempt if necessary |
378 | * @work: Work structure used for scheduling this operation. | ||
371 | */ | 379 | */ |
372 | static void srp_reconnect_work(struct work_struct *work) | 380 | static void srp_reconnect_work(struct work_struct *work) |
373 | { | 381 | { |
@@ -408,6 +416,7 @@ static void __rport_fail_io_fast(struct srp_rport *rport) | |||
408 | 416 | ||
409 | /** | 417 | /** |
410 | * rport_fast_io_fail_timedout() - fast I/O failure timeout handler | 418 | * rport_fast_io_fail_timedout() - fast I/O failure timeout handler |
419 | * @work: Work structure used for scheduling this operation. | ||
411 | */ | 420 | */ |
412 | static void rport_fast_io_fail_timedout(struct work_struct *work) | 421 | static void rport_fast_io_fail_timedout(struct work_struct *work) |
413 | { | 422 | { |
@@ -426,6 +435,7 @@ static void rport_fast_io_fail_timedout(struct work_struct *work) | |||
426 | 435 | ||
427 | /** | 436 | /** |
428 | * rport_dev_loss_timedout() - device loss timeout handler | 437 | * rport_dev_loss_timedout() - device loss timeout handler |
438 | * @work: Work structure used for scheduling this operation. | ||
429 | */ | 439 | */ |
430 | static void rport_dev_loss_timedout(struct work_struct *work) | 440 | static void rport_dev_loss_timedout(struct work_struct *work) |
431 | { | 441 | { |
@@ -452,42 +462,35 @@ static void __srp_start_tl_fail_timers(struct srp_rport *rport) | |||
452 | 462 | ||
453 | lockdep_assert_held(&rport->mutex); | 463 | lockdep_assert_held(&rport->mutex); |
454 | 464 | ||
455 | if (!rport->deleted) { | 465 | delay = rport->reconnect_delay; |
456 | delay = rport->reconnect_delay; | 466 | fast_io_fail_tmo = rport->fast_io_fail_tmo; |
457 | fast_io_fail_tmo = rport->fast_io_fail_tmo; | 467 | dev_loss_tmo = rport->dev_loss_tmo; |
458 | dev_loss_tmo = rport->dev_loss_tmo; | 468 | pr_debug("%s current state: %d\n", dev_name(&shost->shost_gendev), |
459 | pr_debug("%s current state: %d\n", | 469 | rport->state); |
460 | dev_name(&shost->shost_gendev), rport->state); | ||
461 | 470 | ||
462 | if (delay > 0) | 471 | if (rport->state == SRP_RPORT_LOST) |
463 | queue_delayed_work(system_long_wq, | 472 | return; |
464 | &rport->reconnect_work, | 473 | if (delay > 0) |
465 | 1UL * delay * HZ); | 474 | queue_delayed_work(system_long_wq, &rport->reconnect_work, |
466 | if (fast_io_fail_tmo >= 0 && | 475 | 1UL * delay * HZ); |
467 | srp_rport_set_state(rport, SRP_RPORT_BLOCKED) == 0) { | 476 | if (srp_rport_set_state(rport, SRP_RPORT_BLOCKED) == 0) { |
468 | pr_debug("%s new state: %d\n", | 477 | pr_debug("%s new state: %d\n", dev_name(&shost->shost_gendev), |
469 | dev_name(&shost->shost_gendev), | 478 | rport->state); |
470 | rport->state); | 479 | scsi_target_block(&shost->shost_gendev); |
471 | scsi_target_block(&shost->shost_gendev); | 480 | if (fast_io_fail_tmo >= 0) |
472 | queue_delayed_work(system_long_wq, | 481 | queue_delayed_work(system_long_wq, |
473 | &rport->fast_io_fail_work, | 482 | &rport->fast_io_fail_work, |
474 | 1UL * fast_io_fail_tmo * HZ); | 483 | 1UL * fast_io_fail_tmo * HZ); |
475 | } | ||
476 | if (dev_loss_tmo >= 0) | 484 | if (dev_loss_tmo >= 0) |
477 | queue_delayed_work(system_long_wq, | 485 | queue_delayed_work(system_long_wq, |
478 | &rport->dev_loss_work, | 486 | &rport->dev_loss_work, |
479 | 1UL * dev_loss_tmo * HZ); | 487 | 1UL * dev_loss_tmo * HZ); |
480 | } else { | ||
481 | pr_debug("%s has already been deleted\n", | ||
482 | dev_name(&shost->shost_gendev)); | ||
483 | srp_rport_set_state(rport, SRP_RPORT_FAIL_FAST); | ||
484 | scsi_target_unblock(&shost->shost_gendev, | ||
485 | SDEV_TRANSPORT_OFFLINE); | ||
486 | } | 488 | } |
487 | } | 489 | } |
488 | 490 | ||
489 | /** | 491 | /** |
490 | * srp_start_tl_fail_timers() - start the transport layer failure timers | 492 | * srp_start_tl_fail_timers() - start the transport layer failure timers |
493 | * @rport: SRP target port. | ||
491 | * | 494 | * |
492 | * Start the transport layer fast I/O failure and device loss timers. Do not | 495 | * Start the transport layer fast I/O failure and device loss timers. Do not |
493 | * modify a timer that was already started. | 496 | * modify a timer that was already started. |
@@ -502,6 +505,7 @@ EXPORT_SYMBOL(srp_start_tl_fail_timers); | |||
502 | 505 | ||
503 | /** | 506 | /** |
504 | * scsi_request_fn_active() - number of kernel threads inside scsi_request_fn() | 507 | * scsi_request_fn_active() - number of kernel threads inside scsi_request_fn() |
508 | * @shost: SCSI host for which to count the number of scsi_request_fn() callers. | ||
505 | */ | 509 | */ |
506 | static int scsi_request_fn_active(struct Scsi_Host *shost) | 510 | static int scsi_request_fn_active(struct Scsi_Host *shost) |
507 | { | 511 | { |
@@ -522,6 +526,7 @@ static int scsi_request_fn_active(struct Scsi_Host *shost) | |||
522 | 526 | ||
523 | /** | 527 | /** |
524 | * srp_reconnect_rport() - reconnect to an SRP target port | 528 | * srp_reconnect_rport() - reconnect to an SRP target port |
529 | * @rport: SRP target port. | ||
525 | * | 530 | * |
526 | * Blocks SCSI command queueing before invoking reconnect() such that | 531 | * Blocks SCSI command queueing before invoking reconnect() such that |
527 | * queuecommand() won't be invoked concurrently with reconnect() from outside | 532 | * queuecommand() won't be invoked concurrently with reconnect() from outside |
@@ -556,7 +561,7 @@ int srp_reconnect_rport(struct srp_rport *rport) | |||
556 | scsi_target_block(&shost->shost_gendev); | 561 | scsi_target_block(&shost->shost_gendev); |
557 | while (scsi_request_fn_active(shost)) | 562 | while (scsi_request_fn_active(shost)) |
558 | msleep(20); | 563 | msleep(20); |
559 | res = i->f->reconnect(rport); | 564 | res = rport->state != SRP_RPORT_LOST ? i->f->reconnect(rport) : -ENODEV; |
560 | pr_debug("%s (state %d): transport.reconnect() returned %d\n", | 565 | pr_debug("%s (state %d): transport.reconnect() returned %d\n", |
561 | dev_name(&shost->shost_gendev), rport->state, res); | 566 | dev_name(&shost->shost_gendev), rport->state, res); |
562 | if (res == 0) { | 567 | if (res == 0) { |
@@ -578,9 +583,9 @@ int srp_reconnect_rport(struct srp_rport *rport) | |||
578 | spin_unlock_irq(shost->host_lock); | 583 | spin_unlock_irq(shost->host_lock); |
579 | } else if (rport->state == SRP_RPORT_RUNNING) { | 584 | } else if (rport->state == SRP_RPORT_RUNNING) { |
580 | /* | 585 | /* |
581 | * srp_reconnect_rport() was invoked with fast_io_fail | 586 | * srp_reconnect_rport() has been invoked with fast_io_fail |
582 | * off. Mark the port as failed and start the TL failure | 587 | * and dev_loss off. Mark the port as failed and start the TL |
583 | * timers if these had not yet been started. | 588 | * failure timers if these had not yet been started. |
584 | */ | 589 | */ |
585 | __rport_fail_io_fast(rport); | 590 | __rport_fail_io_fast(rport); |
586 | scsi_target_unblock(&shost->shost_gendev, | 591 | scsi_target_unblock(&shost->shost_gendev, |
@@ -599,6 +604,7 @@ EXPORT_SYMBOL(srp_reconnect_rport); | |||
599 | 604 | ||
600 | /** | 605 | /** |
601 | * srp_timed_out() - SRP transport intercept of the SCSI timeout EH | 606 | * srp_timed_out() - SRP transport intercept of the SCSI timeout EH |
607 | * @scmd: SCSI command. | ||
602 | * | 608 | * |
603 | * If a timeout occurs while an rport is in the blocked state, ask the SCSI | 609 | * If a timeout occurs while an rport is in the blocked state, ask the SCSI |
604 | * EH to continue waiting (BLK_EH_RESET_TIMER). Otherwise let the SCSI core | 610 | * EH to continue waiting (BLK_EH_RESET_TIMER). Otherwise let the SCSI core |
@@ -622,10 +628,6 @@ static void srp_rport_release(struct device *dev) | |||
622 | { | 628 | { |
623 | struct srp_rport *rport = dev_to_rport(dev); | 629 | struct srp_rport *rport = dev_to_rport(dev); |
624 | 630 | ||
625 | cancel_delayed_work_sync(&rport->reconnect_work); | ||
626 | cancel_delayed_work_sync(&rport->fast_io_fail_work); | ||
627 | cancel_delayed_work_sync(&rport->dev_loss_work); | ||
628 | |||
629 | put_device(dev->parent); | 631 | put_device(dev->parent); |
630 | kfree(rport); | 632 | kfree(rport); |
631 | } | 633 | } |
@@ -674,6 +676,7 @@ static int srp_host_match(struct attribute_container *cont, struct device *dev) | |||
674 | 676 | ||
675 | /** | 677 | /** |
676 | * srp_rport_get() - increment rport reference count | 678 | * srp_rport_get() - increment rport reference count |
679 | * @rport: SRP target port. | ||
677 | */ | 680 | */ |
678 | void srp_rport_get(struct srp_rport *rport) | 681 | void srp_rport_get(struct srp_rport *rport) |
679 | { | 682 | { |
@@ -683,6 +686,7 @@ EXPORT_SYMBOL(srp_rport_get); | |||
683 | 686 | ||
684 | /** | 687 | /** |
685 | * srp_rport_put() - decrement rport reference count | 688 | * srp_rport_put() - decrement rport reference count |
689 | * @rport: SRP target port. | ||
686 | */ | 690 | */ |
687 | void srp_rport_put(struct srp_rport *rport) | 691 | void srp_rport_put(struct srp_rport *rport) |
688 | { | 692 | { |
@@ -780,12 +784,6 @@ void srp_rport_del(struct srp_rport *rport) | |||
780 | device_del(dev); | 784 | device_del(dev); |
781 | transport_destroy_device(dev); | 785 | transport_destroy_device(dev); |
782 | 786 | ||
783 | mutex_lock(&rport->mutex); | ||
784 | if (rport->state == SRP_RPORT_BLOCKED) | ||
785 | __rport_fail_io_fast(rport); | ||
786 | rport->deleted = true; | ||
787 | mutex_unlock(&rport->mutex); | ||
788 | |||
789 | put_device(dev); | 787 | put_device(dev); |
790 | } | 788 | } |
791 | EXPORT_SYMBOL_GPL(srp_rport_del); | 789 | EXPORT_SYMBOL_GPL(srp_rport_del); |
@@ -810,6 +808,27 @@ void srp_remove_host(struct Scsi_Host *shost) | |||
810 | } | 808 | } |
811 | EXPORT_SYMBOL_GPL(srp_remove_host); | 809 | EXPORT_SYMBOL_GPL(srp_remove_host); |
812 | 810 | ||
811 | /** | ||
812 | * srp_stop_rport_timers - stop the transport layer recovery timers | ||
813 | * | ||
814 | * Must be called after srp_remove_host() and scsi_remove_host(). The caller | ||
815 | * must hold a reference on the rport (rport->dev) and on the SCSI host | ||
816 | * (rport->dev.parent). | ||
817 | */ | ||
818 | void srp_stop_rport_timers(struct srp_rport *rport) | ||
819 | { | ||
820 | mutex_lock(&rport->mutex); | ||
821 | if (rport->state == SRP_RPORT_BLOCKED) | ||
822 | __rport_fail_io_fast(rport); | ||
823 | srp_rport_set_state(rport, SRP_RPORT_LOST); | ||
824 | mutex_unlock(&rport->mutex); | ||
825 | |||
826 | cancel_delayed_work_sync(&rport->reconnect_work); | ||
827 | cancel_delayed_work_sync(&rport->fast_io_fail_work); | ||
828 | cancel_delayed_work_sync(&rport->dev_loss_work); | ||
829 | } | ||
830 | EXPORT_SYMBOL_GPL(srp_stop_rport_timers); | ||
831 | |||
813 | static int srp_tsk_mgmt_response(struct Scsi_Host *shost, u64 nexus, u64 tm_id, | 832 | static int srp_tsk_mgmt_response(struct Scsi_Host *shost, u64 nexus, u64 tm_id, |
814 | int result) | 833 | int result) |
815 | { | 834 | { |
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c index 69725f7c32c1..470954aba728 100644 --- a/drivers/scsi/sd.c +++ b/drivers/scsi/sd.c | |||
@@ -110,7 +110,7 @@ static int sd_suspend_runtime(struct device *); | |||
110 | static int sd_resume(struct device *); | 110 | static int sd_resume(struct device *); |
111 | static void sd_rescan(struct device *); | 111 | static void sd_rescan(struct device *); |
112 | static int sd_done(struct scsi_cmnd *); | 112 | static int sd_done(struct scsi_cmnd *); |
113 | static int sd_eh_action(struct scsi_cmnd *, unsigned char *, int, int); | 113 | static int sd_eh_action(struct scsi_cmnd *, int); |
114 | static void sd_read_capacity(struct scsi_disk *sdkp, unsigned char *buffer); | 114 | static void sd_read_capacity(struct scsi_disk *sdkp, unsigned char *buffer); |
115 | static void scsi_disk_release(struct device *cdev); | 115 | static void scsi_disk_release(struct device *cdev); |
116 | static void sd_print_sense_hdr(struct scsi_disk *, struct scsi_sense_hdr *); | 116 | static void sd_print_sense_hdr(struct scsi_disk *, struct scsi_sense_hdr *); |
@@ -801,7 +801,7 @@ static int sd_setup_write_same_cmnd(struct scsi_device *sdp, struct request *rq) | |||
801 | if (sdkp->device->no_write_same) | 801 | if (sdkp->device->no_write_same) |
802 | return BLKPREP_KILL; | 802 | return BLKPREP_KILL; |
803 | 803 | ||
804 | BUG_ON(bio_offset(bio) || bio_iovec(bio)->bv_len != sdp->sector_size); | 804 | BUG_ON(bio_offset(bio) || bio_iovec(bio).bv_len != sdp->sector_size); |
805 | 805 | ||
806 | sector >>= ilog2(sdp->sector_size) - 9; | 806 | sector >>= ilog2(sdp->sector_size) - 9; |
807 | nr_sectors >>= ilog2(sdp->sector_size) - 9; | 807 | nr_sectors >>= ilog2(sdp->sector_size) - 9; |
@@ -1551,23 +1551,23 @@ static const struct block_device_operations sd_fops = { | |||
1551 | /** | 1551 | /** |
1552 | * sd_eh_action - error handling callback | 1552 | * sd_eh_action - error handling callback |
1553 | * @scmd: sd-issued command that has failed | 1553 | * @scmd: sd-issued command that has failed |
1554 | * @eh_cmnd: The command that was sent during error handling | ||
1555 | * @eh_cmnd_len: Length of eh_cmnd in bytes | ||
1556 | * @eh_disp: The recovery disposition suggested by the midlayer | 1554 | * @eh_disp: The recovery disposition suggested by the midlayer |
1557 | * | 1555 | * |
1558 | * This function is called by the SCSI midlayer upon completion of | 1556 | * This function is called by the SCSI midlayer upon completion of an |
1559 | * an error handling command (TEST UNIT READY, START STOP UNIT, | 1557 | * error test command (currently TEST UNIT READY). The result of sending |
1560 | * etc.) The command sent to the device by the error handler is | 1558 | * the eh command is passed in eh_disp. We're looking for devices that |
1561 | * stored in eh_cmnd. The result of sending the eh command is | 1559 | * fail medium access commands but are OK with non access commands like |
1562 | * passed in eh_disp. | 1560 | * test unit ready (so wrongly see the device as having a successful |
1561 | * recovery) | ||
1563 | **/ | 1562 | **/ |
1564 | static int sd_eh_action(struct scsi_cmnd *scmd, unsigned char *eh_cmnd, | 1563 | static int sd_eh_action(struct scsi_cmnd *scmd, int eh_disp) |
1565 | int eh_cmnd_len, int eh_disp) | ||
1566 | { | 1564 | { |
1567 | struct scsi_disk *sdkp = scsi_disk(scmd->request->rq_disk); | 1565 | struct scsi_disk *sdkp = scsi_disk(scmd->request->rq_disk); |
1568 | 1566 | ||
1569 | if (!scsi_device_online(scmd->device) || | 1567 | if (!scsi_device_online(scmd->device) || |
1570 | !scsi_medium_access_command(scmd)) | 1568 | !scsi_medium_access_command(scmd) || |
1569 | host_byte(scmd->result) != DID_TIME_OUT || | ||
1570 | eh_disp != SUCCESS) | ||
1571 | return eh_disp; | 1571 | return eh_disp; |
1572 | 1572 | ||
1573 | /* | 1573 | /* |
@@ -1577,9 +1577,7 @@ static int sd_eh_action(struct scsi_cmnd *scmd, unsigned char *eh_cmnd, | |||
1577 | * process of recovering or has it suffered an internal failure | 1577 | * process of recovering or has it suffered an internal failure |
1578 | * that prevents access to the storage medium. | 1578 | * that prevents access to the storage medium. |
1579 | */ | 1579 | */ |
1580 | if (host_byte(scmd->result) == DID_TIME_OUT && eh_disp == SUCCESS && | 1580 | sdkp->medium_access_timed_out++; |
1581 | eh_cmnd_len && eh_cmnd[0] == TEST_UNIT_READY) | ||
1582 | sdkp->medium_access_timed_out++; | ||
1583 | 1581 | ||
1584 | /* | 1582 | /* |
1585 | * If the device keeps failing read/write commands but TEST UNIT | 1583 | * If the device keeps failing read/write commands but TEST UNIT |
@@ -1628,7 +1626,7 @@ static unsigned int sd_completed_bytes(struct scsi_cmnd *scmd) | |||
1628 | end_lba <<= 1; | 1626 | end_lba <<= 1; |
1629 | } else { | 1627 | } else { |
1630 | /* be careful ... don't want any overflows */ | 1628 | /* be careful ... don't want any overflows */ |
1631 | u64 factor = scmd->device->sector_size / 512; | 1629 | unsigned int factor = scmd->device->sector_size / 512; |
1632 | do_div(start_lba, factor); | 1630 | do_div(start_lba, factor); |
1633 | do_div(end_lba, factor); | 1631 | do_div(end_lba, factor); |
1634 | } | 1632 | } |
diff --git a/drivers/scsi/sd_dif.c b/drivers/scsi/sd_dif.c index 6174ca4ea275..a7a691d0af7d 100644 --- a/drivers/scsi/sd_dif.c +++ b/drivers/scsi/sd_dif.c | |||
@@ -365,7 +365,6 @@ void sd_dif_prepare(struct request *rq, sector_t hw_sector, | |||
365 | struct bio *bio; | 365 | struct bio *bio; |
366 | struct scsi_disk *sdkp; | 366 | struct scsi_disk *sdkp; |
367 | struct sd_dif_tuple *sdt; | 367 | struct sd_dif_tuple *sdt; |
368 | unsigned int i, j; | ||
369 | u32 phys, virt; | 368 | u32 phys, virt; |
370 | 369 | ||
371 | sdkp = rq->bio->bi_bdev->bd_disk->private_data; | 370 | sdkp = rq->bio->bi_bdev->bd_disk->private_data; |
@@ -376,19 +375,21 @@ void sd_dif_prepare(struct request *rq, sector_t hw_sector, | |||
376 | phys = hw_sector & 0xffffffff; | 375 | phys = hw_sector & 0xffffffff; |
377 | 376 | ||
378 | __rq_for_each_bio(bio, rq) { | 377 | __rq_for_each_bio(bio, rq) { |
379 | struct bio_vec *iv; | 378 | struct bio_vec iv; |
379 | struct bvec_iter iter; | ||
380 | unsigned int j; | ||
380 | 381 | ||
381 | /* Already remapped? */ | 382 | /* Already remapped? */ |
382 | if (bio_flagged(bio, BIO_MAPPED_INTEGRITY)) | 383 | if (bio_flagged(bio, BIO_MAPPED_INTEGRITY)) |
383 | break; | 384 | break; |
384 | 385 | ||
385 | virt = bio->bi_integrity->bip_sector & 0xffffffff; | 386 | virt = bio->bi_integrity->bip_iter.bi_sector & 0xffffffff; |
386 | 387 | ||
387 | bip_for_each_vec(iv, bio->bi_integrity, i) { | 388 | bip_for_each_vec(iv, bio->bi_integrity, iter) { |
388 | sdt = kmap_atomic(iv->bv_page) | 389 | sdt = kmap_atomic(iv.bv_page) |
389 | + iv->bv_offset; | 390 | + iv.bv_offset; |
390 | 391 | ||
391 | for (j = 0 ; j < iv->bv_len ; j += tuple_sz, sdt++) { | 392 | for (j = 0; j < iv.bv_len; j += tuple_sz, sdt++) { |
392 | 393 | ||
393 | if (be32_to_cpu(sdt->ref_tag) == virt) | 394 | if (be32_to_cpu(sdt->ref_tag) == virt) |
394 | sdt->ref_tag = cpu_to_be32(phys); | 395 | sdt->ref_tag = cpu_to_be32(phys); |
@@ -414,7 +415,7 @@ void sd_dif_complete(struct scsi_cmnd *scmd, unsigned int good_bytes) | |||
414 | struct scsi_disk *sdkp; | 415 | struct scsi_disk *sdkp; |
415 | struct bio *bio; | 416 | struct bio *bio; |
416 | struct sd_dif_tuple *sdt; | 417 | struct sd_dif_tuple *sdt; |
417 | unsigned int i, j, sectors, sector_sz; | 418 | unsigned int j, sectors, sector_sz; |
418 | u32 phys, virt; | 419 | u32 phys, virt; |
419 | 420 | ||
420 | sdkp = scsi_disk(scmd->request->rq_disk); | 421 | sdkp = scsi_disk(scmd->request->rq_disk); |
@@ -430,15 +431,16 @@ void sd_dif_complete(struct scsi_cmnd *scmd, unsigned int good_bytes) | |||
430 | phys >>= 3; | 431 | phys >>= 3; |
431 | 432 | ||
432 | __rq_for_each_bio(bio, scmd->request) { | 433 | __rq_for_each_bio(bio, scmd->request) { |
433 | struct bio_vec *iv; | 434 | struct bio_vec iv; |
435 | struct bvec_iter iter; | ||
434 | 436 | ||
435 | virt = bio->bi_integrity->bip_sector & 0xffffffff; | 437 | virt = bio->bi_integrity->bip_iter.bi_sector & 0xffffffff; |
436 | 438 | ||
437 | bip_for_each_vec(iv, bio->bi_integrity, i) { | 439 | bip_for_each_vec(iv, bio->bi_integrity, iter) { |
438 | sdt = kmap_atomic(iv->bv_page) | 440 | sdt = kmap_atomic(iv.bv_page) |
439 | + iv->bv_offset; | 441 | + iv.bv_offset; |
440 | 442 | ||
441 | for (j = 0 ; j < iv->bv_len ; j += tuple_sz, sdt++) { | 443 | for (j = 0; j < iv.bv_len; j += tuple_sz, sdt++) { |
442 | 444 | ||
443 | if (sectors == 0) { | 445 | if (sectors == 0) { |
444 | kunmap_atomic(sdt); | 446 | kunmap_atomic(sdt); |
diff --git a/drivers/scsi/sr.c b/drivers/scsi/sr.c index 119d67f9c47e..40d85929aefe 100644 --- a/drivers/scsi/sr.c +++ b/drivers/scsi/sr.c | |||
@@ -161,14 +161,10 @@ static inline struct scsi_cd *scsi_cd_get(struct gendisk *disk) | |||
161 | goto out; | 161 | goto out; |
162 | cd = scsi_cd(disk); | 162 | cd = scsi_cd(disk); |
163 | kref_get(&cd->kref); | 163 | kref_get(&cd->kref); |
164 | if (scsi_device_get(cd->device)) | 164 | if (scsi_device_get(cd->device)) { |
165 | goto out_put; | 165 | kref_put(&cd->kref, sr_kref_release); |
166 | if (!scsi_autopm_get_device(cd->device)) | 166 | cd = NULL; |
167 | goto out; | 167 | } |
168 | |||
169 | out_put: | ||
170 | kref_put(&cd->kref, sr_kref_release); | ||
171 | cd = NULL; | ||
172 | out: | 168 | out: |
173 | mutex_unlock(&sr_ref_mutex); | 169 | mutex_unlock(&sr_ref_mutex); |
174 | return cd; | 170 | return cd; |
@@ -180,7 +176,6 @@ static void scsi_cd_put(struct scsi_cd *cd) | |||
180 | 176 | ||
181 | mutex_lock(&sr_ref_mutex); | 177 | mutex_lock(&sr_ref_mutex); |
182 | kref_put(&cd->kref, sr_kref_release); | 178 | kref_put(&cd->kref, sr_kref_release); |
183 | scsi_autopm_put_device(sdev); | ||
184 | scsi_device_put(sdev); | 179 | scsi_device_put(sdev); |
185 | mutex_unlock(&sr_ref_mutex); | 180 | mutex_unlock(&sr_ref_mutex); |
186 | } | 181 | } |
@@ -558,8 +553,6 @@ static int sr_block_ioctl(struct block_device *bdev, fmode_t mode, unsigned cmd, | |||
558 | void __user *argp = (void __user *)arg; | 553 | void __user *argp = (void __user *)arg; |
559 | int ret; | 554 | int ret; |
560 | 555 | ||
561 | scsi_autopm_get_device(cd->device); | ||
562 | |||
563 | mutex_lock(&sr_mutex); | 556 | mutex_lock(&sr_mutex); |
564 | 557 | ||
565 | /* | 558 | /* |
@@ -591,7 +584,6 @@ static int sr_block_ioctl(struct block_device *bdev, fmode_t mode, unsigned cmd, | |||
591 | 584 | ||
592 | out: | 585 | out: |
593 | mutex_unlock(&sr_mutex); | 586 | mutex_unlock(&sr_mutex); |
594 | scsi_autopm_put_device(cd->device); | ||
595 | return ret; | 587 | return ret; |
596 | } | 588 | } |
597 | 589 | ||
@@ -599,17 +591,11 @@ static unsigned int sr_block_check_events(struct gendisk *disk, | |||
599 | unsigned int clearing) | 591 | unsigned int clearing) |
600 | { | 592 | { |
601 | struct scsi_cd *cd = scsi_cd(disk); | 593 | struct scsi_cd *cd = scsi_cd(disk); |
602 | unsigned int ret; | ||
603 | 594 | ||
604 | if (atomic_read(&cd->device->disk_events_disable_depth) == 0) { | 595 | if (atomic_read(&cd->device->disk_events_disable_depth)) |
605 | scsi_autopm_get_device(cd->device); | 596 | return 0; |
606 | ret = cdrom_check_events(&cd->cdi, clearing); | ||
607 | scsi_autopm_put_device(cd->device); | ||
608 | } else { | ||
609 | ret = 0; | ||
610 | } | ||
611 | 597 | ||
612 | return ret; | 598 | return cdrom_check_events(&cd->cdi, clearing); |
613 | } | 599 | } |
614 | 600 | ||
615 | static int sr_block_revalidate_disk(struct gendisk *disk) | 601 | static int sr_block_revalidate_disk(struct gendisk *disk) |
@@ -617,8 +603,6 @@ static int sr_block_revalidate_disk(struct gendisk *disk) | |||
617 | struct scsi_cd *cd = scsi_cd(disk); | 603 | struct scsi_cd *cd = scsi_cd(disk); |
618 | struct scsi_sense_hdr sshdr; | 604 | struct scsi_sense_hdr sshdr; |
619 | 605 | ||
620 | scsi_autopm_get_device(cd->device); | ||
621 | |||
622 | /* if the unit is not ready, nothing more to do */ | 606 | /* if the unit is not ready, nothing more to do */ |
623 | if (scsi_test_unit_ready(cd->device, SR_TIMEOUT, MAX_RETRIES, &sshdr)) | 607 | if (scsi_test_unit_ready(cd->device, SR_TIMEOUT, MAX_RETRIES, &sshdr)) |
624 | goto out; | 608 | goto out; |
@@ -626,7 +610,6 @@ static int sr_block_revalidate_disk(struct gendisk *disk) | |||
626 | sr_cd_check(&cd->cdi); | 610 | sr_cd_check(&cd->cdi); |
627 | get_sectorsize(cd); | 611 | get_sectorsize(cd); |
628 | out: | 612 | out: |
629 | scsi_autopm_put_device(cd->device); | ||
630 | return 0; | 613 | return 0; |
631 | } | 614 | } |
632 | 615 | ||
@@ -747,6 +730,12 @@ static int sr_probe(struct device *dev) | |||
747 | if (register_cdrom(&cd->cdi)) | 730 | if (register_cdrom(&cd->cdi)) |
748 | goto fail_put; | 731 | goto fail_put; |
749 | 732 | ||
733 | /* | ||
734 | * Initialize block layer runtime PM stuffs before the | ||
735 | * periodic event checking request gets started in add_disk. | ||
736 | */ | ||
737 | blk_pm_runtime_init(sdev->request_queue, dev); | ||
738 | |||
750 | dev_set_drvdata(dev, cd); | 739 | dev_set_drvdata(dev, cd); |
751 | disk->flags |= GENHD_FL_REMOVABLE; | 740 | disk->flags |= GENHD_FL_REMOVABLE; |
752 | add_disk(disk); | 741 | add_disk(disk); |
diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c index ff44b3c2cff2..a1d6986261a3 100644 --- a/drivers/scsi/st.c +++ b/drivers/scsi/st.c | |||
@@ -3719,7 +3719,7 @@ static struct st_buffer *new_tape_buffer(int need_dma, int max_sg) | |||
3719 | 3719 | ||
3720 | static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dma) | 3720 | static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dma) |
3721 | { | 3721 | { |
3722 | int segs, nbr, max_segs, b_size, order, got; | 3722 | int segs, max_segs, b_size, order, got; |
3723 | gfp_t priority; | 3723 | gfp_t priority; |
3724 | 3724 | ||
3725 | if (new_size <= STbuffer->buffer_size) | 3725 | if (new_size <= STbuffer->buffer_size) |
@@ -3729,9 +3729,6 @@ static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dm | |||
3729 | normalize_buffer(STbuffer); /* Avoid extra segment */ | 3729 | normalize_buffer(STbuffer); /* Avoid extra segment */ |
3730 | 3730 | ||
3731 | max_segs = STbuffer->use_sg; | 3731 | max_segs = STbuffer->use_sg; |
3732 | nbr = max_segs - STbuffer->frp_segs; | ||
3733 | if (nbr <= 0) | ||
3734 | return 0; | ||
3735 | 3732 | ||
3736 | priority = GFP_KERNEL | __GFP_NOWARN; | 3733 | priority = GFP_KERNEL | __GFP_NOWARN; |
3737 | if (need_dma) | 3734 | if (need_dma) |
diff --git a/drivers/scsi/sym53c8xx_2/sym_glue.c b/drivers/scsi/sym53c8xx_2/sym_glue.c index bac55f7f69f9..6d3ee1ab6362 100644 --- a/drivers/scsi/sym53c8xx_2/sym_glue.c +++ b/drivers/scsi/sym53c8xx_2/sym_glue.c | |||
@@ -1531,7 +1531,7 @@ static int sym_iomap_device(struct sym_device *device) | |||
1531 | struct pci_bus_region bus_addr; | 1531 | struct pci_bus_region bus_addr; |
1532 | int i = 2; | 1532 | int i = 2; |
1533 | 1533 | ||
1534 | pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[1]); | 1534 | pcibios_resource_to_bus(pdev->bus, &bus_addr, &pdev->resource[1]); |
1535 | device->mmio_base = bus_addr.start; | 1535 | device->mmio_base = bus_addr.start; |
1536 | 1536 | ||
1537 | if (device->chip.features & FE_RAM) { | 1537 | if (device->chip.features & FE_RAM) { |
@@ -1541,7 +1541,8 @@ static int sym_iomap_device(struct sym_device *device) | |||
1541 | */ | 1541 | */ |
1542 | if (!pdev->resource[i].flags) | 1542 | if (!pdev->resource[i].flags) |
1543 | i++; | 1543 | i++; |
1544 | pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[i]); | 1544 | pcibios_resource_to_bus(pdev->bus, &bus_addr, |
1545 | &pdev->resource[i]); | ||
1545 | device->ram_base = bus_addr.start; | 1546 | device->ram_base = bus_addr.start; |
1546 | } | 1547 | } |
1547 | 1548 | ||
diff --git a/drivers/scsi/virtio_scsi.c b/drivers/scsi/virtio_scsi.c index c3173dced870..16bfd50cd3fe 100644 --- a/drivers/scsi/virtio_scsi.c +++ b/drivers/scsi/virtio_scsi.c | |||
@@ -956,6 +956,10 @@ static void virtscsi_remove(struct virtio_device *vdev) | |||
956 | #ifdef CONFIG_PM_SLEEP | 956 | #ifdef CONFIG_PM_SLEEP |
957 | static int virtscsi_freeze(struct virtio_device *vdev) | 957 | static int virtscsi_freeze(struct virtio_device *vdev) |
958 | { | 958 | { |
959 | struct Scsi_Host *sh = virtio_scsi_host(vdev); | ||
960 | struct virtio_scsi *vscsi = shost_priv(sh); | ||
961 | |||
962 | unregister_hotcpu_notifier(&vscsi->nb); | ||
959 | virtscsi_remove_vqs(vdev); | 963 | virtscsi_remove_vqs(vdev); |
960 | return 0; | 964 | return 0; |
961 | } | 965 | } |
@@ -964,8 +968,17 @@ static int virtscsi_restore(struct virtio_device *vdev) | |||
964 | { | 968 | { |
965 | struct Scsi_Host *sh = virtio_scsi_host(vdev); | 969 | struct Scsi_Host *sh = virtio_scsi_host(vdev); |
966 | struct virtio_scsi *vscsi = shost_priv(sh); | 970 | struct virtio_scsi *vscsi = shost_priv(sh); |
971 | int err; | ||
972 | |||
973 | err = virtscsi_init(vdev, vscsi); | ||
974 | if (err) | ||
975 | return err; | ||
976 | |||
977 | err = register_hotcpu_notifier(&vscsi->nb); | ||
978 | if (err) | ||
979 | vdev->config->del_vqs(vdev); | ||
967 | 980 | ||
968 | return virtscsi_init(vdev, vscsi); | 981 | return err; |
969 | } | 982 | } |
970 | #endif | 983 | #endif |
971 | 984 | ||
diff --git a/drivers/scsi/zorro7xx.c b/drivers/scsi/zorro7xx.c index cbf3476c68cd..aff31991aea9 100644 --- a/drivers/scsi/zorro7xx.c +++ b/drivers/scsi/zorro7xx.c | |||
@@ -104,7 +104,7 @@ static int zorro7xx_init_one(struct zorro_dev *z, | |||
104 | if (ioaddr > 0x01000000) | 104 | if (ioaddr > 0x01000000) |
105 | hostdata->base = ioremap(ioaddr, zorro_resource_len(z)); | 105 | hostdata->base = ioremap(ioaddr, zorro_resource_len(z)); |
106 | else | 106 | else |
107 | hostdata->base = (void __iomem *)ZTWO_VADDR(ioaddr); | 107 | hostdata->base = ZTWO_VADDR(ioaddr); |
108 | 108 | ||
109 | hostdata->clock = 50; | 109 | hostdata->clock = 50; |
110 | hostdata->chip710 = 1; | 110 | hostdata->chip710 = 1; |