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authorJeff Garzik <jgarzik@pobox.com>2005-10-28 12:17:52 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-10-28 12:17:52 -0400
commit90890687859ea658759e653c4e70ed7e9e1a6217 (patch)
tree9065b30bb189e16ef99b8b5a0d444558f8dc579f /drivers/scsi
parent2995bfb7855aabd493f840af361f3dd7d221caea (diff)
parent5fadd053d9bb4345ec6f405d24db4e7eb49cf81e (diff)
Merge branch 'master'
Diffstat (limited to 'drivers/scsi')
-rw-r--r--drivers/scsi/3w-9xxx.c55
-rw-r--r--drivers/scsi/3w-9xxx.h17
-rw-r--r--drivers/scsi/Kconfig27
-rw-r--r--drivers/scsi/Makefile3
-rw-r--r--drivers/scsi/NCR5380.c2
-rw-r--r--drivers/scsi/aacraid/aachba.c283
-rw-r--r--drivers/scsi/aacraid/aacraid.h19
-rw-r--r--drivers/scsi/aacraid/comminit.c17
-rw-r--r--drivers/scsi/aacraid/commsup.c581
-rw-r--r--drivers/scsi/aacraid/linit.c14
-rw-r--r--drivers/scsi/ahci.c41
-rw-r--r--drivers/scsi/aic7xxx/aic7770_osm.c3
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_osm.c8
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_osm_pci.c3
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx_osm.c8
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx_osm_pci.c3
-rw-r--r--drivers/scsi/ata_piix.c5
-rw-r--r--drivers/scsi/eata.c2
-rw-r--r--drivers/scsi/hosts.c5
-rw-r--r--drivers/scsi/libata-core.c953
-rw-r--r--drivers/scsi/libata-scsi.c730
-rw-r--r--drivers/scsi/libata.h19
-rw-r--r--drivers/scsi/lpfc/lpfc_attr.c8
-rw-r--r--drivers/scsi/lpfc/lpfc_hbadisc.c4
-rw-r--r--drivers/scsi/lpfc/lpfc_hw.h4
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c6
-rw-r--r--drivers/scsi/lpfc/lpfc_mem.c2
-rw-r--r--drivers/scsi/megaraid.c70
-rw-r--r--drivers/scsi/megaraid/Kconfig.megaraid9
-rw-r--r--drivers/scsi/megaraid/Makefile1
-rw-r--r--drivers/scsi/megaraid/megaraid_sas.c2806
-rw-r--r--drivers/scsi/megaraid/megaraid_sas.h1142
-rw-r--r--drivers/scsi/mesh.c29
-rw-r--r--drivers/scsi/osst.c6
-rw-r--r--drivers/scsi/pdc_adma.c739
-rw-r--r--drivers/scsi/qla2xxx/qla_gbl.h4
-rw-r--r--drivers/scsi/qla2xxx/qla_init.c2
-rw-r--r--drivers/scsi/qla2xxx/qla_os.c3
-rw-r--r--drivers/scsi/qla2xxx/qla_rscn.c4
-rw-r--r--drivers/scsi/qlogicpti.c39
-rw-r--r--drivers/scsi/sata_mv.c1145
-rw-r--r--drivers/scsi/sata_nv.c22
-rw-r--r--drivers/scsi/sata_promise.c26
-rw-r--r--drivers/scsi/sata_qstor.c8
-rw-r--r--drivers/scsi/sata_sil.c6
-rw-r--r--drivers/scsi/sata_sil24.c875
-rw-r--r--drivers/scsi/sata_sis.c4
-rw-r--r--drivers/scsi/sata_svw.c4
-rw-r--r--drivers/scsi/sata_sx4.c29
-rw-r--r--drivers/scsi/sata_uli.c4
-rw-r--r--drivers/scsi/sata_via.c4
-rw-r--r--drivers/scsi/sata_vsc.c14
-rw-r--r--drivers/scsi/scsi.c8
-rw-r--r--drivers/scsi/scsi_devinfo.c1
-rw-r--r--drivers/scsi/scsi_error.c2
-rw-r--r--drivers/scsi/scsi_ioctl.c3
-rw-r--r--drivers/scsi/scsi_lib.c9
-rw-r--r--drivers/scsi/scsi_scan.c96
-rw-r--r--drivers/scsi/scsi_transport_fc.c13
-rw-r--r--drivers/scsi/scsi_transport_sas.c9
-rw-r--r--drivers/scsi/sg.c5
-rw-r--r--drivers/scsi/st.c6
62 files changed, 8805 insertions, 1164 deletions
diff --git a/drivers/scsi/3w-9xxx.c b/drivers/scsi/3w-9xxx.c
index a6ac61611f35..a748fbfb6692 100644
--- a/drivers/scsi/3w-9xxx.c
+++ b/drivers/scsi/3w-9xxx.c
@@ -60,6 +60,7 @@
60 Remove un-needed eh_abort handler. 60 Remove un-needed eh_abort handler.
61 Add support for embedded firmware error strings. 61 Add support for embedded firmware error strings.
62 2.26.02.003 - Correctly handle single sgl's with use_sg=1. 62 2.26.02.003 - Correctly handle single sgl's with use_sg=1.
63 2.26.02.004 - Add support for 9550SX controllers.
63*/ 64*/
64 65
65#include <linux/module.h> 66#include <linux/module.h>
@@ -82,7 +83,7 @@
82#include "3w-9xxx.h" 83#include "3w-9xxx.h"
83 84
84/* Globals */ 85/* Globals */
85#define TW_DRIVER_VERSION "2.26.02.003" 86#define TW_DRIVER_VERSION "2.26.02.004"
86static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT]; 87static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT];
87static unsigned int twa_device_extension_count; 88static unsigned int twa_device_extension_count;
88static int twa_major = -1; 89static int twa_major = -1;
@@ -892,11 +893,6 @@ static int twa_decode_bits(TW_Device_Extension *tw_dev, u32 status_reg_value)
892 writel(TW_CONTROL_CLEAR_QUEUE_ERROR, TW_CONTROL_REG_ADDR(tw_dev)); 893 writel(TW_CONTROL_CLEAR_QUEUE_ERROR, TW_CONTROL_REG_ADDR(tw_dev));
893 } 894 }
894 895
895 if (status_reg_value & TW_STATUS_SBUF_WRITE_ERROR) {
896 TW_PRINTK(tw_dev->host, TW_DRIVER, 0xf, "SBUF Write Error: clearing");
897 writel(TW_CONTROL_CLEAR_SBUF_WRITE_ERROR, TW_CONTROL_REG_ADDR(tw_dev));
898 }
899
900 if (status_reg_value & TW_STATUS_MICROCONTROLLER_ERROR) { 896 if (status_reg_value & TW_STATUS_MICROCONTROLLER_ERROR) {
901 if (tw_dev->reset_print == 0) { 897 if (tw_dev->reset_print == 0) {
902 TW_PRINTK(tw_dev->host, TW_DRIVER, 0x10, "Microcontroller Error: clearing"); 898 TW_PRINTK(tw_dev->host, TW_DRIVER, 0x10, "Microcontroller Error: clearing");
@@ -930,6 +926,36 @@ out:
930 return retval; 926 return retval;
931} /* End twa_empty_response_queue() */ 927} /* End twa_empty_response_queue() */
932 928
929/* This function will clear the pchip/response queue on 9550SX */
930static int twa_empty_response_queue_large(TW_Device_Extension *tw_dev)
931{
932 u32 status_reg_value, response_que_value;
933 int count = 0, retval = 1;
934
935 if (tw_dev->tw_pci_dev->device == PCI_DEVICE_ID_3WARE_9550SX) {
936 status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
937
938 while (((status_reg_value & TW_STATUS_RESPONSE_QUEUE_EMPTY) == 0) && (count < TW_MAX_RESPONSE_DRAIN)) {
939 response_que_value = readl(TW_RESPONSE_QUEUE_REG_ADDR_LARGE(tw_dev));
940 if ((response_que_value & TW_9550SX_DRAIN_COMPLETED) == TW_9550SX_DRAIN_COMPLETED) {
941 /* P-chip settle time */
942 msleep(500);
943 retval = 0;
944 goto out;
945 }
946 status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
947 count++;
948 }
949 if (count == TW_MAX_RESPONSE_DRAIN)
950 goto out;
951
952 retval = 0;
953 } else
954 retval = 0;
955out:
956 return retval;
957} /* End twa_empty_response_queue_large() */
958
933/* This function passes sense keys from firmware to scsi layer */ 959/* This function passes sense keys from firmware to scsi layer */
934static int twa_fill_sense(TW_Device_Extension *tw_dev, int request_id, int copy_sense, int print_host) 960static int twa_fill_sense(TW_Device_Extension *tw_dev, int request_id, int copy_sense, int print_host)
935{ 961{
@@ -1613,8 +1639,16 @@ static int twa_reset_sequence(TW_Device_Extension *tw_dev, int soft_reset)
1613 int tries = 0, retval = 1, flashed = 0, do_soft_reset = soft_reset; 1639 int tries = 0, retval = 1, flashed = 0, do_soft_reset = soft_reset;
1614 1640
1615 while (tries < TW_MAX_RESET_TRIES) { 1641 while (tries < TW_MAX_RESET_TRIES) {
1616 if (do_soft_reset) 1642 if (do_soft_reset) {
1617 TW_SOFT_RESET(tw_dev); 1643 TW_SOFT_RESET(tw_dev);
1644 /* Clear pchip/response queue on 9550SX */
1645 if (twa_empty_response_queue_large(tw_dev)) {
1646 TW_PRINTK(tw_dev->host, TW_DRIVER, 0x36, "Response queue (large) empty failed during reset sequence");
1647 do_soft_reset = 1;
1648 tries++;
1649 continue;
1650 }
1651 }
1618 1652
1619 /* Make sure controller is in a good state */ 1653 /* Make sure controller is in a good state */
1620 if (twa_poll_status(tw_dev, TW_STATUS_MICROCONTROLLER_READY | (do_soft_reset == 1 ? TW_STATUS_ATTENTION_INTERRUPT : 0), 60)) { 1654 if (twa_poll_status(tw_dev, TW_STATUS_MICROCONTROLLER_READY | (do_soft_reset == 1 ? TW_STATUS_ATTENTION_INTERRUPT : 0), 60)) {
@@ -2034,7 +2068,10 @@ static int __devinit twa_probe(struct pci_dev *pdev, const struct pci_device_id
2034 goto out_free_device_extension; 2068 goto out_free_device_extension;
2035 } 2069 }
2036 2070
2037 mem_addr = pci_resource_start(pdev, 1); 2071 if (pdev->device == PCI_DEVICE_ID_3WARE_9000)
2072 mem_addr = pci_resource_start(pdev, 1);
2073 else
2074 mem_addr = pci_resource_start(pdev, 2);
2038 2075
2039 /* Save base address */ 2076 /* Save base address */
2040 tw_dev->base_addr = ioremap(mem_addr, PAGE_SIZE); 2077 tw_dev->base_addr = ioremap(mem_addr, PAGE_SIZE);
@@ -2148,6 +2185,8 @@ static void twa_remove(struct pci_dev *pdev)
2148static struct pci_device_id twa_pci_tbl[] __devinitdata = { 2185static struct pci_device_id twa_pci_tbl[] __devinitdata = {
2149 { PCI_VENDOR_ID_3WARE, PCI_DEVICE_ID_3WARE_9000, 2186 { PCI_VENDOR_ID_3WARE, PCI_DEVICE_ID_3WARE_9000,
2150 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2187 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2188 { PCI_VENDOR_ID_3WARE, PCI_DEVICE_ID_3WARE_9550SX,
2189 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2151 { } 2190 { }
2152}; 2191};
2153MODULE_DEVICE_TABLE(pci, twa_pci_tbl); 2192MODULE_DEVICE_TABLE(pci, twa_pci_tbl);
diff --git a/drivers/scsi/3w-9xxx.h b/drivers/scsi/3w-9xxx.h
index 8c8ecbed3b58..46f22cdc8298 100644
--- a/drivers/scsi/3w-9xxx.h
+++ b/drivers/scsi/3w-9xxx.h
@@ -267,7 +267,6 @@ static twa_message_type twa_error_table[] = {
267#define TW_CONTROL_CLEAR_PARITY_ERROR 0x00800000 267#define TW_CONTROL_CLEAR_PARITY_ERROR 0x00800000
268#define TW_CONTROL_CLEAR_QUEUE_ERROR 0x00400000 268#define TW_CONTROL_CLEAR_QUEUE_ERROR 0x00400000
269#define TW_CONTROL_CLEAR_PCI_ABORT 0x00100000 269#define TW_CONTROL_CLEAR_PCI_ABORT 0x00100000
270#define TW_CONTROL_CLEAR_SBUF_WRITE_ERROR 0x00000008
271 270
272/* Status register bit definitions */ 271/* Status register bit definitions */
273#define TW_STATUS_MAJOR_VERSION_MASK 0xF0000000 272#define TW_STATUS_MAJOR_VERSION_MASK 0xF0000000
@@ -285,9 +284,8 @@ static twa_message_type twa_error_table[] = {
285#define TW_STATUS_MICROCONTROLLER_READY 0x00002000 284#define TW_STATUS_MICROCONTROLLER_READY 0x00002000
286#define TW_STATUS_COMMAND_QUEUE_EMPTY 0x00001000 285#define TW_STATUS_COMMAND_QUEUE_EMPTY 0x00001000
287#define TW_STATUS_EXPECTED_BITS 0x00002000 286#define TW_STATUS_EXPECTED_BITS 0x00002000
288#define TW_STATUS_UNEXPECTED_BITS 0x00F00008 287#define TW_STATUS_UNEXPECTED_BITS 0x00F00000
289#define TW_STATUS_SBUF_WRITE_ERROR 0x00000008 288#define TW_STATUS_VALID_INTERRUPT 0x00DF0000
290#define TW_STATUS_VALID_INTERRUPT 0x00DF0008
291 289
292/* RESPONSE QUEUE BIT DEFINITIONS */ 290/* RESPONSE QUEUE BIT DEFINITIONS */
293#define TW_RESPONSE_ID_MASK 0x00000FF0 291#define TW_RESPONSE_ID_MASK 0x00000FF0
@@ -324,9 +322,9 @@ static twa_message_type twa_error_table[] = {
324 322
325/* Compatibility defines */ 323/* Compatibility defines */
326#define TW_9000_ARCH_ID 0x5 324#define TW_9000_ARCH_ID 0x5
327#define TW_CURRENT_DRIVER_SRL 28 325#define TW_CURRENT_DRIVER_SRL 30
328#define TW_CURRENT_DRIVER_BUILD 9 326#define TW_CURRENT_DRIVER_BUILD 80
329#define TW_CURRENT_DRIVER_BRANCH 4 327#define TW_CURRENT_DRIVER_BRANCH 0
330 328
331/* Phase defines */ 329/* Phase defines */
332#define TW_PHASE_INITIAL 0 330#define TW_PHASE_INITIAL 0
@@ -334,6 +332,7 @@ static twa_message_type twa_error_table[] = {
334#define TW_PHASE_SGLIST 2 332#define TW_PHASE_SGLIST 2
335 333
336/* Misc defines */ 334/* Misc defines */
335#define TW_9550SX_DRAIN_COMPLETED 0xFFFF
337#define TW_SECTOR_SIZE 512 336#define TW_SECTOR_SIZE 512
338#define TW_ALIGNMENT_9000 4 /* 4 bytes */ 337#define TW_ALIGNMENT_9000 4 /* 4 bytes */
339#define TW_ALIGNMENT_9000_SGL 0x3 338#define TW_ALIGNMENT_9000_SGL 0x3
@@ -417,6 +416,9 @@ static twa_message_type twa_error_table[] = {
417#ifndef PCI_DEVICE_ID_3WARE_9000 416#ifndef PCI_DEVICE_ID_3WARE_9000
418#define PCI_DEVICE_ID_3WARE_9000 0x1002 417#define PCI_DEVICE_ID_3WARE_9000 0x1002
419#endif 418#endif
419#ifndef PCI_DEVICE_ID_3WARE_9550SX
420#define PCI_DEVICE_ID_3WARE_9550SX 0x1003
421#endif
420 422
421/* Bitmask macros to eliminate bitfields */ 423/* Bitmask macros to eliminate bitfields */
422 424
@@ -443,6 +445,7 @@ static twa_message_type twa_error_table[] = {
443#define TW_STATUS_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + 0x4) 445#define TW_STATUS_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + 0x4)
444#define TW_COMMAND_QUEUE_REG_ADDR(x) (sizeof(dma_addr_t) > 4 ? ((unsigned char __iomem *)x->base_addr + 0x20) : ((unsigned char __iomem *)x->base_addr + 0x8)) 446#define TW_COMMAND_QUEUE_REG_ADDR(x) (sizeof(dma_addr_t) > 4 ? ((unsigned char __iomem *)x->base_addr + 0x20) : ((unsigned char __iomem *)x->base_addr + 0x8))
445#define TW_RESPONSE_QUEUE_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + 0xC) 447#define TW_RESPONSE_QUEUE_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + 0xC)
448#define TW_RESPONSE_QUEUE_REG_ADDR_LARGE(x) ((unsigned char __iomem *)x->base_addr + 0x30)
446#define TW_CLEAR_ALL_INTERRUPTS(x) (writel(TW_STATUS_VALID_INTERRUPT, TW_CONTROL_REG_ADDR(x))) 449#define TW_CLEAR_ALL_INTERRUPTS(x) (writel(TW_STATUS_VALID_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
447#define TW_CLEAR_ATTENTION_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT, TW_CONTROL_REG_ADDR(x))) 450#define TW_CLEAR_ATTENTION_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
448#define TW_CLEAR_HOST_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_HOST_INTERRUPT, TW_CONTROL_REG_ADDR(x))) 451#define TW_CLEAR_HOST_INTERRUPT(x) (writel(TW_CONTROL_CLEAR_HOST_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 20019b82b4a8..9c9f162bd6ed 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -489,11 +489,11 @@ config SCSI_SATA_NV
489 489
490 If unsure, say N. 490 If unsure, say N.
491 491
492config SCSI_SATA_PROMISE 492config SCSI_PDC_ADMA
493 tristate "Promise SATA TX2/TX4 support" 493 tristate "Pacific Digital ADMA support"
494 depends on SCSI_SATA && PCI 494 depends on SCSI_SATA && PCI
495 help 495 help
496 This option enables support for Promise Serial ATA TX2/TX4. 496 This option enables support for Pacific Digital ADMA controllers
497 497
498 If unsure, say N. 498 If unsure, say N.
499 499
@@ -505,6 +505,14 @@ config SCSI_SATA_QSTOR
505 505
506 If unsure, say N. 506 If unsure, say N.
507 507
508config SCSI_SATA_PROMISE
509 tristate "Promise SATA TX2/TX4 support"
510 depends on SCSI_SATA && PCI
511 help
512 This option enables support for Promise Serial ATA TX2/TX4.
513
514 If unsure, say N.
515
508config SCSI_SATA_SX4 516config SCSI_SATA_SX4
509 tristate "Promise SATA SX4 support" 517 tristate "Promise SATA SX4 support"
510 depends on SCSI_SATA && PCI && EXPERIMENTAL 518 depends on SCSI_SATA && PCI && EXPERIMENTAL
@@ -521,6 +529,14 @@ config SCSI_SATA_SIL
521 529
522 If unsure, say N. 530 If unsure, say N.
523 531
532config SCSI_SATA_SIL24
533 tristate "Silicon Image 3124/3132 SATA support"
534 depends on SCSI_SATA && PCI && EXPERIMENTAL
535 help
536 This option enables support for Silicon Image 3124/3132 Serial ATA.
537
538 If unsure, say N.
539
524config SCSI_SATA_SIS 540config SCSI_SATA_SIS
525 tristate "SiS 964/180 SATA support" 541 tristate "SiS 964/180 SATA support"
526 depends on SCSI_SATA && PCI && EXPERIMENTAL 542 depends on SCSI_SATA && PCI && EXPERIMENTAL
@@ -553,6 +569,11 @@ config SCSI_SATA_VITESSE
553 569
554 If unsure, say N. 570 If unsure, say N.
555 571
572config SCSI_SATA_INTEL_COMBINED
573 bool
574 depends on IDE=y && !BLK_DEV_IDE_SATA && (SCSI_SATA_AHCI || SCSI_ATA_PIIX)
575 default y
576
556config SCSI_BUSLOGIC 577config SCSI_BUSLOGIC
557 tristate "BusLogic SCSI support" 578 tristate "BusLogic SCSI support"
558 depends on (PCI || ISA || MCA) && SCSI && ISA_DMA_API 579 depends on (PCI || ISA || MCA) && SCSI && ISA_DMA_API
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 1e4edbdf2730..2d4439826c08 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -99,6 +99,7 @@ obj-$(CONFIG_SCSI_DC395x) += dc395x.o
99obj-$(CONFIG_SCSI_DC390T) += tmscsim.o 99obj-$(CONFIG_SCSI_DC390T) += tmscsim.o
100obj-$(CONFIG_MEGARAID_LEGACY) += megaraid.o 100obj-$(CONFIG_MEGARAID_LEGACY) += megaraid.o
101obj-$(CONFIG_MEGARAID_NEWGEN) += megaraid/ 101obj-$(CONFIG_MEGARAID_NEWGEN) += megaraid/
102obj-$(CONFIG_MEGARAID_SAS) += megaraid/
102obj-$(CONFIG_SCSI_ACARD) += atp870u.o 103obj-$(CONFIG_SCSI_ACARD) += atp870u.o
103obj-$(CONFIG_SCSI_SUNESP) += esp.o 104obj-$(CONFIG_SCSI_SUNESP) += esp.o
104obj-$(CONFIG_SCSI_GDTH) += gdth.o 105obj-$(CONFIG_SCSI_GDTH) += gdth.o
@@ -129,6 +130,7 @@ obj-$(CONFIG_SCSI_ATA_PIIX) += libata.o ata_piix.o
129obj-$(CONFIG_SCSI_SATA_PROMISE) += libata.o sata_promise.o 130obj-$(CONFIG_SCSI_SATA_PROMISE) += libata.o sata_promise.o
130obj-$(CONFIG_SCSI_SATA_QSTOR) += libata.o sata_qstor.o 131obj-$(CONFIG_SCSI_SATA_QSTOR) += libata.o sata_qstor.o
131obj-$(CONFIG_SCSI_SATA_SIL) += libata.o sata_sil.o 132obj-$(CONFIG_SCSI_SATA_SIL) += libata.o sata_sil.o
133obj-$(CONFIG_SCSI_SATA_SIL24) += libata.o sata_sil24.o
132obj-$(CONFIG_SCSI_SATA_VIA) += libata.o sata_via.o 134obj-$(CONFIG_SCSI_SATA_VIA) += libata.o sata_via.o
133obj-$(CONFIG_SCSI_SATA_VITESSE) += libata.o sata_vsc.o 135obj-$(CONFIG_SCSI_SATA_VITESSE) += libata.o sata_vsc.o
134obj-$(CONFIG_SCSI_SATA_SIS) += libata.o sata_sis.o 136obj-$(CONFIG_SCSI_SATA_SIS) += libata.o sata_sis.o
@@ -136,6 +138,7 @@ obj-$(CONFIG_SCSI_SATA_SX4) += libata.o sata_sx4.o
136obj-$(CONFIG_SCSI_SATA_NV) += libata.o sata_nv.o 138obj-$(CONFIG_SCSI_SATA_NV) += libata.o sata_nv.o
137obj-$(CONFIG_SCSI_SATA_ULI) += libata.o sata_uli.o 139obj-$(CONFIG_SCSI_SATA_ULI) += libata.o sata_uli.o
138obj-$(CONFIG_SCSI_SATA_MV) += libata.o sata_mv.o 140obj-$(CONFIG_SCSI_SATA_MV) += libata.o sata_mv.o
141obj-$(CONFIG_SCSI_PDC_ADMA) += libata.o pdc_adma.o
139 142
140obj-$(CONFIG_ARM) += arm/ 143obj-$(CONFIG_ARM) += arm/
141 144
diff --git a/drivers/scsi/NCR5380.c b/drivers/scsi/NCR5380.c
index d40ba0bd68a3..23392ae7df8b 100644
--- a/drivers/scsi/NCR5380.c
+++ b/drivers/scsi/NCR5380.c
@@ -91,7 +91,7 @@
91#ifndef NDEBUG 91#ifndef NDEBUG
92#define NDEBUG 0 92#define NDEBUG 0
93#endif 93#endif
94#ifndef NDEBUG 94#ifndef NDEBUG_ABORT
95#define NDEBUG_ABORT 0 95#define NDEBUG_ABORT 0
96#endif 96#endif
97 97
diff --git a/drivers/scsi/aacraid/aachba.c b/drivers/scsi/aacraid/aachba.c
index a8e3dfcd0dc7..93416f760e5a 100644
--- a/drivers/scsi/aacraid/aachba.c
+++ b/drivers/scsi/aacraid/aachba.c
@@ -313,18 +313,37 @@ int aac_get_containers(struct aac_dev *dev)
313 } 313 }
314 dresp = (struct aac_mount *)fib_data(fibptr); 314 dresp = (struct aac_mount *)fib_data(fibptr);
315 315
316 if ((le32_to_cpu(dresp->status) == ST_OK) &&
317 (le32_to_cpu(dresp->mnt[0].vol) == CT_NONE)) {
318 dinfo->command = cpu_to_le32(VM_NameServe64);
319 dinfo->count = cpu_to_le32(index);
320 dinfo->type = cpu_to_le32(FT_FILESYS);
321
322 if (fib_send(ContainerCommand,
323 fibptr,
324 sizeof(struct aac_query_mount),
325 FsaNormal,
326 1, 1,
327 NULL, NULL) < 0)
328 continue;
329 } else
330 dresp->mnt[0].capacityhigh = 0;
331
316 dprintk ((KERN_DEBUG 332 dprintk ((KERN_DEBUG
317 "VM_NameServe cid=%d status=%d vol=%d state=%d cap=%u\n", 333 "VM_NameServe cid=%d status=%d vol=%d state=%d cap=%llu\n",
318 (int)index, (int)le32_to_cpu(dresp->status), 334 (int)index, (int)le32_to_cpu(dresp->status),
319 (int)le32_to_cpu(dresp->mnt[0].vol), 335 (int)le32_to_cpu(dresp->mnt[0].vol),
320 (int)le32_to_cpu(dresp->mnt[0].state), 336 (int)le32_to_cpu(dresp->mnt[0].state),
321 (unsigned)le32_to_cpu(dresp->mnt[0].capacity))); 337 ((u64)le32_to_cpu(dresp->mnt[0].capacity)) +
338 (((u64)le32_to_cpu(dresp->mnt[0].capacityhigh)) << 32)));
322 if ((le32_to_cpu(dresp->status) == ST_OK) && 339 if ((le32_to_cpu(dresp->status) == ST_OK) &&
323 (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE) && 340 (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE) &&
324 (le32_to_cpu(dresp->mnt[0].state) != FSCS_HIDDEN)) { 341 (le32_to_cpu(dresp->mnt[0].state) != FSCS_HIDDEN)) {
325 fsa_dev_ptr[index].valid = 1; 342 fsa_dev_ptr[index].valid = 1;
326 fsa_dev_ptr[index].type = le32_to_cpu(dresp->mnt[0].vol); 343 fsa_dev_ptr[index].type = le32_to_cpu(dresp->mnt[0].vol);
327 fsa_dev_ptr[index].size = le32_to_cpu(dresp->mnt[0].capacity); 344 fsa_dev_ptr[index].size
345 = ((u64)le32_to_cpu(dresp->mnt[0].capacity)) +
346 (((u64)le32_to_cpu(dresp->mnt[0].capacityhigh)) << 32);
328 if (le32_to_cpu(dresp->mnt[0].state) & FSCS_READONLY) 347 if (le32_to_cpu(dresp->mnt[0].state) & FSCS_READONLY)
329 fsa_dev_ptr[index].ro = 1; 348 fsa_dev_ptr[index].ro = 1;
330 } 349 }
@@ -460,7 +479,7 @@ static int aac_get_container_name(struct scsi_cmnd * scsicmd, int cid)
460 * is updated in the struct fsa_dev_info structure rather than returned. 479 * is updated in the struct fsa_dev_info structure rather than returned.
461 */ 480 */
462 481
463static int probe_container(struct aac_dev *dev, int cid) 482int probe_container(struct aac_dev *dev, int cid)
464{ 483{
465 struct fsa_dev_info *fsa_dev_ptr; 484 struct fsa_dev_info *fsa_dev_ptr;
466 int status; 485 int status;
@@ -497,11 +516,29 @@ static int probe_container(struct aac_dev *dev, int cid)
497 dresp = (struct aac_mount *) fib_data(fibptr); 516 dresp = (struct aac_mount *) fib_data(fibptr);
498 517
499 if ((le32_to_cpu(dresp->status) == ST_OK) && 518 if ((le32_to_cpu(dresp->status) == ST_OK) &&
519 (le32_to_cpu(dresp->mnt[0].vol) == CT_NONE)) {
520 dinfo->command = cpu_to_le32(VM_NameServe64);
521 dinfo->count = cpu_to_le32(cid);
522 dinfo->type = cpu_to_le32(FT_FILESYS);
523
524 if (fib_send(ContainerCommand,
525 fibptr,
526 sizeof(struct aac_query_mount),
527 FsaNormal,
528 1, 1,
529 NULL, NULL) < 0)
530 goto error;
531 } else
532 dresp->mnt[0].capacityhigh = 0;
533
534 if ((le32_to_cpu(dresp->status) == ST_OK) &&
500 (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE) && 535 (le32_to_cpu(dresp->mnt[0].vol) != CT_NONE) &&
501 (le32_to_cpu(dresp->mnt[0].state) != FSCS_HIDDEN)) { 536 (le32_to_cpu(dresp->mnt[0].state) != FSCS_HIDDEN)) {
502 fsa_dev_ptr[cid].valid = 1; 537 fsa_dev_ptr[cid].valid = 1;
503 fsa_dev_ptr[cid].type = le32_to_cpu(dresp->mnt[0].vol); 538 fsa_dev_ptr[cid].type = le32_to_cpu(dresp->mnt[0].vol);
504 fsa_dev_ptr[cid].size = le32_to_cpu(dresp->mnt[0].capacity); 539 fsa_dev_ptr[cid].size
540 = ((u64)le32_to_cpu(dresp->mnt[0].capacity)) +
541 (((u64)le32_to_cpu(dresp->mnt[0].capacityhigh)) << 32);
505 if (le32_to_cpu(dresp->mnt[0].state) & FSCS_READONLY) 542 if (le32_to_cpu(dresp->mnt[0].state) & FSCS_READONLY)
506 fsa_dev_ptr[cid].ro = 1; 543 fsa_dev_ptr[cid].ro = 1;
507 } 544 }
@@ -655,7 +692,7 @@ int aac_get_adapter_info(struct aac_dev* dev)
655 fibptr, 692 fibptr,
656 sizeof(*info), 693 sizeof(*info),
657 FsaNormal, 694 FsaNormal,
658 1, 1, 695 -1, 1, /* First `interrupt' command uses special wait */
659 NULL, 696 NULL,
660 NULL); 697 NULL);
661 698
@@ -806,8 +843,8 @@ int aac_get_adapter_info(struct aac_dev* dev)
806 if (!(dev->raw_io_interface)) { 843 if (!(dev->raw_io_interface)) {
807 dev->scsi_host_ptr->sg_tablesize = (dev->max_fib_size - 844 dev->scsi_host_ptr->sg_tablesize = (dev->max_fib_size -
808 sizeof(struct aac_fibhdr) - 845 sizeof(struct aac_fibhdr) -
809 sizeof(struct aac_write) + sizeof(struct sgmap)) / 846 sizeof(struct aac_write) + sizeof(struct sgentry)) /
810 sizeof(struct sgmap); 847 sizeof(struct sgentry);
811 if (dev->dac_support) { 848 if (dev->dac_support) {
812 /* 849 /*
813 * 38 scatter gather elements 850 * 38 scatter gather elements
@@ -816,8 +853,8 @@ int aac_get_adapter_info(struct aac_dev* dev)
816 (dev->max_fib_size - 853 (dev->max_fib_size -
817 sizeof(struct aac_fibhdr) - 854 sizeof(struct aac_fibhdr) -
818 sizeof(struct aac_write64) + 855 sizeof(struct aac_write64) +
819 sizeof(struct sgmap64)) / 856 sizeof(struct sgentry64)) /
820 sizeof(struct sgmap64); 857 sizeof(struct sgentry64);
821 } 858 }
822 dev->scsi_host_ptr->max_sectors = AAC_MAX_32BIT_SGBCOUNT; 859 dev->scsi_host_ptr->max_sectors = AAC_MAX_32BIT_SGBCOUNT;
823 if(!(dev->adapter_info.options & AAC_OPT_NEW_COMM)) { 860 if(!(dev->adapter_info.options & AAC_OPT_NEW_COMM)) {
@@ -854,7 +891,40 @@ static void io_callback(void *context, struct fib * fibptr)
854 dev = (struct aac_dev *)scsicmd->device->host->hostdata; 891 dev = (struct aac_dev *)scsicmd->device->host->hostdata;
855 cid = ID_LUN_TO_CONTAINER(scsicmd->device->id, scsicmd->device->lun); 892 cid = ID_LUN_TO_CONTAINER(scsicmd->device->id, scsicmd->device->lun);
856 893
857 dprintk((KERN_DEBUG "io_callback[cpu %d]: lba = %u, t = %ld.\n", smp_processor_id(), ((scsicmd->cmnd[1] & 0x1F) << 16) | (scsicmd->cmnd[2] << 8) | scsicmd->cmnd[3], jiffies)); 894 if (nblank(dprintk(x))) {
895 u64 lba;
896 switch (scsicmd->cmnd[0]) {
897 case WRITE_6:
898 case READ_6:
899 lba = ((scsicmd->cmnd[1] & 0x1F) << 16) |
900 (scsicmd->cmnd[2] << 8) | scsicmd->cmnd[3];
901 break;
902 case WRITE_16:
903 case READ_16:
904 lba = ((u64)scsicmd->cmnd[2] << 56) |
905 ((u64)scsicmd->cmnd[3] << 48) |
906 ((u64)scsicmd->cmnd[4] << 40) |
907 ((u64)scsicmd->cmnd[5] << 32) |
908 ((u64)scsicmd->cmnd[6] << 24) |
909 (scsicmd->cmnd[7] << 16) |
910 (scsicmd->cmnd[8] << 8) | scsicmd->cmnd[9];
911 break;
912 case WRITE_12:
913 case READ_12:
914 lba = ((u64)scsicmd->cmnd[2] << 24) |
915 (scsicmd->cmnd[3] << 16) |
916 (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5];
917 break;
918 default:
919 lba = ((u64)scsicmd->cmnd[2] << 24) |
920 (scsicmd->cmnd[3] << 16) |
921 (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5];
922 break;
923 }
924 printk(KERN_DEBUG
925 "io_callback[cpu %d]: lba = %llu, t = %ld.\n",
926 smp_processor_id(), (unsigned long long)lba, jiffies);
927 }
858 928
859 if (fibptr == NULL) 929 if (fibptr == NULL)
860 BUG(); 930 BUG();
@@ -895,7 +965,7 @@ static void io_callback(void *context, struct fib * fibptr)
895 965
896static int aac_read(struct scsi_cmnd * scsicmd, int cid) 966static int aac_read(struct scsi_cmnd * scsicmd, int cid)
897{ 967{
898 u32 lba; 968 u64 lba;
899 u32 count; 969 u32 count;
900 int status; 970 int status;
901 971
@@ -907,23 +977,69 @@ static int aac_read(struct scsi_cmnd * scsicmd, int cid)
907 /* 977 /*
908 * Get block address and transfer length 978 * Get block address and transfer length
909 */ 979 */
910 if (scsicmd->cmnd[0] == READ_6) /* 6 byte command */ 980 switch (scsicmd->cmnd[0]) {
911 { 981 case READ_6:
912 dprintk((KERN_DEBUG "aachba: received a read(6) command on id %d.\n", cid)); 982 dprintk((KERN_DEBUG "aachba: received a read(6) command on id %d.\n", cid));
913 983
914 lba = ((scsicmd->cmnd[1] & 0x1F) << 16) | (scsicmd->cmnd[2] << 8) | scsicmd->cmnd[3]; 984 lba = ((scsicmd->cmnd[1] & 0x1F) << 16) |
985 (scsicmd->cmnd[2] << 8) | scsicmd->cmnd[3];
915 count = scsicmd->cmnd[4]; 986 count = scsicmd->cmnd[4];
916 987
917 if (count == 0) 988 if (count == 0)
918 count = 256; 989 count = 256;
919 } else { 990 break;
991 case READ_16:
992 dprintk((KERN_DEBUG "aachba: received a read(16) command on id %d.\n", cid));
993
994 lba = ((u64)scsicmd->cmnd[2] << 56) |
995 ((u64)scsicmd->cmnd[3] << 48) |
996 ((u64)scsicmd->cmnd[4] << 40) |
997 ((u64)scsicmd->cmnd[5] << 32) |
998 ((u64)scsicmd->cmnd[6] << 24) |
999 (scsicmd->cmnd[7] << 16) |
1000 (scsicmd->cmnd[8] << 8) | scsicmd->cmnd[9];
1001 count = (scsicmd->cmnd[10] << 24) |
1002 (scsicmd->cmnd[11] << 16) |
1003 (scsicmd->cmnd[12] << 8) | scsicmd->cmnd[13];
1004 break;
1005 case READ_12:
1006 dprintk((KERN_DEBUG "aachba: received a read(12) command on id %d.\n", cid));
1007
1008 lba = ((u64)scsicmd->cmnd[2] << 24) |
1009 (scsicmd->cmnd[3] << 16) |
1010 (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5];
1011 count = (scsicmd->cmnd[6] << 24) |
1012 (scsicmd->cmnd[7] << 16) |
1013 (scsicmd->cmnd[8] << 8) | scsicmd->cmnd[9];
1014 break;
1015 default:
920 dprintk((KERN_DEBUG "aachba: received a read(10) command on id %d.\n", cid)); 1016 dprintk((KERN_DEBUG "aachba: received a read(10) command on id %d.\n", cid));
921 1017
922 lba = (scsicmd->cmnd[2] << 24) | (scsicmd->cmnd[3] << 16) | (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5]; 1018 lba = ((u64)scsicmd->cmnd[2] << 24) |
1019 (scsicmd->cmnd[3] << 16) |
1020 (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5];
923 count = (scsicmd->cmnd[7] << 8) | scsicmd->cmnd[8]; 1021 count = (scsicmd->cmnd[7] << 8) | scsicmd->cmnd[8];
1022 break;
924 } 1023 }
925 dprintk((KERN_DEBUG "aac_read[cpu %d]: lba = %u, t = %ld.\n", 1024 dprintk((KERN_DEBUG "aac_read[cpu %d]: lba = %llu, t = %ld.\n",
926 smp_processor_id(), (unsigned long long)lba, jiffies)); 1025 smp_processor_id(), (unsigned long long)lba, jiffies));
1026 if ((!(dev->raw_io_interface) || !(dev->raw_io_64)) &&
1027 (lba & 0xffffffff00000000LL)) {
1028 dprintk((KERN_DEBUG "aac_read: Illegal lba\n"));
1029 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 |
1030 SAM_STAT_CHECK_CONDITION;
1031 set_sense((u8 *) &dev->fsa_dev[cid].sense_data,
1032 HARDWARE_ERROR,
1033 SENCODE_INTERNAL_TARGET_FAILURE,
1034 ASENCODE_INTERNAL_TARGET_FAILURE, 0, 0,
1035 0, 0);
1036 memcpy(scsicmd->sense_buffer, &dev->fsa_dev[cid].sense_data,
1037 (sizeof(dev->fsa_dev[cid].sense_data) > sizeof(scsicmd->sense_buffer))
1038 ? sizeof(scsicmd->sense_buffer)
1039 : sizeof(dev->fsa_dev[cid].sense_data));
1040 scsicmd->scsi_done(scsicmd);
1041 return 0;
1042 }
927 /* 1043 /*
928 * Alocate and initialize a Fib 1044 * Alocate and initialize a Fib
929 */ 1045 */
@@ -936,8 +1052,8 @@ static int aac_read(struct scsi_cmnd * scsicmd, int cid)
936 if (dev->raw_io_interface) { 1052 if (dev->raw_io_interface) {
937 struct aac_raw_io *readcmd; 1053 struct aac_raw_io *readcmd;
938 readcmd = (struct aac_raw_io *) fib_data(cmd_fibcontext); 1054 readcmd = (struct aac_raw_io *) fib_data(cmd_fibcontext);
939 readcmd->block[0] = cpu_to_le32(lba); 1055 readcmd->block[0] = cpu_to_le32((u32)(lba&0xffffffff));
940 readcmd->block[1] = 0; 1056 readcmd->block[1] = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32));
941 readcmd->count = cpu_to_le32(count<<9); 1057 readcmd->count = cpu_to_le32(count<<9);
942 readcmd->cid = cpu_to_le16(cid); 1058 readcmd->cid = cpu_to_le16(cid);
943 readcmd->flags = cpu_to_le16(1); 1059 readcmd->flags = cpu_to_le16(1);
@@ -964,7 +1080,7 @@ static int aac_read(struct scsi_cmnd * scsicmd, int cid)
964 readcmd->command = cpu_to_le32(VM_CtHostRead64); 1080 readcmd->command = cpu_to_le32(VM_CtHostRead64);
965 readcmd->cid = cpu_to_le16(cid); 1081 readcmd->cid = cpu_to_le16(cid);
966 readcmd->sector_count = cpu_to_le16(count); 1082 readcmd->sector_count = cpu_to_le16(count);
967 readcmd->block = cpu_to_le32(lba); 1083 readcmd->block = cpu_to_le32((u32)(lba&0xffffffff));
968 readcmd->pad = 0; 1084 readcmd->pad = 0;
969 readcmd->flags = 0; 1085 readcmd->flags = 0;
970 1086
@@ -989,7 +1105,7 @@ static int aac_read(struct scsi_cmnd * scsicmd, int cid)
989 readcmd = (struct aac_read *) fib_data(cmd_fibcontext); 1105 readcmd = (struct aac_read *) fib_data(cmd_fibcontext);
990 readcmd->command = cpu_to_le32(VM_CtBlockRead); 1106 readcmd->command = cpu_to_le32(VM_CtBlockRead);
991 readcmd->cid = cpu_to_le32(cid); 1107 readcmd->cid = cpu_to_le32(cid);
992 readcmd->block = cpu_to_le32(lba); 1108 readcmd->block = cpu_to_le32((u32)(lba&0xffffffff));
993 readcmd->count = cpu_to_le32(count * 512); 1109 readcmd->count = cpu_to_le32(count * 512);
994 1110
995 aac_build_sg(scsicmd, &readcmd->sg); 1111 aac_build_sg(scsicmd, &readcmd->sg);
@@ -1031,7 +1147,7 @@ static int aac_read(struct scsi_cmnd * scsicmd, int cid)
1031 1147
1032static int aac_write(struct scsi_cmnd * scsicmd, int cid) 1148static int aac_write(struct scsi_cmnd * scsicmd, int cid)
1033{ 1149{
1034 u32 lba; 1150 u64 lba;
1035 u32 count; 1151 u32 count;
1036 int status; 1152 int status;
1037 u16 fibsize; 1153 u16 fibsize;
@@ -1048,13 +1164,48 @@ static int aac_write(struct scsi_cmnd * scsicmd, int cid)
1048 count = scsicmd->cmnd[4]; 1164 count = scsicmd->cmnd[4];
1049 if (count == 0) 1165 if (count == 0)
1050 count = 256; 1166 count = 256;
1167 } else if (scsicmd->cmnd[0] == WRITE_16) { /* 16 byte command */
1168 dprintk((KERN_DEBUG "aachba: received a write(16) command on id %d.\n", cid));
1169
1170 lba = ((u64)scsicmd->cmnd[2] << 56) |
1171 ((u64)scsicmd->cmnd[3] << 48) |
1172 ((u64)scsicmd->cmnd[4] << 40) |
1173 ((u64)scsicmd->cmnd[5] << 32) |
1174 ((u64)scsicmd->cmnd[6] << 24) |
1175 (scsicmd->cmnd[7] << 16) |
1176 (scsicmd->cmnd[8] << 8) | scsicmd->cmnd[9];
1177 count = (scsicmd->cmnd[10] << 24) | (scsicmd->cmnd[11] << 16) |
1178 (scsicmd->cmnd[12] << 8) | scsicmd->cmnd[13];
1179 } else if (scsicmd->cmnd[0] == WRITE_12) { /* 12 byte command */
1180 dprintk((KERN_DEBUG "aachba: received a write(12) command on id %d.\n", cid));
1181
1182 lba = ((u64)scsicmd->cmnd[2] << 24) | (scsicmd->cmnd[3] << 16)
1183 | (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5];
1184 count = (scsicmd->cmnd[6] << 24) | (scsicmd->cmnd[7] << 16)
1185 | (scsicmd->cmnd[8] << 8) | scsicmd->cmnd[9];
1051 } else { 1186 } else {
1052 dprintk((KERN_DEBUG "aachba: received a write(10) command on id %d.\n", cid)); 1187 dprintk((KERN_DEBUG "aachba: received a write(10) command on id %d.\n", cid));
1053 lba = (scsicmd->cmnd[2] << 24) | (scsicmd->cmnd[3] << 16) | (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5]; 1188 lba = ((u64)scsicmd->cmnd[2] << 24) | (scsicmd->cmnd[3] << 16) | (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5];
1054 count = (scsicmd->cmnd[7] << 8) | scsicmd->cmnd[8]; 1189 count = (scsicmd->cmnd[7] << 8) | scsicmd->cmnd[8];
1055 } 1190 }
1056 dprintk((KERN_DEBUG "aac_write[cpu %d]: lba = %u, t = %ld.\n", 1191 dprintk((KERN_DEBUG "aac_write[cpu %d]: lba = %llu, t = %ld.\n",
1057 smp_processor_id(), (unsigned long long)lba, jiffies)); 1192 smp_processor_id(), (unsigned long long)lba, jiffies));
1193 if ((!(dev->raw_io_interface) || !(dev->raw_io_64))
1194 && (lba & 0xffffffff00000000LL)) {
1195 dprintk((KERN_DEBUG "aac_write: Illegal lba\n"));
1196 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_CHECK_CONDITION;
1197 set_sense((u8 *) &dev->fsa_dev[cid].sense_data,
1198 HARDWARE_ERROR,
1199 SENCODE_INTERNAL_TARGET_FAILURE,
1200 ASENCODE_INTERNAL_TARGET_FAILURE, 0, 0,
1201 0, 0);
1202 memcpy(scsicmd->sense_buffer, &dev->fsa_dev[cid].sense_data,
1203 (sizeof(dev->fsa_dev[cid].sense_data) > sizeof(scsicmd->sense_buffer))
1204 ? sizeof(scsicmd->sense_buffer)
1205 : sizeof(dev->fsa_dev[cid].sense_data));
1206 scsicmd->scsi_done(scsicmd);
1207 return 0;
1208 }
1058 /* 1209 /*
1059 * Allocate and initialize a Fib then setup a BlockWrite command 1210 * Allocate and initialize a Fib then setup a BlockWrite command
1060 */ 1211 */
@@ -1068,8 +1219,8 @@ static int aac_write(struct scsi_cmnd * scsicmd, int cid)
1068 if (dev->raw_io_interface) { 1219 if (dev->raw_io_interface) {
1069 struct aac_raw_io *writecmd; 1220 struct aac_raw_io *writecmd;
1070 writecmd = (struct aac_raw_io *) fib_data(cmd_fibcontext); 1221 writecmd = (struct aac_raw_io *) fib_data(cmd_fibcontext);
1071 writecmd->block[0] = cpu_to_le32(lba); 1222 writecmd->block[0] = cpu_to_le32((u32)(lba&0xffffffff));
1072 writecmd->block[1] = 0; 1223 writecmd->block[1] = cpu_to_le32((u32)((lba&0xffffffff00000000LL)>>32));
1073 writecmd->count = cpu_to_le32(count<<9); 1224 writecmd->count = cpu_to_le32(count<<9);
1074 writecmd->cid = cpu_to_le16(cid); 1225 writecmd->cid = cpu_to_le16(cid);
1075 writecmd->flags = 0; 1226 writecmd->flags = 0;
@@ -1096,7 +1247,7 @@ static int aac_write(struct scsi_cmnd * scsicmd, int cid)
1096 writecmd->command = cpu_to_le32(VM_CtHostWrite64); 1247 writecmd->command = cpu_to_le32(VM_CtHostWrite64);
1097 writecmd->cid = cpu_to_le16(cid); 1248 writecmd->cid = cpu_to_le16(cid);
1098 writecmd->sector_count = cpu_to_le16(count); 1249 writecmd->sector_count = cpu_to_le16(count);
1099 writecmd->block = cpu_to_le32(lba); 1250 writecmd->block = cpu_to_le32((u32)(lba&0xffffffff));
1100 writecmd->pad = 0; 1251 writecmd->pad = 0;
1101 writecmd->flags = 0; 1252 writecmd->flags = 0;
1102 1253
@@ -1121,7 +1272,7 @@ static int aac_write(struct scsi_cmnd * scsicmd, int cid)
1121 writecmd = (struct aac_write *) fib_data(cmd_fibcontext); 1272 writecmd = (struct aac_write *) fib_data(cmd_fibcontext);
1122 writecmd->command = cpu_to_le32(VM_CtBlockWrite); 1273 writecmd->command = cpu_to_le32(VM_CtBlockWrite);
1123 writecmd->cid = cpu_to_le32(cid); 1274 writecmd->cid = cpu_to_le32(cid);
1124 writecmd->block = cpu_to_le32(lba); 1275 writecmd->block = cpu_to_le32((u32)(lba&0xffffffff));
1125 writecmd->count = cpu_to_le32(count * 512); 1276 writecmd->count = cpu_to_le32(count * 512);
1126 writecmd->sg.count = cpu_to_le32(1); 1277 writecmd->sg.count = cpu_to_le32(1);
1127 /* ->stable is not used - it did mean which type of write */ 1278 /* ->stable is not used - it did mean which type of write */
@@ -1310,11 +1461,18 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
1310 */ 1461 */
1311 if ((fsa_dev_ptr[cid].valid & 1) == 0) { 1462 if ((fsa_dev_ptr[cid].valid & 1) == 0) {
1312 switch (scsicmd->cmnd[0]) { 1463 switch (scsicmd->cmnd[0]) {
1464 case SERVICE_ACTION_IN:
1465 if (!(dev->raw_io_interface) ||
1466 !(dev->raw_io_64) ||
1467 ((scsicmd->cmnd[1] & 0x1f) != SAI_READ_CAPACITY_16))
1468 break;
1313 case INQUIRY: 1469 case INQUIRY:
1314 case READ_CAPACITY: 1470 case READ_CAPACITY:
1315 case TEST_UNIT_READY: 1471 case TEST_UNIT_READY:
1316 spin_unlock_irq(host->host_lock); 1472 spin_unlock_irq(host->host_lock);
1317 probe_container(dev, cid); 1473 probe_container(dev, cid);
1474 if ((fsa_dev_ptr[cid].valid & 1) == 0)
1475 fsa_dev_ptr[cid].valid = 0;
1318 spin_lock_irq(host->host_lock); 1476 spin_lock_irq(host->host_lock);
1319 if (fsa_dev_ptr[cid].valid == 0) { 1477 if (fsa_dev_ptr[cid].valid == 0) {
1320 scsicmd->result = DID_NO_CONNECT << 16; 1478 scsicmd->result = DID_NO_CONNECT << 16;
@@ -1375,7 +1533,6 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
1375 memset(&inq_data, 0, sizeof (struct inquiry_data)); 1533 memset(&inq_data, 0, sizeof (struct inquiry_data));
1376 1534
1377 inq_data.inqd_ver = 2; /* claim compliance to SCSI-2 */ 1535 inq_data.inqd_ver = 2; /* claim compliance to SCSI-2 */
1378 inq_data.inqd_dtq = 0x80; /* set RMB bit to one indicating that the medium is removable */
1379 inq_data.inqd_rdf = 2; /* A response data format value of two indicates that the data shall be in the format specified in SCSI-2 */ 1536 inq_data.inqd_rdf = 2; /* A response data format value of two indicates that the data shall be in the format specified in SCSI-2 */
1380 inq_data.inqd_len = 31; 1537 inq_data.inqd_len = 31;
1381 /*Format for "pad2" is RelAdr | WBus32 | WBus16 | Sync | Linked |Reserved| CmdQue | SftRe */ 1538 /*Format for "pad2" is RelAdr | WBus32 | WBus16 | Sync | Linked |Reserved| CmdQue | SftRe */
@@ -1397,13 +1554,55 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
1397 aac_internal_transfer(scsicmd, &inq_data, 0, sizeof(inq_data)); 1554 aac_internal_transfer(scsicmd, &inq_data, 0, sizeof(inq_data));
1398 return aac_get_container_name(scsicmd, cid); 1555 return aac_get_container_name(scsicmd, cid);
1399 } 1556 }
1557 case SERVICE_ACTION_IN:
1558 if (!(dev->raw_io_interface) ||
1559 !(dev->raw_io_64) ||
1560 ((scsicmd->cmnd[1] & 0x1f) != SAI_READ_CAPACITY_16))
1561 break;
1562 {
1563 u64 capacity;
1564 char cp[12];
1565 unsigned int offset = 0;
1566
1567 dprintk((KERN_DEBUG "READ CAPACITY_16 command.\n"));
1568 capacity = fsa_dev_ptr[cid].size - 1;
1569 if (scsicmd->cmnd[13] > 12) {
1570 offset = scsicmd->cmnd[13] - 12;
1571 if (offset > sizeof(cp))
1572 break;
1573 memset(cp, 0, offset);
1574 aac_internal_transfer(scsicmd, cp, 0, offset);
1575 }
1576 cp[0] = (capacity >> 56) & 0xff;
1577 cp[1] = (capacity >> 48) & 0xff;
1578 cp[2] = (capacity >> 40) & 0xff;
1579 cp[3] = (capacity >> 32) & 0xff;
1580 cp[4] = (capacity >> 24) & 0xff;
1581 cp[5] = (capacity >> 16) & 0xff;
1582 cp[6] = (capacity >> 8) & 0xff;
1583 cp[7] = (capacity >> 0) & 0xff;
1584 cp[8] = 0;
1585 cp[9] = 0;
1586 cp[10] = 2;
1587 cp[11] = 0;
1588 aac_internal_transfer(scsicmd, cp, offset, sizeof(cp));
1589
1590 /* Do not cache partition table for arrays */
1591 scsicmd->device->removable = 1;
1592
1593 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD;
1594 scsicmd->scsi_done(scsicmd);
1595
1596 return 0;
1597 }
1598
1400 case READ_CAPACITY: 1599 case READ_CAPACITY:
1401 { 1600 {
1402 u32 capacity; 1601 u32 capacity;
1403 char cp[8]; 1602 char cp[8];
1404 1603
1405 dprintk((KERN_DEBUG "READ CAPACITY command.\n")); 1604 dprintk((KERN_DEBUG "READ CAPACITY command.\n"));
1406 if (fsa_dev_ptr[cid].size <= 0x100000000LL) 1605 if (fsa_dev_ptr[cid].size <= 0x100000000ULL)
1407 capacity = fsa_dev_ptr[cid].size - 1; 1606 capacity = fsa_dev_ptr[cid].size - 1;
1408 else 1607 else
1409 capacity = (u32)-1; 1608 capacity = (u32)-1;
@@ -1417,6 +1616,8 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
1417 cp[6] = 2; 1616 cp[6] = 2;
1418 cp[7] = 0; 1617 cp[7] = 0;
1419 aac_internal_transfer(scsicmd, cp, 0, sizeof(cp)); 1618 aac_internal_transfer(scsicmd, cp, 0, sizeof(cp));
1619 /* Do not cache partition table for arrays */
1620 scsicmd->device->removable = 1;
1420 1621
1421 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD; 1622 scsicmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD;
1422 scsicmd->scsi_done(scsicmd); 1623 scsicmd->scsi_done(scsicmd);
@@ -1497,6 +1698,8 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
1497 { 1698 {
1498 case READ_6: 1699 case READ_6:
1499 case READ_10: 1700 case READ_10:
1701 case READ_12:
1702 case READ_16:
1500 /* 1703 /*
1501 * Hack to keep track of ordinal number of the device that 1704 * Hack to keep track of ordinal number of the device that
1502 * corresponds to a container. Needed to convert 1705 * corresponds to a container. Needed to convert
@@ -1504,17 +1707,19 @@ int aac_scsi_cmd(struct scsi_cmnd * scsicmd)
1504 */ 1707 */
1505 1708
1506 spin_unlock_irq(host->host_lock); 1709 spin_unlock_irq(host->host_lock);
1507 if (scsicmd->request->rq_disk) 1710 if (scsicmd->request->rq_disk)
1508 memcpy(fsa_dev_ptr[cid].devname, 1711 strlcpy(fsa_dev_ptr[cid].devname,
1509 scsicmd->request->rq_disk->disk_name, 1712 scsicmd->request->rq_disk->disk_name,
1510 8); 1713 min(sizeof(fsa_dev_ptr[cid].devname),
1511 1714 sizeof(scsicmd->request->rq_disk->disk_name) + 1));
1512 ret = aac_read(scsicmd, cid); 1715 ret = aac_read(scsicmd, cid);
1513 spin_lock_irq(host->host_lock); 1716 spin_lock_irq(host->host_lock);
1514 return ret; 1717 return ret;
1515 1718
1516 case WRITE_6: 1719 case WRITE_6:
1517 case WRITE_10: 1720 case WRITE_10:
1721 case WRITE_12:
1722 case WRITE_16:
1518 spin_unlock_irq(host->host_lock); 1723 spin_unlock_irq(host->host_lock);
1519 ret = aac_write(scsicmd, cid); 1724 ret = aac_write(scsicmd, cid);
1520 spin_lock_irq(host->host_lock); 1725 spin_lock_irq(host->host_lock);
@@ -1745,6 +1950,8 @@ static void aac_srb_callback(void *context, struct fib * fibptr)
1745 case WRITE_10: 1950 case WRITE_10:
1746 case READ_12: 1951 case READ_12:
1747 case WRITE_12: 1952 case WRITE_12:
1953 case READ_16:
1954 case WRITE_16:
1748 if(le32_to_cpu(srbreply->data_xfer_length) < scsicmd->underflow ) { 1955 if(le32_to_cpu(srbreply->data_xfer_length) < scsicmd->underflow ) {
1749 printk(KERN_WARNING"aacraid: SCSI CMD underflow\n"); 1956 printk(KERN_WARNING"aacraid: SCSI CMD underflow\n");
1750 } else { 1957 } else {
@@ -1850,8 +2057,8 @@ static void aac_srb_callback(void *context, struct fib * fibptr)
1850 sizeof(scsicmd->sense_buffer) : 2057 sizeof(scsicmd->sense_buffer) :
1851 le32_to_cpu(srbreply->sense_data_size); 2058 le32_to_cpu(srbreply->sense_data_size);
1852#ifdef AAC_DETAILED_STATUS_INFO 2059#ifdef AAC_DETAILED_STATUS_INFO
1853 dprintk((KERN_WARNING "aac_srb_callback: check condition, status = %d len=%d\n", 2060 printk(KERN_WARNING "aac_srb_callback: check condition, status = %d len=%d\n",
1854 le32_to_cpu(srbreply->status), len)); 2061 le32_to_cpu(srbreply->status), len);
1855#endif 2062#endif
1856 memcpy(scsicmd->sense_buffer, srbreply->sense_data, len); 2063 memcpy(scsicmd->sense_buffer, srbreply->sense_data, len);
1857 2064
diff --git a/drivers/scsi/aacraid/aacraid.h b/drivers/scsi/aacraid/aacraid.h
index e40528185d48..d54b1cc88d0d 100644
--- a/drivers/scsi/aacraid/aacraid.h
+++ b/drivers/scsi/aacraid/aacraid.h
@@ -1,6 +1,10 @@
1#if (!defined(dprintk)) 1#if (!defined(dprintk))
2# define dprintk(x) 2# define dprintk(x)
3#endif 3#endif
4/* eg: if (nblank(dprintk(x))) */
5#define _nblank(x) #x
6#define nblank(x) _nblank(x)[0]
7
4 8
5/*------------------------------------------------------------------------------ 9/*------------------------------------------------------------------------------
6 * D E F I N E S 10 * D E F I N E S
@@ -15,7 +19,7 @@
15#define AAC_MAX_LUN (8) 19#define AAC_MAX_LUN (8)
16 20
17#define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff) 21#define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
18#define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)512) 22#define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256)
19 23
20/* 24/*
21 * These macros convert from physical channels to virtual channels 25 * These macros convert from physical channels to virtual channels
@@ -302,7 +306,6 @@ enum aac_queue_types {
302 */ 306 */
303 307
304#define FsaNormal 1 308#define FsaNormal 1
305#define FsaHigh 2
306 309
307/* 310/*
308 * Define the FIB. The FIB is the where all the requested data and 311 * Define the FIB. The FIB is the where all the requested data and
@@ -546,8 +549,6 @@ struct aac_queue {
546 /* This is only valid for adapter to host command queues. */ 549 /* This is only valid for adapter to host command queues. */
547 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */ 550 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */
548 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */ 551 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */
549 unsigned long SavedIrql; /* Previous IRQL when the spin lock is taken */
550 u32 padding; /* Padding - FIXME - can remove I believe */
551 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */ 552 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */
552 /* only valid for command queues which receive entries from the adapter. */ 553 /* only valid for command queues which receive entries from the adapter. */
553 struct list_head pendingq; /* A queue of outstanding fib's to the adapter. */ 554 struct list_head pendingq; /* A queue of outstanding fib's to the adapter. */
@@ -776,7 +777,9 @@ struct fsa_dev_info {
776 u64 last; 777 u64 last;
777 u64 size; 778 u64 size;
778 u32 type; 779 u32 type;
780 u32 config_waiting_on;
779 u16 queue_depth; 781 u16 queue_depth;
782 u8 config_needed;
780 u8 valid; 783 u8 valid;
781 u8 ro; 784 u8 ro;
782 u8 locked; 785 u8 locked;
@@ -1012,6 +1015,7 @@ struct aac_dev
1012 /* macro side-effects BEWARE */ 1015 /* macro side-effects BEWARE */
1013# define raw_io_interface \ 1016# define raw_io_interface \
1014 init->InitStructRevision==cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4) 1017 init->InitStructRevision==cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4)
1018 u8 raw_io_64;
1015 u8 printf_enabled; 1019 u8 printf_enabled;
1016}; 1020};
1017 1021
@@ -1362,8 +1366,10 @@ struct aac_srb_reply
1362#define VM_CtBlockVerify64 18 1366#define VM_CtBlockVerify64 18
1363#define VM_CtHostRead64 19 1367#define VM_CtHostRead64 19
1364#define VM_CtHostWrite64 20 1368#define VM_CtHostWrite64 20
1369#define VM_DrvErrTblLog 21
1370#define VM_NameServe64 22
1365 1371
1366#define MAX_VMCOMMAND_NUM 21 /* used for sizing stats array - leave last */ 1372#define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */
1367 1373
1368/* 1374/*
1369 * Descriptive information (eg, vital stats) 1375 * Descriptive information (eg, vital stats)
@@ -1472,6 +1478,7 @@ struct aac_mntent {
1472 manager (eg, filesystem) */ 1478 manager (eg, filesystem) */
1473 __le32 altoid; /* != oid <==> snapshot or 1479 __le32 altoid; /* != oid <==> snapshot or
1474 broken mirror exists */ 1480 broken mirror exists */
1481 __le32 capacityhigh;
1475}; 1482};
1476 1483
1477#define FSCS_NOTCLEAN 0x0001 /* fsck is neccessary before mounting */ 1484#define FSCS_NOTCLEAN 0x0001 /* fsck is neccessary before mounting */
@@ -1707,6 +1714,7 @@ extern struct aac_common aac_config;
1707#define AifCmdJobProgress 2 /* Progress report */ 1714#define AifCmdJobProgress 2 /* Progress report */
1708#define AifJobCtrZero 101 /* Array Zero progress */ 1715#define AifJobCtrZero 101 /* Array Zero progress */
1709#define AifJobStsSuccess 1 /* Job completes */ 1716#define AifJobStsSuccess 1 /* Job completes */
1717#define AifJobStsRunning 102 /* Job running */
1710#define AifCmdAPIReport 3 /* Report from other user of API */ 1718#define AifCmdAPIReport 3 /* Report from other user of API */
1711#define AifCmdDriverNotify 4 /* Notify host driver of event */ 1719#define AifCmdDriverNotify 4 /* Notify host driver of event */
1712#define AifDenMorphComplete 200 /* A morph operation completed */ 1720#define AifDenMorphComplete 200 /* A morph operation completed */
@@ -1777,6 +1785,7 @@ int fib_adapter_complete(struct fib * fibptr, unsigned short size);
1777struct aac_driver_ident* aac_get_driver_ident(int devtype); 1785struct aac_driver_ident* aac_get_driver_ident(int devtype);
1778int aac_get_adapter_info(struct aac_dev* dev); 1786int aac_get_adapter_info(struct aac_dev* dev);
1779int aac_send_shutdown(struct aac_dev *dev); 1787int aac_send_shutdown(struct aac_dev *dev);
1788int probe_container(struct aac_dev *dev, int cid);
1780extern int numacb; 1789extern int numacb;
1781extern int acbsize; 1790extern int acbsize;
1782extern char aac_driver_version[]; 1791extern char aac_driver_version[];
diff --git a/drivers/scsi/aacraid/comminit.c b/drivers/scsi/aacraid/comminit.c
index 75abd0453289..59a341b2aedc 100644
--- a/drivers/scsi/aacraid/comminit.c
+++ b/drivers/scsi/aacraid/comminit.c
@@ -195,7 +195,7 @@ int aac_send_shutdown(struct aac_dev * dev)
195 fibctx, 195 fibctx,
196 sizeof(struct aac_close), 196 sizeof(struct aac_close),
197 FsaNormal, 197 FsaNormal,
198 1, 1, 198 -2 /* Timeout silently */, 1,
199 NULL, NULL); 199 NULL, NULL);
200 200
201 if (status == 0) 201 if (status == 0)
@@ -313,8 +313,15 @@ struct aac_dev *aac_init_adapter(struct aac_dev *dev)
313 dev->max_fib_size = sizeof(struct hw_fib); 313 dev->max_fib_size = sizeof(struct hw_fib);
314 dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size 314 dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size
315 - sizeof(struct aac_fibhdr) 315 - sizeof(struct aac_fibhdr)
316 - sizeof(struct aac_write) + sizeof(struct sgmap)) 316 - sizeof(struct aac_write) + sizeof(struct sgentry))
317 / sizeof(struct sgmap); 317 / sizeof(struct sgentry);
318 dev->raw_io_64 = 0;
319 if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES,
320 0, 0, 0, 0, 0, 0, status+0, status+1, status+2, NULL, NULL)) &&
321 (status[0] == 0x00000001)) {
322 if (status[1] & AAC_OPT_NEW_COMM_64)
323 dev->raw_io_64 = 1;
324 }
318 if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS, 325 if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS,
319 0, 0, 0, 0, 0, 0, 326 0, 0, 0, 0, 0, 0,
320 status+0, status+1, status+2, status+3, status+4)) 327 status+0, status+1, status+2, status+3, status+4))
@@ -342,8 +349,8 @@ struct aac_dev *aac_init_adapter(struct aac_dev *dev)
342 dev->max_fib_size = 512; 349 dev->max_fib_size = 512;
343 dev->sg_tablesize = host->sg_tablesize 350 dev->sg_tablesize = host->sg_tablesize
344 = (512 - sizeof(struct aac_fibhdr) 351 = (512 - sizeof(struct aac_fibhdr)
345 - sizeof(struct aac_write) + sizeof(struct sgmap)) 352 - sizeof(struct aac_write) + sizeof(struct sgentry))
346 / sizeof(struct sgmap); 353 / sizeof(struct sgentry);
347 host->can_queue = AAC_NUM_IO_FIB; 354 host->can_queue = AAC_NUM_IO_FIB;
348 } else if (acbsize == 2048) { 355 } else if (acbsize == 2048) {
349 host->max_sectors = 512; 356 host->max_sectors = 512;
diff --git a/drivers/scsi/aacraid/commsup.c b/drivers/scsi/aacraid/commsup.c
index a1d303f03480..e4d543a474ae 100644
--- a/drivers/scsi/aacraid/commsup.c
+++ b/drivers/scsi/aacraid/commsup.c
@@ -39,7 +39,9 @@
39#include <linux/completion.h> 39#include <linux/completion.h>
40#include <linux/blkdev.h> 40#include <linux/blkdev.h>
41#include <scsi/scsi_host.h> 41#include <scsi/scsi_host.h>
42#include <scsi/scsi_device.h>
42#include <asm/semaphore.h> 43#include <asm/semaphore.h>
44#include <asm/delay.h>
43 45
44#include "aacraid.h" 46#include "aacraid.h"
45 47
@@ -269,40 +271,22 @@ static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entr
269 /* Interrupt Moderation, only interrupt for first two entries */ 271 /* Interrupt Moderation, only interrupt for first two entries */
270 if (idx != le32_to_cpu(*(q->headers.consumer))) { 272 if (idx != le32_to_cpu(*(q->headers.consumer))) {
271 if (--idx == 0) { 273 if (--idx == 0) {
272 if (qid == AdapHighCmdQueue) 274 if (qid == AdapNormCmdQueue)
273 idx = ADAP_HIGH_CMD_ENTRIES;
274 else if (qid == AdapNormCmdQueue)
275 idx = ADAP_NORM_CMD_ENTRIES; 275 idx = ADAP_NORM_CMD_ENTRIES;
276 else if (qid == AdapHighRespQueue) 276 else
277 idx = ADAP_HIGH_RESP_ENTRIES;
278 else if (qid == AdapNormRespQueue)
279 idx = ADAP_NORM_RESP_ENTRIES; 277 idx = ADAP_NORM_RESP_ENTRIES;
280 } 278 }
281 if (idx != le32_to_cpu(*(q->headers.consumer))) 279 if (idx != le32_to_cpu(*(q->headers.consumer)))
282 *nonotify = 1; 280 *nonotify = 1;
283 } 281 }
284 282
285 if (qid == AdapHighCmdQueue) { 283 if (qid == AdapNormCmdQueue) {
286 if (*index >= ADAP_HIGH_CMD_ENTRIES)
287 *index = 0;
288 } else if (qid == AdapNormCmdQueue) {
289 if (*index >= ADAP_NORM_CMD_ENTRIES) 284 if (*index >= ADAP_NORM_CMD_ENTRIES)
290 *index = 0; /* Wrap to front of the Producer Queue. */ 285 *index = 0; /* Wrap to front of the Producer Queue. */
291 } 286 } else {
292 else if (qid == AdapHighRespQueue)
293 {
294 if (*index >= ADAP_HIGH_RESP_ENTRIES)
295 *index = 0;
296 }
297 else if (qid == AdapNormRespQueue)
298 {
299 if (*index >= ADAP_NORM_RESP_ENTRIES) 287 if (*index >= ADAP_NORM_RESP_ENTRIES)
300 *index = 0; /* Wrap to front of the Producer Queue. */ 288 *index = 0; /* Wrap to front of the Producer Queue. */
301 } 289 }
302 else {
303 printk("aacraid: invalid qid\n");
304 BUG();
305 }
306 290
307 if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { /* Queue is full */ 291 if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { /* Queue is full */
308 printk(KERN_WARNING "Queue %d full, %u outstanding.\n", 292 printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
@@ -334,12 +318,8 @@ static int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_f
334{ 318{
335 struct aac_entry * entry = NULL; 319 struct aac_entry * entry = NULL;
336 int map = 0; 320 int map = 0;
337 struct aac_queue * q = &dev->queues->queue[qid];
338
339 spin_lock_irqsave(q->lock, q->SavedIrql);
340 321
341 if (qid == AdapHighCmdQueue || qid == AdapNormCmdQueue) 322 if (qid == AdapNormCmdQueue) {
342 {
343 /* if no entries wait for some if caller wants to */ 323 /* if no entries wait for some if caller wants to */
344 while (!aac_get_entry(dev, qid, &entry, index, nonotify)) 324 while (!aac_get_entry(dev, qid, &entry, index, nonotify))
345 { 325 {
@@ -350,9 +330,7 @@ static int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_f
350 */ 330 */
351 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); 331 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
352 map = 1; 332 map = 1;
353 } 333 } else {
354 else if (qid == AdapHighRespQueue || qid == AdapNormRespQueue)
355 {
356 while(!aac_get_entry(dev, qid, &entry, index, nonotify)) 334 while(!aac_get_entry(dev, qid, &entry, index, nonotify))
357 { 335 {
358 /* if no entries wait for some if caller wants to */ 336 /* if no entries wait for some if caller wants to */
@@ -375,42 +353,6 @@ static int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_f
375 return 0; 353 return 0;
376} 354}
377 355
378
379/**
380 * aac_insert_entry - insert a queue entry
381 * @dev: Adapter
382 * @index: Index of entry to insert
383 * @qid: Queue number
384 * @nonotify: Suppress adapter notification
385 *
386 * Gets the next free QE off the requested priorty adapter command
387 * queue and associates the Fib with the QE. The QE represented by
388 * index is ready to insert on the queue when this routine returns
389 * success.
390 */
391
392static int aac_insert_entry(struct aac_dev * dev, u32 index, u32 qid, unsigned long nonotify)
393{
394 struct aac_queue * q = &dev->queues->queue[qid];
395
396 if(q == NULL)
397 BUG();
398 *(q->headers.producer) = cpu_to_le32(index + 1);
399 spin_unlock_irqrestore(q->lock, q->SavedIrql);
400
401 if (qid == AdapHighCmdQueue ||
402 qid == AdapNormCmdQueue ||
403 qid == AdapHighRespQueue ||
404 qid == AdapNormRespQueue)
405 {
406 if (!nonotify)
407 aac_adapter_notify(dev, qid);
408 }
409 else
410 printk("Suprise insert!\n");
411 return 0;
412}
413
414/* 356/*
415 * Define the highest level of host to adapter communication routines. 357 * Define the highest level of host to adapter communication routines.
416 * These routines will support host to adapter FS commuication. These 358 * These routines will support host to adapter FS commuication. These
@@ -439,12 +381,13 @@ static int aac_insert_entry(struct aac_dev * dev, u32 index, u32 qid, unsigned l
439int fib_send(u16 command, struct fib * fibptr, unsigned long size, int priority, int wait, int reply, fib_callback callback, void * callback_data) 381int fib_send(u16 command, struct fib * fibptr, unsigned long size, int priority, int wait, int reply, fib_callback callback, void * callback_data)
440{ 382{
441 u32 index; 383 u32 index;
442 u32 qid;
443 struct aac_dev * dev = fibptr->dev; 384 struct aac_dev * dev = fibptr->dev;
444 unsigned long nointr = 0; 385 unsigned long nointr = 0;
445 struct hw_fib * hw_fib = fibptr->hw_fib; 386 struct hw_fib * hw_fib = fibptr->hw_fib;
446 struct aac_queue * q; 387 struct aac_queue * q;
447 unsigned long flags = 0; 388 unsigned long flags = 0;
389 unsigned long qflags;
390
448 if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned))) 391 if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
449 return -EBUSY; 392 return -EBUSY;
450 /* 393 /*
@@ -497,26 +440,8 @@ int fib_send(u16 command, struct fib * fibptr, unsigned long size, int priority
497 * Get a queue entry connect the FIB to it and send an notify 440 * Get a queue entry connect the FIB to it and send an notify
498 * the adapter a command is ready. 441 * the adapter a command is ready.
499 */ 442 */
500 if (priority == FsaHigh) { 443 hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
501 hw_fib->header.XferState |= cpu_to_le32(HighPriority);
502 qid = AdapHighCmdQueue;
503 } else {
504 hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
505 qid = AdapNormCmdQueue;
506 }
507 q = &dev->queues->queue[qid];
508 444
509 if(wait)
510 spin_lock_irqsave(&fibptr->event_lock, flags);
511 if(aac_queue_get( dev, &index, qid, hw_fib, 1, fibptr, &nointr)<0)
512 return -EWOULDBLOCK;
513 dprintk((KERN_DEBUG "fib_send: inserting a queue entry at index %d.\n",index));
514 dprintk((KERN_DEBUG "Fib contents:.\n"));
515 dprintk((KERN_DEBUG " Command = %d.\n", hw_fib->header.Command));
516 dprintk((KERN_DEBUG " XferState = %x.\n", hw_fib->header.XferState));
517 dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib));
518 dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
519 dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
520 /* 445 /*
521 * Fill in the Callback and CallbackContext if we are not 446 * Fill in the Callback and CallbackContext if we are not
522 * going to wait. 447 * going to wait.
@@ -525,22 +450,67 @@ int fib_send(u16 command, struct fib * fibptr, unsigned long size, int priority
525 fibptr->callback = callback; 450 fibptr->callback = callback;
526 fibptr->callback_data = callback_data; 451 fibptr->callback_data = callback_data;
527 } 452 }
528 FIB_COUNTER_INCREMENT(aac_config.FibsSent);
529 list_add_tail(&fibptr->queue, &q->pendingq);
530 q->numpending++;
531 453
532 fibptr->done = 0; 454 fibptr->done = 0;
533 fibptr->flags = 0; 455 fibptr->flags = 0;
534 456
535 if(aac_insert_entry(dev, index, qid, (nointr & aac_config.irq_mod)) < 0) 457 FIB_COUNTER_INCREMENT(aac_config.FibsSent);
536 return -EWOULDBLOCK; 458
459 dprintk((KERN_DEBUG "fib_send: inserting a queue entry at index %d.\n",index));
460 dprintk((KERN_DEBUG "Fib contents:.\n"));
461 dprintk((KERN_DEBUG " Command = %d.\n", hw_fib->header.Command));
462 dprintk((KERN_DEBUG " XferState = %x.\n", hw_fib->header.XferState));
463 dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib));
464 dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
465 dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
466
467 q = &dev->queues->queue[AdapNormCmdQueue];
468
469 if(wait)
470 spin_lock_irqsave(&fibptr->event_lock, flags);
471 spin_lock_irqsave(q->lock, qflags);
472 aac_queue_get( dev, &index, AdapNormCmdQueue, hw_fib, 1, fibptr, &nointr);
473
474 list_add_tail(&fibptr->queue, &q->pendingq);
475 q->numpending++;
476 *(q->headers.producer) = cpu_to_le32(index + 1);
477 spin_unlock_irqrestore(q->lock, qflags);
478 if (!(nointr & aac_config.irq_mod))
479 aac_adapter_notify(dev, AdapNormCmdQueue);
537 /* 480 /*
538 * If the caller wanted us to wait for response wait now. 481 * If the caller wanted us to wait for response wait now.
539 */ 482 */
540 483
541 if (wait) { 484 if (wait) {
542 spin_unlock_irqrestore(&fibptr->event_lock, flags); 485 spin_unlock_irqrestore(&fibptr->event_lock, flags);
543 down(&fibptr->event_wait); 486 /* Only set for first known interruptable command */
487 if (wait < 0) {
488 /*
489 * *VERY* Dangerous to time out a command, the
490 * assumption is made that we have no hope of
491 * functioning because an interrupt routing or other
492 * hardware failure has occurred.
493 */
494 unsigned long count = 36000000L; /* 3 minutes */
495 unsigned long qflags;
496 while (down_trylock(&fibptr->event_wait)) {
497 if (--count == 0) {
498 spin_lock_irqsave(q->lock, qflags);
499 q->numpending--;
500 list_del(&fibptr->queue);
501 spin_unlock_irqrestore(q->lock, qflags);
502 if (wait == -1) {
503 printk(KERN_ERR "aacraid: fib_send: first asynchronous command timed out.\n"
504 "Usually a result of a PCI interrupt routing problem;\n"
505 "update mother board BIOS or consider utilizing one of\n"
506 "the SAFE mode kernel options (acpi, apic etc)\n");
507 }
508 return -ETIMEDOUT;
509 }
510 udelay(5);
511 }
512 } else
513 down(&fibptr->event_wait);
544 if(fibptr->done == 0) 514 if(fibptr->done == 0)
545 BUG(); 515 BUG();
546 516
@@ -622,15 +592,9 @@ void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
622 case HostNormCmdQueue: 592 case HostNormCmdQueue:
623 notify = HostNormCmdNotFull; 593 notify = HostNormCmdNotFull;
624 break; 594 break;
625 case HostHighCmdQueue:
626 notify = HostHighCmdNotFull;
627 break;
628 case HostNormRespQueue: 595 case HostNormRespQueue:
629 notify = HostNormRespNotFull; 596 notify = HostNormRespNotFull;
630 break; 597 break;
631 case HostHighRespQueue:
632 notify = HostHighRespNotFull;
633 break;
634 default: 598 default:
635 BUG(); 599 BUG();
636 return; 600 return;
@@ -652,9 +616,13 @@ int fib_adapter_complete(struct fib * fibptr, unsigned short size)
652{ 616{
653 struct hw_fib * hw_fib = fibptr->hw_fib; 617 struct hw_fib * hw_fib = fibptr->hw_fib;
654 struct aac_dev * dev = fibptr->dev; 618 struct aac_dev * dev = fibptr->dev;
619 struct aac_queue * q;
655 unsigned long nointr = 0; 620 unsigned long nointr = 0;
656 if (hw_fib->header.XferState == 0) 621 unsigned long qflags;
622
623 if (hw_fib->header.XferState == 0) {
657 return 0; 624 return 0;
625 }
658 /* 626 /*
659 * If we plan to do anything check the structure type first. 627 * If we plan to do anything check the structure type first.
660 */ 628 */
@@ -669,37 +637,21 @@ int fib_adapter_complete(struct fib * fibptr, unsigned short size)
669 * send the completed cdb to the adapter. 637 * send the completed cdb to the adapter.
670 */ 638 */
671 if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) { 639 if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
640 u32 index;
672 hw_fib->header.XferState |= cpu_to_le32(HostProcessed); 641 hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
673 if (hw_fib->header.XferState & cpu_to_le32(HighPriority)) { 642 if (size) {
674 u32 index; 643 size += sizeof(struct aac_fibhdr);
675 if (size) 644 if (size > le16_to_cpu(hw_fib->header.SenderSize))
676 { 645 return -EMSGSIZE;
677 size += sizeof(struct aac_fibhdr); 646 hw_fib->header.Size = cpu_to_le16(size);
678 if (size > le16_to_cpu(hw_fib->header.SenderSize))
679 return -EMSGSIZE;
680 hw_fib->header.Size = cpu_to_le16(size);
681 }
682 if(aac_queue_get(dev, &index, AdapHighRespQueue, hw_fib, 1, NULL, &nointr) < 0) {
683 return -EWOULDBLOCK;
684 }
685 if (aac_insert_entry(dev, index, AdapHighRespQueue, (nointr & (int)aac_config.irq_mod)) != 0) {
686 }
687 } else if (hw_fib->header.XferState &
688 cpu_to_le32(NormalPriority)) {
689 u32 index;
690
691 if (size) {
692 size += sizeof(struct aac_fibhdr);
693 if (size > le16_to_cpu(hw_fib->header.SenderSize))
694 return -EMSGSIZE;
695 hw_fib->header.Size = cpu_to_le16(size);
696 }
697 if (aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr) < 0)
698 return -EWOULDBLOCK;
699 if (aac_insert_entry(dev, index, AdapNormRespQueue, (nointr & (int)aac_config.irq_mod)) != 0)
700 {
701 }
702 } 647 }
648 q = &dev->queues->queue[AdapNormRespQueue];
649 spin_lock_irqsave(q->lock, qflags);
650 aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
651 *(q->headers.producer) = cpu_to_le32(index + 1);
652 spin_unlock_irqrestore(q->lock, qflags);
653 if (!(nointr & (int)aac_config.irq_mod))
654 aac_adapter_notify(dev, AdapNormRespQueue);
703 } 655 }
704 else 656 else
705 { 657 {
@@ -791,6 +743,268 @@ void aac_printf(struct aac_dev *dev, u32 val)
791 memset(cp, 0, 256); 743 memset(cp, 0, 256);
792} 744}
793 745
746
747/**
748 * aac_handle_aif - Handle a message from the firmware
749 * @dev: Which adapter this fib is from
750 * @fibptr: Pointer to fibptr from adapter
751 *
752 * This routine handles a driver notify fib from the adapter and
753 * dispatches it to the appropriate routine for handling.
754 */
755
756static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
757{
758 struct hw_fib * hw_fib = fibptr->hw_fib;
759 struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
760 int busy;
761 u32 container;
762 struct scsi_device *device;
763 enum {
764 NOTHING,
765 DELETE,
766 ADD,
767 CHANGE
768 } device_config_needed;
769
770 /* Sniff for container changes */
771
772 if (!dev)
773 return;
774 container = (u32)-1;
775
776 /*
777 * We have set this up to try and minimize the number of
778 * re-configures that take place. As a result of this when
779 * certain AIF's come in we will set a flag waiting for another
780 * type of AIF before setting the re-config flag.
781 */
782 switch (le32_to_cpu(aifcmd->command)) {
783 case AifCmdDriverNotify:
784 switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
785 /*
786 * Morph or Expand complete
787 */
788 case AifDenMorphComplete:
789 case AifDenVolumeExtendComplete:
790 container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
791 if (container >= dev->maximum_num_containers)
792 break;
793
794 /*
795 * Find the Scsi_Device associated with the SCSI
796 * address. Make sure we have the right array, and if
797 * so set the flag to initiate a new re-config once we
798 * see an AifEnConfigChange AIF come through.
799 */
800
801 if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
802 device = scsi_device_lookup(dev->scsi_host_ptr,
803 CONTAINER_TO_CHANNEL(container),
804 CONTAINER_TO_ID(container),
805 CONTAINER_TO_LUN(container));
806 if (device) {
807 dev->fsa_dev[container].config_needed = CHANGE;
808 dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
809 scsi_device_put(device);
810 }
811 }
812 }
813
814 /*
815 * If we are waiting on something and this happens to be
816 * that thing then set the re-configure flag.
817 */
818 if (container != (u32)-1) {
819 if (container >= dev->maximum_num_containers)
820 break;
821 if (dev->fsa_dev[container].config_waiting_on ==
822 le32_to_cpu(*(u32 *)aifcmd->data))
823 dev->fsa_dev[container].config_waiting_on = 0;
824 } else for (container = 0;
825 container < dev->maximum_num_containers; ++container) {
826 if (dev->fsa_dev[container].config_waiting_on ==
827 le32_to_cpu(*(u32 *)aifcmd->data))
828 dev->fsa_dev[container].config_waiting_on = 0;
829 }
830 break;
831
832 case AifCmdEventNotify:
833 switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
834 /*
835 * Add an Array.
836 */
837 case AifEnAddContainer:
838 container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
839 if (container >= dev->maximum_num_containers)
840 break;
841 dev->fsa_dev[container].config_needed = ADD;
842 dev->fsa_dev[container].config_waiting_on =
843 AifEnConfigChange;
844 break;
845
846 /*
847 * Delete an Array.
848 */
849 case AifEnDeleteContainer:
850 container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
851 if (container >= dev->maximum_num_containers)
852 break;
853 dev->fsa_dev[container].config_needed = DELETE;
854 dev->fsa_dev[container].config_waiting_on =
855 AifEnConfigChange;
856 break;
857
858 /*
859 * Container change detected. If we currently are not
860 * waiting on something else, setup to wait on a Config Change.
861 */
862 case AifEnContainerChange:
863 container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
864 if (container >= dev->maximum_num_containers)
865 break;
866 if (dev->fsa_dev[container].config_waiting_on)
867 break;
868 dev->fsa_dev[container].config_needed = CHANGE;
869 dev->fsa_dev[container].config_waiting_on =
870 AifEnConfigChange;
871 break;
872
873 case AifEnConfigChange:
874 break;
875
876 }
877
878 /*
879 * If we are waiting on something and this happens to be
880 * that thing then set the re-configure flag.
881 */
882 if (container != (u32)-1) {
883 if (container >= dev->maximum_num_containers)
884 break;
885 if (dev->fsa_dev[container].config_waiting_on ==
886 le32_to_cpu(*(u32 *)aifcmd->data))
887 dev->fsa_dev[container].config_waiting_on = 0;
888 } else for (container = 0;
889 container < dev->maximum_num_containers; ++container) {
890 if (dev->fsa_dev[container].config_waiting_on ==
891 le32_to_cpu(*(u32 *)aifcmd->data))
892 dev->fsa_dev[container].config_waiting_on = 0;
893 }
894 break;
895
896 case AifCmdJobProgress:
897 /*
898 * These are job progress AIF's. When a Clear is being
899 * done on a container it is initially created then hidden from
900 * the OS. When the clear completes we don't get a config
901 * change so we monitor the job status complete on a clear then
902 * wait for a container change.
903 */
904
905 if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
906 && ((((u32 *)aifcmd->data)[6] == ((u32 *)aifcmd->data)[5])
907 || (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess)))) {
908 for (container = 0;
909 container < dev->maximum_num_containers;
910 ++container) {
911 /*
912 * Stomp on all config sequencing for all
913 * containers?
914 */
915 dev->fsa_dev[container].config_waiting_on =
916 AifEnContainerChange;
917 dev->fsa_dev[container].config_needed = ADD;
918 }
919 }
920 if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
921 && (((u32 *)aifcmd->data)[6] == 0)
922 && (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning))) {
923 for (container = 0;
924 container < dev->maximum_num_containers;
925 ++container) {
926 /*
927 * Stomp on all config sequencing for all
928 * containers?
929 */
930 dev->fsa_dev[container].config_waiting_on =
931 AifEnContainerChange;
932 dev->fsa_dev[container].config_needed = DELETE;
933 }
934 }
935 break;
936 }
937
938 device_config_needed = NOTHING;
939 for (container = 0; container < dev->maximum_num_containers;
940 ++container) {
941 if ((dev->fsa_dev[container].config_waiting_on == 0)
942 && (dev->fsa_dev[container].config_needed != NOTHING)) {
943 device_config_needed =
944 dev->fsa_dev[container].config_needed;
945 dev->fsa_dev[container].config_needed = NOTHING;
946 break;
947 }
948 }
949 if (device_config_needed == NOTHING)
950 return;
951
952 /*
953 * If we decided that a re-configuration needs to be done,
954 * schedule it here on the way out the door, please close the door
955 * behind you.
956 */
957
958 busy = 0;
959
960
961 /*
962 * Find the Scsi_Device associated with the SCSI address,
963 * and mark it as changed, invalidating the cache. This deals
964 * with changes to existing device IDs.
965 */
966
967 if (!dev || !dev->scsi_host_ptr)
968 return;
969 /*
970 * force reload of disk info via probe_container
971 */
972 if ((device_config_needed == CHANGE)
973 && (dev->fsa_dev[container].valid == 1))
974 dev->fsa_dev[container].valid = 2;
975 if ((device_config_needed == CHANGE) ||
976 (device_config_needed == ADD))
977 probe_container(dev, container);
978 device = scsi_device_lookup(dev->scsi_host_ptr,
979 CONTAINER_TO_CHANNEL(container),
980 CONTAINER_TO_ID(container),
981 CONTAINER_TO_LUN(container));
982 if (device) {
983 switch (device_config_needed) {
984 case DELETE:
985 scsi_remove_device(device);
986 break;
987 case CHANGE:
988 if (!dev->fsa_dev[container].valid) {
989 scsi_remove_device(device);
990 break;
991 }
992 scsi_rescan_device(&device->sdev_gendev);
993
994 default:
995 break;
996 }
997 scsi_device_put(device);
998 }
999 if (device_config_needed == ADD) {
1000 scsi_add_device(dev->scsi_host_ptr,
1001 CONTAINER_TO_CHANNEL(container),
1002 CONTAINER_TO_ID(container),
1003 CONTAINER_TO_LUN(container));
1004 }
1005
1006}
1007
794/** 1008/**
795 * aac_command_thread - command processing thread 1009 * aac_command_thread - command processing thread
796 * @dev: Adapter to monitor 1010 * @dev: Adapter to monitor
@@ -805,7 +1019,6 @@ int aac_command_thread(struct aac_dev * dev)
805{ 1019{
806 struct hw_fib *hw_fib, *hw_newfib; 1020 struct hw_fib *hw_fib, *hw_newfib;
807 struct fib *fib, *newfib; 1021 struct fib *fib, *newfib;
808 struct aac_queue_block *queues = dev->queues;
809 struct aac_fib_context *fibctx; 1022 struct aac_fib_context *fibctx;
810 unsigned long flags; 1023 unsigned long flags;
811 DECLARE_WAITQUEUE(wait, current); 1024 DECLARE_WAITQUEUE(wait, current);
@@ -825,21 +1038,22 @@ int aac_command_thread(struct aac_dev * dev)
825 * Let the DPC know it has a place to send the AIF's to. 1038 * Let the DPC know it has a place to send the AIF's to.
826 */ 1039 */
827 dev->aif_thread = 1; 1040 dev->aif_thread = 1;
828 add_wait_queue(&queues->queue[HostNormCmdQueue].cmdready, &wait); 1041 add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
829 set_current_state(TASK_INTERRUPTIBLE); 1042 set_current_state(TASK_INTERRUPTIBLE);
1043 dprintk ((KERN_INFO "aac_command_thread start\n"));
830 while(1) 1044 while(1)
831 { 1045 {
832 spin_lock_irqsave(queues->queue[HostNormCmdQueue].lock, flags); 1046 spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
833 while(!list_empty(&(queues->queue[HostNormCmdQueue].cmdq))) { 1047 while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
834 struct list_head *entry; 1048 struct list_head *entry;
835 struct aac_aifcmd * aifcmd; 1049 struct aac_aifcmd * aifcmd;
836 1050
837 set_current_state(TASK_RUNNING); 1051 set_current_state(TASK_RUNNING);
838 1052
839 entry = queues->queue[HostNormCmdQueue].cmdq.next; 1053 entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
840 list_del(entry); 1054 list_del(entry);
841 1055
842 spin_unlock_irqrestore(queues->queue[HostNormCmdQueue].lock, flags); 1056 spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
843 fib = list_entry(entry, struct fib, fiblink); 1057 fib = list_entry(entry, struct fib, fiblink);
844 /* 1058 /*
845 * We will process the FIB here or pass it to a 1059 * We will process the FIB here or pass it to a
@@ -860,6 +1074,7 @@ int aac_command_thread(struct aac_dev * dev)
860 aifcmd = (struct aac_aifcmd *) hw_fib->data; 1074 aifcmd = (struct aac_aifcmd *) hw_fib->data;
861 if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) { 1075 if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
862 /* Handle Driver Notify Events */ 1076 /* Handle Driver Notify Events */
1077 aac_handle_aif(dev, fib);
863 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); 1078 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
864 fib_adapter_complete(fib, (u16)sizeof(u32)); 1079 fib_adapter_complete(fib, (u16)sizeof(u32));
865 } else { 1080 } else {
@@ -869,9 +1084,62 @@ int aac_command_thread(struct aac_dev * dev)
869 1084
870 u32 time_now, time_last; 1085 u32 time_now, time_last;
871 unsigned long flagv; 1086 unsigned long flagv;
872 1087 unsigned num;
1088 struct hw_fib ** hw_fib_pool, ** hw_fib_p;
1089 struct fib ** fib_pool, ** fib_p;
1090
1091 /* Sniff events */
1092 if ((aifcmd->command ==
1093 cpu_to_le32(AifCmdEventNotify)) ||
1094 (aifcmd->command ==
1095 cpu_to_le32(AifCmdJobProgress))) {
1096 aac_handle_aif(dev, fib);
1097 }
1098
873 time_now = jiffies/HZ; 1099 time_now = jiffies/HZ;
874 1100
1101 /*
1102 * Warning: no sleep allowed while
1103 * holding spinlock. We take the estimate
1104 * and pre-allocate a set of fibs outside the
1105 * lock.
1106 */
1107 num = le32_to_cpu(dev->init->AdapterFibsSize)
1108 / sizeof(struct hw_fib); /* some extra */
1109 spin_lock_irqsave(&dev->fib_lock, flagv);
1110 entry = dev->fib_list.next;
1111 while (entry != &dev->fib_list) {
1112 entry = entry->next;
1113 ++num;
1114 }
1115 spin_unlock_irqrestore(&dev->fib_lock, flagv);
1116 hw_fib_pool = NULL;
1117 fib_pool = NULL;
1118 if (num
1119 && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL)))
1120 && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) {
1121 hw_fib_p = hw_fib_pool;
1122 fib_p = fib_pool;
1123 while (hw_fib_p < &hw_fib_pool[num]) {
1124 if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) {
1125 --hw_fib_p;
1126 break;
1127 }
1128 if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) {
1129 kfree(*(--hw_fib_p));
1130 break;
1131 }
1132 }
1133 if ((num = hw_fib_p - hw_fib_pool) == 0) {
1134 kfree(fib_pool);
1135 fib_pool = NULL;
1136 kfree(hw_fib_pool);
1137 hw_fib_pool = NULL;
1138 }
1139 } else if (hw_fib_pool) {
1140 kfree(hw_fib_pool);
1141 hw_fib_pool = NULL;
1142 }
875 spin_lock_irqsave(&dev->fib_lock, flagv); 1143 spin_lock_irqsave(&dev->fib_lock, flagv);
876 entry = dev->fib_list.next; 1144 entry = dev->fib_list.next;
877 /* 1145 /*
@@ -880,6 +1148,8 @@ int aac_command_thread(struct aac_dev * dev)
880 * fib, and then set the event to wake up the 1148 * fib, and then set the event to wake up the
881 * thread that is waiting for it. 1149 * thread that is waiting for it.
882 */ 1150 */
1151 hw_fib_p = hw_fib_pool;
1152 fib_p = fib_pool;
883 while (entry != &dev->fib_list) { 1153 while (entry != &dev->fib_list) {
884 /* 1154 /*
885 * Extract the fibctx 1155 * Extract the fibctx
@@ -912,9 +1182,11 @@ int aac_command_thread(struct aac_dev * dev)
912 * Warning: no sleep allowed while 1182 * Warning: no sleep allowed while
913 * holding spinlock 1183 * holding spinlock
914 */ 1184 */
915 hw_newfib = kmalloc(sizeof(struct hw_fib), GFP_ATOMIC); 1185 if (hw_fib_p < &hw_fib_pool[num]) {
916 newfib = kmalloc(sizeof(struct fib), GFP_ATOMIC); 1186 hw_newfib = *hw_fib_p;
917 if (newfib && hw_newfib) { 1187 *(hw_fib_p++) = NULL;
1188 newfib = *fib_p;
1189 *(fib_p++) = NULL;
918 /* 1190 /*
919 * Make the copy of the FIB 1191 * Make the copy of the FIB
920 */ 1192 */
@@ -929,15 +1201,11 @@ int aac_command_thread(struct aac_dev * dev)
929 fibctx->count++; 1201 fibctx->count++;
930 /* 1202 /*
931 * Set the event to wake up the 1203 * Set the event to wake up the
932 * thread that will waiting. 1204 * thread that is waiting.
933 */ 1205 */
934 up(&fibctx->wait_sem); 1206 up(&fibctx->wait_sem);
935 } else { 1207 } else {
936 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n"); 1208 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
937 if(newfib)
938 kfree(newfib);
939 if(hw_newfib)
940 kfree(hw_newfib);
941 } 1209 }
942 entry = entry->next; 1210 entry = entry->next;
943 } 1211 }
@@ -947,21 +1215,38 @@ int aac_command_thread(struct aac_dev * dev)
947 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); 1215 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
948 fib_adapter_complete(fib, sizeof(u32)); 1216 fib_adapter_complete(fib, sizeof(u32));
949 spin_unlock_irqrestore(&dev->fib_lock, flagv); 1217 spin_unlock_irqrestore(&dev->fib_lock, flagv);
1218 /* Free up the remaining resources */
1219 hw_fib_p = hw_fib_pool;
1220 fib_p = fib_pool;
1221 while (hw_fib_p < &hw_fib_pool[num]) {
1222 if (*hw_fib_p)
1223 kfree(*hw_fib_p);
1224 if (*fib_p)
1225 kfree(*fib_p);
1226 ++fib_p;
1227 ++hw_fib_p;
1228 }
1229 if (hw_fib_pool)
1230 kfree(hw_fib_pool);
1231 if (fib_pool)
1232 kfree(fib_pool);
950 } 1233 }
951 spin_lock_irqsave(queues->queue[HostNormCmdQueue].lock, flags);
952 kfree(fib); 1234 kfree(fib);
1235 spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
953 } 1236 }
954 /* 1237 /*
955 * There are no more AIF's 1238 * There are no more AIF's
956 */ 1239 */
957 spin_unlock_irqrestore(queues->queue[HostNormCmdQueue].lock, flags); 1240 spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
958 schedule(); 1241 schedule();
959 1242
960 if(signal_pending(current)) 1243 if(signal_pending(current))
961 break; 1244 break;
962 set_current_state(TASK_INTERRUPTIBLE); 1245 set_current_state(TASK_INTERRUPTIBLE);
963 } 1246 }
964 remove_wait_queue(&queues->queue[HostNormCmdQueue].cmdready, &wait); 1247 if (dev->queues)
1248 remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
965 dev->aif_thread = 0; 1249 dev->aif_thread = 0;
966 complete_and_exit(&dev->aif_completion, 0); 1250 complete_and_exit(&dev->aif_completion, 0);
1251 return 0;
967} 1252}
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c
index 4ff29d7f5825..a1f9ceef0ac9 100644
--- a/drivers/scsi/aacraid/linit.c
+++ b/drivers/scsi/aacraid/linit.c
@@ -453,9 +453,9 @@ static int aac_eh_reset(struct scsi_cmnd* cmd)
453 /* 453 /*
454 * We can exit If all the commands are complete 454 * We can exit If all the commands are complete
455 */ 455 */
456 spin_unlock_irq(host->host_lock);
456 if (active == 0) 457 if (active == 0)
457 return SUCCESS; 458 return SUCCESS;
458 spin_unlock_irq(host->host_lock);
459 ssleep(1); 459 ssleep(1);
460 spin_lock_irq(host->host_lock); 460 spin_lock_irq(host->host_lock);
461 } 461 }
@@ -748,7 +748,8 @@ static int __devinit aac_probe_one(struct pci_dev *pdev,
748 unique_id++; 748 unique_id++;
749 } 749 }
750 750
751 if (pci_enable_device(pdev)) 751 error = pci_enable_device(pdev);
752 if (error)
752 goto out; 753 goto out;
753 754
754 if (pci_set_dma_mask(pdev, 0xFFFFFFFFULL) || 755 if (pci_set_dma_mask(pdev, 0xFFFFFFFFULL) ||
@@ -772,6 +773,7 @@ static int __devinit aac_probe_one(struct pci_dev *pdev,
772 shost->irq = pdev->irq; 773 shost->irq = pdev->irq;
773 shost->base = pci_resource_start(pdev, 0); 774 shost->base = pci_resource_start(pdev, 0);
774 shost->unique_id = unique_id; 775 shost->unique_id = unique_id;
776 shost->max_cmd_len = 16;
775 777
776 aac = (struct aac_dev *)shost->hostdata; 778 aac = (struct aac_dev *)shost->hostdata;
777 aac->scsi_host_ptr = shost; 779 aac->scsi_host_ptr = shost;
@@ -799,7 +801,9 @@ static int __devinit aac_probe_one(struct pci_dev *pdev,
799 goto out_free_fibs; 801 goto out_free_fibs;
800 802
801 aac->maximum_num_channels = aac_drivers[index].channels; 803 aac->maximum_num_channels = aac_drivers[index].channels;
802 aac_get_adapter_info(aac); 804 error = aac_get_adapter_info(aac);
805 if (error < 0)
806 goto out_deinit;
803 807
804 /* 808 /*
805 * Lets override negotiations and drop the maximum SG limit to 34 809 * Lets override negotiations and drop the maximum SG limit to 34
@@ -927,8 +931,8 @@ static int __init aac_init(void)
927 printk(KERN_INFO "Adaptec %s driver (%s)\n", 931 printk(KERN_INFO "Adaptec %s driver (%s)\n",
928 AAC_DRIVERNAME, aac_driver_version); 932 AAC_DRIVERNAME, aac_driver_version);
929 933
930 error = pci_module_init(&aac_pci_driver); 934 error = pci_register_driver(&aac_pci_driver);
931 if (error) 935 if (error < 0)
932 return error; 936 return error;
933 937
934 aac_cfg_major = register_chrdev( 0, "aac", &aac_cfg_fops); 938 aac_cfg_major = register_chrdev( 0, "aac", &aac_cfg_fops);
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index c2c8fa828e24..fe8187d6f58b 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -216,7 +216,7 @@ static Scsi_Host_Template ahci_sht = {
216 .ordered_flush = 1, 216 .ordered_flush = 1,
217}; 217};
218 218
219static struct ata_port_operations ahci_ops = { 219static const struct ata_port_operations ahci_ops = {
220 .port_disable = ata_port_disable, 220 .port_disable = ata_port_disable,
221 221
222 .check_status = ahci_check_status, 222 .check_status = ahci_check_status,
@@ -407,7 +407,7 @@ static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg_in)
407 return 0xffffffffU; 407 return 0xffffffffU;
408 } 408 }
409 409
410 return readl((void *) ap->ioaddr.scr_addr + (sc_reg * 4)); 410 return readl((void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
411} 411}
412 412
413 413
@@ -425,7 +425,7 @@ static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in,
425 return; 425 return;
426 } 426 }
427 427
428 writel(val, (void *) ap->ioaddr.scr_addr + (sc_reg * 4)); 428 writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
429} 429}
430 430
431static void ahci_phy_reset(struct ata_port *ap) 431static void ahci_phy_reset(struct ata_port *ap)
@@ -453,14 +453,14 @@ static void ahci_phy_reset(struct ata_port *ap)
453 453
454static u8 ahci_check_status(struct ata_port *ap) 454static u8 ahci_check_status(struct ata_port *ap)
455{ 455{
456 void *mmio = (void *) ap->ioaddr.cmd_addr; 456 void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr;
457 457
458 return readl(mmio + PORT_TFDATA) & 0xFF; 458 return readl(mmio + PORT_TFDATA) & 0xFF;
459} 459}
460 460
461static u8 ahci_check_err(struct ata_port *ap) 461static u8 ahci_check_err(struct ata_port *ap)
462{ 462{
463 void *mmio = (void *) ap->ioaddr.cmd_addr; 463 void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr;
464 464
465 return (readl(mmio + PORT_TFDATA) >> 8) & 0xFF; 465 return (readl(mmio + PORT_TFDATA) >> 8) & 0xFF;
466} 466}
@@ -672,17 +672,36 @@ static irqreturn_t ahci_interrupt (int irq, void *dev_instance, struct pt_regs *
672 672
673 for (i = 0; i < host_set->n_ports; i++) { 673 for (i = 0; i < host_set->n_ports; i++) {
674 struct ata_port *ap; 674 struct ata_port *ap;
675 u32 tmp;
676 675
677 VPRINTK("port %u\n", i); 676 if (!(irq_stat & (1 << i)))
677 continue;
678
678 ap = host_set->ports[i]; 679 ap = host_set->ports[i];
679 tmp = irq_stat & (1 << i); 680 if (ap) {
680 if (tmp && ap) {
681 struct ata_queued_cmd *qc; 681 struct ata_queued_cmd *qc;
682 qc = ata_qc_from_tag(ap, ap->active_tag); 682 qc = ata_qc_from_tag(ap, ap->active_tag);
683 if (ahci_host_intr(ap, qc)) 683 if (!ahci_host_intr(ap, qc))
684 irq_ack |= (1 << i); 684 if (ata_ratelimit()) {
685 struct pci_dev *pdev =
686 to_pci_dev(ap->host_set->dev);
687 printk(KERN_WARNING
688 "ahci(%s): unhandled interrupt on port %u\n",
689 pci_name(pdev), i);
690 }
691
692 VPRINTK("port %u\n", i);
693 } else {
694 VPRINTK("port %u (no irq)\n", i);
695 if (ata_ratelimit()) {
696 struct pci_dev *pdev =
697 to_pci_dev(ap->host_set->dev);
698 printk(KERN_WARNING
699 "ahci(%s): interrupt on disabled port %u\n",
700 pci_name(pdev), i);
701 }
685 } 702 }
703
704 irq_ack |= (1 << i);
686 } 705 }
687 706
688 if (irq_ack) { 707 if (irq_ack) {
diff --git a/drivers/scsi/aic7xxx/aic7770_osm.c b/drivers/scsi/aic7xxx/aic7770_osm.c
index 70c5fb59c9ea..d754b3267863 100644
--- a/drivers/scsi/aic7xxx/aic7770_osm.c
+++ b/drivers/scsi/aic7xxx/aic7770_osm.c
@@ -112,6 +112,9 @@ aic7770_remove(struct device *dev)
112 struct ahc_softc *ahc = dev_get_drvdata(dev); 112 struct ahc_softc *ahc = dev_get_drvdata(dev);
113 u_long s; 113 u_long s;
114 114
115 if (ahc->platform_data && ahc->platform_data->host)
116 scsi_remove_host(ahc->platform_data->host);
117
115 ahc_lock(ahc, &s); 118 ahc_lock(ahc, &s);
116 ahc_intr_enable(ahc, FALSE); 119 ahc_intr_enable(ahc, FALSE);
117 ahc_unlock(ahc, &s); 120 ahc_unlock(ahc, &s);
diff --git a/drivers/scsi/aic7xxx/aic79xx_osm.c b/drivers/scsi/aic7xxx/aic79xx_osm.c
index 6b6d4e287793..95c285cc83e4 100644
--- a/drivers/scsi/aic7xxx/aic79xx_osm.c
+++ b/drivers/scsi/aic7xxx/aic79xx_osm.c
@@ -1192,11 +1192,6 @@ ahd_platform_free(struct ahd_softc *ahd)
1192 int i, j; 1192 int i, j;
1193 1193
1194 if (ahd->platform_data != NULL) { 1194 if (ahd->platform_data != NULL) {
1195 if (ahd->platform_data->host != NULL) {
1196 scsi_remove_host(ahd->platform_data->host);
1197 scsi_host_put(ahd->platform_data->host);
1198 }
1199
1200 /* destroy all of the device and target objects */ 1195 /* destroy all of the device and target objects */
1201 for (i = 0; i < AHD_NUM_TARGETS; i++) { 1196 for (i = 0; i < AHD_NUM_TARGETS; i++) {
1202 starget = ahd->platform_data->starget[i]; 1197 starget = ahd->platform_data->starget[i];
@@ -1226,6 +1221,9 @@ ahd_platform_free(struct ahd_softc *ahd)
1226 release_mem_region(ahd->platform_data->mem_busaddr, 1221 release_mem_region(ahd->platform_data->mem_busaddr,
1227 0x1000); 1222 0x1000);
1228 } 1223 }
1224 if (ahd->platform_data->host)
1225 scsi_host_put(ahd->platform_data->host);
1226
1229 free(ahd->platform_data, M_DEVBUF); 1227 free(ahd->platform_data, M_DEVBUF);
1230 } 1228 }
1231} 1229}
diff --git a/drivers/scsi/aic7xxx/aic79xx_osm_pci.c b/drivers/scsi/aic7xxx/aic79xx_osm_pci.c
index 390b53852d4b..bf360ae021ab 100644
--- a/drivers/scsi/aic7xxx/aic79xx_osm_pci.c
+++ b/drivers/scsi/aic7xxx/aic79xx_osm_pci.c
@@ -95,6 +95,9 @@ ahd_linux_pci_dev_remove(struct pci_dev *pdev)
95 struct ahd_softc *ahd = pci_get_drvdata(pdev); 95 struct ahd_softc *ahd = pci_get_drvdata(pdev);
96 u_long s; 96 u_long s;
97 97
98 if (ahd->platform_data && ahd->platform_data->host)
99 scsi_remove_host(ahd->platform_data->host);
100
98 ahd_lock(ahd, &s); 101 ahd_lock(ahd, &s);
99 ahd_intr_enable(ahd, FALSE); 102 ahd_intr_enable(ahd, FALSE);
100 ahd_unlock(ahd, &s); 103 ahd_unlock(ahd, &s);
diff --git a/drivers/scsi/aic7xxx/aic7xxx_osm.c b/drivers/scsi/aic7xxx/aic7xxx_osm.c
index 876d1de8480d..6ee1435d37fa 100644
--- a/drivers/scsi/aic7xxx/aic7xxx_osm.c
+++ b/drivers/scsi/aic7xxx/aic7xxx_osm.c
@@ -1209,11 +1209,6 @@ ahc_platform_free(struct ahc_softc *ahc)
1209 int i, j; 1209 int i, j;
1210 1210
1211 if (ahc->platform_data != NULL) { 1211 if (ahc->platform_data != NULL) {
1212 if (ahc->platform_data->host != NULL) {
1213 scsi_remove_host(ahc->platform_data->host);
1214 scsi_host_put(ahc->platform_data->host);
1215 }
1216
1217 /* destroy all of the device and target objects */ 1212 /* destroy all of the device and target objects */
1218 for (i = 0; i < AHC_NUM_TARGETS; i++) { 1213 for (i = 0; i < AHC_NUM_TARGETS; i++) {
1219 starget = ahc->platform_data->starget[i]; 1214 starget = ahc->platform_data->starget[i];
@@ -1242,6 +1237,9 @@ ahc_platform_free(struct ahc_softc *ahc)
1242 0x1000); 1237 0x1000);
1243 } 1238 }
1244 1239
1240 if (ahc->platform_data->host)
1241 scsi_host_put(ahc->platform_data->host);
1242
1245 free(ahc->platform_data, M_DEVBUF); 1243 free(ahc->platform_data, M_DEVBUF);
1246 } 1244 }
1247} 1245}
diff --git a/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c b/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c
index 3ce77ddc889e..cb30d9c1153d 100644
--- a/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c
+++ b/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c
@@ -143,6 +143,9 @@ ahc_linux_pci_dev_remove(struct pci_dev *pdev)
143 struct ahc_softc *ahc = pci_get_drvdata(pdev); 143 struct ahc_softc *ahc = pci_get_drvdata(pdev);
144 u_long s; 144 u_long s;
145 145
146 if (ahc->platform_data && ahc->platform_data->host)
147 scsi_remove_host(ahc->platform_data->host);
148
146 ahc_lock(ahc, &s); 149 ahc_lock(ahc, &s);
147 ahc_intr_enable(ahc, FALSE); 150 ahc_intr_enable(ahc, FALSE);
148 ahc_unlock(ahc, &s); 151 ahc_unlock(ahc, &s);
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c
index 87e0c36f1554..be021478f416 100644
--- a/drivers/scsi/ata_piix.c
+++ b/drivers/scsi/ata_piix.c
@@ -147,7 +147,7 @@ static Scsi_Host_Template piix_sht = {
147 .ordered_flush = 1, 147 .ordered_flush = 1,
148}; 148};
149 149
150static struct ata_port_operations piix_pata_ops = { 150static const struct ata_port_operations piix_pata_ops = {
151 .port_disable = ata_port_disable, 151 .port_disable = ata_port_disable,
152 .set_piomode = piix_set_piomode, 152 .set_piomode = piix_set_piomode,
153 .set_dmamode = piix_set_dmamode, 153 .set_dmamode = piix_set_dmamode,
@@ -177,7 +177,7 @@ static struct ata_port_operations piix_pata_ops = {
177 .host_stop = ata_host_stop, 177 .host_stop = ata_host_stop,
178}; 178};
179 179
180static struct ata_port_operations piix_sata_ops = { 180static const struct ata_port_operations piix_sata_ops = {
181 .port_disable = ata_port_disable, 181 .port_disable = ata_port_disable,
182 182
183 .tf_load = ata_tf_load, 183 .tf_load = ata_tf_load,
@@ -442,7 +442,6 @@ static void piix_sata_phy_reset(struct ata_port *ap)
442 * piix_set_piomode - Initialize host controller PATA PIO timings 442 * piix_set_piomode - Initialize host controller PATA PIO timings
443 * @ap: Port whose timings we are configuring 443 * @ap: Port whose timings we are configuring
444 * @adev: um 444 * @adev: um
445 * @pio: PIO mode, 0 - 4
446 * 445 *
447 * Set PIO mode for device, in host controller PCI config space. 446 * Set PIO mode for device, in host controller PCI config space.
448 * 447 *
diff --git a/drivers/scsi/eata.c b/drivers/scsi/eata.c
index c10e45b94b62..3d13fdee4fc2 100644
--- a/drivers/scsi/eata.c
+++ b/drivers/scsi/eata.c
@@ -1357,7 +1357,7 @@ static int port_detect(unsigned long port_base, unsigned int j,
1357 1357
1358 for (i = 0; i < shost->can_queue; i++) { 1358 for (i = 0; i < shost->can_queue; i++) {
1359 size_t sz = shost->sg_tablesize *sizeof(struct sg_list); 1359 size_t sz = shost->sg_tablesize *sizeof(struct sg_list);
1360 unsigned int gfp_mask = (shost->unchecked_isa_dma ? GFP_DMA : 0) | GFP_ATOMIC; 1360 gfp_t gfp_mask = (shost->unchecked_isa_dma ? GFP_DMA : 0) | GFP_ATOMIC;
1361 ha->cp[i].sglist = kmalloc(sz, gfp_mask); 1361 ha->cp[i].sglist = kmalloc(sz, gfp_mask);
1362 if (!ha->cp[i].sglist) { 1362 if (!ha->cp[i].sglist) {
1363 printk 1363 printk
diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c
index f2a72d33132c..f24d84538fd5 100644
--- a/drivers/scsi/hosts.c
+++ b/drivers/scsi/hosts.c
@@ -176,6 +176,7 @@ void scsi_remove_host(struct Scsi_Host *shost)
176 transport_unregister_device(&shost->shost_gendev); 176 transport_unregister_device(&shost->shost_gendev);
177 class_device_unregister(&shost->shost_classdev); 177 class_device_unregister(&shost->shost_classdev);
178 device_del(&shost->shost_gendev); 178 device_del(&shost->shost_gendev);
179 scsi_proc_hostdir_rm(shost->hostt);
179} 180}
180EXPORT_SYMBOL(scsi_remove_host); 181EXPORT_SYMBOL(scsi_remove_host);
181 182
@@ -262,7 +263,6 @@ static void scsi_host_dev_release(struct device *dev)
262 if (shost->work_q) 263 if (shost->work_q)
263 destroy_workqueue(shost->work_q); 264 destroy_workqueue(shost->work_q);
264 265
265 scsi_proc_hostdir_rm(shost->hostt);
266 scsi_destroy_command_freelist(shost); 266 scsi_destroy_command_freelist(shost);
267 kfree(shost->shost_data); 267 kfree(shost->shost_data);
268 268
@@ -287,7 +287,8 @@ static void scsi_host_dev_release(struct device *dev)
287struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *sht, int privsize) 287struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *sht, int privsize)
288{ 288{
289 struct Scsi_Host *shost; 289 struct Scsi_Host *shost;
290 int gfp_mask = GFP_KERNEL, rval; 290 gfp_t gfp_mask = GFP_KERNEL;
291 int rval;
291 292
292 if (sht->unchecked_isa_dma && privsize) 293 if (sht->unchecked_isa_dma && privsize)
293 gfp_mask |= __GFP_DMA; 294 gfp_mask |= __GFP_DMA;
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
index d92273cbe0de..f53d7b8ac33f 100644
--- a/drivers/scsi/libata-core.c
+++ b/drivers/scsi/libata-core.c
@@ -48,6 +48,7 @@
48#include <linux/completion.h> 48#include <linux/completion.h>
49#include <linux/suspend.h> 49#include <linux/suspend.h>
50#include <linux/workqueue.h> 50#include <linux/workqueue.h>
51#include <linux/jiffies.h>
51#include <scsi/scsi.h> 52#include <scsi/scsi.h>
52#include "scsi.h" 53#include "scsi.h"
53#include "scsi_priv.h" 54#include "scsi_priv.h"
@@ -62,14 +63,15 @@
62static unsigned int ata_busy_sleep (struct ata_port *ap, 63static unsigned int ata_busy_sleep (struct ata_port *ap,
63 unsigned long tmout_pat, 64 unsigned long tmout_pat,
64 unsigned long tmout); 65 unsigned long tmout);
66static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
67static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
65static void ata_set_mode(struct ata_port *ap); 68static void ata_set_mode(struct ata_port *ap);
66static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); 69static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
67static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift); 70static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
68static int fgb(u32 bitmap); 71static int fgb(u32 bitmap);
69static int ata_choose_xfer_mode(struct ata_port *ap, 72static int ata_choose_xfer_mode(const struct ata_port *ap,
70 u8 *xfer_mode_out, 73 u8 *xfer_mode_out,
71 unsigned int *xfer_shift_out); 74 unsigned int *xfer_shift_out);
72static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat);
73static void __ata_qc_complete(struct ata_queued_cmd *qc); 75static void __ata_qc_complete(struct ata_queued_cmd *qc);
74 76
75static unsigned int ata_unique_id = 1; 77static unsigned int ata_unique_id = 1;
@@ -85,7 +87,7 @@ MODULE_LICENSE("GPL");
85MODULE_VERSION(DRV_VERSION); 87MODULE_VERSION(DRV_VERSION);
86 88
87/** 89/**
88 * ata_tf_load - send taskfile registers to host controller 90 * ata_tf_load_pio - send taskfile registers to host controller
89 * @ap: Port to which output is sent 91 * @ap: Port to which output is sent
90 * @tf: ATA taskfile register set 92 * @tf: ATA taskfile register set
91 * 93 *
@@ -95,7 +97,7 @@ MODULE_VERSION(DRV_VERSION);
95 * Inherited from caller. 97 * Inherited from caller.
96 */ 98 */
97 99
98static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf) 100static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
99{ 101{
100 struct ata_ioports *ioaddr = &ap->ioaddr; 102 struct ata_ioports *ioaddr = &ap->ioaddr;
101 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; 103 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
@@ -153,7 +155,7 @@ static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
153 * Inherited from caller. 155 * Inherited from caller.
154 */ 156 */
155 157
156static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf) 158static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
157{ 159{
158 struct ata_ioports *ioaddr = &ap->ioaddr; 160 struct ata_ioports *ioaddr = &ap->ioaddr;
159 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; 161 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
@@ -222,7 +224,7 @@ static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
222 * LOCKING: 224 * LOCKING:
223 * Inherited from caller. 225 * Inherited from caller.
224 */ 226 */
225void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf) 227void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
226{ 228{
227 if (ap->flags & ATA_FLAG_MMIO) 229 if (ap->flags & ATA_FLAG_MMIO)
228 ata_tf_load_mmio(ap, tf); 230 ata_tf_load_mmio(ap, tf);
@@ -242,7 +244,7 @@ void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
242 * spin_lock_irqsave(host_set lock) 244 * spin_lock_irqsave(host_set lock)
243 */ 245 */
244 246
245static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf) 247static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
246{ 248{
247 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); 249 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
248 250
@@ -263,7 +265,7 @@ static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf)
263 * spin_lock_irqsave(host_set lock) 265 * spin_lock_irqsave(host_set lock)
264 */ 266 */
265 267
266static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf) 268static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
267{ 269{
268 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); 270 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
269 271
@@ -283,7 +285,7 @@ static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
283 * LOCKING: 285 * LOCKING:
284 * spin_lock_irqsave(host_set lock) 286 * spin_lock_irqsave(host_set lock)
285 */ 287 */
286void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf) 288void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
287{ 289{
288 if (ap->flags & ATA_FLAG_MMIO) 290 if (ap->flags & ATA_FLAG_MMIO)
289 ata_exec_command_mmio(ap, tf); 291 ata_exec_command_mmio(ap, tf);
@@ -303,7 +305,7 @@ void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf)
303 * Obtains host_set lock. 305 * Obtains host_set lock.
304 */ 306 */
305 307
306static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf) 308static inline void ata_exec(struct ata_port *ap, const struct ata_taskfile *tf)
307{ 309{
308 unsigned long flags; 310 unsigned long flags;
309 311
@@ -326,7 +328,7 @@ static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf)
326 * Obtains host_set lock. 328 * Obtains host_set lock.
327 */ 329 */
328 330
329static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf) 331static void ata_tf_to_host(struct ata_port *ap, const struct ata_taskfile *tf)
330{ 332{
331 ap->ops->tf_load(ap, tf); 333 ap->ops->tf_load(ap, tf);
332 334
@@ -346,7 +348,7 @@ static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf)
346 * spin_lock_irqsave(host_set lock) 348 * spin_lock_irqsave(host_set lock)
347 */ 349 */
348 350
349void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf) 351void ata_tf_to_host_nolock(struct ata_port *ap, const struct ata_taskfile *tf)
350{ 352{
351 ap->ops->tf_load(ap, tf); 353 ap->ops->tf_load(ap, tf);
352 ap->ops->exec_command(ap, tf); 354 ap->ops->exec_command(ap, tf);
@@ -556,7 +558,7 @@ u8 ata_chk_err(struct ata_port *ap)
556 * Inherited from caller. 558 * Inherited from caller.
557 */ 559 */
558 560
559void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp) 561void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
560{ 562{
561 fis[0] = 0x27; /* Register - Host to Device FIS */ 563 fis[0] = 0x27; /* Register - Host to Device FIS */
562 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, 564 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
@@ -597,7 +599,7 @@ void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp)
597 * Inherited from caller. 599 * Inherited from caller.
598 */ 600 */
599 601
600void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf) 602void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
601{ 603{
602 tf->command = fis[2]; /* status */ 604 tf->command = fis[2]; /* status */
603 tf->feature = fis[3]; /* error */ 605 tf->feature = fis[3]; /* error */
@@ -615,79 +617,53 @@ void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf)
615 tf->hob_nsect = fis[13]; 617 tf->hob_nsect = fis[13];
616} 618}
617 619
618/** 620static const u8 ata_rw_cmds[] = {
619 * ata_prot_to_cmd - determine which read/write opcodes to use 621 /* pio multi */
620 * @protocol: ATA_PROT_xxx taskfile protocol 622 ATA_CMD_READ_MULTI,
621 * @lba48: true is lba48 is present 623 ATA_CMD_WRITE_MULTI,
622 * 624 ATA_CMD_READ_MULTI_EXT,
623 * Given necessary input, determine which read/write commands 625 ATA_CMD_WRITE_MULTI_EXT,
624 * to use to transfer data. 626 /* pio */
625 * 627 ATA_CMD_PIO_READ,
626 * LOCKING: 628 ATA_CMD_PIO_WRITE,
627 * None. 629 ATA_CMD_PIO_READ_EXT,
628 */ 630 ATA_CMD_PIO_WRITE_EXT,
629static int ata_prot_to_cmd(int protocol, int lba48) 631 /* dma */
630{ 632 ATA_CMD_READ,
631 int rcmd = 0, wcmd = 0; 633 ATA_CMD_WRITE,
632 634 ATA_CMD_READ_EXT,
633 switch (protocol) { 635 ATA_CMD_WRITE_EXT
634 case ATA_PROT_PIO: 636};
635 if (lba48) {
636 rcmd = ATA_CMD_PIO_READ_EXT;
637 wcmd = ATA_CMD_PIO_WRITE_EXT;
638 } else {
639 rcmd = ATA_CMD_PIO_READ;
640 wcmd = ATA_CMD_PIO_WRITE;
641 }
642 break;
643
644 case ATA_PROT_DMA:
645 if (lba48) {
646 rcmd = ATA_CMD_READ_EXT;
647 wcmd = ATA_CMD_WRITE_EXT;
648 } else {
649 rcmd = ATA_CMD_READ;
650 wcmd = ATA_CMD_WRITE;
651 }
652 break;
653
654 default:
655 return -1;
656 }
657
658 return rcmd | (wcmd << 8);
659}
660 637
661/** 638/**
662 * ata_dev_set_protocol - set taskfile protocol and r/w commands 639 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
663 * @dev: device to examine and configure 640 * @qc: command to examine and configure
664 * 641 *
665 * Examine the device configuration, after we have 642 * Examine the device configuration and tf->flags to calculate
666 * read the identify-device page and configured the 643 * the proper read/write commands and protocol to use.
667 * data transfer mode. Set internal state related to
668 * the ATA taskfile protocol (pio, pio mult, dma, etc.)
669 * and calculate the proper read/write commands to use.
670 * 644 *
671 * LOCKING: 645 * LOCKING:
672 * caller. 646 * caller.
673 */ 647 */
674static void ata_dev_set_protocol(struct ata_device *dev) 648void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
675{ 649{
676 int pio = (dev->flags & ATA_DFLAG_PIO); 650 struct ata_taskfile *tf = &qc->tf;
677 int lba48 = (dev->flags & ATA_DFLAG_LBA48); 651 struct ata_device *dev = qc->dev;
678 int proto, cmd;
679 652
680 if (pio) 653 int index, lba48, write;
681 proto = dev->xfer_protocol = ATA_PROT_PIO; 654
682 else 655 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
683 proto = dev->xfer_protocol = ATA_PROT_DMA; 656 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
684 657
685 cmd = ata_prot_to_cmd(proto, lba48); 658 if (dev->flags & ATA_DFLAG_PIO) {
686 if (cmd < 0) 659 tf->protocol = ATA_PROT_PIO;
687 BUG(); 660 index = dev->multi_count ? 0 : 4;
661 } else {
662 tf->protocol = ATA_PROT_DMA;
663 index = 8;
664 }
688 665
689 dev->read_cmd = cmd & 0xff; 666 tf->command = ata_rw_cmds[index + lba48 + write];
690 dev->write_cmd = (cmd >> 8) & 0xff;
691} 667}
692 668
693static const char * xfer_mode_str[] = { 669static const char * xfer_mode_str[] = {
@@ -869,7 +845,7 @@ static unsigned int ata_devchk(struct ata_port *ap,
869 * the event of failure. 845 * the event of failure.
870 */ 846 */
871 847
872unsigned int ata_dev_classify(struct ata_taskfile *tf) 848unsigned int ata_dev_classify(const struct ata_taskfile *tf)
873{ 849{
874 /* Apple's open source Darwin code hints that some devices only 850 /* Apple's open source Darwin code hints that some devices only
875 * put a proper signature into the LBA mid/high registers, 851 * put a proper signature into the LBA mid/high registers,
@@ -961,7 +937,7 @@ static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
961 * caller. 937 * caller.
962 */ 938 */
963 939
964void ata_dev_id_string(u16 *id, unsigned char *s, 940void ata_dev_id_string(const u16 *id, unsigned char *s,
965 unsigned int ofs, unsigned int len) 941 unsigned int ofs, unsigned int len)
966{ 942{
967 unsigned int c; 943 unsigned int c;
@@ -1078,7 +1054,7 @@ void ata_dev_select(struct ata_port *ap, unsigned int device,
1078 * caller. 1054 * caller.
1079 */ 1055 */
1080 1056
1081static inline void ata_dump_id(struct ata_device *dev) 1057static inline void ata_dump_id(const struct ata_device *dev)
1082{ 1058{
1083 DPRINTK("49==0x%04x " 1059 DPRINTK("49==0x%04x "
1084 "53==0x%04x " 1060 "53==0x%04x "
@@ -1106,6 +1082,31 @@ static inline void ata_dump_id(struct ata_device *dev)
1106 dev->id[93]); 1082 dev->id[93]);
1107} 1083}
1108 1084
1085/*
1086 * Compute the PIO modes available for this device. This is not as
1087 * trivial as it seems if we must consider early devices correctly.
1088 *
1089 * FIXME: pre IDE drive timing (do we care ?).
1090 */
1091
1092static unsigned int ata_pio_modes(const struct ata_device *adev)
1093{
1094 u16 modes;
1095
1096 /* Usual case. Word 53 indicates word 88 is valid */
1097 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1098 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1099 modes <<= 3;
1100 modes |= 0x7;
1101 return modes;
1102 }
1103
1104 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1105 for the maximum. Turn it into a mask and return it */
1106 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1107 return modes;
1108}
1109
1109/** 1110/**
1110 * ata_dev_identify - obtain IDENTIFY x DEVICE page 1111 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1111 * @ap: port on which device we wish to probe resides 1112 * @ap: port on which device we wish to probe resides
@@ -1131,7 +1132,7 @@ static inline void ata_dump_id(struct ata_device *dev)
1131static void ata_dev_identify(struct ata_port *ap, unsigned int device) 1132static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1132{ 1133{
1133 struct ata_device *dev = &ap->device[device]; 1134 struct ata_device *dev = &ap->device[device];
1134 unsigned int i; 1135 unsigned int major_version;
1135 u16 tmp; 1136 u16 tmp;
1136 unsigned long xfer_modes; 1137 unsigned long xfer_modes;
1137 u8 status; 1138 u8 status;
@@ -1229,9 +1230,9 @@ retry:
1229 * common ATA, ATAPI feature tests 1230 * common ATA, ATAPI feature tests
1230 */ 1231 */
1231 1232
1232 /* we require LBA and DMA support (bits 8 & 9 of word 49) */ 1233 /* we require DMA support (bits 8 of word 49) */
1233 if (!ata_id_has_dma(dev->id) || !ata_id_has_lba(dev->id)) { 1234 if (!ata_id_has_dma(dev->id)) {
1234 printk(KERN_DEBUG "ata%u: no dma/lba\n", ap->id); 1235 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1235 goto err_out_nosup; 1236 goto err_out_nosup;
1236 } 1237 }
1237 1238
@@ -1239,10 +1240,8 @@ retry:
1239 xfer_modes = dev->id[ATA_ID_UDMA_MODES]; 1240 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1240 if (!xfer_modes) 1241 if (!xfer_modes)
1241 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; 1242 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1242 if (!xfer_modes) { 1243 if (!xfer_modes)
1243 xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3); 1244 xfer_modes = ata_pio_modes(dev);
1244 xfer_modes |= (0x7 << ATA_SHIFT_PIO);
1245 }
1246 1245
1247 ata_dump_id(dev); 1246 ata_dump_id(dev);
1248 1247
@@ -1251,32 +1250,75 @@ retry:
1251 if (!ata_id_is_ata(dev->id)) /* sanity check */ 1250 if (!ata_id_is_ata(dev->id)) /* sanity check */
1252 goto err_out_nosup; 1251 goto err_out_nosup;
1253 1252
1253 /* get major version */
1254 tmp = dev->id[ATA_ID_MAJOR_VER]; 1254 tmp = dev->id[ATA_ID_MAJOR_VER];
1255 for (i = 14; i >= 1; i--) 1255 for (major_version = 14; major_version >= 1; major_version--)
1256 if (tmp & (1 << i)) 1256 if (tmp & (1 << major_version))
1257 break; 1257 break;
1258 1258
1259 /* we require at least ATA-3 */ 1259 /*
1260 if (i < 3) { 1260 * The exact sequence expected by certain pre-ATA4 drives is:
1261 printk(KERN_DEBUG "ata%u: no ATA-3\n", ap->id); 1261 * SRST RESET
1262 goto err_out_nosup; 1262 * IDENTIFY
1263 * INITIALIZE DEVICE PARAMETERS
1264 * anything else..
1265 * Some drives were very specific about that exact sequence.
1266 */
1267 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1268 ata_dev_init_params(ap, dev);
1269
1270 /* current CHS translation info (id[53-58]) might be
1271 * changed. reread the identify device info.
1272 */
1273 ata_dev_reread_id(ap, dev);
1263 } 1274 }
1264 1275
1265 if (ata_id_has_lba48(dev->id)) { 1276 if (ata_id_has_lba(dev->id)) {
1266 dev->flags |= ATA_DFLAG_LBA48; 1277 dev->flags |= ATA_DFLAG_LBA;
1267 dev->n_sectors = ata_id_u64(dev->id, 100); 1278
1268 } else { 1279 if (ata_id_has_lba48(dev->id)) {
1269 dev->n_sectors = ata_id_u32(dev->id, 60); 1280 dev->flags |= ATA_DFLAG_LBA48;
1281 dev->n_sectors = ata_id_u64(dev->id, 100);
1282 } else {
1283 dev->n_sectors = ata_id_u32(dev->id, 60);
1284 }
1285
1286 /* print device info to dmesg */
1287 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1288 ap->id, device,
1289 major_version,
1290 ata_mode_string(xfer_modes),
1291 (unsigned long long)dev->n_sectors,
1292 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1293 } else {
1294 /* CHS */
1295
1296 /* Default translation */
1297 dev->cylinders = dev->id[1];
1298 dev->heads = dev->id[3];
1299 dev->sectors = dev->id[6];
1300 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1301
1302 if (ata_id_current_chs_valid(dev->id)) {
1303 /* Current CHS translation is valid. */
1304 dev->cylinders = dev->id[54];
1305 dev->heads = dev->id[55];
1306 dev->sectors = dev->id[56];
1307
1308 dev->n_sectors = ata_id_u32(dev->id, 57);
1309 }
1310
1311 /* print device info to dmesg */
1312 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1313 ap->id, device,
1314 major_version,
1315 ata_mode_string(xfer_modes),
1316 (unsigned long long)dev->n_sectors,
1317 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1318
1270 } 1319 }
1271 1320
1272 ap->host->max_cmd_len = 16; 1321 ap->host->max_cmd_len = 16;
1273
1274 /* print device info to dmesg */
1275 printk(KERN_INFO "ata%u: dev %u ATA, max %s, %Lu sectors:%s\n",
1276 ap->id, device,
1277 ata_mode_string(xfer_modes),
1278 (unsigned long long)dev->n_sectors,
1279 dev->flags & ATA_DFLAG_LBA48 ? " lba48" : "");
1280 } 1322 }
1281 1323
1282 /* ATAPI-specific feature tests */ 1324 /* ATAPI-specific feature tests */
@@ -1310,7 +1352,7 @@ err_out:
1310} 1352}
1311 1353
1312 1354
1313static inline u8 ata_dev_knobble(struct ata_port *ap) 1355static inline u8 ata_dev_knobble(const struct ata_port *ap)
1314{ 1356{
1315 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id))); 1357 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1316} 1358}
@@ -1496,7 +1538,153 @@ void ata_port_disable(struct ata_port *ap)
1496 ap->flags |= ATA_FLAG_PORT_DISABLED; 1538 ap->flags |= ATA_FLAG_PORT_DISABLED;
1497} 1539}
1498 1540
1499static struct { 1541/*
1542 * This mode timing computation functionality is ported over from
1543 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1544 */
1545/*
1546 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1547 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1548 * for PIO 5, which is a nonstandard extension and UDMA6, which
1549 * is currently supported only by Maxtor drives.
1550 */
1551
1552static const struct ata_timing ata_timing[] = {
1553
1554 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1555 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1556 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1557 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1558
1559 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1560 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1561 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1562
1563/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1564
1565 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1566 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1567 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1568
1569 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1570 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1571 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1572
1573/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1574 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1575 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1576
1577 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1578 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1579 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1580
1581/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1582
1583 { 0xFF }
1584};
1585
1586#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1587#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1588
1589static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1590{
1591 q->setup = EZ(t->setup * 1000, T);
1592 q->act8b = EZ(t->act8b * 1000, T);
1593 q->rec8b = EZ(t->rec8b * 1000, T);
1594 q->cyc8b = EZ(t->cyc8b * 1000, T);
1595 q->active = EZ(t->active * 1000, T);
1596 q->recover = EZ(t->recover * 1000, T);
1597 q->cycle = EZ(t->cycle * 1000, T);
1598 q->udma = EZ(t->udma * 1000, UT);
1599}
1600
1601void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1602 struct ata_timing *m, unsigned int what)
1603{
1604 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1605 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1606 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1607 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1608 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1609 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1610 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1611 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1612}
1613
1614static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1615{
1616 const struct ata_timing *t;
1617
1618 for (t = ata_timing; t->mode != speed; t++)
1619 if (t->mode == 0xFF)
1620 return NULL;
1621 return t;
1622}
1623
1624int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1625 struct ata_timing *t, int T, int UT)
1626{
1627 const struct ata_timing *s;
1628 struct ata_timing p;
1629
1630 /*
1631 * Find the mode.
1632 */
1633
1634 if (!(s = ata_timing_find_mode(speed)))
1635 return -EINVAL;
1636
1637 /*
1638 * If the drive is an EIDE drive, it can tell us it needs extended
1639 * PIO/MW_DMA cycle timing.
1640 */
1641
1642 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1643 memset(&p, 0, sizeof(p));
1644 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1645 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1646 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1647 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1648 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1649 }
1650 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1651 }
1652
1653 /*
1654 * Convert the timing to bus clock counts.
1655 */
1656
1657 ata_timing_quantize(s, t, T, UT);
1658
1659 /*
1660 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1661 * and some other commands. We have to ensure that the DMA cycle timing is
1662 * slower/equal than the fastest PIO timing.
1663 */
1664
1665 if (speed > XFER_PIO_4) {
1666 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1667 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1668 }
1669
1670 /*
1671 * Lenghten active & recovery time so that cycle time is correct.
1672 */
1673
1674 if (t->act8b + t->rec8b < t->cyc8b) {
1675 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1676 t->rec8b = t->cyc8b - t->act8b;
1677 }
1678
1679 if (t->active + t->recover < t->cycle) {
1680 t->active += (t->cycle - (t->active + t->recover)) / 2;
1681 t->recover = t->cycle - t->active;
1682 }
1683
1684 return 0;
1685}
1686
1687static const struct {
1500 unsigned int shift; 1688 unsigned int shift;
1501 u8 base; 1689 u8 base;
1502} xfer_mode_classes[] = { 1690} xfer_mode_classes[] = {
@@ -1603,7 +1791,7 @@ static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1603 */ 1791 */
1604static void ata_set_mode(struct ata_port *ap) 1792static void ata_set_mode(struct ata_port *ap)
1605{ 1793{
1606 unsigned int i, xfer_shift; 1794 unsigned int xfer_shift;
1607 u8 xfer_mode; 1795 u8 xfer_mode;
1608 int rc; 1796 int rc;
1609 1797
@@ -1632,11 +1820,6 @@ static void ata_set_mode(struct ata_port *ap)
1632 if (ap->ops->post_set_mode) 1820 if (ap->ops->post_set_mode)
1633 ap->ops->post_set_mode(ap); 1821 ap->ops->post_set_mode(ap);
1634 1822
1635 for (i = 0; i < 2; i++) {
1636 struct ata_device *dev = &ap->device[i];
1637 ata_dev_set_protocol(dev);
1638 }
1639
1640 return; 1823 return;
1641 1824
1642err_out: 1825err_out:
@@ -1910,7 +2093,8 @@ err_out:
1910 DPRINTK("EXIT\n"); 2093 DPRINTK("EXIT\n");
1911} 2094}
1912 2095
1913static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev) 2096static void ata_pr_blacklisted(const struct ata_port *ap,
2097 const struct ata_device *dev)
1914{ 2098{
1915 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", 2099 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
1916 ap->id, dev->devno); 2100 ap->id, dev->devno);
@@ -1948,7 +2132,7 @@ static const char * ata_dma_blacklist [] = {
1948 "_NEC DV5800A", 2132 "_NEC DV5800A",
1949}; 2133};
1950 2134
1951static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev) 2135static int ata_dma_blacklisted(const struct ata_device *dev)
1952{ 2136{
1953 unsigned char model_num[40]; 2137 unsigned char model_num[40];
1954 char *s; 2138 char *s;
@@ -1973,9 +2157,9 @@ static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev)
1973 return 0; 2157 return 0;
1974} 2158}
1975 2159
1976static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift) 2160static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
1977{ 2161{
1978 struct ata_device *master, *slave; 2162 const struct ata_device *master, *slave;
1979 unsigned int mask; 2163 unsigned int mask;
1980 2164
1981 master = &ap->device[0]; 2165 master = &ap->device[0];
@@ -1987,14 +2171,14 @@ static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
1987 mask = ap->udma_mask; 2171 mask = ap->udma_mask;
1988 if (ata_dev_present(master)) { 2172 if (ata_dev_present(master)) {
1989 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); 2173 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
1990 if (ata_dma_blacklisted(ap, master)) { 2174 if (ata_dma_blacklisted(master)) {
1991 mask = 0; 2175 mask = 0;
1992 ata_pr_blacklisted(ap, master); 2176 ata_pr_blacklisted(ap, master);
1993 } 2177 }
1994 } 2178 }
1995 if (ata_dev_present(slave)) { 2179 if (ata_dev_present(slave)) {
1996 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); 2180 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
1997 if (ata_dma_blacklisted(ap, slave)) { 2181 if (ata_dma_blacklisted(slave)) {
1998 mask = 0; 2182 mask = 0;
1999 ata_pr_blacklisted(ap, slave); 2183 ata_pr_blacklisted(ap, slave);
2000 } 2184 }
@@ -2004,14 +2188,14 @@ static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
2004 mask = ap->mwdma_mask; 2188 mask = ap->mwdma_mask;
2005 if (ata_dev_present(master)) { 2189 if (ata_dev_present(master)) {
2006 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); 2190 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2007 if (ata_dma_blacklisted(ap, master)) { 2191 if (ata_dma_blacklisted(master)) {
2008 mask = 0; 2192 mask = 0;
2009 ata_pr_blacklisted(ap, master); 2193 ata_pr_blacklisted(ap, master);
2010 } 2194 }
2011 } 2195 }
2012 if (ata_dev_present(slave)) { 2196 if (ata_dev_present(slave)) {
2013 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); 2197 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2014 if (ata_dma_blacklisted(ap, slave)) { 2198 if (ata_dma_blacklisted(slave)) {
2015 mask = 0; 2199 mask = 0;
2016 ata_pr_blacklisted(ap, slave); 2200 ata_pr_blacklisted(ap, slave);
2017 } 2201 }
@@ -2075,7 +2259,7 @@ static int fgb(u32 bitmap)
2075 * Zero on success, negative on error. 2259 * Zero on success, negative on error.
2076 */ 2260 */
2077 2261
2078static int ata_choose_xfer_mode(struct ata_port *ap, 2262static int ata_choose_xfer_mode(const struct ata_port *ap,
2079 u8 *xfer_mode_out, 2263 u8 *xfer_mode_out,
2080 unsigned int *xfer_shift_out) 2264 unsigned int *xfer_shift_out)
2081{ 2265{
@@ -2144,6 +2328,110 @@ static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2144} 2328}
2145 2329
2146/** 2330/**
2331 * ata_dev_reread_id - Reread the device identify device info
2332 * @ap: port where the device is
2333 * @dev: device to reread the identify device info
2334 *
2335 * LOCKING:
2336 */
2337
2338static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2339{
2340 DECLARE_COMPLETION(wait);
2341 struct ata_queued_cmd *qc;
2342 unsigned long flags;
2343 int rc;
2344
2345 qc = ata_qc_new_init(ap, dev);
2346 BUG_ON(qc == NULL);
2347
2348 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2349 qc->dma_dir = DMA_FROM_DEVICE;
2350
2351 if (dev->class == ATA_DEV_ATA) {
2352 qc->tf.command = ATA_CMD_ID_ATA;
2353 DPRINTK("do ATA identify\n");
2354 } else {
2355 qc->tf.command = ATA_CMD_ID_ATAPI;
2356 DPRINTK("do ATAPI identify\n");
2357 }
2358
2359 qc->tf.flags |= ATA_TFLAG_DEVICE;
2360 qc->tf.protocol = ATA_PROT_PIO;
2361 qc->nsect = 1;
2362
2363 qc->waiting = &wait;
2364 qc->complete_fn = ata_qc_complete_noop;
2365
2366 spin_lock_irqsave(&ap->host_set->lock, flags);
2367 rc = ata_qc_issue(qc);
2368 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2369
2370 if (rc)
2371 goto err_out;
2372
2373 wait_for_completion(&wait);
2374
2375 swap_buf_le16(dev->id, ATA_ID_WORDS);
2376
2377 ata_dump_id(dev);
2378
2379 DPRINTK("EXIT\n");
2380
2381 return;
2382err_out:
2383 ata_port_disable(ap);
2384}
2385
2386/**
2387 * ata_dev_init_params - Issue INIT DEV PARAMS command
2388 * @ap: Port associated with device @dev
2389 * @dev: Device to which command will be sent
2390 *
2391 * LOCKING:
2392 */
2393
2394static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2395{
2396 DECLARE_COMPLETION(wait);
2397 struct ata_queued_cmd *qc;
2398 int rc;
2399 unsigned long flags;
2400 u16 sectors = dev->id[6];
2401 u16 heads = dev->id[3];
2402
2403 /* Number of sectors per track 1-255. Number of heads 1-16 */
2404 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2405 return;
2406
2407 /* set up init dev params taskfile */
2408 DPRINTK("init dev params \n");
2409
2410 qc = ata_qc_new_init(ap, dev);
2411 BUG_ON(qc == NULL);
2412
2413 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2414 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2415 qc->tf.protocol = ATA_PROT_NODATA;
2416 qc->tf.nsect = sectors;
2417 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2418
2419 qc->waiting = &wait;
2420 qc->complete_fn = ata_qc_complete_noop;
2421
2422 spin_lock_irqsave(&ap->host_set->lock, flags);
2423 rc = ata_qc_issue(qc);
2424 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2425
2426 if (rc)
2427 ata_port_disable(ap);
2428 else
2429 wait_for_completion(&wait);
2430
2431 DPRINTK("EXIT\n");
2432}
2433
2434/**
2147 * ata_sg_clean - Unmap DMA memory associated with command 2435 * ata_sg_clean - Unmap DMA memory associated with command
2148 * @qc: Command containing DMA memory to be released 2436 * @qc: Command containing DMA memory to be released
2149 * 2437 *
@@ -2413,32 +2701,32 @@ void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2413 2701
2414/** 2702/**
2415 * ata_pio_poll - 2703 * ata_pio_poll -
2416 * @ap: 2704 * @ap: the target ata_port
2417 * 2705 *
2418 * LOCKING: 2706 * LOCKING:
2419 * None. (executing in kernel thread context) 2707 * None. (executing in kernel thread context)
2420 * 2708 *
2421 * RETURNS: 2709 * RETURNS:
2422 * 2710 * timeout value to use
2423 */ 2711 */
2424 2712
2425static unsigned long ata_pio_poll(struct ata_port *ap) 2713static unsigned long ata_pio_poll(struct ata_port *ap)
2426{ 2714{
2427 u8 status; 2715 u8 status;
2428 unsigned int poll_state = PIO_ST_UNKNOWN; 2716 unsigned int poll_state = HSM_ST_UNKNOWN;
2429 unsigned int reg_state = PIO_ST_UNKNOWN; 2717 unsigned int reg_state = HSM_ST_UNKNOWN;
2430 const unsigned int tmout_state = PIO_ST_TMOUT; 2718 const unsigned int tmout_state = HSM_ST_TMOUT;
2431 2719
2432 switch (ap->pio_task_state) { 2720 switch (ap->hsm_task_state) {
2433 case PIO_ST: 2721 case HSM_ST:
2434 case PIO_ST_POLL: 2722 case HSM_ST_POLL:
2435 poll_state = PIO_ST_POLL; 2723 poll_state = HSM_ST_POLL;
2436 reg_state = PIO_ST; 2724 reg_state = HSM_ST;
2437 break; 2725 break;
2438 case PIO_ST_LAST: 2726 case HSM_ST_LAST:
2439 case PIO_ST_LAST_POLL: 2727 case HSM_ST_LAST_POLL:
2440 poll_state = PIO_ST_LAST_POLL; 2728 poll_state = HSM_ST_LAST_POLL;
2441 reg_state = PIO_ST_LAST; 2729 reg_state = HSM_ST_LAST;
2442 break; 2730 break;
2443 default: 2731 default:
2444 BUG(); 2732 BUG();
@@ -2448,20 +2736,20 @@ static unsigned long ata_pio_poll(struct ata_port *ap)
2448 status = ata_chk_status(ap); 2736 status = ata_chk_status(ap);
2449 if (status & ATA_BUSY) { 2737 if (status & ATA_BUSY) {
2450 if (time_after(jiffies, ap->pio_task_timeout)) { 2738 if (time_after(jiffies, ap->pio_task_timeout)) {
2451 ap->pio_task_state = tmout_state; 2739 ap->hsm_task_state = tmout_state;
2452 return 0; 2740 return 0;
2453 } 2741 }
2454 ap->pio_task_state = poll_state; 2742 ap->hsm_task_state = poll_state;
2455 return ATA_SHORT_PAUSE; 2743 return ATA_SHORT_PAUSE;
2456 } 2744 }
2457 2745
2458 ap->pio_task_state = reg_state; 2746 ap->hsm_task_state = reg_state;
2459 return 0; 2747 return 0;
2460} 2748}
2461 2749
2462/** 2750/**
2463 * ata_pio_complete - 2751 * ata_pio_complete - check if drive is busy or idle
2464 * @ap: 2752 * @ap: the target ata_port
2465 * 2753 *
2466 * LOCKING: 2754 * LOCKING:
2467 * None. (executing in kernel thread context) 2755 * None. (executing in kernel thread context)
@@ -2480,14 +2768,14 @@ static int ata_pio_complete (struct ata_port *ap)
2480 * we enter, BSY will be cleared in a chk-status or two. If not, 2768 * we enter, BSY will be cleared in a chk-status or two. If not,
2481 * the drive is probably seeking or something. Snooze for a couple 2769 * the drive is probably seeking or something. Snooze for a couple
2482 * msecs, then chk-status again. If still busy, fall back to 2770 * msecs, then chk-status again. If still busy, fall back to
2483 * PIO_ST_POLL state. 2771 * HSM_ST_POLL state.
2484 */ 2772 */
2485 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); 2773 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2486 if (drv_stat & (ATA_BUSY | ATA_DRQ)) { 2774 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2487 msleep(2); 2775 msleep(2);
2488 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); 2776 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2489 if (drv_stat & (ATA_BUSY | ATA_DRQ)) { 2777 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2490 ap->pio_task_state = PIO_ST_LAST_POLL; 2778 ap->hsm_task_state = HSM_ST_LAST_POLL;
2491 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; 2779 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2492 return 0; 2780 return 0;
2493 } 2781 }
@@ -2495,14 +2783,14 @@ static int ata_pio_complete (struct ata_port *ap)
2495 2783
2496 drv_stat = ata_wait_idle(ap); 2784 drv_stat = ata_wait_idle(ap);
2497 if (!ata_ok(drv_stat)) { 2785 if (!ata_ok(drv_stat)) {
2498 ap->pio_task_state = PIO_ST_ERR; 2786 ap->hsm_task_state = HSM_ST_ERR;
2499 return 0; 2787 return 0;
2500 } 2788 }
2501 2789
2502 qc = ata_qc_from_tag(ap, ap->active_tag); 2790 qc = ata_qc_from_tag(ap, ap->active_tag);
2503 assert(qc != NULL); 2791 assert(qc != NULL);
2504 2792
2505 ap->pio_task_state = PIO_ST_IDLE; 2793 ap->hsm_task_state = HSM_ST_IDLE;
2506 2794
2507 ata_poll_qc_complete(qc, drv_stat); 2795 ata_poll_qc_complete(qc, drv_stat);
2508 2796
@@ -2513,7 +2801,7 @@ static int ata_pio_complete (struct ata_port *ap)
2513 2801
2514 2802
2515/** 2803/**
2516 * swap_buf_le16 - 2804 * swap_buf_le16 - swap halves of 16-words in place
2517 * @buf: Buffer to swap 2805 * @buf: Buffer to swap
2518 * @buf_words: Number of 16-bit words in buffer. 2806 * @buf_words: Number of 16-bit words in buffer.
2519 * 2807 *
@@ -2522,6 +2810,7 @@ static int ata_pio_complete (struct ata_port *ap)
2522 * vice-versa. 2810 * vice-versa.
2523 * 2811 *
2524 * LOCKING: 2812 * LOCKING:
2813 * Inherited from caller.
2525 */ 2814 */
2526void swap_buf_le16(u16 *buf, unsigned int buf_words) 2815void swap_buf_le16(u16 *buf, unsigned int buf_words)
2527{ 2816{
@@ -2544,7 +2833,6 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words)
2544 * 2833 *
2545 * LOCKING: 2834 * LOCKING:
2546 * Inherited from caller. 2835 * Inherited from caller.
2547 *
2548 */ 2836 */
2549 2837
2550static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, 2838static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
@@ -2590,7 +2878,6 @@ static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2590 * 2878 *
2591 * LOCKING: 2879 * LOCKING:
2592 * Inherited from caller. 2880 * Inherited from caller.
2593 *
2594 */ 2881 */
2595 2882
2596static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, 2883static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
@@ -2630,7 +2917,6 @@ static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2630 * 2917 *
2631 * LOCKING: 2918 * LOCKING:
2632 * Inherited from caller. 2919 * Inherited from caller.
2633 *
2634 */ 2920 */
2635 2921
2636static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, 2922static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
@@ -2662,7 +2948,7 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
2662 unsigned char *buf; 2948 unsigned char *buf;
2663 2949
2664 if (qc->cursect == (qc->nsect - 1)) 2950 if (qc->cursect == (qc->nsect - 1))
2665 ap->pio_task_state = PIO_ST_LAST; 2951 ap->hsm_task_state = HSM_ST_LAST;
2666 2952
2667 page = sg[qc->cursg].page; 2953 page = sg[qc->cursg].page;
2668 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; 2954 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
@@ -2712,7 +2998,7 @@ static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2712 unsigned int offset, count; 2998 unsigned int offset, count;
2713 2999
2714 if (qc->curbytes + bytes >= qc->nbytes) 3000 if (qc->curbytes + bytes >= qc->nbytes)
2715 ap->pio_task_state = PIO_ST_LAST; 3001 ap->hsm_task_state = HSM_ST_LAST;
2716 3002
2717next_sg: 3003next_sg:
2718 if (unlikely(qc->cursg >= qc->n_elem)) { 3004 if (unlikely(qc->cursg >= qc->n_elem)) {
@@ -2734,7 +3020,7 @@ next_sg:
2734 for (i = 0; i < words; i++) 3020 for (i = 0; i < words; i++)
2735 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); 3021 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
2736 3022
2737 ap->pio_task_state = PIO_ST_LAST; 3023 ap->hsm_task_state = HSM_ST_LAST;
2738 return; 3024 return;
2739 } 3025 }
2740 3026
@@ -2783,7 +3069,6 @@ next_sg:
2783 * 3069 *
2784 * LOCKING: 3070 * LOCKING:
2785 * Inherited from caller. 3071 * Inherited from caller.
2786 *
2787 */ 3072 */
2788 3073
2789static void atapi_pio_bytes(struct ata_queued_cmd *qc) 3074static void atapi_pio_bytes(struct ata_queued_cmd *qc)
@@ -2815,12 +3100,12 @@ static void atapi_pio_bytes(struct ata_queued_cmd *qc)
2815err_out: 3100err_out:
2816 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", 3101 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
2817 ap->id, dev->devno); 3102 ap->id, dev->devno);
2818 ap->pio_task_state = PIO_ST_ERR; 3103 ap->hsm_task_state = HSM_ST_ERR;
2819} 3104}
2820 3105
2821/** 3106/**
2822 * ata_pio_sector - 3107 * ata_pio_block - start PIO on a block
2823 * @ap: 3108 * @ap: the target ata_port
2824 * 3109 *
2825 * LOCKING: 3110 * LOCKING:
2826 * None. (executing in kernel thread context) 3111 * None. (executing in kernel thread context)
@@ -2832,19 +3117,19 @@ static void ata_pio_block(struct ata_port *ap)
2832 u8 status; 3117 u8 status;
2833 3118
2834 /* 3119 /*
2835 * This is purely hueristic. This is a fast path. 3120 * This is purely heuristic. This is a fast path.
2836 * Sometimes when we enter, BSY will be cleared in 3121 * Sometimes when we enter, BSY will be cleared in
2837 * a chk-status or two. If not, the drive is probably seeking 3122 * a chk-status or two. If not, the drive is probably seeking
2838 * or something. Snooze for a couple msecs, then 3123 * or something. Snooze for a couple msecs, then
2839 * chk-status again. If still busy, fall back to 3124 * chk-status again. If still busy, fall back to
2840 * PIO_ST_POLL state. 3125 * HSM_ST_POLL state.
2841 */ 3126 */
2842 status = ata_busy_wait(ap, ATA_BUSY, 5); 3127 status = ata_busy_wait(ap, ATA_BUSY, 5);
2843 if (status & ATA_BUSY) { 3128 if (status & ATA_BUSY) {
2844 msleep(2); 3129 msleep(2);
2845 status = ata_busy_wait(ap, ATA_BUSY, 10); 3130 status = ata_busy_wait(ap, ATA_BUSY, 10);
2846 if (status & ATA_BUSY) { 3131 if (status & ATA_BUSY) {
2847 ap->pio_task_state = PIO_ST_POLL; 3132 ap->hsm_task_state = HSM_ST_POLL;
2848 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; 3133 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2849 return; 3134 return;
2850 } 3135 }
@@ -2856,7 +3141,7 @@ static void ata_pio_block(struct ata_port *ap)
2856 if (is_atapi_taskfile(&qc->tf)) { 3141 if (is_atapi_taskfile(&qc->tf)) {
2857 /* no more data to transfer or unsupported ATAPI command */ 3142 /* no more data to transfer or unsupported ATAPI command */
2858 if ((status & ATA_DRQ) == 0) { 3143 if ((status & ATA_DRQ) == 0) {
2859 ap->pio_task_state = PIO_ST_LAST; 3144 ap->hsm_task_state = HSM_ST_LAST;
2860 return; 3145 return;
2861 } 3146 }
2862 3147
@@ -2864,7 +3149,7 @@ static void ata_pio_block(struct ata_port *ap)
2864 } else { 3149 } else {
2865 /* handle BSY=0, DRQ=0 as error */ 3150 /* handle BSY=0, DRQ=0 as error */
2866 if ((status & ATA_DRQ) == 0) { 3151 if ((status & ATA_DRQ) == 0) {
2867 ap->pio_task_state = PIO_ST_ERR; 3152 ap->hsm_task_state = HSM_ST_ERR;
2868 return; 3153 return;
2869 } 3154 }
2870 3155
@@ -2884,7 +3169,7 @@ static void ata_pio_error(struct ata_port *ap)
2884 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n", 3169 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
2885 ap->id, drv_stat); 3170 ap->id, drv_stat);
2886 3171
2887 ap->pio_task_state = PIO_ST_IDLE; 3172 ap->hsm_task_state = HSM_ST_IDLE;
2888 3173
2889 ata_poll_qc_complete(qc, drv_stat | ATA_ERR); 3174 ata_poll_qc_complete(qc, drv_stat | ATA_ERR);
2890} 3175}
@@ -2899,25 +3184,25 @@ fsm_start:
2899 timeout = 0; 3184 timeout = 0;
2900 qc_completed = 0; 3185 qc_completed = 0;
2901 3186
2902 switch (ap->pio_task_state) { 3187 switch (ap->hsm_task_state) {
2903 case PIO_ST_IDLE: 3188 case HSM_ST_IDLE:
2904 return; 3189 return;
2905 3190
2906 case PIO_ST: 3191 case HSM_ST:
2907 ata_pio_block(ap); 3192 ata_pio_block(ap);
2908 break; 3193 break;
2909 3194
2910 case PIO_ST_LAST: 3195 case HSM_ST_LAST:
2911 qc_completed = ata_pio_complete(ap); 3196 qc_completed = ata_pio_complete(ap);
2912 break; 3197 break;
2913 3198
2914 case PIO_ST_POLL: 3199 case HSM_ST_POLL:
2915 case PIO_ST_LAST_POLL: 3200 case HSM_ST_LAST_POLL:
2916 timeout = ata_pio_poll(ap); 3201 timeout = ata_pio_poll(ap);
2917 break; 3202 break;
2918 3203
2919 case PIO_ST_TMOUT: 3204 case HSM_ST_TMOUT:
2920 case PIO_ST_ERR: 3205 case HSM_ST_ERR:
2921 ata_pio_error(ap); 3206 ata_pio_error(ap);
2922 return; 3207 return;
2923 } 3208 }
@@ -2928,52 +3213,6 @@ fsm_start:
2928 goto fsm_start; 3213 goto fsm_start;
2929} 3214}
2930 3215
2931static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
2932 struct scsi_cmnd *cmd)
2933{
2934 DECLARE_COMPLETION(wait);
2935 struct ata_queued_cmd *qc;
2936 unsigned long flags;
2937 int rc;
2938
2939 DPRINTK("ATAPI request sense\n");
2940
2941 qc = ata_qc_new_init(ap, dev);
2942 BUG_ON(qc == NULL);
2943
2944 /* FIXME: is this needed? */
2945 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
2946
2947 ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
2948 qc->dma_dir = DMA_FROM_DEVICE;
2949
2950 memset(&qc->cdb, 0, ap->cdb_len);
2951 qc->cdb[0] = REQUEST_SENSE;
2952 qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2953
2954 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2955 qc->tf.command = ATA_CMD_PACKET;
2956
2957 qc->tf.protocol = ATA_PROT_ATAPI;
2958 qc->tf.lbam = (8 * 1024) & 0xff;
2959 qc->tf.lbah = (8 * 1024) >> 8;
2960 qc->nbytes = SCSI_SENSE_BUFFERSIZE;
2961
2962 qc->waiting = &wait;
2963 qc->complete_fn = ata_qc_complete_noop;
2964
2965 spin_lock_irqsave(&ap->host_set->lock, flags);
2966 rc = ata_qc_issue(qc);
2967 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2968
2969 if (rc)
2970 ata_port_disable(ap);
2971 else
2972 wait_for_completion(&wait);
2973
2974 DPRINTK("EXIT\n");
2975}
2976
2977/** 3216/**
2978 * ata_qc_timeout - Handle timeout of queued command 3217 * ata_qc_timeout - Handle timeout of queued command
2979 * @qc: Command that timed out 3218 * @qc: Command that timed out
@@ -3091,14 +3330,14 @@ void ata_eng_timeout(struct ata_port *ap)
3091 DPRINTK("ENTER\n"); 3330 DPRINTK("ENTER\n");
3092 3331
3093 qc = ata_qc_from_tag(ap, ap->active_tag); 3332 qc = ata_qc_from_tag(ap, ap->active_tag);
3094 if (!qc) { 3333 if (qc)
3334 ata_qc_timeout(qc);
3335 else {
3095 printk(KERN_ERR "ata%u: BUG: timeout without command\n", 3336 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3096 ap->id); 3337 ap->id);
3097 goto out; 3338 goto out;
3098 } 3339 }
3099 3340
3100 ata_qc_timeout(qc);
3101
3102out: 3341out:
3103 DPRINTK("EXIT\n"); 3342 DPRINTK("EXIT\n");
3104} 3343}
@@ -3155,15 +3394,12 @@ struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3155 qc->nbytes = qc->curbytes = 0; 3394 qc->nbytes = qc->curbytes = 0;
3156 3395
3157 ata_tf_init(ap, &qc->tf, dev->devno); 3396 ata_tf_init(ap, &qc->tf, dev->devno);
3158
3159 if (dev->flags & ATA_DFLAG_LBA48)
3160 qc->tf.flags |= ATA_TFLAG_LBA48;
3161 } 3397 }
3162 3398
3163 return qc; 3399 return qc;
3164} 3400}
3165 3401
3166static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat) 3402int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
3167{ 3403{
3168 return 0; 3404 return 0;
3169} 3405}
@@ -3201,7 +3437,6 @@ static void __ata_qc_complete(struct ata_queued_cmd *qc)
3201 * 3437 *
3202 * LOCKING: 3438 * LOCKING:
3203 * spin_lock_irqsave(host_set lock) 3439 * spin_lock_irqsave(host_set lock)
3204 *
3205 */ 3440 */
3206void ata_qc_free(struct ata_queued_cmd *qc) 3441void ata_qc_free(struct ata_queued_cmd *qc)
3207{ 3442{
@@ -3221,7 +3456,6 @@ void ata_qc_free(struct ata_queued_cmd *qc)
3221 * 3456 *
3222 * LOCKING: 3457 * LOCKING:
3223 * spin_lock_irqsave(host_set lock) 3458 * spin_lock_irqsave(host_set lock)
3224 *
3225 */ 3459 */
3226 3460
3227void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) 3461void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
@@ -3360,7 +3594,7 @@ int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3360 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */ 3594 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3361 ata_qc_set_polling(qc); 3595 ata_qc_set_polling(qc);
3362 ata_tf_to_host_nolock(ap, &qc->tf); 3596 ata_tf_to_host_nolock(ap, &qc->tf);
3363 ap->pio_task_state = PIO_ST; 3597 ap->hsm_task_state = HSM_ST;
3364 queue_work(ata_wq, &ap->pio_task); 3598 queue_work(ata_wq, &ap->pio_task);
3365 break; 3599 break;
3366 3600
@@ -3586,7 +3820,7 @@ u8 ata_bmdma_status(struct ata_port *ap)
3586 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; 3820 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3587 host_stat = readb(mmio + ATA_DMA_STATUS); 3821 host_stat = readb(mmio + ATA_DMA_STATUS);
3588 } else 3822 } else
3589 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 3823 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3590 return host_stat; 3824 return host_stat;
3591} 3825}
3592 3826
@@ -3715,7 +3949,6 @@ idle_irq:
3715 * 3949 *
3716 * RETURNS: 3950 * RETURNS:
3717 * IRQ_NONE or IRQ_HANDLED. 3951 * IRQ_NONE or IRQ_HANDLED.
3718 *
3719 */ 3952 */
3720 3953
3721irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) 3954irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
@@ -3806,7 +4039,7 @@ static void atapi_packet_task(void *_data)
3806 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); 4039 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3807 4040
3808 /* PIO commands are handled by polling */ 4041 /* PIO commands are handled by polling */
3809 ap->pio_task_state = PIO_ST; 4042 ap->hsm_task_state = HSM_ST;
3810 queue_work(ata_wq, &ap->pio_task); 4043 queue_work(ata_wq, &ap->pio_task);
3811 } 4044 }
3812 4045
@@ -3827,6 +4060,7 @@ err_out:
3827 * May be used as the port_start() entry in ata_port_operations. 4060 * May be used as the port_start() entry in ata_port_operations.
3828 * 4061 *
3829 * LOCKING: 4062 * LOCKING:
4063 * Inherited from caller.
3830 */ 4064 */
3831 4065
3832int ata_port_start (struct ata_port *ap) 4066int ata_port_start (struct ata_port *ap)
@@ -3852,6 +4086,7 @@ int ata_port_start (struct ata_port *ap)
3852 * May be used as the port_stop() entry in ata_port_operations. 4086 * May be used as the port_stop() entry in ata_port_operations.
3853 * 4087 *
3854 * LOCKING: 4088 * LOCKING:
4089 * Inherited from caller.
3855 */ 4090 */
3856 4091
3857void ata_port_stop (struct ata_port *ap) 4092void ata_port_stop (struct ata_port *ap)
@@ -3874,6 +4109,7 @@ void ata_host_stop (struct ata_host_set *host_set)
3874 * @do_unregister: 1 if we fully unregister, 0 to just stop the port 4109 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
3875 * 4110 *
3876 * LOCKING: 4111 * LOCKING:
4112 * Inherited from caller.
3877 */ 4113 */
3878 4114
3879static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) 4115static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
@@ -3901,12 +4137,11 @@ static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
3901 * 4137 *
3902 * LOCKING: 4138 * LOCKING:
3903 * Inherited from caller. 4139 * Inherited from caller.
3904 *
3905 */ 4140 */
3906 4141
3907static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, 4142static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
3908 struct ata_host_set *host_set, 4143 struct ata_host_set *host_set,
3909 struct ata_probe_ent *ent, unsigned int port_no) 4144 const struct ata_probe_ent *ent, unsigned int port_no)
3910{ 4145{
3911 unsigned int i; 4146 unsigned int i;
3912 4147
@@ -3962,10 +4197,9 @@ static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
3962 * 4197 *
3963 * RETURNS: 4198 * RETURNS:
3964 * New ata_port on success, for NULL on error. 4199 * New ata_port on success, for NULL on error.
3965 *
3966 */ 4200 */
3967 4201
3968static struct ata_port * ata_host_add(struct ata_probe_ent *ent, 4202static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
3969 struct ata_host_set *host_set, 4203 struct ata_host_set *host_set,
3970 unsigned int port_no) 4204 unsigned int port_no)
3971{ 4205{
@@ -4010,10 +4244,9 @@ err_out:
4010 * 4244 *
4011 * RETURNS: 4245 * RETURNS:
4012 * Number of ports registered. Zero on error (no ports registered). 4246 * Number of ports registered. Zero on error (no ports registered).
4013 *
4014 */ 4247 */
4015 4248
4016int ata_device_add(struct ata_probe_ent *ent) 4249int ata_device_add(const struct ata_probe_ent *ent)
4017{ 4250{
4018 unsigned int count = 0, i; 4251 unsigned int count = 0, i;
4019 struct device *dev = ent->dev; 4252 struct device *dev = ent->dev;
@@ -4113,7 +4346,7 @@ int ata_device_add(struct ata_probe_ent *ent)
4113 for (i = 0; i < count; i++) { 4346 for (i = 0; i < count; i++) {
4114 struct ata_port *ap = host_set->ports[i]; 4347 struct ata_port *ap = host_set->ports[i];
4115 4348
4116 scsi_scan_host(ap->host); 4349 ata_scsi_scan_host(ap);
4117 } 4350 }
4118 4351
4119 dev_set_drvdata(dev, host_set); 4352 dev_set_drvdata(dev, host_set);
@@ -4132,6 +4365,52 @@ err_out:
4132} 4365}
4133 4366
4134/** 4367/**
4368 * ata_host_set_remove - PCI layer callback for device removal
4369 * @host_set: ATA host set that was removed
4370 *
4371 * Unregister all objects associated with this host set. Free those
4372 * objects.
4373 *
4374 * LOCKING:
4375 * Inherited from calling layer (may sleep).
4376 */
4377
4378void ata_host_set_remove(struct ata_host_set *host_set)
4379{
4380 struct ata_port *ap;
4381 unsigned int i;
4382
4383 for (i = 0; i < host_set->n_ports; i++) {
4384 ap = host_set->ports[i];
4385 scsi_remove_host(ap->host);
4386 }
4387
4388 free_irq(host_set->irq, host_set);
4389
4390 for (i = 0; i < host_set->n_ports; i++) {
4391 ap = host_set->ports[i];
4392
4393 ata_scsi_release(ap->host);
4394
4395 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4396 struct ata_ioports *ioaddr = &ap->ioaddr;
4397
4398 if (ioaddr->cmd_addr == 0x1f0)
4399 release_region(0x1f0, 8);
4400 else if (ioaddr->cmd_addr == 0x170)
4401 release_region(0x170, 8);
4402 }
4403
4404 scsi_host_put(ap->host);
4405 }
4406
4407 if (host_set->ops->host_stop)
4408 host_set->ops->host_stop(host_set);
4409
4410 kfree(host_set);
4411}
4412
4413/**
4135 * ata_scsi_release - SCSI layer callback hook for host unload 4414 * ata_scsi_release - SCSI layer callback hook for host unload
4136 * @host: libata host to be unloaded 4415 * @host: libata host to be unloaded
4137 * 4416 *
@@ -4185,7 +4464,7 @@ void ata_std_ports(struct ata_ioports *ioaddr)
4185} 4464}
4186 4465
4187static struct ata_probe_ent * 4466static struct ata_probe_ent *
4188ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port) 4467ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4189{ 4468{
4190 struct ata_probe_ent *probe_ent; 4469 struct ata_probe_ent *probe_ent;
4191 4470
@@ -4226,85 +4505,86 @@ void ata_pci_host_stop (struct ata_host_set *host_set)
4226 * ata_pci_init_native_mode - Initialize native-mode driver 4505 * ata_pci_init_native_mode - Initialize native-mode driver
4227 * @pdev: pci device to be initialized 4506 * @pdev: pci device to be initialized
4228 * @port: array[2] of pointers to port info structures. 4507 * @port: array[2] of pointers to port info structures.
4508 * @ports: bitmap of ports present
4229 * 4509 *
4230 * Utility function which allocates and initializes an 4510 * Utility function which allocates and initializes an
4231 * ata_probe_ent structure for a standard dual-port 4511 * ata_probe_ent structure for a standard dual-port
4232 * PIO-based IDE controller. The returned ata_probe_ent 4512 * PIO-based IDE controller. The returned ata_probe_ent
4233 * structure can be passed to ata_device_add(). The returned 4513 * structure can be passed to ata_device_add(). The returned
4234 * ata_probe_ent structure should then be freed with kfree(). 4514 * ata_probe_ent structure should then be freed with kfree().
4515 *
4516 * The caller need only pass the address of the primary port, the
4517 * secondary will be deduced automatically. If the device has non
4518 * standard secondary port mappings this function can be called twice,
4519 * once for each interface.
4235 */ 4520 */
4236 4521
4237struct ata_probe_ent * 4522struct ata_probe_ent *
4238ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port) 4523ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4239{ 4524{
4240 struct ata_probe_ent *probe_ent = 4525 struct ata_probe_ent *probe_ent =
4241 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); 4526 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4527 int p = 0;
4528
4242 if (!probe_ent) 4529 if (!probe_ent)
4243 return NULL; 4530 return NULL;
4244 4531
4245 probe_ent->n_ports = 2;
4246 probe_ent->irq = pdev->irq; 4532 probe_ent->irq = pdev->irq;
4247 probe_ent->irq_flags = SA_SHIRQ; 4533 probe_ent->irq_flags = SA_SHIRQ;
4248 4534
4249 probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0); 4535 if (ports & ATA_PORT_PRIMARY) {
4250 probe_ent->port[0].altstatus_addr = 4536 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4251 probe_ent->port[0].ctl_addr = 4537 probe_ent->port[p].altstatus_addr =
4252 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; 4538 probe_ent->port[p].ctl_addr =
4253 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4); 4539 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4254 4540 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4255 probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2); 4541 ata_std_ports(&probe_ent->port[p]);
4256 probe_ent->port[1].altstatus_addr = 4542 p++;
4257 probe_ent->port[1].ctl_addr = 4543 }
4258 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4259 probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4260 4544
4261 ata_std_ports(&probe_ent->port[0]); 4545 if (ports & ATA_PORT_SECONDARY) {
4262 ata_std_ports(&probe_ent->port[1]); 4546 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4547 probe_ent->port[p].altstatus_addr =
4548 probe_ent->port[p].ctl_addr =
4549 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4550 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4551 ata_std_ports(&probe_ent->port[p]);
4552 p++;
4553 }
4263 4554
4555 probe_ent->n_ports = p;
4264 return probe_ent; 4556 return probe_ent;
4265} 4557}
4266 4558
4267static struct ata_probe_ent * 4559static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info **port, int port_num)
4268ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port,
4269 struct ata_probe_ent **ppe2)
4270{ 4560{
4271 struct ata_probe_ent *probe_ent, *probe_ent2; 4561 struct ata_probe_ent *probe_ent;
4272 4562
4273 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); 4563 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4274 if (!probe_ent) 4564 if (!probe_ent)
4275 return NULL; 4565 return NULL;
4276 probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]);
4277 if (!probe_ent2) {
4278 kfree(probe_ent);
4279 return NULL;
4280 }
4281 4566
4282 probe_ent->n_ports = 1;
4283 probe_ent->irq = 14;
4284
4285 probe_ent->hard_port_no = 0;
4286 probe_ent->legacy_mode = 1; 4567 probe_ent->legacy_mode = 1;
4287 4568 probe_ent->n_ports = 1;
4288 probe_ent2->n_ports = 1; 4569 probe_ent->hard_port_no = port_num;
4289 probe_ent2->irq = 15; 4570
4290 4571 switch(port_num)
4291 probe_ent2->hard_port_no = 1; 4572 {
4292 probe_ent2->legacy_mode = 1; 4573 case 0:
4293 4574 probe_ent->irq = 14;
4294 probe_ent->port[0].cmd_addr = 0x1f0; 4575 probe_ent->port[0].cmd_addr = 0x1f0;
4295 probe_ent->port[0].altstatus_addr = 4576 probe_ent->port[0].altstatus_addr =
4296 probe_ent->port[0].ctl_addr = 0x3f6; 4577 probe_ent->port[0].ctl_addr = 0x3f6;
4297 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4); 4578 break;
4298 4579 case 1:
4299 probe_ent2->port[0].cmd_addr = 0x170; 4580 probe_ent->irq = 15;
4300 probe_ent2->port[0].altstatus_addr = 4581 probe_ent->port[0].cmd_addr = 0x170;
4301 probe_ent2->port[0].ctl_addr = 0x376; 4582 probe_ent->port[0].altstatus_addr =
4302 probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8; 4583 probe_ent->port[0].ctl_addr = 0x376;
4303 4584 break;
4585 }
4586 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4304 ata_std_ports(&probe_ent->port[0]); 4587 ata_std_ports(&probe_ent->port[0]);
4305 ata_std_ports(&probe_ent2->port[0]);
4306
4307 *ppe2 = probe_ent2;
4308 return probe_ent; 4588 return probe_ent;
4309} 4589}
4310 4590
@@ -4327,13 +4607,12 @@ ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port,
4327 * 4607 *
4328 * RETURNS: 4608 * RETURNS:
4329 * Zero on success, negative on errno-based value on error. 4609 * Zero on success, negative on errno-based value on error.
4330 *
4331 */ 4610 */
4332 4611
4333int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, 4612int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4334 unsigned int n_ports) 4613 unsigned int n_ports)
4335{ 4614{
4336 struct ata_probe_ent *probe_ent, *probe_ent2 = NULL; 4615 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4337 struct ata_port_info *port[2]; 4616 struct ata_port_info *port[2];
4338 u8 tmp8, mask; 4617 u8 tmp8, mask;
4339 unsigned int legacy_mode = 0; 4618 unsigned int legacy_mode = 0;
@@ -4350,7 +4629,7 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4350 4629
4351 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 4630 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4352 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { 4631 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4353 /* TODO: support transitioning to native mode? */ 4632 /* TODO: What if one channel is in native mode ... */
4354 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); 4633 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4355 mask = (1 << 2) | (1 << 0); 4634 mask = (1 << 2) | (1 << 0);
4356 if ((tmp8 & mask) != mask) 4635 if ((tmp8 & mask) != mask)
@@ -4358,11 +4637,20 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4358 } 4637 }
4359 4638
4360 /* FIXME... */ 4639 /* FIXME... */
4361 if ((!legacy_mode) && (n_ports > 1)) { 4640 if ((!legacy_mode) && (n_ports > 2)) {
4362 printk(KERN_ERR "ata: BUG: native mode, n_ports > 1\n"); 4641 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4363 return -EINVAL; 4642 n_ports = 2;
4643 /* For now */
4364 } 4644 }
4365 4645
4646 /* FIXME: Really for ATA it isn't safe because the device may be
4647 multi-purpose and we want to leave it alone if it was already
4648 enabled. Secondly for shared use as Arjan says we want refcounting
4649
4650 Checking dev->is_enabled is insufficient as this is not set at
4651 boot for the primary video which is BIOS enabled
4652 */
4653
4366 rc = pci_enable_device(pdev); 4654 rc = pci_enable_device(pdev);
4367 if (rc) 4655 if (rc)
4368 return rc; 4656 return rc;
@@ -4373,6 +4661,7 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4373 goto err_out; 4661 goto err_out;
4374 } 4662 }
4375 4663
4664 /* FIXME: Should use platform specific mappers for legacy port ranges */
4376 if (legacy_mode) { 4665 if (legacy_mode) {
4377 if (!request_region(0x1f0, 8, "libata")) { 4666 if (!request_region(0x1f0, 8, "libata")) {
4378 struct resource *conflict, res; 4667 struct resource *conflict, res;
@@ -4417,10 +4706,17 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4417 goto err_out_regions; 4706 goto err_out_regions;
4418 4707
4419 if (legacy_mode) { 4708 if (legacy_mode) {
4420 probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2); 4709 if (legacy_mode & (1 << 0))
4421 } else 4710 probe_ent = ata_pci_init_legacy_port(pdev, port, 0);
4422 probe_ent = ata_pci_init_native_mode(pdev, port); 4711 if (legacy_mode & (1 << 1))
4423 if (!probe_ent) { 4712 probe_ent2 = ata_pci_init_legacy_port(pdev, port, 1);
4713 } else {
4714 if (n_ports == 2)
4715 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4716 else
4717 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4718 }
4719 if (!probe_ent && !probe_ent2) {
4424 rc = -ENOMEM; 4720 rc = -ENOMEM;
4425 goto err_out_regions; 4721 goto err_out_regions;
4426 } 4722 }
@@ -4458,7 +4754,7 @@ err_out:
4458 * @pdev: PCI device that was removed 4754 * @pdev: PCI device that was removed
4459 * 4755 *
4460 * PCI layer indicates to libata via this hook that 4756 * PCI layer indicates to libata via this hook that
4461 * hot-unplug or module unload event has occured. 4757 * hot-unplug or module unload event has occurred.
4462 * Handle this by unregistering all objects associated 4758 * Handle this by unregistering all objects associated
4463 * with this PCI device. Free those objects. Then finally 4759 * with this PCI device. Free those objects. Then finally
4464 * release PCI resources and disable device. 4760 * release PCI resources and disable device.
@@ -4471,46 +4767,15 @@ void ata_pci_remove_one (struct pci_dev *pdev)
4471{ 4767{
4472 struct device *dev = pci_dev_to_dev(pdev); 4768 struct device *dev = pci_dev_to_dev(pdev);
4473 struct ata_host_set *host_set = dev_get_drvdata(dev); 4769 struct ata_host_set *host_set = dev_get_drvdata(dev);
4474 struct ata_port *ap;
4475 unsigned int i;
4476
4477 for (i = 0; i < host_set->n_ports; i++) {
4478 ap = host_set->ports[i];
4479
4480 scsi_remove_host(ap->host);
4481 }
4482
4483 free_irq(host_set->irq, host_set);
4484
4485 for (i = 0; i < host_set->n_ports; i++) {
4486 ap = host_set->ports[i];
4487
4488 ata_scsi_release(ap->host);
4489
4490 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4491 struct ata_ioports *ioaddr = &ap->ioaddr;
4492
4493 if (ioaddr->cmd_addr == 0x1f0)
4494 release_region(0x1f0, 8);
4495 else if (ioaddr->cmd_addr == 0x170)
4496 release_region(0x170, 8);
4497 }
4498
4499 scsi_host_put(ap->host);
4500 }
4501
4502 if (host_set->ops->host_stop)
4503 host_set->ops->host_stop(host_set);
4504
4505 kfree(host_set);
4506 4770
4771 ata_host_set_remove(host_set);
4507 pci_release_regions(pdev); 4772 pci_release_regions(pdev);
4508 pci_disable_device(pdev); 4773 pci_disable_device(pdev);
4509 dev_set_drvdata(dev, NULL); 4774 dev_set_drvdata(dev, NULL);
4510} 4775}
4511 4776
4512/* move to PCI subsystem */ 4777/* move to PCI subsystem */
4513int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits) 4778int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4514{ 4779{
4515 unsigned long tmp = 0; 4780 unsigned long tmp = 0;
4516 4781
@@ -4563,6 +4828,27 @@ static void __exit ata_exit(void)
4563module_init(ata_init); 4828module_init(ata_init);
4564module_exit(ata_exit); 4829module_exit(ata_exit);
4565 4830
4831static unsigned long ratelimit_time;
4832static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4833
4834int ata_ratelimit(void)
4835{
4836 int rc;
4837 unsigned long flags;
4838
4839 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4840
4841 if (time_after(jiffies, ratelimit_time)) {
4842 rc = 1;
4843 ratelimit_time = jiffies + (HZ/5);
4844 } else
4845 rc = 0;
4846
4847 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4848
4849 return rc;
4850}
4851
4566/* 4852/*
4567 * libata is essentially a library of internal helper functions for 4853 * libata is essentially a library of internal helper functions for
4568 * low-level ATA host controller drivers. As such, the API/ABI is 4854 * low-level ATA host controller drivers. As such, the API/ABI is
@@ -4573,6 +4859,7 @@ module_exit(ata_exit);
4573EXPORT_SYMBOL_GPL(ata_std_bios_param); 4859EXPORT_SYMBOL_GPL(ata_std_bios_param);
4574EXPORT_SYMBOL_GPL(ata_std_ports); 4860EXPORT_SYMBOL_GPL(ata_std_ports);
4575EXPORT_SYMBOL_GPL(ata_device_add); 4861EXPORT_SYMBOL_GPL(ata_device_add);
4862EXPORT_SYMBOL_GPL(ata_host_set_remove);
4576EXPORT_SYMBOL_GPL(ata_sg_init); 4863EXPORT_SYMBOL_GPL(ata_sg_init);
4577EXPORT_SYMBOL_GPL(ata_sg_init_one); 4864EXPORT_SYMBOL_GPL(ata_sg_init_one);
4578EXPORT_SYMBOL_GPL(ata_qc_complete); 4865EXPORT_SYMBOL_GPL(ata_qc_complete);
@@ -4603,6 +4890,7 @@ EXPORT_SYMBOL_GPL(sata_phy_reset);
4603EXPORT_SYMBOL_GPL(__sata_phy_reset); 4890EXPORT_SYMBOL_GPL(__sata_phy_reset);
4604EXPORT_SYMBOL_GPL(ata_bus_reset); 4891EXPORT_SYMBOL_GPL(ata_bus_reset);
4605EXPORT_SYMBOL_GPL(ata_port_disable); 4892EXPORT_SYMBOL_GPL(ata_port_disable);
4893EXPORT_SYMBOL_GPL(ata_ratelimit);
4606EXPORT_SYMBOL_GPL(ata_scsi_ioctl); 4894EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4607EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); 4895EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4608EXPORT_SYMBOL_GPL(ata_scsi_error); 4896EXPORT_SYMBOL_GPL(ata_scsi_error);
@@ -4614,6 +4902,9 @@ EXPORT_SYMBOL_GPL(ata_dev_id_string);
4614EXPORT_SYMBOL_GPL(ata_dev_config); 4902EXPORT_SYMBOL_GPL(ata_dev_config);
4615EXPORT_SYMBOL_GPL(ata_scsi_simulate); 4903EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4616 4904
4905EXPORT_SYMBOL_GPL(ata_timing_compute);
4906EXPORT_SYMBOL_GPL(ata_timing_merge);
4907
4617#ifdef CONFIG_PCI 4908#ifdef CONFIG_PCI
4618EXPORT_SYMBOL_GPL(pci_test_config_bits); 4909EXPORT_SYMBOL_GPL(pci_test_config_bits);
4619EXPORT_SYMBOL_GPL(ata_pci_host_stop); 4910EXPORT_SYMBOL_GPL(ata_pci_host_stop);
diff --git a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c
index 104fd9a63e73..58858886d751 100644
--- a/drivers/scsi/libata-scsi.c
+++ b/drivers/scsi/libata-scsi.c
@@ -44,11 +44,19 @@
44 44
45#include "libata.h" 45#include "libata.h"
46 46
47typedef unsigned int (*ata_xlat_func_t)(struct ata_queued_cmd *qc, u8 *scsicmd); 47typedef unsigned int (*ata_xlat_func_t)(struct ata_queued_cmd *qc, const u8 *scsicmd);
48static struct ata_device * 48static struct ata_device *
49ata_scsi_find_dev(struct ata_port *ap, struct scsi_device *scsidev); 49ata_scsi_find_dev(struct ata_port *ap, const struct scsi_device *scsidev);
50 50
51 51
52static void ata_scsi_invalid_field(struct scsi_cmnd *cmd,
53 void (*done)(struct scsi_cmnd *))
54{
55 ata_scsi_set_sense(cmd, ILLEGAL_REQUEST, 0x24, 0x0);
56 /* "Invalid field in cbd" */
57 done(cmd);
58}
59
52/** 60/**
53 * ata_std_bios_param - generic bios head/sector/cylinder calculator used by sd. 61 * ata_std_bios_param - generic bios head/sector/cylinder calculator used by sd.
54 * @sdev: SCSI device for which BIOS geometry is to be determined 62 * @sdev: SCSI device for which BIOS geometry is to be determined
@@ -182,7 +190,6 @@ void ata_to_sense_error(struct ata_queued_cmd *qc, u8 drv_stat)
182{ 190{
183 struct scsi_cmnd *cmd = qc->scsicmd; 191 struct scsi_cmnd *cmd = qc->scsicmd;
184 u8 err = 0; 192 u8 err = 0;
185 unsigned char *sb = cmd->sense_buffer;
186 /* Based on the 3ware driver translation table */ 193 /* Based on the 3ware driver translation table */
187 static unsigned char sense_table[][4] = { 194 static unsigned char sense_table[][4] = {
188 /* BBD|ECC|ID|MAR */ 195 /* BBD|ECC|ID|MAR */
@@ -225,8 +232,6 @@ void ata_to_sense_error(struct ata_queued_cmd *qc, u8 drv_stat)
225 }; 232 };
226 int i = 0; 233 int i = 0;
227 234
228 cmd->result = SAM_STAT_CHECK_CONDITION;
229
230 /* 235 /*
231 * Is this an error we can process/parse 236 * Is this an error we can process/parse
232 */ 237 */
@@ -281,11 +286,9 @@ void ata_to_sense_error(struct ata_queued_cmd *qc, u8 drv_stat)
281 /* Look for best matches first */ 286 /* Look for best matches first */
282 if((sense_table[i][0] & err) == sense_table[i][0]) 287 if((sense_table[i][0] & err) == sense_table[i][0])
283 { 288 {
284 sb[0] = 0x70; 289 ata_scsi_set_sense(cmd, sense_table[i][1] /* sk */,
285 sb[2] = sense_table[i][1]; 290 sense_table[i][2] /* asc */,
286 sb[7] = 0x0a; 291 sense_table[i][3] /* ascq */ );
287 sb[12] = sense_table[i][2];
288 sb[13] = sense_table[i][3];
289 return; 292 return;
290 } 293 }
291 i++; 294 i++;
@@ -300,11 +303,9 @@ void ata_to_sense_error(struct ata_queued_cmd *qc, u8 drv_stat)
300 { 303 {
301 if(stat_table[i][0] & drv_stat) 304 if(stat_table[i][0] & drv_stat)
302 { 305 {
303 sb[0] = 0x70; 306 ata_scsi_set_sense(cmd, sense_table[i][1] /* sk */,
304 sb[2] = stat_table[i][1]; 307 sense_table[i][2] /* asc */,
305 sb[7] = 0x0a; 308 sense_table[i][3] /* ascq */ );
306 sb[12] = stat_table[i][2];
307 sb[13] = stat_table[i][3];
308 return; 309 return;
309 } 310 }
310 i++; 311 i++;
@@ -313,15 +314,12 @@ void ata_to_sense_error(struct ata_queued_cmd *qc, u8 drv_stat)
313 printk(KERN_ERR "ata%u: called with no error (%02X)!\n", qc->ap->id, drv_stat); 314 printk(KERN_ERR "ata%u: called with no error (%02X)!\n", qc->ap->id, drv_stat);
314 /* additional-sense-code[-qualifier] */ 315 /* additional-sense-code[-qualifier] */
315 316
316 sb[0] = 0x70;
317 sb[2] = MEDIUM_ERROR;
318 sb[7] = 0x0A;
319 if (cmd->sc_data_direction == DMA_FROM_DEVICE) { 317 if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
320 sb[12] = 0x11; /* "unrecovered read error" */ 318 ata_scsi_set_sense(cmd, MEDIUM_ERROR, 0x11, 0x4);
321 sb[13] = 0x04; 319 /* "unrecovered read error" */
322 } else { 320 } else {
323 sb[12] = 0x0C; /* "write error - */ 321 ata_scsi_set_sense(cmd, MEDIUM_ERROR, 0xc, 0x2);
324 sb[13] = 0x02; /* auto-reallocation failed" */ 322 /* "write error - auto-reallocation failed" */
325 } 323 }
326} 324}
327 325
@@ -420,7 +418,7 @@ int ata_scsi_error(struct Scsi_Host *host)
420 */ 418 */
421 419
422static unsigned int ata_scsi_start_stop_xlat(struct ata_queued_cmd *qc, 420static unsigned int ata_scsi_start_stop_xlat(struct ata_queued_cmd *qc,
423 u8 *scsicmd) 421 const u8 *scsicmd)
424{ 422{
425 struct ata_taskfile *tf = &qc->tf; 423 struct ata_taskfile *tf = &qc->tf;
426 424
@@ -430,15 +428,26 @@ static unsigned int ata_scsi_start_stop_xlat(struct ata_queued_cmd *qc,
430 ; /* ignore IMMED bit, violates sat-r05 */ 428 ; /* ignore IMMED bit, violates sat-r05 */
431 } 429 }
432 if (scsicmd[4] & 0x2) 430 if (scsicmd[4] & 0x2)
433 return 1; /* LOEJ bit set not supported */ 431 goto invalid_fld; /* LOEJ bit set not supported */
434 if (((scsicmd[4] >> 4) & 0xf) != 0) 432 if (((scsicmd[4] >> 4) & 0xf) != 0)
435 return 1; /* power conditions not supported */ 433 goto invalid_fld; /* power conditions not supported */
436 if (scsicmd[4] & 0x1) { 434 if (scsicmd[4] & 0x1) {
437 tf->nsect = 1; /* 1 sector, lba=0 */ 435 tf->nsect = 1; /* 1 sector, lba=0 */
438 tf->lbah = 0x0; 436
439 tf->lbam = 0x0; 437 if (qc->dev->flags & ATA_DFLAG_LBA) {
440 tf->lbal = 0x0; 438 qc->tf.flags |= ATA_TFLAG_LBA;
441 tf->device |= ATA_LBA; 439
440 tf->lbah = 0x0;
441 tf->lbam = 0x0;
442 tf->lbal = 0x0;
443 tf->device |= ATA_LBA;
444 } else {
445 /* CHS */
446 tf->lbal = 0x1; /* sect */
447 tf->lbam = 0x0; /* cyl low */
448 tf->lbah = 0x0; /* cyl high */
449 }
450
442 tf->command = ATA_CMD_VERIFY; /* READ VERIFY */ 451 tf->command = ATA_CMD_VERIFY; /* READ VERIFY */
443 } else { 452 } else {
444 tf->nsect = 0; /* time period value (0 implies now) */ 453 tf->nsect = 0; /* time period value (0 implies now) */
@@ -453,6 +462,11 @@ static unsigned int ata_scsi_start_stop_xlat(struct ata_queued_cmd *qc,
453 */ 462 */
454 463
455 return 0; 464 return 0;
465
466invalid_fld:
467 ata_scsi_set_sense(qc->scsicmd, ILLEGAL_REQUEST, 0x24, 0x0);
468 /* "Invalid field in cbd" */
469 return 1;
456} 470}
457 471
458 472
@@ -471,14 +485,14 @@ static unsigned int ata_scsi_start_stop_xlat(struct ata_queued_cmd *qc,
471 * Zero on success, non-zero on error. 485 * Zero on success, non-zero on error.
472 */ 486 */
473 487
474static unsigned int ata_scsi_flush_xlat(struct ata_queued_cmd *qc, u8 *scsicmd) 488static unsigned int ata_scsi_flush_xlat(struct ata_queued_cmd *qc, const u8 *scsicmd)
475{ 489{
476 struct ata_taskfile *tf = &qc->tf; 490 struct ata_taskfile *tf = &qc->tf;
477 491
478 tf->flags |= ATA_TFLAG_DEVICE; 492 tf->flags |= ATA_TFLAG_DEVICE;
479 tf->protocol = ATA_PROT_NODATA; 493 tf->protocol = ATA_PROT_NODATA;
480 494
481 if ((tf->flags & ATA_TFLAG_LBA48) && 495 if ((qc->dev->flags & ATA_DFLAG_LBA48) &&
482 (ata_id_has_flush_ext(qc->dev->id))) 496 (ata_id_has_flush_ext(qc->dev->id)))
483 tf->command = ATA_CMD_FLUSH_EXT; 497 tf->command = ATA_CMD_FLUSH_EXT;
484 else 498 else
@@ -488,6 +502,99 @@ static unsigned int ata_scsi_flush_xlat(struct ata_queued_cmd *qc, u8 *scsicmd)
488} 502}
489 503
490/** 504/**
505 * scsi_6_lba_len - Get LBA and transfer length
506 * @scsicmd: SCSI command to translate
507 *
508 * Calculate LBA and transfer length for 6-byte commands.
509 *
510 * RETURNS:
511 * @plba: the LBA
512 * @plen: the transfer length
513 */
514
515static void scsi_6_lba_len(const u8 *scsicmd, u64 *plba, u32 *plen)
516{
517 u64 lba = 0;
518 u32 len = 0;
519
520 VPRINTK("six-byte command\n");
521
522 lba |= ((u64)scsicmd[2]) << 8;
523 lba |= ((u64)scsicmd[3]);
524
525 len |= ((u32)scsicmd[4]);
526
527 *plba = lba;
528 *plen = len;
529}
530
531/**
532 * scsi_10_lba_len - Get LBA and transfer length
533 * @scsicmd: SCSI command to translate
534 *
535 * Calculate LBA and transfer length for 10-byte commands.
536 *
537 * RETURNS:
538 * @plba: the LBA
539 * @plen: the transfer length
540 */
541
542static void scsi_10_lba_len(const u8 *scsicmd, u64 *plba, u32 *plen)
543{
544 u64 lba = 0;
545 u32 len = 0;
546
547 VPRINTK("ten-byte command\n");
548
549 lba |= ((u64)scsicmd[2]) << 24;
550 lba |= ((u64)scsicmd[3]) << 16;
551 lba |= ((u64)scsicmd[4]) << 8;
552 lba |= ((u64)scsicmd[5]);
553
554 len |= ((u32)scsicmd[7]) << 8;
555 len |= ((u32)scsicmd[8]);
556
557 *plba = lba;
558 *plen = len;
559}
560
561/**
562 * scsi_16_lba_len - Get LBA and transfer length
563 * @scsicmd: SCSI command to translate
564 *
565 * Calculate LBA and transfer length for 16-byte commands.
566 *
567 * RETURNS:
568 * @plba: the LBA
569 * @plen: the transfer length
570 */
571
572static void scsi_16_lba_len(const u8 *scsicmd, u64 *plba, u32 *plen)
573{
574 u64 lba = 0;
575 u32 len = 0;
576
577 VPRINTK("sixteen-byte command\n");
578
579 lba |= ((u64)scsicmd[2]) << 56;
580 lba |= ((u64)scsicmd[3]) << 48;
581 lba |= ((u64)scsicmd[4]) << 40;
582 lba |= ((u64)scsicmd[5]) << 32;
583 lba |= ((u64)scsicmd[6]) << 24;
584 lba |= ((u64)scsicmd[7]) << 16;
585 lba |= ((u64)scsicmd[8]) << 8;
586 lba |= ((u64)scsicmd[9]);
587
588 len |= ((u32)scsicmd[10]) << 24;
589 len |= ((u32)scsicmd[11]) << 16;
590 len |= ((u32)scsicmd[12]) << 8;
591 len |= ((u32)scsicmd[13]);
592
593 *plba = lba;
594 *plen = len;
595}
596
597/**
491 * ata_scsi_verify_xlat - Translate SCSI VERIFY command into an ATA one 598 * ata_scsi_verify_xlat - Translate SCSI VERIFY command into an ATA one
492 * @qc: Storage for translated ATA taskfile 599 * @qc: Storage for translated ATA taskfile
493 * @scsicmd: SCSI command to translate 600 * @scsicmd: SCSI command to translate
@@ -501,82 +608,110 @@ static unsigned int ata_scsi_flush_xlat(struct ata_queued_cmd *qc, u8 *scsicmd)
501 * Zero on success, non-zero on error. 608 * Zero on success, non-zero on error.
502 */ 609 */
503 610
504static unsigned int ata_scsi_verify_xlat(struct ata_queued_cmd *qc, u8 *scsicmd) 611static unsigned int ata_scsi_verify_xlat(struct ata_queued_cmd *qc, const u8 *scsicmd)
505{ 612{
506 struct ata_taskfile *tf = &qc->tf; 613 struct ata_taskfile *tf = &qc->tf;
507 unsigned int lba48 = tf->flags & ATA_TFLAG_LBA48; 614 struct ata_device *dev = qc->dev;
508 u64 dev_sectors = qc->dev->n_sectors; 615 u64 dev_sectors = qc->dev->n_sectors;
509 u64 sect = 0; 616 u64 block;
510 u32 n_sect = 0; 617 u32 n_block;
511 618
512 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 619 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
513 tf->protocol = ATA_PROT_NODATA; 620 tf->protocol = ATA_PROT_NODATA;
514 tf->device |= ATA_LBA;
515 621
516 if (scsicmd[0] == VERIFY) { 622 if (scsicmd[0] == VERIFY)
517 sect |= ((u64)scsicmd[2]) << 24; 623 scsi_10_lba_len(scsicmd, &block, &n_block);
518 sect |= ((u64)scsicmd[3]) << 16; 624 else if (scsicmd[0] == VERIFY_16)
519 sect |= ((u64)scsicmd[4]) << 8; 625 scsi_16_lba_len(scsicmd, &block, &n_block);
520 sect |= ((u64)scsicmd[5]); 626 else
627 goto invalid_fld;
521 628
522 n_sect |= ((u32)scsicmd[7]) << 8; 629 if (!n_block)
523 n_sect |= ((u32)scsicmd[8]); 630 goto nothing_to_do;
524 } 631 if (block >= dev_sectors)
632 goto out_of_range;
633 if ((block + n_block) > dev_sectors)
634 goto out_of_range;
525 635
526 else if (scsicmd[0] == VERIFY_16) { 636 if (dev->flags & ATA_DFLAG_LBA) {
527 sect |= ((u64)scsicmd[2]) << 56; 637 tf->flags |= ATA_TFLAG_LBA;
528 sect |= ((u64)scsicmd[3]) << 48;
529 sect |= ((u64)scsicmd[4]) << 40;
530 sect |= ((u64)scsicmd[5]) << 32;
531 sect |= ((u64)scsicmd[6]) << 24;
532 sect |= ((u64)scsicmd[7]) << 16;
533 sect |= ((u64)scsicmd[8]) << 8;
534 sect |= ((u64)scsicmd[9]);
535
536 n_sect |= ((u32)scsicmd[10]) << 24;
537 n_sect |= ((u32)scsicmd[11]) << 16;
538 n_sect |= ((u32)scsicmd[12]) << 8;
539 n_sect |= ((u32)scsicmd[13]);
540 }
541 638
542 else 639 if (dev->flags & ATA_DFLAG_LBA48) {
543 return 1; 640 if (n_block > (64 * 1024))
641 goto invalid_fld;
544 642
545 if (!n_sect) 643 /* use LBA48 */
546 return 1; 644 tf->flags |= ATA_TFLAG_LBA48;
547 if (sect >= dev_sectors) 645 tf->command = ATA_CMD_VERIFY_EXT;
548 return 1;
549 if ((sect + n_sect) > dev_sectors)
550 return 1;
551 if (lba48) {
552 if (n_sect > (64 * 1024))
553 return 1;
554 } else {
555 if (n_sect > 256)
556 return 1;
557 }
558 646
559 if (lba48) { 647 tf->hob_nsect = (n_block >> 8) & 0xff;
560 tf->command = ATA_CMD_VERIFY_EXT;
561 648
562 tf->hob_nsect = (n_sect >> 8) & 0xff; 649 tf->hob_lbah = (block >> 40) & 0xff;
650 tf->hob_lbam = (block >> 32) & 0xff;
651 tf->hob_lbal = (block >> 24) & 0xff;
652 } else {
653 if (n_block > 256)
654 goto invalid_fld;
563 655
564 tf->hob_lbah = (sect >> 40) & 0xff; 656 /* use LBA28 */
565 tf->hob_lbam = (sect >> 32) & 0xff; 657 tf->command = ATA_CMD_VERIFY;
566 tf->hob_lbal = (sect >> 24) & 0xff; 658
659 tf->device |= (block >> 24) & 0xf;
660 }
661
662 tf->nsect = n_block & 0xff;
663
664 tf->lbah = (block >> 16) & 0xff;
665 tf->lbam = (block >> 8) & 0xff;
666 tf->lbal = block & 0xff;
667
668 tf->device |= ATA_LBA;
567 } else { 669 } else {
670 /* CHS */
671 u32 sect, head, cyl, track;
672
673 if (n_block > 256)
674 goto invalid_fld;
675
676 /* Convert LBA to CHS */
677 track = (u32)block / dev->sectors;
678 cyl = track / dev->heads;
679 head = track % dev->heads;
680 sect = (u32)block % dev->sectors + 1;
681
682 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
683 (u32)block, track, cyl, head, sect);
684
685 /* Check whether the converted CHS can fit.
686 Cylinder: 0-65535
687 Head: 0-15
688 Sector: 1-255*/
689 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
690 goto out_of_range;
691
568 tf->command = ATA_CMD_VERIFY; 692 tf->command = ATA_CMD_VERIFY;
569 693 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
570 tf->device |= (sect >> 24) & 0xf; 694 tf->lbal = sect;
695 tf->lbam = cyl;
696 tf->lbah = cyl >> 8;
697 tf->device |= head;
571 } 698 }
572 699
573 tf->nsect = n_sect & 0xff; 700 return 0;
701
702invalid_fld:
703 ata_scsi_set_sense(qc->scsicmd, ILLEGAL_REQUEST, 0x24, 0x0);
704 /* "Invalid field in cbd" */
705 return 1;
574 706
575 tf->lbah = (sect >> 16) & 0xff; 707out_of_range:
576 tf->lbam = (sect >> 8) & 0xff; 708 ata_scsi_set_sense(qc->scsicmd, ILLEGAL_REQUEST, 0x21, 0x0);
577 tf->lbal = sect & 0xff; 709 /* "Logical Block Address out of range" */
710 return 1;
578 711
579 return 0; 712nothing_to_do:
713 qc->scsicmd->result = SAM_STAT_GOOD;
714 return 1;
580} 715}
581 716
582/** 717/**
@@ -599,106 +734,137 @@ static unsigned int ata_scsi_verify_xlat(struct ata_queued_cmd *qc, u8 *scsicmd)
599 * Zero on success, non-zero on error. 734 * Zero on success, non-zero on error.
600 */ 735 */
601 736
602static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, u8 *scsicmd) 737static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, const u8 *scsicmd)
603{ 738{
604 struct ata_taskfile *tf = &qc->tf; 739 struct ata_taskfile *tf = &qc->tf;
605 unsigned int lba48 = tf->flags & ATA_TFLAG_LBA48; 740 struct ata_device *dev = qc->dev;
741 u64 block;
742 u32 n_block;
606 743
607 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 744 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
608 tf->protocol = qc->dev->xfer_protocol;
609 tf->device |= ATA_LBA;
610 745
611 if (scsicmd[0] == READ_10 || scsicmd[0] == READ_6 || 746 if (scsicmd[0] == WRITE_10 || scsicmd[0] == WRITE_6 ||
612 scsicmd[0] == READ_16) { 747 scsicmd[0] == WRITE_16)
613 tf->command = qc->dev->read_cmd;
614 } else {
615 tf->command = qc->dev->write_cmd;
616 tf->flags |= ATA_TFLAG_WRITE; 748 tf->flags |= ATA_TFLAG_WRITE;
617 }
618 749
619 if (scsicmd[0] == READ_10 || scsicmd[0] == WRITE_10) { 750 /* Calculate the SCSI LBA and transfer length. */
620 if (lba48) { 751 switch (scsicmd[0]) {
621 tf->hob_nsect = scsicmd[7]; 752 case READ_10:
622 tf->hob_lbal = scsicmd[2]; 753 case WRITE_10:
754 scsi_10_lba_len(scsicmd, &block, &n_block);
755 break;
756 case READ_6:
757 case WRITE_6:
758 scsi_6_lba_len(scsicmd, &block, &n_block);
623 759
624 qc->nsect = ((unsigned int)scsicmd[7] << 8) | 760 /* for 6-byte r/w commands, transfer length 0
625 scsicmd[8]; 761 * means 256 blocks of data, not 0 block.
626 } else { 762 */
627 /* if we don't support LBA48 addressing, the request 763 if (!n_block)
628 * -may- be too large. */ 764 n_block = 256;
629 if ((scsicmd[2] & 0xf0) || scsicmd[7]) 765 break;
630 return 1; 766 case READ_16:
767 case WRITE_16:
768 scsi_16_lba_len(scsicmd, &block, &n_block);
769 break;
770 default:
771 DPRINTK("no-byte command\n");
772 goto invalid_fld;
773 }
631 774
632 /* stores LBA27:24 in lower 4 bits of device reg */ 775 /* Check and compose ATA command */
633 tf->device |= scsicmd[2]; 776 if (!n_block)
777 /* For 10-byte and 16-byte SCSI R/W commands, transfer
778 * length 0 means transfer 0 block of data.
779 * However, for ATA R/W commands, sector count 0 means
780 * 256 or 65536 sectors, not 0 sectors as in SCSI.
781 */
782 goto nothing_to_do;
634 783
635 qc->nsect = scsicmd[8]; 784 if (dev->flags & ATA_DFLAG_LBA) {
636 } 785 tf->flags |= ATA_TFLAG_LBA;
637 786
638 tf->nsect = scsicmd[8]; 787 if (dev->flags & ATA_DFLAG_LBA48) {
639 tf->lbal = scsicmd[5]; 788 /* The request -may- be too large for LBA48. */
640 tf->lbam = scsicmd[4]; 789 if ((block >> 48) || (n_block > 65536))
641 tf->lbah = scsicmd[3]; 790 goto out_of_range;
642 791
643 VPRINTK("ten-byte command\n"); 792 /* use LBA48 */
644 if (qc->nsect == 0) /* we don't support length==0 cmds */ 793 tf->flags |= ATA_TFLAG_LBA48;
645 return 1;
646 return 0;
647 }
648 794
649 if (scsicmd[0] == READ_6 || scsicmd[0] == WRITE_6) { 795 tf->hob_nsect = (n_block >> 8) & 0xff;
650 qc->nsect = tf->nsect = scsicmd[4];
651 if (!qc->nsect) {
652 qc->nsect = 256;
653 if (lba48)
654 tf->hob_nsect = 1;
655 }
656 796
657 tf->lbal = scsicmd[3]; 797 tf->hob_lbah = (block >> 40) & 0xff;
658 tf->lbam = scsicmd[2]; 798 tf->hob_lbam = (block >> 32) & 0xff;
659 tf->lbah = scsicmd[1] & 0x1f; /* mask out reserved bits */ 799 tf->hob_lbal = (block >> 24) & 0xff;
800 } else {
801 /* use LBA28 */
660 802
661 VPRINTK("six-byte command\n"); 803 /* The request -may- be too large for LBA28. */
662 return 0; 804 if ((block >> 28) || (n_block > 256))
663 } 805 goto out_of_range;
664 806
665 if (scsicmd[0] == READ_16 || scsicmd[0] == WRITE_16) { 807 tf->device |= (block >> 24) & 0xf;
666 /* rule out impossible LBAs and sector counts */ 808 }
667 if (scsicmd[2] || scsicmd[3] || scsicmd[10] || scsicmd[11])
668 return 1;
669 809
670 if (lba48) { 810 ata_rwcmd_protocol(qc);
671 tf->hob_nsect = scsicmd[12];
672 tf->hob_lbal = scsicmd[6];
673 tf->hob_lbam = scsicmd[5];
674 tf->hob_lbah = scsicmd[4];
675 811
676 qc->nsect = ((unsigned int)scsicmd[12] << 8) | 812 qc->nsect = n_block;
677 scsicmd[13]; 813 tf->nsect = n_block & 0xff;
678 } else {
679 /* once again, filter out impossible non-zero values */
680 if (scsicmd[4] || scsicmd[5] || scsicmd[12] ||
681 (scsicmd[6] & 0xf0))
682 return 1;
683 814
684 /* stores LBA27:24 in lower 4 bits of device reg */ 815 tf->lbah = (block >> 16) & 0xff;
685 tf->device |= scsicmd[6]; 816 tf->lbam = (block >> 8) & 0xff;
817 tf->lbal = block & 0xff;
686 818
687 qc->nsect = scsicmd[13]; 819 tf->device |= ATA_LBA;
688 } 820 } else {
821 /* CHS */
822 u32 sect, head, cyl, track;
823
824 /* The request -may- be too large for CHS addressing. */
825 if ((block >> 28) || (n_block > 256))
826 goto out_of_range;
827
828 ata_rwcmd_protocol(qc);
829
830 /* Convert LBA to CHS */
831 track = (u32)block / dev->sectors;
832 cyl = track / dev->heads;
833 head = track % dev->heads;
834 sect = (u32)block % dev->sectors + 1;
835
836 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
837 (u32)block, track, cyl, head, sect);
838
839 /* Check whether the converted CHS can fit.
840 Cylinder: 0-65535
841 Head: 0-15
842 Sector: 1-255*/
843 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
844 goto out_of_range;
845
846 qc->nsect = n_block;
847 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
848 tf->lbal = sect;
849 tf->lbam = cyl;
850 tf->lbah = cyl >> 8;
851 tf->device |= head;
852 }
689 853
690 tf->nsect = scsicmd[13]; 854 return 0;
691 tf->lbal = scsicmd[9];
692 tf->lbam = scsicmd[8];
693 tf->lbah = scsicmd[7];
694 855
695 VPRINTK("sixteen-byte command\n"); 856invalid_fld:
696 if (qc->nsect == 0) /* we don't support length==0 cmds */ 857 ata_scsi_set_sense(qc->scsicmd, ILLEGAL_REQUEST, 0x24, 0x0);
697 return 1; 858 /* "Invalid field in cbd" */
698 return 0; 859 return 1;
699 } 860
861out_of_range:
862 ata_scsi_set_sense(qc->scsicmd, ILLEGAL_REQUEST, 0x21, 0x0);
863 /* "Logical Block Address out of range" */
864 return 1;
700 865
701 DPRINTK("no-byte command\n"); 866nothing_to_do:
867 qc->scsicmd->result = SAM_STAT_GOOD;
702 return 1; 868 return 1;
703} 869}
704 870
@@ -731,6 +897,12 @@ static int ata_scsi_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
731 * This function sets up an ata_queued_cmd structure for the 897 * This function sets up an ata_queued_cmd structure for the
732 * SCSI command, and sends that ata_queued_cmd to the hardware. 898 * SCSI command, and sends that ata_queued_cmd to the hardware.
733 * 899 *
900 * The xlat_func argument (actor) returns 0 if ready to execute
901 * ATA command, else 1 to finish translation. If 1 is returned
902 * then cmd->result (and possibly cmd->sense_buffer) are assumed
903 * to be set reflecting an error condition or clean (early)
904 * termination.
905 *
734 * LOCKING: 906 * LOCKING:
735 * spin_lock_irqsave(host_set lock) 907 * spin_lock_irqsave(host_set lock)
736 */ 908 */
@@ -747,7 +919,7 @@ static void ata_scsi_translate(struct ata_port *ap, struct ata_device *dev,
747 919
748 qc = ata_scsi_qc_new(ap, dev, cmd, done); 920 qc = ata_scsi_qc_new(ap, dev, cmd, done);
749 if (!qc) 921 if (!qc)
750 return; 922 goto err_mem;
751 923
752 /* data is present; dma-map it */ 924 /* data is present; dma-map it */
753 if (cmd->sc_data_direction == DMA_FROM_DEVICE || 925 if (cmd->sc_data_direction == DMA_FROM_DEVICE ||
@@ -755,7 +927,7 @@ static void ata_scsi_translate(struct ata_port *ap, struct ata_device *dev,
755 if (unlikely(cmd->request_bufflen < 1)) { 927 if (unlikely(cmd->request_bufflen < 1)) {
756 printk(KERN_WARNING "ata%u(%u): WARNING: zero len r/w req\n", 928 printk(KERN_WARNING "ata%u(%u): WARNING: zero len r/w req\n",
757 ap->id, dev->devno); 929 ap->id, dev->devno);
758 goto err_out; 930 goto err_did;
759 } 931 }
760 932
761 if (cmd->use_sg) 933 if (cmd->use_sg)
@@ -770,19 +942,28 @@ static void ata_scsi_translate(struct ata_port *ap, struct ata_device *dev,
770 qc->complete_fn = ata_scsi_qc_complete; 942 qc->complete_fn = ata_scsi_qc_complete;
771 943
772 if (xlat_func(qc, scsicmd)) 944 if (xlat_func(qc, scsicmd))
773 goto err_out; 945 goto early_finish;
774 946
775 /* select device, send command to hardware */ 947 /* select device, send command to hardware */
776 if (ata_qc_issue(qc)) 948 if (ata_qc_issue(qc))
777 goto err_out; 949 goto err_did;
778 950
779 VPRINTK("EXIT\n"); 951 VPRINTK("EXIT\n");
780 return; 952 return;
781 953
782err_out: 954early_finish:
955 ata_qc_free(qc);
956 done(cmd);
957 DPRINTK("EXIT - early finish (good or error)\n");
958 return;
959
960err_did:
783 ata_qc_free(qc); 961 ata_qc_free(qc);
784 ata_bad_cdb(cmd, done); 962err_mem:
785 DPRINTK("EXIT - badcmd\n"); 963 cmd->result = (DID_ERROR << 16);
964 done(cmd);
965 DPRINTK("EXIT - internal\n");
966 return;
786} 967}
787 968
788/** 969/**
@@ -849,7 +1030,8 @@ static inline void ata_scsi_rbuf_put(struct scsi_cmnd *cmd, u8 *buf)
849 * Mapping the response buffer, calling the command's handler, 1030 * Mapping the response buffer, calling the command's handler,
850 * and handling the handler's return value. This return value 1031 * and handling the handler's return value. This return value
851 * indicates whether the handler wishes the SCSI command to be 1032 * indicates whether the handler wishes the SCSI command to be
852 * completed successfully, or not. 1033 * completed successfully (0), or not (in which case cmd->result
1034 * and sense buffer are assumed to be set).
853 * 1035 *
854 * LOCKING: 1036 * LOCKING:
855 * spin_lock_irqsave(host_set lock) 1037 * spin_lock_irqsave(host_set lock)
@@ -868,12 +1050,9 @@ void ata_scsi_rbuf_fill(struct ata_scsi_args *args,
868 rc = actor(args, rbuf, buflen); 1050 rc = actor(args, rbuf, buflen);
869 ata_scsi_rbuf_put(cmd, rbuf); 1051 ata_scsi_rbuf_put(cmd, rbuf);
870 1052
871 if (rc) 1053 if (rc == 0)
872 ata_bad_cdb(cmd, args->done);
873 else {
874 cmd->result = SAM_STAT_GOOD; 1054 cmd->result = SAM_STAT_GOOD;
875 args->done(cmd); 1055 args->done(cmd);
876 }
877} 1056}
878 1057
879/** 1058/**
@@ -1179,8 +1358,16 @@ unsigned int ata_scsiop_mode_sense(struct ata_scsi_args *args, u8 *rbuf,
1179 * in the same manner) 1358 * in the same manner)
1180 */ 1359 */
1181 page_control = scsicmd[2] >> 6; 1360 page_control = scsicmd[2] >> 6;
1182 if ((page_control != 0) && (page_control != 3)) 1361 switch (page_control) {
1183 return 1; 1362 case 0: /* current */
1363 break; /* supported */
1364 case 3: /* saved */
1365 goto saving_not_supp;
1366 case 1: /* changeable */
1367 case 2: /* defaults */
1368 default:
1369 goto invalid_fld;
1370 }
1184 1371
1185 if (six_byte) 1372 if (six_byte)
1186 output_len = 4; 1373 output_len = 4;
@@ -1211,7 +1398,7 @@ unsigned int ata_scsiop_mode_sense(struct ata_scsi_args *args, u8 *rbuf,
1211 break; 1398 break;
1212 1399
1213 default: /* invalid page code */ 1400 default: /* invalid page code */
1214 return 1; 1401 goto invalid_fld;
1215 } 1402 }
1216 1403
1217 if (six_byte) { 1404 if (six_byte) {
@@ -1224,6 +1411,16 @@ unsigned int ata_scsiop_mode_sense(struct ata_scsi_args *args, u8 *rbuf,
1224 } 1411 }
1225 1412
1226 return 0; 1413 return 0;
1414
1415invalid_fld:
1416 ata_scsi_set_sense(args->cmd, ILLEGAL_REQUEST, 0x24, 0x0);
1417 /* "Invalid field in cbd" */
1418 return 1;
1419
1420saving_not_supp:
1421 ata_scsi_set_sense(args->cmd, ILLEGAL_REQUEST, 0x39, 0x0);
1422 /* "Saving parameters not supported" */
1423 return 1;
1227} 1424}
1228 1425
1229/** 1426/**
@@ -1246,10 +1443,20 @@ unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf,
1246 1443
1247 VPRINTK("ENTER\n"); 1444 VPRINTK("ENTER\n");
1248 1445
1249 if (ata_id_has_lba48(args->id)) 1446 if (ata_id_has_lba(args->id)) {
1250 n_sectors = ata_id_u64(args->id, 100); 1447 if (ata_id_has_lba48(args->id))
1251 else 1448 n_sectors = ata_id_u64(args->id, 100);
1252 n_sectors = ata_id_u32(args->id, 60); 1449 else
1450 n_sectors = ata_id_u32(args->id, 60);
1451 } else {
1452 /* CHS default translation */
1453 n_sectors = args->id[1] * args->id[3] * args->id[6];
1454
1455 if (ata_id_current_chs_valid(args->id))
1456 /* CHS current translation */
1457 n_sectors = ata_id_u32(args->id, 57);
1458 }
1459
1253 n_sectors--; /* ATA TotalUserSectors - 1 */ 1460 n_sectors--; /* ATA TotalUserSectors - 1 */
1254 1461
1255 if (args->cmd->cmnd[0] == READ_CAPACITY) { 1462 if (args->cmd->cmnd[0] == READ_CAPACITY) {
@@ -1313,6 +1520,34 @@ unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf,
1313} 1520}
1314 1521
1315/** 1522/**
1523 * ata_scsi_set_sense - Set SCSI sense data and status
1524 * @cmd: SCSI request to be handled
1525 * @sk: SCSI-defined sense key
1526 * @asc: SCSI-defined additional sense code
1527 * @ascq: SCSI-defined additional sense code qualifier
1528 *
1529 * Helper function that builds a valid fixed format, current
1530 * response code and the given sense key (sk), additional sense
1531 * code (asc) and additional sense code qualifier (ascq) with
1532 * a SCSI command status of %SAM_STAT_CHECK_CONDITION and
1533 * DRIVER_SENSE set in the upper bits of scsi_cmnd::result .
1534 *
1535 * LOCKING:
1536 * Not required
1537 */
1538
1539void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
1540{
1541 cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
1542
1543 cmd->sense_buffer[0] = 0x70; /* fixed format, current */
1544 cmd->sense_buffer[2] = sk;
1545 cmd->sense_buffer[7] = 18 - 8; /* additional sense length */
1546 cmd->sense_buffer[12] = asc;
1547 cmd->sense_buffer[13] = ascq;
1548}
1549
1550/**
1316 * ata_scsi_badcmd - End a SCSI request with an error 1551 * ata_scsi_badcmd - End a SCSI request with an error
1317 * @cmd: SCSI request to be handled 1552 * @cmd: SCSI request to be handled
1318 * @done: SCSI command completion function 1553 * @done: SCSI command completion function
@@ -1330,30 +1565,84 @@ unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf,
1330void ata_scsi_badcmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *), u8 asc, u8 ascq) 1565void ata_scsi_badcmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *), u8 asc, u8 ascq)
1331{ 1566{
1332 DPRINTK("ENTER\n"); 1567 DPRINTK("ENTER\n");
1333 cmd->result = SAM_STAT_CHECK_CONDITION; 1568 ata_scsi_set_sense(cmd, ILLEGAL_REQUEST, asc, ascq);
1334
1335 cmd->sense_buffer[0] = 0x70;
1336 cmd->sense_buffer[2] = ILLEGAL_REQUEST;
1337 cmd->sense_buffer[7] = 14 - 8; /* addnl. sense len. FIXME: correct? */
1338 cmd->sense_buffer[12] = asc;
1339 cmd->sense_buffer[13] = ascq;
1340 1569
1341 done(cmd); 1570 done(cmd);
1342} 1571}
1343 1572
1573void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
1574 struct scsi_cmnd *cmd)
1575{
1576 DECLARE_COMPLETION(wait);
1577 struct ata_queued_cmd *qc;
1578 unsigned long flags;
1579 int rc;
1580
1581 DPRINTK("ATAPI request sense\n");
1582
1583 qc = ata_qc_new_init(ap, dev);
1584 BUG_ON(qc == NULL);
1585
1586 /* FIXME: is this needed? */
1587 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
1588
1589 ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
1590 qc->dma_dir = DMA_FROM_DEVICE;
1591
1592 memset(&qc->cdb, 0, ap->cdb_len);
1593 qc->cdb[0] = REQUEST_SENSE;
1594 qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;
1595
1596 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1597 qc->tf.command = ATA_CMD_PACKET;
1598
1599 qc->tf.protocol = ATA_PROT_ATAPI;
1600 qc->tf.lbam = (8 * 1024) & 0xff;
1601 qc->tf.lbah = (8 * 1024) >> 8;
1602 qc->nbytes = SCSI_SENSE_BUFFERSIZE;
1603
1604 qc->waiting = &wait;
1605 qc->complete_fn = ata_qc_complete_noop;
1606
1607 spin_lock_irqsave(&ap->host_set->lock, flags);
1608 rc = ata_qc_issue(qc);
1609 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1610
1611 if (rc)
1612 ata_port_disable(ap);
1613 else
1614 wait_for_completion(&wait);
1615
1616 DPRINTK("EXIT\n");
1617}
1618
1344static int atapi_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) 1619static int atapi_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
1345{ 1620{
1346 struct scsi_cmnd *cmd = qc->scsicmd; 1621 struct scsi_cmnd *cmd = qc->scsicmd;
1347 1622
1348 if (unlikely(drv_stat & (ATA_ERR | ATA_BUSY | ATA_DRQ))) { 1623 VPRINTK("ENTER, drv_stat == 0x%x\n", drv_stat);
1624
1625 if (unlikely(drv_stat & (ATA_BUSY | ATA_DRQ)))
1626 ata_to_sense_error(qc, drv_stat);
1627
1628 else if (unlikely(drv_stat & ATA_ERR)) {
1349 DPRINTK("request check condition\n"); 1629 DPRINTK("request check condition\n");
1350 1630
1631 /* FIXME: command completion with check condition
1632 * but no sense causes the error handler to run,
1633 * which then issues REQUEST SENSE, fills in the sense
1634 * buffer, and completes the command (for the second
1635 * time). We need to issue REQUEST SENSE some other
1636 * way, to avoid completing the command twice.
1637 */
1351 cmd->result = SAM_STAT_CHECK_CONDITION; 1638 cmd->result = SAM_STAT_CHECK_CONDITION;
1352 1639
1353 qc->scsidone(cmd); 1640 qc->scsidone(cmd);
1354 1641
1355 return 1; 1642 return 1;
1356 } else { 1643 }
1644
1645 else {
1357 u8 *scsicmd = cmd->cmnd; 1646 u8 *scsicmd = cmd->cmnd;
1358 1647
1359 if (scsicmd[0] == INQUIRY) { 1648 if (scsicmd[0] == INQUIRY) {
@@ -1361,15 +1650,30 @@ static int atapi_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
1361 unsigned int buflen; 1650 unsigned int buflen;
1362 1651
1363 buflen = ata_scsi_rbuf_get(cmd, &buf); 1652 buflen = ata_scsi_rbuf_get(cmd, &buf);
1364 buf[2] = 0x5; 1653
1365 buf[3] = (buf[3] & 0xf0) | 2; 1654 /* ATAPI devices typically report zero for their SCSI version,
1655 * and sometimes deviate from the spec WRT response data
1656 * format. If SCSI version is reported as zero like normal,
1657 * then we make the following fixups: 1) Fake MMC-5 version,
1658 * to indicate to the Linux scsi midlayer this is a modern
1659 * device. 2) Ensure response data format / ATAPI information
1660 * are always correct.
1661 */
1662 /* FIXME: do we ever override EVPD pages and the like, with
1663 * this code?
1664 */
1665 if (buf[2] == 0) {
1666 buf[2] = 0x5;
1667 buf[3] = 0x32;
1668 }
1669
1366 ata_scsi_rbuf_put(cmd, buf); 1670 ata_scsi_rbuf_put(cmd, buf);
1367 } 1671 }
1672
1368 cmd->result = SAM_STAT_GOOD; 1673 cmd->result = SAM_STAT_GOOD;
1369 } 1674 }
1370 1675
1371 qc->scsidone(cmd); 1676 qc->scsidone(cmd);
1372
1373 return 0; 1677 return 0;
1374} 1678}
1375/** 1679/**
@@ -1384,7 +1688,7 @@ static int atapi_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
1384 * Zero on success, non-zero on failure. 1688 * Zero on success, non-zero on failure.
1385 */ 1689 */
1386 1690
1387static unsigned int atapi_xlat(struct ata_queued_cmd *qc, u8 *scsicmd) 1691static unsigned int atapi_xlat(struct ata_queued_cmd *qc, const u8 *scsicmd)
1388{ 1692{
1389 struct scsi_cmnd *cmd = qc->scsicmd; 1693 struct scsi_cmnd *cmd = qc->scsicmd;
1390 struct ata_device *dev = qc->dev; 1694 struct ata_device *dev = qc->dev;
@@ -1453,7 +1757,7 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc, u8 *scsicmd)
1453 */ 1757 */
1454 1758
1455static struct ata_device * 1759static struct ata_device *
1456ata_scsi_find_dev(struct ata_port *ap, struct scsi_device *scsidev) 1760ata_scsi_find_dev(struct ata_port *ap, const struct scsi_device *scsidev)
1457{ 1761{
1458 struct ata_device *dev; 1762 struct ata_device *dev;
1459 1763
@@ -1610,7 +1914,7 @@ void ata_scsi_simulate(u16 *id,
1610 void (*done)(struct scsi_cmnd *)) 1914 void (*done)(struct scsi_cmnd *))
1611{ 1915{
1612 struct ata_scsi_args args; 1916 struct ata_scsi_args args;
1613 u8 *scsicmd = cmd->cmnd; 1917 const u8 *scsicmd = cmd->cmnd;
1614 1918
1615 args.id = id; 1919 args.id = id;
1616 args.cmd = cmd; 1920 args.cmd = cmd;
@@ -1630,7 +1934,7 @@ void ata_scsi_simulate(u16 *id,
1630 1934
1631 case INQUIRY: 1935 case INQUIRY:
1632 if (scsicmd[1] & 2) /* is CmdDt set? */ 1936 if (scsicmd[1] & 2) /* is CmdDt set? */
1633 ata_bad_cdb(cmd, done); 1937 ata_scsi_invalid_field(cmd, done);
1634 else if ((scsicmd[1] & 1) == 0) /* is EVPD clear? */ 1938 else if ((scsicmd[1] & 1) == 0) /* is EVPD clear? */
1635 ata_scsi_rbuf_fill(&args, ata_scsiop_inq_std); 1939 ata_scsi_rbuf_fill(&args, ata_scsiop_inq_std);
1636 else if (scsicmd[2] == 0x00) 1940 else if (scsicmd[2] == 0x00)
@@ -1640,7 +1944,7 @@ void ata_scsi_simulate(u16 *id,
1640 else if (scsicmd[2] == 0x83) 1944 else if (scsicmd[2] == 0x83)
1641 ata_scsi_rbuf_fill(&args, ata_scsiop_inq_83); 1945 ata_scsi_rbuf_fill(&args, ata_scsiop_inq_83);
1642 else 1946 else
1643 ata_bad_cdb(cmd, done); 1947 ata_scsi_invalid_field(cmd, done);
1644 break; 1948 break;
1645 1949
1646 case MODE_SENSE: 1950 case MODE_SENSE:
@@ -1650,7 +1954,7 @@ void ata_scsi_simulate(u16 *id,
1650 1954
1651 case MODE_SELECT: /* unconditionally return */ 1955 case MODE_SELECT: /* unconditionally return */
1652 case MODE_SELECT_10: /* bad-field-in-cdb */ 1956 case MODE_SELECT_10: /* bad-field-in-cdb */
1653 ata_bad_cdb(cmd, done); 1957 ata_scsi_invalid_field(cmd, done);
1654 break; 1958 break;
1655 1959
1656 case READ_CAPACITY: 1960 case READ_CAPACITY:
@@ -1661,7 +1965,7 @@ void ata_scsi_simulate(u16 *id,
1661 if ((scsicmd[1] & 0x1f) == SAI_READ_CAPACITY_16) 1965 if ((scsicmd[1] & 0x1f) == SAI_READ_CAPACITY_16)
1662 ata_scsi_rbuf_fill(&args, ata_scsiop_read_cap); 1966 ata_scsi_rbuf_fill(&args, ata_scsiop_read_cap);
1663 else 1967 else
1664 ata_bad_cdb(cmd, done); 1968 ata_scsi_invalid_field(cmd, done);
1665 break; 1969 break;
1666 1970
1667 case REPORT_LUNS: 1971 case REPORT_LUNS:
@@ -1673,8 +1977,26 @@ void ata_scsi_simulate(u16 *id,
1673 1977
1674 /* all other commands */ 1978 /* all other commands */
1675 default: 1979 default:
1676 ata_bad_scsiop(cmd, done); 1980 ata_scsi_set_sense(cmd, ILLEGAL_REQUEST, 0x20, 0x0);
1981 /* "Invalid command operation code" */
1982 done(cmd);
1677 break; 1983 break;
1678 } 1984 }
1679} 1985}
1680 1986
1987void ata_scsi_scan_host(struct ata_port *ap)
1988{
1989 struct ata_device *dev;
1990 unsigned int i;
1991
1992 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1993 return;
1994
1995 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1996 dev = &ap->device[i];
1997
1998 if (ata_dev_present(dev))
1999 scsi_scan_target(&ap->host->shost_gendev, 0, i, 0, 0);
2000 }
2001}
2002
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h
index d608b3a0f6fe..3d60190584ba 100644
--- a/drivers/scsi/libata.h
+++ b/drivers/scsi/libata.h
@@ -39,18 +39,23 @@ struct ata_scsi_args {
39 39
40/* libata-core.c */ 40/* libata-core.c */
41extern int atapi_enabled; 41extern int atapi_enabled;
42extern int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat);
42extern struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, 43extern struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
43 struct ata_device *dev); 44 struct ata_device *dev);
45extern void ata_rwcmd_protocol(struct ata_queued_cmd *qc);
44extern void ata_qc_free(struct ata_queued_cmd *qc); 46extern void ata_qc_free(struct ata_queued_cmd *qc);
45extern int ata_qc_issue(struct ata_queued_cmd *qc); 47extern int ata_qc_issue(struct ata_queued_cmd *qc);
46extern int ata_check_atapi_dma(struct ata_queued_cmd *qc); 48extern int ata_check_atapi_dma(struct ata_queued_cmd *qc);
47extern void ata_dev_select(struct ata_port *ap, unsigned int device, 49extern void ata_dev_select(struct ata_port *ap, unsigned int device,
48 unsigned int wait, unsigned int can_sleep); 50 unsigned int wait, unsigned int can_sleep);
49extern void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf); 51extern void ata_tf_to_host_nolock(struct ata_port *ap, const struct ata_taskfile *tf);
50extern void swap_buf_le16(u16 *buf, unsigned int buf_words); 52extern void swap_buf_le16(u16 *buf, unsigned int buf_words);
51 53
52 54
53/* libata-scsi.c */ 55/* libata-scsi.c */
56extern void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
57 struct scsi_cmnd *cmd);
58extern void ata_scsi_scan_host(struct ata_port *ap);
54extern void ata_to_sense_error(struct ata_queued_cmd *qc, u8 drv_stat); 59extern void ata_to_sense_error(struct ata_queued_cmd *qc, u8 drv_stat);
55extern int ata_scsi_error(struct Scsi_Host *host); 60extern int ata_scsi_error(struct Scsi_Host *host);
56extern unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf, 61extern unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf,
@@ -76,18 +81,10 @@ extern unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf,
76extern void ata_scsi_badcmd(struct scsi_cmnd *cmd, 81extern void ata_scsi_badcmd(struct scsi_cmnd *cmd,
77 void (*done)(struct scsi_cmnd *), 82 void (*done)(struct scsi_cmnd *),
78 u8 asc, u8 ascq); 83 u8 asc, u8 ascq);
84extern void ata_scsi_set_sense(struct scsi_cmnd *cmd,
85 u8 sk, u8 asc, u8 ascq);
79extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args, 86extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args,
80 unsigned int (*actor) (struct ata_scsi_args *args, 87 unsigned int (*actor) (struct ata_scsi_args *args,
81 u8 *rbuf, unsigned int buflen)); 88 u8 *rbuf, unsigned int buflen));
82 89
83static inline void ata_bad_scsiop(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
84{
85 ata_scsi_badcmd(cmd, done, 0x20, 0x00);
86}
87
88static inline void ata_bad_cdb(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
89{
90 ata_scsi_badcmd(cmd, done, 0x24, 0x00);
91}
92
93#endif /* __LIBATA_H__ */ 90#endif /* __LIBATA_H__ */
diff --git a/drivers/scsi/lpfc/lpfc_attr.c b/drivers/scsi/lpfc/lpfc_attr.c
index 86eaf6d408d5..acae7c48ef7d 100644
--- a/drivers/scsi/lpfc/lpfc_attr.c
+++ b/drivers/scsi/lpfc/lpfc_attr.c
@@ -973,10 +973,10 @@ lpfc_get_host_fabric_name (struct Scsi_Host *shost)
973 if ((phba->fc_flag & FC_FABRIC) || 973 if ((phba->fc_flag & FC_FABRIC) ||
974 ((phba->fc_topology == TOPOLOGY_LOOP) && 974 ((phba->fc_topology == TOPOLOGY_LOOP) &&
975 (phba->fc_flag & FC_PUBLIC_LOOP))) 975 (phba->fc_flag & FC_PUBLIC_LOOP)))
976 node_name = wwn_to_u64(phba->fc_fabparam.nodeName.wwn); 976 node_name = wwn_to_u64(phba->fc_fabparam.nodeName.u.wwn);
977 else 977 else
978 /* fabric is local port if there is no F/FL_Port */ 978 /* fabric is local port if there is no F/FL_Port */
979 node_name = wwn_to_u64(phba->fc_nodename.wwn); 979 node_name = wwn_to_u64(phba->fc_nodename.u.wwn);
980 980
981 spin_unlock_irq(shost->host_lock); 981 spin_unlock_irq(shost->host_lock);
982 982
@@ -1110,7 +1110,7 @@ lpfc_get_starget_node_name(struct scsi_target *starget)
1110 /* Search the mapped list for this target ID */ 1110 /* Search the mapped list for this target ID */
1111 list_for_each_entry(ndlp, &phba->fc_nlpmap_list, nlp_listp) { 1111 list_for_each_entry(ndlp, &phba->fc_nlpmap_list, nlp_listp) {
1112 if (starget->id == ndlp->nlp_sid) { 1112 if (starget->id == ndlp->nlp_sid) {
1113 node_name = wwn_to_u64(ndlp->nlp_nodename.wwn); 1113 node_name = wwn_to_u64(ndlp->nlp_nodename.u.wwn);
1114 break; 1114 break;
1115 } 1115 }
1116 } 1116 }
@@ -1131,7 +1131,7 @@ lpfc_get_starget_port_name(struct scsi_target *starget)
1131 /* Search the mapped list for this target ID */ 1131 /* Search the mapped list for this target ID */
1132 list_for_each_entry(ndlp, &phba->fc_nlpmap_list, nlp_listp) { 1132 list_for_each_entry(ndlp, &phba->fc_nlpmap_list, nlp_listp) {
1133 if (starget->id == ndlp->nlp_sid) { 1133 if (starget->id == ndlp->nlp_sid) {
1134 port_name = wwn_to_u64(ndlp->nlp_portname.wwn); 1134 port_name = wwn_to_u64(ndlp->nlp_portname.u.wwn);
1135 break; 1135 break;
1136 } 1136 }
1137 } 1137 }
diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c
index 4fb8eb0c84cf..56052f4510c3 100644
--- a/drivers/scsi/lpfc/lpfc_hbadisc.c
+++ b/drivers/scsi/lpfc/lpfc_hbadisc.c
@@ -1019,8 +1019,8 @@ lpfc_register_remote_port(struct lpfc_hba * phba,
1019 struct fc_rport_identifiers rport_ids; 1019 struct fc_rport_identifiers rport_ids;
1020 1020
1021 /* Remote port has reappeared. Re-register w/ FC transport */ 1021 /* Remote port has reappeared. Re-register w/ FC transport */
1022 rport_ids.node_name = wwn_to_u64(ndlp->nlp_nodename.wwn); 1022 rport_ids.node_name = wwn_to_u64(ndlp->nlp_nodename.u.wwn);
1023 rport_ids.port_name = wwn_to_u64(ndlp->nlp_portname.wwn); 1023 rport_ids.port_name = wwn_to_u64(ndlp->nlp_portname.u.wwn);
1024 rport_ids.port_id = ndlp->nlp_DID; 1024 rport_ids.port_id = ndlp->nlp_DID;
1025 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 1025 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
1026 if (ndlp->nlp_type & NLP_FCP_TARGET) 1026 if (ndlp->nlp_type & NLP_FCP_TARGET)
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h
index 047a87c26cc0..86c41981188b 100644
--- a/drivers/scsi/lpfc/lpfc_hw.h
+++ b/drivers/scsi/lpfc/lpfc_hw.h
@@ -280,9 +280,9 @@ struct lpfc_name {
280#define NAME_CCITT_GR_TYPE 0xE 280#define NAME_CCITT_GR_TYPE 0xE
281 uint8_t IEEEextLsb; /* FC Word 0, bit 16:23, IEEE extended Lsb */ 281 uint8_t IEEEextLsb; /* FC Word 0, bit 16:23, IEEE extended Lsb */
282 uint8_t IEEE[6]; /* FC IEEE address */ 282 uint8_t IEEE[6]; /* FC IEEE address */
283 }; 283 } s;
284 uint8_t wwn[8]; 284 uint8_t wwn[8];
285 }; 285 } u;
286}; 286};
287 287
288struct csp { 288struct csp {
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 454058f655db..0856ff7d3b33 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -285,7 +285,7 @@ lpfc_config_port_post(struct lpfc_hba * phba)
285 if (phba->SerialNumber[0] == 0) { 285 if (phba->SerialNumber[0] == 0) {
286 uint8_t *outptr; 286 uint8_t *outptr;
287 287
288 outptr = (uint8_t *) & phba->fc_nodename.IEEE[0]; 288 outptr = &phba->fc_nodename.u.s.IEEE[0];
289 for (i = 0; i < 12; i++) { 289 for (i = 0; i < 12; i++) {
290 status = *outptr++; 290 status = *outptr++;
291 j = ((status & 0xf0) >> 4); 291 j = ((status & 0xf0) >> 4);
@@ -1523,8 +1523,8 @@ lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1523 * Must done after lpfc_sli_hba_setup() 1523 * Must done after lpfc_sli_hba_setup()
1524 */ 1524 */
1525 1525
1526 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.wwn); 1526 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
1527 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.wwn); 1527 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
1528 fc_host_supported_classes(host) = FC_COS_CLASS3; 1528 fc_host_supported_classes(host) = FC_COS_CLASS3;
1529 1529
1530 memset(fc_host_supported_fc4s(host), 0, 1530 memset(fc_host_supported_fc4s(host), 0,
diff --git a/drivers/scsi/lpfc/lpfc_mem.c b/drivers/scsi/lpfc/lpfc_mem.c
index 0aba13ceaacf..352df47bcaca 100644
--- a/drivers/scsi/lpfc/lpfc_mem.c
+++ b/drivers/scsi/lpfc/lpfc_mem.c
@@ -39,7 +39,7 @@
39#define LPFC_MEM_POOL_SIZE 64 /* max elem in non-DMA safety pool */ 39#define LPFC_MEM_POOL_SIZE 64 /* max elem in non-DMA safety pool */
40 40
41static void * 41static void *
42lpfc_pool_kmalloc(unsigned int gfp_flags, void *data) 42lpfc_pool_kmalloc(gfp_t gfp_flags, void *data)
43{ 43{
44 return kmalloc((unsigned long)data, gfp_flags); 44 return kmalloc((unsigned long)data, gfp_flags);
45} 45}
diff --git a/drivers/scsi/megaraid.c b/drivers/scsi/megaraid.c
index 6f308ebe3e79..61a6fd810bb4 100644
--- a/drivers/scsi/megaraid.c
+++ b/drivers/scsi/megaraid.c
@@ -621,8 +621,6 @@ mega_build_cmd(adapter_t *adapter, Scsi_Cmnd *cmd, int *busy)
621 if(islogical) { 621 if(islogical) {
622 switch (cmd->cmnd[0]) { 622 switch (cmd->cmnd[0]) {
623 case TEST_UNIT_READY: 623 case TEST_UNIT_READY:
624 memset(cmd->request_buffer, 0, cmd->request_bufflen);
625
626#if MEGA_HAVE_CLUSTERING 624#if MEGA_HAVE_CLUSTERING
627 /* 625 /*
628 * Do we support clustering and is the support enabled 626 * Do we support clustering and is the support enabled
@@ -652,11 +650,28 @@ mega_build_cmd(adapter_t *adapter, Scsi_Cmnd *cmd, int *busy)
652 return NULL; 650 return NULL;
653#endif 651#endif
654 652
655 case MODE_SENSE: 653 case MODE_SENSE: {
654 char *buf;
655
656 if (cmd->use_sg) {
657 struct scatterlist *sg;
658
659 sg = (struct scatterlist *)cmd->request_buffer;
660 buf = kmap_atomic(sg->page, KM_IRQ0) +
661 sg->offset;
662 } else
663 buf = cmd->request_buffer;
656 memset(cmd->request_buffer, 0, cmd->cmnd[4]); 664 memset(cmd->request_buffer, 0, cmd->cmnd[4]);
665 if (cmd->use_sg) {
666 struct scatterlist *sg;
667
668 sg = (struct scatterlist *)cmd->request_buffer;
669 kunmap_atomic(buf - sg->offset, KM_IRQ0);
670 }
657 cmd->result = (DID_OK << 16); 671 cmd->result = (DID_OK << 16);
658 cmd->scsi_done(cmd); 672 cmd->scsi_done(cmd);
659 return NULL; 673 return NULL;
674 }
660 675
661 case READ_CAPACITY: 676 case READ_CAPACITY:
662 case INQUIRY: 677 case INQUIRY:
@@ -1685,14 +1700,23 @@ mega_rundoneq (adapter_t *adapter)
1685static void 1700static void
1686mega_free_scb(adapter_t *adapter, scb_t *scb) 1701mega_free_scb(adapter_t *adapter, scb_t *scb)
1687{ 1702{
1703 unsigned long length;
1704
1688 switch( scb->dma_type ) { 1705 switch( scb->dma_type ) {
1689 1706
1690 case MEGA_DMA_TYPE_NONE: 1707 case MEGA_DMA_TYPE_NONE:
1691 break; 1708 break;
1692 1709
1693 case MEGA_BULK_DATA: 1710 case MEGA_BULK_DATA:
1711 if (scb->cmd->use_sg == 0)
1712 length = scb->cmd->request_bufflen;
1713 else {
1714 struct scatterlist *sgl =
1715 (struct scatterlist *)scb->cmd->request_buffer;
1716 length = sgl->length;
1717 }
1694 pci_unmap_page(adapter->dev, scb->dma_h_bulkdata, 1718 pci_unmap_page(adapter->dev, scb->dma_h_bulkdata,
1695 scb->cmd->request_bufflen, scb->dma_direction); 1719 length, scb->dma_direction);
1696 break; 1720 break;
1697 1721
1698 case MEGA_SGLIST: 1722 case MEGA_SGLIST:
@@ -1741,6 +1765,7 @@ mega_build_sglist(adapter_t *adapter, scb_t *scb, u32 *buf, u32 *len)
1741 struct scatterlist *sgl; 1765 struct scatterlist *sgl;
1742 struct page *page; 1766 struct page *page;
1743 unsigned long offset; 1767 unsigned long offset;
1768 unsigned int length;
1744 Scsi_Cmnd *cmd; 1769 Scsi_Cmnd *cmd;
1745 int sgcnt; 1770 int sgcnt;
1746 int idx; 1771 int idx;
@@ -1748,14 +1773,23 @@ mega_build_sglist(adapter_t *adapter, scb_t *scb, u32 *buf, u32 *len)
1748 cmd = scb->cmd; 1773 cmd = scb->cmd;
1749 1774
1750 /* Scatter-gather not used */ 1775 /* Scatter-gather not used */
1751 if( !cmd->use_sg ) { 1776 if( cmd->use_sg == 0 || (cmd->use_sg == 1 &&
1752 1777 !adapter->has_64bit_addr)) {
1753 page = virt_to_page(cmd->request_buffer); 1778
1754 offset = offset_in_page(cmd->request_buffer); 1779 if (cmd->use_sg == 0) {
1780 page = virt_to_page(cmd->request_buffer);
1781 offset = offset_in_page(cmd->request_buffer);
1782 length = cmd->request_bufflen;
1783 } else {
1784 sgl = (struct scatterlist *)cmd->request_buffer;
1785 page = sgl->page;
1786 offset = sgl->offset;
1787 length = sgl->length;
1788 }
1755 1789
1756 scb->dma_h_bulkdata = pci_map_page(adapter->dev, 1790 scb->dma_h_bulkdata = pci_map_page(adapter->dev,
1757 page, offset, 1791 page, offset,
1758 cmd->request_bufflen, 1792 length,
1759 scb->dma_direction); 1793 scb->dma_direction);
1760 scb->dma_type = MEGA_BULK_DATA; 1794 scb->dma_type = MEGA_BULK_DATA;
1761 1795
@@ -1765,14 +1799,14 @@ mega_build_sglist(adapter_t *adapter, scb_t *scb, u32 *buf, u32 *len)
1765 */ 1799 */
1766 if( adapter->has_64bit_addr ) { 1800 if( adapter->has_64bit_addr ) {
1767 scb->sgl64[0].address = scb->dma_h_bulkdata; 1801 scb->sgl64[0].address = scb->dma_h_bulkdata;
1768 scb->sgl64[0].length = cmd->request_bufflen; 1802 scb->sgl64[0].length = length;
1769 *buf = (u32)scb->sgl_dma_addr; 1803 *buf = (u32)scb->sgl_dma_addr;
1770 *len = (u32)cmd->request_bufflen; 1804 *len = (u32)length;
1771 return 1; 1805 return 1;
1772 } 1806 }
1773 else { 1807 else {
1774 *buf = (u32)scb->dma_h_bulkdata; 1808 *buf = (u32)scb->dma_h_bulkdata;
1775 *len = (u32)cmd->request_bufflen; 1809 *len = (u32)length;
1776 } 1810 }
1777 return 0; 1811 return 0;
1778 } 1812 }
@@ -1791,27 +1825,23 @@ mega_build_sglist(adapter_t *adapter, scb_t *scb, u32 *buf, u32 *len)
1791 1825
1792 if( sgcnt > adapter->sglen ) BUG(); 1826 if( sgcnt > adapter->sglen ) BUG();
1793 1827
1828 *len = 0;
1829
1794 for( idx = 0; idx < sgcnt; idx++, sgl++ ) { 1830 for( idx = 0; idx < sgcnt; idx++, sgl++ ) {
1795 1831
1796 if( adapter->has_64bit_addr ) { 1832 if( adapter->has_64bit_addr ) {
1797 scb->sgl64[idx].address = sg_dma_address(sgl); 1833 scb->sgl64[idx].address = sg_dma_address(sgl);
1798 scb->sgl64[idx].length = sg_dma_len(sgl); 1834 *len += scb->sgl64[idx].length = sg_dma_len(sgl);
1799 } 1835 }
1800 else { 1836 else {
1801 scb->sgl[idx].address = sg_dma_address(sgl); 1837 scb->sgl[idx].address = sg_dma_address(sgl);
1802 scb->sgl[idx].length = sg_dma_len(sgl); 1838 *len += scb->sgl[idx].length = sg_dma_len(sgl);
1803 } 1839 }
1804 } 1840 }
1805 1841
1806 /* Reset pointer and length fields */ 1842 /* Reset pointer and length fields */
1807 *buf = scb->sgl_dma_addr; 1843 *buf = scb->sgl_dma_addr;
1808 1844
1809 /*
1810 * For passthru command, dataxferlen must be set, even for commands
1811 * with a sg list
1812 */
1813 *len = (u32)cmd->request_bufflen;
1814
1815 /* Return count of SG requests */ 1845 /* Return count of SG requests */
1816 return sgcnt; 1846 return sgcnt;
1817} 1847}
diff --git a/drivers/scsi/megaraid/Kconfig.megaraid b/drivers/scsi/megaraid/Kconfig.megaraid
index 917d591d90b2..7363e12663ac 100644
--- a/drivers/scsi/megaraid/Kconfig.megaraid
+++ b/drivers/scsi/megaraid/Kconfig.megaraid
@@ -76,3 +76,12 @@ config MEGARAID_LEGACY
76 To compile this driver as a module, choose M here: the 76 To compile this driver as a module, choose M here: the
77 module will be called megaraid 77 module will be called megaraid
78endif 78endif
79
80config MEGARAID_SAS
81 tristate "LSI Logic MegaRAID SAS RAID Module"
82 depends on PCI && SCSI
83 help
84 Module for LSI Logic's SAS based RAID controllers.
85 To compile this driver as a module, choose 'm' here.
86 Module will be called megaraid_sas
87
diff --git a/drivers/scsi/megaraid/Makefile b/drivers/scsi/megaraid/Makefile
index 6dd99f275722..f469915b97c3 100644
--- a/drivers/scsi/megaraid/Makefile
+++ b/drivers/scsi/megaraid/Makefile
@@ -1,2 +1,3 @@
1obj-$(CONFIG_MEGARAID_MM) += megaraid_mm.o 1obj-$(CONFIG_MEGARAID_MM) += megaraid_mm.o
2obj-$(CONFIG_MEGARAID_MAILBOX) += megaraid_mbox.o 2obj-$(CONFIG_MEGARAID_MAILBOX) += megaraid_mbox.o
3obj-$(CONFIG_MEGARAID_SAS) += megaraid_sas.o
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
new file mode 100644
index 000000000000..c3f637395734
--- /dev/null
+++ b/drivers/scsi/megaraid/megaraid_sas.c
@@ -0,0 +1,2806 @@
1/*
2 *
3 * Linux MegaRAID driver for SAS based RAID controllers
4 *
5 * Copyright (c) 2003-2005 LSI Logic Corporation.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * FILE : megaraid_sas.c
13 * Version : v00.00.02.00-rc4
14 *
15 * Authors:
16 * Sreenivas Bagalkote <Sreenivas.Bagalkote@lsil.com>
17 * Sumant Patro <Sumant.Patro@lsil.com>
18 *
19 * List of supported controllers
20 *
21 * OEM Product Name VID DID SSVID SSID
22 * --- ------------ --- --- ---- ----
23 */
24
25#include <linux/kernel.h>
26#include <linux/types.h>
27#include <linux/pci.h>
28#include <linux/list.h>
29#include <linux/version.h>
30#include <linux/moduleparam.h>
31#include <linux/module.h>
32#include <linux/spinlock.h>
33#include <linux/interrupt.h>
34#include <linux/delay.h>
35#include <linux/uio.h>
36#include <asm/uaccess.h>
37#include <linux/fs.h>
38#include <linux/compat.h>
39
40#include <scsi/scsi.h>
41#include <scsi/scsi_cmnd.h>
42#include <scsi/scsi_device.h>
43#include <scsi/scsi_host.h>
44#include "megaraid_sas.h"
45
46MODULE_LICENSE("GPL");
47MODULE_VERSION(MEGASAS_VERSION);
48MODULE_AUTHOR("sreenivas.bagalkote@lsil.com");
49MODULE_DESCRIPTION("LSI Logic MegaRAID SAS Driver");
50
51/*
52 * PCI ID table for all supported controllers
53 */
54static struct pci_device_id megasas_pci_table[] = {
55
56 {
57 PCI_VENDOR_ID_LSI_LOGIC,
58 PCI_DEVICE_ID_LSI_SAS1064R,
59 PCI_ANY_ID,
60 PCI_ANY_ID,
61 },
62 {
63 PCI_VENDOR_ID_DELL,
64 PCI_DEVICE_ID_DELL_PERC5,
65 PCI_ANY_ID,
66 PCI_ANY_ID,
67 },
68 {0} /* Terminating entry */
69};
70
71MODULE_DEVICE_TABLE(pci, megasas_pci_table);
72
73static int megasas_mgmt_majorno;
74static struct megasas_mgmt_info megasas_mgmt_info;
75static struct fasync_struct *megasas_async_queue;
76static DECLARE_MUTEX(megasas_async_queue_mutex);
77
78/**
79 * megasas_get_cmd - Get a command from the free pool
80 * @instance: Adapter soft state
81 *
82 * Returns a free command from the pool
83 */
84static inline struct megasas_cmd *megasas_get_cmd(struct megasas_instance
85 *instance)
86{
87 unsigned long flags;
88 struct megasas_cmd *cmd = NULL;
89
90 spin_lock_irqsave(&instance->cmd_pool_lock, flags);
91
92 if (!list_empty(&instance->cmd_pool)) {
93 cmd = list_entry((&instance->cmd_pool)->next,
94 struct megasas_cmd, list);
95 list_del_init(&cmd->list);
96 } else {
97 printk(KERN_ERR "megasas: Command pool empty!\n");
98 }
99
100 spin_unlock_irqrestore(&instance->cmd_pool_lock, flags);
101 return cmd;
102}
103
104/**
105 * megasas_return_cmd - Return a cmd to free command pool
106 * @instance: Adapter soft state
107 * @cmd: Command packet to be returned to free command pool
108 */
109static inline void
110megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
111{
112 unsigned long flags;
113
114 spin_lock_irqsave(&instance->cmd_pool_lock, flags);
115
116 cmd->scmd = NULL;
117 list_add_tail(&cmd->list, &instance->cmd_pool);
118
119 spin_unlock_irqrestore(&instance->cmd_pool_lock, flags);
120}
121
122/**
123 * megasas_enable_intr - Enables interrupts
124 * @regs: MFI register set
125 */
126static inline void
127megasas_enable_intr(struct megasas_register_set __iomem * regs)
128{
129 writel(1, &(regs)->outbound_intr_mask);
130
131 /* Dummy readl to force pci flush */
132 readl(&regs->outbound_intr_mask);
133}
134
135/**
136 * megasas_disable_intr - Disables interrupts
137 * @regs: MFI register set
138 */
139static inline void
140megasas_disable_intr(struct megasas_register_set __iomem * regs)
141{
142 u32 mask = readl(&regs->outbound_intr_mask) & (~0x00000001);
143 writel(mask, &regs->outbound_intr_mask);
144
145 /* Dummy readl to force pci flush */
146 readl(&regs->outbound_intr_mask);
147}
148
149/**
150 * megasas_issue_polled - Issues a polling command
151 * @instance: Adapter soft state
152 * @cmd: Command packet to be issued
153 *
154 * For polling, MFI requires the cmd_status to be set to 0xFF before posting.
155 */
156static int
157megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
158{
159 int i;
160 u32 msecs = MFI_POLL_TIMEOUT_SECS * 1000;
161
162 struct megasas_header *frame_hdr = &cmd->frame->hdr;
163
164 frame_hdr->cmd_status = 0xFF;
165 frame_hdr->flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
166
167 /*
168 * Issue the frame using inbound queue port
169 */
170 writel(cmd->frame_phys_addr >> 3,
171 &instance->reg_set->inbound_queue_port);
172
173 /*
174 * Wait for cmd_status to change
175 */
176 for (i = 0; (i < msecs) && (frame_hdr->cmd_status == 0xff); i++) {
177 rmb();
178 msleep(1);
179 }
180
181 if (frame_hdr->cmd_status == 0xff)
182 return -ETIME;
183
184 return 0;
185}
186
187/**
188 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
189 * @instance: Adapter soft state
190 * @cmd: Command to be issued
191 *
192 * This function waits on an event for the command to be returned from ISR.
193 * Used to issue ioctl commands.
194 */
195static int
196megasas_issue_blocked_cmd(struct megasas_instance *instance,
197 struct megasas_cmd *cmd)
198{
199 cmd->cmd_status = ENODATA;
200
201 writel(cmd->frame_phys_addr >> 3,
202 &instance->reg_set->inbound_queue_port);
203
204 wait_event(instance->int_cmd_wait_q, (cmd->cmd_status != ENODATA));
205
206 return 0;
207}
208
209/**
210 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
211 * @instance: Adapter soft state
212 * @cmd_to_abort: Previously issued cmd to be aborted
213 *
214 * MFI firmware can abort previously issued AEN comamnd (automatic event
215 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
216 * cmd and blocks till it is completed.
217 */
218static int
219megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
220 struct megasas_cmd *cmd_to_abort)
221{
222 struct megasas_cmd *cmd;
223 struct megasas_abort_frame *abort_fr;
224
225 cmd = megasas_get_cmd(instance);
226
227 if (!cmd)
228 return -1;
229
230 abort_fr = &cmd->frame->abort;
231
232 /*
233 * Prepare and issue the abort frame
234 */
235 abort_fr->cmd = MFI_CMD_ABORT;
236 abort_fr->cmd_status = 0xFF;
237 abort_fr->flags = 0;
238 abort_fr->abort_context = cmd_to_abort->index;
239 abort_fr->abort_mfi_phys_addr_lo = cmd_to_abort->frame_phys_addr;
240 abort_fr->abort_mfi_phys_addr_hi = 0;
241
242 cmd->sync_cmd = 1;
243 cmd->cmd_status = 0xFF;
244
245 writel(cmd->frame_phys_addr >> 3,
246 &instance->reg_set->inbound_queue_port);
247
248 /*
249 * Wait for this cmd to complete
250 */
251 wait_event(instance->abort_cmd_wait_q, (cmd->cmd_status != 0xFF));
252
253 megasas_return_cmd(instance, cmd);
254 return 0;
255}
256
257/**
258 * megasas_make_sgl32 - Prepares 32-bit SGL
259 * @instance: Adapter soft state
260 * @scp: SCSI command from the mid-layer
261 * @mfi_sgl: SGL to be filled in
262 *
263 * If successful, this function returns the number of SG elements. Otherwise,
264 * it returnes -1.
265 */
266static inline int
267megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
268 union megasas_sgl *mfi_sgl)
269{
270 int i;
271 int sge_count;
272 struct scatterlist *os_sgl;
273
274 /*
275 * Return 0 if there is no data transfer
276 */
277 if (!scp->request_buffer || !scp->request_bufflen)
278 return 0;
279
280 if (!scp->use_sg) {
281 mfi_sgl->sge32[0].phys_addr = pci_map_single(instance->pdev,
282 scp->
283 request_buffer,
284 scp->
285 request_bufflen,
286 scp->
287 sc_data_direction);
288 mfi_sgl->sge32[0].length = scp->request_bufflen;
289
290 return 1;
291 }
292
293 os_sgl = (struct scatterlist *)scp->request_buffer;
294 sge_count = pci_map_sg(instance->pdev, os_sgl, scp->use_sg,
295 scp->sc_data_direction);
296
297 for (i = 0; i < sge_count; i++, os_sgl++) {
298 mfi_sgl->sge32[i].length = sg_dma_len(os_sgl);
299 mfi_sgl->sge32[i].phys_addr = sg_dma_address(os_sgl);
300 }
301
302 return sge_count;
303}
304
305/**
306 * megasas_make_sgl64 - Prepares 64-bit SGL
307 * @instance: Adapter soft state
308 * @scp: SCSI command from the mid-layer
309 * @mfi_sgl: SGL to be filled in
310 *
311 * If successful, this function returns the number of SG elements. Otherwise,
312 * it returnes -1.
313 */
314static inline int
315megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
316 union megasas_sgl *mfi_sgl)
317{
318 int i;
319 int sge_count;
320 struct scatterlist *os_sgl;
321
322 /*
323 * Return 0 if there is no data transfer
324 */
325 if (!scp->request_buffer || !scp->request_bufflen)
326 return 0;
327
328 if (!scp->use_sg) {
329 mfi_sgl->sge64[0].phys_addr = pci_map_single(instance->pdev,
330 scp->
331 request_buffer,
332 scp->
333 request_bufflen,
334 scp->
335 sc_data_direction);
336
337 mfi_sgl->sge64[0].length = scp->request_bufflen;
338
339 return 1;
340 }
341
342 os_sgl = (struct scatterlist *)scp->request_buffer;
343 sge_count = pci_map_sg(instance->pdev, os_sgl, scp->use_sg,
344 scp->sc_data_direction);
345
346 for (i = 0; i < sge_count; i++, os_sgl++) {
347 mfi_sgl->sge64[i].length = sg_dma_len(os_sgl);
348 mfi_sgl->sge64[i].phys_addr = sg_dma_address(os_sgl);
349 }
350
351 return sge_count;
352}
353
354/**
355 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
356 * @instance: Adapter soft state
357 * @scp: SCSI command
358 * @cmd: Command to be prepared in
359 *
360 * This function prepares CDB commands. These are typcially pass-through
361 * commands to the devices.
362 */
363static inline int
364megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
365 struct megasas_cmd *cmd)
366{
367 u32 sge_sz;
368 int sge_bytes;
369 u32 is_logical;
370 u32 device_id;
371 u16 flags = 0;
372 struct megasas_pthru_frame *pthru;
373
374 is_logical = MEGASAS_IS_LOGICAL(scp);
375 device_id = MEGASAS_DEV_INDEX(instance, scp);
376 pthru = (struct megasas_pthru_frame *)cmd->frame;
377
378 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
379 flags = MFI_FRAME_DIR_WRITE;
380 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
381 flags = MFI_FRAME_DIR_READ;
382 else if (scp->sc_data_direction == PCI_DMA_NONE)
383 flags = MFI_FRAME_DIR_NONE;
384
385 /*
386 * Prepare the DCDB frame
387 */
388 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
389 pthru->cmd_status = 0x0;
390 pthru->scsi_status = 0x0;
391 pthru->target_id = device_id;
392 pthru->lun = scp->device->lun;
393 pthru->cdb_len = scp->cmd_len;
394 pthru->timeout = 0;
395 pthru->flags = flags;
396 pthru->data_xfer_len = scp->request_bufflen;
397
398 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
399
400 /*
401 * Construct SGL
402 */
403 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
404 sizeof(struct megasas_sge32);
405
406 if (IS_DMA64) {
407 pthru->flags |= MFI_FRAME_SGL64;
408 pthru->sge_count = megasas_make_sgl64(instance, scp,
409 &pthru->sgl);
410 } else
411 pthru->sge_count = megasas_make_sgl32(instance, scp,
412 &pthru->sgl);
413
414 /*
415 * Sense info specific
416 */
417 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
418 pthru->sense_buf_phys_addr_hi = 0;
419 pthru->sense_buf_phys_addr_lo = cmd->sense_phys_addr;
420
421 sge_bytes = sge_sz * pthru->sge_count;
422
423 /*
424 * Compute the total number of frames this command consumes. FW uses
425 * this number to pull sufficient number of frames from host memory.
426 */
427 cmd->frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
428 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) + 1;
429
430 if (cmd->frame_count > 7)
431 cmd->frame_count = 8;
432
433 return cmd->frame_count;
434}
435
436/**
437 * megasas_build_ldio - Prepares IOs to logical devices
438 * @instance: Adapter soft state
439 * @scp: SCSI command
440 * @cmd: Command to to be prepared
441 *
442 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
443 */
444static inline int
445megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
446 struct megasas_cmd *cmd)
447{
448 u32 sge_sz;
449 int sge_bytes;
450 u32 device_id;
451 u8 sc = scp->cmnd[0];
452 u16 flags = 0;
453 struct megasas_io_frame *ldio;
454
455 device_id = MEGASAS_DEV_INDEX(instance, scp);
456 ldio = (struct megasas_io_frame *)cmd->frame;
457
458 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
459 flags = MFI_FRAME_DIR_WRITE;
460 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
461 flags = MFI_FRAME_DIR_READ;
462
463 /*
464 * Preare the Logical IO frame: 2nd bit is zero for all read cmds
465 */
466 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
467 ldio->cmd_status = 0x0;
468 ldio->scsi_status = 0x0;
469 ldio->target_id = device_id;
470 ldio->timeout = 0;
471 ldio->reserved_0 = 0;
472 ldio->pad_0 = 0;
473 ldio->flags = flags;
474 ldio->start_lba_hi = 0;
475 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
476
477 /*
478 * 6-byte READ(0x08) or WRITE(0x0A) cdb
479 */
480 if (scp->cmd_len == 6) {
481 ldio->lba_count = (u32) scp->cmnd[4];
482 ldio->start_lba_lo = ((u32) scp->cmnd[1] << 16) |
483 ((u32) scp->cmnd[2] << 8) | (u32) scp->cmnd[3];
484
485 ldio->start_lba_lo &= 0x1FFFFF;
486 }
487
488 /*
489 * 10-byte READ(0x28) or WRITE(0x2A) cdb
490 */
491 else if (scp->cmd_len == 10) {
492 ldio->lba_count = (u32) scp->cmnd[8] |
493 ((u32) scp->cmnd[7] << 8);
494 ldio->start_lba_lo = ((u32) scp->cmnd[2] << 24) |
495 ((u32) scp->cmnd[3] << 16) |
496 ((u32) scp->cmnd[4] << 8) | (u32) scp->cmnd[5];
497 }
498
499 /*
500 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
501 */
502 else if (scp->cmd_len == 12) {
503 ldio->lba_count = ((u32) scp->cmnd[6] << 24) |
504 ((u32) scp->cmnd[7] << 16) |
505 ((u32) scp->cmnd[8] << 8) | (u32) scp->cmnd[9];
506
507 ldio->start_lba_lo = ((u32) scp->cmnd[2] << 24) |
508 ((u32) scp->cmnd[3] << 16) |
509 ((u32) scp->cmnd[4] << 8) | (u32) scp->cmnd[5];
510 }
511
512 /*
513 * 16-byte READ(0x88) or WRITE(0x8A) cdb
514 */
515 else if (scp->cmd_len == 16) {
516 ldio->lba_count = ((u32) scp->cmnd[10] << 24) |
517 ((u32) scp->cmnd[11] << 16) |
518 ((u32) scp->cmnd[12] << 8) | (u32) scp->cmnd[13];
519
520 ldio->start_lba_lo = ((u32) scp->cmnd[6] << 24) |
521 ((u32) scp->cmnd[7] << 16) |
522 ((u32) scp->cmnd[8] << 8) | (u32) scp->cmnd[9];
523
524 ldio->start_lba_hi = ((u32) scp->cmnd[2] << 24) |
525 ((u32) scp->cmnd[3] << 16) |
526 ((u32) scp->cmnd[4] << 8) | (u32) scp->cmnd[5];
527
528 }
529
530 /*
531 * Construct SGL
532 */
533 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
534 sizeof(struct megasas_sge32);
535
536 if (IS_DMA64) {
537 ldio->flags |= MFI_FRAME_SGL64;
538 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
539 } else
540 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
541
542 /*
543 * Sense info specific
544 */
545 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
546 ldio->sense_buf_phys_addr_hi = 0;
547 ldio->sense_buf_phys_addr_lo = cmd->sense_phys_addr;
548
549 sge_bytes = sge_sz * ldio->sge_count;
550
551 cmd->frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
552 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) + 1;
553
554 if (cmd->frame_count > 7)
555 cmd->frame_count = 8;
556
557 return cmd->frame_count;
558}
559
560/**
561 * megasas_build_cmd - Prepares a command packet
562 * @instance: Adapter soft state
563 * @scp: SCSI command
564 * @frame_count: [OUT] Number of frames used to prepare this command
565 */
566static inline struct megasas_cmd *megasas_build_cmd(struct megasas_instance
567 *instance,
568 struct scsi_cmnd *scp,
569 int *frame_count)
570{
571 u32 logical_cmd;
572 struct megasas_cmd *cmd;
573
574 /*
575 * Find out if this is logical or physical drive command.
576 */
577 logical_cmd = MEGASAS_IS_LOGICAL(scp);
578
579 /*
580 * Logical drive command
581 */
582 if (logical_cmd) {
583
584 if (scp->device->id >= MEGASAS_MAX_LD) {
585 scp->result = DID_BAD_TARGET << 16;
586 return NULL;
587 }
588
589 switch (scp->cmnd[0]) {
590
591 case READ_10:
592 case WRITE_10:
593 case READ_12:
594 case WRITE_12:
595 case READ_6:
596 case WRITE_6:
597 case READ_16:
598 case WRITE_16:
599 /*
600 * Fail for LUN > 0
601 */
602 if (scp->device->lun) {
603 scp->result = DID_BAD_TARGET << 16;
604 return NULL;
605 }
606
607 cmd = megasas_get_cmd(instance);
608
609 if (!cmd) {
610 scp->result = DID_IMM_RETRY << 16;
611 return NULL;
612 }
613
614 *frame_count = megasas_build_ldio(instance, scp, cmd);
615
616 if (!(*frame_count)) {
617 megasas_return_cmd(instance, cmd);
618 return NULL;
619 }
620
621 return cmd;
622
623 default:
624 /*
625 * Fail for LUN > 0
626 */
627 if (scp->device->lun) {
628 scp->result = DID_BAD_TARGET << 16;
629 return NULL;
630 }
631
632 cmd = megasas_get_cmd(instance);
633
634 if (!cmd) {
635 scp->result = DID_IMM_RETRY << 16;
636 return NULL;
637 }
638
639 *frame_count = megasas_build_dcdb(instance, scp, cmd);
640
641 if (!(*frame_count)) {
642 megasas_return_cmd(instance, cmd);
643 return NULL;
644 }
645
646 return cmd;
647 }
648 } else {
649 cmd = megasas_get_cmd(instance);
650
651 if (!cmd) {
652 scp->result = DID_IMM_RETRY << 16;
653 return NULL;
654 }
655
656 *frame_count = megasas_build_dcdb(instance, scp, cmd);
657
658 if (!(*frame_count)) {
659 megasas_return_cmd(instance, cmd);
660 return NULL;
661 }
662
663 return cmd;
664 }
665
666 return NULL;
667}
668
669/**
670 * megasas_queue_command - Queue entry point
671 * @scmd: SCSI command to be queued
672 * @done: Callback entry point
673 */
674static int
675megasas_queue_command(struct scsi_cmnd *scmd, void (*done) (struct scsi_cmnd *))
676{
677 u32 frame_count;
678 unsigned long flags;
679 struct megasas_cmd *cmd;
680 struct megasas_instance *instance;
681
682 instance = (struct megasas_instance *)
683 scmd->device->host->hostdata;
684 scmd->scsi_done = done;
685 scmd->result = 0;
686
687 cmd = megasas_build_cmd(instance, scmd, &frame_count);
688
689 if (!cmd) {
690 done(scmd);
691 return 0;
692 }
693
694 cmd->scmd = scmd;
695 scmd->SCp.ptr = (char *)cmd;
696 scmd->SCp.sent_command = jiffies;
697
698 /*
699 * Issue the command to the FW
700 */
701 spin_lock_irqsave(&instance->instance_lock, flags);
702 instance->fw_outstanding++;
703 spin_unlock_irqrestore(&instance->instance_lock, flags);
704
705 writel(((cmd->frame_phys_addr >> 3) | (cmd->frame_count - 1)),
706 &instance->reg_set->inbound_queue_port);
707
708 return 0;
709}
710
711/**
712 * megasas_wait_for_outstanding - Wait for all outstanding cmds
713 * @instance: Adapter soft state
714 *
715 * This function waits for upto MEGASAS_RESET_WAIT_TIME seconds for FW to
716 * complete all its outstanding commands. Returns error if one or more IOs
717 * are pending after this time period. It also marks the controller dead.
718 */
719static int megasas_wait_for_outstanding(struct megasas_instance *instance)
720{
721 int i;
722 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
723
724 for (i = 0; i < wait_time; i++) {
725
726 if (!instance->fw_outstanding)
727 break;
728
729 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
730 printk(KERN_NOTICE "megasas: [%2d]waiting for %d "
731 "commands to complete\n", i,
732 instance->fw_outstanding);
733 }
734
735 msleep(1000);
736 }
737
738 if (instance->fw_outstanding) {
739 instance->hw_crit_error = 1;
740 return FAILED;
741 }
742
743 return SUCCESS;
744}
745
746/**
747 * megasas_generic_reset - Generic reset routine
748 * @scmd: Mid-layer SCSI command
749 *
750 * This routine implements a generic reset handler for device, bus and host
751 * reset requests. Device, bus and host specific reset handlers can use this
752 * function after they do their specific tasks.
753 */
754static int megasas_generic_reset(struct scsi_cmnd *scmd)
755{
756 int ret_val;
757 struct megasas_instance *instance;
758
759 instance = (struct megasas_instance *)scmd->device->host->hostdata;
760
761 printk(KERN_NOTICE "megasas: RESET -%ld cmd=%x <c=%d t=%d l=%d>\n",
762 scmd->serial_number, scmd->cmnd[0], scmd->device->channel,
763 scmd->device->id, scmd->device->lun);
764
765 if (instance->hw_crit_error) {
766 printk(KERN_ERR "megasas: cannot recover from previous reset "
767 "failures\n");
768 return FAILED;
769 }
770
771 spin_unlock(scmd->device->host->host_lock);
772
773 ret_val = megasas_wait_for_outstanding(instance);
774
775 if (ret_val == SUCCESS)
776 printk(KERN_NOTICE "megasas: reset successful \n");
777 else
778 printk(KERN_ERR "megasas: failed to do reset\n");
779
780 spin_lock(scmd->device->host->host_lock);
781
782 return ret_val;
783}
784
785static enum scsi_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
786{
787 unsigned long seconds;
788
789 if (scmd->SCp.ptr) {
790 seconds = (jiffies - scmd->SCp.sent_command) / HZ;
791
792 if (seconds < 90) {
793 return EH_RESET_TIMER;
794 } else {
795 return EH_NOT_HANDLED;
796 }
797 }
798
799 return EH_HANDLED;
800}
801
802/**
803 * megasas_reset_device - Device reset handler entry point
804 */
805static int megasas_reset_device(struct scsi_cmnd *scmd)
806{
807 int ret;
808
809 /*
810 * First wait for all commands to complete
811 */
812 ret = megasas_generic_reset(scmd);
813
814 return ret;
815}
816
817/**
818 * megasas_reset_bus_host - Bus & host reset handler entry point
819 */
820static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
821{
822 int ret;
823
824 /*
825 * Frist wait for all commands to complete
826 */
827 ret = megasas_generic_reset(scmd);
828
829 return ret;
830}
831
832/**
833 * megasas_service_aen - Processes an event notification
834 * @instance: Adapter soft state
835 * @cmd: AEN command completed by the ISR
836 *
837 * For AEN, driver sends a command down to FW that is held by the FW till an
838 * event occurs. When an event of interest occurs, FW completes the command
839 * that it was previously holding.
840 *
841 * This routines sends SIGIO signal to processes that have registered with the
842 * driver for AEN.
843 */
844static void
845megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
846{
847 /*
848 * Don't signal app if it is just an aborted previously registered aen
849 */
850 if (!cmd->abort_aen)
851 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
852 else
853 cmd->abort_aen = 0;
854
855 instance->aen_cmd = NULL;
856 megasas_return_cmd(instance, cmd);
857}
858
859/*
860 * Scsi host template for megaraid_sas driver
861 */
862static struct scsi_host_template megasas_template = {
863
864 .module = THIS_MODULE,
865 .name = "LSI Logic SAS based MegaRAID driver",
866 .proc_name = "megaraid_sas",
867 .queuecommand = megasas_queue_command,
868 .eh_device_reset_handler = megasas_reset_device,
869 .eh_bus_reset_handler = megasas_reset_bus_host,
870 .eh_host_reset_handler = megasas_reset_bus_host,
871 .eh_timed_out = megasas_reset_timer,
872 .use_clustering = ENABLE_CLUSTERING,
873};
874
875/**
876 * megasas_complete_int_cmd - Completes an internal command
877 * @instance: Adapter soft state
878 * @cmd: Command to be completed
879 *
880 * The megasas_issue_blocked_cmd() function waits for a command to complete
881 * after it issues a command. This function wakes up that waiting routine by
882 * calling wake_up() on the wait queue.
883 */
884static void
885megasas_complete_int_cmd(struct megasas_instance *instance,
886 struct megasas_cmd *cmd)
887{
888 cmd->cmd_status = cmd->frame->io.cmd_status;
889
890 if (cmd->cmd_status == ENODATA) {
891 cmd->cmd_status = 0;
892 }
893 wake_up(&instance->int_cmd_wait_q);
894}
895
896/**
897 * megasas_complete_abort - Completes aborting a command
898 * @instance: Adapter soft state
899 * @cmd: Cmd that was issued to abort another cmd
900 *
901 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
902 * after it issues an abort on a previously issued command. This function
903 * wakes up all functions waiting on the same wait queue.
904 */
905static void
906megasas_complete_abort(struct megasas_instance *instance,
907 struct megasas_cmd *cmd)
908{
909 if (cmd->sync_cmd) {
910 cmd->sync_cmd = 0;
911 cmd->cmd_status = 0;
912 wake_up(&instance->abort_cmd_wait_q);
913 }
914
915 return;
916}
917
918/**
919 * megasas_unmap_sgbuf - Unmap SG buffers
920 * @instance: Adapter soft state
921 * @cmd: Completed command
922 */
923static inline void
924megasas_unmap_sgbuf(struct megasas_instance *instance, struct megasas_cmd *cmd)
925{
926 dma_addr_t buf_h;
927 u8 opcode;
928
929 if (cmd->scmd->use_sg) {
930 pci_unmap_sg(instance->pdev, cmd->scmd->request_buffer,
931 cmd->scmd->use_sg, cmd->scmd->sc_data_direction);
932 return;
933 }
934
935 if (!cmd->scmd->request_bufflen)
936 return;
937
938 opcode = cmd->frame->hdr.cmd;
939
940 if ((opcode == MFI_CMD_LD_READ) || (opcode == MFI_CMD_LD_WRITE)) {
941 if (IS_DMA64)
942 buf_h = cmd->frame->io.sgl.sge64[0].phys_addr;
943 else
944 buf_h = cmd->frame->io.sgl.sge32[0].phys_addr;
945 } else {
946 if (IS_DMA64)
947 buf_h = cmd->frame->pthru.sgl.sge64[0].phys_addr;
948 else
949 buf_h = cmd->frame->pthru.sgl.sge32[0].phys_addr;
950 }
951
952 pci_unmap_single(instance->pdev, buf_h, cmd->scmd->request_bufflen,
953 cmd->scmd->sc_data_direction);
954 return;
955}
956
957/**
958 * megasas_complete_cmd - Completes a command
959 * @instance: Adapter soft state
960 * @cmd: Command to be completed
961 * @alt_status: If non-zero, use this value as status to
962 * SCSI mid-layer instead of the value returned
963 * by the FW. This should be used if caller wants
964 * an alternate status (as in the case of aborted
965 * commands)
966 */
967static inline void
968megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
969 u8 alt_status)
970{
971 int exception = 0;
972 struct megasas_header *hdr = &cmd->frame->hdr;
973 unsigned long flags;
974
975 if (cmd->scmd) {
976 cmd->scmd->SCp.ptr = (char *)0;
977 }
978
979 switch (hdr->cmd) {
980
981 case MFI_CMD_PD_SCSI_IO:
982 case MFI_CMD_LD_SCSI_IO:
983
984 /*
985 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
986 * issued either through an IO path or an IOCTL path. If it
987 * was via IOCTL, we will send it to internal completion.
988 */
989 if (cmd->sync_cmd) {
990 cmd->sync_cmd = 0;
991 megasas_complete_int_cmd(instance, cmd);
992 break;
993 }
994
995 /*
996 * Don't export physical disk devices to mid-layer.
997 */
998 if (!MEGASAS_IS_LOGICAL(cmd->scmd) &&
999 (hdr->cmd_status == MFI_STAT_OK) &&
1000 (cmd->scmd->cmnd[0] == INQUIRY)) {
1001
1002 if (((*(u8 *) cmd->scmd->request_buffer) & 0x1F) ==
1003 TYPE_DISK) {
1004 cmd->scmd->result = DID_BAD_TARGET << 16;
1005 exception = 1;
1006 }
1007 }
1008
1009 case MFI_CMD_LD_READ:
1010 case MFI_CMD_LD_WRITE:
1011
1012 if (alt_status) {
1013 cmd->scmd->result = alt_status << 16;
1014 exception = 1;
1015 }
1016
1017 if (exception) {
1018
1019 spin_lock_irqsave(&instance->instance_lock, flags);
1020 instance->fw_outstanding--;
1021 spin_unlock_irqrestore(&instance->instance_lock, flags);
1022
1023 megasas_unmap_sgbuf(instance, cmd);
1024 cmd->scmd->scsi_done(cmd->scmd);
1025 megasas_return_cmd(instance, cmd);
1026
1027 break;
1028 }
1029
1030 switch (hdr->cmd_status) {
1031
1032 case MFI_STAT_OK:
1033 cmd->scmd->result = DID_OK << 16;
1034 break;
1035
1036 case MFI_STAT_SCSI_IO_FAILED:
1037 case MFI_STAT_LD_INIT_IN_PROGRESS:
1038 cmd->scmd->result =
1039 (DID_ERROR << 16) | hdr->scsi_status;
1040 break;
1041
1042 case MFI_STAT_SCSI_DONE_WITH_ERROR:
1043
1044 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
1045
1046 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
1047 memset(cmd->scmd->sense_buffer, 0,
1048 SCSI_SENSE_BUFFERSIZE);
1049 memcpy(cmd->scmd->sense_buffer, cmd->sense,
1050 hdr->sense_len);
1051
1052 cmd->scmd->result |= DRIVER_SENSE << 24;
1053 }
1054
1055 break;
1056
1057 case MFI_STAT_LD_OFFLINE:
1058 case MFI_STAT_DEVICE_NOT_FOUND:
1059 cmd->scmd->result = DID_BAD_TARGET << 16;
1060 break;
1061
1062 default:
1063 printk(KERN_DEBUG "megasas: MFI FW status %#x\n",
1064 hdr->cmd_status);
1065 cmd->scmd->result = DID_ERROR << 16;
1066 break;
1067 }
1068
1069 spin_lock_irqsave(&instance->instance_lock, flags);
1070 instance->fw_outstanding--;
1071 spin_unlock_irqrestore(&instance->instance_lock, flags);
1072
1073 megasas_unmap_sgbuf(instance, cmd);
1074 cmd->scmd->scsi_done(cmd->scmd);
1075 megasas_return_cmd(instance, cmd);
1076
1077 break;
1078
1079 case MFI_CMD_SMP:
1080 case MFI_CMD_STP:
1081 case MFI_CMD_DCMD:
1082
1083 /*
1084 * See if got an event notification
1085 */
1086 if (cmd->frame->dcmd.opcode == MR_DCMD_CTRL_EVENT_WAIT)
1087 megasas_service_aen(instance, cmd);
1088 else
1089 megasas_complete_int_cmd(instance, cmd);
1090
1091 break;
1092
1093 case MFI_CMD_ABORT:
1094 /*
1095 * Cmd issued to abort another cmd returned
1096 */
1097 megasas_complete_abort(instance, cmd);
1098 break;
1099
1100 default:
1101 printk("megasas: Unknown command completed! [0x%X]\n",
1102 hdr->cmd);
1103 break;
1104 }
1105}
1106
1107/**
1108 * megasas_deplete_reply_queue - Processes all completed commands
1109 * @instance: Adapter soft state
1110 * @alt_status: Alternate status to be returned to
1111 * SCSI mid-layer instead of the status
1112 * returned by the FW
1113 */
1114static inline int
1115megasas_deplete_reply_queue(struct megasas_instance *instance, u8 alt_status)
1116{
1117 u32 status;
1118 u32 producer;
1119 u32 consumer;
1120 u32 context;
1121 struct megasas_cmd *cmd;
1122
1123 /*
1124 * Check if it is our interrupt
1125 */
1126 status = readl(&instance->reg_set->outbound_intr_status);
1127
1128 if (!(status & MFI_OB_INTR_STATUS_MASK)) {
1129 return IRQ_NONE;
1130 }
1131
1132 /*
1133 * Clear the interrupt by writing back the same value
1134 */
1135 writel(status, &instance->reg_set->outbound_intr_status);
1136
1137 producer = *instance->producer;
1138 consumer = *instance->consumer;
1139
1140 while (consumer != producer) {
1141 context = instance->reply_queue[consumer];
1142
1143 cmd = instance->cmd_list[context];
1144
1145 megasas_complete_cmd(instance, cmd, alt_status);
1146
1147 consumer++;
1148 if (consumer == (instance->max_fw_cmds + 1)) {
1149 consumer = 0;
1150 }
1151 }
1152
1153 *instance->consumer = producer;
1154
1155 return IRQ_HANDLED;
1156}
1157
1158/**
1159 * megasas_isr - isr entry point
1160 */
1161static irqreturn_t megasas_isr(int irq, void *devp, struct pt_regs *regs)
1162{
1163 return megasas_deplete_reply_queue((struct megasas_instance *)devp,
1164 DID_OK);
1165}
1166
1167/**
1168 * megasas_transition_to_ready - Move the FW to READY state
1169 * @reg_set: MFI register set
1170 *
1171 * During the initialization, FW passes can potentially be in any one of
1172 * several possible states. If the FW in operational, waiting-for-handshake
1173 * states, driver must take steps to bring it to ready state. Otherwise, it
1174 * has to wait for the ready state.
1175 */
1176static int
1177megasas_transition_to_ready(struct megasas_register_set __iomem * reg_set)
1178{
1179 int i;
1180 u8 max_wait;
1181 u32 fw_state;
1182 u32 cur_state;
1183
1184 fw_state = readl(&reg_set->outbound_msg_0) & MFI_STATE_MASK;
1185
1186 while (fw_state != MFI_STATE_READY) {
1187
1188 printk(KERN_INFO "megasas: Waiting for FW to come to ready"
1189 " state\n");
1190 switch (fw_state) {
1191
1192 case MFI_STATE_FAULT:
1193
1194 printk(KERN_DEBUG "megasas: FW in FAULT state!!\n");
1195 return -ENODEV;
1196
1197 case MFI_STATE_WAIT_HANDSHAKE:
1198 /*
1199 * Set the CLR bit in inbound doorbell
1200 */
1201 writel(MFI_INIT_CLEAR_HANDSHAKE,
1202 &reg_set->inbound_doorbell);
1203
1204 max_wait = 2;
1205 cur_state = MFI_STATE_WAIT_HANDSHAKE;
1206 break;
1207
1208 case MFI_STATE_OPERATIONAL:
1209 /*
1210 * Bring it to READY state; assuming max wait 2 secs
1211 */
1212 megasas_disable_intr(reg_set);
1213 writel(MFI_INIT_READY, &reg_set->inbound_doorbell);
1214
1215 max_wait = 10;
1216 cur_state = MFI_STATE_OPERATIONAL;
1217 break;
1218
1219 case MFI_STATE_UNDEFINED:
1220 /*
1221 * This state should not last for more than 2 seconds
1222 */
1223 max_wait = 2;
1224 cur_state = MFI_STATE_UNDEFINED;
1225 break;
1226
1227 case MFI_STATE_BB_INIT:
1228 max_wait = 2;
1229 cur_state = MFI_STATE_BB_INIT;
1230 break;
1231
1232 case MFI_STATE_FW_INIT:
1233 max_wait = 20;
1234 cur_state = MFI_STATE_FW_INIT;
1235 break;
1236
1237 case MFI_STATE_FW_INIT_2:
1238 max_wait = 20;
1239 cur_state = MFI_STATE_FW_INIT_2;
1240 break;
1241
1242 case MFI_STATE_DEVICE_SCAN:
1243 max_wait = 20;
1244 cur_state = MFI_STATE_DEVICE_SCAN;
1245 break;
1246
1247 case MFI_STATE_FLUSH_CACHE:
1248 max_wait = 20;
1249 cur_state = MFI_STATE_FLUSH_CACHE;
1250 break;
1251
1252 default:
1253 printk(KERN_DEBUG "megasas: Unknown state 0x%x\n",
1254 fw_state);
1255 return -ENODEV;
1256 }
1257
1258 /*
1259 * The cur_state should not last for more than max_wait secs
1260 */
1261 for (i = 0; i < (max_wait * 1000); i++) {
1262 fw_state = MFI_STATE_MASK &
1263 readl(&reg_set->outbound_msg_0);
1264
1265 if (fw_state == cur_state) {
1266 msleep(1);
1267 } else
1268 break;
1269 }
1270
1271 /*
1272 * Return error if fw_state hasn't changed after max_wait
1273 */
1274 if (fw_state == cur_state) {
1275 printk(KERN_DEBUG "FW state [%d] hasn't changed "
1276 "in %d secs\n", fw_state, max_wait);
1277 return -ENODEV;
1278 }
1279 };
1280
1281 return 0;
1282}
1283
1284/**
1285 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
1286 * @instance: Adapter soft state
1287 */
1288static void megasas_teardown_frame_pool(struct megasas_instance *instance)
1289{
1290 int i;
1291 u32 max_cmd = instance->max_fw_cmds;
1292 struct megasas_cmd *cmd;
1293
1294 if (!instance->frame_dma_pool)
1295 return;
1296
1297 /*
1298 * Return all frames to pool
1299 */
1300 for (i = 0; i < max_cmd; i++) {
1301
1302 cmd = instance->cmd_list[i];
1303
1304 if (cmd->frame)
1305 pci_pool_free(instance->frame_dma_pool, cmd->frame,
1306 cmd->frame_phys_addr);
1307
1308 if (cmd->sense)
1309 pci_pool_free(instance->sense_dma_pool, cmd->frame,
1310 cmd->sense_phys_addr);
1311 }
1312
1313 /*
1314 * Now destroy the pool itself
1315 */
1316 pci_pool_destroy(instance->frame_dma_pool);
1317 pci_pool_destroy(instance->sense_dma_pool);
1318
1319 instance->frame_dma_pool = NULL;
1320 instance->sense_dma_pool = NULL;
1321}
1322
1323/**
1324 * megasas_create_frame_pool - Creates DMA pool for cmd frames
1325 * @instance: Adapter soft state
1326 *
1327 * Each command packet has an embedded DMA memory buffer that is used for
1328 * filling MFI frame and the SG list that immediately follows the frame. This
1329 * function creates those DMA memory buffers for each command packet by using
1330 * PCI pool facility.
1331 */
1332static int megasas_create_frame_pool(struct megasas_instance *instance)
1333{
1334 int i;
1335 u32 max_cmd;
1336 u32 sge_sz;
1337 u32 sgl_sz;
1338 u32 total_sz;
1339 u32 frame_count;
1340 struct megasas_cmd *cmd;
1341
1342 max_cmd = instance->max_fw_cmds;
1343
1344 /*
1345 * Size of our frame is 64 bytes for MFI frame, followed by max SG
1346 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
1347 */
1348 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1349 sizeof(struct megasas_sge32);
1350
1351 /*
1352 * Calculated the number of 64byte frames required for SGL
1353 */
1354 sgl_sz = sge_sz * instance->max_num_sge;
1355 frame_count = (sgl_sz + MEGAMFI_FRAME_SIZE - 1) / MEGAMFI_FRAME_SIZE;
1356
1357 /*
1358 * We need one extra frame for the MFI command
1359 */
1360 frame_count++;
1361
1362 total_sz = MEGAMFI_FRAME_SIZE * frame_count;
1363 /*
1364 * Use DMA pool facility provided by PCI layer
1365 */
1366 instance->frame_dma_pool = pci_pool_create("megasas frame pool",
1367 instance->pdev, total_sz, 64,
1368 0);
1369
1370 if (!instance->frame_dma_pool) {
1371 printk(KERN_DEBUG "megasas: failed to setup frame pool\n");
1372 return -ENOMEM;
1373 }
1374
1375 instance->sense_dma_pool = pci_pool_create("megasas sense pool",
1376 instance->pdev, 128, 4, 0);
1377
1378 if (!instance->sense_dma_pool) {
1379 printk(KERN_DEBUG "megasas: failed to setup sense pool\n");
1380
1381 pci_pool_destroy(instance->frame_dma_pool);
1382 instance->frame_dma_pool = NULL;
1383
1384 return -ENOMEM;
1385 }
1386
1387 /*
1388 * Allocate and attach a frame to each of the commands in cmd_list.
1389 * By making cmd->index as the context instead of the &cmd, we can
1390 * always use 32bit context regardless of the architecture
1391 */
1392 for (i = 0; i < max_cmd; i++) {
1393
1394 cmd = instance->cmd_list[i];
1395
1396 cmd->frame = pci_pool_alloc(instance->frame_dma_pool,
1397 GFP_KERNEL, &cmd->frame_phys_addr);
1398
1399 cmd->sense = pci_pool_alloc(instance->sense_dma_pool,
1400 GFP_KERNEL, &cmd->sense_phys_addr);
1401
1402 /*
1403 * megasas_teardown_frame_pool() takes care of freeing
1404 * whatever has been allocated
1405 */
1406 if (!cmd->frame || !cmd->sense) {
1407 printk(KERN_DEBUG "megasas: pci_pool_alloc failed \n");
1408 megasas_teardown_frame_pool(instance);
1409 return -ENOMEM;
1410 }
1411
1412 cmd->frame->io.context = cmd->index;
1413 }
1414
1415 return 0;
1416}
1417
1418/**
1419 * megasas_free_cmds - Free all the cmds in the free cmd pool
1420 * @instance: Adapter soft state
1421 */
1422static void megasas_free_cmds(struct megasas_instance *instance)
1423{
1424 int i;
1425 /* First free the MFI frame pool */
1426 megasas_teardown_frame_pool(instance);
1427
1428 /* Free all the commands in the cmd_list */
1429 for (i = 0; i < instance->max_fw_cmds; i++)
1430 kfree(instance->cmd_list[i]);
1431
1432 /* Free the cmd_list buffer itself */
1433 kfree(instance->cmd_list);
1434 instance->cmd_list = NULL;
1435
1436 INIT_LIST_HEAD(&instance->cmd_pool);
1437}
1438
1439/**
1440 * megasas_alloc_cmds - Allocates the command packets
1441 * @instance: Adapter soft state
1442 *
1443 * Each command that is issued to the FW, whether IO commands from the OS or
1444 * internal commands like IOCTLs, are wrapped in local data structure called
1445 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
1446 * the FW.
1447 *
1448 * Each frame has a 32-bit field called context (tag). This context is used
1449 * to get back the megasas_cmd from the frame when a frame gets completed in
1450 * the ISR. Typically the address of the megasas_cmd itself would be used as
1451 * the context. But we wanted to keep the differences between 32 and 64 bit
1452 * systems to the mininum. We always use 32 bit integers for the context. In
1453 * this driver, the 32 bit values are the indices into an array cmd_list.
1454 * This array is used only to look up the megasas_cmd given the context. The
1455 * free commands themselves are maintained in a linked list called cmd_pool.
1456 */
1457static int megasas_alloc_cmds(struct megasas_instance *instance)
1458{
1459 int i;
1460 int j;
1461 u32 max_cmd;
1462 struct megasas_cmd *cmd;
1463
1464 max_cmd = instance->max_fw_cmds;
1465
1466 /*
1467 * instance->cmd_list is an array of struct megasas_cmd pointers.
1468 * Allocate the dynamic array first and then allocate individual
1469 * commands.
1470 */
1471 instance->cmd_list = kmalloc(sizeof(struct megasas_cmd *) * max_cmd,
1472 GFP_KERNEL);
1473
1474 if (!instance->cmd_list) {
1475 printk(KERN_DEBUG "megasas: out of memory\n");
1476 return -ENOMEM;
1477 }
1478
1479 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) * max_cmd);
1480
1481 for (i = 0; i < max_cmd; i++) {
1482 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
1483 GFP_KERNEL);
1484
1485 if (!instance->cmd_list[i]) {
1486
1487 for (j = 0; j < i; j++)
1488 kfree(instance->cmd_list[j]);
1489
1490 kfree(instance->cmd_list);
1491 instance->cmd_list = NULL;
1492
1493 return -ENOMEM;
1494 }
1495 }
1496
1497 /*
1498 * Add all the commands to command pool (instance->cmd_pool)
1499 */
1500 for (i = 0; i < max_cmd; i++) {
1501 cmd = instance->cmd_list[i];
1502 memset(cmd, 0, sizeof(struct megasas_cmd));
1503 cmd->index = i;
1504 cmd->instance = instance;
1505
1506 list_add_tail(&cmd->list, &instance->cmd_pool);
1507 }
1508
1509 /*
1510 * Create a frame pool and assign one frame to each cmd
1511 */
1512 if (megasas_create_frame_pool(instance)) {
1513 printk(KERN_DEBUG "megasas: Error creating frame DMA pool\n");
1514 megasas_free_cmds(instance);
1515 }
1516
1517 return 0;
1518}
1519
1520/**
1521 * megasas_get_controller_info - Returns FW's controller structure
1522 * @instance: Adapter soft state
1523 * @ctrl_info: Controller information structure
1524 *
1525 * Issues an internal command (DCMD) to get the FW's controller structure.
1526 * This information is mainly used to find out the maximum IO transfer per
1527 * command supported by the FW.
1528 */
1529static int
1530megasas_get_ctrl_info(struct megasas_instance *instance,
1531 struct megasas_ctrl_info *ctrl_info)
1532{
1533 int ret = 0;
1534 struct megasas_cmd *cmd;
1535 struct megasas_dcmd_frame *dcmd;
1536 struct megasas_ctrl_info *ci;
1537 dma_addr_t ci_h = 0;
1538
1539 cmd = megasas_get_cmd(instance);
1540
1541 if (!cmd) {
1542 printk(KERN_DEBUG "megasas: Failed to get a free cmd\n");
1543 return -ENOMEM;
1544 }
1545
1546 dcmd = &cmd->frame->dcmd;
1547
1548 ci = pci_alloc_consistent(instance->pdev,
1549 sizeof(struct megasas_ctrl_info), &ci_h);
1550
1551 if (!ci) {
1552 printk(KERN_DEBUG "Failed to alloc mem for ctrl info\n");
1553 megasas_return_cmd(instance, cmd);
1554 return -ENOMEM;
1555 }
1556
1557 memset(ci, 0, sizeof(*ci));
1558 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
1559
1560 dcmd->cmd = MFI_CMD_DCMD;
1561 dcmd->cmd_status = 0xFF;
1562 dcmd->sge_count = 1;
1563 dcmd->flags = MFI_FRAME_DIR_READ;
1564 dcmd->timeout = 0;
1565 dcmd->data_xfer_len = sizeof(struct megasas_ctrl_info);
1566 dcmd->opcode = MR_DCMD_CTRL_GET_INFO;
1567 dcmd->sgl.sge32[0].phys_addr = ci_h;
1568 dcmd->sgl.sge32[0].length = sizeof(struct megasas_ctrl_info);
1569
1570 if (!megasas_issue_polled(instance, cmd)) {
1571 ret = 0;
1572 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
1573 } else {
1574 ret = -1;
1575 }
1576
1577 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
1578 ci, ci_h);
1579
1580 megasas_return_cmd(instance, cmd);
1581 return ret;
1582}
1583
1584/**
1585 * megasas_init_mfi - Initializes the FW
1586 * @instance: Adapter soft state
1587 *
1588 * This is the main function for initializing MFI firmware.
1589 */
1590static int megasas_init_mfi(struct megasas_instance *instance)
1591{
1592 u32 context_sz;
1593 u32 reply_q_sz;
1594 u32 max_sectors_1;
1595 u32 max_sectors_2;
1596 struct megasas_register_set __iomem *reg_set;
1597
1598 struct megasas_cmd *cmd;
1599 struct megasas_ctrl_info *ctrl_info;
1600
1601 struct megasas_init_frame *init_frame;
1602 struct megasas_init_queue_info *initq_info;
1603 dma_addr_t init_frame_h;
1604 dma_addr_t initq_info_h;
1605
1606 /*
1607 * Map the message registers
1608 */
1609 instance->base_addr = pci_resource_start(instance->pdev, 0);
1610
1611 if (pci_request_regions(instance->pdev, "megasas: LSI Logic")) {
1612 printk(KERN_DEBUG "megasas: IO memory region busy!\n");
1613 return -EBUSY;
1614 }
1615
1616 instance->reg_set = ioremap_nocache(instance->base_addr, 8192);
1617
1618 if (!instance->reg_set) {
1619 printk(KERN_DEBUG "megasas: Failed to map IO mem\n");
1620 goto fail_ioremap;
1621 }
1622
1623 reg_set = instance->reg_set;
1624
1625 /*
1626 * We expect the FW state to be READY
1627 */
1628 if (megasas_transition_to_ready(instance->reg_set))
1629 goto fail_ready_state;
1630
1631 /*
1632 * Get various operational parameters from status register
1633 */
1634 instance->max_fw_cmds = readl(&reg_set->outbound_msg_0) & 0x00FFFF;
1635 instance->max_num_sge = (readl(&reg_set->outbound_msg_0) & 0xFF0000) >>
1636 0x10;
1637 /*
1638 * Create a pool of commands
1639 */
1640 if (megasas_alloc_cmds(instance))
1641 goto fail_alloc_cmds;
1642
1643 /*
1644 * Allocate memory for reply queue. Length of reply queue should
1645 * be _one_ more than the maximum commands handled by the firmware.
1646 *
1647 * Note: When FW completes commands, it places corresponding contex
1648 * values in this circular reply queue. This circular queue is a fairly
1649 * typical producer-consumer queue. FW is the producer (of completed
1650 * commands) and the driver is the consumer.
1651 */
1652 context_sz = sizeof(u32);
1653 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
1654
1655 instance->reply_queue = pci_alloc_consistent(instance->pdev,
1656 reply_q_sz,
1657 &instance->reply_queue_h);
1658
1659 if (!instance->reply_queue) {
1660 printk(KERN_DEBUG "megasas: Out of DMA mem for reply queue\n");
1661 goto fail_reply_queue;
1662 }
1663
1664 /*
1665 * Prepare a init frame. Note the init frame points to queue info
1666 * structure. Each frame has SGL allocated after first 64 bytes. For
1667 * this frame - since we don't need any SGL - we use SGL's space as
1668 * queue info structure
1669 *
1670 * We will not get a NULL command below. We just created the pool.
1671 */
1672 cmd = megasas_get_cmd(instance);
1673
1674 init_frame = (struct megasas_init_frame *)cmd->frame;
1675 initq_info = (struct megasas_init_queue_info *)
1676 ((unsigned long)init_frame + 64);
1677
1678 init_frame_h = cmd->frame_phys_addr;
1679 initq_info_h = init_frame_h + 64;
1680
1681 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
1682 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
1683
1684 initq_info->reply_queue_entries = instance->max_fw_cmds + 1;
1685 initq_info->reply_queue_start_phys_addr_lo = instance->reply_queue_h;
1686
1687 initq_info->producer_index_phys_addr_lo = instance->producer_h;
1688 initq_info->consumer_index_phys_addr_lo = instance->consumer_h;
1689
1690 init_frame->cmd = MFI_CMD_INIT;
1691 init_frame->cmd_status = 0xFF;
1692 init_frame->queue_info_new_phys_addr_lo = initq_info_h;
1693
1694 init_frame->data_xfer_len = sizeof(struct megasas_init_queue_info);
1695
1696 /*
1697 * Issue the init frame in polled mode
1698 */
1699 if (megasas_issue_polled(instance, cmd)) {
1700 printk(KERN_DEBUG "megasas: Failed to init firmware\n");
1701 goto fail_fw_init;
1702 }
1703
1704 megasas_return_cmd(instance, cmd);
1705
1706 ctrl_info = kmalloc(sizeof(struct megasas_ctrl_info), GFP_KERNEL);
1707
1708 /*
1709 * Compute the max allowed sectors per IO: The controller info has two
1710 * limits on max sectors. Driver should use the minimum of these two.
1711 *
1712 * 1 << stripe_sz_ops.min = max sectors per strip
1713 *
1714 * Note that older firmwares ( < FW ver 30) didn't report information
1715 * to calculate max_sectors_1. So the number ended up as zero always.
1716 */
1717 if (ctrl_info && !megasas_get_ctrl_info(instance, ctrl_info)) {
1718
1719 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
1720 ctrl_info->max_strips_per_io;
1721 max_sectors_2 = ctrl_info->max_request_size;
1722
1723 instance->max_sectors_per_req = (max_sectors_1 < max_sectors_2)
1724 ? max_sectors_1 : max_sectors_2;
1725 } else
1726 instance->max_sectors_per_req = instance->max_num_sge *
1727 PAGE_SIZE / 512;
1728
1729 kfree(ctrl_info);
1730
1731 return 0;
1732
1733 fail_fw_init:
1734 megasas_return_cmd(instance, cmd);
1735
1736 pci_free_consistent(instance->pdev, reply_q_sz,
1737 instance->reply_queue, instance->reply_queue_h);
1738 fail_reply_queue:
1739 megasas_free_cmds(instance);
1740
1741 fail_alloc_cmds:
1742 fail_ready_state:
1743 iounmap(instance->reg_set);
1744
1745 fail_ioremap:
1746 pci_release_regions(instance->pdev);
1747
1748 return -EINVAL;
1749}
1750
1751/**
1752 * megasas_release_mfi - Reverses the FW initialization
1753 * @intance: Adapter soft state
1754 */
1755static void megasas_release_mfi(struct megasas_instance *instance)
1756{
1757 u32 reply_q_sz = sizeof(u32) * (instance->max_fw_cmds + 1);
1758
1759 pci_free_consistent(instance->pdev, reply_q_sz,
1760 instance->reply_queue, instance->reply_queue_h);
1761
1762 megasas_free_cmds(instance);
1763
1764 iounmap(instance->reg_set);
1765
1766 pci_release_regions(instance->pdev);
1767}
1768
1769/**
1770 * megasas_get_seq_num - Gets latest event sequence numbers
1771 * @instance: Adapter soft state
1772 * @eli: FW event log sequence numbers information
1773 *
1774 * FW maintains a log of all events in a non-volatile area. Upper layers would
1775 * usually find out the latest sequence number of the events, the seq number at
1776 * the boot etc. They would "read" all the events below the latest seq number
1777 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
1778 * number), they would subsribe to AEN (asynchronous event notification) and
1779 * wait for the events to happen.
1780 */
1781static int
1782megasas_get_seq_num(struct megasas_instance *instance,
1783 struct megasas_evt_log_info *eli)
1784{
1785 struct megasas_cmd *cmd;
1786 struct megasas_dcmd_frame *dcmd;
1787 struct megasas_evt_log_info *el_info;
1788 dma_addr_t el_info_h = 0;
1789
1790 cmd = megasas_get_cmd(instance);
1791
1792 if (!cmd) {
1793 return -ENOMEM;
1794 }
1795
1796 dcmd = &cmd->frame->dcmd;
1797 el_info = pci_alloc_consistent(instance->pdev,
1798 sizeof(struct megasas_evt_log_info),
1799 &el_info_h);
1800
1801 if (!el_info) {
1802 megasas_return_cmd(instance, cmd);
1803 return -ENOMEM;
1804 }
1805
1806 memset(el_info, 0, sizeof(*el_info));
1807 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
1808
1809 dcmd->cmd = MFI_CMD_DCMD;
1810 dcmd->cmd_status = 0x0;
1811 dcmd->sge_count = 1;
1812 dcmd->flags = MFI_FRAME_DIR_READ;
1813 dcmd->timeout = 0;
1814 dcmd->data_xfer_len = sizeof(struct megasas_evt_log_info);
1815 dcmd->opcode = MR_DCMD_CTRL_EVENT_GET_INFO;
1816 dcmd->sgl.sge32[0].phys_addr = el_info_h;
1817 dcmd->sgl.sge32[0].length = sizeof(struct megasas_evt_log_info);
1818
1819 megasas_issue_blocked_cmd(instance, cmd);
1820
1821 /*
1822 * Copy the data back into callers buffer
1823 */
1824 memcpy(eli, el_info, sizeof(struct megasas_evt_log_info));
1825
1826 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
1827 el_info, el_info_h);
1828
1829 megasas_return_cmd(instance, cmd);
1830
1831 return 0;
1832}
1833
1834/**
1835 * megasas_register_aen - Registers for asynchronous event notification
1836 * @instance: Adapter soft state
1837 * @seq_num: The starting sequence number
1838 * @class_locale: Class of the event
1839 *
1840 * This function subscribes for AEN for events beyond the @seq_num. It requests
1841 * to be notified if and only if the event is of type @class_locale
1842 */
1843static int
1844megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
1845 u32 class_locale_word)
1846{
1847 int ret_val;
1848 struct megasas_cmd *cmd;
1849 struct megasas_dcmd_frame *dcmd;
1850 union megasas_evt_class_locale curr_aen;
1851 union megasas_evt_class_locale prev_aen;
1852
1853 /*
1854 * If there an AEN pending already (aen_cmd), check if the
1855 * class_locale of that pending AEN is inclusive of the new
1856 * AEN request we currently have. If it is, then we don't have
1857 * to do anything. In other words, whichever events the current
1858 * AEN request is subscribing to, have already been subscribed
1859 * to.
1860 *
1861 * If the old_cmd is _not_ inclusive, then we have to abort
1862 * that command, form a class_locale that is superset of both
1863 * old and current and re-issue to the FW
1864 */
1865
1866 curr_aen.word = class_locale_word;
1867
1868 if (instance->aen_cmd) {
1869
1870 prev_aen.word = instance->aen_cmd->frame->dcmd.mbox.w[1];
1871
1872 /*
1873 * A class whose enum value is smaller is inclusive of all
1874 * higher values. If a PROGRESS (= -1) was previously
1875 * registered, then a new registration requests for higher
1876 * classes need not be sent to FW. They are automatically
1877 * included.
1878 *
1879 * Locale numbers don't have such hierarchy. They are bitmap
1880 * values
1881 */
1882 if ((prev_aen.members.class <= curr_aen.members.class) &&
1883 !((prev_aen.members.locale & curr_aen.members.locale) ^
1884 curr_aen.members.locale)) {
1885 /*
1886 * Previously issued event registration includes
1887 * current request. Nothing to do.
1888 */
1889 return 0;
1890 } else {
1891 curr_aen.members.locale |= prev_aen.members.locale;
1892
1893 if (prev_aen.members.class < curr_aen.members.class)
1894 curr_aen.members.class = prev_aen.members.class;
1895
1896 instance->aen_cmd->abort_aen = 1;
1897 ret_val = megasas_issue_blocked_abort_cmd(instance,
1898 instance->
1899 aen_cmd);
1900
1901 if (ret_val) {
1902 printk(KERN_DEBUG "megasas: Failed to abort "
1903 "previous AEN command\n");
1904 return ret_val;
1905 }
1906 }
1907 }
1908
1909 cmd = megasas_get_cmd(instance);
1910
1911 if (!cmd)
1912 return -ENOMEM;
1913
1914 dcmd = &cmd->frame->dcmd;
1915
1916 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
1917
1918 /*
1919 * Prepare DCMD for aen registration
1920 */
1921 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
1922
1923 dcmd->cmd = MFI_CMD_DCMD;
1924 dcmd->cmd_status = 0x0;
1925 dcmd->sge_count = 1;
1926 dcmd->flags = MFI_FRAME_DIR_READ;
1927 dcmd->timeout = 0;
1928 dcmd->data_xfer_len = sizeof(struct megasas_evt_detail);
1929 dcmd->opcode = MR_DCMD_CTRL_EVENT_WAIT;
1930 dcmd->mbox.w[0] = seq_num;
1931 dcmd->mbox.w[1] = curr_aen.word;
1932 dcmd->sgl.sge32[0].phys_addr = (u32) instance->evt_detail_h;
1933 dcmd->sgl.sge32[0].length = sizeof(struct megasas_evt_detail);
1934
1935 /*
1936 * Store reference to the cmd used to register for AEN. When an
1937 * application wants us to register for AEN, we have to abort this
1938 * cmd and re-register with a new EVENT LOCALE supplied by that app
1939 */
1940 instance->aen_cmd = cmd;
1941
1942 /*
1943 * Issue the aen registration frame
1944 */
1945 writel(cmd->frame_phys_addr >> 3,
1946 &instance->reg_set->inbound_queue_port);
1947
1948 return 0;
1949}
1950
1951/**
1952 * megasas_start_aen - Subscribes to AEN during driver load time
1953 * @instance: Adapter soft state
1954 */
1955static int megasas_start_aen(struct megasas_instance *instance)
1956{
1957 struct megasas_evt_log_info eli;
1958 union megasas_evt_class_locale class_locale;
1959
1960 /*
1961 * Get the latest sequence number from FW
1962 */
1963 memset(&eli, 0, sizeof(eli));
1964
1965 if (megasas_get_seq_num(instance, &eli))
1966 return -1;
1967
1968 /*
1969 * Register AEN with FW for latest sequence number plus 1
1970 */
1971 class_locale.members.reserved = 0;
1972 class_locale.members.locale = MR_EVT_LOCALE_ALL;
1973 class_locale.members.class = MR_EVT_CLASS_DEBUG;
1974
1975 return megasas_register_aen(instance, eli.newest_seq_num + 1,
1976 class_locale.word);
1977}
1978
1979/**
1980 * megasas_io_attach - Attaches this driver to SCSI mid-layer
1981 * @instance: Adapter soft state
1982 */
1983static int megasas_io_attach(struct megasas_instance *instance)
1984{
1985 struct Scsi_Host *host = instance->host;
1986
1987 /*
1988 * Export parameters required by SCSI mid-layer
1989 */
1990 host->irq = instance->pdev->irq;
1991 host->unique_id = instance->unique_id;
1992 host->can_queue = instance->max_fw_cmds - MEGASAS_INT_CMDS;
1993 host->this_id = instance->init_id;
1994 host->sg_tablesize = instance->max_num_sge;
1995 host->max_sectors = instance->max_sectors_per_req;
1996 host->cmd_per_lun = 128;
1997 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
1998 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
1999 host->max_lun = MEGASAS_MAX_LUN;
2000
2001 /*
2002 * Notify the mid-layer about the new controller
2003 */
2004 if (scsi_add_host(host, &instance->pdev->dev)) {
2005 printk(KERN_DEBUG "megasas: scsi_add_host failed\n");
2006 return -ENODEV;
2007 }
2008
2009 /*
2010 * Trigger SCSI to scan our drives
2011 */
2012 scsi_scan_host(host);
2013 return 0;
2014}
2015
2016/**
2017 * megasas_probe_one - PCI hotplug entry point
2018 * @pdev: PCI device structure
2019 * @id: PCI ids of supported hotplugged adapter
2020 */
2021static int __devinit
2022megasas_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2023{
2024 int rval;
2025 struct Scsi_Host *host;
2026 struct megasas_instance *instance;
2027
2028 /*
2029 * Announce PCI information
2030 */
2031 printk(KERN_INFO "megasas: %#4.04x:%#4.04x:%#4.04x:%#4.04x: ",
2032 pdev->vendor, pdev->device, pdev->subsystem_vendor,
2033 pdev->subsystem_device);
2034
2035 printk("bus %d:slot %d:func %d\n",
2036 pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
2037
2038 /*
2039 * PCI prepping: enable device set bus mastering and dma mask
2040 */
2041 rval = pci_enable_device(pdev);
2042
2043 if (rval) {
2044 return rval;
2045 }
2046
2047 pci_set_master(pdev);
2048
2049 /*
2050 * All our contollers are capable of performing 64-bit DMA
2051 */
2052 if (IS_DMA64) {
2053 if (pci_set_dma_mask(pdev, DMA_64BIT_MASK) != 0) {
2054
2055 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0)
2056 goto fail_set_dma_mask;
2057 }
2058 } else {
2059 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0)
2060 goto fail_set_dma_mask;
2061 }
2062
2063 host = scsi_host_alloc(&megasas_template,
2064 sizeof(struct megasas_instance));
2065
2066 if (!host) {
2067 printk(KERN_DEBUG "megasas: scsi_host_alloc failed\n");
2068 goto fail_alloc_instance;
2069 }
2070
2071 instance = (struct megasas_instance *)host->hostdata;
2072 memset(instance, 0, sizeof(*instance));
2073
2074 instance->producer = pci_alloc_consistent(pdev, sizeof(u32),
2075 &instance->producer_h);
2076 instance->consumer = pci_alloc_consistent(pdev, sizeof(u32),
2077 &instance->consumer_h);
2078
2079 if (!instance->producer || !instance->consumer) {
2080 printk(KERN_DEBUG "megasas: Failed to allocate memory for "
2081 "producer, consumer\n");
2082 goto fail_alloc_dma_buf;
2083 }
2084
2085 *instance->producer = 0;
2086 *instance->consumer = 0;
2087
2088 instance->evt_detail = pci_alloc_consistent(pdev,
2089 sizeof(struct
2090 megasas_evt_detail),
2091 &instance->evt_detail_h);
2092
2093 if (!instance->evt_detail) {
2094 printk(KERN_DEBUG "megasas: Failed to allocate memory for "
2095 "event detail structure\n");
2096 goto fail_alloc_dma_buf;
2097 }
2098
2099 /*
2100 * Initialize locks and queues
2101 */
2102 INIT_LIST_HEAD(&instance->cmd_pool);
2103
2104 init_waitqueue_head(&instance->int_cmd_wait_q);
2105 init_waitqueue_head(&instance->abort_cmd_wait_q);
2106
2107 spin_lock_init(&instance->cmd_pool_lock);
2108 spin_lock_init(&instance->instance_lock);
2109
2110 sema_init(&instance->aen_mutex, 1);
2111 sema_init(&instance->ioctl_sem, MEGASAS_INT_CMDS);
2112
2113 /*
2114 * Initialize PCI related and misc parameters
2115 */
2116 instance->pdev = pdev;
2117 instance->host = host;
2118 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
2119 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
2120
2121 /*
2122 * Initialize MFI Firmware
2123 */
2124 if (megasas_init_mfi(instance))
2125 goto fail_init_mfi;
2126
2127 /*
2128 * Register IRQ
2129 */
2130 if (request_irq(pdev->irq, megasas_isr, SA_SHIRQ, "megasas", instance)) {
2131 printk(KERN_DEBUG "megasas: Failed to register IRQ\n");
2132 goto fail_irq;
2133 }
2134
2135 megasas_enable_intr(instance->reg_set);
2136
2137 /*
2138 * Store instance in PCI softstate
2139 */
2140 pci_set_drvdata(pdev, instance);
2141
2142 /*
2143 * Add this controller to megasas_mgmt_info structure so that it
2144 * can be exported to management applications
2145 */
2146 megasas_mgmt_info.count++;
2147 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
2148 megasas_mgmt_info.max_index++;
2149
2150 /*
2151 * Initiate AEN (Asynchronous Event Notification)
2152 */
2153 if (megasas_start_aen(instance)) {
2154 printk(KERN_DEBUG "megasas: start aen failed\n");
2155 goto fail_start_aen;
2156 }
2157
2158 /*
2159 * Register with SCSI mid-layer
2160 */
2161 if (megasas_io_attach(instance))
2162 goto fail_io_attach;
2163
2164 return 0;
2165
2166 fail_start_aen:
2167 fail_io_attach:
2168 megasas_mgmt_info.count--;
2169 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
2170 megasas_mgmt_info.max_index--;
2171
2172 pci_set_drvdata(pdev, NULL);
2173 megasas_disable_intr(instance->reg_set);
2174 free_irq(instance->pdev->irq, instance);
2175
2176 megasas_release_mfi(instance);
2177
2178 fail_irq:
2179 fail_init_mfi:
2180 fail_alloc_dma_buf:
2181 if (instance->evt_detail)
2182 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
2183 instance->evt_detail,
2184 instance->evt_detail_h);
2185
2186 if (instance->producer)
2187 pci_free_consistent(pdev, sizeof(u32), instance->producer,
2188 instance->producer_h);
2189 if (instance->consumer)
2190 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
2191 instance->consumer_h);
2192 scsi_host_put(host);
2193
2194 fail_alloc_instance:
2195 fail_set_dma_mask:
2196 pci_disable_device(pdev);
2197
2198 return -ENODEV;
2199}
2200
2201/**
2202 * megasas_flush_cache - Requests FW to flush all its caches
2203 * @instance: Adapter soft state
2204 */
2205static void megasas_flush_cache(struct megasas_instance *instance)
2206{
2207 struct megasas_cmd *cmd;
2208 struct megasas_dcmd_frame *dcmd;
2209
2210 cmd = megasas_get_cmd(instance);
2211
2212 if (!cmd)
2213 return;
2214
2215 dcmd = &cmd->frame->dcmd;
2216
2217 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2218
2219 dcmd->cmd = MFI_CMD_DCMD;
2220 dcmd->cmd_status = 0x0;
2221 dcmd->sge_count = 0;
2222 dcmd->flags = MFI_FRAME_DIR_NONE;
2223 dcmd->timeout = 0;
2224 dcmd->data_xfer_len = 0;
2225 dcmd->opcode = MR_DCMD_CTRL_CACHE_FLUSH;
2226 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
2227
2228 megasas_issue_blocked_cmd(instance, cmd);
2229
2230 megasas_return_cmd(instance, cmd);
2231
2232 return;
2233}
2234
2235/**
2236 * megasas_shutdown_controller - Instructs FW to shutdown the controller
2237 * @instance: Adapter soft state
2238 */
2239static void megasas_shutdown_controller(struct megasas_instance *instance)
2240{
2241 struct megasas_cmd *cmd;
2242 struct megasas_dcmd_frame *dcmd;
2243
2244 cmd = megasas_get_cmd(instance);
2245
2246 if (!cmd)
2247 return;
2248
2249 if (instance->aen_cmd)
2250 megasas_issue_blocked_abort_cmd(instance, instance->aen_cmd);
2251
2252 dcmd = &cmd->frame->dcmd;
2253
2254 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2255
2256 dcmd->cmd = MFI_CMD_DCMD;
2257 dcmd->cmd_status = 0x0;
2258 dcmd->sge_count = 0;
2259 dcmd->flags = MFI_FRAME_DIR_NONE;
2260 dcmd->timeout = 0;
2261 dcmd->data_xfer_len = 0;
2262 dcmd->opcode = MR_DCMD_CTRL_SHUTDOWN;
2263
2264 megasas_issue_blocked_cmd(instance, cmd);
2265
2266 megasas_return_cmd(instance, cmd);
2267
2268 return;
2269}
2270
2271/**
2272 * megasas_detach_one - PCI hot"un"plug entry point
2273 * @pdev: PCI device structure
2274 */
2275static void megasas_detach_one(struct pci_dev *pdev)
2276{
2277 int i;
2278 struct Scsi_Host *host;
2279 struct megasas_instance *instance;
2280
2281 instance = pci_get_drvdata(pdev);
2282 host = instance->host;
2283
2284 scsi_remove_host(instance->host);
2285 megasas_flush_cache(instance);
2286 megasas_shutdown_controller(instance);
2287
2288 /*
2289 * Take the instance off the instance array. Note that we will not
2290 * decrement the max_index. We let this array be sparse array
2291 */
2292 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
2293 if (megasas_mgmt_info.instance[i] == instance) {
2294 megasas_mgmt_info.count--;
2295 megasas_mgmt_info.instance[i] = NULL;
2296
2297 break;
2298 }
2299 }
2300
2301 pci_set_drvdata(instance->pdev, NULL);
2302
2303 megasas_disable_intr(instance->reg_set);
2304
2305 free_irq(instance->pdev->irq, instance);
2306
2307 megasas_release_mfi(instance);
2308
2309 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
2310 instance->evt_detail, instance->evt_detail_h);
2311
2312 pci_free_consistent(pdev, sizeof(u32), instance->producer,
2313 instance->producer_h);
2314
2315 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
2316 instance->consumer_h);
2317
2318 scsi_host_put(host);
2319
2320 pci_set_drvdata(pdev, NULL);
2321
2322 pci_disable_device(pdev);
2323
2324 return;
2325}
2326
2327/**
2328 * megasas_shutdown - Shutdown entry point
2329 * @device: Generic device structure
2330 */
2331static void megasas_shutdown(struct pci_dev *pdev)
2332{
2333 struct megasas_instance *instance = pci_get_drvdata(pdev);
2334 megasas_flush_cache(instance);
2335}
2336
2337/**
2338 * megasas_mgmt_open - char node "open" entry point
2339 */
2340static int megasas_mgmt_open(struct inode *inode, struct file *filep)
2341{
2342 /*
2343 * Allow only those users with admin rights
2344 */
2345 if (!capable(CAP_SYS_ADMIN))
2346 return -EACCES;
2347
2348 return 0;
2349}
2350
2351/**
2352 * megasas_mgmt_release - char node "release" entry point
2353 */
2354static int megasas_mgmt_release(struct inode *inode, struct file *filep)
2355{
2356 filep->private_data = NULL;
2357 fasync_helper(-1, filep, 0, &megasas_async_queue);
2358
2359 return 0;
2360}
2361
2362/**
2363 * megasas_mgmt_fasync - Async notifier registration from applications
2364 *
2365 * This function adds the calling process to a driver global queue. When an
2366 * event occurs, SIGIO will be sent to all processes in this queue.
2367 */
2368static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
2369{
2370 int rc;
2371
2372 down(&megasas_async_queue_mutex);
2373
2374 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
2375
2376 up(&megasas_async_queue_mutex);
2377
2378 if (rc >= 0) {
2379 /* For sanity check when we get ioctl */
2380 filep->private_data = filep;
2381 return 0;
2382 }
2383
2384 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
2385
2386 return rc;
2387}
2388
2389/**
2390 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
2391 * @instance: Adapter soft state
2392 * @argp: User's ioctl packet
2393 */
2394static int
2395megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
2396 struct megasas_iocpacket __user * user_ioc,
2397 struct megasas_iocpacket *ioc)
2398{
2399 struct megasas_sge32 *kern_sge32;
2400 struct megasas_cmd *cmd;
2401 void *kbuff_arr[MAX_IOCTL_SGE];
2402 dma_addr_t buf_handle = 0;
2403 int error = 0, i;
2404 void *sense = NULL;
2405 dma_addr_t sense_handle;
2406 u32 *sense_ptr;
2407
2408 memset(kbuff_arr, 0, sizeof(kbuff_arr));
2409
2410 if (ioc->sge_count > MAX_IOCTL_SGE) {
2411 printk(KERN_DEBUG "megasas: SGE count [%d] > max limit [%d]\n",
2412 ioc->sge_count, MAX_IOCTL_SGE);
2413 return -EINVAL;
2414 }
2415
2416 cmd = megasas_get_cmd(instance);
2417 if (!cmd) {
2418 printk(KERN_DEBUG "megasas: Failed to get a cmd packet\n");
2419 return -ENOMEM;
2420 }
2421
2422 /*
2423 * User's IOCTL packet has 2 frames (maximum). Copy those two
2424 * frames into our cmd's frames. cmd->frame's context will get
2425 * overwritten when we copy from user's frames. So set that value
2426 * alone separately
2427 */
2428 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
2429 cmd->frame->hdr.context = cmd->index;
2430
2431 /*
2432 * The management interface between applications and the fw uses
2433 * MFI frames. E.g, RAID configuration changes, LD property changes
2434 * etc are accomplishes through different kinds of MFI frames. The
2435 * driver needs to care only about substituting user buffers with
2436 * kernel buffers in SGLs. The location of SGL is embedded in the
2437 * struct iocpacket itself.
2438 */
2439 kern_sge32 = (struct megasas_sge32 *)
2440 ((unsigned long)cmd->frame + ioc->sgl_off);
2441
2442 /*
2443 * For each user buffer, create a mirror buffer and copy in
2444 */
2445 for (i = 0; i < ioc->sge_count; i++) {
2446 kbuff_arr[i] = pci_alloc_consistent(instance->pdev,
2447 ioc->sgl[i].iov_len,
2448 &buf_handle);
2449 if (!kbuff_arr[i]) {
2450 printk(KERN_DEBUG "megasas: Failed to alloc "
2451 "kernel SGL buffer for IOCTL \n");
2452 error = -ENOMEM;
2453 goto out;
2454 }
2455
2456 /*
2457 * We don't change the dma_coherent_mask, so
2458 * pci_alloc_consistent only returns 32bit addresses
2459 */
2460 kern_sge32[i].phys_addr = (u32) buf_handle;
2461 kern_sge32[i].length = ioc->sgl[i].iov_len;
2462
2463 /*
2464 * We created a kernel buffer corresponding to the
2465 * user buffer. Now copy in from the user buffer
2466 */
2467 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
2468 (u32) (ioc->sgl[i].iov_len))) {
2469 error = -EFAULT;
2470 goto out;
2471 }
2472 }
2473
2474 if (ioc->sense_len) {
2475 sense = pci_alloc_consistent(instance->pdev, ioc->sense_len,
2476 &sense_handle);
2477 if (!sense) {
2478 error = -ENOMEM;
2479 goto out;
2480 }
2481
2482 sense_ptr =
2483 (u32 *) ((unsigned long)cmd->frame + ioc->sense_off);
2484 *sense_ptr = sense_handle;
2485 }
2486
2487 /*
2488 * Set the sync_cmd flag so that the ISR knows not to complete this
2489 * cmd to the SCSI mid-layer
2490 */
2491 cmd->sync_cmd = 1;
2492 megasas_issue_blocked_cmd(instance, cmd);
2493 cmd->sync_cmd = 0;
2494
2495 /*
2496 * copy out the kernel buffers to user buffers
2497 */
2498 for (i = 0; i < ioc->sge_count; i++) {
2499 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
2500 ioc->sgl[i].iov_len)) {
2501 error = -EFAULT;
2502 goto out;
2503 }
2504 }
2505
2506 /*
2507 * copy out the sense
2508 */
2509 if (ioc->sense_len) {
2510 /*
2511 * sense_ptr points to the location that has the user
2512 * sense buffer address
2513 */
2514 sense_ptr = (u32 *) ((unsigned long)ioc->frame.raw +
2515 ioc->sense_off);
2516
2517 if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)),
2518 sense, ioc->sense_len)) {
2519 error = -EFAULT;
2520 goto out;
2521 }
2522 }
2523
2524 /*
2525 * copy the status codes returned by the fw
2526 */
2527 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
2528 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
2529 printk(KERN_DEBUG "megasas: Error copying out cmd_status\n");
2530 error = -EFAULT;
2531 }
2532
2533 out:
2534 if (sense) {
2535 pci_free_consistent(instance->pdev, ioc->sense_len,
2536 sense, sense_handle);
2537 }
2538
2539 for (i = 0; i < ioc->sge_count && kbuff_arr[i]; i++) {
2540 pci_free_consistent(instance->pdev,
2541 kern_sge32[i].length,
2542 kbuff_arr[i], kern_sge32[i].phys_addr);
2543 }
2544
2545 megasas_return_cmd(instance, cmd);
2546 return error;
2547}
2548
2549static struct megasas_instance *megasas_lookup_instance(u16 host_no)
2550{
2551 int i;
2552
2553 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
2554
2555 if ((megasas_mgmt_info.instance[i]) &&
2556 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
2557 return megasas_mgmt_info.instance[i];
2558 }
2559
2560 return NULL;
2561}
2562
2563static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
2564{
2565 struct megasas_iocpacket __user *user_ioc =
2566 (struct megasas_iocpacket __user *)arg;
2567 struct megasas_iocpacket *ioc;
2568 struct megasas_instance *instance;
2569 int error;
2570
2571 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
2572 if (!ioc)
2573 return -ENOMEM;
2574
2575 if (copy_from_user(ioc, user_ioc, sizeof(*ioc))) {
2576 error = -EFAULT;
2577 goto out_kfree_ioc;
2578 }
2579
2580 instance = megasas_lookup_instance(ioc->host_no);
2581 if (!instance) {
2582 error = -ENODEV;
2583 goto out_kfree_ioc;
2584 }
2585
2586 /*
2587 * We will allow only MEGASAS_INT_CMDS number of parallel ioctl cmds
2588 */
2589 if (down_interruptible(&instance->ioctl_sem)) {
2590 error = -ERESTARTSYS;
2591 goto out_kfree_ioc;
2592 }
2593 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
2594 up(&instance->ioctl_sem);
2595
2596 out_kfree_ioc:
2597 kfree(ioc);
2598 return error;
2599}
2600
2601static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
2602{
2603 struct megasas_instance *instance;
2604 struct megasas_aen aen;
2605 int error;
2606
2607 if (file->private_data != file) {
2608 printk(KERN_DEBUG "megasas: fasync_helper was not "
2609 "called first\n");
2610 return -EINVAL;
2611 }
2612
2613 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
2614 return -EFAULT;
2615
2616 instance = megasas_lookup_instance(aen.host_no);
2617
2618 if (!instance)
2619 return -ENODEV;
2620
2621 down(&instance->aen_mutex);
2622 error = megasas_register_aen(instance, aen.seq_num,
2623 aen.class_locale_word);
2624 up(&instance->aen_mutex);
2625 return error;
2626}
2627
2628/**
2629 * megasas_mgmt_ioctl - char node ioctl entry point
2630 */
2631static long
2632megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
2633{
2634 switch (cmd) {
2635 case MEGASAS_IOC_FIRMWARE:
2636 return megasas_mgmt_ioctl_fw(file, arg);
2637
2638 case MEGASAS_IOC_GET_AEN:
2639 return megasas_mgmt_ioctl_aen(file, arg);
2640 }
2641
2642 return -ENOTTY;
2643}
2644
2645#ifdef CONFIG_COMPAT
2646static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
2647{
2648 struct compat_megasas_iocpacket __user *cioc =
2649 (struct compat_megasas_iocpacket __user *)arg;
2650 struct megasas_iocpacket __user *ioc =
2651 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
2652 int i;
2653 int error = 0;
2654
2655 clear_user(ioc, sizeof(*ioc));
2656
2657 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
2658 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
2659 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
2660 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
2661 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
2662 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
2663 return -EFAULT;
2664
2665 for (i = 0; i < MAX_IOCTL_SGE; i++) {
2666 compat_uptr_t ptr;
2667
2668 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
2669 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
2670 copy_in_user(&ioc->sgl[i].iov_len,
2671 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
2672 return -EFAULT;
2673 }
2674
2675 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
2676
2677 if (copy_in_user(&cioc->frame.hdr.cmd_status,
2678 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
2679 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
2680 return -EFAULT;
2681 }
2682 return error;
2683}
2684
2685static long
2686megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
2687 unsigned long arg)
2688{
2689 switch (cmd) {
2690 case MEGASAS_IOC_FIRMWARE:{
2691 return megasas_mgmt_compat_ioctl_fw(file, arg);
2692 }
2693 case MEGASAS_IOC_GET_AEN:
2694 return megasas_mgmt_ioctl_aen(file, arg);
2695 }
2696
2697 return -ENOTTY;
2698}
2699#endif
2700
2701/*
2702 * File operations structure for management interface
2703 */
2704static struct file_operations megasas_mgmt_fops = {
2705 .owner = THIS_MODULE,
2706 .open = megasas_mgmt_open,
2707 .release = megasas_mgmt_release,
2708 .fasync = megasas_mgmt_fasync,
2709 .unlocked_ioctl = megasas_mgmt_ioctl,
2710#ifdef CONFIG_COMPAT
2711 .compat_ioctl = megasas_mgmt_compat_ioctl,
2712#endif
2713};
2714
2715/*
2716 * PCI hotplug support registration structure
2717 */
2718static struct pci_driver megasas_pci_driver = {
2719
2720 .name = "megaraid_sas",
2721 .id_table = megasas_pci_table,
2722 .probe = megasas_probe_one,
2723 .remove = __devexit_p(megasas_detach_one),
2724 .shutdown = megasas_shutdown,
2725};
2726
2727/*
2728 * Sysfs driver attributes
2729 */
2730static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf)
2731{
2732 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
2733 MEGASAS_VERSION);
2734}
2735
2736static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL);
2737
2738static ssize_t
2739megasas_sysfs_show_release_date(struct device_driver *dd, char *buf)
2740{
2741 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
2742 MEGASAS_RELDATE);
2743}
2744
2745static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date,
2746 NULL);
2747
2748/**
2749 * megasas_init - Driver load entry point
2750 */
2751static int __init megasas_init(void)
2752{
2753 int rval;
2754
2755 /*
2756 * Announce driver version and other information
2757 */
2758 printk(KERN_INFO "megasas: %s %s\n", MEGASAS_VERSION,
2759 MEGASAS_EXT_VERSION);
2760
2761 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
2762
2763 /*
2764 * Register character device node
2765 */
2766 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
2767
2768 if (rval < 0) {
2769 printk(KERN_DEBUG "megasas: failed to open device node\n");
2770 return rval;
2771 }
2772
2773 megasas_mgmt_majorno = rval;
2774
2775 /*
2776 * Register ourselves as PCI hotplug module
2777 */
2778 rval = pci_module_init(&megasas_pci_driver);
2779
2780 if (rval) {
2781 printk(KERN_DEBUG "megasas: PCI hotplug regisration failed \n");
2782 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
2783 }
2784
2785 driver_create_file(&megasas_pci_driver.driver, &driver_attr_version);
2786 driver_create_file(&megasas_pci_driver.driver,
2787 &driver_attr_release_date);
2788
2789 return rval;
2790}
2791
2792/**
2793 * megasas_exit - Driver unload entry point
2794 */
2795static void __exit megasas_exit(void)
2796{
2797 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
2798 driver_remove_file(&megasas_pci_driver.driver,
2799 &driver_attr_release_date);
2800
2801 pci_unregister_driver(&megasas_pci_driver);
2802 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
2803}
2804
2805module_init(megasas_init);
2806module_exit(megasas_exit);
diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h
new file mode 100644
index 000000000000..eaec9d531424
--- /dev/null
+++ b/drivers/scsi/megaraid/megaraid_sas.h
@@ -0,0 +1,1142 @@
1/*
2 *
3 * Linux MegaRAID driver for SAS based RAID controllers
4 *
5 * Copyright (c) 2003-2005 LSI Logic Corporation.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * FILE : megaraid_sas.h
13 */
14
15#ifndef LSI_MEGARAID_SAS_H
16#define LSI_MEGARAID_SAS_H
17
18/**
19 * MegaRAID SAS Driver meta data
20 */
21#define MEGASAS_VERSION "00.00.02.00-rc4"
22#define MEGASAS_RELDATE "Sep 16, 2005"
23#define MEGASAS_EXT_VERSION "Fri Sep 16 12:37:08 EDT 2005"
24
25/*
26 * =====================================
27 * MegaRAID SAS MFI firmware definitions
28 * =====================================
29 */
30
31/*
32 * MFI stands for MegaRAID SAS FW Interface. This is just a moniker for
33 * protocol between the software and firmware. Commands are issued using
34 * "message frames"
35 */
36
37/**
38 * FW posts its state in upper 4 bits of outbound_msg_0 register
39 */
40#define MFI_STATE_MASK 0xF0000000
41#define MFI_STATE_UNDEFINED 0x00000000
42#define MFI_STATE_BB_INIT 0x10000000
43#define MFI_STATE_FW_INIT 0x40000000
44#define MFI_STATE_WAIT_HANDSHAKE 0x60000000
45#define MFI_STATE_FW_INIT_2 0x70000000
46#define MFI_STATE_DEVICE_SCAN 0x80000000
47#define MFI_STATE_FLUSH_CACHE 0xA0000000
48#define MFI_STATE_READY 0xB0000000
49#define MFI_STATE_OPERATIONAL 0xC0000000
50#define MFI_STATE_FAULT 0xF0000000
51
52#define MEGAMFI_FRAME_SIZE 64
53
54/**
55 * During FW init, clear pending cmds & reset state using inbound_msg_0
56 *
57 * ABORT : Abort all pending cmds
58 * READY : Move from OPERATIONAL to READY state; discard queue info
59 * MFIMODE : Discard (possible) low MFA posted in 64-bit mode (??)
60 * CLR_HANDSHAKE: FW is waiting for HANDSHAKE from BIOS or Driver
61 */
62#define MFI_INIT_ABORT 0x00000000
63#define MFI_INIT_READY 0x00000002
64#define MFI_INIT_MFIMODE 0x00000004
65#define MFI_INIT_CLEAR_HANDSHAKE 0x00000008
66#define MFI_RESET_FLAGS MFI_INIT_READY|MFI_INIT_MFIMODE
67
68/**
69 * MFI frame flags
70 */
71#define MFI_FRAME_POST_IN_REPLY_QUEUE 0x0000
72#define MFI_FRAME_DONT_POST_IN_REPLY_QUEUE 0x0001
73#define MFI_FRAME_SGL32 0x0000
74#define MFI_FRAME_SGL64 0x0002
75#define MFI_FRAME_SENSE32 0x0000
76#define MFI_FRAME_SENSE64 0x0004
77#define MFI_FRAME_DIR_NONE 0x0000
78#define MFI_FRAME_DIR_WRITE 0x0008
79#define MFI_FRAME_DIR_READ 0x0010
80#define MFI_FRAME_DIR_BOTH 0x0018
81
82/**
83 * Definition for cmd_status
84 */
85#define MFI_CMD_STATUS_POLL_MODE 0xFF
86
87/**
88 * MFI command opcodes
89 */
90#define MFI_CMD_INIT 0x00
91#define MFI_CMD_LD_READ 0x01
92#define MFI_CMD_LD_WRITE 0x02
93#define MFI_CMD_LD_SCSI_IO 0x03
94#define MFI_CMD_PD_SCSI_IO 0x04
95#define MFI_CMD_DCMD 0x05
96#define MFI_CMD_ABORT 0x06
97#define MFI_CMD_SMP 0x07
98#define MFI_CMD_STP 0x08
99
100#define MR_DCMD_CTRL_GET_INFO 0x01010000
101
102#define MR_DCMD_CTRL_CACHE_FLUSH 0x01101000
103#define MR_FLUSH_CTRL_CACHE 0x01
104#define MR_FLUSH_DISK_CACHE 0x02
105
106#define MR_DCMD_CTRL_SHUTDOWN 0x01050000
107#define MR_ENABLE_DRIVE_SPINDOWN 0x01
108
109#define MR_DCMD_CTRL_EVENT_GET_INFO 0x01040100
110#define MR_DCMD_CTRL_EVENT_GET 0x01040300
111#define MR_DCMD_CTRL_EVENT_WAIT 0x01040500
112#define MR_DCMD_LD_GET_PROPERTIES 0x03030000
113
114#define MR_DCMD_CLUSTER 0x08000000
115#define MR_DCMD_CLUSTER_RESET_ALL 0x08010100
116#define MR_DCMD_CLUSTER_RESET_LD 0x08010200
117
118/**
119 * MFI command completion codes
120 */
121enum MFI_STAT {
122 MFI_STAT_OK = 0x00,
123 MFI_STAT_INVALID_CMD = 0x01,
124 MFI_STAT_INVALID_DCMD = 0x02,
125 MFI_STAT_INVALID_PARAMETER = 0x03,
126 MFI_STAT_INVALID_SEQUENCE_NUMBER = 0x04,
127 MFI_STAT_ABORT_NOT_POSSIBLE = 0x05,
128 MFI_STAT_APP_HOST_CODE_NOT_FOUND = 0x06,
129 MFI_STAT_APP_IN_USE = 0x07,
130 MFI_STAT_APP_NOT_INITIALIZED = 0x08,
131 MFI_STAT_ARRAY_INDEX_INVALID = 0x09,
132 MFI_STAT_ARRAY_ROW_NOT_EMPTY = 0x0a,
133 MFI_STAT_CONFIG_RESOURCE_CONFLICT = 0x0b,
134 MFI_STAT_DEVICE_NOT_FOUND = 0x0c,
135 MFI_STAT_DRIVE_TOO_SMALL = 0x0d,
136 MFI_STAT_FLASH_ALLOC_FAIL = 0x0e,
137 MFI_STAT_FLASH_BUSY = 0x0f,
138 MFI_STAT_FLASH_ERROR = 0x10,
139 MFI_STAT_FLASH_IMAGE_BAD = 0x11,
140 MFI_STAT_FLASH_IMAGE_INCOMPLETE = 0x12,
141 MFI_STAT_FLASH_NOT_OPEN = 0x13,
142 MFI_STAT_FLASH_NOT_STARTED = 0x14,
143 MFI_STAT_FLUSH_FAILED = 0x15,
144 MFI_STAT_HOST_CODE_NOT_FOUNT = 0x16,
145 MFI_STAT_LD_CC_IN_PROGRESS = 0x17,
146 MFI_STAT_LD_INIT_IN_PROGRESS = 0x18,
147 MFI_STAT_LD_LBA_OUT_OF_RANGE = 0x19,
148 MFI_STAT_LD_MAX_CONFIGURED = 0x1a,
149 MFI_STAT_LD_NOT_OPTIMAL = 0x1b,
150 MFI_STAT_LD_RBLD_IN_PROGRESS = 0x1c,
151 MFI_STAT_LD_RECON_IN_PROGRESS = 0x1d,
152 MFI_STAT_LD_WRONG_RAID_LEVEL = 0x1e,
153 MFI_STAT_MAX_SPARES_EXCEEDED = 0x1f,
154 MFI_STAT_MEMORY_NOT_AVAILABLE = 0x20,
155 MFI_STAT_MFC_HW_ERROR = 0x21,
156 MFI_STAT_NO_HW_PRESENT = 0x22,
157 MFI_STAT_NOT_FOUND = 0x23,
158 MFI_STAT_NOT_IN_ENCL = 0x24,
159 MFI_STAT_PD_CLEAR_IN_PROGRESS = 0x25,
160 MFI_STAT_PD_TYPE_WRONG = 0x26,
161 MFI_STAT_PR_DISABLED = 0x27,
162 MFI_STAT_ROW_INDEX_INVALID = 0x28,
163 MFI_STAT_SAS_CONFIG_INVALID_ACTION = 0x29,
164 MFI_STAT_SAS_CONFIG_INVALID_DATA = 0x2a,
165 MFI_STAT_SAS_CONFIG_INVALID_PAGE = 0x2b,
166 MFI_STAT_SAS_CONFIG_INVALID_TYPE = 0x2c,
167 MFI_STAT_SCSI_DONE_WITH_ERROR = 0x2d,
168 MFI_STAT_SCSI_IO_FAILED = 0x2e,
169 MFI_STAT_SCSI_RESERVATION_CONFLICT = 0x2f,
170 MFI_STAT_SHUTDOWN_FAILED = 0x30,
171 MFI_STAT_TIME_NOT_SET = 0x31,
172 MFI_STAT_WRONG_STATE = 0x32,
173 MFI_STAT_LD_OFFLINE = 0x33,
174 MFI_STAT_PEER_NOTIFICATION_REJECTED = 0x34,
175 MFI_STAT_PEER_NOTIFICATION_FAILED = 0x35,
176 MFI_STAT_RESERVATION_IN_PROGRESS = 0x36,
177 MFI_STAT_I2C_ERRORS_DETECTED = 0x37,
178 MFI_STAT_PCI_ERRORS_DETECTED = 0x38,
179
180 MFI_STAT_INVALID_STATUS = 0xFF
181};
182
183/*
184 * Number of mailbox bytes in DCMD message frame
185 */
186#define MFI_MBOX_SIZE 12
187
188enum MR_EVT_CLASS {
189
190 MR_EVT_CLASS_DEBUG = -2,
191 MR_EVT_CLASS_PROGRESS = -1,
192 MR_EVT_CLASS_INFO = 0,
193 MR_EVT_CLASS_WARNING = 1,
194 MR_EVT_CLASS_CRITICAL = 2,
195 MR_EVT_CLASS_FATAL = 3,
196 MR_EVT_CLASS_DEAD = 4,
197
198};
199
200enum MR_EVT_LOCALE {
201
202 MR_EVT_LOCALE_LD = 0x0001,
203 MR_EVT_LOCALE_PD = 0x0002,
204 MR_EVT_LOCALE_ENCL = 0x0004,
205 MR_EVT_LOCALE_BBU = 0x0008,
206 MR_EVT_LOCALE_SAS = 0x0010,
207 MR_EVT_LOCALE_CTRL = 0x0020,
208 MR_EVT_LOCALE_CONFIG = 0x0040,
209 MR_EVT_LOCALE_CLUSTER = 0x0080,
210 MR_EVT_LOCALE_ALL = 0xffff,
211
212};
213
214enum MR_EVT_ARGS {
215
216 MR_EVT_ARGS_NONE,
217 MR_EVT_ARGS_CDB_SENSE,
218 MR_EVT_ARGS_LD,
219 MR_EVT_ARGS_LD_COUNT,
220 MR_EVT_ARGS_LD_LBA,
221 MR_EVT_ARGS_LD_OWNER,
222 MR_EVT_ARGS_LD_LBA_PD_LBA,
223 MR_EVT_ARGS_LD_PROG,
224 MR_EVT_ARGS_LD_STATE,
225 MR_EVT_ARGS_LD_STRIP,
226 MR_EVT_ARGS_PD,
227 MR_EVT_ARGS_PD_ERR,
228 MR_EVT_ARGS_PD_LBA,
229 MR_EVT_ARGS_PD_LBA_LD,
230 MR_EVT_ARGS_PD_PROG,
231 MR_EVT_ARGS_PD_STATE,
232 MR_EVT_ARGS_PCI,
233 MR_EVT_ARGS_RATE,
234 MR_EVT_ARGS_STR,
235 MR_EVT_ARGS_TIME,
236 MR_EVT_ARGS_ECC,
237
238};
239
240/*
241 * SAS controller properties
242 */
243struct megasas_ctrl_prop {
244
245 u16 seq_num;
246 u16 pred_fail_poll_interval;
247 u16 intr_throttle_count;
248 u16 intr_throttle_timeouts;
249 u8 rebuild_rate;
250 u8 patrol_read_rate;
251 u8 bgi_rate;
252 u8 cc_rate;
253 u8 recon_rate;
254 u8 cache_flush_interval;
255 u8 spinup_drv_count;
256 u8 spinup_delay;
257 u8 cluster_enable;
258 u8 coercion_mode;
259 u8 alarm_enable;
260 u8 disable_auto_rebuild;
261 u8 disable_battery_warn;
262 u8 ecc_bucket_size;
263 u16 ecc_bucket_leak_rate;
264 u8 restore_hotspare_on_insertion;
265 u8 expose_encl_devices;
266 u8 reserved[38];
267
268} __attribute__ ((packed));
269
270/*
271 * SAS controller information
272 */
273struct megasas_ctrl_info {
274
275 /*
276 * PCI device information
277 */
278 struct {
279
280 u16 vendor_id;
281 u16 device_id;
282 u16 sub_vendor_id;
283 u16 sub_device_id;
284 u8 reserved[24];
285
286 } __attribute__ ((packed)) pci;
287
288 /*
289 * Host interface information
290 */
291 struct {
292
293 u8 PCIX:1;
294 u8 PCIE:1;
295 u8 iSCSI:1;
296 u8 SAS_3G:1;
297 u8 reserved_0:4;
298 u8 reserved_1[6];
299 u8 port_count;
300 u64 port_addr[8];
301
302 } __attribute__ ((packed)) host_interface;
303
304 /*
305 * Device (backend) interface information
306 */
307 struct {
308
309 u8 SPI:1;
310 u8 SAS_3G:1;
311 u8 SATA_1_5G:1;
312 u8 SATA_3G:1;
313 u8 reserved_0:4;
314 u8 reserved_1[6];
315 u8 port_count;
316 u64 port_addr[8];
317
318 } __attribute__ ((packed)) device_interface;
319
320 /*
321 * List of components residing in flash. All str are null terminated
322 */
323 u32 image_check_word;
324 u32 image_component_count;
325
326 struct {
327
328 char name[8];
329 char version[32];
330 char build_date[16];
331 char built_time[16];
332
333 } __attribute__ ((packed)) image_component[8];
334
335 /*
336 * List of flash components that have been flashed on the card, but
337 * are not in use, pending reset of the adapter. This list will be
338 * empty if a flash operation has not occurred. All stings are null
339 * terminated
340 */
341 u32 pending_image_component_count;
342
343 struct {
344
345 char name[8];
346 char version[32];
347 char build_date[16];
348 char build_time[16];
349
350 } __attribute__ ((packed)) pending_image_component[8];
351
352 u8 max_arms;
353 u8 max_spans;
354 u8 max_arrays;
355 u8 max_lds;
356
357 char product_name[80];
358 char serial_no[32];
359
360 /*
361 * Other physical/controller/operation information. Indicates the
362 * presence of the hardware
363 */
364 struct {
365
366 u32 bbu:1;
367 u32 alarm:1;
368 u32 nvram:1;
369 u32 uart:1;
370 u32 reserved:28;
371
372 } __attribute__ ((packed)) hw_present;
373
374 u32 current_fw_time;
375
376 /*
377 * Maximum data transfer sizes
378 */
379 u16 max_concurrent_cmds;
380 u16 max_sge_count;
381 u32 max_request_size;
382
383 /*
384 * Logical and physical device counts
385 */
386 u16 ld_present_count;
387 u16 ld_degraded_count;
388 u16 ld_offline_count;
389
390 u16 pd_present_count;
391 u16 pd_disk_present_count;
392 u16 pd_disk_pred_failure_count;
393 u16 pd_disk_failed_count;
394
395 /*
396 * Memory size information
397 */
398 u16 nvram_size;
399 u16 memory_size;
400 u16 flash_size;
401
402 /*
403 * Error counters
404 */
405 u16 mem_correctable_error_count;
406 u16 mem_uncorrectable_error_count;
407
408 /*
409 * Cluster information
410 */
411 u8 cluster_permitted;
412 u8 cluster_active;
413
414 /*
415 * Additional max data transfer sizes
416 */
417 u16 max_strips_per_io;
418
419 /*
420 * Controller capabilities structures
421 */
422 struct {
423
424 u32 raid_level_0:1;
425 u32 raid_level_1:1;
426 u32 raid_level_5:1;
427 u32 raid_level_1E:1;
428 u32 raid_level_6:1;
429 u32 reserved:27;
430
431 } __attribute__ ((packed)) raid_levels;
432
433 struct {
434
435 u32 rbld_rate:1;
436 u32 cc_rate:1;
437 u32 bgi_rate:1;
438 u32 recon_rate:1;
439 u32 patrol_rate:1;
440 u32 alarm_control:1;
441 u32 cluster_supported:1;
442 u32 bbu:1;
443 u32 spanning_allowed:1;
444 u32 dedicated_hotspares:1;
445 u32 revertible_hotspares:1;
446 u32 foreign_config_import:1;
447 u32 self_diagnostic:1;
448 u32 mixed_redundancy_arr:1;
449 u32 global_hot_spares:1;
450 u32 reserved:17;
451
452 } __attribute__ ((packed)) adapter_operations;
453
454 struct {
455
456 u32 read_policy:1;
457 u32 write_policy:1;
458 u32 io_policy:1;
459 u32 access_policy:1;
460 u32 disk_cache_policy:1;
461 u32 reserved:27;
462
463 } __attribute__ ((packed)) ld_operations;
464
465 struct {
466
467 u8 min;
468 u8 max;
469 u8 reserved[2];
470
471 } __attribute__ ((packed)) stripe_sz_ops;
472
473 struct {
474
475 u32 force_online:1;
476 u32 force_offline:1;
477 u32 force_rebuild:1;
478 u32 reserved:29;
479
480 } __attribute__ ((packed)) pd_operations;
481
482 struct {
483
484 u32 ctrl_supports_sas:1;
485 u32 ctrl_supports_sata:1;
486 u32 allow_mix_in_encl:1;
487 u32 allow_mix_in_ld:1;
488 u32 allow_sata_in_cluster:1;
489 u32 reserved:27;
490
491 } __attribute__ ((packed)) pd_mix_support;
492
493 /*
494 * Define ECC single-bit-error bucket information
495 */
496 u8 ecc_bucket_count;
497 u8 reserved_2[11];
498
499 /*
500 * Include the controller properties (changeable items)
501 */
502 struct megasas_ctrl_prop properties;
503
504 /*
505 * Define FW pkg version (set in envt v'bles on OEM basis)
506 */
507 char package_version[0x60];
508
509 u8 pad[0x800 - 0x6a0];
510
511} __attribute__ ((packed));
512
513/*
514 * ===============================
515 * MegaRAID SAS driver definitions
516 * ===============================
517 */
518#define MEGASAS_MAX_PD_CHANNELS 2
519#define MEGASAS_MAX_LD_CHANNELS 2
520#define MEGASAS_MAX_CHANNELS (MEGASAS_MAX_PD_CHANNELS + \
521 MEGASAS_MAX_LD_CHANNELS)
522#define MEGASAS_MAX_DEV_PER_CHANNEL 128
523#define MEGASAS_DEFAULT_INIT_ID -1
524#define MEGASAS_MAX_LUN 8
525#define MEGASAS_MAX_LD 64
526
527/*
528 * When SCSI mid-layer calls driver's reset routine, driver waits for
529 * MEGASAS_RESET_WAIT_TIME seconds for all outstanding IO to complete. Note
530 * that the driver cannot _actually_ abort or reset pending commands. While
531 * it is waiting for the commands to complete, it prints a diagnostic message
532 * every MEGASAS_RESET_NOTICE_INTERVAL seconds
533 */
534#define MEGASAS_RESET_WAIT_TIME 180
535#define MEGASAS_RESET_NOTICE_INTERVAL 5
536
537#define MEGASAS_IOCTL_CMD 0
538
539/*
540 * FW reports the maximum of number of commands that it can accept (maximum
541 * commands that can be outstanding) at any time. The driver must report a
542 * lower number to the mid layer because it can issue a few internal commands
543 * itself (E.g, AEN, abort cmd, IOCTLs etc). The number of commands it needs
544 * is shown below
545 */
546#define MEGASAS_INT_CMDS 32
547
548/*
549 * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit
550 * SGLs based on the size of dma_addr_t
551 */
552#define IS_DMA64 (sizeof(dma_addr_t) == 8)
553
554#define MFI_OB_INTR_STATUS_MASK 0x00000002
555#define MFI_POLL_TIMEOUT_SECS 10
556
557struct megasas_register_set {
558
559 u32 reserved_0[4]; /*0000h */
560
561 u32 inbound_msg_0; /*0010h */
562 u32 inbound_msg_1; /*0014h */
563 u32 outbound_msg_0; /*0018h */
564 u32 outbound_msg_1; /*001Ch */
565
566 u32 inbound_doorbell; /*0020h */
567 u32 inbound_intr_status; /*0024h */
568 u32 inbound_intr_mask; /*0028h */
569
570 u32 outbound_doorbell; /*002Ch */
571 u32 outbound_intr_status; /*0030h */
572 u32 outbound_intr_mask; /*0034h */
573
574 u32 reserved_1[2]; /*0038h */
575
576 u32 inbound_queue_port; /*0040h */
577 u32 outbound_queue_port; /*0044h */
578
579 u32 reserved_2; /*004Ch */
580
581 u32 index_registers[1004]; /*0050h */
582
583} __attribute__ ((packed));
584
585struct megasas_sge32 {
586
587 u32 phys_addr;
588 u32 length;
589
590} __attribute__ ((packed));
591
592struct megasas_sge64 {
593
594 u64 phys_addr;
595 u32 length;
596
597} __attribute__ ((packed));
598
599union megasas_sgl {
600
601 struct megasas_sge32 sge32[1];
602 struct megasas_sge64 sge64[1];
603
604} __attribute__ ((packed));
605
606struct megasas_header {
607
608 u8 cmd; /*00h */
609 u8 sense_len; /*01h */
610 u8 cmd_status; /*02h */
611 u8 scsi_status; /*03h */
612
613 u8 target_id; /*04h */
614 u8 lun; /*05h */
615 u8 cdb_len; /*06h */
616 u8 sge_count; /*07h */
617
618 u32 context; /*08h */
619 u32 pad_0; /*0Ch */
620
621 u16 flags; /*10h */
622 u16 timeout; /*12h */
623 u32 data_xferlen; /*14h */
624
625} __attribute__ ((packed));
626
627union megasas_sgl_frame {
628
629 struct megasas_sge32 sge32[8];
630 struct megasas_sge64 sge64[5];
631
632} __attribute__ ((packed));
633
634struct megasas_init_frame {
635
636 u8 cmd; /*00h */
637 u8 reserved_0; /*01h */
638 u8 cmd_status; /*02h */
639
640 u8 reserved_1; /*03h */
641 u32 reserved_2; /*04h */
642
643 u32 context; /*08h */
644 u32 pad_0; /*0Ch */
645
646 u16 flags; /*10h */
647 u16 reserved_3; /*12h */
648 u32 data_xfer_len; /*14h */
649
650 u32 queue_info_new_phys_addr_lo; /*18h */
651 u32 queue_info_new_phys_addr_hi; /*1Ch */
652 u32 queue_info_old_phys_addr_lo; /*20h */
653 u32 queue_info_old_phys_addr_hi; /*24h */
654
655 u32 reserved_4[6]; /*28h */
656
657} __attribute__ ((packed));
658
659struct megasas_init_queue_info {
660
661 u32 init_flags; /*00h */
662 u32 reply_queue_entries; /*04h */
663
664 u32 reply_queue_start_phys_addr_lo; /*08h */
665 u32 reply_queue_start_phys_addr_hi; /*0Ch */
666 u32 producer_index_phys_addr_lo; /*10h */
667 u32 producer_index_phys_addr_hi; /*14h */
668 u32 consumer_index_phys_addr_lo; /*18h */
669 u32 consumer_index_phys_addr_hi; /*1Ch */
670
671} __attribute__ ((packed));
672
673struct megasas_io_frame {
674
675 u8 cmd; /*00h */
676 u8 sense_len; /*01h */
677 u8 cmd_status; /*02h */
678 u8 scsi_status; /*03h */
679
680 u8 target_id; /*04h */
681 u8 access_byte; /*05h */
682 u8 reserved_0; /*06h */
683 u8 sge_count; /*07h */
684
685 u32 context; /*08h */
686 u32 pad_0; /*0Ch */
687
688 u16 flags; /*10h */
689 u16 timeout; /*12h */
690 u32 lba_count; /*14h */
691
692 u32 sense_buf_phys_addr_lo; /*18h */
693 u32 sense_buf_phys_addr_hi; /*1Ch */
694
695 u32 start_lba_lo; /*20h */
696 u32 start_lba_hi; /*24h */
697
698 union megasas_sgl sgl; /*28h */
699
700} __attribute__ ((packed));
701
702struct megasas_pthru_frame {
703
704 u8 cmd; /*00h */
705 u8 sense_len; /*01h */
706 u8 cmd_status; /*02h */
707 u8 scsi_status; /*03h */
708
709 u8 target_id; /*04h */
710 u8 lun; /*05h */
711 u8 cdb_len; /*06h */
712 u8 sge_count; /*07h */
713
714 u32 context; /*08h */
715 u32 pad_0; /*0Ch */
716
717 u16 flags; /*10h */
718 u16 timeout; /*12h */
719 u32 data_xfer_len; /*14h */
720
721 u32 sense_buf_phys_addr_lo; /*18h */
722 u32 sense_buf_phys_addr_hi; /*1Ch */
723
724 u8 cdb[16]; /*20h */
725 union megasas_sgl sgl; /*30h */
726
727} __attribute__ ((packed));
728
729struct megasas_dcmd_frame {
730
731 u8 cmd; /*00h */
732 u8 reserved_0; /*01h */
733 u8 cmd_status; /*02h */
734 u8 reserved_1[4]; /*03h */
735 u8 sge_count; /*07h */
736
737 u32 context; /*08h */
738 u32 pad_0; /*0Ch */
739
740 u16 flags; /*10h */
741 u16 timeout; /*12h */
742
743 u32 data_xfer_len; /*14h */
744 u32 opcode; /*18h */
745
746 union { /*1Ch */
747 u8 b[12];
748 u16 s[6];
749 u32 w[3];
750 } mbox;
751
752 union megasas_sgl sgl; /*28h */
753
754} __attribute__ ((packed));
755
756struct megasas_abort_frame {
757
758 u8 cmd; /*00h */
759 u8 reserved_0; /*01h */
760 u8 cmd_status; /*02h */
761
762 u8 reserved_1; /*03h */
763 u32 reserved_2; /*04h */
764
765 u32 context; /*08h */
766 u32 pad_0; /*0Ch */
767
768 u16 flags; /*10h */
769 u16 reserved_3; /*12h */
770 u32 reserved_4; /*14h */
771
772 u32 abort_context; /*18h */
773 u32 pad_1; /*1Ch */
774
775 u32 abort_mfi_phys_addr_lo; /*20h */
776 u32 abort_mfi_phys_addr_hi; /*24h */
777
778 u32 reserved_5[6]; /*28h */
779
780} __attribute__ ((packed));
781
782struct megasas_smp_frame {
783
784 u8 cmd; /*00h */
785 u8 reserved_1; /*01h */
786 u8 cmd_status; /*02h */
787 u8 connection_status; /*03h */
788
789 u8 reserved_2[3]; /*04h */
790 u8 sge_count; /*07h */
791
792 u32 context; /*08h */
793 u32 pad_0; /*0Ch */
794
795 u16 flags; /*10h */
796 u16 timeout; /*12h */
797
798 u32 data_xfer_len; /*14h */
799 u64 sas_addr; /*18h */
800
801 union {
802 struct megasas_sge32 sge32[2]; /* [0]: resp [1]: req */
803 struct megasas_sge64 sge64[2]; /* [0]: resp [1]: req */
804 } sgl;
805
806} __attribute__ ((packed));
807
808struct megasas_stp_frame {
809
810 u8 cmd; /*00h */
811 u8 reserved_1; /*01h */
812 u8 cmd_status; /*02h */
813 u8 reserved_2; /*03h */
814
815 u8 target_id; /*04h */
816 u8 reserved_3[2]; /*05h */
817 u8 sge_count; /*07h */
818
819 u32 context; /*08h */
820 u32 pad_0; /*0Ch */
821
822 u16 flags; /*10h */
823 u16 timeout; /*12h */
824
825 u32 data_xfer_len; /*14h */
826
827 u16 fis[10]; /*18h */
828 u32 stp_flags;
829
830 union {
831 struct megasas_sge32 sge32[2]; /* [0]: resp [1]: data */
832 struct megasas_sge64 sge64[2]; /* [0]: resp [1]: data */
833 } sgl;
834
835} __attribute__ ((packed));
836
837union megasas_frame {
838
839 struct megasas_header hdr;
840 struct megasas_init_frame init;
841 struct megasas_io_frame io;
842 struct megasas_pthru_frame pthru;
843 struct megasas_dcmd_frame dcmd;
844 struct megasas_abort_frame abort;
845 struct megasas_smp_frame smp;
846 struct megasas_stp_frame stp;
847
848 u8 raw_bytes[64];
849};
850
851struct megasas_cmd;
852
853union megasas_evt_class_locale {
854
855 struct {
856 u16 locale;
857 u8 reserved;
858 s8 class;
859 } __attribute__ ((packed)) members;
860
861 u32 word;
862
863} __attribute__ ((packed));
864
865struct megasas_evt_log_info {
866 u32 newest_seq_num;
867 u32 oldest_seq_num;
868 u32 clear_seq_num;
869 u32 shutdown_seq_num;
870 u32 boot_seq_num;
871
872} __attribute__ ((packed));
873
874struct megasas_progress {
875
876 u16 progress;
877 u16 elapsed_seconds;
878
879} __attribute__ ((packed));
880
881struct megasas_evtarg_ld {
882
883 u16 target_id;
884 u8 ld_index;
885 u8 reserved;
886
887} __attribute__ ((packed));
888
889struct megasas_evtarg_pd {
890 u16 device_id;
891 u8 encl_index;
892 u8 slot_number;
893
894} __attribute__ ((packed));
895
896struct megasas_evt_detail {
897
898 u32 seq_num;
899 u32 time_stamp;
900 u32 code;
901 union megasas_evt_class_locale cl;
902 u8 arg_type;
903 u8 reserved1[15];
904
905 union {
906 struct {
907 struct megasas_evtarg_pd pd;
908 u8 cdb_length;
909 u8 sense_length;
910 u8 reserved[2];
911 u8 cdb[16];
912 u8 sense[64];
913 } __attribute__ ((packed)) cdbSense;
914
915 struct megasas_evtarg_ld ld;
916
917 struct {
918 struct megasas_evtarg_ld ld;
919 u64 count;
920 } __attribute__ ((packed)) ld_count;
921
922 struct {
923 u64 lba;
924 struct megasas_evtarg_ld ld;
925 } __attribute__ ((packed)) ld_lba;
926
927 struct {
928 struct megasas_evtarg_ld ld;
929 u32 prevOwner;
930 u32 newOwner;
931 } __attribute__ ((packed)) ld_owner;
932
933 struct {
934 u64 ld_lba;
935 u64 pd_lba;
936 struct megasas_evtarg_ld ld;
937 struct megasas_evtarg_pd pd;
938 } __attribute__ ((packed)) ld_lba_pd_lba;
939
940 struct {
941 struct megasas_evtarg_ld ld;
942 struct megasas_progress prog;
943 } __attribute__ ((packed)) ld_prog;
944
945 struct {
946 struct megasas_evtarg_ld ld;
947 u32 prev_state;
948 u32 new_state;
949 } __attribute__ ((packed)) ld_state;
950
951 struct {
952 u64 strip;
953 struct megasas_evtarg_ld ld;
954 } __attribute__ ((packed)) ld_strip;
955
956 struct megasas_evtarg_pd pd;
957
958 struct {
959 struct megasas_evtarg_pd pd;
960 u32 err;
961 } __attribute__ ((packed)) pd_err;
962
963 struct {
964 u64 lba;
965 struct megasas_evtarg_pd pd;
966 } __attribute__ ((packed)) pd_lba;
967
968 struct {
969 u64 lba;
970 struct megasas_evtarg_pd pd;
971 struct megasas_evtarg_ld ld;
972 } __attribute__ ((packed)) pd_lba_ld;
973
974 struct {
975 struct megasas_evtarg_pd pd;
976 struct megasas_progress prog;
977 } __attribute__ ((packed)) pd_prog;
978
979 struct {
980 struct megasas_evtarg_pd pd;
981 u32 prevState;
982 u32 newState;
983 } __attribute__ ((packed)) pd_state;
984
985 struct {
986 u16 vendorId;
987 u16 deviceId;
988 u16 subVendorId;
989 u16 subDeviceId;
990 } __attribute__ ((packed)) pci;
991
992 u32 rate;
993 char str[96];
994
995 struct {
996 u32 rtc;
997 u32 elapsedSeconds;
998 } __attribute__ ((packed)) time;
999
1000 struct {
1001 u32 ecar;
1002 u32 elog;
1003 char str[64];
1004 } __attribute__ ((packed)) ecc;
1005
1006 u8 b[96];
1007 u16 s[48];
1008 u32 w[24];
1009 u64 d[12];
1010 } args;
1011
1012 char description[128];
1013
1014} __attribute__ ((packed));
1015
1016struct megasas_instance {
1017
1018 u32 *producer;
1019 dma_addr_t producer_h;
1020 u32 *consumer;
1021 dma_addr_t consumer_h;
1022
1023 u32 *reply_queue;
1024 dma_addr_t reply_queue_h;
1025
1026 unsigned long base_addr;
1027 struct megasas_register_set __iomem *reg_set;
1028
1029 s8 init_id;
1030 u8 reserved[3];
1031
1032 u16 max_num_sge;
1033 u16 max_fw_cmds;
1034 u32 max_sectors_per_req;
1035
1036 struct megasas_cmd **cmd_list;
1037 struct list_head cmd_pool;
1038 spinlock_t cmd_pool_lock;
1039 struct dma_pool *frame_dma_pool;
1040 struct dma_pool *sense_dma_pool;
1041
1042 struct megasas_evt_detail *evt_detail;
1043 dma_addr_t evt_detail_h;
1044 struct megasas_cmd *aen_cmd;
1045 struct semaphore aen_mutex;
1046 struct semaphore ioctl_sem;
1047
1048 struct Scsi_Host *host;
1049
1050 wait_queue_head_t int_cmd_wait_q;
1051 wait_queue_head_t abort_cmd_wait_q;
1052
1053 struct pci_dev *pdev;
1054 u32 unique_id;
1055
1056 u32 fw_outstanding;
1057 u32 hw_crit_error;
1058 spinlock_t instance_lock;
1059};
1060
1061#define MEGASAS_IS_LOGICAL(scp) \
1062 (scp->device->channel < MEGASAS_MAX_PD_CHANNELS) ? 0 : 1
1063
1064#define MEGASAS_DEV_INDEX(inst, scp) \
1065 ((scp->device->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL) + \
1066 scp->device->id
1067
1068struct megasas_cmd {
1069
1070 union megasas_frame *frame;
1071 dma_addr_t frame_phys_addr;
1072 u8 *sense;
1073 dma_addr_t sense_phys_addr;
1074
1075 u32 index;
1076 u8 sync_cmd;
1077 u8 cmd_status;
1078 u16 abort_aen;
1079
1080 struct list_head list;
1081 struct scsi_cmnd *scmd;
1082 struct megasas_instance *instance;
1083 u32 frame_count;
1084};
1085
1086#define MAX_MGMT_ADAPTERS 1024
1087#define MAX_IOCTL_SGE 16
1088
1089struct megasas_iocpacket {
1090
1091 u16 host_no;
1092 u16 __pad1;
1093 u32 sgl_off;
1094 u32 sge_count;
1095 u32 sense_off;
1096 u32 sense_len;
1097 union {
1098 u8 raw[128];
1099 struct megasas_header hdr;
1100 } frame;
1101
1102 struct iovec sgl[MAX_IOCTL_SGE];
1103
1104} __attribute__ ((packed));
1105
1106struct megasas_aen {
1107 u16 host_no;
1108 u16 __pad1;
1109 u32 seq_num;
1110 u32 class_locale_word;
1111} __attribute__ ((packed));
1112
1113#ifdef CONFIG_COMPAT
1114struct compat_megasas_iocpacket {
1115 u16 host_no;
1116 u16 __pad1;
1117 u32 sgl_off;
1118 u32 sge_count;
1119 u32 sense_off;
1120 u32 sense_len;
1121 union {
1122 u8 raw[128];
1123 struct megasas_header hdr;
1124 } frame;
1125 struct compat_iovec sgl[MAX_IOCTL_SGE];
1126} __attribute__ ((packed));
1127
1128#define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct compat_megasas_iocpacket)
1129#else
1130#define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket)
1131#endif
1132
1133#define MEGASAS_IOC_GET_AEN _IOW('M', 3, struct megasas_aen)
1134
1135struct megasas_mgmt_info {
1136
1137 u16 count;
1138 struct megasas_instance *instance[MAX_MGMT_ADAPTERS];
1139 int max_index;
1140};
1141
1142#endif /*LSI_MEGARAID_SAS_H */
diff --git a/drivers/scsi/mesh.c b/drivers/scsi/mesh.c
index a4857db4f9b8..b235556b7b65 100644
--- a/drivers/scsi/mesh.c
+++ b/drivers/scsi/mesh.c
@@ -1959,22 +1959,35 @@ static int mesh_probe(struct macio_dev *mdev, const struct of_device_id *match)
1959 /* Set it up */ 1959 /* Set it up */
1960 mesh_init(ms); 1960 mesh_init(ms);
1961 1961
1962 /* XXX FIXME: error should be fatal */ 1962 /* Request interrupt */
1963 if (request_irq(ms->meshintr, do_mesh_interrupt, 0, "MESH", ms)) 1963 if (request_irq(ms->meshintr, do_mesh_interrupt, 0, "MESH", ms)) {
1964 printk(KERN_ERR "MESH: can't get irq %d\n", ms->meshintr); 1964 printk(KERN_ERR "MESH: can't get irq %d\n", ms->meshintr);
1965 goto out_shutdown;
1966 }
1965 1967
1966 /* XXX FIXME: handle failure */ 1968 /* Add scsi host & scan */
1967 scsi_add_host(mesh_host, &mdev->ofdev.dev); 1969 if (scsi_add_host(mesh_host, &mdev->ofdev.dev))
1970 goto out_release_irq;
1968 scsi_scan_host(mesh_host); 1971 scsi_scan_host(mesh_host);
1969 1972
1970 return 0; 1973 return 0;
1971 1974
1972out_unmap: 1975 out_release_irq:
1976 free_irq(ms->meshintr, ms);
1977 out_shutdown:
1978 /* shutdown & reset bus in case of error or macos can be confused
1979 * at reboot if the bus was set to synchronous mode already
1980 */
1981 mesh_shutdown(mdev);
1982 set_mesh_power(ms, 0);
1983 pci_free_consistent(macio_get_pci_dev(mdev), ms->dma_cmd_size,
1984 ms->dma_cmd_space, ms->dma_cmd_bus);
1985 out_unmap:
1973 iounmap(ms->dma); 1986 iounmap(ms->dma);
1974 iounmap(ms->mesh); 1987 iounmap(ms->mesh);
1975out_free: 1988 out_free:
1976 scsi_host_put(mesh_host); 1989 scsi_host_put(mesh_host);
1977out_release: 1990 out_release:
1978 macio_release_resources(mdev); 1991 macio_release_resources(mdev);
1979 1992
1980 return -ENODEV; 1993 return -ENODEV;
@@ -2001,7 +2014,7 @@ static int mesh_remove(struct macio_dev *mdev)
2001 2014
2002 /* Free DMA commands memory */ 2015 /* Free DMA commands memory */
2003 pci_free_consistent(macio_get_pci_dev(mdev), ms->dma_cmd_size, 2016 pci_free_consistent(macio_get_pci_dev(mdev), ms->dma_cmd_size,
2004 ms->dma_cmd_space, ms->dma_cmd_bus); 2017 ms->dma_cmd_space, ms->dma_cmd_bus);
2005 2018
2006 /* Release memory resources */ 2019 /* Release memory resources */
2007 macio_release_resources(mdev); 2020 macio_release_resources(mdev);
diff --git a/drivers/scsi/osst.c b/drivers/scsi/osst.c
index 3f2f2464fa63..af1133104b3f 100644
--- a/drivers/scsi/osst.c
+++ b/drivers/scsi/osst.c
@@ -5146,7 +5146,8 @@ static long osst_compat_ioctl(struct file * file, unsigned int cmd_in, unsigned
5146/* Try to allocate a new tape buffer skeleton. Caller must not hold os_scsi_tapes_lock */ 5146/* Try to allocate a new tape buffer skeleton. Caller must not hold os_scsi_tapes_lock */
5147static struct osst_buffer * new_tape_buffer( int from_initialization, int need_dma, int max_sg ) 5147static struct osst_buffer * new_tape_buffer( int from_initialization, int need_dma, int max_sg )
5148{ 5148{
5149 int i, priority; 5149 int i;
5150 gfp_t priority;
5150 struct osst_buffer *tb; 5151 struct osst_buffer *tb;
5151 5152
5152 if (from_initialization) 5153 if (from_initialization)
@@ -5178,7 +5179,8 @@ static struct osst_buffer * new_tape_buffer( int from_initialization, int need_d
5178/* Try to allocate a temporary (while a user has the device open) enlarged tape buffer */ 5179/* Try to allocate a temporary (while a user has the device open) enlarged tape buffer */
5179static int enlarge_buffer(struct osst_buffer *STbuffer, int need_dma) 5180static int enlarge_buffer(struct osst_buffer *STbuffer, int need_dma)
5180{ 5181{
5181 int segs, nbr, max_segs, b_size, priority, order, got; 5182 int segs, nbr, max_segs, b_size, order, got;
5183 gfp_t priority;
5182 5184
5183 if (STbuffer->buffer_size >= OS_FRAME_SIZE) 5185 if (STbuffer->buffer_size >= OS_FRAME_SIZE)
5184 return 1; 5186 return 1;
diff --git a/drivers/scsi/pdc_adma.c b/drivers/scsi/pdc_adma.c
new file mode 100644
index 000000000000..9820f272f889
--- /dev/null
+++ b/drivers/scsi/pdc_adma.c
@@ -0,0 +1,739 @@
1/*
2 * pdc_adma.c - Pacific Digital Corporation ADMA
3 *
4 * Maintained by: Mark Lord <mlord@pobox.com>
5 *
6 * Copyright 2005 Mark Lord
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; see the file COPYING. If not, write to
20 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 *
23 * libata documentation is available via 'make {ps|pdf}docs',
24 * as Documentation/DocBook/libata.*
25 *
26 *
27 * Supports ATA disks in single-packet ADMA mode.
28 * Uses PIO for everything else.
29 *
30 * TODO: Use ADMA transfers for ATAPI devices, when possible.
31 * This requires careful attention to a number of quirks of the chip.
32 *
33 */
34
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/pci.h>
38#include <linux/init.h>
39#include <linux/blkdev.h>
40#include <linux/delay.h>
41#include <linux/interrupt.h>
42#include <linux/sched.h>
43#include "scsi.h"
44#include <scsi/scsi_host.h>
45#include <asm/io.h>
46#include <linux/libata.h>
47
48#define DRV_NAME "pdc_adma"
49#define DRV_VERSION "0.01"
50
51/* macro to calculate base address for ATA regs */
52#define ADMA_ATA_REGS(base,port_no) ((base) + ((port_no) * 0x40))
53
54/* macro to calculate base address for ADMA regs */
55#define ADMA_REGS(base,port_no) ((base) + 0x80 + ((port_no) * 0x20))
56
57enum {
58 ADMA_PORTS = 2,
59 ADMA_CPB_BYTES = 40,
60 ADMA_PRD_BYTES = LIBATA_MAX_PRD * 16,
61 ADMA_PKT_BYTES = ADMA_CPB_BYTES + ADMA_PRD_BYTES,
62
63 ADMA_DMA_BOUNDARY = 0xffffffff,
64
65 /* global register offsets */
66 ADMA_MODE_LOCK = 0x00c7,
67
68 /* per-channel register offsets */
69 ADMA_CONTROL = 0x0000, /* ADMA control */
70 ADMA_STATUS = 0x0002, /* ADMA status */
71 ADMA_CPB_COUNT = 0x0004, /* CPB count */
72 ADMA_CPB_CURRENT = 0x000c, /* current CPB address */
73 ADMA_CPB_NEXT = 0x000c, /* next CPB address */
74 ADMA_CPB_LOOKUP = 0x0010, /* CPB lookup table */
75 ADMA_FIFO_IN = 0x0014, /* input FIFO threshold */
76 ADMA_FIFO_OUT = 0x0016, /* output FIFO threshold */
77
78 /* ADMA_CONTROL register bits */
79 aNIEN = (1 << 8), /* irq mask: 1==masked */
80 aGO = (1 << 7), /* packet trigger ("Go!") */
81 aRSTADM = (1 << 5), /* ADMA logic reset */
82 aRSTA = (1 << 2), /* ATA hard reset */
83 aPIOMD4 = 0x0003, /* PIO mode 4 */
84
85 /* ADMA_STATUS register bits */
86 aPSD = (1 << 6),
87 aUIRQ = (1 << 4),
88 aPERR = (1 << 0),
89
90 /* CPB bits */
91 cDONE = (1 << 0),
92 cVLD = (1 << 0),
93 cDAT = (1 << 2),
94 cIEN = (1 << 3),
95
96 /* PRD bits */
97 pORD = (1 << 4),
98 pDIRO = (1 << 5),
99 pEND = (1 << 7),
100
101 /* ATA register flags */
102 rIGN = (1 << 5),
103 rEND = (1 << 7),
104
105 /* ATA register addresses */
106 ADMA_REGS_CONTROL = 0x0e,
107 ADMA_REGS_SECTOR_COUNT = 0x12,
108 ADMA_REGS_LBA_LOW = 0x13,
109 ADMA_REGS_LBA_MID = 0x14,
110 ADMA_REGS_LBA_HIGH = 0x15,
111 ADMA_REGS_DEVICE = 0x16,
112 ADMA_REGS_COMMAND = 0x17,
113
114 /* PCI device IDs */
115 board_1841_idx = 0, /* ADMA 2-port controller */
116};
117
118typedef enum { adma_state_idle, adma_state_pkt, adma_state_mmio } adma_state_t;
119
120struct adma_port_priv {
121 u8 *pkt;
122 dma_addr_t pkt_dma;
123 adma_state_t state;
124};
125
126static int adma_ata_init_one (struct pci_dev *pdev,
127 const struct pci_device_id *ent);
128static irqreturn_t adma_intr (int irq, void *dev_instance,
129 struct pt_regs *regs);
130static int adma_port_start(struct ata_port *ap);
131static void adma_host_stop(struct ata_host_set *host_set);
132static void adma_port_stop(struct ata_port *ap);
133static void adma_phy_reset(struct ata_port *ap);
134static void adma_qc_prep(struct ata_queued_cmd *qc);
135static int adma_qc_issue(struct ata_queued_cmd *qc);
136static int adma_check_atapi_dma(struct ata_queued_cmd *qc);
137static void adma_bmdma_stop(struct ata_queued_cmd *qc);
138static u8 adma_bmdma_status(struct ata_port *ap);
139static void adma_irq_clear(struct ata_port *ap);
140static void adma_eng_timeout(struct ata_port *ap);
141
142static Scsi_Host_Template adma_ata_sht = {
143 .module = THIS_MODULE,
144 .name = DRV_NAME,
145 .ioctl = ata_scsi_ioctl,
146 .queuecommand = ata_scsi_queuecmd,
147 .eh_strategy_handler = ata_scsi_error,
148 .can_queue = ATA_DEF_QUEUE,
149 .this_id = ATA_SHT_THIS_ID,
150 .sg_tablesize = LIBATA_MAX_PRD,
151 .max_sectors = ATA_MAX_SECTORS,
152 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
153 .emulated = ATA_SHT_EMULATED,
154 .use_clustering = ENABLE_CLUSTERING,
155 .proc_name = DRV_NAME,
156 .dma_boundary = ADMA_DMA_BOUNDARY,
157 .slave_configure = ata_scsi_slave_config,
158 .bios_param = ata_std_bios_param,
159};
160
161static const struct ata_port_operations adma_ata_ops = {
162 .port_disable = ata_port_disable,
163 .tf_load = ata_tf_load,
164 .tf_read = ata_tf_read,
165 .check_status = ata_check_status,
166 .check_atapi_dma = adma_check_atapi_dma,
167 .exec_command = ata_exec_command,
168 .dev_select = ata_std_dev_select,
169 .phy_reset = adma_phy_reset,
170 .qc_prep = adma_qc_prep,
171 .qc_issue = adma_qc_issue,
172 .eng_timeout = adma_eng_timeout,
173 .irq_handler = adma_intr,
174 .irq_clear = adma_irq_clear,
175 .port_start = adma_port_start,
176 .port_stop = adma_port_stop,
177 .host_stop = adma_host_stop,
178 .bmdma_stop = adma_bmdma_stop,
179 .bmdma_status = adma_bmdma_status,
180};
181
182static struct ata_port_info adma_port_info[] = {
183 /* board_1841_idx */
184 {
185 .sht = &adma_ata_sht,
186 .host_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST |
187 ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO,
188 .pio_mask = 0x10, /* pio4 */
189 .udma_mask = 0x1f, /* udma0-4 */
190 .port_ops = &adma_ata_ops,
191 },
192};
193
194static struct pci_device_id adma_ata_pci_tbl[] = {
195 { PCI_VENDOR_ID_PDC, 0x1841, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
196 board_1841_idx },
197
198 { } /* terminate list */
199};
200
201static struct pci_driver adma_ata_pci_driver = {
202 .name = DRV_NAME,
203 .id_table = adma_ata_pci_tbl,
204 .probe = adma_ata_init_one,
205 .remove = ata_pci_remove_one,
206};
207
208static int adma_check_atapi_dma(struct ata_queued_cmd *qc)
209{
210 return 1; /* ATAPI DMA not yet supported */
211}
212
213static void adma_bmdma_stop(struct ata_queued_cmd *qc)
214{
215 /* nothing */
216}
217
218static u8 adma_bmdma_status(struct ata_port *ap)
219{
220 return 0;
221}
222
223static void adma_irq_clear(struct ata_port *ap)
224{
225 /* nothing */
226}
227
228static void adma_reset_engine(void __iomem *chan)
229{
230 /* reset ADMA to idle state */
231 writew(aPIOMD4 | aNIEN | aRSTADM, chan + ADMA_CONTROL);
232 udelay(2);
233 writew(aPIOMD4, chan + ADMA_CONTROL);
234 udelay(2);
235}
236
237static void adma_reinit_engine(struct ata_port *ap)
238{
239 struct adma_port_priv *pp = ap->private_data;
240 void __iomem *mmio_base = ap->host_set->mmio_base;
241 void __iomem *chan = ADMA_REGS(mmio_base, ap->port_no);
242
243 /* mask/clear ATA interrupts */
244 writeb(ATA_NIEN, (void __iomem *)ap->ioaddr.ctl_addr);
245 ata_check_status(ap);
246
247 /* reset the ADMA engine */
248 adma_reset_engine(chan);
249
250 /* set in-FIFO threshold to 0x100 */
251 writew(0x100, chan + ADMA_FIFO_IN);
252
253 /* set CPB pointer */
254 writel((u32)pp->pkt_dma, chan + ADMA_CPB_NEXT);
255
256 /* set out-FIFO threshold to 0x100 */
257 writew(0x100, chan + ADMA_FIFO_OUT);
258
259 /* set CPB count */
260 writew(1, chan + ADMA_CPB_COUNT);
261
262 /* read/discard ADMA status */
263 readb(chan + ADMA_STATUS);
264}
265
266static inline void adma_enter_reg_mode(struct ata_port *ap)
267{
268 void __iomem *chan = ADMA_REGS(ap->host_set->mmio_base, ap->port_no);
269
270 writew(aPIOMD4, chan + ADMA_CONTROL);
271 readb(chan + ADMA_STATUS); /* flush */
272}
273
274static void adma_phy_reset(struct ata_port *ap)
275{
276 struct adma_port_priv *pp = ap->private_data;
277
278 pp->state = adma_state_idle;
279 adma_reinit_engine(ap);
280 ata_port_probe(ap);
281 ata_bus_reset(ap);
282}
283
284static void adma_eng_timeout(struct ata_port *ap)
285{
286 struct adma_port_priv *pp = ap->private_data;
287
288 if (pp->state != adma_state_idle) /* healthy paranoia */
289 pp->state = adma_state_mmio;
290 adma_reinit_engine(ap);
291 ata_eng_timeout(ap);
292}
293
294static int adma_fill_sg(struct ata_queued_cmd *qc)
295{
296 struct scatterlist *sg = qc->sg;
297 struct ata_port *ap = qc->ap;
298 struct adma_port_priv *pp = ap->private_data;
299 u8 *buf = pp->pkt;
300 int nelem, i = (2 + buf[3]) * 8;
301 u8 pFLAGS = pORD | ((qc->tf.flags & ATA_TFLAG_WRITE) ? pDIRO : 0);
302
303 for (nelem = 0; nelem < qc->n_elem; nelem++,sg++) {
304 u32 addr;
305 u32 len;
306
307 addr = (u32)sg_dma_address(sg);
308 *(__le32 *)(buf + i) = cpu_to_le32(addr);
309 i += 4;
310
311 len = sg_dma_len(sg) >> 3;
312 *(__le32 *)(buf + i) = cpu_to_le32(len);
313 i += 4;
314
315 if ((nelem + 1) == qc->n_elem)
316 pFLAGS |= pEND;
317 buf[i++] = pFLAGS;
318 buf[i++] = qc->dev->dma_mode & 0xf;
319 buf[i++] = 0; /* pPKLW */
320 buf[i++] = 0; /* reserved */
321
322 *(__le32 *)(buf + i)
323 = (pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4);
324 i += 4;
325
326 VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", nelem,
327 (unsigned long)addr, len);
328 }
329 return i;
330}
331
332static void adma_qc_prep(struct ata_queued_cmd *qc)
333{
334 struct adma_port_priv *pp = qc->ap->private_data;
335 u8 *buf = pp->pkt;
336 u32 pkt_dma = (u32)pp->pkt_dma;
337 int i = 0;
338
339 VPRINTK("ENTER\n");
340
341 adma_enter_reg_mode(qc->ap);
342 if (qc->tf.protocol != ATA_PROT_DMA) {
343 ata_qc_prep(qc);
344 return;
345 }
346
347 buf[i++] = 0; /* Response flags */
348 buf[i++] = 0; /* reserved */
349 buf[i++] = cVLD | cDAT | cIEN;
350 i++; /* cLEN, gets filled in below */
351
352 *(__le32 *)(buf+i) = cpu_to_le32(pkt_dma); /* cNCPB */
353 i += 4; /* cNCPB */
354 i += 4; /* cPRD, gets filled in below */
355
356 buf[i++] = 0; /* reserved */
357 buf[i++] = 0; /* reserved */
358 buf[i++] = 0; /* reserved */
359 buf[i++] = 0; /* reserved */
360
361 /* ATA registers; must be a multiple of 4 */
362 buf[i++] = qc->tf.device;
363 buf[i++] = ADMA_REGS_DEVICE;
364 if ((qc->tf.flags & ATA_TFLAG_LBA48)) {
365 buf[i++] = qc->tf.hob_nsect;
366 buf[i++] = ADMA_REGS_SECTOR_COUNT;
367 buf[i++] = qc->tf.hob_lbal;
368 buf[i++] = ADMA_REGS_LBA_LOW;
369 buf[i++] = qc->tf.hob_lbam;
370 buf[i++] = ADMA_REGS_LBA_MID;
371 buf[i++] = qc->tf.hob_lbah;
372 buf[i++] = ADMA_REGS_LBA_HIGH;
373 }
374 buf[i++] = qc->tf.nsect;
375 buf[i++] = ADMA_REGS_SECTOR_COUNT;
376 buf[i++] = qc->tf.lbal;
377 buf[i++] = ADMA_REGS_LBA_LOW;
378 buf[i++] = qc->tf.lbam;
379 buf[i++] = ADMA_REGS_LBA_MID;
380 buf[i++] = qc->tf.lbah;
381 buf[i++] = ADMA_REGS_LBA_HIGH;
382 buf[i++] = 0;
383 buf[i++] = ADMA_REGS_CONTROL;
384 buf[i++] = rIGN;
385 buf[i++] = 0;
386 buf[i++] = qc->tf.command;
387 buf[i++] = ADMA_REGS_COMMAND | rEND;
388
389 buf[3] = (i >> 3) - 2; /* cLEN */
390 *(__le32 *)(buf+8) = cpu_to_le32(pkt_dma + i); /* cPRD */
391
392 i = adma_fill_sg(qc);
393 wmb(); /* flush PRDs and pkt to memory */
394#if 0
395 /* dump out CPB + PRDs for debug */
396 {
397 int j, len = 0;
398 static char obuf[2048];
399 for (j = 0; j < i; ++j) {
400 len += sprintf(obuf+len, "%02x ", buf[j]);
401 if ((j & 7) == 7) {
402 printk("%s\n", obuf);
403 len = 0;
404 }
405 }
406 if (len)
407 printk("%s\n", obuf);
408 }
409#endif
410}
411
412static inline void adma_packet_start(struct ata_queued_cmd *qc)
413{
414 struct ata_port *ap = qc->ap;
415 void __iomem *chan = ADMA_REGS(ap->host_set->mmio_base, ap->port_no);
416
417 VPRINTK("ENTER, ap %p\n", ap);
418
419 /* fire up the ADMA engine */
420 writew(aPIOMD4 | aGO, chan + ADMA_CONTROL);
421}
422
423static int adma_qc_issue(struct ata_queued_cmd *qc)
424{
425 struct adma_port_priv *pp = qc->ap->private_data;
426
427 switch (qc->tf.protocol) {
428 case ATA_PROT_DMA:
429 pp->state = adma_state_pkt;
430 adma_packet_start(qc);
431 return 0;
432
433 case ATA_PROT_ATAPI_DMA:
434 BUG();
435 break;
436
437 default:
438 break;
439 }
440
441 pp->state = adma_state_mmio;
442 return ata_qc_issue_prot(qc);
443}
444
445static inline unsigned int adma_intr_pkt(struct ata_host_set *host_set)
446{
447 unsigned int handled = 0, port_no;
448 u8 __iomem *mmio_base = host_set->mmio_base;
449
450 for (port_no = 0; port_no < host_set->n_ports; ++port_no) {
451 struct ata_port *ap = host_set->ports[port_no];
452 struct adma_port_priv *pp;
453 struct ata_queued_cmd *qc;
454 void __iomem *chan = ADMA_REGS(mmio_base, port_no);
455 u8 drv_stat, status = readb(chan + ADMA_STATUS);
456
457 if (status == 0)
458 continue;
459 handled = 1;
460 adma_enter_reg_mode(ap);
461 if ((ap->flags & ATA_FLAG_PORT_DISABLED))
462 continue;
463 pp = ap->private_data;
464 if (!pp || pp->state != adma_state_pkt)
465 continue;
466 qc = ata_qc_from_tag(ap, ap->active_tag);
467 drv_stat = 0;
468 if ((status & (aPERR | aPSD | aUIRQ)))
469 drv_stat = ATA_ERR;
470 else if (pp->pkt[0] != cDONE)
471 drv_stat = ATA_ERR;
472 ata_qc_complete(qc, drv_stat);
473 }
474 return handled;
475}
476
477static inline unsigned int adma_intr_mmio(struct ata_host_set *host_set)
478{
479 unsigned int handled = 0, port_no;
480
481 for (port_no = 0; port_no < host_set->n_ports; ++port_no) {
482 struct ata_port *ap;
483 ap = host_set->ports[port_no];
484 if (ap && (!(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR)))) {
485 struct ata_queued_cmd *qc;
486 struct adma_port_priv *pp = ap->private_data;
487 if (!pp || pp->state != adma_state_mmio)
488 continue;
489 qc = ata_qc_from_tag(ap, ap->active_tag);
490 if (qc && (!(qc->tf.ctl & ATA_NIEN))) {
491
492 /* check main status, clearing INTRQ */
493 u8 status = ata_chk_status(ap);
494 if ((status & ATA_BUSY))
495 continue;
496 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
497 ap->id, qc->tf.protocol, status);
498
499 /* complete taskfile transaction */
500 pp->state = adma_state_idle;
501 ata_qc_complete(qc, status);
502 handled = 1;
503 }
504 }
505 }
506 return handled;
507}
508
509static irqreturn_t adma_intr(int irq, void *dev_instance, struct pt_regs *regs)
510{
511 struct ata_host_set *host_set = dev_instance;
512 unsigned int handled = 0;
513
514 VPRINTK("ENTER\n");
515
516 spin_lock(&host_set->lock);
517 handled = adma_intr_pkt(host_set) | adma_intr_mmio(host_set);
518 spin_unlock(&host_set->lock);
519
520 VPRINTK("EXIT\n");
521
522 return IRQ_RETVAL(handled);
523}
524
525static void adma_ata_setup_port(struct ata_ioports *port, unsigned long base)
526{
527 port->cmd_addr =
528 port->data_addr = base + 0x000;
529 port->error_addr =
530 port->feature_addr = base + 0x004;
531 port->nsect_addr = base + 0x008;
532 port->lbal_addr = base + 0x00c;
533 port->lbam_addr = base + 0x010;
534 port->lbah_addr = base + 0x014;
535 port->device_addr = base + 0x018;
536 port->status_addr =
537 port->command_addr = base + 0x01c;
538 port->altstatus_addr =
539 port->ctl_addr = base + 0x038;
540}
541
542static int adma_port_start(struct ata_port *ap)
543{
544 struct device *dev = ap->host_set->dev;
545 struct adma_port_priv *pp;
546 int rc;
547
548 rc = ata_port_start(ap);
549 if (rc)
550 return rc;
551 adma_enter_reg_mode(ap);
552 rc = -ENOMEM;
553 pp = kcalloc(1, sizeof(*pp), GFP_KERNEL);
554 if (!pp)
555 goto err_out;
556 pp->pkt = dma_alloc_coherent(dev, ADMA_PKT_BYTES, &pp->pkt_dma,
557 GFP_KERNEL);
558 if (!pp->pkt)
559 goto err_out_kfree;
560 /* paranoia? */
561 if ((pp->pkt_dma & 7) != 0) {
562 printk("bad alignment for pp->pkt_dma: %08x\n",
563 (u32)pp->pkt_dma);
564 goto err_out_kfree2;
565 }
566 memset(pp->pkt, 0, ADMA_PKT_BYTES);
567 ap->private_data = pp;
568 adma_reinit_engine(ap);
569 return 0;
570
571err_out_kfree2:
572 kfree(pp);
573err_out_kfree:
574 kfree(pp);
575err_out:
576 ata_port_stop(ap);
577 return rc;
578}
579
580static void adma_port_stop(struct ata_port *ap)
581{
582 struct device *dev = ap->host_set->dev;
583 struct adma_port_priv *pp = ap->private_data;
584
585 adma_reset_engine(ADMA_REGS(ap->host_set->mmio_base, ap->port_no));
586 if (pp != NULL) {
587 ap->private_data = NULL;
588 if (pp->pkt != NULL)
589 dma_free_coherent(dev, ADMA_PKT_BYTES,
590 pp->pkt, pp->pkt_dma);
591 kfree(pp);
592 }
593 ata_port_stop(ap);
594}
595
596static void adma_host_stop(struct ata_host_set *host_set)
597{
598 unsigned int port_no;
599
600 for (port_no = 0; port_no < ADMA_PORTS; ++port_no)
601 adma_reset_engine(ADMA_REGS(host_set->mmio_base, port_no));
602
603 ata_pci_host_stop(host_set);
604}
605
606static void adma_host_init(unsigned int chip_id,
607 struct ata_probe_ent *probe_ent)
608{
609 unsigned int port_no;
610 void __iomem *mmio_base = probe_ent->mmio_base;
611
612 /* enable/lock aGO operation */
613 writeb(7, mmio_base + ADMA_MODE_LOCK);
614
615 /* reset the ADMA logic */
616 for (port_no = 0; port_no < ADMA_PORTS; ++port_no)
617 adma_reset_engine(ADMA_REGS(mmio_base, port_no));
618}
619
620static int adma_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base)
621{
622 int rc;
623
624 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
625 if (rc) {
626 printk(KERN_ERR DRV_NAME
627 "(%s): 32-bit DMA enable failed\n",
628 pci_name(pdev));
629 return rc;
630 }
631 rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
632 if (rc) {
633 printk(KERN_ERR DRV_NAME
634 "(%s): 32-bit consistent DMA enable failed\n",
635 pci_name(pdev));
636 return rc;
637 }
638 return 0;
639}
640
641static int adma_ata_init_one(struct pci_dev *pdev,
642 const struct pci_device_id *ent)
643{
644 static int printed_version;
645 struct ata_probe_ent *probe_ent = NULL;
646 void __iomem *mmio_base;
647 unsigned int board_idx = (unsigned int) ent->driver_data;
648 int rc, port_no;
649
650 if (!printed_version++)
651 printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
652
653 rc = pci_enable_device(pdev);
654 if (rc)
655 return rc;
656
657 rc = pci_request_regions(pdev, DRV_NAME);
658 if (rc)
659 goto err_out;
660
661 if ((pci_resource_flags(pdev, 4) & IORESOURCE_MEM) == 0) {
662 rc = -ENODEV;
663 goto err_out_regions;
664 }
665
666 mmio_base = pci_iomap(pdev, 4, 0);
667 if (mmio_base == NULL) {
668 rc = -ENOMEM;
669 goto err_out_regions;
670 }
671
672 rc = adma_set_dma_masks(pdev, mmio_base);
673 if (rc)
674 goto err_out_iounmap;
675
676 probe_ent = kcalloc(1, sizeof(*probe_ent), GFP_KERNEL);
677 if (probe_ent == NULL) {
678 rc = -ENOMEM;
679 goto err_out_iounmap;
680 }
681
682 probe_ent->dev = pci_dev_to_dev(pdev);
683 INIT_LIST_HEAD(&probe_ent->node);
684
685 probe_ent->sht = adma_port_info[board_idx].sht;
686 probe_ent->host_flags = adma_port_info[board_idx].host_flags;
687 probe_ent->pio_mask = adma_port_info[board_idx].pio_mask;
688 probe_ent->mwdma_mask = adma_port_info[board_idx].mwdma_mask;
689 probe_ent->udma_mask = adma_port_info[board_idx].udma_mask;
690 probe_ent->port_ops = adma_port_info[board_idx].port_ops;
691
692 probe_ent->irq = pdev->irq;
693 probe_ent->irq_flags = SA_SHIRQ;
694 probe_ent->mmio_base = mmio_base;
695 probe_ent->n_ports = ADMA_PORTS;
696
697 for (port_no = 0; port_no < probe_ent->n_ports; ++port_no) {
698 adma_ata_setup_port(&probe_ent->port[port_no],
699 ADMA_ATA_REGS((unsigned long)mmio_base, port_no));
700 }
701
702 pci_set_master(pdev);
703
704 /* initialize adapter */
705 adma_host_init(board_idx, probe_ent);
706
707 rc = ata_device_add(probe_ent);
708 kfree(probe_ent);
709 if (rc != ADMA_PORTS)
710 goto err_out_iounmap;
711 return 0;
712
713err_out_iounmap:
714 pci_iounmap(pdev, mmio_base);
715err_out_regions:
716 pci_release_regions(pdev);
717err_out:
718 pci_disable_device(pdev);
719 return rc;
720}
721
722static int __init adma_ata_init(void)
723{
724 return pci_module_init(&adma_ata_pci_driver);
725}
726
727static void __exit adma_ata_exit(void)
728{
729 pci_unregister_driver(&adma_ata_pci_driver);
730}
731
732MODULE_AUTHOR("Mark Lord");
733MODULE_DESCRIPTION("Pacific Digital Corporation ADMA low-level driver");
734MODULE_LICENSE("GPL");
735MODULE_DEVICE_TABLE(pci, adma_ata_pci_tbl);
736MODULE_VERSION(DRV_VERSION);
737
738module_init(adma_ata_init);
739module_exit(adma_ata_exit);
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
index 1ed32e7b5472..e451941ad81d 100644
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -52,7 +52,7 @@ extern int qla2x00_load_risc(struct scsi_qla_host *, uint32_t *);
52extern int qla24xx_load_risc_flash(scsi_qla_host_t *, uint32_t *); 52extern int qla24xx_load_risc_flash(scsi_qla_host_t *, uint32_t *);
53extern int qla24xx_load_risc_hotplug(scsi_qla_host_t *, uint32_t *); 53extern int qla24xx_load_risc_hotplug(scsi_qla_host_t *, uint32_t *);
54 54
55extern fc_port_t *qla2x00_alloc_fcport(scsi_qla_host_t *, int); 55extern fc_port_t *qla2x00_alloc_fcport(scsi_qla_host_t *, gfp_t);
56 56
57extern int qla2x00_loop_resync(scsi_qla_host_t *); 57extern int qla2x00_loop_resync(scsi_qla_host_t *);
58 58
@@ -277,7 +277,7 @@ extern int qla2x00_fdmi_register(scsi_qla_host_t *);
277/* 277/*
278 * Global Function Prototypes in qla_rscn.c source file. 278 * Global Function Prototypes in qla_rscn.c source file.
279 */ 279 */
280extern fc_port_t *qla2x00_alloc_rscn_fcport(scsi_qla_host_t *, int); 280extern fc_port_t *qla2x00_alloc_rscn_fcport(scsi_qla_host_t *, gfp_t);
281extern int qla2x00_handle_port_rscn(scsi_qla_host_t *, uint32_t, fc_port_t *, 281extern int qla2x00_handle_port_rscn(scsi_qla_host_t *, uint32_t, fc_port_t *,
282 int); 282 int);
283extern void qla2x00_process_iodesc(scsi_qla_host_t *, struct mbx_entry *); 283extern void qla2x00_process_iodesc(scsi_qla_host_t *, struct mbx_entry *);
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index 23d095d3817b..fbb6feee40cf 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -1685,7 +1685,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha)
1685 * Returns a pointer to the allocated fcport, or NULL, if none available. 1685 * Returns a pointer to the allocated fcport, or NULL, if none available.
1686 */ 1686 */
1687fc_port_t * 1687fc_port_t *
1688qla2x00_alloc_fcport(scsi_qla_host_t *ha, int flags) 1688qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
1689{ 1689{
1690 fc_port_t *fcport; 1690 fc_port_t *fcport;
1691 1691
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 8982978c42fd..7aec93f9d423 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -1325,6 +1325,8 @@ int qla2x00_probe_one(struct pci_dev *pdev, struct qla_board_info *brd_info)
1325 ha->brd_info = brd_info; 1325 ha->brd_info = brd_info;
1326 sprintf(ha->host_str, "%s_%ld", ha->brd_info->drv_name, ha->host_no); 1326 sprintf(ha->host_str, "%s_%ld", ha->brd_info->drv_name, ha->host_no);
1327 1327
1328 ha->dpc_pid = -1;
1329
1328 /* Configure PCI I/O space */ 1330 /* Configure PCI I/O space */
1329 ret = qla2x00_iospace_config(ha); 1331 ret = qla2x00_iospace_config(ha);
1330 if (ret) 1332 if (ret)
@@ -1448,7 +1450,6 @@ int qla2x00_probe_one(struct pci_dev *pdev, struct qla_board_info *brd_info)
1448 */ 1450 */
1449 spin_lock_init(&ha->mbx_reg_lock); 1451 spin_lock_init(&ha->mbx_reg_lock);
1450 1452
1451 ha->dpc_pid = -1;
1452 init_completion(&ha->dpc_inited); 1453 init_completion(&ha->dpc_inited);
1453 init_completion(&ha->dpc_exited); 1454 init_completion(&ha->dpc_exited);
1454 1455
diff --git a/drivers/scsi/qla2xxx/qla_rscn.c b/drivers/scsi/qla2xxx/qla_rscn.c
index bdc3bc74bbe1..7534efcc8918 100644
--- a/drivers/scsi/qla2xxx/qla_rscn.c
+++ b/drivers/scsi/qla2xxx/qla_rscn.c
@@ -330,6 +330,8 @@ qla2x00_update_login_fcport(scsi_qla_host_t *ha, struct mbx_entry *mbxstat,
330 fcport->flags &= ~FCF_FAILOVER_NEEDED; 330 fcport->flags &= ~FCF_FAILOVER_NEEDED;
331 fcport->iodesc_idx_sent = IODESC_INVALID_INDEX; 331 fcport->iodesc_idx_sent = IODESC_INVALID_INDEX;
332 atomic_set(&fcport->state, FCS_ONLINE); 332 atomic_set(&fcport->state, FCS_ONLINE);
333 if (fcport->rport)
334 fc_remote_port_unblock(fcport->rport);
333} 335}
334 336
335 337
@@ -1064,7 +1066,7 @@ qla2x00_send_login_iocb_cb(scsi_qla_host_t *ha, struct io_descriptor *iodesc,
1064 * Returns a pointer to the allocated RSCN fcport, or NULL, if none available. 1066 * Returns a pointer to the allocated RSCN fcport, or NULL, if none available.
1065 */ 1067 */
1066fc_port_t * 1068fc_port_t *
1067qla2x00_alloc_rscn_fcport(scsi_qla_host_t *ha, int flags) 1069qla2x00_alloc_rscn_fcport(scsi_qla_host_t *ha, gfp_t flags)
1068{ 1070{
1069 fc_port_t *fcport; 1071 fc_port_t *fcport;
1070 1072
diff --git a/drivers/scsi/qlogicpti.c b/drivers/scsi/qlogicpti.c
index a917ab7475ac..1fd5fc6d0fe3 100644
--- a/drivers/scsi/qlogicpti.c
+++ b/drivers/scsi/qlogicpti.c
@@ -1119,6 +1119,36 @@ static inline void update_can_queue(struct Scsi_Host *host, u_int in_ptr, u_int
1119 host->sg_tablesize = QLOGICPTI_MAX_SG(num_free); 1119 host->sg_tablesize = QLOGICPTI_MAX_SG(num_free);
1120} 1120}
1121 1121
1122static unsigned int scsi_rbuf_get(struct scsi_cmnd *cmd, unsigned char **buf_out)
1123{
1124 unsigned char *buf;
1125 unsigned int buflen;
1126
1127 if (cmd->use_sg) {
1128 struct scatterlist *sg;
1129
1130 sg = (struct scatterlist *) cmd->request_buffer;
1131 buf = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
1132 buflen = sg->length;
1133 } else {
1134 buf = cmd->request_buffer;
1135 buflen = cmd->request_bufflen;
1136 }
1137
1138 *buf_out = buf;
1139 return buflen;
1140}
1141
1142static void scsi_rbuf_put(struct scsi_cmnd *cmd, unsigned char *buf)
1143{
1144 if (cmd->use_sg) {
1145 struct scatterlist *sg;
1146
1147 sg = (struct scatterlist *) cmd->request_buffer;
1148 kunmap_atomic(buf - sg->offset, KM_IRQ0);
1149 }
1150}
1151
1122/* 1152/*
1123 * Until we scan the entire bus with inquiries, go throught this fella... 1153 * Until we scan the entire bus with inquiries, go throught this fella...
1124 */ 1154 */
@@ -1145,11 +1175,9 @@ static void ourdone(struct scsi_cmnd *Cmnd)
1145 int ok = host_byte(Cmnd->result) == DID_OK; 1175 int ok = host_byte(Cmnd->result) == DID_OK;
1146 if (Cmnd->cmnd[0] == 0x12 && ok) { 1176 if (Cmnd->cmnd[0] == 0x12 && ok) {
1147 unsigned char *iqd; 1177 unsigned char *iqd;
1178 unsigned int iqd_len;
1148 1179
1149 if (Cmnd->use_sg != 0) 1180 iqd_len = scsi_rbuf_get(Cmnd, &iqd);
1150 BUG();
1151
1152 iqd = ((unsigned char *)Cmnd->buffer);
1153 1181
1154 /* tags handled in midlayer */ 1182 /* tags handled in midlayer */
1155 /* enable sync mode? */ 1183 /* enable sync mode? */
@@ -1163,6 +1191,9 @@ static void ourdone(struct scsi_cmnd *Cmnd)
1163 if (iqd[7] & 0x20) { 1191 if (iqd[7] & 0x20) {
1164 qpti->dev_param[tgt].device_flags |= 0x20; 1192 qpti->dev_param[tgt].device_flags |= 0x20;
1165 } 1193 }
1194
1195 scsi_rbuf_put(Cmnd, iqd);
1196
1166 qpti->sbits |= (1 << tgt); 1197 qpti->sbits |= (1 << tgt);
1167 } else if (!ok) { 1198 } else if (!ok) {
1168 qpti->sbits |= (1 << tgt); 1199 qpti->sbits |= (1 << tgt);
diff --git a/drivers/scsi/sata_mv.c b/drivers/scsi/sata_mv.c
index ea76fe44585e..422e0b6f603a 100644
--- a/drivers/scsi/sata_mv.c
+++ b/drivers/scsi/sata_mv.c
@@ -35,7 +35,7 @@
35#include <asm/io.h> 35#include <asm/io.h>
36 36
37#define DRV_NAME "sata_mv" 37#define DRV_NAME "sata_mv"
38#define DRV_VERSION "0.12" 38#define DRV_VERSION "0.25"
39 39
40enum { 40enum {
41 /* BAR's are enumerated in terms of pci_resource_start() terms */ 41 /* BAR's are enumerated in terms of pci_resource_start() terms */
@@ -55,31 +55,61 @@ enum {
55 MV_SATAHC_ARBTR_REG_SZ = MV_MINOR_REG_AREA_SZ, /* arbiter */ 55 MV_SATAHC_ARBTR_REG_SZ = MV_MINOR_REG_AREA_SZ, /* arbiter */
56 MV_PORT_REG_SZ = MV_MINOR_REG_AREA_SZ, 56 MV_PORT_REG_SZ = MV_MINOR_REG_AREA_SZ,
57 57
58 MV_Q_CT = 32, 58 MV_USE_Q_DEPTH = ATA_DEF_QUEUE,
59 MV_CRQB_SZ = 32,
60 MV_CRPB_SZ = 8,
61 59
62 MV_DMA_BOUNDARY = 0xffffffffU, 60 MV_MAX_Q_DEPTH = 32,
63 SATAHC_MASK = (~(MV_SATAHC_REG_SZ - 1)), 61 MV_MAX_Q_DEPTH_MASK = MV_MAX_Q_DEPTH - 1,
62
63 /* CRQB needs alignment on a 1KB boundary. Size == 1KB
64 * CRPB needs alignment on a 256B boundary. Size == 256B
65 * SG count of 176 leads to MV_PORT_PRIV_DMA_SZ == 4KB
66 * ePRD (SG) entries need alignment on a 16B boundary. Size == 16B
67 */
68 MV_CRQB_Q_SZ = (32 * MV_MAX_Q_DEPTH),
69 MV_CRPB_Q_SZ = (8 * MV_MAX_Q_DEPTH),
70 MV_MAX_SG_CT = 176,
71 MV_SG_TBL_SZ = (16 * MV_MAX_SG_CT),
72 MV_PORT_PRIV_DMA_SZ = (MV_CRQB_Q_SZ + MV_CRPB_Q_SZ + MV_SG_TBL_SZ),
73
74 /* Our DMA boundary is determined by an ePRD being unable to handle
75 * anything larger than 64KB
76 */
77 MV_DMA_BOUNDARY = 0xffffU,
64 78
65 MV_PORTS_PER_HC = 4, 79 MV_PORTS_PER_HC = 4,
66 /* == (port / MV_PORTS_PER_HC) to determine HC from 0-7 port */ 80 /* == (port / MV_PORTS_PER_HC) to determine HC from 0-7 port */
67 MV_PORT_HC_SHIFT = 2, 81 MV_PORT_HC_SHIFT = 2,
68 /* == (port % MV_PORTS_PER_HC) to determine port from 0-7 port */ 82 /* == (port % MV_PORTS_PER_HC) to determine hard port from 0-7 port */
69 MV_PORT_MASK = 3, 83 MV_PORT_MASK = 3,
70 84
71 /* Host Flags */ 85 /* Host Flags */
72 MV_FLAG_DUAL_HC = (1 << 30), /* two SATA Host Controllers */ 86 MV_FLAG_DUAL_HC = (1 << 30), /* two SATA Host Controllers */
73 MV_FLAG_IRQ_COALESCE = (1 << 29), /* IRQ coalescing capability */ 87 MV_FLAG_IRQ_COALESCE = (1 << 29), /* IRQ coalescing capability */
74 MV_FLAG_BDMA = (1 << 28), /* Basic DMA */ 88 MV_FLAG_GLBL_SFT_RST = (1 << 28), /* Global Soft Reset support */
89 MV_COMMON_FLAGS = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
90 ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO),
91 MV_6XXX_FLAGS = (MV_FLAG_IRQ_COALESCE |
92 MV_FLAG_GLBL_SFT_RST),
75 93
76 chip_504x = 0, 94 chip_504x = 0,
77 chip_508x = 1, 95 chip_508x = 1,
78 chip_604x = 2, 96 chip_604x = 2,
79 chip_608x = 3, 97 chip_608x = 3,
80 98
99 CRQB_FLAG_READ = (1 << 0),
100 CRQB_TAG_SHIFT = 1,
101 CRQB_CMD_ADDR_SHIFT = 8,
102 CRQB_CMD_CS = (0x2 << 11),
103 CRQB_CMD_LAST = (1 << 15),
104
105 CRPB_FLAG_STATUS_SHIFT = 8,
106
107 EPRD_FLAG_END_OF_TBL = (1 << 31),
108
81 /* PCI interface registers */ 109 /* PCI interface registers */
82 110
111 PCI_COMMAND_OFS = 0xc00,
112
83 PCI_MAIN_CMD_STS_OFS = 0xd30, 113 PCI_MAIN_CMD_STS_OFS = 0xd30,
84 STOP_PCI_MASTER = (1 << 2), 114 STOP_PCI_MASTER = (1 << 2),
85 PCI_MASTER_EMPTY = (1 << 3), 115 PCI_MASTER_EMPTY = (1 << 3),
@@ -111,20 +141,13 @@ enum {
111 HC_CFG_OFS = 0, 141 HC_CFG_OFS = 0,
112 142
113 HC_IRQ_CAUSE_OFS = 0x14, 143 HC_IRQ_CAUSE_OFS = 0x14,
114 CRBP_DMA_DONE = (1 << 0), /* shift by port # */ 144 CRPB_DMA_DONE = (1 << 0), /* shift by port # */
115 HC_IRQ_COAL = (1 << 4), /* IRQ coalescing */ 145 HC_IRQ_COAL = (1 << 4), /* IRQ coalescing */
116 DEV_IRQ = (1 << 8), /* shift by port # */ 146 DEV_IRQ = (1 << 8), /* shift by port # */
117 147
118 /* Shadow block registers */ 148 /* Shadow block registers */
119 SHD_PIO_DATA_OFS = 0x100, 149 SHD_BLK_OFS = 0x100,
120 SHD_FEA_ERR_OFS = 0x104, 150 SHD_CTL_AST_OFS = 0x20, /* ofs from SHD_BLK_OFS */
121 SHD_SECT_CNT_OFS = 0x108,
122 SHD_LBA_L_OFS = 0x10C,
123 SHD_LBA_M_OFS = 0x110,
124 SHD_LBA_H_OFS = 0x114,
125 SHD_DEV_HD_OFS = 0x118,
126 SHD_CMD_STA_OFS = 0x11C,
127 SHD_CTL_AST_OFS = 0x120,
128 151
129 /* SATA registers */ 152 /* SATA registers */
130 SATA_STATUS_OFS = 0x300, /* ctrl, err regs follow status */ 153 SATA_STATUS_OFS = 0x300, /* ctrl, err regs follow status */
@@ -132,6 +155,11 @@ enum {
132 155
133 /* Port registers */ 156 /* Port registers */
134 EDMA_CFG_OFS = 0, 157 EDMA_CFG_OFS = 0,
158 EDMA_CFG_Q_DEPTH = 0, /* queueing disabled */
159 EDMA_CFG_NCQ = (1 << 5),
160 EDMA_CFG_NCQ_GO_ON_ERR = (1 << 14), /* continue on error */
161 EDMA_CFG_RD_BRST_EXT = (1 << 11), /* read burst 512B */
162 EDMA_CFG_WR_BUFF_LEN = (1 << 13), /* write buffer 512B */
135 163
136 EDMA_ERR_IRQ_CAUSE_OFS = 0x8, 164 EDMA_ERR_IRQ_CAUSE_OFS = 0x8,
137 EDMA_ERR_IRQ_MASK_OFS = 0xc, 165 EDMA_ERR_IRQ_MASK_OFS = 0xc,
@@ -161,33 +189,85 @@ enum {
161 EDMA_ERR_LNK_DATA_TX | 189 EDMA_ERR_LNK_DATA_TX |
162 EDMA_ERR_TRANS_PROTO), 190 EDMA_ERR_TRANS_PROTO),
163 191
192 EDMA_REQ_Q_BASE_HI_OFS = 0x10,
193 EDMA_REQ_Q_IN_PTR_OFS = 0x14, /* also contains BASE_LO */
194 EDMA_REQ_Q_BASE_LO_MASK = 0xfffffc00U,
195
196 EDMA_REQ_Q_OUT_PTR_OFS = 0x18,
197 EDMA_REQ_Q_PTR_SHIFT = 5,
198
199 EDMA_RSP_Q_BASE_HI_OFS = 0x1c,
200 EDMA_RSP_Q_IN_PTR_OFS = 0x20,
201 EDMA_RSP_Q_OUT_PTR_OFS = 0x24, /* also contains BASE_LO */
202 EDMA_RSP_Q_BASE_LO_MASK = 0xffffff00U,
203 EDMA_RSP_Q_PTR_SHIFT = 3,
204
164 EDMA_CMD_OFS = 0x28, 205 EDMA_CMD_OFS = 0x28,
165 EDMA_EN = (1 << 0), 206 EDMA_EN = (1 << 0),
166 EDMA_DS = (1 << 1), 207 EDMA_DS = (1 << 1),
167 ATA_RST = (1 << 2), 208 ATA_RST = (1 << 2),
168 209
169 /* BDMA is 6xxx part only */ 210 /* Host private flags (hp_flags) */
170 BDMA_CMD_OFS = 0x224, 211 MV_HP_FLAG_MSI = (1 << 0),
171 BDMA_START = (1 << 0),
172 212
173 MV_UNDEF = 0, 213 /* Port private flags (pp_flags) */
214 MV_PP_FLAG_EDMA_EN = (1 << 0),
215 MV_PP_FLAG_EDMA_DS_ACT = (1 << 1),
174}; 216};
175 217
176struct mv_port_priv { 218/* Command ReQuest Block: 32B */
219struct mv_crqb {
220 u32 sg_addr;
221 u32 sg_addr_hi;
222 u16 ctrl_flags;
223 u16 ata_cmd[11];
224};
177 225
226/* Command ResPonse Block: 8B */
227struct mv_crpb {
228 u16 id;
229 u16 flags;
230 u32 tmstmp;
178}; 231};
179 232
180struct mv_host_priv { 233/* EDMA Physical Region Descriptor (ePRD); A.K.A. SG */
234struct mv_sg {
235 u32 addr;
236 u32 flags_size;
237 u32 addr_hi;
238 u32 reserved;
239};
181 240
241struct mv_port_priv {
242 struct mv_crqb *crqb;
243 dma_addr_t crqb_dma;
244 struct mv_crpb *crpb;
245 dma_addr_t crpb_dma;
246 struct mv_sg *sg_tbl;
247 dma_addr_t sg_tbl_dma;
248
249 unsigned req_producer; /* cp of req_in_ptr */
250 unsigned rsp_consumer; /* cp of rsp_out_ptr */
251 u32 pp_flags;
252};
253
254struct mv_host_priv {
255 u32 hp_flags;
182}; 256};
183 257
184static void mv_irq_clear(struct ata_port *ap); 258static void mv_irq_clear(struct ata_port *ap);
185static u32 mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in); 259static u32 mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in);
186static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); 260static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val);
261static u8 mv_check_err(struct ata_port *ap);
187static void mv_phy_reset(struct ata_port *ap); 262static void mv_phy_reset(struct ata_port *ap);
188static int mv_master_reset(void __iomem *mmio_base); 263static void mv_host_stop(struct ata_host_set *host_set);
264static int mv_port_start(struct ata_port *ap);
265static void mv_port_stop(struct ata_port *ap);
266static void mv_qc_prep(struct ata_queued_cmd *qc);
267static int mv_qc_issue(struct ata_queued_cmd *qc);
189static irqreturn_t mv_interrupt(int irq, void *dev_instance, 268static irqreturn_t mv_interrupt(int irq, void *dev_instance,
190 struct pt_regs *regs); 269 struct pt_regs *regs);
270static void mv_eng_timeout(struct ata_port *ap);
191static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); 271static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
192 272
193static Scsi_Host_Template mv_sht = { 273static Scsi_Host_Template mv_sht = {
@@ -196,13 +276,13 @@ static Scsi_Host_Template mv_sht = {
196 .ioctl = ata_scsi_ioctl, 276 .ioctl = ata_scsi_ioctl,
197 .queuecommand = ata_scsi_queuecmd, 277 .queuecommand = ata_scsi_queuecmd,
198 .eh_strategy_handler = ata_scsi_error, 278 .eh_strategy_handler = ata_scsi_error,
199 .can_queue = ATA_DEF_QUEUE, 279 .can_queue = MV_USE_Q_DEPTH,
200 .this_id = ATA_SHT_THIS_ID, 280 .this_id = ATA_SHT_THIS_ID,
201 .sg_tablesize = MV_UNDEF, 281 .sg_tablesize = MV_MAX_SG_CT,
202 .max_sectors = ATA_MAX_SECTORS, 282 .max_sectors = ATA_MAX_SECTORS,
203 .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 283 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
204 .emulated = ATA_SHT_EMULATED, 284 .emulated = ATA_SHT_EMULATED,
205 .use_clustering = MV_UNDEF, 285 .use_clustering = ATA_SHT_USE_CLUSTERING,
206 .proc_name = DRV_NAME, 286 .proc_name = DRV_NAME,
207 .dma_boundary = MV_DMA_BOUNDARY, 287 .dma_boundary = MV_DMA_BOUNDARY,
208 .slave_configure = ata_scsi_slave_config, 288 .slave_configure = ata_scsi_slave_config,
@@ -210,21 +290,22 @@ static Scsi_Host_Template mv_sht = {
210 .ordered_flush = 1, 290 .ordered_flush = 1,
211}; 291};
212 292
213static struct ata_port_operations mv_ops = { 293static const struct ata_port_operations mv_ops = {
214 .port_disable = ata_port_disable, 294 .port_disable = ata_port_disable,
215 295
216 .tf_load = ata_tf_load, 296 .tf_load = ata_tf_load,
217 .tf_read = ata_tf_read, 297 .tf_read = ata_tf_read,
218 .check_status = ata_check_status, 298 .check_status = ata_check_status,
299 .check_err = mv_check_err,
219 .exec_command = ata_exec_command, 300 .exec_command = ata_exec_command,
220 .dev_select = ata_std_dev_select, 301 .dev_select = ata_std_dev_select,
221 302
222 .phy_reset = mv_phy_reset, 303 .phy_reset = mv_phy_reset,
223 304
224 .qc_prep = ata_qc_prep, 305 .qc_prep = mv_qc_prep,
225 .qc_issue = ata_qc_issue_prot, 306 .qc_issue = mv_qc_issue,
226 307
227 .eng_timeout = ata_eng_timeout, 308 .eng_timeout = mv_eng_timeout,
228 309
229 .irq_handler = mv_interrupt, 310 .irq_handler = mv_interrupt,
230 .irq_clear = mv_irq_clear, 311 .irq_clear = mv_irq_clear,
@@ -232,46 +313,39 @@ static struct ata_port_operations mv_ops = {
232 .scr_read = mv_scr_read, 313 .scr_read = mv_scr_read,
233 .scr_write = mv_scr_write, 314 .scr_write = mv_scr_write,
234 315
235 .port_start = ata_port_start, 316 .port_start = mv_port_start,
236 .port_stop = ata_port_stop, 317 .port_stop = mv_port_stop,
237 .host_stop = ata_host_stop, 318 .host_stop = mv_host_stop,
238}; 319};
239 320
240static struct ata_port_info mv_port_info[] = { 321static struct ata_port_info mv_port_info[] = {
241 { /* chip_504x */ 322 { /* chip_504x */
242 .sht = &mv_sht, 323 .sht = &mv_sht,
243 .host_flags = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 324 .host_flags = MV_COMMON_FLAGS,
244 ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO), 325 .pio_mask = 0x1f, /* pio0-4 */
245 .pio_mask = 0x1f, /* pio4-0 */ 326 .udma_mask = 0, /* 0x7f (udma0-6 disabled for now) */
246 .udma_mask = 0, /* 0x7f (udma6-0 disabled for now) */
247 .port_ops = &mv_ops, 327 .port_ops = &mv_ops,
248 }, 328 },
249 { /* chip_508x */ 329 { /* chip_508x */
250 .sht = &mv_sht, 330 .sht = &mv_sht,
251 .host_flags = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 331 .host_flags = (MV_COMMON_FLAGS | MV_FLAG_DUAL_HC),
252 ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO | 332 .pio_mask = 0x1f, /* pio0-4 */
253 MV_FLAG_DUAL_HC), 333 .udma_mask = 0, /* 0x7f (udma0-6 disabled for now) */
254 .pio_mask = 0x1f, /* pio4-0 */
255 .udma_mask = 0, /* 0x7f (udma6-0 disabled for now) */
256 .port_ops = &mv_ops, 334 .port_ops = &mv_ops,
257 }, 335 },
258 { /* chip_604x */ 336 { /* chip_604x */
259 .sht = &mv_sht, 337 .sht = &mv_sht,
260 .host_flags = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 338 .host_flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS),
261 ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO | 339 .pio_mask = 0x1f, /* pio0-4 */
262 MV_FLAG_IRQ_COALESCE | MV_FLAG_BDMA), 340 .udma_mask = 0x7f, /* udma0-6 */
263 .pio_mask = 0x1f, /* pio4-0 */
264 .udma_mask = 0, /* 0x7f (udma6-0 disabled for now) */
265 .port_ops = &mv_ops, 341 .port_ops = &mv_ops,
266 }, 342 },
267 { /* chip_608x */ 343 { /* chip_608x */
268 .sht = &mv_sht, 344 .sht = &mv_sht,
269 .host_flags = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 345 .host_flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS |
270 ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO | 346 MV_FLAG_DUAL_HC),
271 MV_FLAG_IRQ_COALESCE | MV_FLAG_DUAL_HC | 347 .pio_mask = 0x1f, /* pio0-4 */
272 MV_FLAG_BDMA), 348 .udma_mask = 0x7f, /* udma0-6 */
273 .pio_mask = 0x1f, /* pio4-0 */
274 .udma_mask = 0, /* 0x7f (udma6-0 disabled for now) */
275 .port_ops = &mv_ops, 349 .port_ops = &mv_ops,
276 }, 350 },
277}; 351};
@@ -306,12 +380,6 @@ static inline void writelfl(unsigned long data, void __iomem *addr)
306 (void) readl(addr); /* flush to avoid PCI posted write */ 380 (void) readl(addr); /* flush to avoid PCI posted write */
307} 381}
308 382
309static inline void __iomem *mv_port_addr_to_hc_base(void __iomem *port_mmio)
310{
311 return ((void __iomem *)((unsigned long)port_mmio &
312 (unsigned long)SATAHC_MASK));
313}
314
315static inline void __iomem *mv_hc_base(void __iomem *base, unsigned int hc) 383static inline void __iomem *mv_hc_base(void __iomem *base, unsigned int hc)
316{ 384{
317 return (base + MV_SATAHC0_REG_BASE + (hc * MV_SATAHC_REG_SZ)); 385 return (base + MV_SATAHC0_REG_BASE + (hc * MV_SATAHC_REG_SZ));
@@ -329,24 +397,150 @@ static inline void __iomem *mv_ap_base(struct ata_port *ap)
329 return mv_port_base(ap->host_set->mmio_base, ap->port_no); 397 return mv_port_base(ap->host_set->mmio_base, ap->port_no);
330} 398}
331 399
332static inline int mv_get_hc_count(unsigned long flags) 400static inline int mv_get_hc_count(unsigned long hp_flags)
333{ 401{
334 return ((flags & MV_FLAG_DUAL_HC) ? 2 : 1); 402 return ((hp_flags & MV_FLAG_DUAL_HC) ? 2 : 1);
335} 403}
336 404
337static inline int mv_is_edma_active(struct ata_port *ap) 405static void mv_irq_clear(struct ata_port *ap)
406{
407}
408
409/**
410 * mv_start_dma - Enable eDMA engine
411 * @base: port base address
412 * @pp: port private data
413 *
414 * Verify the local cache of the eDMA state is accurate with an
415 * assert.
416 *
417 * LOCKING:
418 * Inherited from caller.
419 */
420static void mv_start_dma(void __iomem *base, struct mv_port_priv *pp)
421{
422 if (!(MV_PP_FLAG_EDMA_EN & pp->pp_flags)) {
423 writelfl(EDMA_EN, base + EDMA_CMD_OFS);
424 pp->pp_flags |= MV_PP_FLAG_EDMA_EN;
425 }
426 assert(EDMA_EN & readl(base + EDMA_CMD_OFS));
427}
428
429/**
430 * mv_stop_dma - Disable eDMA engine
431 * @ap: ATA channel to manipulate
432 *
433 * Verify the local cache of the eDMA state is accurate with an
434 * assert.
435 *
436 * LOCKING:
437 * Inherited from caller.
438 */
439static void mv_stop_dma(struct ata_port *ap)
338{ 440{
339 void __iomem *port_mmio = mv_ap_base(ap); 441 void __iomem *port_mmio = mv_ap_base(ap);
340 return (EDMA_EN & readl(port_mmio + EDMA_CMD_OFS)); 442 struct mv_port_priv *pp = ap->private_data;
443 u32 reg;
444 int i;
445
446 if (MV_PP_FLAG_EDMA_EN & pp->pp_flags) {
447 /* Disable EDMA if active. The disable bit auto clears.
448 */
449 writelfl(EDMA_DS, port_mmio + EDMA_CMD_OFS);
450 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN;
451 } else {
452 assert(!(EDMA_EN & readl(port_mmio + EDMA_CMD_OFS)));
453 }
454
455 /* now properly wait for the eDMA to stop */
456 for (i = 1000; i > 0; i--) {
457 reg = readl(port_mmio + EDMA_CMD_OFS);
458 if (!(EDMA_EN & reg)) {
459 break;
460 }
461 udelay(100);
462 }
463
464 if (EDMA_EN & reg) {
465 printk(KERN_ERR "ata%u: Unable to stop eDMA\n", ap->id);
466 /* FIXME: Consider doing a reset here to recover */
467 }
341} 468}
342 469
343static inline int mv_port_bdma_capable(struct ata_port *ap) 470#ifdef ATA_DEBUG
471static void mv_dump_mem(void __iomem *start, unsigned bytes)
344{ 472{
345 return (ap->flags & MV_FLAG_BDMA); 473 int b, w;
474 for (b = 0; b < bytes; ) {
475 DPRINTK("%p: ", start + b);
476 for (w = 0; b < bytes && w < 4; w++) {
477 printk("%08x ",readl(start + b));
478 b += sizeof(u32);
479 }
480 printk("\n");
481 }
346} 482}
483#endif
347 484
348static void mv_irq_clear(struct ata_port *ap) 485static void mv_dump_pci_cfg(struct pci_dev *pdev, unsigned bytes)
486{
487#ifdef ATA_DEBUG
488 int b, w;
489 u32 dw;
490 for (b = 0; b < bytes; ) {
491 DPRINTK("%02x: ", b);
492 for (w = 0; b < bytes && w < 4; w++) {
493 (void) pci_read_config_dword(pdev,b,&dw);
494 printk("%08x ",dw);
495 b += sizeof(u32);
496 }
497 printk("\n");
498 }
499#endif
500}
501static void mv_dump_all_regs(void __iomem *mmio_base, int port,
502 struct pci_dev *pdev)
349{ 503{
504#ifdef ATA_DEBUG
505 void __iomem *hc_base = mv_hc_base(mmio_base,
506 port >> MV_PORT_HC_SHIFT);
507 void __iomem *port_base;
508 int start_port, num_ports, p, start_hc, num_hcs, hc;
509
510 if (0 > port) {
511 start_hc = start_port = 0;
512 num_ports = 8; /* shld be benign for 4 port devs */
513 num_hcs = 2;
514 } else {
515 start_hc = port >> MV_PORT_HC_SHIFT;
516 start_port = port;
517 num_ports = num_hcs = 1;
518 }
519 DPRINTK("All registers for port(s) %u-%u:\n", start_port,
520 num_ports > 1 ? num_ports - 1 : start_port);
521
522 if (NULL != pdev) {
523 DPRINTK("PCI config space regs:\n");
524 mv_dump_pci_cfg(pdev, 0x68);
525 }
526 DPRINTK("PCI regs:\n");
527 mv_dump_mem(mmio_base+0xc00, 0x3c);
528 mv_dump_mem(mmio_base+0xd00, 0x34);
529 mv_dump_mem(mmio_base+0xf00, 0x4);
530 mv_dump_mem(mmio_base+0x1d00, 0x6c);
531 for (hc = start_hc; hc < start_hc + num_hcs; hc++) {
532 hc_base = mv_hc_base(mmio_base, port >> MV_PORT_HC_SHIFT);
533 DPRINTK("HC regs (HC %i):\n", hc);
534 mv_dump_mem(hc_base, 0x1c);
535 }
536 for (p = start_port; p < start_port + num_ports; p++) {
537 port_base = mv_port_base(mmio_base, p);
538 DPRINTK("EDMA regs (port %i):\n",p);
539 mv_dump_mem(port_base, 0x54);
540 DPRINTK("SATA regs (port %i):\n",p);
541 mv_dump_mem(port_base+0x300, 0x60);
542 }
543#endif
350} 544}
351 545
352static unsigned int mv_scr_offset(unsigned int sc_reg_in) 546static unsigned int mv_scr_offset(unsigned int sc_reg_in)
@@ -389,30 +583,37 @@ static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val)
389 } 583 }
390} 584}
391 585
392static int mv_master_reset(void __iomem *mmio_base) 586/**
587 * mv_global_soft_reset - Perform the 6xxx global soft reset
588 * @mmio_base: base address of the HBA
589 *
590 * This routine only applies to 6xxx parts.
591 *
592 * LOCKING:
593 * Inherited from caller.
594 */
595static int mv_global_soft_reset(void __iomem *mmio_base)
393{ 596{
394 void __iomem *reg = mmio_base + PCI_MAIN_CMD_STS_OFS; 597 void __iomem *reg = mmio_base + PCI_MAIN_CMD_STS_OFS;
395 int i, rc = 0; 598 int i, rc = 0;
396 u32 t; 599 u32 t;
397 600
398 VPRINTK("ENTER\n");
399
400 /* Following procedure defined in PCI "main command and status 601 /* Following procedure defined in PCI "main command and status
401 * register" table. 602 * register" table.
402 */ 603 */
403 t = readl(reg); 604 t = readl(reg);
404 writel(t | STOP_PCI_MASTER, reg); 605 writel(t | STOP_PCI_MASTER, reg);
405 606
406 for (i = 0; i < 100; i++) { 607 for (i = 0; i < 1000; i++) {
407 msleep(10); 608 udelay(1);
408 t = readl(reg); 609 t = readl(reg);
409 if (PCI_MASTER_EMPTY & t) { 610 if (PCI_MASTER_EMPTY & t) {
410 break; 611 break;
411 } 612 }
412 } 613 }
413 if (!(PCI_MASTER_EMPTY & t)) { 614 if (!(PCI_MASTER_EMPTY & t)) {
414 printk(KERN_ERR DRV_NAME "PCI master won't flush\n"); 615 printk(KERN_ERR DRV_NAME ": PCI master won't flush\n");
415 rc = 1; /* broken HW? */ 616 rc = 1;
416 goto done; 617 goto done;
417 } 618 }
418 619
@@ -425,39 +626,399 @@ static int mv_master_reset(void __iomem *mmio_base)
425 } while (!(GLOB_SFT_RST & t) && (i-- > 0)); 626 } while (!(GLOB_SFT_RST & t) && (i-- > 0));
426 627
427 if (!(GLOB_SFT_RST & t)) { 628 if (!(GLOB_SFT_RST & t)) {
428 printk(KERN_ERR DRV_NAME "can't set global reset\n"); 629 printk(KERN_ERR DRV_NAME ": can't set global reset\n");
429 rc = 1; /* broken HW? */ 630 rc = 1;
430 goto done; 631 goto done;
431 } 632 }
432 633
433 /* clear reset */ 634 /* clear reset and *reenable the PCI master* (not mentioned in spec) */
434 i = 5; 635 i = 5;
435 do { 636 do {
436 writel(t & ~GLOB_SFT_RST, reg); 637 writel(t & ~(GLOB_SFT_RST | STOP_PCI_MASTER), reg);
437 t = readl(reg); 638 t = readl(reg);
438 udelay(1); 639 udelay(1);
439 } while ((GLOB_SFT_RST & t) && (i-- > 0)); 640 } while ((GLOB_SFT_RST & t) && (i-- > 0));
440 641
441 if (GLOB_SFT_RST & t) { 642 if (GLOB_SFT_RST & t) {
442 printk(KERN_ERR DRV_NAME "can't clear global reset\n"); 643 printk(KERN_ERR DRV_NAME ": can't clear global reset\n");
443 rc = 1; /* broken HW? */ 644 rc = 1;
444 } 645 }
445 646done:
446 done:
447 VPRINTK("EXIT, rc = %i\n", rc);
448 return rc; 647 return rc;
449} 648}
450 649
451static void mv_err_intr(struct ata_port *ap) 650/**
651 * mv_host_stop - Host specific cleanup/stop routine.
652 * @host_set: host data structure
653 *
654 * Disable ints, cleanup host memory, call general purpose
655 * host_stop.
656 *
657 * LOCKING:
658 * Inherited from caller.
659 */
660static void mv_host_stop(struct ata_host_set *host_set)
452{ 661{
453 void __iomem *port_mmio; 662 struct mv_host_priv *hpriv = host_set->private_data;
454 u32 edma_err_cause, serr = 0; 663 struct pci_dev *pdev = to_pci_dev(host_set->dev);
664
665 if (hpriv->hp_flags & MV_HP_FLAG_MSI) {
666 pci_disable_msi(pdev);
667 } else {
668 pci_intx(pdev, 0);
669 }
670 kfree(hpriv);
671 ata_host_stop(host_set);
672}
673
674/**
675 * mv_port_start - Port specific init/start routine.
676 * @ap: ATA channel to manipulate
677 *
678 * Allocate and point to DMA memory, init port private memory,
679 * zero indices.
680 *
681 * LOCKING:
682 * Inherited from caller.
683 */
684static int mv_port_start(struct ata_port *ap)
685{
686 struct device *dev = ap->host_set->dev;
687 struct mv_port_priv *pp;
688 void __iomem *port_mmio = mv_ap_base(ap);
689 void *mem;
690 dma_addr_t mem_dma;
691
692 pp = kmalloc(sizeof(*pp), GFP_KERNEL);
693 if (!pp) {
694 return -ENOMEM;
695 }
696 memset(pp, 0, sizeof(*pp));
697
698 mem = dma_alloc_coherent(dev, MV_PORT_PRIV_DMA_SZ, &mem_dma,
699 GFP_KERNEL);
700 if (!mem) {
701 kfree(pp);
702 return -ENOMEM;
703 }
704 memset(mem, 0, MV_PORT_PRIV_DMA_SZ);
705
706 /* First item in chunk of DMA memory:
707 * 32-slot command request table (CRQB), 32 bytes each in size
708 */
709 pp->crqb = mem;
710 pp->crqb_dma = mem_dma;
711 mem += MV_CRQB_Q_SZ;
712 mem_dma += MV_CRQB_Q_SZ;
713
714 /* Second item:
715 * 32-slot command response table (CRPB), 8 bytes each in size
716 */
717 pp->crpb = mem;
718 pp->crpb_dma = mem_dma;
719 mem += MV_CRPB_Q_SZ;
720 mem_dma += MV_CRPB_Q_SZ;
721
722 /* Third item:
723 * Table of scatter-gather descriptors (ePRD), 16 bytes each
724 */
725 pp->sg_tbl = mem;
726 pp->sg_tbl_dma = mem_dma;
727
728 writelfl(EDMA_CFG_Q_DEPTH | EDMA_CFG_RD_BRST_EXT |
729 EDMA_CFG_WR_BUFF_LEN, port_mmio + EDMA_CFG_OFS);
730
731 writel((pp->crqb_dma >> 16) >> 16, port_mmio + EDMA_REQ_Q_BASE_HI_OFS);
732 writelfl(pp->crqb_dma & EDMA_REQ_Q_BASE_LO_MASK,
733 port_mmio + EDMA_REQ_Q_IN_PTR_OFS);
734
735 writelfl(0, port_mmio + EDMA_REQ_Q_OUT_PTR_OFS);
736 writelfl(0, port_mmio + EDMA_RSP_Q_IN_PTR_OFS);
737
738 writel((pp->crpb_dma >> 16) >> 16, port_mmio + EDMA_RSP_Q_BASE_HI_OFS);
739 writelfl(pp->crpb_dma & EDMA_RSP_Q_BASE_LO_MASK,
740 port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
741
742 pp->req_producer = pp->rsp_consumer = 0;
743
744 /* Don't turn on EDMA here...do it before DMA commands only. Else
745 * we'll be unable to send non-data, PIO, etc due to restricted access
746 * to shadow regs.
747 */
748 ap->private_data = pp;
749 return 0;
750}
751
752/**
753 * mv_port_stop - Port specific cleanup/stop routine.
754 * @ap: ATA channel to manipulate
755 *
756 * Stop DMA, cleanup port memory.
757 *
758 * LOCKING:
759 * This routine uses the host_set lock to protect the DMA stop.
760 */
761static void mv_port_stop(struct ata_port *ap)
762{
763 struct device *dev = ap->host_set->dev;
764 struct mv_port_priv *pp = ap->private_data;
765 unsigned long flags;
766
767 spin_lock_irqsave(&ap->host_set->lock, flags);
768 mv_stop_dma(ap);
769 spin_unlock_irqrestore(&ap->host_set->lock, flags);
770
771 ap->private_data = NULL;
772 dma_free_coherent(dev, MV_PORT_PRIV_DMA_SZ, pp->crpb, pp->crpb_dma);
773 kfree(pp);
774}
775
776/**
777 * mv_fill_sg - Fill out the Marvell ePRD (scatter gather) entries
778 * @qc: queued command whose SG list to source from
779 *
780 * Populate the SG list and mark the last entry.
781 *
782 * LOCKING:
783 * Inherited from caller.
784 */
785static void mv_fill_sg(struct ata_queued_cmd *qc)
786{
787 struct mv_port_priv *pp = qc->ap->private_data;
788 unsigned int i;
789
790 for (i = 0; i < qc->n_elem; i++) {
791 u32 sg_len;
792 dma_addr_t addr;
793
794 addr = sg_dma_address(&qc->sg[i]);
795 sg_len = sg_dma_len(&qc->sg[i]);
796
797 pp->sg_tbl[i].addr = cpu_to_le32(addr & 0xffffffff);
798 pp->sg_tbl[i].addr_hi = cpu_to_le32((addr >> 16) >> 16);
799 assert(0 == (sg_len & ~MV_DMA_BOUNDARY));
800 pp->sg_tbl[i].flags_size = cpu_to_le32(sg_len);
801 }
802 if (0 < qc->n_elem) {
803 pp->sg_tbl[qc->n_elem - 1].flags_size |=
804 cpu_to_le32(EPRD_FLAG_END_OF_TBL);
805 }
806}
807
808static inline unsigned mv_inc_q_index(unsigned *index)
809{
810 *index = (*index + 1) & MV_MAX_Q_DEPTH_MASK;
811 return *index;
812}
813
814static inline void mv_crqb_pack_cmd(u16 *cmdw, u8 data, u8 addr, unsigned last)
815{
816 *cmdw = data | (addr << CRQB_CMD_ADDR_SHIFT) | CRQB_CMD_CS |
817 (last ? CRQB_CMD_LAST : 0);
818}
455 819
456 /* bug here b/c we got an err int on a port we don't know about, 820/**
457 * so there's no way to clear it 821 * mv_qc_prep - Host specific command preparation.
822 * @qc: queued command to prepare
823 *
824 * This routine simply redirects to the general purpose routine
825 * if command is not DMA. Else, it handles prep of the CRQB
826 * (command request block), does some sanity checking, and calls
827 * the SG load routine.
828 *
829 * LOCKING:
830 * Inherited from caller.
831 */
832static void mv_qc_prep(struct ata_queued_cmd *qc)
833{
834 struct ata_port *ap = qc->ap;
835 struct mv_port_priv *pp = ap->private_data;
836 u16 *cw;
837 struct ata_taskfile *tf;
838 u16 flags = 0;
839
840 if (ATA_PROT_DMA != qc->tf.protocol) {
841 return;
842 }
843
844 /* the req producer index should be the same as we remember it */
845 assert(((readl(mv_ap_base(qc->ap) + EDMA_REQ_Q_IN_PTR_OFS) >>
846 EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
847 pp->req_producer);
848
849 /* Fill in command request block
458 */ 850 */
459 BUG_ON(NULL == ap); 851 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
460 port_mmio = mv_ap_base(ap); 852 flags |= CRQB_FLAG_READ;
853 }
854 assert(MV_MAX_Q_DEPTH > qc->tag);
855 flags |= qc->tag << CRQB_TAG_SHIFT;
856
857 pp->crqb[pp->req_producer].sg_addr =
858 cpu_to_le32(pp->sg_tbl_dma & 0xffffffff);
859 pp->crqb[pp->req_producer].sg_addr_hi =
860 cpu_to_le32((pp->sg_tbl_dma >> 16) >> 16);
861 pp->crqb[pp->req_producer].ctrl_flags = cpu_to_le16(flags);
862
863 cw = &pp->crqb[pp->req_producer].ata_cmd[0];
864 tf = &qc->tf;
865
866 /* Sadly, the CRQB cannot accomodate all registers--there are
867 * only 11 bytes...so we must pick and choose required
868 * registers based on the command. So, we drop feature and
869 * hob_feature for [RW] DMA commands, but they are needed for
870 * NCQ. NCQ will drop hob_nsect.
871 */
872 switch (tf->command) {
873 case ATA_CMD_READ:
874 case ATA_CMD_READ_EXT:
875 case ATA_CMD_WRITE:
876 case ATA_CMD_WRITE_EXT:
877 mv_crqb_pack_cmd(cw++, tf->hob_nsect, ATA_REG_NSECT, 0);
878 break;
879#ifdef LIBATA_NCQ /* FIXME: remove this line when NCQ added */
880 case ATA_CMD_FPDMA_READ:
881 case ATA_CMD_FPDMA_WRITE:
882 mv_crqb_pack_cmd(cw++, tf->hob_feature, ATA_REG_FEATURE, 0);
883 mv_crqb_pack_cmd(cw++, tf->feature, ATA_REG_FEATURE, 0);
884 break;
885#endif /* FIXME: remove this line when NCQ added */
886 default:
887 /* The only other commands EDMA supports in non-queued and
888 * non-NCQ mode are: [RW] STREAM DMA and W DMA FUA EXT, none
889 * of which are defined/used by Linux. If we get here, this
890 * driver needs work.
891 *
892 * FIXME: modify libata to give qc_prep a return value and
893 * return error here.
894 */
895 BUG_ON(tf->command);
896 break;
897 }
898 mv_crqb_pack_cmd(cw++, tf->nsect, ATA_REG_NSECT, 0);
899 mv_crqb_pack_cmd(cw++, tf->hob_lbal, ATA_REG_LBAL, 0);
900 mv_crqb_pack_cmd(cw++, tf->lbal, ATA_REG_LBAL, 0);
901 mv_crqb_pack_cmd(cw++, tf->hob_lbam, ATA_REG_LBAM, 0);
902 mv_crqb_pack_cmd(cw++, tf->lbam, ATA_REG_LBAM, 0);
903 mv_crqb_pack_cmd(cw++, tf->hob_lbah, ATA_REG_LBAH, 0);
904 mv_crqb_pack_cmd(cw++, tf->lbah, ATA_REG_LBAH, 0);
905 mv_crqb_pack_cmd(cw++, tf->device, ATA_REG_DEVICE, 0);
906 mv_crqb_pack_cmd(cw++, tf->command, ATA_REG_CMD, 1); /* last */
907
908 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) {
909 return;
910 }
911 mv_fill_sg(qc);
912}
913
914/**
915 * mv_qc_issue - Initiate a command to the host
916 * @qc: queued command to start
917 *
918 * This routine simply redirects to the general purpose routine
919 * if command is not DMA. Else, it sanity checks our local
920 * caches of the request producer/consumer indices then enables
921 * DMA and bumps the request producer index.
922 *
923 * LOCKING:
924 * Inherited from caller.
925 */
926static int mv_qc_issue(struct ata_queued_cmd *qc)
927{
928 void __iomem *port_mmio = mv_ap_base(qc->ap);
929 struct mv_port_priv *pp = qc->ap->private_data;
930 u32 in_ptr;
931
932 if (ATA_PROT_DMA != qc->tf.protocol) {
933 /* We're about to send a non-EDMA capable command to the
934 * port. Turn off EDMA so there won't be problems accessing
935 * shadow block, etc registers.
936 */
937 mv_stop_dma(qc->ap);
938 return ata_qc_issue_prot(qc);
939 }
940
941 in_ptr = readl(port_mmio + EDMA_REQ_Q_IN_PTR_OFS);
942
943 /* the req producer index should be the same as we remember it */
944 assert(((in_ptr >> EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
945 pp->req_producer);
946 /* until we do queuing, the queue should be empty at this point */
947 assert(((in_ptr >> EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
948 ((readl(port_mmio + EDMA_REQ_Q_OUT_PTR_OFS) >>
949 EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK));
950
951 mv_inc_q_index(&pp->req_producer); /* now incr producer index */
952
953 mv_start_dma(port_mmio, pp);
954
955 /* and write the request in pointer to kick the EDMA to life */
956 in_ptr &= EDMA_REQ_Q_BASE_LO_MASK;
957 in_ptr |= pp->req_producer << EDMA_REQ_Q_PTR_SHIFT;
958 writelfl(in_ptr, port_mmio + EDMA_REQ_Q_IN_PTR_OFS);
959
960 return 0;
961}
962
963/**
964 * mv_get_crpb_status - get status from most recently completed cmd
965 * @ap: ATA channel to manipulate
966 *
967 * This routine is for use when the port is in DMA mode, when it
968 * will be using the CRPB (command response block) method of
969 * returning command completion information. We assert indices
970 * are good, grab status, and bump the response consumer index to
971 * prove that we're up to date.
972 *
973 * LOCKING:
974 * Inherited from caller.
975 */
976static u8 mv_get_crpb_status(struct ata_port *ap)
977{
978 void __iomem *port_mmio = mv_ap_base(ap);
979 struct mv_port_priv *pp = ap->private_data;
980 u32 out_ptr;
981
982 out_ptr = readl(port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
983
984 /* the response consumer index should be the same as we remember it */
985 assert(((out_ptr >> EDMA_RSP_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
986 pp->rsp_consumer);
987
988 /* increment our consumer index... */
989 pp->rsp_consumer = mv_inc_q_index(&pp->rsp_consumer);
990
991 /* and, until we do NCQ, there should only be 1 CRPB waiting */
992 assert(((readl(port_mmio + EDMA_RSP_Q_IN_PTR_OFS) >>
993 EDMA_RSP_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK) ==
994 pp->rsp_consumer);
995
996 /* write out our inc'd consumer index so EDMA knows we're caught up */
997 out_ptr &= EDMA_RSP_Q_BASE_LO_MASK;
998 out_ptr |= pp->rsp_consumer << EDMA_RSP_Q_PTR_SHIFT;
999 writelfl(out_ptr, port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
1000
1001 /* Return ATA status register for completed CRPB */
1002 return (pp->crpb[pp->rsp_consumer].flags >> CRPB_FLAG_STATUS_SHIFT);
1003}
1004
1005/**
1006 * mv_err_intr - Handle error interrupts on the port
1007 * @ap: ATA channel to manipulate
1008 *
1009 * In most cases, just clear the interrupt and move on. However,
1010 * some cases require an eDMA reset, which is done right before
1011 * the COMRESET in mv_phy_reset(). The SERR case requires a
1012 * clear of pending errors in the SATA SERROR register. Finally,
1013 * if the port disabled DMA, update our cached copy to match.
1014 *
1015 * LOCKING:
1016 * Inherited from caller.
1017 */
1018static void mv_err_intr(struct ata_port *ap)
1019{
1020 void __iomem *port_mmio = mv_ap_base(ap);
1021 u32 edma_err_cause, serr = 0;
461 1022
462 edma_err_cause = readl(port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); 1023 edma_err_cause = readl(port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);
463 1024
@@ -465,8 +1026,12 @@ static void mv_err_intr(struct ata_port *ap)
465 serr = scr_read(ap, SCR_ERROR); 1026 serr = scr_read(ap, SCR_ERROR);
466 scr_write_flush(ap, SCR_ERROR, serr); 1027 scr_write_flush(ap, SCR_ERROR, serr);
467 } 1028 }
468 DPRINTK("port %u error; EDMA err cause: 0x%08x SERR: 0x%08x\n", 1029 if (EDMA_ERR_SELF_DIS & edma_err_cause) {
469 ap->port_no, edma_err_cause, serr); 1030 struct mv_port_priv *pp = ap->private_data;
1031 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN;
1032 }
1033 DPRINTK(KERN_ERR "ata%u: port error; EDMA err cause: 0x%08x "
1034 "SERR: 0x%08x\n", ap->id, edma_err_cause, serr);
470 1035
471 /* Clear EDMA now that SERR cleanup done */ 1036 /* Clear EDMA now that SERR cleanup done */
472 writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); 1037 writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);
@@ -477,7 +1042,21 @@ static void mv_err_intr(struct ata_port *ap)
477 } 1042 }
478} 1043}
479 1044
480/* Handle any outstanding interrupts in a single SATAHC 1045/**
1046 * mv_host_intr - Handle all interrupts on the given host controller
1047 * @host_set: host specific structure
1048 * @relevant: port error bits relevant to this host controller
1049 * @hc: which host controller we're to look at
1050 *
1051 * Read then write clear the HC interrupt status then walk each
1052 * port connected to the HC and see if it needs servicing. Port
1053 * success ints are reported in the HC interrupt status reg, the
1054 * port error ints are reported in the higher level main
1055 * interrupt status register and thus are passed in via the
1056 * 'relevant' argument.
1057 *
1058 * LOCKING:
1059 * Inherited from caller.
481 */ 1060 */
482static void mv_host_intr(struct ata_host_set *host_set, u32 relevant, 1061static void mv_host_intr(struct ata_host_set *host_set, u32 relevant,
483 unsigned int hc) 1062 unsigned int hc)
@@ -487,8 +1066,8 @@ static void mv_host_intr(struct ata_host_set *host_set, u32 relevant,
487 struct ata_port *ap; 1066 struct ata_port *ap;
488 struct ata_queued_cmd *qc; 1067 struct ata_queued_cmd *qc;
489 u32 hc_irq_cause; 1068 u32 hc_irq_cause;
490 int shift, port, port0, hard_port; 1069 int shift, port, port0, hard_port, handled;
491 u8 ata_status; 1070 u8 ata_status = 0;
492 1071
493 if (hc == 0) { 1072 if (hc == 0) {
494 port0 = 0; 1073 port0 = 0;
@@ -499,7 +1078,7 @@ static void mv_host_intr(struct ata_host_set *host_set, u32 relevant,
499 /* we'll need the HC success int register in most cases */ 1078 /* we'll need the HC success int register in most cases */
500 hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS); 1079 hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS);
501 if (hc_irq_cause) { 1080 if (hc_irq_cause) {
502 writelfl(0, hc_mmio + HC_IRQ_CAUSE_OFS); 1081 writelfl(~hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS);
503 } 1082 }
504 1083
505 VPRINTK("ENTER, hc%u relevant=0x%08x HC IRQ cause=0x%08x\n", 1084 VPRINTK("ENTER, hc%u relevant=0x%08x HC IRQ cause=0x%08x\n",
@@ -508,35 +1087,38 @@ static void mv_host_intr(struct ata_host_set *host_set, u32 relevant,
508 for (port = port0; port < port0 + MV_PORTS_PER_HC; port++) { 1087 for (port = port0; port < port0 + MV_PORTS_PER_HC; port++) {
509 ap = host_set->ports[port]; 1088 ap = host_set->ports[port];
510 hard_port = port & MV_PORT_MASK; /* range 0-3 */ 1089 hard_port = port & MV_PORT_MASK; /* range 0-3 */
511 ata_status = 0xffU; 1090 handled = 0; /* ensure ata_status is set if handled++ */
512 1091
513 if (((CRBP_DMA_DONE | DEV_IRQ) << hard_port) & hc_irq_cause) { 1092 if ((CRPB_DMA_DONE << hard_port) & hc_irq_cause) {
514 BUG_ON(NULL == ap); 1093 /* new CRPB on the queue; just one at a time until NCQ
515 /* rcv'd new resp, basic DMA complete, or ATA IRQ */ 1094 */
516 /* This is needed to clear the ATA INTRQ. 1095 ata_status = mv_get_crpb_status(ap);
517 * FIXME: don't read the status reg in EDMA mode! 1096 handled++;
1097 } else if ((DEV_IRQ << hard_port) & hc_irq_cause) {
1098 /* received ATA IRQ; read the status reg to clear INTRQ
518 */ 1099 */
519 ata_status = readb((void __iomem *) 1100 ata_status = readb((void __iomem *)
520 ap->ioaddr.status_addr); 1101 ap->ioaddr.status_addr);
1102 handled++;
521 } 1103 }
522 1104
523 shift = port * 2; 1105 shift = port << 1; /* (port * 2) */
524 if (port >= MV_PORTS_PER_HC) { 1106 if (port >= MV_PORTS_PER_HC) {
525 shift++; /* skip bit 8 in the HC Main IRQ reg */ 1107 shift++; /* skip bit 8 in the HC Main IRQ reg */
526 } 1108 }
527 if ((PORT0_ERR << shift) & relevant) { 1109 if ((PORT0_ERR << shift) & relevant) {
528 mv_err_intr(ap); 1110 mv_err_intr(ap);
529 /* FIXME: smart to OR in ATA_ERR? */ 1111 /* OR in ATA_ERR to ensure libata knows we took one */
530 ata_status = readb((void __iomem *) 1112 ata_status = readb((void __iomem *)
531 ap->ioaddr.status_addr) | ATA_ERR; 1113 ap->ioaddr.status_addr) | ATA_ERR;
1114 handled++;
532 } 1115 }
533 1116
534 if (ap) { 1117 if (handled && ap) {
535 qc = ata_qc_from_tag(ap, ap->active_tag); 1118 qc = ata_qc_from_tag(ap, ap->active_tag);
536 if (NULL != qc) { 1119 if (NULL != qc) {
537 VPRINTK("port %u IRQ found for qc, " 1120 VPRINTK("port %u IRQ found for qc, "
538 "ata_status 0x%x\n", port,ata_status); 1121 "ata_status 0x%x\n", port,ata_status);
539 BUG_ON(0xffU == ata_status);
540 /* mark qc status appropriately */ 1122 /* mark qc status appropriately */
541 ata_qc_complete(qc, ata_status); 1123 ata_qc_complete(qc, ata_status);
542 } 1124 }
@@ -545,17 +1127,30 @@ static void mv_host_intr(struct ata_host_set *host_set, u32 relevant,
545 VPRINTK("EXIT\n"); 1127 VPRINTK("EXIT\n");
546} 1128}
547 1129
1130/**
1131 * mv_interrupt -
1132 * @irq: unused
1133 * @dev_instance: private data; in this case the host structure
1134 * @regs: unused
1135 *
1136 * Read the read only register to determine if any host
1137 * controllers have pending interrupts. If so, call lower level
1138 * routine to handle. Also check for PCI errors which are only
1139 * reported here.
1140 *
1141 * LOCKING:
1142 * This routine holds the host_set lock while processing pending
1143 * interrupts.
1144 */
548static irqreturn_t mv_interrupt(int irq, void *dev_instance, 1145static irqreturn_t mv_interrupt(int irq, void *dev_instance,
549 struct pt_regs *regs) 1146 struct pt_regs *regs)
550{ 1147{
551 struct ata_host_set *host_set = dev_instance; 1148 struct ata_host_set *host_set = dev_instance;
552 unsigned int hc, handled = 0, n_hcs; 1149 unsigned int hc, handled = 0, n_hcs;
553 void __iomem *mmio; 1150 void __iomem *mmio = host_set->mmio_base;
554 u32 irq_stat; 1151 u32 irq_stat;
555 1152
556 mmio = host_set->mmio_base;
557 irq_stat = readl(mmio + HC_MAIN_IRQ_CAUSE_OFS); 1153 irq_stat = readl(mmio + HC_MAIN_IRQ_CAUSE_OFS);
558 n_hcs = mv_get_hc_count(host_set->ports[0]->flags);
559 1154
560 /* check the cases where we either have nothing pending or have read 1155 /* check the cases where we either have nothing pending or have read
561 * a bogus register value which can indicate HW removal or PCI fault 1156 * a bogus register value which can indicate HW removal or PCI fault
@@ -564,64 +1159,105 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance,
564 return IRQ_NONE; 1159 return IRQ_NONE;
565 } 1160 }
566 1161
1162 n_hcs = mv_get_hc_count(host_set->ports[0]->flags);
567 spin_lock(&host_set->lock); 1163 spin_lock(&host_set->lock);
568 1164
569 for (hc = 0; hc < n_hcs; hc++) { 1165 for (hc = 0; hc < n_hcs; hc++) {
570 u32 relevant = irq_stat & (HC0_IRQ_PEND << (hc * HC_SHIFT)); 1166 u32 relevant = irq_stat & (HC0_IRQ_PEND << (hc * HC_SHIFT));
571 if (relevant) { 1167 if (relevant) {
572 mv_host_intr(host_set, relevant, hc); 1168 mv_host_intr(host_set, relevant, hc);
573 handled = 1; 1169 handled++;
574 } 1170 }
575 } 1171 }
576 if (PCI_ERR & irq_stat) { 1172 if (PCI_ERR & irq_stat) {
577 /* FIXME: these are all masked by default, but still need 1173 printk(KERN_ERR DRV_NAME ": PCI ERROR; PCI IRQ cause=0x%08x\n",
578 * to recover from them properly. 1174 readl(mmio + PCI_IRQ_CAUSE_OFS));
579 */
580 }
581 1175
1176 DPRINTK("All regs @ PCI error\n");
1177 mv_dump_all_regs(mmio, -1, to_pci_dev(host_set->dev));
1178
1179 writelfl(0, mmio + PCI_IRQ_CAUSE_OFS);
1180 handled++;
1181 }
582 spin_unlock(&host_set->lock); 1182 spin_unlock(&host_set->lock);
583 1183
584 return IRQ_RETVAL(handled); 1184 return IRQ_RETVAL(handled);
585} 1185}
586 1186
1187/**
1188 * mv_check_err - Return the error shadow register to caller.
1189 * @ap: ATA channel to manipulate
1190 *
1191 * Marvell requires DMA to be stopped before accessing shadow
1192 * registers. So we do that, then return the needed register.
1193 *
1194 * LOCKING:
1195 * Inherited from caller. FIXME: protect mv_stop_dma with lock?
1196 */
1197static u8 mv_check_err(struct ata_port *ap)
1198{
1199 mv_stop_dma(ap); /* can't read shadow regs if DMA on */
1200 return readb((void __iomem *) ap->ioaddr.error_addr);
1201}
1202
1203/**
1204 * mv_phy_reset - Perform eDMA reset followed by COMRESET
1205 * @ap: ATA channel to manipulate
1206 *
1207 * Part of this is taken from __sata_phy_reset and modified to
1208 * not sleep since this routine gets called from interrupt level.
1209 *
1210 * LOCKING:
1211 * Inherited from caller. This is coded to safe to call at
1212 * interrupt level, i.e. it does not sleep.
1213 */
587static void mv_phy_reset(struct ata_port *ap) 1214static void mv_phy_reset(struct ata_port *ap)
588{ 1215{
589 void __iomem *port_mmio = mv_ap_base(ap); 1216 void __iomem *port_mmio = mv_ap_base(ap);
590 struct ata_taskfile tf; 1217 struct ata_taskfile tf;
591 struct ata_device *dev = &ap->device[0]; 1218 struct ata_device *dev = &ap->device[0];
592 u32 edma = 0, bdma; 1219 unsigned long timeout;
593 1220
594 VPRINTK("ENTER, port %u, mmio 0x%p\n", ap->port_no, port_mmio); 1221 VPRINTK("ENTER, port %u, mmio 0x%p\n", ap->port_no, port_mmio);
595 1222
596 edma = readl(port_mmio + EDMA_CMD_OFS); 1223 mv_stop_dma(ap);
597 if (EDMA_EN & edma) {
598 /* disable EDMA if active */
599 edma &= ~EDMA_EN;
600 writelfl(edma | EDMA_DS, port_mmio + EDMA_CMD_OFS);
601 udelay(1);
602 } else if (mv_port_bdma_capable(ap) &&
603 (bdma = readl(port_mmio + BDMA_CMD_OFS)) & BDMA_START) {
604 /* disable BDMA if active */
605 writelfl(bdma & ~BDMA_START, port_mmio + BDMA_CMD_OFS);
606 }
607 1224
608 writelfl(edma | ATA_RST, port_mmio + EDMA_CMD_OFS); 1225 writelfl(ATA_RST, port_mmio + EDMA_CMD_OFS);
609 udelay(25); /* allow reset propagation */ 1226 udelay(25); /* allow reset propagation */
610 1227
611 /* Spec never mentions clearing the bit. Marvell's driver does 1228 /* Spec never mentions clearing the bit. Marvell's driver does
612 * clear the bit, however. 1229 * clear the bit, however.
613 */ 1230 */
614 writelfl(edma & ~ATA_RST, port_mmio + EDMA_CMD_OFS); 1231 writelfl(0, port_mmio + EDMA_CMD_OFS);
615 1232
616 VPRINTK("Done. Now calling __sata_phy_reset()\n"); 1233 VPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x "
1234 "SCtrl 0x%08x\n", mv_scr_read(ap, SCR_STATUS),
1235 mv_scr_read(ap, SCR_ERROR), mv_scr_read(ap, SCR_CONTROL));
617 1236
618 /* proceed to init communications via the scr_control reg */ 1237 /* proceed to init communications via the scr_control reg */
619 __sata_phy_reset(ap); 1238 scr_write_flush(ap, SCR_CONTROL, 0x301);
1239 mdelay(1);
1240 scr_write_flush(ap, SCR_CONTROL, 0x300);
1241 timeout = jiffies + (HZ * 1);
1242 do {
1243 mdelay(10);
1244 if ((scr_read(ap, SCR_STATUS) & 0xf) != 1)
1245 break;
1246 } while (time_before(jiffies, timeout));
620 1247
621 if (ap->flags & ATA_FLAG_PORT_DISABLED) { 1248 VPRINTK("S-regs after PHY wake: SStat 0x%08x SErr 0x%08x "
622 VPRINTK("Port disabled pre-sig. Exiting.\n"); 1249 "SCtrl 0x%08x\n", mv_scr_read(ap, SCR_STATUS),
1250 mv_scr_read(ap, SCR_ERROR), mv_scr_read(ap, SCR_CONTROL));
1251
1252 if (sata_dev_present(ap)) {
1253 ata_port_probe(ap);
1254 } else {
1255 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1256 ap->id, scr_read(ap, SCR_STATUS));
1257 ata_port_disable(ap);
623 return; 1258 return;
624 } 1259 }
1260 ap->cbl = ATA_CBL_SATA;
625 1261
626 tf.lbah = readb((void __iomem *) ap->ioaddr.lbah_addr); 1262 tf.lbah = readb((void __iomem *) ap->ioaddr.lbah_addr);
627 tf.lbam = readb((void __iomem *) ap->ioaddr.lbam_addr); 1263 tf.lbam = readb((void __iomem *) ap->ioaddr.lbam_addr);
@@ -636,37 +1272,118 @@ static void mv_phy_reset(struct ata_port *ap)
636 VPRINTK("EXIT\n"); 1272 VPRINTK("EXIT\n");
637} 1273}
638 1274
639static void mv_port_init(struct ata_ioports *port, unsigned long base) 1275/**
1276 * mv_eng_timeout - Routine called by libata when SCSI times out I/O
1277 * @ap: ATA channel to manipulate
1278 *
1279 * Intent is to clear all pending error conditions, reset the
1280 * chip/bus, fail the command, and move on.
1281 *
1282 * LOCKING:
1283 * This routine holds the host_set lock while failing the command.
1284 */
1285static void mv_eng_timeout(struct ata_port *ap)
1286{
1287 struct ata_queued_cmd *qc;
1288 unsigned long flags;
1289
1290 printk(KERN_ERR "ata%u: Entering mv_eng_timeout\n",ap->id);
1291 DPRINTK("All regs @ start of eng_timeout\n");
1292 mv_dump_all_regs(ap->host_set->mmio_base, ap->port_no,
1293 to_pci_dev(ap->host_set->dev));
1294
1295 qc = ata_qc_from_tag(ap, ap->active_tag);
1296 printk(KERN_ERR "mmio_base %p ap %p qc %p scsi_cmnd %p &cmnd %p\n",
1297 ap->host_set->mmio_base, ap, qc, qc->scsicmd,
1298 &qc->scsicmd->cmnd);
1299
1300 mv_err_intr(ap);
1301 mv_phy_reset(ap);
1302
1303 if (!qc) {
1304 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
1305 ap->id);
1306 } else {
1307 /* hack alert! We cannot use the supplied completion
1308 * function from inside the ->eh_strategy_handler() thread.
1309 * libata is the only user of ->eh_strategy_handler() in
1310 * any kernel, so the default scsi_done() assumes it is
1311 * not being called from the SCSI EH.
1312 */
1313 spin_lock_irqsave(&ap->host_set->lock, flags);
1314 qc->scsidone = scsi_finish_command;
1315 ata_qc_complete(qc, ATA_ERR);
1316 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1317 }
1318}
1319
1320/**
1321 * mv_port_init - Perform some early initialization on a single port.
1322 * @port: libata data structure storing shadow register addresses
1323 * @port_mmio: base address of the port
1324 *
1325 * Initialize shadow register mmio addresses, clear outstanding
1326 * interrupts on the port, and unmask interrupts for the future
1327 * start of the port.
1328 *
1329 * LOCKING:
1330 * Inherited from caller.
1331 */
1332static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio)
640{ 1333{
641 /* PIO related setup */ 1334 unsigned long shd_base = (unsigned long) port_mmio + SHD_BLK_OFS;
642 port->data_addr = base + SHD_PIO_DATA_OFS; 1335 unsigned serr_ofs;
643 port->error_addr = port->feature_addr = base + SHD_FEA_ERR_OFS; 1336
644 port->nsect_addr = base + SHD_SECT_CNT_OFS; 1337 /* PIO related setup
645 port->lbal_addr = base + SHD_LBA_L_OFS; 1338 */
646 port->lbam_addr = base + SHD_LBA_M_OFS; 1339 port->data_addr = shd_base + (sizeof(u32) * ATA_REG_DATA);
647 port->lbah_addr = base + SHD_LBA_H_OFS; 1340 port->error_addr =
648 port->device_addr = base + SHD_DEV_HD_OFS; 1341 port->feature_addr = shd_base + (sizeof(u32) * ATA_REG_ERR);
649 port->status_addr = port->command_addr = base + SHD_CMD_STA_OFS; 1342 port->nsect_addr = shd_base + (sizeof(u32) * ATA_REG_NSECT);
650 port->altstatus_addr = port->ctl_addr = base + SHD_CTL_AST_OFS; 1343 port->lbal_addr = shd_base + (sizeof(u32) * ATA_REG_LBAL);
651 /* unused */ 1344 port->lbam_addr = shd_base + (sizeof(u32) * ATA_REG_LBAM);
1345 port->lbah_addr = shd_base + (sizeof(u32) * ATA_REG_LBAH);
1346 port->device_addr = shd_base + (sizeof(u32) * ATA_REG_DEVICE);
1347 port->status_addr =
1348 port->command_addr = shd_base + (sizeof(u32) * ATA_REG_STATUS);
1349 /* special case: control/altstatus doesn't have ATA_REG_ address */
1350 port->altstatus_addr = port->ctl_addr = shd_base + SHD_CTL_AST_OFS;
1351
1352 /* unused: */
652 port->cmd_addr = port->bmdma_addr = port->scr_addr = 0; 1353 port->cmd_addr = port->bmdma_addr = port->scr_addr = 0;
653 1354
1355 /* Clear any currently outstanding port interrupt conditions */
1356 serr_ofs = mv_scr_offset(SCR_ERROR);
1357 writelfl(readl(port_mmio + serr_ofs), port_mmio + serr_ofs);
1358 writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);
1359
654 /* unmask all EDMA error interrupts */ 1360 /* unmask all EDMA error interrupts */
655 writel(~0, (void __iomem *)base + EDMA_ERR_IRQ_MASK_OFS); 1361 writelfl(~0, port_mmio + EDMA_ERR_IRQ_MASK_OFS);
656 1362
657 VPRINTK("EDMA cfg=0x%08x EDMA IRQ err cause/mask=0x%08x/0x%08x\n", 1363 VPRINTK("EDMA cfg=0x%08x EDMA IRQ err cause/mask=0x%08x/0x%08x\n",
658 readl((void __iomem *)base + EDMA_CFG_OFS), 1364 readl(port_mmio + EDMA_CFG_OFS),
659 readl((void __iomem *)base + EDMA_ERR_IRQ_CAUSE_OFS), 1365 readl(port_mmio + EDMA_ERR_IRQ_CAUSE_OFS),
660 readl((void __iomem *)base + EDMA_ERR_IRQ_MASK_OFS)); 1366 readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS));
661} 1367}
662 1368
1369/**
1370 * mv_host_init - Perform some early initialization of the host.
1371 * @probe_ent: early data struct representing the host
1372 *
1373 * If possible, do an early global reset of the host. Then do
1374 * our port init and clear/unmask all/relevant host interrupts.
1375 *
1376 * LOCKING:
1377 * Inherited from caller.
1378 */
663static int mv_host_init(struct ata_probe_ent *probe_ent) 1379static int mv_host_init(struct ata_probe_ent *probe_ent)
664{ 1380{
665 int rc = 0, n_hc, port, hc; 1381 int rc = 0, n_hc, port, hc;
666 void __iomem *mmio = probe_ent->mmio_base; 1382 void __iomem *mmio = probe_ent->mmio_base;
667 void __iomem *port_mmio; 1383 void __iomem *port_mmio;
668 1384
669 if (mv_master_reset(probe_ent->mmio_base)) { 1385 if ((MV_FLAG_GLBL_SFT_RST & probe_ent->host_flags) &&
1386 mv_global_soft_reset(probe_ent->mmio_base)) {
670 rc = 1; 1387 rc = 1;
671 goto done; 1388 goto done;
672 } 1389 }
@@ -676,17 +1393,27 @@ static int mv_host_init(struct ata_probe_ent *probe_ent)
676 1393
677 for (port = 0; port < probe_ent->n_ports; port++) { 1394 for (port = 0; port < probe_ent->n_ports; port++) {
678 port_mmio = mv_port_base(mmio, port); 1395 port_mmio = mv_port_base(mmio, port);
679 mv_port_init(&probe_ent->port[port], (unsigned long)port_mmio); 1396 mv_port_init(&probe_ent->port[port], port_mmio);
680 } 1397 }
681 1398
682 for (hc = 0; hc < n_hc; hc++) { 1399 for (hc = 0; hc < n_hc; hc++) {
683 VPRINTK("HC%i: HC config=0x%08x HC IRQ cause=0x%08x\n", hc, 1400 void __iomem *hc_mmio = mv_hc_base(mmio, hc);
684 readl(mv_hc_base(mmio, hc) + HC_CFG_OFS), 1401
685 readl(mv_hc_base(mmio, hc) + HC_IRQ_CAUSE_OFS)); 1402 VPRINTK("HC%i: HC config=0x%08x HC IRQ cause "
1403 "(before clear)=0x%08x\n", hc,
1404 readl(hc_mmio + HC_CFG_OFS),
1405 readl(hc_mmio + HC_IRQ_CAUSE_OFS));
1406
1407 /* Clear any currently outstanding hc interrupt conditions */
1408 writelfl(0, hc_mmio + HC_IRQ_CAUSE_OFS);
686 } 1409 }
687 1410
688 writel(~HC_MAIN_MASKED_IRQS, mmio + HC_MAIN_IRQ_MASK_OFS); 1411 /* Clear any currently outstanding host interrupt conditions */
689 writel(PCI_UNMASK_ALL_IRQS, mmio + PCI_IRQ_MASK_OFS); 1412 writelfl(0, mmio + PCI_IRQ_CAUSE_OFS);
1413
1414 /* and unmask interrupt generation for host regs */
1415 writelfl(PCI_UNMASK_ALL_IRQS, mmio + PCI_IRQ_MASK_OFS);
1416 writelfl(~HC_MAIN_MASKED_IRQS, mmio + HC_MAIN_IRQ_MASK_OFS);
690 1417
691 VPRINTK("HC MAIN IRQ cause/mask=0x%08x/0x%08x " 1418 VPRINTK("HC MAIN IRQ cause/mask=0x%08x/0x%08x "
692 "PCI int cause/mask=0x%08x/0x%08x\n", 1419 "PCI int cause/mask=0x%08x/0x%08x\n",
@@ -694,11 +1421,53 @@ static int mv_host_init(struct ata_probe_ent *probe_ent)
694 readl(mmio + HC_MAIN_IRQ_MASK_OFS), 1421 readl(mmio + HC_MAIN_IRQ_MASK_OFS),
695 readl(mmio + PCI_IRQ_CAUSE_OFS), 1422 readl(mmio + PCI_IRQ_CAUSE_OFS),
696 readl(mmio + PCI_IRQ_MASK_OFS)); 1423 readl(mmio + PCI_IRQ_MASK_OFS));
697 1424done:
698 done:
699 return rc; 1425 return rc;
700} 1426}
701 1427
1428/**
1429 * mv_print_info - Dump key info to kernel log for perusal.
1430 * @probe_ent: early data struct representing the host
1431 *
1432 * FIXME: complete this.
1433 *
1434 * LOCKING:
1435 * Inherited from caller.
1436 */
1437static void mv_print_info(struct ata_probe_ent *probe_ent)
1438{
1439 struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
1440 struct mv_host_priv *hpriv = probe_ent->private_data;
1441 u8 rev_id, scc;
1442 const char *scc_s;
1443
1444 /* Use this to determine the HW stepping of the chip so we know
1445 * what errata to workaround
1446 */
1447 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
1448
1449 pci_read_config_byte(pdev, PCI_CLASS_DEVICE, &scc);
1450 if (scc == 0)
1451 scc_s = "SCSI";
1452 else if (scc == 0x01)
1453 scc_s = "RAID";
1454 else
1455 scc_s = "unknown";
1456
1457 printk(KERN_INFO DRV_NAME
1458 "(%s) %u slots %u ports %s mode IRQ via %s\n",
1459 pci_name(pdev), (unsigned)MV_MAX_Q_DEPTH, probe_ent->n_ports,
1460 scc_s, (MV_HP_FLAG_MSI & hpriv->hp_flags) ? "MSI" : "INTx");
1461}
1462
1463/**
1464 * mv_init_one - handle a positive probe of a Marvell host
1465 * @pdev: PCI device found
1466 * @ent: PCI device ID entry for the matched host
1467 *
1468 * LOCKING:
1469 * Inherited from caller.
1470 */
702static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 1471static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
703{ 1472{
704 static int printed_version = 0; 1473 static int printed_version = 0;
@@ -706,16 +1475,12 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
706 struct mv_host_priv *hpriv; 1475 struct mv_host_priv *hpriv;
707 unsigned int board_idx = (unsigned int)ent->driver_data; 1476 unsigned int board_idx = (unsigned int)ent->driver_data;
708 void __iomem *mmio_base; 1477 void __iomem *mmio_base;
709 int pci_dev_busy = 0; 1478 int pci_dev_busy = 0, rc;
710 int rc;
711 1479
712 if (!printed_version++) { 1480 if (!printed_version++) {
713 printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n"); 1481 printk(KERN_INFO DRV_NAME " version " DRV_VERSION "\n");
714 } 1482 }
715 1483
716 VPRINTK("ENTER for PCI Bus:Slot.Func=%u:%u.%u\n", pdev->bus->number,
717 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
718
719 rc = pci_enable_device(pdev); 1484 rc = pci_enable_device(pdev);
720 if (rc) { 1485 if (rc) {
721 return rc; 1486 return rc;
@@ -727,8 +1492,6 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
727 goto err_out; 1492 goto err_out;
728 } 1493 }
729 1494
730 pci_intx(pdev, 1);
731
732 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); 1495 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
733 if (probe_ent == NULL) { 1496 if (probe_ent == NULL) {
734 rc = -ENOMEM; 1497 rc = -ENOMEM;
@@ -739,8 +1502,7 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
739 probe_ent->dev = pci_dev_to_dev(pdev); 1502 probe_ent->dev = pci_dev_to_dev(pdev);
740 INIT_LIST_HEAD(&probe_ent->node); 1503 INIT_LIST_HEAD(&probe_ent->node);
741 1504
742 mmio_base = ioremap_nocache(pci_resource_start(pdev, MV_PRIMARY_BAR), 1505 mmio_base = pci_iomap(pdev, MV_PRIMARY_BAR, 0);
743 pci_resource_len(pdev, MV_PRIMARY_BAR));
744 if (mmio_base == NULL) { 1506 if (mmio_base == NULL) {
745 rc = -ENOMEM; 1507 rc = -ENOMEM;
746 goto err_out_free_ent; 1508 goto err_out_free_ent;
@@ -769,37 +1531,40 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
769 if (rc) { 1531 if (rc) {
770 goto err_out_hpriv; 1532 goto err_out_hpriv;
771 } 1533 }
772/* mv_print_info(probe_ent); */
773 1534
774 { 1535 /* Enable interrupts */
775 int b, w; 1536 if (pci_enable_msi(pdev) == 0) {
776 u32 dw[4]; /* hold a line of 16b */ 1537 hpriv->hp_flags |= MV_HP_FLAG_MSI;
777 VPRINTK("PCI config space:\n"); 1538 } else {
778 for (b = 0; b < 0x40; ) { 1539 pci_intx(pdev, 1);
779 for (w = 0; w < 4; w++) {
780 (void) pci_read_config_dword(pdev,b,&dw[w]);
781 b += sizeof(*dw);
782 }
783 VPRINTK("%08x %08x %08x %08x\n",
784 dw[0],dw[1],dw[2],dw[3]);
785 }
786 } 1540 }
787 1541
788 /* FIXME: check ata_device_add return value */ 1542 mv_dump_pci_cfg(pdev, 0x68);
789 ata_device_add(probe_ent); 1543 mv_print_info(probe_ent);
790 kfree(probe_ent); 1544
1545 if (ata_device_add(probe_ent) == 0) {
1546 rc = -ENODEV; /* No devices discovered */
1547 goto err_out_dev_add;
1548 }
791 1549
1550 kfree(probe_ent);
792 return 0; 1551 return 0;
793 1552
794 err_out_hpriv: 1553err_out_dev_add:
1554 if (MV_HP_FLAG_MSI & hpriv->hp_flags) {
1555 pci_disable_msi(pdev);
1556 } else {
1557 pci_intx(pdev, 0);
1558 }
1559err_out_hpriv:
795 kfree(hpriv); 1560 kfree(hpriv);
796 err_out_iounmap: 1561err_out_iounmap:
797 iounmap(mmio_base); 1562 pci_iounmap(pdev, mmio_base);
798 err_out_free_ent: 1563err_out_free_ent:
799 kfree(probe_ent); 1564 kfree(probe_ent);
800 err_out_regions: 1565err_out_regions:
801 pci_release_regions(pdev); 1566 pci_release_regions(pdev);
802 err_out: 1567err_out:
803 if (!pci_dev_busy) { 1568 if (!pci_dev_busy) {
804 pci_disable_device(pdev); 1569 pci_disable_device(pdev);
805 } 1570 }
diff --git a/drivers/scsi/sata_nv.c b/drivers/scsi/sata_nv.c
index a1d62dee3be6..1a56d6c79ddd 100644
--- a/drivers/scsi/sata_nv.c
+++ b/drivers/scsi/sata_nv.c
@@ -29,6 +29,8 @@
29 * NV-specific details such as register offsets, SATA phy location, 29 * NV-specific details such as register offsets, SATA phy location,
30 * hotplug info, etc. 30 * hotplug info, etc.
31 * 31 *
32 * 0.09
33 * - Fixed bug introduced by 0.08's MCP51 and MCP55 support.
32 * 34 *
33 * 0.08 35 * 0.08
34 * - Added support for MCP51 and MCP55. 36 * - Added support for MCP51 and MCP55.
@@ -132,9 +134,7 @@ enum nv_host_type
132 GENERIC, 134 GENERIC,
133 NFORCE2, 135 NFORCE2,
134 NFORCE3, 136 NFORCE3,
135 CK804, 137 CK804
136 MCP51,
137 MCP55
138}; 138};
139 139
140static struct pci_device_id nv_pci_tbl[] = { 140static struct pci_device_id nv_pci_tbl[] = {
@@ -153,11 +153,13 @@ static struct pci_device_id nv_pci_tbl[] = {
153 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, 153 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2,
154 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, 154 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
155 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA, 155 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA,
156 PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 }, 156 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
157 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2, 157 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2,
158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 }, 158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
159 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA, 159 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA,
160 PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP55 }, 160 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
161 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2,
162 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
161 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, 163 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
162 PCI_ANY_ID, PCI_ANY_ID, 164 PCI_ANY_ID, PCI_ANY_ID,
163 PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC }, 165 PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },
@@ -236,7 +238,7 @@ static Scsi_Host_Template nv_sht = {
236 .ordered_flush = 1, 238 .ordered_flush = 1,
237}; 239};
238 240
239static struct ata_port_operations nv_ops = { 241static const struct ata_port_operations nv_ops = {
240 .port_disable = ata_port_disable, 242 .port_disable = ata_port_disable,
241 .tf_load = ata_tf_load, 243 .tf_load = ata_tf_load,
242 .tf_read = ata_tf_read, 244 .tf_read = ata_tf_read,
@@ -329,7 +331,7 @@ static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg)
329 return 0xffffffffU; 331 return 0xffffffffU;
330 332
331 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) 333 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
332 return readl((void*)ap->ioaddr.scr_addr + (sc_reg * 4)); 334 return readl((void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4));
333 else 335 else
334 return inl(ap->ioaddr.scr_addr + (sc_reg * 4)); 336 return inl(ap->ioaddr.scr_addr + (sc_reg * 4));
335} 337}
@@ -343,7 +345,7 @@ static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
343 return; 345 return;
344 346
345 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) 347 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
346 writel(val, (void*)ap->ioaddr.scr_addr + (sc_reg * 4)); 348 writel(val, (void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4));
347 else 349 else
348 outl(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 350 outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
349} 351}
@@ -403,7 +405,7 @@ static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
403 rc = -ENOMEM; 405 rc = -ENOMEM;
404 406
405 ppi = &nv_port_info; 407 ppi = &nv_port_info;
406 probe_ent = ata_pci_init_native_mode(pdev, &ppi); 408 probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
407 if (!probe_ent) 409 if (!probe_ent)
408 goto err_out_regions; 410 goto err_out_regions;
409 411
diff --git a/drivers/scsi/sata_promise.c b/drivers/scsi/sata_promise.c
index 538ad727bd2e..eee93b0016df 100644
--- a/drivers/scsi/sata_promise.c
+++ b/drivers/scsi/sata_promise.c
@@ -87,8 +87,8 @@ static void pdc_port_stop(struct ata_port *ap);
87static void pdc_pata_phy_reset(struct ata_port *ap); 87static void pdc_pata_phy_reset(struct ata_port *ap);
88static void pdc_sata_phy_reset(struct ata_port *ap); 88static void pdc_sata_phy_reset(struct ata_port *ap);
89static void pdc_qc_prep(struct ata_queued_cmd *qc); 89static void pdc_qc_prep(struct ata_queued_cmd *qc);
90static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf); 90static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
91static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf); 91static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
92static void pdc_irq_clear(struct ata_port *ap); 92static void pdc_irq_clear(struct ata_port *ap);
93static int pdc_qc_issue_prot(struct ata_queued_cmd *qc); 93static int pdc_qc_issue_prot(struct ata_queued_cmd *qc);
94 94
@@ -113,7 +113,7 @@ static Scsi_Host_Template pdc_ata_sht = {
113 .ordered_flush = 1, 113 .ordered_flush = 1,
114}; 114};
115 115
116static struct ata_port_operations pdc_sata_ops = { 116static const struct ata_port_operations pdc_sata_ops = {
117 .port_disable = ata_port_disable, 117 .port_disable = ata_port_disable,
118 .tf_load = pdc_tf_load_mmio, 118 .tf_load = pdc_tf_load_mmio,
119 .tf_read = ata_tf_read, 119 .tf_read = ata_tf_read,
@@ -136,7 +136,7 @@ static struct ata_port_operations pdc_sata_ops = {
136 .host_stop = ata_pci_host_stop, 136 .host_stop = ata_pci_host_stop,
137}; 137};
138 138
139static struct ata_port_operations pdc_pata_ops = { 139static const struct ata_port_operations pdc_pata_ops = {
140 .port_disable = ata_port_disable, 140 .port_disable = ata_port_disable,
141 .tf_load = pdc_tf_load_mmio, 141 .tf_load = pdc_tf_load_mmio,
142 .tf_read = ata_tf_read, 142 .tf_read = ata_tf_read,
@@ -324,7 +324,7 @@ static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
324{ 324{
325 if (sc_reg > SCR_CONTROL) 325 if (sc_reg > SCR_CONTROL)
326 return 0xffffffffU; 326 return 0xffffffffU;
327 return readl((void *) ap->ioaddr.scr_addr + (sc_reg * 4)); 327 return readl((void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
328} 328}
329 329
330 330
@@ -333,7 +333,7 @@ static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
333{ 333{
334 if (sc_reg > SCR_CONTROL) 334 if (sc_reg > SCR_CONTROL)
335 return; 335 return;
336 writel(val, (void *) ap->ioaddr.scr_addr + (sc_reg * 4)); 336 writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
337} 337}
338 338
339static void pdc_qc_prep(struct ata_queued_cmd *qc) 339static void pdc_qc_prep(struct ata_queued_cmd *qc)
@@ -438,11 +438,11 @@ static inline unsigned int pdc_host_intr( struct ata_port *ap,
438 break; 438 break;
439 439
440 default: 440 default:
441 ap->stats.idle_irq++; 441 ap->stats.idle_irq++;
442 break; 442 break;
443 } 443 }
444 444
445 return handled; 445 return handled;
446} 446}
447 447
448static void pdc_irq_clear(struct ata_port *ap) 448static void pdc_irq_clear(struct ata_port *ap)
@@ -523,8 +523,8 @@ static inline void pdc_packet_start(struct ata_queued_cmd *qc)
523 523
524 pp->pkt[2] = seq; 524 pp->pkt[2] = seq;
525 wmb(); /* flush PRD, pkt writes */ 525 wmb(); /* flush PRD, pkt writes */
526 writel(pp->pkt_dma, (void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); 526 writel(pp->pkt_dma, (void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
527 readl((void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */ 527 readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */
528} 528}
529 529
530static int pdc_qc_issue_prot(struct ata_queued_cmd *qc) 530static int pdc_qc_issue_prot(struct ata_queued_cmd *qc)
@@ -546,7 +546,7 @@ static int pdc_qc_issue_prot(struct ata_queued_cmd *qc)
546 return ata_qc_issue_prot(qc); 546 return ata_qc_issue_prot(qc);
547} 547}
548 548
549static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf) 549static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
550{ 550{
551 WARN_ON (tf->protocol == ATA_PROT_DMA || 551 WARN_ON (tf->protocol == ATA_PROT_DMA ||
552 tf->protocol == ATA_PROT_NODATA); 552 tf->protocol == ATA_PROT_NODATA);
@@ -554,7 +554,7 @@ static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
554} 554}
555 555
556 556
557static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf) 557static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
558{ 558{
559 WARN_ON (tf->protocol == ATA_PROT_DMA || 559 WARN_ON (tf->protocol == ATA_PROT_DMA ||
560 tf->protocol == ATA_PROT_NODATA); 560 tf->protocol == ATA_PROT_NODATA);
diff --git a/drivers/scsi/sata_qstor.c b/drivers/scsi/sata_qstor.c
index ffcdeb68641c..250dafa6bc36 100644
--- a/drivers/scsi/sata_qstor.c
+++ b/drivers/scsi/sata_qstor.c
@@ -51,8 +51,6 @@ enum {
51 QS_PRD_BYTES = QS_MAX_PRD * 16, 51 QS_PRD_BYTES = QS_MAX_PRD * 16,
52 QS_PKT_BYTES = QS_CPB_BYTES + QS_PRD_BYTES, 52 QS_PKT_BYTES = QS_CPB_BYTES + QS_PRD_BYTES,
53 53
54 QS_DMA_BOUNDARY = ~0UL,
55
56 /* global register offsets */ 54 /* global register offsets */
57 QS_HCF_CNFG3 = 0x0003, /* host configuration offset */ 55 QS_HCF_CNFG3 = 0x0003, /* host configuration offset */
58 QS_HID_HPHY = 0x0004, /* host physical interface info */ 56 QS_HID_HPHY = 0x0004, /* host physical interface info */
@@ -101,6 +99,10 @@ enum {
101 board_2068_idx = 0, /* QStor 4-port SATA/RAID */ 99 board_2068_idx = 0, /* QStor 4-port SATA/RAID */
102}; 100};
103 101
102enum {
103 QS_DMA_BOUNDARY = ~0UL
104};
105
104typedef enum { qs_state_idle, qs_state_pkt, qs_state_mmio } qs_state_t; 106typedef enum { qs_state_idle, qs_state_pkt, qs_state_mmio } qs_state_t;
105 107
106struct qs_port_priv { 108struct qs_port_priv {
@@ -145,7 +147,7 @@ static Scsi_Host_Template qs_ata_sht = {
145 .bios_param = ata_std_bios_param, 147 .bios_param = ata_std_bios_param,
146}; 148};
147 149
148static struct ata_port_operations qs_ata_ops = { 150static const struct ata_port_operations qs_ata_ops = {
149 .port_disable = ata_port_disable, 151 .port_disable = ata_port_disable,
150 .tf_load = ata_tf_load, 152 .tf_load = ata_tf_load,
151 .tf_read = ata_tf_read, 153 .tf_read = ata_tf_read,
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
index ba98a175ee3a..3a056173fb95 100644
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -150,7 +150,7 @@ static Scsi_Host_Template sil_sht = {
150 .ordered_flush = 1, 150 .ordered_flush = 1,
151}; 151};
152 152
153static struct ata_port_operations sil_ops = { 153static const struct ata_port_operations sil_ops = {
154 .port_disable = ata_port_disable, 154 .port_disable = ata_port_disable,
155 .dev_config = sil_dev_config, 155 .dev_config = sil_dev_config,
156 .tf_load = ata_tf_load, 156 .tf_load = ata_tf_load,
@@ -289,7 +289,7 @@ static inline unsigned long sil_scr_addr(struct ata_port *ap, unsigned int sc_re
289 289
290static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg) 290static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg)
291{ 291{
292 void *mmio = (void *) sil_scr_addr(ap, sc_reg); 292 void __iomem *mmio = (void __iomem *) sil_scr_addr(ap, sc_reg);
293 if (mmio) 293 if (mmio)
294 return readl(mmio); 294 return readl(mmio);
295 return 0xffffffffU; 295 return 0xffffffffU;
@@ -297,7 +297,7 @@ static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg)
297 297
298static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) 298static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
299{ 299{
300 void *mmio = (void *) sil_scr_addr(ap, sc_reg); 300 void *mmio = (void __iomem *) sil_scr_addr(ap, sc_reg);
301 if (mmio) 301 if (mmio)
302 writel(val, mmio); 302 writel(val, mmio);
303} 303}
diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c
new file mode 100644
index 000000000000..32d730bd5bb6
--- /dev/null
+++ b/drivers/scsi/sata_sil24.c
@@ -0,0 +1,875 @@
1/*
2 * sata_sil24.c - Driver for Silicon Image 3124/3132 SATA-2 controllers
3 *
4 * Copyright 2005 Tejun Heo
5 *
6 * Based on preview driver from Silicon Image.
7 *
8 * NOTE: No NCQ/ATAPI support yet. The preview driver didn't support
9 * NCQ nor ATAPI, and, unfortunately, I couldn't find out how to make
10 * those work. Enabling those shouldn't be difficult. Basic
11 * structure is all there (in libata-dev tree). If you have any
12 * information about this hardware, please contact me or linux-ide.
13 * Info is needed on...
14 *
15 * - How to issue tagged commands and turn on sactive on issue accordingly.
16 * - Where to put an ATAPI command and how to tell the device to send it.
17 * - How to enable/use 64bit.
18 *
19 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the
21 * Free Software Foundation; either version 2, or (at your option) any
22 * later version.
23 *
24 * This program is distributed in the hope that it will be useful, but
25 * WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
27 * General Public License for more details.
28 *
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/pci.h>
34#include <linux/blkdev.h>
35#include <linux/delay.h>
36#include <linux/interrupt.h>
37#include <linux/dma-mapping.h>
38#include <scsi/scsi_host.h>
39#include "scsi.h"
40#include <linux/libata.h>
41#include <asm/io.h>
42
43#define DRV_NAME "sata_sil24"
44#define DRV_VERSION "0.22" /* Silicon Image's preview driver was 0.10 */
45
46/*
47 * Port request block (PRB) 32 bytes
48 */
49struct sil24_prb {
50 u16 ctrl;
51 u16 prot;
52 u32 rx_cnt;
53 u8 fis[6 * 4];
54};
55
56/*
57 * Scatter gather entry (SGE) 16 bytes
58 */
59struct sil24_sge {
60 u64 addr;
61 u32 cnt;
62 u32 flags;
63};
64
65/*
66 * Port multiplier
67 */
68struct sil24_port_multiplier {
69 u32 diag;
70 u32 sactive;
71};
72
73enum {
74 /*
75 * Global controller registers (128 bytes @ BAR0)
76 */
77 /* 32 bit regs */
78 HOST_SLOT_STAT = 0x00, /* 32 bit slot stat * 4 */
79 HOST_CTRL = 0x40,
80 HOST_IRQ_STAT = 0x44,
81 HOST_PHY_CFG = 0x48,
82 HOST_BIST_CTRL = 0x50,
83 HOST_BIST_PTRN = 0x54,
84 HOST_BIST_STAT = 0x58,
85 HOST_MEM_BIST_STAT = 0x5c,
86 HOST_FLASH_CMD = 0x70,
87 /* 8 bit regs */
88 HOST_FLASH_DATA = 0x74,
89 HOST_TRANSITION_DETECT = 0x75,
90 HOST_GPIO_CTRL = 0x76,
91 HOST_I2C_ADDR = 0x78, /* 32 bit */
92 HOST_I2C_DATA = 0x7c,
93 HOST_I2C_XFER_CNT = 0x7e,
94 HOST_I2C_CTRL = 0x7f,
95
96 /* HOST_SLOT_STAT bits */
97 HOST_SSTAT_ATTN = (1 << 31),
98
99 /*
100 * Port registers
101 * (8192 bytes @ +0x0000, +0x2000, +0x4000 and +0x6000 @ BAR2)
102 */
103 PORT_REGS_SIZE = 0x2000,
104 PORT_PRB = 0x0000, /* (32 bytes PRB + 16 bytes SGEs * 6) * 31 (3968 bytes) */
105
106 PORT_PM = 0x0f80, /* 8 bytes PM * 16 (128 bytes) */
107 /* 32 bit regs */
108 PORT_CTRL_STAT = 0x1000, /* write: ctrl-set, read: stat */
109 PORT_CTRL_CLR = 0x1004, /* write: ctrl-clear */
110 PORT_IRQ_STAT = 0x1008, /* high: status, low: interrupt */
111 PORT_IRQ_ENABLE_SET = 0x1010, /* write: enable-set */
112 PORT_IRQ_ENABLE_CLR = 0x1014, /* write: enable-clear */
113 PORT_ACTIVATE_UPPER_ADDR= 0x101c,
114 PORT_EXEC_FIFO = 0x1020, /* command execution fifo */
115 PORT_CMD_ERR = 0x1024, /* command error number */
116 PORT_FIS_CFG = 0x1028,
117 PORT_FIFO_THRES = 0x102c,
118 /* 16 bit regs */
119 PORT_DECODE_ERR_CNT = 0x1040,
120 PORT_DECODE_ERR_THRESH = 0x1042,
121 PORT_CRC_ERR_CNT = 0x1044,
122 PORT_CRC_ERR_THRESH = 0x1046,
123 PORT_HSHK_ERR_CNT = 0x1048,
124 PORT_HSHK_ERR_THRESH = 0x104a,
125 /* 32 bit regs */
126 PORT_PHY_CFG = 0x1050,
127 PORT_SLOT_STAT = 0x1800,
128 PORT_CMD_ACTIVATE = 0x1c00, /* 64 bit cmd activate * 31 (248 bytes) */
129 PORT_EXEC_DIAG = 0x1e00, /* 32bit exec diag * 16 (64 bytes, 0-10 used on 3124) */
130 PORT_PSD_DIAG = 0x1e40, /* 32bit psd diag * 16 (64 bytes, 0-8 used on 3124) */
131 PORT_SCONTROL = 0x1f00,
132 PORT_SSTATUS = 0x1f04,
133 PORT_SERROR = 0x1f08,
134 PORT_SACTIVE = 0x1f0c,
135
136 /* PORT_CTRL_STAT bits */
137 PORT_CS_PORT_RST = (1 << 0), /* port reset */
138 PORT_CS_DEV_RST = (1 << 1), /* device reset */
139 PORT_CS_INIT = (1 << 2), /* port initialize */
140 PORT_CS_IRQ_WOC = (1 << 3), /* interrupt write one to clear */
141 PORT_CS_RESUME = (1 << 6), /* port resume */
142 PORT_CS_32BIT_ACTV = (1 << 10), /* 32-bit activation */
143 PORT_CS_PM_EN = (1 << 13), /* port multiplier enable */
144 PORT_CS_RDY = (1 << 31), /* port ready to accept commands */
145
146 /* PORT_IRQ_STAT/ENABLE_SET/CLR */
147 /* bits[11:0] are masked */
148 PORT_IRQ_COMPLETE = (1 << 0), /* command(s) completed */
149 PORT_IRQ_ERROR = (1 << 1), /* command execution error */
150 PORT_IRQ_PORTRDY_CHG = (1 << 2), /* port ready change */
151 PORT_IRQ_PWR_CHG = (1 << 3), /* power management change */
152 PORT_IRQ_PHYRDY_CHG = (1 << 4), /* PHY ready change */
153 PORT_IRQ_COMWAKE = (1 << 5), /* COMWAKE received */
154 PORT_IRQ_UNK_FIS = (1 << 6), /* Unknown FIS received */
155 PORT_IRQ_SDB_FIS = (1 << 11), /* SDB FIS received */
156
157 /* bits[27:16] are unmasked (raw) */
158 PORT_IRQ_RAW_SHIFT = 16,
159 PORT_IRQ_MASKED_MASK = 0x7ff,
160 PORT_IRQ_RAW_MASK = (0x7ff << PORT_IRQ_RAW_SHIFT),
161
162 /* ENABLE_SET/CLR specific, intr steering - 2 bit field */
163 PORT_IRQ_STEER_SHIFT = 30,
164 PORT_IRQ_STEER_MASK = (3 << PORT_IRQ_STEER_SHIFT),
165
166 /* PORT_CMD_ERR constants */
167 PORT_CERR_DEV = 1, /* Error bit in D2H Register FIS */
168 PORT_CERR_SDB = 2, /* Error bit in SDB FIS */
169 PORT_CERR_DATA = 3, /* Error in data FIS not detected by dev */
170 PORT_CERR_SEND = 4, /* Initial cmd FIS transmission failure */
171 PORT_CERR_INCONSISTENT = 5, /* Protocol mismatch */
172 PORT_CERR_DIRECTION = 6, /* Data direction mismatch */
173 PORT_CERR_UNDERRUN = 7, /* Ran out of SGEs while writing */
174 PORT_CERR_OVERRUN = 8, /* Ran out of SGEs while reading */
175 PORT_CERR_PKT_PROT = 11, /* DIR invalid in 1st PIO setup of ATAPI */
176 PORT_CERR_SGT_BOUNDARY = 16, /* PLD ecode 00 - SGT not on qword boundary */
177 PORT_CERR_SGT_TGTABRT = 17, /* PLD ecode 01 - target abort */
178 PORT_CERR_SGT_MSTABRT = 18, /* PLD ecode 10 - master abort */
179 PORT_CERR_SGT_PCIPERR = 19, /* PLD ecode 11 - PCI parity err while fetching SGT */
180 PORT_CERR_CMD_BOUNDARY = 24, /* ctrl[15:13] 001 - PRB not on qword boundary */
181 PORT_CERR_CMD_TGTABRT = 25, /* ctrl[15:13] 010 - target abort */
182 PORT_CERR_CMD_MSTABRT = 26, /* ctrl[15:13] 100 - master abort */
183 PORT_CERR_CMD_PCIPERR = 27, /* ctrl[15:13] 110 - PCI parity err while fetching PRB */
184 PORT_CERR_XFR_UNDEF = 32, /* PSD ecode 00 - undefined */
185 PORT_CERR_XFR_TGTABRT = 33, /* PSD ecode 01 - target abort */
186 PORT_CERR_XFR_MSGABRT = 34, /* PSD ecode 10 - master abort */
187 PORT_CERR_XFR_PCIPERR = 35, /* PSD ecode 11 - PCI prity err during transfer */
188 PORT_CERR_SENDSERVICE = 36, /* FIS received while sending service */
189
190 /*
191 * Other constants
192 */
193 SGE_TRM = (1 << 31), /* Last SGE in chain */
194 PRB_SOFT_RST = (1 << 7), /* Soft reset request (ign BSY?) */
195
196 /* board id */
197 BID_SIL3124 = 0,
198 BID_SIL3132 = 1,
199 BID_SIL3131 = 2,
200
201 IRQ_STAT_4PORTS = 0xf,
202};
203
204struct sil24_cmd_block {
205 struct sil24_prb prb;
206 struct sil24_sge sge[LIBATA_MAX_PRD];
207};
208
209/*
210 * ap->private_data
211 *
212 * The preview driver always returned 0 for status. We emulate it
213 * here from the previous interrupt.
214 */
215struct sil24_port_priv {
216 struct sil24_cmd_block *cmd_block; /* 32 cmd blocks */
217 dma_addr_t cmd_block_dma; /* DMA base addr for them */
218 struct ata_taskfile tf; /* Cached taskfile registers */
219};
220
221/* ap->host_set->private_data */
222struct sil24_host_priv {
223 void *host_base; /* global controller control (128 bytes @BAR0) */
224 void *port_base; /* port registers (4 * 8192 bytes @BAR2) */
225};
226
227static u8 sil24_check_status(struct ata_port *ap);
228static u8 sil24_check_err(struct ata_port *ap);
229static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg);
230static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val);
231static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
232static void sil24_phy_reset(struct ata_port *ap);
233static void sil24_qc_prep(struct ata_queued_cmd *qc);
234static int sil24_qc_issue(struct ata_queued_cmd *qc);
235static void sil24_irq_clear(struct ata_port *ap);
236static void sil24_eng_timeout(struct ata_port *ap);
237static irqreturn_t sil24_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
238static int sil24_port_start(struct ata_port *ap);
239static void sil24_port_stop(struct ata_port *ap);
240static void sil24_host_stop(struct ata_host_set *host_set);
241static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
242
243static struct pci_device_id sil24_pci_tbl[] = {
244 { 0x1095, 0x3124, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BID_SIL3124 },
245 { 0x1095, 0x3132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BID_SIL3132 },
246 { 0x1095, 0x3131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BID_SIL3131 },
247 { 0x1095, 0x3531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BID_SIL3131 },
248 { } /* terminate list */
249};
250
251static struct pci_driver sil24_pci_driver = {
252 .name = DRV_NAME,
253 .id_table = sil24_pci_tbl,
254 .probe = sil24_init_one,
255 .remove = ata_pci_remove_one, /* safe? */
256};
257
258static Scsi_Host_Template sil24_sht = {
259 .module = THIS_MODULE,
260 .name = DRV_NAME,
261 .ioctl = ata_scsi_ioctl,
262 .queuecommand = ata_scsi_queuecmd,
263 .eh_strategy_handler = ata_scsi_error,
264 .can_queue = ATA_DEF_QUEUE,
265 .this_id = ATA_SHT_THIS_ID,
266 .sg_tablesize = LIBATA_MAX_PRD,
267 .max_sectors = ATA_MAX_SECTORS,
268 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
269 .emulated = ATA_SHT_EMULATED,
270 .use_clustering = ATA_SHT_USE_CLUSTERING,
271 .proc_name = DRV_NAME,
272 .dma_boundary = ATA_DMA_BOUNDARY,
273 .slave_configure = ata_scsi_slave_config,
274 .bios_param = ata_std_bios_param,
275 .ordered_flush = 1, /* NCQ not supported yet */
276};
277
278static const struct ata_port_operations sil24_ops = {
279 .port_disable = ata_port_disable,
280
281 .check_status = sil24_check_status,
282 .check_altstatus = sil24_check_status,
283 .check_err = sil24_check_err,
284 .dev_select = ata_noop_dev_select,
285
286 .tf_read = sil24_tf_read,
287
288 .phy_reset = sil24_phy_reset,
289
290 .qc_prep = sil24_qc_prep,
291 .qc_issue = sil24_qc_issue,
292
293 .eng_timeout = sil24_eng_timeout,
294
295 .irq_handler = sil24_interrupt,
296 .irq_clear = sil24_irq_clear,
297
298 .scr_read = sil24_scr_read,
299 .scr_write = sil24_scr_write,
300
301 .port_start = sil24_port_start,
302 .port_stop = sil24_port_stop,
303 .host_stop = sil24_host_stop,
304};
305
306/*
307 * Use bits 30-31 of host_flags to encode available port numbers.
308 * Current maxium is 4.
309 */
310#define SIL24_NPORTS2FLAG(nports) ((((unsigned)(nports) - 1) & 0x3) << 30)
311#define SIL24_FLAG2NPORTS(flag) ((((flag) >> 30) & 0x3) + 1)
312
313static struct ata_port_info sil24_port_info[] = {
314 /* sil_3124 */
315 {
316 .sht = &sil24_sht,
317 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
318 ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO |
319 ATA_FLAG_PIO_DMA | SIL24_NPORTS2FLAG(4),
320 .pio_mask = 0x1f, /* pio0-4 */
321 .mwdma_mask = 0x07, /* mwdma0-2 */
322 .udma_mask = 0x3f, /* udma0-5 */
323 .port_ops = &sil24_ops,
324 },
325 /* sil_3132 */
326 {
327 .sht = &sil24_sht,
328 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
329 ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO |
330 ATA_FLAG_PIO_DMA | SIL24_NPORTS2FLAG(2),
331 .pio_mask = 0x1f, /* pio0-4 */
332 .mwdma_mask = 0x07, /* mwdma0-2 */
333 .udma_mask = 0x3f, /* udma0-5 */
334 .port_ops = &sil24_ops,
335 },
336 /* sil_3131/sil_3531 */
337 {
338 .sht = &sil24_sht,
339 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
340 ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO |
341 ATA_FLAG_PIO_DMA | SIL24_NPORTS2FLAG(1),
342 .pio_mask = 0x1f, /* pio0-4 */
343 .mwdma_mask = 0x07, /* mwdma0-2 */
344 .udma_mask = 0x3f, /* udma0-5 */
345 .port_ops = &sil24_ops,
346 },
347};
348
349static inline void sil24_update_tf(struct ata_port *ap)
350{
351 struct sil24_port_priv *pp = ap->private_data;
352 void *port = (void *)ap->ioaddr.cmd_addr;
353 struct sil24_prb *prb = port;
354
355 ata_tf_from_fis(prb->fis, &pp->tf);
356}
357
358static u8 sil24_check_status(struct ata_port *ap)
359{
360 struct sil24_port_priv *pp = ap->private_data;
361 return pp->tf.command;
362}
363
364static u8 sil24_check_err(struct ata_port *ap)
365{
366 struct sil24_port_priv *pp = ap->private_data;
367 return pp->tf.feature;
368}
369
370static int sil24_scr_map[] = {
371 [SCR_CONTROL] = 0,
372 [SCR_STATUS] = 1,
373 [SCR_ERROR] = 2,
374 [SCR_ACTIVE] = 3,
375};
376
377static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg)
378{
379 void *scr_addr = (void *)ap->ioaddr.scr_addr;
380 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) {
381 void *addr;
382 addr = scr_addr + sil24_scr_map[sc_reg] * 4;
383 return readl(scr_addr + sil24_scr_map[sc_reg] * 4);
384 }
385 return 0xffffffffU;
386}
387
388static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val)
389{
390 void *scr_addr = (void *)ap->ioaddr.scr_addr;
391 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) {
392 void *addr;
393 addr = scr_addr + sil24_scr_map[sc_reg] * 4;
394 writel(val, scr_addr + sil24_scr_map[sc_reg] * 4);
395 }
396}
397
398static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
399{
400 struct sil24_port_priv *pp = ap->private_data;
401 *tf = pp->tf;
402}
403
404static void sil24_phy_reset(struct ata_port *ap)
405{
406 __sata_phy_reset(ap);
407 /*
408 * No ATAPI yet. Just unconditionally indicate ATA device.
409 * If ATAPI device is attached, it will fail ATA_CMD_ID_ATA
410 * and libata core will ignore the device.
411 */
412 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
413 ap->device[0].class = ATA_DEV_ATA;
414}
415
416static inline void sil24_fill_sg(struct ata_queued_cmd *qc,
417 struct sil24_cmd_block *cb)
418{
419 struct scatterlist *sg = qc->sg;
420 struct sil24_sge *sge = cb->sge;
421 unsigned i;
422
423 for (i = 0; i < qc->n_elem; i++, sg++, sge++) {
424 sge->addr = cpu_to_le64(sg_dma_address(sg));
425 sge->cnt = cpu_to_le32(sg_dma_len(sg));
426 sge->flags = 0;
427 sge->flags = i < qc->n_elem - 1 ? 0 : cpu_to_le32(SGE_TRM);
428 }
429}
430
431static void sil24_qc_prep(struct ata_queued_cmd *qc)
432{
433 struct ata_port *ap = qc->ap;
434 struct sil24_port_priv *pp = ap->private_data;
435 struct sil24_cmd_block *cb = pp->cmd_block + qc->tag;
436 struct sil24_prb *prb = &cb->prb;
437
438 switch (qc->tf.protocol) {
439 case ATA_PROT_PIO:
440 case ATA_PROT_DMA:
441 case ATA_PROT_NODATA:
442 break;
443 default:
444 /* ATAPI isn't supported yet */
445 BUG();
446 }
447
448 ata_tf_to_fis(&qc->tf, prb->fis, 0);
449
450 if (qc->flags & ATA_QCFLAG_DMAMAP)
451 sil24_fill_sg(qc, cb);
452}
453
454static int sil24_qc_issue(struct ata_queued_cmd *qc)
455{
456 struct ata_port *ap = qc->ap;
457 void *port = (void *)ap->ioaddr.cmd_addr;
458 struct sil24_port_priv *pp = ap->private_data;
459 dma_addr_t paddr = pp->cmd_block_dma + qc->tag * sizeof(*pp->cmd_block);
460
461 writel((u32)paddr, port + PORT_CMD_ACTIVATE);
462 return 0;
463}
464
465static void sil24_irq_clear(struct ata_port *ap)
466{
467 /* unused */
468}
469
470static int __sil24_reset_controller(void *port)
471{
472 int cnt;
473 u32 tmp;
474
475 /* Reset controller state. Is this correct? */
476 writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT);
477 readl(port + PORT_CTRL_STAT); /* sync */
478
479 /* Max ~100ms */
480 for (cnt = 0; cnt < 1000; cnt++) {
481 udelay(100);
482 tmp = readl(port + PORT_CTRL_STAT);
483 if (!(tmp & PORT_CS_DEV_RST))
484 break;
485 }
486
487 if (tmp & PORT_CS_DEV_RST)
488 return -1;
489 return 0;
490}
491
492static void sil24_reset_controller(struct ata_port *ap)
493{
494 printk(KERN_NOTICE DRV_NAME
495 " ata%u: resetting controller...\n", ap->id);
496 if (__sil24_reset_controller((void *)ap->ioaddr.cmd_addr))
497 printk(KERN_ERR DRV_NAME
498 " ata%u: failed to reset controller\n", ap->id);
499}
500
501static void sil24_eng_timeout(struct ata_port *ap)
502{
503 struct ata_queued_cmd *qc;
504
505 qc = ata_qc_from_tag(ap, ap->active_tag);
506 if (!qc) {
507 printk(KERN_ERR "ata%u: BUG: tiemout without command\n",
508 ap->id);
509 return;
510 }
511
512 /*
513 * hack alert! We cannot use the supplied completion
514 * function from inside the ->eh_strategy_handler() thread.
515 * libata is the only user of ->eh_strategy_handler() in
516 * any kernel, so the default scsi_done() assumes it is
517 * not being called from the SCSI EH.
518 */
519 printk(KERN_ERR "ata%u: command timeout\n", ap->id);
520 qc->scsidone = scsi_finish_command;
521 ata_qc_complete(qc, ATA_ERR);
522
523 sil24_reset_controller(ap);
524}
525
526static void sil24_error_intr(struct ata_port *ap, u32 slot_stat)
527{
528 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag);
529 struct sil24_port_priv *pp = ap->private_data;
530 void *port = (void *)ap->ioaddr.cmd_addr;
531 u32 irq_stat, cmd_err, sstatus, serror;
532
533 irq_stat = readl(port + PORT_IRQ_STAT);
534 writel(irq_stat, port + PORT_IRQ_STAT); /* clear irq */
535
536 if (!(irq_stat & PORT_IRQ_ERROR)) {
537 /* ignore non-completion, non-error irqs for now */
538 printk(KERN_WARNING DRV_NAME
539 "ata%u: non-error exception irq (irq_stat %x)\n",
540 ap->id, irq_stat);
541 return;
542 }
543
544 cmd_err = readl(port + PORT_CMD_ERR);
545 sstatus = readl(port + PORT_SSTATUS);
546 serror = readl(port + PORT_SERROR);
547 if (serror)
548 writel(serror, port + PORT_SERROR);
549
550 printk(KERN_ERR DRV_NAME " ata%u: error interrupt on port%d\n"
551 " stat=0x%x irq=0x%x cmd_err=%d sstatus=0x%x serror=0x%x\n",
552 ap->id, ap->port_no, slot_stat, irq_stat, cmd_err, sstatus, serror);
553
554 if (cmd_err == PORT_CERR_DEV || cmd_err == PORT_CERR_SDB) {
555 /*
556 * Device is reporting error, tf registers are valid.
557 */
558 sil24_update_tf(ap);
559 } else {
560 /*
561 * Other errors. libata currently doesn't have any
562 * mechanism to report these errors. Just turn on
563 * ATA_ERR.
564 */
565 pp->tf.command = ATA_ERR;
566 }
567
568 if (qc)
569 ata_qc_complete(qc, pp->tf.command);
570
571 sil24_reset_controller(ap);
572}
573
574static inline void sil24_host_intr(struct ata_port *ap)
575{
576 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag);
577 void *port = (void *)ap->ioaddr.cmd_addr;
578 u32 slot_stat;
579
580 slot_stat = readl(port + PORT_SLOT_STAT);
581 if (!(slot_stat & HOST_SSTAT_ATTN)) {
582 struct sil24_port_priv *pp = ap->private_data;
583 /*
584 * !HOST_SSAT_ATTN guarantees successful completion,
585 * so reading back tf registers is unnecessary for
586 * most commands. TODO: read tf registers for
587 * commands which require these values on successful
588 * completion (EXECUTE DEVICE DIAGNOSTIC, CHECK POWER,
589 * DEVICE RESET and READ PORT MULTIPLIER (any more?).
590 */
591 sil24_update_tf(ap);
592
593 if (qc)
594 ata_qc_complete(qc, pp->tf.command);
595 } else
596 sil24_error_intr(ap, slot_stat);
597}
598
599static irqreturn_t sil24_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
600{
601 struct ata_host_set *host_set = dev_instance;
602 struct sil24_host_priv *hpriv = host_set->private_data;
603 unsigned handled = 0;
604 u32 status;
605 int i;
606
607 status = readl(hpriv->host_base + HOST_IRQ_STAT);
608
609 if (status == 0xffffffff) {
610 printk(KERN_ERR DRV_NAME ": IRQ status == 0xffffffff, "
611 "PCI fault or device removal?\n");
612 goto out;
613 }
614
615 if (!(status & IRQ_STAT_4PORTS))
616 goto out;
617
618 spin_lock(&host_set->lock);
619
620 for (i = 0; i < host_set->n_ports; i++)
621 if (status & (1 << i)) {
622 struct ata_port *ap = host_set->ports[i];
623 if (ap && !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
624 sil24_host_intr(host_set->ports[i]);
625 handled++;
626 } else
627 printk(KERN_ERR DRV_NAME
628 ": interrupt from disabled port %d\n", i);
629 }
630
631 spin_unlock(&host_set->lock);
632 out:
633 return IRQ_RETVAL(handled);
634}
635
636static int sil24_port_start(struct ata_port *ap)
637{
638 struct device *dev = ap->host_set->dev;
639 struct sil24_port_priv *pp;
640 struct sil24_cmd_block *cb;
641 size_t cb_size = sizeof(*cb);
642 dma_addr_t cb_dma;
643
644 pp = kmalloc(sizeof(*pp), GFP_KERNEL);
645 if (!pp)
646 return -ENOMEM;
647 memset(pp, 0, sizeof(*pp));
648
649 pp->tf.command = ATA_DRDY;
650
651 cb = dma_alloc_coherent(dev, cb_size, &cb_dma, GFP_KERNEL);
652 if (!cb) {
653 kfree(pp);
654 return -ENOMEM;
655 }
656 memset(cb, 0, cb_size);
657
658 pp->cmd_block = cb;
659 pp->cmd_block_dma = cb_dma;
660
661 ap->private_data = pp;
662
663 return 0;
664}
665
666static void sil24_port_stop(struct ata_port *ap)
667{
668 struct device *dev = ap->host_set->dev;
669 struct sil24_port_priv *pp = ap->private_data;
670 size_t cb_size = sizeof(*pp->cmd_block);
671
672 dma_free_coherent(dev, cb_size, pp->cmd_block, pp->cmd_block_dma);
673 kfree(pp);
674}
675
676static void sil24_host_stop(struct ata_host_set *host_set)
677{
678 struct sil24_host_priv *hpriv = host_set->private_data;
679
680 iounmap(hpriv->host_base);
681 iounmap(hpriv->port_base);
682 kfree(hpriv);
683}
684
685static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
686{
687 static int printed_version = 0;
688 unsigned int board_id = (unsigned int)ent->driver_data;
689 struct ata_port_info *pinfo = &sil24_port_info[board_id];
690 struct ata_probe_ent *probe_ent = NULL;
691 struct sil24_host_priv *hpriv = NULL;
692 void *host_base = NULL, *port_base = NULL;
693 int i, rc;
694
695 if (!printed_version++)
696 printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
697
698 rc = pci_enable_device(pdev);
699 if (rc)
700 return rc;
701
702 rc = pci_request_regions(pdev, DRV_NAME);
703 if (rc)
704 goto out_disable;
705
706 rc = -ENOMEM;
707 /* ioremap mmio registers */
708 host_base = ioremap(pci_resource_start(pdev, 0),
709 pci_resource_len(pdev, 0));
710 if (!host_base)
711 goto out_free;
712 port_base = ioremap(pci_resource_start(pdev, 2),
713 pci_resource_len(pdev, 2));
714 if (!port_base)
715 goto out_free;
716
717 /* allocate & init probe_ent and hpriv */
718 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
719 if (!probe_ent)
720 goto out_free;
721
722 hpriv = kmalloc(sizeof(*hpriv), GFP_KERNEL);
723 if (!hpriv)
724 goto out_free;
725
726 memset(probe_ent, 0, sizeof(*probe_ent));
727 probe_ent->dev = pci_dev_to_dev(pdev);
728 INIT_LIST_HEAD(&probe_ent->node);
729
730 probe_ent->sht = pinfo->sht;
731 probe_ent->host_flags = pinfo->host_flags;
732 probe_ent->pio_mask = pinfo->pio_mask;
733 probe_ent->udma_mask = pinfo->udma_mask;
734 probe_ent->port_ops = pinfo->port_ops;
735 probe_ent->n_ports = SIL24_FLAG2NPORTS(pinfo->host_flags);
736
737 probe_ent->irq = pdev->irq;
738 probe_ent->irq_flags = SA_SHIRQ;
739 probe_ent->mmio_base = port_base;
740 probe_ent->private_data = hpriv;
741
742 memset(hpriv, 0, sizeof(*hpriv));
743 hpriv->host_base = host_base;
744 hpriv->port_base = port_base;
745
746 /*
747 * Configure the device
748 */
749 /*
750 * FIXME: This device is certainly 64-bit capable. We just
751 * don't know how to use it. After fixing 32bit activation in
752 * this function, enable 64bit masks here.
753 */
754 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
755 if (rc) {
756 printk(KERN_ERR DRV_NAME "(%s): 32-bit DMA enable failed\n",
757 pci_name(pdev));
758 goto out_free;
759 }
760 rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
761 if (rc) {
762 printk(KERN_ERR DRV_NAME "(%s): 32-bit consistent DMA enable failed\n",
763 pci_name(pdev));
764 goto out_free;
765 }
766
767 /* GPIO off */
768 writel(0, host_base + HOST_FLASH_CMD);
769
770 /* Mask interrupts during initialization */
771 writel(0, host_base + HOST_CTRL);
772
773 for (i = 0; i < probe_ent->n_ports; i++) {
774 void *port = port_base + i * PORT_REGS_SIZE;
775 unsigned long portu = (unsigned long)port;
776 u32 tmp;
777 int cnt;
778
779 probe_ent->port[i].cmd_addr = portu + PORT_PRB;
780 probe_ent->port[i].scr_addr = portu + PORT_SCONTROL;
781
782 ata_std_ports(&probe_ent->port[i]);
783
784 /* Initial PHY setting */
785 writel(0x20c, port + PORT_PHY_CFG);
786
787 /* Clear port RST */
788 tmp = readl(port + PORT_CTRL_STAT);
789 if (tmp & PORT_CS_PORT_RST) {
790 writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR);
791 readl(port + PORT_CTRL_STAT); /* sync */
792 for (cnt = 0; cnt < 10; cnt++) {
793 msleep(10);
794 tmp = readl(port + PORT_CTRL_STAT);
795 if (!(tmp & PORT_CS_PORT_RST))
796 break;
797 }
798 if (tmp & PORT_CS_PORT_RST)
799 printk(KERN_ERR DRV_NAME
800 "(%s): failed to clear port RST\n",
801 pci_name(pdev));
802 }
803
804 /* Zero error counters. */
805 writel(0x8000, port + PORT_DECODE_ERR_THRESH);
806 writel(0x8000, port + PORT_CRC_ERR_THRESH);
807 writel(0x8000, port + PORT_HSHK_ERR_THRESH);
808 writel(0x0000, port + PORT_DECODE_ERR_CNT);
809 writel(0x0000, port + PORT_CRC_ERR_CNT);
810 writel(0x0000, port + PORT_HSHK_ERR_CNT);
811
812 /* FIXME: 32bit activation? */
813 writel(0, port + PORT_ACTIVATE_UPPER_ADDR);
814 writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_STAT);
815
816 /* Configure interrupts */
817 writel(0xffff, port + PORT_IRQ_ENABLE_CLR);
818 writel(PORT_IRQ_COMPLETE | PORT_IRQ_ERROR | PORT_IRQ_SDB_FIS,
819 port + PORT_IRQ_ENABLE_SET);
820
821 /* Clear interrupts */
822 writel(0x0fff0fff, port + PORT_IRQ_STAT);
823 writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR);
824
825 /* Clear port multiplier enable and resume bits */
826 writel(PORT_CS_PM_EN | PORT_CS_RESUME, port + PORT_CTRL_CLR);
827
828 /* Reset itself */
829 if (__sil24_reset_controller(port))
830 printk(KERN_ERR DRV_NAME
831 "(%s): failed to reset controller\n",
832 pci_name(pdev));
833 }
834
835 /* Turn on interrupts */
836 writel(IRQ_STAT_4PORTS, host_base + HOST_CTRL);
837
838 pci_set_master(pdev);
839
840 /* FIXME: check ata_device_add return value */
841 ata_device_add(probe_ent);
842
843 kfree(probe_ent);
844 return 0;
845
846 out_free:
847 if (host_base)
848 iounmap(host_base);
849 if (port_base)
850 iounmap(port_base);
851 kfree(probe_ent);
852 kfree(hpriv);
853 pci_release_regions(pdev);
854 out_disable:
855 pci_disable_device(pdev);
856 return rc;
857}
858
859static int __init sil24_init(void)
860{
861 return pci_module_init(&sil24_pci_driver);
862}
863
864static void __exit sil24_exit(void)
865{
866 pci_unregister_driver(&sil24_pci_driver);
867}
868
869MODULE_AUTHOR("Tejun Heo");
870MODULE_DESCRIPTION("Silicon Image 3124/3132 SATA low-level driver");
871MODULE_LICENSE("GPL");
872MODULE_DEVICE_TABLE(pci, sil24_pci_tbl);
873
874module_init(sil24_init);
875module_exit(sil24_exit);
diff --git a/drivers/scsi/sata_sis.c b/drivers/scsi/sata_sis.c
index b227e51d12f4..057f7b98b6c4 100644
--- a/drivers/scsi/sata_sis.c
+++ b/drivers/scsi/sata_sis.c
@@ -102,7 +102,7 @@ static Scsi_Host_Template sis_sht = {
102 .ordered_flush = 1, 102 .ordered_flush = 1,
103}; 103};
104 104
105static struct ata_port_operations sis_ops = { 105static const struct ata_port_operations sis_ops = {
106 .port_disable = ata_port_disable, 106 .port_disable = ata_port_disable,
107 .tf_load = ata_tf_load, 107 .tf_load = ata_tf_load,
108 .tf_read = ata_tf_read, 108 .tf_read = ata_tf_read,
@@ -263,7 +263,7 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
263 goto err_out_regions; 263 goto err_out_regions;
264 264
265 ppi = &sis_port_info; 265 ppi = &sis_port_info;
266 probe_ent = ata_pci_init_native_mode(pdev, &ppi); 266 probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
267 if (!probe_ent) { 267 if (!probe_ent) {
268 rc = -ENOMEM; 268 rc = -ENOMEM;
269 goto err_out_regions; 269 goto err_out_regions;
diff --git a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c
index d89d968bedac..e0f9570bc6dd 100644
--- a/drivers/scsi/sata_svw.c
+++ b/drivers/scsi/sata_svw.c
@@ -102,7 +102,7 @@ static void k2_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
102} 102}
103 103
104 104
105static void k2_sata_tf_load(struct ata_port *ap, struct ata_taskfile *tf) 105static void k2_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
106{ 106{
107 struct ata_ioports *ioaddr = &ap->ioaddr; 107 struct ata_ioports *ioaddr = &ap->ioaddr;
108 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; 108 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
@@ -297,7 +297,7 @@ static Scsi_Host_Template k2_sata_sht = {
297}; 297};
298 298
299 299
300static struct ata_port_operations k2_sata_ops = { 300static const struct ata_port_operations k2_sata_ops = {
301 .port_disable = ata_port_disable, 301 .port_disable = ata_port_disable,
302 .tf_load = k2_sata_tf_load, 302 .tf_load = k2_sata_tf_load,
303 .tf_read = k2_sata_tf_read, 303 .tf_read = k2_sata_tf_read,
diff --git a/drivers/scsi/sata_sx4.c b/drivers/scsi/sata_sx4.c
index 540a85191172..af08f4f650c1 100644
--- a/drivers/scsi/sata_sx4.c
+++ b/drivers/scsi/sata_sx4.c
@@ -137,7 +137,7 @@ struct pdc_port_priv {
137}; 137};
138 138
139struct pdc_host_priv { 139struct pdc_host_priv {
140 void *dimm_mmio; 140 void __iomem *dimm_mmio;
141 141
142 unsigned int doing_hdma; 142 unsigned int doing_hdma;
143 unsigned int hdma_prod; 143 unsigned int hdma_prod;
@@ -157,8 +157,8 @@ static void pdc_20621_phy_reset (struct ata_port *ap);
157static int pdc_port_start(struct ata_port *ap); 157static int pdc_port_start(struct ata_port *ap);
158static void pdc_port_stop(struct ata_port *ap); 158static void pdc_port_stop(struct ata_port *ap);
159static void pdc20621_qc_prep(struct ata_queued_cmd *qc); 159static void pdc20621_qc_prep(struct ata_queued_cmd *qc);
160static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf); 160static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
161static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf); 161static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
162static void pdc20621_host_stop(struct ata_host_set *host_set); 162static void pdc20621_host_stop(struct ata_host_set *host_set);
163static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe); 163static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe);
164static int pdc20621_detect_dimm(struct ata_probe_ent *pe); 164static int pdc20621_detect_dimm(struct ata_probe_ent *pe);
@@ -196,7 +196,7 @@ static Scsi_Host_Template pdc_sata_sht = {
196 .ordered_flush = 1, 196 .ordered_flush = 1,
197}; 197};
198 198
199static struct ata_port_operations pdc_20621_ops = { 199static const struct ata_port_operations pdc_20621_ops = {
200 .port_disable = ata_port_disable, 200 .port_disable = ata_port_disable,
201 .tf_load = pdc_tf_load_mmio, 201 .tf_load = pdc_tf_load_mmio,
202 .tf_read = ata_tf_read, 202 .tf_read = ata_tf_read,
@@ -247,7 +247,7 @@ static void pdc20621_host_stop(struct ata_host_set *host_set)
247{ 247{
248 struct pci_dev *pdev = to_pci_dev(host_set->dev); 248 struct pci_dev *pdev = to_pci_dev(host_set->dev);
249 struct pdc_host_priv *hpriv = host_set->private_data; 249 struct pdc_host_priv *hpriv = host_set->private_data;
250 void *dimm_mmio = hpriv->dimm_mmio; 250 void __iomem *dimm_mmio = hpriv->dimm_mmio;
251 251
252 pci_iounmap(pdev, dimm_mmio); 252 pci_iounmap(pdev, dimm_mmio);
253 kfree(hpriv); 253 kfree(hpriv);
@@ -669,8 +669,8 @@ static void pdc20621_packet_start(struct ata_queued_cmd *qc)
669 readl(mmio + PDC_20621_SEQCTL + (seq * 4)); /* flush */ 669 readl(mmio + PDC_20621_SEQCTL + (seq * 4)); /* flush */
670 670
671 writel(port_ofs + PDC_DIMM_ATA_PKT, 671 writel(port_ofs + PDC_DIMM_ATA_PKT,
672 (void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); 672 (void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
673 readl((void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); 673 readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
674 VPRINTK("submitted ofs 0x%x (%u), seq %u\n", 674 VPRINTK("submitted ofs 0x%x (%u), seq %u\n",
675 port_ofs + PDC_DIMM_ATA_PKT, 675 port_ofs + PDC_DIMM_ATA_PKT,
676 port_ofs + PDC_DIMM_ATA_PKT, 676 port_ofs + PDC_DIMM_ATA_PKT,
@@ -747,8 +747,8 @@ static inline unsigned int pdc20621_host_intr( struct ata_port *ap,
747 writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4)); 747 writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4));
748 readl(mmio + PDC_20621_SEQCTL + (seq * 4)); 748 readl(mmio + PDC_20621_SEQCTL + (seq * 4));
749 writel(port_ofs + PDC_DIMM_ATA_PKT, 749 writel(port_ofs + PDC_DIMM_ATA_PKT,
750 (void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); 750 (void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
751 readl((void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); 751 readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
752 } 752 }
753 753
754 /* step two - execute ATA command */ 754 /* step two - execute ATA command */
@@ -899,7 +899,7 @@ out:
899 DPRINTK("EXIT\n"); 899 DPRINTK("EXIT\n");
900} 900}
901 901
902static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf) 902static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
903{ 903{
904 WARN_ON (tf->protocol == ATA_PROT_DMA || 904 WARN_ON (tf->protocol == ATA_PROT_DMA ||
905 tf->protocol == ATA_PROT_NODATA); 905 tf->protocol == ATA_PROT_NODATA);
@@ -907,7 +907,7 @@ static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
907} 907}
908 908
909 909
910static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf) 910static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
911{ 911{
912 WARN_ON (tf->protocol == ATA_PROT_DMA || 912 WARN_ON (tf->protocol == ATA_PROT_DMA ||
913 tf->protocol == ATA_PROT_NODATA); 913 tf->protocol == ATA_PROT_NODATA);
@@ -1014,7 +1014,7 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
1014 idx++; 1014 idx++;
1015 dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : 1015 dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size :
1016 (long) (window_size - offset); 1016 (long) (window_size - offset);
1017 memcpy_toio((char *) (dimm_mmio + offset / 4), (char *) psource, dist); 1017 memcpy_toio(dimm_mmio + offset / 4, psource, dist);
1018 writel(0x01, mmio + PDC_GENERAL_CTLR); 1018 writel(0x01, mmio + PDC_GENERAL_CTLR);
1019 readl(mmio + PDC_GENERAL_CTLR); 1019 readl(mmio + PDC_GENERAL_CTLR);
1020 1020
@@ -1023,8 +1023,7 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
1023 for (; (long) size >= (long) window_size ;) { 1023 for (; (long) size >= (long) window_size ;) {
1024 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); 1024 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
1025 readl(mmio + PDC_DIMM_WINDOW_CTLR); 1025 readl(mmio + PDC_DIMM_WINDOW_CTLR);
1026 memcpy_toio((char *) (dimm_mmio), (char *) psource, 1026 memcpy_toio(dimm_mmio, psource, window_size / 4);
1027 window_size / 4);
1028 writel(0x01, mmio + PDC_GENERAL_CTLR); 1027 writel(0x01, mmio + PDC_GENERAL_CTLR);
1029 readl(mmio + PDC_GENERAL_CTLR); 1028 readl(mmio + PDC_GENERAL_CTLR);
1030 psource += window_size; 1029 psource += window_size;
@@ -1035,7 +1034,7 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
1035 if (size) { 1034 if (size) {
1036 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); 1035 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
1037 readl(mmio + PDC_DIMM_WINDOW_CTLR); 1036 readl(mmio + PDC_DIMM_WINDOW_CTLR);
1038 memcpy_toio((char *) (dimm_mmio), (char *) psource, size / 4); 1037 memcpy_toio(dimm_mmio, psource, size / 4);
1039 writel(0x01, mmio + PDC_GENERAL_CTLR); 1038 writel(0x01, mmio + PDC_GENERAL_CTLR);
1040 readl(mmio + PDC_GENERAL_CTLR); 1039 readl(mmio + PDC_GENERAL_CTLR);
1041 } 1040 }
diff --git a/drivers/scsi/sata_uli.c b/drivers/scsi/sata_uli.c
index 4c9fb8b71be1..d68dc7d3422c 100644
--- a/drivers/scsi/sata_uli.c
+++ b/drivers/scsi/sata_uli.c
@@ -90,7 +90,7 @@ static Scsi_Host_Template uli_sht = {
90 .ordered_flush = 1, 90 .ordered_flush = 1,
91}; 91};
92 92
93static struct ata_port_operations uli_ops = { 93static const struct ata_port_operations uli_ops = {
94 .port_disable = ata_port_disable, 94 .port_disable = ata_port_disable,
95 95
96 .tf_load = ata_tf_load, 96 .tf_load = ata_tf_load,
@@ -202,7 +202,7 @@ static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
202 goto err_out_regions; 202 goto err_out_regions;
203 203
204 ppi = &uli_port_info; 204 ppi = &uli_port_info;
205 probe_ent = ata_pci_init_native_mode(pdev, &ppi); 205 probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
206 if (!probe_ent) { 206 if (!probe_ent) {
207 rc = -ENOMEM; 207 rc = -ENOMEM;
208 goto err_out_regions; 208 goto err_out_regions;
diff --git a/drivers/scsi/sata_via.c b/drivers/scsi/sata_via.c
index 128b996b07b7..80e291a909a9 100644
--- a/drivers/scsi/sata_via.c
+++ b/drivers/scsi/sata_via.c
@@ -109,7 +109,7 @@ static Scsi_Host_Template svia_sht = {
109 .ordered_flush = 1, 109 .ordered_flush = 1,
110}; 110};
111 111
112static struct ata_port_operations svia_sata_ops = { 112static const struct ata_port_operations svia_sata_ops = {
113 .port_disable = ata_port_disable, 113 .port_disable = ata_port_disable,
114 114
115 .tf_load = ata_tf_load, 115 .tf_load = ata_tf_load,
@@ -212,7 +212,7 @@ static struct ata_probe_ent *vt6420_init_probe_ent(struct pci_dev *pdev)
212 struct ata_probe_ent *probe_ent; 212 struct ata_probe_ent *probe_ent;
213 struct ata_port_info *ppi = &svia_port_info; 213 struct ata_port_info *ppi = &svia_port_info;
214 214
215 probe_ent = ata_pci_init_native_mode(pdev, &ppi); 215 probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
216 if (!probe_ent) 216 if (!probe_ent)
217 return NULL; 217 return NULL;
218 218
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
index cf94e0158a8d..5af05fdf8544 100644
--- a/drivers/scsi/sata_vsc.c
+++ b/drivers/scsi/sata_vsc.c
@@ -86,7 +86,7 @@ static u32 vsc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
86{ 86{
87 if (sc_reg > SCR_CONTROL) 87 if (sc_reg > SCR_CONTROL)
88 return 0xffffffffU; 88 return 0xffffffffU;
89 return readl((void *) ap->ioaddr.scr_addr + (sc_reg * 4)); 89 return readl((void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
90} 90}
91 91
92 92
@@ -95,16 +95,16 @@ static void vsc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
95{ 95{
96 if (sc_reg > SCR_CONTROL) 96 if (sc_reg > SCR_CONTROL)
97 return; 97 return;
98 writel(val, (void *) ap->ioaddr.scr_addr + (sc_reg * 4)); 98 writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
99} 99}
100 100
101 101
102static void vsc_intr_mask_update(struct ata_port *ap, u8 ctl) 102static void vsc_intr_mask_update(struct ata_port *ap, u8 ctl)
103{ 103{
104 unsigned long mask_addr; 104 void __iomem *mask_addr;
105 u8 mask; 105 u8 mask;
106 106
107 mask_addr = (unsigned long) ap->host_set->mmio_base + 107 mask_addr = ap->host_set->mmio_base +
108 VSC_SATA_INT_MASK_OFFSET + ap->port_no; 108 VSC_SATA_INT_MASK_OFFSET + ap->port_no;
109 mask = readb(mask_addr); 109 mask = readb(mask_addr);
110 if (ctl & ATA_NIEN) 110 if (ctl & ATA_NIEN)
@@ -115,7 +115,7 @@ static void vsc_intr_mask_update(struct ata_port *ap, u8 ctl)
115} 115}
116 116
117 117
118static void vsc_sata_tf_load(struct ata_port *ap, struct ata_taskfile *tf) 118static void vsc_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
119{ 119{
120 struct ata_ioports *ioaddr = &ap->ioaddr; 120 struct ata_ioports *ioaddr = &ap->ioaddr;
121 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; 121 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
@@ -231,7 +231,7 @@ static Scsi_Host_Template vsc_sata_sht = {
231}; 231};
232 232
233 233
234static struct ata_port_operations vsc_sata_ops = { 234static const struct ata_port_operations vsc_sata_ops = {
235 .port_disable = ata_port_disable, 235 .port_disable = ata_port_disable,
236 .tf_load = vsc_sata_tf_load, 236 .tf_load = vsc_sata_tf_load,
237 .tf_read = vsc_sata_tf_read, 237 .tf_read = vsc_sata_tf_read,
@@ -283,7 +283,7 @@ static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_d
283 struct ata_probe_ent *probe_ent = NULL; 283 struct ata_probe_ent *probe_ent = NULL;
284 unsigned long base; 284 unsigned long base;
285 int pci_dev_busy = 0; 285 int pci_dev_busy = 0;
286 void *mmio_base; 286 void __iomem *mmio_base;
287 int rc; 287 int rc;
288 288
289 if (!printed_version++) 289 if (!printed_version++)
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 1f0ebabf6d47..a5711d545d71 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -130,7 +130,7 @@ EXPORT_SYMBOL(scsi_device_types);
130 * Returns: Pointer to request block. 130 * Returns: Pointer to request block.
131 */ 131 */
132struct scsi_request *scsi_allocate_request(struct scsi_device *sdev, 132struct scsi_request *scsi_allocate_request(struct scsi_device *sdev,
133 int gfp_mask) 133 gfp_t gfp_mask)
134{ 134{
135 const int offset = ALIGN(sizeof(struct scsi_request), 4); 135 const int offset = ALIGN(sizeof(struct scsi_request), 4);
136 const int size = offset + sizeof(struct request); 136 const int size = offset + sizeof(struct request);
@@ -196,7 +196,7 @@ struct scsi_host_cmd_pool {
196 unsigned int users; 196 unsigned int users;
197 char *name; 197 char *name;
198 unsigned int slab_flags; 198 unsigned int slab_flags;
199 unsigned int gfp_mask; 199 gfp_t gfp_mask;
200}; 200};
201 201
202static struct scsi_host_cmd_pool scsi_cmd_pool = { 202static struct scsi_host_cmd_pool scsi_cmd_pool = {
@@ -213,7 +213,7 @@ static struct scsi_host_cmd_pool scsi_cmd_dma_pool = {
213static DECLARE_MUTEX(host_cmd_pool_mutex); 213static DECLARE_MUTEX(host_cmd_pool_mutex);
214 214
215static struct scsi_cmnd *__scsi_get_command(struct Scsi_Host *shost, 215static struct scsi_cmnd *__scsi_get_command(struct Scsi_Host *shost,
216 int gfp_mask) 216 gfp_t gfp_mask)
217{ 217{
218 struct scsi_cmnd *cmd; 218 struct scsi_cmnd *cmd;
219 219
@@ -245,7 +245,7 @@ static struct scsi_cmnd *__scsi_get_command(struct Scsi_Host *shost,
245 * 245 *
246 * Returns: The allocated scsi command structure. 246 * Returns: The allocated scsi command structure.
247 */ 247 */
248struct scsi_cmnd *scsi_get_command(struct scsi_device *dev, int gfp_mask) 248struct scsi_cmnd *scsi_get_command(struct scsi_device *dev, gfp_t gfp_mask)
249{ 249{
250 struct scsi_cmnd *cmd; 250 struct scsi_cmnd *cmd;
251 251
diff --git a/drivers/scsi/scsi_devinfo.c b/drivers/scsi/scsi_devinfo.c
index 64fc9e21f35b..e69477d1889b 100644
--- a/drivers/scsi/scsi_devinfo.c
+++ b/drivers/scsi/scsi_devinfo.c
@@ -185,6 +185,7 @@ static struct {
185 {"PIONEER", "CD-ROM DRM-600", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, 185 {"PIONEER", "CD-ROM DRM-600", NULL, BLIST_FORCELUN | BLIST_SINGLELUN},
186 {"PIONEER", "CD-ROM DRM-602X", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, 186 {"PIONEER", "CD-ROM DRM-602X", NULL, BLIST_FORCELUN | BLIST_SINGLELUN},
187 {"PIONEER", "CD-ROM DRM-604X", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, 187 {"PIONEER", "CD-ROM DRM-604X", NULL, BLIST_FORCELUN | BLIST_SINGLELUN},
188 {"PIONEER", "CD-ROM DRM-624X", NULL, BLIST_FORCELUN | BLIST_SINGLELUN},
188 {"REGAL", "CDC-4X", NULL, BLIST_MAX5LUN | BLIST_SINGLELUN}, 189 {"REGAL", "CDC-4X", NULL, BLIST_MAX5LUN | BLIST_SINGLELUN},
189 {"SanDisk", "ImageMate CF-SD1", NULL, BLIST_FORCELUN}, 190 {"SanDisk", "ImageMate CF-SD1", NULL, BLIST_FORCELUN},
190 {"SEAGATE", "ST34555N", "0930", BLIST_NOTQ}, /* Chokes on tagged INQUIRY */ 191 {"SEAGATE", "ST34555N", "0930", BLIST_NOTQ}, /* Chokes on tagged INQUIRY */
diff --git a/drivers/scsi/scsi_error.c b/drivers/scsi/scsi_error.c
index ad5342165079..52b348c36d56 100644
--- a/drivers/scsi/scsi_error.c
+++ b/drivers/scsi/scsi_error.c
@@ -1645,6 +1645,8 @@ int scsi_error_handler(void *data)
1645 set_current_state(TASK_INTERRUPTIBLE); 1645 set_current_state(TASK_INTERRUPTIBLE);
1646 } 1646 }
1647 1647
1648 __set_current_state(TASK_RUNNING);
1649
1648 SCSI_LOG_ERROR_RECOVERY(1, printk("Error handler scsi_eh_%d" 1650 SCSI_LOG_ERROR_RECOVERY(1, printk("Error handler scsi_eh_%d"
1649 " exiting\n",shost->host_no)); 1651 " exiting\n",shost->host_no));
1650 1652
diff --git a/drivers/scsi/scsi_ioctl.c b/drivers/scsi/scsi_ioctl.c
index de7f98cc38fe..6a3f6aae8a97 100644
--- a/drivers/scsi/scsi_ioctl.c
+++ b/drivers/scsi/scsi_ioctl.c
@@ -205,7 +205,8 @@ int scsi_ioctl_send_command(struct scsi_device *sdev,
205 unsigned int inlen, outlen, cmdlen; 205 unsigned int inlen, outlen, cmdlen;
206 unsigned int needed, buf_needed; 206 unsigned int needed, buf_needed;
207 int timeout, retries, result; 207 int timeout, retries, result;
208 int data_direction, gfp_mask = GFP_KERNEL; 208 int data_direction;
209 gfp_t gfp_mask = GFP_KERNEL;
209 210
210 if (!sic) 211 if (!sic)
211 return -EINVAL; 212 return -EINVAL;
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index dc9c772bc874..3ff538809786 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -97,7 +97,6 @@ int scsi_insert_special_req(struct scsi_request *sreq, int at_head)
97} 97}
98 98
99static void scsi_run_queue(struct request_queue *q); 99static void scsi_run_queue(struct request_queue *q);
100static void scsi_release_buffers(struct scsi_cmnd *cmd);
101 100
102/* 101/*
103 * Function: scsi_unprep_request() 102 * Function: scsi_unprep_request()
@@ -678,7 +677,7 @@ static struct scsi_cmnd *scsi_end_request(struct scsi_cmnd *cmd, int uptodate,
678 return NULL; 677 return NULL;
679} 678}
680 679
681static struct scatterlist *scsi_alloc_sgtable(struct scsi_cmnd *cmd, int gfp_mask) 680static struct scatterlist *scsi_alloc_sgtable(struct scsi_cmnd *cmd, gfp_t gfp_mask)
682{ 681{
683 struct scsi_host_sg_pool *sgp; 682 struct scsi_host_sg_pool *sgp;
684 struct scatterlist *sgl; 683 struct scatterlist *sgl;
@@ -1040,8 +1039,10 @@ static int scsi_init_io(struct scsi_cmnd *cmd)
1040 * if sg table allocation fails, requeue request later. 1039 * if sg table allocation fails, requeue request later.
1041 */ 1040 */
1042 sgpnt = scsi_alloc_sgtable(cmd, GFP_ATOMIC); 1041 sgpnt = scsi_alloc_sgtable(cmd, GFP_ATOMIC);
1043 if (unlikely(!sgpnt)) 1042 if (unlikely(!sgpnt)) {
1043 scsi_unprep_request(req);
1044 return BLKPREP_DEFER; 1044 return BLKPREP_DEFER;
1045 }
1045 1046
1046 cmd->request_buffer = (char *) sgpnt; 1047 cmd->request_buffer = (char *) sgpnt;
1047 cmd->request_bufflen = req->nr_sectors << 9; 1048 cmd->request_bufflen = req->nr_sectors << 9;
@@ -1245,8 +1246,8 @@ static int scsi_prep_fn(struct request_queue *q, struct request *req)
1245 */ 1246 */
1246 ret = scsi_init_io(cmd); 1247 ret = scsi_init_io(cmd);
1247 switch(ret) { 1248 switch(ret) {
1249 /* For BLKPREP_KILL/DEFER the cmd was released */
1248 case BLKPREP_KILL: 1250 case BLKPREP_KILL:
1249 /* BLKPREP_KILL return also releases the command */
1250 goto kill; 1251 goto kill;
1251 case BLKPREP_DEFER: 1252 case BLKPREP_DEFER:
1252 goto defer; 1253 goto defer;
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c
index fcf9f6cbb142..327c5d7e5bd2 100644
--- a/drivers/scsi/scsi_scan.c
+++ b/drivers/scsi/scsi_scan.c
@@ -587,6 +587,7 @@ static int scsi_probe_lun(struct scsi_device *sdev, char *inq_result,
587 if (sdev->scsi_level >= 2 || 587 if (sdev->scsi_level >= 2 ||
588 (sdev->scsi_level == 1 && (inq_result[3] & 0x0f) == 1)) 588 (sdev->scsi_level == 1 && (inq_result[3] & 0x0f) == 1))
589 sdev->scsi_level++; 589 sdev->scsi_level++;
590 sdev->sdev_target->scsi_level = sdev->scsi_level;
590 591
591 return 0; 592 return 0;
592} 593}
@@ -771,6 +772,15 @@ static int scsi_add_lun(struct scsi_device *sdev, char *inq_result, int *bflags)
771 return SCSI_SCAN_LUN_PRESENT; 772 return SCSI_SCAN_LUN_PRESENT;
772} 773}
773 774
775static inline void scsi_destroy_sdev(struct scsi_device *sdev)
776{
777 if (sdev->host->hostt->slave_destroy)
778 sdev->host->hostt->slave_destroy(sdev);
779 transport_destroy_device(&sdev->sdev_gendev);
780 put_device(&sdev->sdev_gendev);
781}
782
783
774/** 784/**
775 * scsi_probe_and_add_lun - probe a LUN, if a LUN is found add it 785 * scsi_probe_and_add_lun - probe a LUN, if a LUN is found add it
776 * @starget: pointer to target device structure 786 * @starget: pointer to target device structure
@@ -803,9 +813,9 @@ static int scsi_probe_and_add_lun(struct scsi_target *starget,
803 * The rescan flag is used as an optimization, the first scan of a 813 * The rescan flag is used as an optimization, the first scan of a
804 * host adapter calls into here with rescan == 0. 814 * host adapter calls into here with rescan == 0.
805 */ 815 */
806 if (rescan) { 816 sdev = scsi_device_lookup_by_target(starget, lun);
807 sdev = scsi_device_lookup_by_target(starget, lun); 817 if (sdev) {
808 if (sdev) { 818 if (rescan || sdev->sdev_state != SDEV_CREATED) {
809 SCSI_LOG_SCAN_BUS(3, printk(KERN_INFO 819 SCSI_LOG_SCAN_BUS(3, printk(KERN_INFO
810 "scsi scan: device exists on %s\n", 820 "scsi scan: device exists on %s\n",
811 sdev->sdev_gendev.bus_id)); 821 sdev->sdev_gendev.bus_id));
@@ -820,9 +830,9 @@ static int scsi_probe_and_add_lun(struct scsi_target *starget,
820 sdev->model); 830 sdev->model);
821 return SCSI_SCAN_LUN_PRESENT; 831 return SCSI_SCAN_LUN_PRESENT;
822 } 832 }
823 } 833 scsi_device_put(sdev);
824 834 } else
825 sdev = scsi_alloc_sdev(starget, lun, hostdata); 835 sdev = scsi_alloc_sdev(starget, lun, hostdata);
826 if (!sdev) 836 if (!sdev)
827 goto out; 837 goto out;
828 838
@@ -877,12 +887,8 @@ static int scsi_probe_and_add_lun(struct scsi_target *starget,
877 res = SCSI_SCAN_NO_RESPONSE; 887 res = SCSI_SCAN_NO_RESPONSE;
878 } 888 }
879 } 889 }
880 } else { 890 } else
881 if (sdev->host->hostt->slave_destroy) 891 scsi_destroy_sdev(sdev);
882 sdev->host->hostt->slave_destroy(sdev);
883 transport_destroy_device(&sdev->sdev_gendev);
884 put_device(&sdev->sdev_gendev);
885 }
886 out: 892 out:
887 return res; 893 return res;
888} 894}
@@ -1054,7 +1060,7 @@ EXPORT_SYMBOL(int_to_scsilun);
1054 * 0: scan completed (or no memory, so further scanning is futile) 1060 * 0: scan completed (or no memory, so further scanning is futile)
1055 * 1: no report lun scan, or not configured 1061 * 1: no report lun scan, or not configured
1056 **/ 1062 **/
1057static int scsi_report_lun_scan(struct scsi_device *sdev, int bflags, 1063static int scsi_report_lun_scan(struct scsi_target *starget, int bflags,
1058 int rescan) 1064 int rescan)
1059{ 1065{
1060 char devname[64]; 1066 char devname[64];
@@ -1067,7 +1073,8 @@ static int scsi_report_lun_scan(struct scsi_device *sdev, int bflags,
1067 struct scsi_lun *lunp, *lun_data; 1073 struct scsi_lun *lunp, *lun_data;
1068 u8 *data; 1074 u8 *data;
1069 struct scsi_sense_hdr sshdr; 1075 struct scsi_sense_hdr sshdr;
1070 struct scsi_target *starget = scsi_target(sdev); 1076 struct scsi_device *sdev;
1077 struct Scsi_Host *shost = dev_to_shost(&starget->dev);
1071 1078
1072 /* 1079 /*
1073 * Only support SCSI-3 and up devices if BLIST_NOREPORTLUN is not set. 1080 * Only support SCSI-3 and up devices if BLIST_NOREPORTLUN is not set.
@@ -1075,15 +1082,23 @@ static int scsi_report_lun_scan(struct scsi_device *sdev, int bflags,
1075 * support more than 8 LUNs. 1082 * support more than 8 LUNs.
1076 */ 1083 */
1077 if ((bflags & BLIST_NOREPORTLUN) || 1084 if ((bflags & BLIST_NOREPORTLUN) ||
1078 sdev->scsi_level < SCSI_2 || 1085 starget->scsi_level < SCSI_2 ||
1079 (sdev->scsi_level < SCSI_3 && 1086 (starget->scsi_level < SCSI_3 &&
1080 (!(bflags & BLIST_REPORTLUN2) || sdev->host->max_lun <= 8)) ) 1087 (!(bflags & BLIST_REPORTLUN2) || shost->max_lun <= 8)) )
1081 return 1; 1088 return 1;
1082 if (bflags & BLIST_NOLUN) 1089 if (bflags & BLIST_NOLUN)
1083 return 0; 1090 return 0;
1084 1091
1092 if (!(sdev = scsi_device_lookup_by_target(starget, 0))) {
1093 sdev = scsi_alloc_sdev(starget, 0, NULL);
1094 if (!sdev)
1095 return 0;
1096 if (scsi_device_get(sdev))
1097 return 0;
1098 }
1099
1085 sprintf(devname, "host %d channel %d id %d", 1100 sprintf(devname, "host %d channel %d id %d",
1086 sdev->host->host_no, sdev->channel, sdev->id); 1101 shost->host_no, sdev->channel, sdev->id);
1087 1102
1088 /* 1103 /*
1089 * Allocate enough to hold the header (the same size as one scsi_lun) 1104 * Allocate enough to hold the header (the same size as one scsi_lun)
@@ -1098,8 +1113,10 @@ static int scsi_report_lun_scan(struct scsi_device *sdev, int bflags,
1098 length = (max_scsi_report_luns + 1) * sizeof(struct scsi_lun); 1113 length = (max_scsi_report_luns + 1) * sizeof(struct scsi_lun);
1099 lun_data = kmalloc(length, GFP_ATOMIC | 1114 lun_data = kmalloc(length, GFP_ATOMIC |
1100 (sdev->host->unchecked_isa_dma ? __GFP_DMA : 0)); 1115 (sdev->host->unchecked_isa_dma ? __GFP_DMA : 0));
1101 if (!lun_data) 1116 if (!lun_data) {
1117 printk(ALLOC_FAILURE_MSG, __FUNCTION__);
1102 goto out; 1118 goto out;
1119 }
1103 1120
1104 scsi_cmd[0] = REPORT_LUNS; 1121 scsi_cmd[0] = REPORT_LUNS;
1105 1122
@@ -1201,10 +1218,6 @@ static int scsi_report_lun_scan(struct scsi_device *sdev, int bflags,
1201 for (i = 0; i < sizeof(struct scsi_lun); i++) 1218 for (i = 0; i < sizeof(struct scsi_lun); i++)
1202 printk("%02x", data[i]); 1219 printk("%02x", data[i]);
1203 printk(" has a LUN larger than currently supported.\n"); 1220 printk(" has a LUN larger than currently supported.\n");
1204 } else if (lun == 0) {
1205 /*
1206 * LUN 0 has already been scanned.
1207 */
1208 } else if (lun > sdev->host->max_lun) { 1221 } else if (lun > sdev->host->max_lun) {
1209 printk(KERN_WARNING "scsi: %s lun%d has a LUN larger" 1222 printk(KERN_WARNING "scsi: %s lun%d has a LUN larger"
1210 " than allowed by the host adapter\n", 1223 " than allowed by the host adapter\n",
@@ -1227,13 +1240,13 @@ static int scsi_report_lun_scan(struct scsi_device *sdev, int bflags,
1227 } 1240 }
1228 1241
1229 kfree(lun_data); 1242 kfree(lun_data);
1230 return 0;
1231
1232 out: 1243 out:
1233 /* 1244 scsi_device_put(sdev);
1234 * We are out of memory, don't try scanning any further. 1245 if (sdev->sdev_state == SDEV_CREATED)
1235 */ 1246 /*
1236 printk(ALLOC_FAILURE_MSG, __FUNCTION__); 1247 * the sdev we used didn't appear in the report luns scan
1248 */
1249 scsi_destroy_sdev(sdev);
1237 return 0; 1250 return 0;
1238} 1251}
1239 1252
@@ -1299,7 +1312,6 @@ static void __scsi_scan_target(struct device *parent, unsigned int channel,
1299 struct Scsi_Host *shost = dev_to_shost(parent); 1312 struct Scsi_Host *shost = dev_to_shost(parent);
1300 int bflags = 0; 1313 int bflags = 0;
1301 int res; 1314 int res;
1302 struct scsi_device *sdev = NULL;
1303 struct scsi_target *starget; 1315 struct scsi_target *starget;
1304 1316
1305 if (shost->this_id == id) 1317 if (shost->this_id == id)
@@ -1325,27 +1337,16 @@ static void __scsi_scan_target(struct device *parent, unsigned int channel,
1325 * Scan LUN 0, if there is some response, scan further. Ideally, we 1337 * Scan LUN 0, if there is some response, scan further. Ideally, we
1326 * would not configure LUN 0 until all LUNs are scanned. 1338 * would not configure LUN 0 until all LUNs are scanned.
1327 */ 1339 */
1328 res = scsi_probe_and_add_lun(starget, 0, &bflags, &sdev, rescan, NULL); 1340 res = scsi_probe_and_add_lun(starget, 0, &bflags, NULL, rescan, NULL);
1329 if (res == SCSI_SCAN_LUN_PRESENT) { 1341 if (res == SCSI_SCAN_LUN_PRESENT || res == SCSI_SCAN_TARGET_PRESENT) {
1330 if (scsi_report_lun_scan(sdev, bflags, rescan) != 0) 1342 if (scsi_report_lun_scan(starget, bflags, rescan) != 0)
1331 /* 1343 /*
1332 * The REPORT LUN did not scan the target, 1344 * The REPORT LUN did not scan the target,
1333 * do a sequential scan. 1345 * do a sequential scan.
1334 */ 1346 */
1335 scsi_sequential_lun_scan(starget, bflags, 1347 scsi_sequential_lun_scan(starget, bflags,
1336 res, sdev->scsi_level, rescan); 1348 res, starget->scsi_level, rescan);
1337 } else if (res == SCSI_SCAN_TARGET_PRESENT) {
1338 /*
1339 * There's a target here, but lun 0 is offline so we
1340 * can't use the report_lun scan. Fall back to a
1341 * sequential lun scan with a bflags of SPARSELUN and
1342 * a default scsi level of SCSI_2
1343 */
1344 scsi_sequential_lun_scan(starget, BLIST_SPARSELUN,
1345 SCSI_SCAN_TARGET_PRESENT, SCSI_2, rescan);
1346 } 1349 }
1347 if (sdev)
1348 scsi_device_put(sdev);
1349 1350
1350 out_reap: 1351 out_reap:
1351 /* now determine if the target has any children at all 1352 /* now determine if the target has any children at all
@@ -1542,10 +1543,7 @@ void scsi_free_host_dev(struct scsi_device *sdev)
1542{ 1543{
1543 BUG_ON(sdev->id != sdev->host->this_id); 1544 BUG_ON(sdev->id != sdev->host->this_id);
1544 1545
1545 if (sdev->host->hostt->slave_destroy) 1546 scsi_destroy_sdev(sdev);
1546 sdev->host->hostt->slave_destroy(sdev);
1547 transport_destroy_device(&sdev->sdev_gendev);
1548 put_device(&sdev->sdev_gendev);
1549} 1547}
1550EXPORT_SYMBOL(scsi_free_host_dev); 1548EXPORT_SYMBOL(scsi_free_host_dev);
1551 1549
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c
index 2cab556b6e82..771e97ef136e 100644
--- a/drivers/scsi/scsi_transport_fc.c
+++ b/drivers/scsi/scsi_transport_fc.c
@@ -819,12 +819,15 @@ show_fc_private_host_tgtid_bind_type(struct class_device *cdev, char *buf)
819 return snprintf(buf, FC_BINDTYPE_MAX_NAMELEN, "%s\n", name); 819 return snprintf(buf, FC_BINDTYPE_MAX_NAMELEN, "%s\n", name);
820} 820}
821 821
822#define get_list_head_entry(pos, head, member) \
823 pos = list_entry((head)->next, typeof(*pos), member)
824
822static ssize_t 825static ssize_t
823store_fc_private_host_tgtid_bind_type(struct class_device *cdev, 826store_fc_private_host_tgtid_bind_type(struct class_device *cdev,
824 const char *buf, size_t count) 827 const char *buf, size_t count)
825{ 828{
826 struct Scsi_Host *shost = transport_class_to_shost(cdev); 829 struct Scsi_Host *shost = transport_class_to_shost(cdev);
827 struct fc_rport *rport, *next_rport; 830 struct fc_rport *rport;
828 enum fc_tgtid_binding_type val; 831 enum fc_tgtid_binding_type val;
829 unsigned long flags; 832 unsigned long flags;
830 833
@@ -834,9 +837,13 @@ store_fc_private_host_tgtid_bind_type(struct class_device *cdev,
834 /* if changing bind type, purge all unused consistent bindings */ 837 /* if changing bind type, purge all unused consistent bindings */
835 if (val != fc_host_tgtid_bind_type(shost)) { 838 if (val != fc_host_tgtid_bind_type(shost)) {
836 spin_lock_irqsave(shost->host_lock, flags); 839 spin_lock_irqsave(shost->host_lock, flags);
837 list_for_each_entry_safe(rport, next_rport, 840 while (!list_empty(&fc_host_rport_bindings(shost))) {
838 &fc_host_rport_bindings(shost), peers) 841 get_list_head_entry(rport,
842 &fc_host_rport_bindings(shost), peers);
843 spin_unlock_irqrestore(shost->host_lock, flags);
839 fc_rport_terminate(rport); 844 fc_rport_terminate(rport);
845 spin_lock_irqsave(shost->host_lock, flags);
846 }
840 spin_unlock_irqrestore(shost->host_lock, flags); 847 spin_unlock_irqrestore(shost->host_lock, flags);
841 } 848 }
842 849
diff --git a/drivers/scsi/scsi_transport_sas.c b/drivers/scsi/scsi_transport_sas.c
index ff724bbe6611..1d145d2f9a38 100644
--- a/drivers/scsi/scsi_transport_sas.c
+++ b/drivers/scsi/scsi_transport_sas.c
@@ -628,17 +628,16 @@ sas_rphy_delete(struct sas_rphy *rphy)
628 struct Scsi_Host *shost = dev_to_shost(parent->dev.parent); 628 struct Scsi_Host *shost = dev_to_shost(parent->dev.parent);
629 struct sas_host_attrs *sas_host = to_sas_host_attrs(shost); 629 struct sas_host_attrs *sas_host = to_sas_host_attrs(shost);
630 630
631 transport_destroy_device(&rphy->dev); 631 scsi_remove_target(dev);
632 632
633 scsi_remove_target(&rphy->dev); 633 transport_remove_device(dev);
634 device_del(dev);
635 transport_destroy_device(dev);
634 636
635 spin_lock(&sas_host->lock); 637 spin_lock(&sas_host->lock);
636 list_del(&rphy->list); 638 list_del(&rphy->list);
637 spin_unlock(&sas_host->lock); 639 spin_unlock(&sas_host->lock);
638 640
639 transport_remove_device(dev);
640 device_del(dev);
641 transport_destroy_device(dev);
642 put_device(&parent->dev); 641 put_device(&parent->dev);
643} 642}
644EXPORT_SYMBOL(sas_rphy_delete); 643EXPORT_SYMBOL(sas_rphy_delete);
diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
index 4d09a6e4dd2e..fd56b7ec88b6 100644
--- a/drivers/scsi/sg.c
+++ b/drivers/scsi/sg.c
@@ -2644,7 +2644,7 @@ static char *
2644sg_page_malloc(int rqSz, int lowDma, int *retSzp) 2644sg_page_malloc(int rqSz, int lowDma, int *retSzp)
2645{ 2645{
2646 char *resp = NULL; 2646 char *resp = NULL;
2647 int page_mask; 2647 gfp_t page_mask;
2648 int order, a_size; 2648 int order, a_size;
2649 int resSz = rqSz; 2649 int resSz = rqSz;
2650 2650
@@ -2849,8 +2849,7 @@ sg_proc_init(void)
2849 struct proc_dir_entry *pdep; 2849 struct proc_dir_entry *pdep;
2850 struct sg_proc_leaf * leaf; 2850 struct sg_proc_leaf * leaf;
2851 2851
2852 sg_proc_sgp = create_proc_entry(sg_proc_sg_dirname, 2852 sg_proc_sgp = proc_mkdir(sg_proc_sg_dirname, NULL);
2853 S_IFDIR | S_IRUGO | S_IXUGO, NULL);
2854 if (!sg_proc_sgp) 2853 if (!sg_proc_sgp)
2855 return 1; 2854 return 1;
2856 for (k = 0; k < num_leaves; ++k) { 2855 for (k = 0; k < num_leaves; ++k) {
diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c
index d001c046551b..927d700f0073 100644
--- a/drivers/scsi/st.c
+++ b/drivers/scsi/st.c
@@ -3577,7 +3577,8 @@ static long st_compat_ioctl(struct file *file, unsigned int cmd, unsigned long a
3577static struct st_buffer * 3577static struct st_buffer *
3578 new_tape_buffer(int from_initialization, int need_dma, int max_sg) 3578 new_tape_buffer(int from_initialization, int need_dma, int max_sg)
3579{ 3579{
3580 int i, priority, got = 0, segs = 0; 3580 int i, got = 0, segs = 0;
3581 gfp_t priority;
3581 struct st_buffer *tb; 3582 struct st_buffer *tb;
3582 3583
3583 if (from_initialization) 3584 if (from_initialization)
@@ -3610,7 +3611,8 @@ static struct st_buffer *
3610/* Try to allocate enough space in the tape buffer */ 3611/* Try to allocate enough space in the tape buffer */
3611static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dma) 3612static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dma)
3612{ 3613{
3613 int segs, nbr, max_segs, b_size, priority, order, got; 3614 int segs, nbr, max_segs, b_size, order, got;
3615 gfp_t priority;
3614 3616
3615 if (new_size <= STbuffer->buffer_size) 3617 if (new_size <= STbuffer->buffer_size)
3616 return 1; 3618 return 1;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-16 03:49:42 -0500