diff options
author | Vikas Chaudhary <vikas.chaudhary@qlogic.com> | 2012-08-22 07:54:59 -0400 |
---|---|---|
committer | James Bottomley <JBottomley@Parallels.com> | 2012-09-24 04:11:05 -0400 |
commit | f8086f4fd462195a5a824c851997bd12ffceae00 (patch) | |
tree | 330113e1d4d51317ff517d8a9808e3bdbf8fe8b1 /drivers/scsi/qla4xxx/ql4_os.c | |
parent | d986788b2653ef76441c6b6ba1787164546735a6 (diff) |
[SCSI] qla4xxx: Update function name from 8xxx to 82xx
Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/qla4xxx/ql4_os.c')
-rw-r--r-- | drivers/scsi/qla4xxx/ql4_os.c | 100 |
1 files changed, 50 insertions, 50 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c index 0a0c9c59be10..b82c82dd4c5b 100644 --- a/drivers/scsi/qla4xxx/ql4_os.c +++ b/drivers/scsi/qla4xxx/ql4_os.c | |||
@@ -2420,7 +2420,7 @@ static int qla4_8xxx_check_temp(struct scsi_qla_host *ha) | |||
2420 | uint32_t temp, temp_state, temp_val; | 2420 | uint32_t temp, temp_state, temp_val; |
2421 | int status = QLA_SUCCESS; | 2421 | int status = QLA_SUCCESS; |
2422 | 2422 | ||
2423 | temp = qla4_8xxx_rd_32(ha, CRB_TEMP_STATE); | 2423 | temp = qla4_82xx_rd_32(ha, CRB_TEMP_STATE); |
2424 | 2424 | ||
2425 | temp_state = qla82xx_get_temp_state(temp); | 2425 | temp_state = qla82xx_get_temp_state(temp); |
2426 | temp_val = qla82xx_get_temp_val(temp); | 2426 | temp_val = qla82xx_get_temp_val(temp); |
@@ -2456,7 +2456,7 @@ static int qla4_8xxx_check_fw_alive(struct scsi_qla_host *ha) | |||
2456 | uint32_t fw_heartbeat_counter; | 2456 | uint32_t fw_heartbeat_counter; |
2457 | int status = QLA_SUCCESS; | 2457 | int status = QLA_SUCCESS; |
2458 | 2458 | ||
2459 | fw_heartbeat_counter = qla4_8xxx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); | 2459 | fw_heartbeat_counter = qla4_82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); |
2460 | /* If PEG_ALIVE_COUNTER is 0xffffffff, AER/EEH is in progress, ignore */ | 2460 | /* If PEG_ALIVE_COUNTER is 0xffffffff, AER/EEH is in progress, ignore */ |
2461 | if (fw_heartbeat_counter == 0xffffffff) { | 2461 | if (fw_heartbeat_counter == 0xffffffff) { |
2462 | DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Device in frozen " | 2462 | DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Device in frozen " |
@@ -2478,19 +2478,19 @@ static int qla4_8xxx_check_fw_alive(struct scsi_qla_host *ha) | |||
2478 | " 0x%x,\n PEG_NET_2_PC: 0x%x, PEG_NET_3_PC:" | 2478 | " 0x%x,\n PEG_NET_2_PC: 0x%x, PEG_NET_3_PC:" |
2479 | " 0x%x,\n PEG_NET_4_PC: 0x%x\n", | 2479 | " 0x%x,\n PEG_NET_4_PC: 0x%x\n", |
2480 | ha->host_no, __func__, | 2480 | ha->host_no, __func__, |
2481 | qla4_8xxx_rd_32(ha, | 2481 | qla4_82xx_rd_32(ha, |
2482 | QLA82XX_PEG_HALT_STATUS1), | 2482 | QLA82XX_PEG_HALT_STATUS1), |
2483 | qla4_8xxx_rd_32(ha, | 2483 | qla4_82xx_rd_32(ha, |
2484 | QLA82XX_PEG_HALT_STATUS2), | 2484 | QLA82XX_PEG_HALT_STATUS2), |
2485 | qla4_8xxx_rd_32(ha, QLA82XX_CRB_PEG_NET_0 + | 2485 | qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_0 + |
2486 | 0x3c), | 2486 | 0x3c), |
2487 | qla4_8xxx_rd_32(ha, QLA82XX_CRB_PEG_NET_1 + | 2487 | qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_1 + |
2488 | 0x3c), | 2488 | 0x3c), |
2489 | qla4_8xxx_rd_32(ha, QLA82XX_CRB_PEG_NET_2 + | 2489 | qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_2 + |
2490 | 0x3c), | 2490 | 0x3c), |
2491 | qla4_8xxx_rd_32(ha, QLA82XX_CRB_PEG_NET_3 + | 2491 | qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_3 + |
2492 | 0x3c), | 2492 | 0x3c), |
2493 | qla4_8xxx_rd_32(ha, QLA82XX_CRB_PEG_NET_4 + | 2493 | qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_4 + |
2494 | 0x3c)); | 2494 | 0x3c)); |
2495 | status = QLA_ERROR; | 2495 | status = QLA_ERROR; |
2496 | } | 2496 | } |
@@ -2515,12 +2515,12 @@ void qla4_8xxx_watchdog(struct scsi_qla_host *ha) | |||
2515 | if (!(test_bit(DPC_RESET_ACTIVE, &ha->dpc_flags) || | 2515 | if (!(test_bit(DPC_RESET_ACTIVE, &ha->dpc_flags) || |
2516 | test_bit(DPC_RESET_HA, &ha->dpc_flags) || | 2516 | test_bit(DPC_RESET_HA, &ha->dpc_flags) || |
2517 | test_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags))) { | 2517 | test_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags))) { |
2518 | dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE); | 2518 | dev_state = qla4_82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); |
2519 | 2519 | ||
2520 | if (qla4_8xxx_check_temp(ha)) { | 2520 | if (qla4_8xxx_check_temp(ha)) { |
2521 | ql4_printk(KERN_INFO, ha, "disabling pause" | 2521 | ql4_printk(KERN_INFO, ha, "disabling pause" |
2522 | " transmit on port 0 & 1.\n"); | 2522 | " transmit on port 0 & 1.\n"); |
2523 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, | 2523 | qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, |
2524 | CRB_NIU_XG_PAUSE_CTL_P0 | | 2524 | CRB_NIU_XG_PAUSE_CTL_P0 | |
2525 | CRB_NIU_XG_PAUSE_CTL_P1); | 2525 | CRB_NIU_XG_PAUSE_CTL_P1); |
2526 | set_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags); | 2526 | set_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags); |
@@ -2544,10 +2544,10 @@ void qla4_8xxx_watchdog(struct scsi_qla_host *ha) | |||
2544 | if (qla4_8xxx_check_fw_alive(ha)) { | 2544 | if (qla4_8xxx_check_fw_alive(ha)) { |
2545 | ql4_printk(KERN_INFO, ha, "disabling pause" | 2545 | ql4_printk(KERN_INFO, ha, "disabling pause" |
2546 | " transmit on port 0 & 1.\n"); | 2546 | " transmit on port 0 & 1.\n"); |
2547 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, | 2547 | qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, |
2548 | CRB_NIU_XG_PAUSE_CTL_P0 | | 2548 | CRB_NIU_XG_PAUSE_CTL_P0 | |
2549 | CRB_NIU_XG_PAUSE_CTL_P1); | 2549 | CRB_NIU_XG_PAUSE_CTL_P1); |
2550 | halt_status = qla4_8xxx_rd_32(ha, | 2550 | halt_status = qla4_82xx_rd_32(ha, |
2551 | QLA82XX_PEG_HALT_STATUS1); | 2551 | QLA82XX_PEG_HALT_STATUS1); |
2552 | 2552 | ||
2553 | if (QLA82XX_FWERROR_CODE(halt_status) == 0x67) | 2553 | if (QLA82XX_FWERROR_CODE(halt_status) == 0x67) |
@@ -3040,9 +3040,9 @@ recover_ha_init_adapter: | |||
3040 | * with multiple resets in the same thread, | 3040 | * with multiple resets in the same thread, |
3041 | * utilize DPC to retry */ | 3041 | * utilize DPC to retry */ |
3042 | if (is_qla8022(ha)) { | 3042 | if (is_qla8022(ha)) { |
3043 | qla4_8xxx_idc_lock(ha); | 3043 | qla4_82xx_idc_lock(ha); |
3044 | dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE); | 3044 | dev_state = qla4_82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); |
3045 | qla4_8xxx_idc_unlock(ha); | 3045 | qla4_82xx_idc_unlock(ha); |
3046 | if (dev_state == QLA82XX_DEV_FAILED) { | 3046 | if (dev_state == QLA82XX_DEV_FAILED) { |
3047 | ql4_printk(KERN_INFO, ha, "%s: don't retry " | 3047 | ql4_printk(KERN_INFO, ha, "%s: don't retry " |
3048 | "recover adapter. H/W is in Failed " | 3048 | "recover adapter. H/W is in Failed " |
@@ -3385,10 +3385,10 @@ static void qla4xxx_do_dpc(struct work_struct *work) | |||
3385 | 3385 | ||
3386 | if (is_qla8022(ha)) { | 3386 | if (is_qla8022(ha)) { |
3387 | if (test_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags)) { | 3387 | if (test_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags)) { |
3388 | qla4_8xxx_idc_lock(ha); | 3388 | qla4_82xx_idc_lock(ha); |
3389 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE, | 3389 | qla4_82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, |
3390 | QLA82XX_DEV_FAILED); | 3390 | QLA82XX_DEV_FAILED); |
3391 | qla4_8xxx_idc_unlock(ha); | 3391 | qla4_82xx_idc_unlock(ha); |
3392 | ql4_printk(KERN_INFO, ha, "HW State: FAILED\n"); | 3392 | ql4_printk(KERN_INFO, ha, "HW State: FAILED\n"); |
3393 | qla4_8xxx_device_state_handler(ha); | 3393 | qla4_8xxx_device_state_handler(ha); |
3394 | } | 3394 | } |
@@ -3512,9 +3512,9 @@ static void qla4xxx_free_adapter(struct scsi_qla_host *ha) | |||
3512 | ha->isp_ops->reset_firmware(ha); | 3512 | ha->isp_ops->reset_firmware(ha); |
3513 | 3513 | ||
3514 | if (is_qla8022(ha)) { | 3514 | if (is_qla8022(ha)) { |
3515 | qla4_8xxx_idc_lock(ha); | 3515 | qla4_82xx_idc_lock(ha); |
3516 | qla4_8xxx_clear_drv_active(ha); | 3516 | qla4_8xxx_clear_drv_active(ha); |
3517 | qla4_8xxx_idc_unlock(ha); | 3517 | qla4_82xx_idc_unlock(ha); |
3518 | } | 3518 | } |
3519 | 3519 | ||
3520 | /* Detach interrupts */ | 3520 | /* Detach interrupts */ |
@@ -3663,17 +3663,17 @@ static struct isp_operations qla4xxx_isp_ops = { | |||
3663 | static struct isp_operations qla4_8xxx_isp_ops = { | 3663 | static struct isp_operations qla4_8xxx_isp_ops = { |
3664 | .iospace_config = qla4_8xxx_iospace_config, | 3664 | .iospace_config = qla4_8xxx_iospace_config, |
3665 | .pci_config = qla4_8xxx_pci_config, | 3665 | .pci_config = qla4_8xxx_pci_config, |
3666 | .disable_intrs = qla4_8xxx_disable_intrs, | 3666 | .disable_intrs = qla4_82xx_disable_intrs, |
3667 | .enable_intrs = qla4_8xxx_enable_intrs, | 3667 | .enable_intrs = qla4_82xx_enable_intrs, |
3668 | .start_firmware = qla4_8xxx_load_risc, | 3668 | .start_firmware = qla4_8xxx_load_risc, |
3669 | .intr_handler = qla4_8xxx_intr_handler, | 3669 | .intr_handler = qla4_82xx_intr_handler, |
3670 | .interrupt_service_routine = qla4_8xxx_interrupt_service_routine, | 3670 | .interrupt_service_routine = qla4_82xx_interrupt_service_routine, |
3671 | .reset_chip = qla4_8xxx_isp_reset, | 3671 | .reset_chip = qla4_82xx_isp_reset, |
3672 | .reset_firmware = qla4_8xxx_stop_firmware, | 3672 | .reset_firmware = qla4_8xxx_stop_firmware, |
3673 | .queue_iocb = qla4_8xxx_queue_iocb, | 3673 | .queue_iocb = qla4_82xx_queue_iocb, |
3674 | .complete_iocb = qla4_8xxx_complete_iocb, | 3674 | .complete_iocb = qla4_82xx_complete_iocb, |
3675 | .rd_shdw_req_q_out = qla4_8xxx_rd_shdw_req_q_out, | 3675 | .rd_shdw_req_q_out = qla4_82xx_rd_shdw_req_q_out, |
3676 | .rd_shdw_rsp_q_in = qla4_8xxx_rd_shdw_rsp_q_in, | 3676 | .rd_shdw_rsp_q_in = qla4_82xx_rd_shdw_rsp_q_in, |
3677 | .get_sys_info = qla4_8xxx_get_sys_info, | 3677 | .get_sys_info = qla4_8xxx_get_sys_info, |
3678 | }; | 3678 | }; |
3679 | 3679 | ||
@@ -3682,7 +3682,7 @@ uint16_t qla4xxx_rd_shdw_req_q_out(struct scsi_qla_host *ha) | |||
3682 | return (uint16_t)le32_to_cpu(ha->shadow_regs->req_q_out); | 3682 | return (uint16_t)le32_to_cpu(ha->shadow_regs->req_q_out); |
3683 | } | 3683 | } |
3684 | 3684 | ||
3685 | uint16_t qla4_8xxx_rd_shdw_req_q_out(struct scsi_qla_host *ha) | 3685 | uint16_t qla4_82xx_rd_shdw_req_q_out(struct scsi_qla_host *ha) |
3686 | { | 3686 | { |
3687 | return (uint16_t)le32_to_cpu(readl(&ha->qla4_8xxx_reg->req_q_out)); | 3687 | return (uint16_t)le32_to_cpu(readl(&ha->qla4_8xxx_reg->req_q_out)); |
3688 | } | 3688 | } |
@@ -3692,7 +3692,7 @@ uint16_t qla4xxx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha) | |||
3692 | return (uint16_t)le32_to_cpu(ha->shadow_regs->rsp_q_in); | 3692 | return (uint16_t)le32_to_cpu(ha->shadow_regs->rsp_q_in); |
3693 | } | 3693 | } |
3694 | 3694 | ||
3695 | uint16_t qla4_8xxx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha) | 3695 | uint16_t qla4_82xx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha) |
3696 | { | 3696 | { |
3697 | return (uint16_t)le32_to_cpu(readl(&ha->qla4_8xxx_reg->rsp_q_in)); | 3697 | return (uint16_t)le32_to_cpu(readl(&ha->qla4_8xxx_reg->rsp_q_in)); |
3698 | } | 3698 | } |
@@ -5161,9 +5161,9 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev, | |||
5161 | init_retry_count++ < MAX_INIT_RETRIES) { | 5161 | init_retry_count++ < MAX_INIT_RETRIES) { |
5162 | 5162 | ||
5163 | if (is_qla8022(ha)) { | 5163 | if (is_qla8022(ha)) { |
5164 | qla4_8xxx_idc_lock(ha); | 5164 | qla4_82xx_idc_lock(ha); |
5165 | dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE); | 5165 | dev_state = qla4_82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); |
5166 | qla4_8xxx_idc_unlock(ha); | 5166 | qla4_82xx_idc_unlock(ha); |
5167 | if (dev_state == QLA82XX_DEV_FAILED) { | 5167 | if (dev_state == QLA82XX_DEV_FAILED) { |
5168 | ql4_printk(KERN_WARNING, ha, "%s: don't retry " | 5168 | ql4_printk(KERN_WARNING, ha, "%s: don't retry " |
5169 | "initialize adapter. H/W is in failed state\n", | 5169 | "initialize adapter. H/W is in failed state\n", |
@@ -5186,10 +5186,10 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev, | |||
5186 | if (is_qla8022(ha) && ql4xdontresethba) { | 5186 | if (is_qla8022(ha) && ql4xdontresethba) { |
5187 | /* Put the device in failed state. */ | 5187 | /* Put the device in failed state. */ |
5188 | DEBUG2(printk(KERN_ERR "HW STATE: FAILED\n")); | 5188 | DEBUG2(printk(KERN_ERR "HW STATE: FAILED\n")); |
5189 | qla4_8xxx_idc_lock(ha); | 5189 | qla4_82xx_idc_lock(ha); |
5190 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE, | 5190 | qla4_82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, |
5191 | QLA82XX_DEV_FAILED); | 5191 | QLA82XX_DEV_FAILED); |
5192 | qla4_8xxx_idc_unlock(ha); | 5192 | qla4_82xx_idc_unlock(ha); |
5193 | } | 5193 | } |
5194 | ret = -ENODEV; | 5194 | ret = -ENODEV; |
5195 | goto remove_host; | 5195 | goto remove_host; |
@@ -6033,31 +6033,31 @@ static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha) | |||
6033 | "0x%x is the owner\n", ha->host_no, __func__, | 6033 | "0x%x is the owner\n", ha->host_no, __func__, |
6034 | ha->pdev->devfn); | 6034 | ha->pdev->devfn); |
6035 | 6035 | ||
6036 | qla4_8xxx_idc_lock(ha); | 6036 | qla4_82xx_idc_lock(ha); |
6037 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE, | 6037 | qla4_82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, |
6038 | QLA82XX_DEV_COLD); | 6038 | QLA82XX_DEV_COLD); |
6039 | 6039 | ||
6040 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, | 6040 | qla4_82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, |
6041 | QLA82XX_IDC_VERSION); | 6041 | QLA82XX_IDC_VERSION); |
6042 | 6042 | ||
6043 | qla4_8xxx_idc_unlock(ha); | 6043 | qla4_82xx_idc_unlock(ha); |
6044 | clear_bit(AF_FW_RECOVERY, &ha->flags); | 6044 | clear_bit(AF_FW_RECOVERY, &ha->flags); |
6045 | rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); | 6045 | rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); |
6046 | qla4_8xxx_idc_lock(ha); | 6046 | qla4_82xx_idc_lock(ha); |
6047 | 6047 | ||
6048 | if (rval != QLA_SUCCESS) { | 6048 | if (rval != QLA_SUCCESS) { |
6049 | ql4_printk(KERN_INFO, ha, "scsi%ld: %s: HW State: " | 6049 | ql4_printk(KERN_INFO, ha, "scsi%ld: %s: HW State: " |
6050 | "FAILED\n", ha->host_no, __func__); | 6050 | "FAILED\n", ha->host_no, __func__); |
6051 | qla4_8xxx_clear_drv_active(ha); | 6051 | qla4_8xxx_clear_drv_active(ha); |
6052 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE, | 6052 | qla4_82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, |
6053 | QLA82XX_DEV_FAILED); | 6053 | QLA82XX_DEV_FAILED); |
6054 | } else { | 6054 | } else { |
6055 | ql4_printk(KERN_INFO, ha, "scsi%ld: %s: HW State: " | 6055 | ql4_printk(KERN_INFO, ha, "scsi%ld: %s: HW State: " |
6056 | "READY\n", ha->host_no, __func__); | 6056 | "READY\n", ha->host_no, __func__); |
6057 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE, | 6057 | qla4_82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, |
6058 | QLA82XX_DEV_READY); | 6058 | QLA82XX_DEV_READY); |
6059 | /* Clear driver state register */ | 6059 | /* Clear driver state register */ |
6060 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0); | 6060 | qla4_82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0); |
6061 | qla4_8xxx_set_drv_active(ha); | 6061 | qla4_8xxx_set_drv_active(ha); |
6062 | ret = qla4xxx_request_irqs(ha); | 6062 | ret = qla4xxx_request_irqs(ha); |
6063 | if (ret) { | 6063 | if (ret) { |
@@ -6070,12 +6070,12 @@ static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha) | |||
6070 | rval = QLA_SUCCESS; | 6070 | rval = QLA_SUCCESS; |
6071 | } | 6071 | } |
6072 | } | 6072 | } |
6073 | qla4_8xxx_idc_unlock(ha); | 6073 | qla4_82xx_idc_unlock(ha); |
6074 | } else { | 6074 | } else { |
6075 | ql4_printk(KERN_INFO, ha, "scsi%ld: %s: devfn 0x%x is not " | 6075 | ql4_printk(KERN_INFO, ha, "scsi%ld: %s: devfn 0x%x is not " |
6076 | "the reset owner\n", ha->host_no, __func__, | 6076 | "the reset owner\n", ha->host_no, __func__, |
6077 | ha->pdev->devfn); | 6077 | ha->pdev->devfn); |
6078 | if ((qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == | 6078 | if ((qla4_82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == |
6079 | QLA82XX_DEV_READY)) { | 6079 | QLA82XX_DEV_READY)) { |
6080 | clear_bit(AF_FW_RECOVERY, &ha->flags); | 6080 | clear_bit(AF_FW_RECOVERY, &ha->flags); |
6081 | rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); | 6081 | rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); |
@@ -6091,9 +6091,9 @@ static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha) | |||
6091 | rval = QLA_SUCCESS; | 6091 | rval = QLA_SUCCESS; |
6092 | } | 6092 | } |
6093 | } | 6093 | } |
6094 | qla4_8xxx_idc_lock(ha); | 6094 | qla4_82xx_idc_lock(ha); |
6095 | qla4_8xxx_set_drv_active(ha); | 6095 | qla4_8xxx_set_drv_active(ha); |
6096 | qla4_8xxx_idc_unlock(ha); | 6096 | qla4_82xx_idc_unlock(ha); |
6097 | } | 6097 | } |
6098 | } | 6098 | } |
6099 | clear_bit(DPC_RESET_ACTIVE, &ha->dpc_flags); | 6099 | clear_bit(DPC_RESET_ACTIVE, &ha->dpc_flags); |