diff options
author | Andrew Vasquez <andrew.vasquez@qlogic.com> | 2008-01-31 15:33:49 -0500 |
---|---|---|
committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2008-02-07 19:02:39 -0500 |
commit | 3db0652ef986f3bc3d779c4f986330ee3fdd50cc (patch) | |
tree | 3354de3b9404a4ca5b1bef6045fcf8338d61c0c6 /drivers/scsi/qla2xxx | |
parent | e87110852d0bd331d50c3de686a7fc9626579d60 (diff) |
[SCSI] qla2xxx: Consolidate RISC-parity enablement codes.
Collapse duplicate codes called during probe() and RISC-reset
into qla2x00_setup_chip().
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/qla2xxx')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_init.c | 70 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_os.c | 12 |
2 files changed, 24 insertions, 58 deletions
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index 97063cba6788..d5c7853e7eba 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
@@ -925,6 +925,16 @@ qla2x00_setup_chip(scsi_qla_host_t *ha) | |||
925 | { | 925 | { |
926 | int rval; | 926 | int rval; |
927 | uint32_t srisc_address = 0; | 927 | uint32_t srisc_address = 0; |
928 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | ||
929 | unsigned long flags; | ||
930 | |||
931 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { | ||
932 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | ||
933 | spin_lock_irqsave(&ha->hardware_lock, flags); | ||
934 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | ||
935 | RD_REG_WORD(®->hccr); | ||
936 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | ||
937 | } | ||
928 | 938 | ||
929 | /* Load firmware sequences */ | 939 | /* Load firmware sequences */ |
930 | rval = ha->isp_ops->load_risc(ha, &srisc_address); | 940 | rval = ha->isp_ops->load_risc(ha, &srisc_address); |
@@ -968,6 +978,19 @@ qla2x00_setup_chip(scsi_qla_host_t *ha) | |||
968 | } | 978 | } |
969 | } | 979 | } |
970 | 980 | ||
981 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { | ||
982 | /* Enable proper parity. */ | ||
983 | spin_lock_irqsave(&ha->hardware_lock, flags); | ||
984 | if (IS_QLA2300(ha)) | ||
985 | /* SRAM parity */ | ||
986 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | ||
987 | else | ||
988 | /* SRAM, Instruction RAM and GP RAM parity */ | ||
989 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | ||
990 | RD_REG_WORD(®->hccr); | ||
991 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | ||
992 | } | ||
993 | |||
971 | if (rval) { | 994 | if (rval) { |
972 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", | 995 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", |
973 | ha->host_no)); | 996 | ha->host_no)); |
@@ -3344,60 +3367,15 @@ static int | |||
3344 | qla2x00_restart_isp(scsi_qla_host_t *ha) | 3367 | qla2x00_restart_isp(scsi_qla_host_t *ha) |
3345 | { | 3368 | { |
3346 | uint8_t status = 0; | 3369 | uint8_t status = 0; |
3347 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | ||
3348 | unsigned long flags = 0; | ||
3349 | uint32_t wait_time; | 3370 | uint32_t wait_time; |
3350 | 3371 | ||
3351 | /* If firmware needs to be loaded */ | 3372 | /* If firmware needs to be loaded */ |
3352 | if (qla2x00_isp_firmware(ha)) { | 3373 | if (qla2x00_isp_firmware(ha)) { |
3353 | ha->flags.online = 0; | 3374 | ha->flags.online = 0; |
3354 | if (!(status = ha->isp_ops->chip_diag(ha))) { | 3375 | if (!(status = ha->isp_ops->chip_diag(ha))) |
3355 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | ||
3356 | status = qla2x00_setup_chip(ha); | ||
3357 | goto done; | ||
3358 | } | ||
3359 | |||
3360 | spin_lock_irqsave(&ha->hardware_lock, flags); | ||
3361 | |||
3362 | if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha) && | ||
3363 | !IS_QLA25XX(ha)) { | ||
3364 | /* | ||
3365 | * Disable SRAM, Instruction RAM and GP RAM | ||
3366 | * parity. | ||
3367 | */ | ||
3368 | WRT_REG_WORD(®->hccr, | ||
3369 | (HCCR_ENABLE_PARITY + 0x0)); | ||
3370 | RD_REG_WORD(®->hccr); | ||
3371 | } | ||
3372 | |||
3373 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | ||
3374 | |||
3375 | status = qla2x00_setup_chip(ha); | 3376 | status = qla2x00_setup_chip(ha); |
3376 | |||
3377 | spin_lock_irqsave(&ha->hardware_lock, flags); | ||
3378 | |||
3379 | if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha) && | ||
3380 | !IS_QLA25XX(ha)) { | ||
3381 | /* Enable proper parity */ | ||
3382 | if (IS_QLA2300(ha)) | ||
3383 | /* SRAM parity */ | ||
3384 | WRT_REG_WORD(®->hccr, | ||
3385 | (HCCR_ENABLE_PARITY + 0x1)); | ||
3386 | else | ||
3387 | /* | ||
3388 | * SRAM, Instruction RAM and GP RAM | ||
3389 | * parity. | ||
3390 | */ | ||
3391 | WRT_REG_WORD(®->hccr, | ||
3392 | (HCCR_ENABLE_PARITY + 0x7)); | ||
3393 | RD_REG_WORD(®->hccr); | ||
3394 | } | ||
3395 | |||
3396 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | ||
3397 | } | ||
3398 | } | 3377 | } |
3399 | 3378 | ||
3400 | done: | ||
3401 | if (!status && !(status = qla2x00_init_rings(ha))) { | 3379 | if (!status && !(status = qla2x00_init_rings(ha))) { |
3402 | clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags); | 3380 | clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags); |
3403 | if (!(status = qla2x00_fw_ready(ha))) { | 3381 | if (!(status = qla2x00_fw_ready(ha))) { |
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index 7f78e9400523..5270e2d0d114 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
@@ -1780,18 +1780,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1780 | WRT_REG_WORD(®->isp.semaphore, 0); | 1780 | WRT_REG_WORD(®->isp.semaphore, 0); |
1781 | WRT_REG_WORD(®->isp.hccr, HCCR_CLR_RISC_INT); | 1781 | WRT_REG_WORD(®->isp.hccr, HCCR_CLR_RISC_INT); |
1782 | WRT_REG_WORD(®->isp.hccr, HCCR_CLR_HOST_INT); | 1782 | WRT_REG_WORD(®->isp.hccr, HCCR_CLR_HOST_INT); |
1783 | |||
1784 | /* Enable proper parity */ | ||
1785 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) { | ||
1786 | if (IS_QLA2300(ha)) | ||
1787 | /* SRAM parity */ | ||
1788 | WRT_REG_WORD(®->isp.hccr, | ||
1789 | (HCCR_ENABLE_PARITY + 0x1)); | ||
1790 | else | ||
1791 | /* SRAM, Instruction RAM and GP RAM parity */ | ||
1792 | WRT_REG_WORD(®->isp.hccr, | ||
1793 | (HCCR_ENABLE_PARITY + 0x7)); | ||
1794 | } | ||
1795 | } | 1783 | } |
1796 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 1784 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1797 | 1785 | ||