diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-06-25 13:06:12 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-06-25 13:10:36 -0400 |
commit | 7b0cfee1a24efdfe0235bac62e53f686fe8a8e24 (patch) | |
tree | eeeb8cc3bf7be5ec0e54b7c4f3808ef88ecca012 /drivers/scsi/qla2xxx/qla_nx.h | |
parent | 9756fe38d10b2bf90c81dc4d2f17d5632e135364 (diff) | |
parent | 6b16351acbd415e66ba16bf7d473ece1574cf0bc (diff) |
Merge tag 'v3.5-rc4' into drm-intel-next-queued
I want to merge the "no more fake agp on gen6+" patches into
drm-intel-next (well, the last pieces). But a patch in 3.5-rc4 also
adds a new use of dev->agp. Hence the backmarge to sort this out, for
otherwise drm-intel-next merged into Linus' tree would conflict in the
relevant code, things would compile but nicely OOPS at driver load :(
Conflicts in this merge are just simple cases of "both branches
changed/added lines at the same place". The only tricky part is to
keep the order correct wrt the unwind code in case of errors in
intel_ringbuffer.c (and the MI_DISPLAY_FLIP #defines in i915_reg.h
together, obviously).
Conflicts:
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_ringbuffer.c
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_nx.h')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_nx.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/scsi/qla2xxx/qla_nx.h b/drivers/scsi/qla2xxx/qla_nx.h index 4ac50e274661..6eb210e3cc63 100644 --- a/drivers/scsi/qla2xxx/qla_nx.h +++ b/drivers/scsi/qla2xxx/qla_nx.h | |||
@@ -26,6 +26,7 @@ | |||
26 | #define CRB_RCVPEG_STATE QLA82XX_REG(0x13c) | 26 | #define CRB_RCVPEG_STATE QLA82XX_REG(0x13c) |
27 | #define BOOT_LOADER_DIMM_STATUS QLA82XX_REG(0x54) | 27 | #define BOOT_LOADER_DIMM_STATUS QLA82XX_REG(0x54) |
28 | #define CRB_DMA_SHIFT QLA82XX_REG(0xcc) | 28 | #define CRB_DMA_SHIFT QLA82XX_REG(0xcc) |
29 | #define CRB_TEMP_STATE QLA82XX_REG(0x1b4) | ||
29 | #define QLA82XX_DMA_SHIFT_VALUE 0x55555555 | 30 | #define QLA82XX_DMA_SHIFT_VALUE 0x55555555 |
30 | 31 | ||
31 | #define QLA82XX_HW_H0_CH_HUB_ADR 0x05 | 32 | #define QLA82XX_HW_H0_CH_HUB_ADR 0x05 |
@@ -561,7 +562,6 @@ | |||
561 | #define QLA82XX_FW_VERSION_SUB (QLA82XX_CAM_RAM(0x158)) | 562 | #define QLA82XX_FW_VERSION_SUB (QLA82XX_CAM_RAM(0x158)) |
562 | #define QLA82XX_PCIE_REG(reg) (QLA82XX_CRB_PCIE + (reg)) | 563 | #define QLA82XX_PCIE_REG(reg) (QLA82XX_CRB_PCIE + (reg)) |
563 | 564 | ||
564 | #define PCIE_CHICKEN3 (0x120c8) | ||
565 | #define PCIE_SETUP_FUNCTION (0x12040) | 565 | #define PCIE_SETUP_FUNCTION (0x12040) |
566 | #define PCIE_SETUP_FUNCTION2 (0x12048) | 566 | #define PCIE_SETUP_FUNCTION2 (0x12048) |
567 | 567 | ||
@@ -1178,4 +1178,16 @@ static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8, 0x410000AC, | |||
1178 | #define CRB_NIU_XG_PAUSE_CTL_P0 0x1 | 1178 | #define CRB_NIU_XG_PAUSE_CTL_P0 0x1 |
1179 | #define CRB_NIU_XG_PAUSE_CTL_P1 0x8 | 1179 | #define CRB_NIU_XG_PAUSE_CTL_P1 0x8 |
1180 | 1180 | ||
1181 | #define qla82xx_get_temp_val(x) ((x) >> 16) | ||
1182 | #define qla82xx_get_temp_state(x) ((x) & 0xffff) | ||
1183 | #define qla82xx_encode_temp(val, state) (((val) << 16) | (state)) | ||
1184 | |||
1185 | /* | ||
1186 | * Temperature control. | ||
1187 | */ | ||
1188 | enum { | ||
1189 | QLA82XX_TEMP_NORMAL = 0x1, /* Normal operating range */ | ||
1190 | QLA82XX_TEMP_WARN, /* Sound alert, temperature getting high */ | ||
1191 | QLA82XX_TEMP_PANIC /* Fatal error, hardware has shut down. */ | ||
1192 | }; | ||
1181 | #endif | 1193 | #endif |