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authorGiridhar Malavali <giridhar.malavali@qlogic.com>2012-02-09 14:15:34 -0500
committerJames Bottomley <JBottomley@Parallels.com>2012-02-19 09:11:11 -0500
commit6246b8a1d26c7cdb77fd2f3f3578d4db025d5c9e (patch)
treeae6059dbe0d5e59dea54135841c0001643188d07 /drivers/scsi/qla2xxx/qla_mbx.c
parent050c9bb1361439e63dafb5f192f87b81d8ffbf4a (diff)
[SCSI] qla2xxx: Enhancements to support ISP83xx.
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com> Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com> Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: Harish Zunjarrao <harish.zunjarrao@qlogic.com> Signed-off-by: Nigel Kirkland <nigel.kirkland@qlogic.com> Signed-off-by: Chad Dupuis <chad.dupuis@qlogic.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_mbx.c')
-rw-r--r--drivers/scsi/qla2xxx/qla_mbx.c262
1 files changed, 215 insertions, 47 deletions
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 08f1d01bdc1c..be520a9d0b71 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -364,8 +364,8 @@ premature_exit:
364mbx_done: 364mbx_done:
365 if (rval) { 365 if (rval) {
366 ql_dbg(ql_dbg_mbx, base_vha, 0x1020, 366 ql_dbg(ql_dbg_mbx, base_vha, 0x1020,
367 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, cmd=%x ****.\n", 367 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
368 mcp->mb[0], mcp->mb[1], mcp->mb[2], command); 368 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
369 } else { 369 } else {
370 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__); 370 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
371 } 371 }
@@ -455,7 +455,7 @@ qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
455 mcp->mb[1] = MSW(risc_addr); 455 mcp->mb[1] = MSW(risc_addr);
456 mcp->mb[2] = LSW(risc_addr); 456 mcp->mb[2] = LSW(risc_addr);
457 mcp->mb[3] = 0; 457 mcp->mb[3] = 0;
458 if (IS_QLA81XX(ha)) { 458 if (IS_QLA81XX(ha) || IS_QLA83XX(ha)) {
459 struct nvram_81xx *nv = ha->nvram; 459 struct nvram_81xx *nv = ha->nvram;
460 mcp->mb[4] = (nv->enhanced_features & 460 mcp->mb[4] = (nv->enhanced_features &
461 EXTENDED_BB_CREDITS); 461 EXTENDED_BB_CREDITS);
@@ -508,21 +508,22 @@ qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
508 * Kernel context. 508 * Kernel context.
509 */ 509 */
510int 510int
511qla2x00_get_fw_version(scsi_qla_host_t *vha, uint16_t *major, uint16_t *minor, 511qla2x00_get_fw_version(scsi_qla_host_t *vha)
512 uint16_t *subminor, uint16_t *attributes, uint32_t *memory, uint8_t *mpi,
513 uint32_t *mpi_caps, uint8_t *phy)
514{ 512{
515 int rval; 513 int rval;
516 mbx_cmd_t mc; 514 mbx_cmd_t mc;
517 mbx_cmd_t *mcp = &mc; 515 mbx_cmd_t *mcp = &mc;
516 struct qla_hw_data *ha = vha->hw;
518 517
519 ql_dbg(ql_dbg_mbx, vha, 0x1029, "Entered %s.\n", __func__); 518 ql_dbg(ql_dbg_mbx, vha, 0x1029, "Entered %s.\n", __func__);
520 519
521 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION; 520 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
522 mcp->out_mb = MBX_0; 521 mcp->out_mb = MBX_0;
523 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; 522 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
524 if (IS_QLA81XX(vha->hw)) 523 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha))
525 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8; 524 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
525 if (IS_QLA83XX(vha->hw))
526 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
526 mcp->flags = 0; 527 mcp->flags = 0;
527 mcp->tov = MBX_TOV_SECONDS; 528 mcp->tov = MBX_TOV_SECONDS;
528 rval = qla2x00_mailbox_command(vha, mcp); 529 rval = qla2x00_mailbox_command(vha, mcp);
@@ -530,23 +531,37 @@ qla2x00_get_fw_version(scsi_qla_host_t *vha, uint16_t *major, uint16_t *minor,
530 goto failed; 531 goto failed;
531 532
532 /* Return mailbox data. */ 533 /* Return mailbox data. */
533 *major = mcp->mb[1]; 534 ha->fw_major_version = mcp->mb[1];
534 *minor = mcp->mb[2]; 535 ha->fw_minor_version = mcp->mb[2];
535 *subminor = mcp->mb[3]; 536 ha->fw_subminor_version = mcp->mb[3];
536 *attributes = mcp->mb[6]; 537 ha->fw_attributes = mcp->mb[6];
537 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw)) 538 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
538 *memory = 0x1FFFF; /* Defaults to 128KB. */ 539 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
539 else 540 else
540 *memory = (mcp->mb[5] << 16) | mcp->mb[4]; 541 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
541 if (IS_QLA81XX(vha->hw)) { 542 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw)) {
542 mpi[0] = mcp->mb[10] & 0xff; 543 ha->mpi_version[0] = mcp->mb[10] & 0xff;
543 mpi[1] = mcp->mb[11] >> 8; 544 ha->mpi_version[1] = mcp->mb[11] >> 8;
544 mpi[2] = mcp->mb[11] & 0xff; 545 ha->mpi_version[2] = mcp->mb[11] & 0xff;
545 *mpi_caps = (mcp->mb[12] << 16) | mcp->mb[13]; 546 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
546 phy[0] = mcp->mb[8] & 0xff; 547 ha->phy_version[0] = mcp->mb[8] & 0xff;
547 phy[1] = mcp->mb[9] >> 8; 548 ha->phy_version[1] = mcp->mb[9] >> 8;
548 phy[2] = mcp->mb[9] & 0xff; 549 ha->phy_version[2] = mcp->mb[9] & 0xff;
550 }
551 if (IS_QLA83XX(ha)) {
552 if (mcp->mb[6] & BIT_15) {
553 ha->fw_attributes_h = mcp->mb[15];
554 ha->fw_attributes_ext[0] = mcp->mb[16];
555 ha->fw_attributes_ext[1] = mcp->mb[17];
556 ql_dbg(ql_dbg_mbx, vha, 0x1139,
557 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
558 __func__, mcp->mb[15], mcp->mb[6]);
559 } else
560 ql_dbg(ql_dbg_mbx, vha, 0x112f,
561 "%s: FwAttributes [Upper] invalid, MB6:%04x\n",
562 __func__, mcp->mb[6]);
549 } 563 }
564
550failed: 565failed:
551 if (rval != QLA_SUCCESS) { 566 if (rval != QLA_SUCCESS) {
552 /*EMPTY*/ 567 /*EMPTY*/
@@ -1028,7 +1043,7 @@ qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1028 mcp->mb[9] = vha->vp_idx; 1043 mcp->mb[9] = vha->vp_idx;
1029 mcp->out_mb = MBX_9|MBX_0; 1044 mcp->out_mb = MBX_9|MBX_0;
1030 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; 1045 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1031 if (IS_QLA8XXX_TYPE(vha->hw)) 1046 if (IS_CNA_CAPABLE(vha->hw))
1032 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10; 1047 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1033 mcp->tov = MBX_TOV_SECONDS; 1048 mcp->tov = MBX_TOV_SECONDS;
1034 mcp->flags = 0; 1049 mcp->flags = 0;
@@ -1052,7 +1067,7 @@ qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1052 } else { 1067 } else {
1053 ql_dbg(ql_dbg_mbx, vha, 0x1048, "Done %s.\n", __func__); 1068 ql_dbg(ql_dbg_mbx, vha, 0x1048, "Done %s.\n", __func__);
1054 1069
1055 if (IS_QLA8XXX_TYPE(vha->hw)) { 1070 if (IS_CNA_CAPABLE(vha->hw)) {
1056 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff; 1071 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1057 vha->fcoe_fcf_idx = mcp->mb[10]; 1072 vha->fcoe_fcf_idx = mcp->mb[10];
1058 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8; 1073 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
@@ -1163,7 +1178,7 @@ qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1163 mcp->mb[6] = MSW(MSD(ha->init_cb_dma)); 1178 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1164 mcp->mb[7] = LSW(MSD(ha->init_cb_dma)); 1179 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1165 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; 1180 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1166 if (IS_QLA81XX(ha) && ha->ex_init_cb->ex_version) { 1181 if ((IS_QLA81XX(ha) || IS_QLA83XX(ha)) && ha->ex_init_cb->ex_version) {
1167 mcp->mb[1] = BIT_0; 1182 mcp->mb[1] = BIT_0;
1168 mcp->mb[10] = MSW(ha->ex_init_cb_dma); 1183 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1169 mcp->mb[11] = LSW(ha->ex_init_cb_dma); 1184 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
@@ -1172,7 +1187,11 @@ qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1172 mcp->mb[14] = sizeof(*ha->ex_init_cb); 1187 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1173 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10; 1188 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1174 } 1189 }
1175 mcp->in_mb = MBX_0; 1190 /* 1 and 2 should normally be captured. */
1191 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1192 if (IS_QLA83XX(ha))
1193 /* mb3 is additional info about the installed SFP. */
1194 mcp->in_mb |= MBX_3;
1176 mcp->buf_size = size; 1195 mcp->buf_size = size;
1177 mcp->flags = MBX_DMA_OUT; 1196 mcp->flags = MBX_DMA_OUT;
1178 mcp->tov = MBX_TOV_SECONDS; 1197 mcp->tov = MBX_TOV_SECONDS;
@@ -1181,7 +1200,8 @@ qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1181 if (rval != QLA_SUCCESS) { 1200 if (rval != QLA_SUCCESS) {
1182 /*EMPTY*/ 1201 /*EMPTY*/
1183 ql_dbg(ql_dbg_mbx, vha, 0x104d, 1202 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1184 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 1203 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1204 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1185 } else { 1205 } else {
1186 /*EMPTY*/ 1206 /*EMPTY*/
1187 ql_dbg(ql_dbg_mbx, vha, 0x104e, "Done %s.\n", __func__); 1207 ql_dbg(ql_dbg_mbx, vha, 0x104e, "Done %s.\n", __func__);
@@ -1481,7 +1501,7 @@ qla2x00_lip_reset(scsi_qla_host_t *vha)
1481 1501
1482 ql_dbg(ql_dbg_mbx, vha, 0x105a, "Entered %s.\n", __func__); 1502 ql_dbg(ql_dbg_mbx, vha, 0x105a, "Entered %s.\n", __func__);
1483 1503
1484 if (IS_QLA8XXX_TYPE(vha->hw)) { 1504 if (IS_CNA_CAPABLE(vha->hw)) {
1485 /* Logout across all FCFs. */ 1505 /* Logout across all FCFs. */
1486 mcp->mb[0] = MBC_LIP_FULL_LOGIN; 1506 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1487 mcp->mb[1] = BIT_1; 1507 mcp->mb[1] = BIT_1;
@@ -2094,7 +2114,7 @@ qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
2094 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS; 2114 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2095 mcp->out_mb = MBX_0; 2115 mcp->out_mb = MBX_0;
2096 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; 2116 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2097 if (IS_QLA81XX(vha->hw)) 2117 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
2098 mcp->in_mb |= MBX_12; 2118 mcp->in_mb |= MBX_12;
2099 mcp->tov = MBX_TOV_SECONDS; 2119 mcp->tov = MBX_TOV_SECONDS;
2100 mcp->flags = 0; 2120 mcp->flags = 0;
@@ -2121,7 +2141,7 @@ qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
2121 *orig_iocb_cnt = mcp->mb[10]; 2141 *orig_iocb_cnt = mcp->mb[10];
2122 if (vha->hw->flags.npiv_supported && max_npiv_vports) 2142 if (vha->hw->flags.npiv_supported && max_npiv_vports)
2123 *max_npiv_vports = mcp->mb[11]; 2143 *max_npiv_vports = mcp->mb[11];
2124 if (IS_QLA81XX(vha->hw) && max_fcfs) 2144 if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
2125 *max_fcfs = mcp->mb[12]; 2145 *max_fcfs = mcp->mb[12];
2126 } 2146 }
2127 2147
@@ -2686,7 +2706,8 @@ qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
2686 2706
2687 ql_dbg(ql_dbg_mbx, vha, 0x10aa, "Entered %s.\n", __func__); 2707 ql_dbg(ql_dbg_mbx, vha, 0x10aa, "Entered %s.\n", __func__);
2688 2708
2689 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw)) 2709 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
2710 !IS_QLA83XX(vha->hw))
2690 return QLA_FUNCTION_FAILED; 2711 return QLA_FUNCTION_FAILED;
2691 2712
2692 if (unlikely(pci_channel_offline(vha->hw->pdev))) 2713 if (unlikely(pci_channel_offline(vha->hw->pdev)))
@@ -2828,7 +2849,7 @@ qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
2828 mcp->mb[0] = MBC_PORT_PARAMS; 2849 mcp->mb[0] = MBC_PORT_PARAMS;
2829 mcp->mb[1] = loop_id; 2850 mcp->mb[1] = loop_id;
2830 mcp->mb[2] = BIT_0; 2851 mcp->mb[2] = BIT_0;
2831 if (IS_QLA8XXX_TYPE(vha->hw)) 2852 if (IS_CNA_CAPABLE(vha->hw))
2832 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0); 2853 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
2833 else 2854 else
2834 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0); 2855 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
@@ -3298,6 +3319,8 @@ qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
3298 mcp->mb[12] = req->qos; 3319 mcp->mb[12] = req->qos;
3299 mcp->mb[11] = req->vp_idx; 3320 mcp->mb[11] = req->vp_idx;
3300 mcp->mb[13] = req->rid; 3321 mcp->mb[13] = req->rid;
3322 if (IS_QLA83XX(ha))
3323 mcp->mb[15] = 0;
3301 3324
3302 reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) + 3325 reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
3303 QLA_QUE_PAGE * req->id); 3326 QLA_QUE_PAGE * req->id);
@@ -3311,12 +3334,21 @@ qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
3311 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; 3334 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3312 mcp->in_mb = MBX_0; 3335 mcp->in_mb = MBX_0;
3313 mcp->flags = MBX_DMA_OUT; 3336 mcp->flags = MBX_DMA_OUT;
3314 mcp->tov = 60; 3337 mcp->tov = MBX_TOV_SECONDS * 2;
3338
3339 if (IS_QLA81XX(ha) || IS_QLA83XX(ha))
3340 mcp->in_mb |= MBX_1;
3341 if (IS_QLA83XX(ha)) {
3342 mcp->out_mb |= MBX_15;
3343 /* debug q create issue in SR-IOV */
3344 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3345 }
3315 3346
3316 spin_lock_irqsave(&ha->hardware_lock, flags); 3347 spin_lock_irqsave(&ha->hardware_lock, flags);
3317 if (!(req->options & BIT_0)) { 3348 if (!(req->options & BIT_0)) {
3318 WRT_REG_DWORD(&reg->req_q_in, 0); 3349 WRT_REG_DWORD(&reg->req_q_in, 0);
3319 WRT_REG_DWORD(&reg->req_q_out, 0); 3350 if (!IS_QLA83XX(ha))
3351 WRT_REG_DWORD(&reg->req_q_out, 0);
3320 } 3352 }
3321 req->req_q_in = &reg->req_q_in; 3353 req->req_q_in = &reg->req_q_in;
3322 req->req_q_out = &reg->req_q_out; 3354 req->req_q_out = &reg->req_q_out;
@@ -3354,6 +3386,8 @@ qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
3354 mcp->mb[5] = rsp->length; 3386 mcp->mb[5] = rsp->length;
3355 mcp->mb[14] = rsp->msix->entry; 3387 mcp->mb[14] = rsp->msix->entry;
3356 mcp->mb[13] = rsp->rid; 3388 mcp->mb[13] = rsp->rid;
3389 if (IS_QLA83XX(ha))
3390 mcp->mb[15] = 0;
3357 3391
3358 reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) + 3392 reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
3359 QLA_QUE_PAGE * rsp->id); 3393 QLA_QUE_PAGE * rsp->id);
@@ -3367,12 +3401,23 @@ qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
3367 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; 3401 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3368 mcp->in_mb = MBX_0; 3402 mcp->in_mb = MBX_0;
3369 mcp->flags = MBX_DMA_OUT; 3403 mcp->flags = MBX_DMA_OUT;
3370 mcp->tov = 60; 3404 mcp->tov = MBX_TOV_SECONDS * 2;
3405
3406 if (IS_QLA81XX(ha)) {
3407 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
3408 mcp->in_mb |= MBX_1;
3409 } else if (IS_QLA83XX(ha)) {
3410 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
3411 mcp->in_mb |= MBX_1;
3412 /* debug q create issue in SR-IOV */
3413 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3414 }
3371 3415
3372 spin_lock_irqsave(&ha->hardware_lock, flags); 3416 spin_lock_irqsave(&ha->hardware_lock, flags);
3373 if (!(rsp->options & BIT_0)) { 3417 if (!(rsp->options & BIT_0)) {
3374 WRT_REG_DWORD(&reg->rsp_q_out, 0); 3418 WRT_REG_DWORD(&reg->rsp_q_out, 0);
3375 WRT_REG_DWORD(&reg->rsp_q_in, 0); 3419 if (!IS_QLA83XX(ha))
3420 WRT_REG_DWORD(&reg->rsp_q_in, 0);
3376 } 3421 }
3377 3422
3378 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3423 spin_unlock_irqrestore(&ha->hardware_lock, flags);
@@ -3424,7 +3469,7 @@ qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
3424 3469
3425 ql_dbg(ql_dbg_mbx, vha, 0x10dc, "Entered %s.\n", __func__); 3470 ql_dbg(ql_dbg_mbx, vha, 0x10dc, "Entered %s.\n", __func__);
3426 3471
3427 if (!IS_QLA81XX(vha->hw)) 3472 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3428 return QLA_FUNCTION_FAILED; 3473 return QLA_FUNCTION_FAILED;
3429 3474
3430 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL; 3475 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
@@ -3454,7 +3499,7 @@ qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
3454 mbx_cmd_t mc; 3499 mbx_cmd_t mc;
3455 mbx_cmd_t *mcp = &mc; 3500 mbx_cmd_t *mcp = &mc;
3456 3501
3457 if (!IS_QLA81XX(vha->hw)) 3502 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3458 return QLA_FUNCTION_FAILED; 3503 return QLA_FUNCTION_FAILED;
3459 3504
3460 ql_dbg(ql_dbg_mbx, vha, 0x10df, "Entered %s.\n", __func__); 3505 ql_dbg(ql_dbg_mbx, vha, 0x10df, "Entered %s.\n", __func__);
@@ -3486,7 +3531,7 @@ qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
3486 mbx_cmd_t mc; 3531 mbx_cmd_t mc;
3487 mbx_cmd_t *mcp = &mc; 3532 mbx_cmd_t *mcp = &mc;
3488 3533
3489 if (!IS_QLA81XX(vha->hw)) 3534 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3490 return QLA_FUNCTION_FAILED; 3535 return QLA_FUNCTION_FAILED;
3491 3536
3492 ql_dbg(ql_dbg_mbx, vha, 0x10e2, "Entered %s.\n", __func__); 3537 ql_dbg(ql_dbg_mbx, vha, 0x10e2, "Entered %s.\n", __func__);
@@ -3641,7 +3686,7 @@ qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
3641 3686
3642 ql_dbg(ql_dbg_mbx, vha, 0x10ee, "Entered %s.\n", __func__); 3687 ql_dbg(ql_dbg_mbx, vha, 0x10ee, "Entered %s.\n", __func__);
3643 3688
3644 if (!IS_QLA8XXX_TYPE(vha->hw)) 3689 if (!IS_CNA_CAPABLE(vha->hw))
3645 return QLA_FUNCTION_FAILED; 3690 return QLA_FUNCTION_FAILED;
3646 3691
3647 mcp->mb[0] = MBC_GET_XGMAC_STATS; 3692 mcp->mb[0] = MBC_GET_XGMAC_STATS;
@@ -3680,7 +3725,7 @@ qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
3680 3725
3681 ql_dbg(ql_dbg_mbx, vha, 0x10f1, "Entered %s.\n", __func__); 3726 ql_dbg(ql_dbg_mbx, vha, 0x10f1, "Entered %s.\n", __func__);
3682 3727
3683 if (!IS_QLA8XXX_TYPE(vha->hw)) 3728 if (!IS_CNA_CAPABLE(vha->hw))
3684 return QLA_FUNCTION_FAILED; 3729 return QLA_FUNCTION_FAILED;
3685 3730
3686 mcp->mb[0] = MBC_GET_DCBX_PARAMS; 3731 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
@@ -3775,7 +3820,7 @@ qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
3775 3820
3776 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15| 3821 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
3777 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; 3822 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
3778 if (IS_QLA8XXX_TYPE(vha->hw)) 3823 if (IS_CNA_CAPABLE(vha->hw))
3779 mcp->out_mb |= MBX_2; 3824 mcp->out_mb |= MBX_2;
3780 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0; 3825 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
3781 3826
@@ -3813,7 +3858,7 @@ qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
3813 memset(mcp->mb, 0 , sizeof(mcp->mb)); 3858 memset(mcp->mb, 0 , sizeof(mcp->mb));
3814 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO; 3859 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
3815 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */ 3860 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
3816 if (IS_QLA8XXX_TYPE(ha)) { 3861 if (IS_CNA_CAPABLE(ha)) {
3817 mcp->mb[1] |= BIT_15; 3862 mcp->mb[1] |= BIT_15;
3818 mcp->mb[2] = vha->fcoe_fcf_idx; 3863 mcp->mb[2] = vha->fcoe_fcf_idx;
3819 } 3864 }
@@ -3831,13 +3876,14 @@ qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
3831 3876
3832 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15| 3877 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
3833 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; 3878 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
3834 if (IS_QLA8XXX_TYPE(ha)) 3879 if (IS_CNA_CAPABLE(ha))
3835 mcp->out_mb |= MBX_2; 3880 mcp->out_mb |= MBX_2;
3836 3881
3837 mcp->in_mb = MBX_0; 3882 mcp->in_mb = MBX_0;
3838 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || IS_QLA8XXX_TYPE(ha)) 3883 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
3884 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
3839 mcp->in_mb |= MBX_1; 3885 mcp->in_mb |= MBX_1;
3840 if (IS_QLA8XXX_TYPE(ha)) 3886 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
3841 mcp->in_mb |= MBX_3; 3887 mcp->in_mb |= MBX_3;
3842 3888
3843 mcp->tov = MBX_TOV_SECONDS; 3889 mcp->tov = MBX_TOV_SECONDS;
@@ -3976,6 +4022,7 @@ qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
3976 4022
3977 return rval; 4023 return rval;
3978} 4024}
4025
3979int 4026int
3980qla2x00_get_data_rate(scsi_qla_host_t *vha) 4027qla2x00_get_data_rate(scsi_qla_host_t *vha)
3981{ 4028{
@@ -3993,6 +4040,8 @@ qla2x00_get_data_rate(scsi_qla_host_t *vha)
3993 mcp->mb[1] = 0; 4040 mcp->mb[1] = 0;
3994 mcp->out_mb = MBX_1|MBX_0; 4041 mcp->out_mb = MBX_1|MBX_0;
3995 mcp->in_mb = MBX_2|MBX_1|MBX_0; 4042 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4043 if (IS_QLA83XX(ha))
4044 mcp->in_mb |= MBX_3;
3996 mcp->tov = MBX_TOV_SECONDS; 4045 mcp->tov = MBX_TOV_SECONDS;
3997 mcp->flags = 0; 4046 mcp->flags = 0;
3998 rval = qla2x00_mailbox_command(vha, mcp); 4047 rval = qla2x00_mailbox_command(vha, mcp);
@@ -4018,7 +4067,7 @@ qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4018 4067
4019 ql_dbg(ql_dbg_mbx, vha, 0x1109, "Entered %s.\n", __func__); 4068 ql_dbg(ql_dbg_mbx, vha, 0x1109, "Entered %s.\n", __func__);
4020 4069
4021 if (!IS_QLA81XX(ha)) 4070 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha))
4022 return QLA_FUNCTION_FAILED; 4071 return QLA_FUNCTION_FAILED;
4023 mcp->mb[0] = MBC_GET_PORT_CONFIG; 4072 mcp->mb[0] = MBC_GET_PORT_CONFIG;
4024 mcp->out_mb = MBX_0; 4073 mcp->out_mb = MBX_0;
@@ -4299,6 +4348,90 @@ qla82xx_md_get_template(scsi_qla_host_t *vha)
4299} 4348}
4300 4349
4301int 4350int
4351qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4352{
4353 int rval;
4354 struct qla_hw_data *ha = vha->hw;
4355 mbx_cmd_t mc;
4356 mbx_cmd_t *mcp = &mc;
4357
4358 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4359 return QLA_FUNCTION_FAILED;
4360
4361 ql_dbg(ql_dbg_mbx, vha, 0x1133, "Entered %s.\n", __func__);
4362
4363 memset(mcp, 0, sizeof(mbx_cmd_t));
4364 mcp->mb[0] = MBC_SET_LED_CONFIG;
4365 mcp->mb[1] = led_cfg[0];
4366 mcp->mb[2] = led_cfg[1];
4367 if (IS_QLA8031(ha)) {
4368 mcp->mb[3] = led_cfg[2];
4369 mcp->mb[4] = led_cfg[3];
4370 mcp->mb[5] = led_cfg[4];
4371 mcp->mb[6] = led_cfg[5];
4372 }
4373
4374 mcp->out_mb = MBX_2|MBX_1|MBX_0;
4375 if (IS_QLA8031(ha))
4376 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
4377 mcp->in_mb = MBX_0;
4378 mcp->tov = 30;
4379 mcp->flags = 0;
4380
4381 rval = qla2x00_mailbox_command(vha, mcp);
4382 if (rval != QLA_SUCCESS) {
4383 ql_dbg(ql_dbg_mbx, vha, 0x1134,
4384 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4385 } else {
4386 ql_dbg(ql_dbg_mbx, vha, 0x1135, "Done %s.\n", __func__);
4387 }
4388
4389 return rval;
4390}
4391
4392int
4393qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4394{
4395 int rval;
4396 struct qla_hw_data *ha = vha->hw;
4397 mbx_cmd_t mc;
4398 mbx_cmd_t *mcp = &mc;
4399
4400 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4401 return QLA_FUNCTION_FAILED;
4402
4403 ql_dbg(ql_dbg_mbx, vha, 0x1136, "Entered %s.\n", __func__);
4404
4405 memset(mcp, 0, sizeof(mbx_cmd_t));
4406 mcp->mb[0] = MBC_GET_LED_CONFIG;
4407
4408 mcp->out_mb = MBX_0;
4409 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4410 if (IS_QLA8031(ha))
4411 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
4412 mcp->tov = 30;
4413 mcp->flags = 0;
4414
4415 rval = qla2x00_mailbox_command(vha, mcp);
4416 if (rval != QLA_SUCCESS) {
4417 ql_dbg(ql_dbg_mbx, vha, 0x1137,
4418 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4419 } else {
4420 led_cfg[0] = mcp->mb[1];
4421 led_cfg[1] = mcp->mb[2];
4422 if (IS_QLA8031(ha)) {
4423 led_cfg[2] = mcp->mb[3];
4424 led_cfg[3] = mcp->mb[4];
4425 led_cfg[4] = mcp->mb[5];
4426 led_cfg[5] = mcp->mb[6];
4427 }
4428 ql_dbg(ql_dbg_mbx, vha, 0x1138, "Done %s.\n", __func__);
4429 }
4430
4431 return rval;
4432}
4433
4434int
4302qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable) 4435qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
4303{ 4436{
4304 int rval; 4437 int rval;
@@ -4321,7 +4454,7 @@ qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
4321 4454
4322 mcp->out_mb = MBX_7|MBX_0; 4455 mcp->out_mb = MBX_7|MBX_0;
4323 mcp->in_mb = MBX_0; 4456 mcp->in_mb = MBX_0;
4324 mcp->tov = 30; 4457 mcp->tov = MBX_TOV_SECONDS;
4325 mcp->flags = 0; 4458 mcp->flags = 0;
4326 4459
4327 rval = qla2x00_mailbox_command(vha, mcp); 4460 rval = qla2x00_mailbox_command(vha, mcp);
@@ -4335,3 +4468,38 @@ qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
4335 4468
4336 return rval; 4469 return rval;
4337} 4470}
4471
4472int
4473qla83xx_write_remote_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
4474{
4475 int rval;
4476 struct qla_hw_data *ha = vha->hw;
4477 mbx_cmd_t mc;
4478 mbx_cmd_t *mcp = &mc;
4479
4480 if (!IS_QLA83XX(ha))
4481 return QLA_FUNCTION_FAILED;
4482
4483 ql_dbg(ql_dbg_mbx, vha, 0x1130, "Entered %s.\n", __func__);
4484
4485 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
4486 mcp->mb[1] = LSW(reg);
4487 mcp->mb[2] = MSW(reg);
4488 mcp->mb[3] = LSW(data);
4489 mcp->mb[4] = MSW(data);
4490 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4491
4492 mcp->in_mb = MBX_1|MBX_0;
4493 mcp->tov = MBX_TOV_SECONDS;
4494 mcp->flags = 0;
4495 rval = qla2x00_mailbox_command(vha, mcp);
4496
4497 if (rval != QLA_SUCCESS) {
4498 ql_dbg(ql_dbg_mbx, vha, 0x1131,
4499 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4500 } else {
4501 ql_dbg(ql_dbg_mbx, vha, 0x1132,
4502 "Done %s.\n", __func__);
4503 }
4504 return rval;
4505}