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authorAndrew Vasquez <andrew.vasquez@qlogic.com>2009-01-05 14:18:11 -0500
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2009-01-07 16:51:44 -0500
commit3a03eb797ce76ae8868a1497e9e746ad0add1e3b (patch)
tree2dc17c39b7c1e35248b35f7433de8711f0b6656a /drivers/scsi/qla2xxx/qla_dbg.h
parent444786d7fdd770f67e29a068ec8ee981d323f7a7 (diff)
[SCSI] qla2xxx: Add ISP81XX support.
Codes to support new FCoE boards. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_dbg.h')
-rw-r--r--drivers/scsi/qla2xxx/qla_dbg.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h
index c1794a70a45f..f660dd70b72e 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.h
+++ b/drivers/scsi/qla2xxx/qla_dbg.h
@@ -251,6 +251,45 @@ struct qla25xx_fw_dump {
251 uint32_t ext_mem[1]; 251 uint32_t ext_mem[1];
252}; 252};
253 253
254struct qla81xx_fw_dump {
255 uint32_t host_status;
256 uint32_t host_risc_reg[32];
257 uint32_t pcie_regs[4];
258 uint32_t host_reg[32];
259 uint32_t shadow_reg[11];
260 uint32_t risc_io_reg;
261 uint16_t mailbox_reg[32];
262 uint32_t xseq_gp_reg[128];
263 uint32_t xseq_0_reg[48];
264 uint32_t xseq_1_reg[16];
265 uint32_t rseq_gp_reg[128];
266 uint32_t rseq_0_reg[32];
267 uint32_t rseq_1_reg[16];
268 uint32_t rseq_2_reg[16];
269 uint32_t aseq_gp_reg[128];
270 uint32_t aseq_0_reg[32];
271 uint32_t aseq_1_reg[16];
272 uint32_t aseq_2_reg[16];
273 uint32_t cmd_dma_reg[16];
274 uint32_t req0_dma_reg[15];
275 uint32_t resp0_dma_reg[15];
276 uint32_t req1_dma_reg[15];
277 uint32_t xmt0_dma_reg[32];
278 uint32_t xmt1_dma_reg[32];
279 uint32_t xmt2_dma_reg[32];
280 uint32_t xmt3_dma_reg[32];
281 uint32_t xmt4_dma_reg[32];
282 uint32_t xmt_data_dma_reg[16];
283 uint32_t rcvt0_data_dma_reg[32];
284 uint32_t rcvt1_data_dma_reg[32];
285 uint32_t risc_gp_reg[128];
286 uint32_t lmc_reg[128];
287 uint32_t fpm_hdw_reg[224];
288 uint32_t fb_hdw_reg[208];
289 uint32_t code_ram[0x2000];
290 uint32_t ext_mem[1];
291};
292
254#define EFT_NUM_BUFFERS 4 293#define EFT_NUM_BUFFERS 4
255#define EFT_BYTES_PER_BUFFER 0x4000 294#define EFT_BYTES_PER_BUFFER 0x4000
256#define EFT_SIZE ((EFT_BYTES_PER_BUFFER) * (EFT_NUM_BUFFERS)) 295#define EFT_SIZE ((EFT_BYTES_PER_BUFFER) * (EFT_NUM_BUFFERS))
@@ -313,5 +352,6 @@ struct qla2xxx_fw_dump {
313 struct qla2300_fw_dump isp23; 352 struct qla2300_fw_dump isp23;
314 struct qla24xx_fw_dump isp24; 353 struct qla24xx_fw_dump isp24;
315 struct qla25xx_fw_dump isp25; 354 struct qla25xx_fw_dump isp25;
355 struct qla81xx_fw_dump isp81;
316 } isp; 356 } isp;
317}; 357};