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authorChris Wilson <chris@chris-wilson.co.uk>2014-07-03 17:33:03 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-07-08 15:07:17 -0400
commit1f767e02d69f6a37a86aa94fd2c7e2528ae1161e (patch)
treef69839b379d53778752c9f3ad45afe751e6570fd /drivers/scsi/ppa.c
parent31685c258e0b0ad6aa486c5ec001382cf8a64212 (diff)
drm/i915: HWS must be in the mappable region for g33
On g33, the documentation states "HWS_PGA: Format = Bits 28:12 of graphics memory address (bits 31:29 MBZ)." which translates to that the address of the HWS must be below 256MiB, which is conveniently the mappable aperture. This also appears to be true (but not documented as so) for gen4 and gen5. To generalise we force it into the low mappable region for all non-LLC platforms. If we locate the HWS at the top of the GTT the machine will hard hang during boot (fails on pnv, gm45, ilk and byt, but works on snb, ivb, hsw). v2: Add comments to explain why use PIN_MAPPABLE even though we have no intention of mapping the object. (Ville) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/scsi/ppa.c')
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