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authorJames Smart <James.Smart@Emulex.Com>2009-11-18 15:41:10 -0500
committerJames Bottomley <James.Bottomley@suse.de>2009-12-04 13:01:52 -0500
commita747c9ce56533e376993473321d96ec8c23a3e43 (patch)
treee8ff74c01fa1bbd117acbd461f942a16f14b7b70 /drivers/scsi/lpfc/lpfc_sli4.h
parent1c6f4ef5d6be7ef4cbe92a86286217971f52e2cd (diff)
[SCSI] lpfc 8.3.6 : Hardware related fixes and changes
Hardware related Fixes and Changes. - Added new Adapter IDs and update default Adapter names. - Added PCI read after EQarm doorbell PCI write to flush the write and avoid spurrious interrupts when in INTx mode. - Phase out use of ONLINE registers. - Fix for lost MSI interrupt Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/lpfc/lpfc_sli4.h')
-rw-r--r--drivers/scsi/lpfc/lpfc_sli4.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h
index 6a4558ba93b6..25d66d070cf8 100644
--- a/drivers/scsi/lpfc/lpfc_sli4.h
+++ b/drivers/scsi/lpfc/lpfc_sli4.h
@@ -293,9 +293,8 @@ struct lpfc_sli4_hba {
293 /* BAR0 PCI config space register memory map */ 293 /* BAR0 PCI config space register memory map */
294 void __iomem *UERRLOregaddr; /* Address to UERR_STATUS_LO register */ 294 void __iomem *UERRLOregaddr; /* Address to UERR_STATUS_LO register */
295 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */ 295 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */
296 void __iomem *ONLINE0regaddr; /* Address to components of internal UE */ 296 void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */
297 void __iomem *ONLINE1regaddr; /* Address to components of internal UE */ 297 void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */
298#define LPFC_ONLINE_NERR 0xFFFFFFFF
299 void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */ 298 void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */
300 /* BAR1 FCoE function CSR register memory map */ 299 /* BAR1 FCoE function CSR register memory map */
301 void __iomem *STAregaddr; /* Address to HST_STATE register */ 300 void __iomem *STAregaddr; /* Address to HST_STATE register */
@@ -309,6 +308,8 @@ struct lpfc_sli4_hba {
309 void __iomem *MQDBregaddr; /* Address to MQ_DOORBELL register */ 308 void __iomem *MQDBregaddr; /* Address to MQ_DOORBELL register */
310 void __iomem *BMBXregaddr; /* Address to BootStrap MBX register */ 309 void __iomem *BMBXregaddr; /* Address to BootStrap MBX register */
311 310
311 uint32_t ue_mask_lo;
312 uint32_t ue_mask_hi;
312 struct msix_entry *msix_entries; 313 struct msix_entry *msix_entries;
313 uint32_t cfg_eqn; 314 uint32_t cfg_eqn;
314 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */ 315 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */