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authorDan Williams <dan.j.williams@intel.com>2011-06-28 18:05:53 -0400
committerDan Williams <dan.j.williams@intel.com>2011-07-03 07:04:52 -0400
commit852809559e4680ba4768262a6c3d21454fcd460e (patch)
treea67170a9dd2a4c9f15d215f4b96e890cdb53a7e7 /drivers/scsi/isci/phy.c
parent5076a1a97e2fa61c847a5fdd4b1991faf7716da6 (diff)
isci: unify isci_phy and scic_sds_phy
They are one in the same object so remove the distinction. The near duplicate fields (owning_port, and isci_port) will be cleaned up after the scic_sds_port isci_port unification. Reported-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/scsi/isci/phy.c')
-rw-r--r--drivers/scsi/isci/phy.c479
1 files changed, 238 insertions, 241 deletions
diff --git a/drivers/scsi/isci/phy.c b/drivers/scsi/isci/phy.c
index 98d93aeea75d..0e60fb7bc1ab 100644
--- a/drivers/scsi/isci/phy.c
+++ b/drivers/scsi/isci/phy.c
@@ -62,9 +62,9 @@
62/* Maximum arbitration wait time in micro-seconds */ 62/* Maximum arbitration wait time in micro-seconds */
63#define SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME (700) 63#define SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME (700)
64 64
65enum sas_linkrate sci_phy_linkrate(struct scic_sds_phy *sci_phy) 65enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy)
66{ 66{
67 return sci_phy->max_negotiated_speed; 67 return iphy->max_negotiated_speed;
68} 68}
69 69
70/* 70/*
@@ -80,23 +80,23 @@ enum sas_linkrate sci_phy_linkrate(struct scic_sds_phy *sci_phy)
80 * enum sci_status 80 * enum sci_status
81 */ 81 */
82static enum sci_status scic_sds_phy_transport_layer_initialization( 82static enum sci_status scic_sds_phy_transport_layer_initialization(
83 struct scic_sds_phy *sci_phy, 83 struct isci_phy *iphy,
84 struct scu_transport_layer_registers __iomem *transport_layer_registers) 84 struct scu_transport_layer_registers __iomem *transport_layer_registers)
85{ 85{
86 u32 tl_control; 86 u32 tl_control;
87 87
88 sci_phy->transport_layer_registers = transport_layer_registers; 88 iphy->transport_layer_registers = transport_layer_registers;
89 89
90 writel(SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX, 90 writel(SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX,
91 &sci_phy->transport_layer_registers->stp_rni); 91 &iphy->transport_layer_registers->stp_rni);
92 92
93 /* 93 /*
94 * Hardware team recommends that we enable the STP prefetch for all 94 * Hardware team recommends that we enable the STP prefetch for all
95 * transports 95 * transports
96 */ 96 */
97 tl_control = readl(&sci_phy->transport_layer_registers->control); 97 tl_control = readl(&iphy->transport_layer_registers->control);
98 tl_control |= SCU_TLCR_GEN_BIT(STP_WRITE_DATA_PREFETCH); 98 tl_control |= SCU_TLCR_GEN_BIT(STP_WRITE_DATA_PREFETCH);
99 writel(tl_control, &sci_phy->transport_layer_registers->control); 99 writel(tl_control, &iphy->transport_layer_registers->control);
100 100
101 return SCI_SUCCESS; 101 return SCI_SUCCESS;
102} 102}
@@ -109,12 +109,12 @@ static enum sci_status scic_sds_phy_transport_layer_initialization(
109 * enum sci_status 109 * enum sci_status
110 */ 110 */
111static enum sci_status 111static enum sci_status
112scic_sds_phy_link_layer_initialization(struct scic_sds_phy *sci_phy, 112scic_sds_phy_link_layer_initialization(struct isci_phy *iphy,
113 struct scu_link_layer_registers __iomem *link_layer_registers) 113 struct scu_link_layer_registers __iomem *link_layer_registers)
114{ 114{
115 struct scic_sds_controller *scic = 115 struct scic_sds_controller *scic =
116 sci_phy->owning_port->owning_controller; 116 iphy->owning_port->owning_controller;
117 int phy_idx = sci_phy->phy_index; 117 int phy_idx = iphy->phy_index;
118 struct sci_phy_user_params *phy_user = 118 struct sci_phy_user_params *phy_user =
119 &scic->user_parameters.sds1.phys[phy_idx]; 119 &scic->user_parameters.sds1.phys[phy_idx];
120 struct sci_phy_oem_params *phy_oem = 120 struct sci_phy_oem_params *phy_oem =
@@ -126,7 +126,7 @@ scic_sds_phy_link_layer_initialization(struct scic_sds_phy *sci_phy,
126 u32 llctl, link_rate; 126 u32 llctl, link_rate;
127 u32 clksm_value = 0; 127 u32 clksm_value = 0;
128 128
129 sci_phy->link_layer_registers = link_layer_registers; 129 iphy->link_layer_registers = link_layer_registers;
130 130
131 /* Set our IDENTIFY frame data */ 131 /* Set our IDENTIFY frame data */
132 #define SCI_END_DEVICE 0x01 132 #define SCI_END_DEVICE 0x01
@@ -136,32 +136,32 @@ scic_sds_phy_link_layer_initialization(struct scic_sds_phy *sci_phy,
136 SCU_SAS_TIID_GEN_BIT(STP_INITIATOR) | 136 SCU_SAS_TIID_GEN_BIT(STP_INITIATOR) |
137 SCU_SAS_TIID_GEN_BIT(DA_SATA_HOST) | 137 SCU_SAS_TIID_GEN_BIT(DA_SATA_HOST) |
138 SCU_SAS_TIID_GEN_VAL(DEVICE_TYPE, SCI_END_DEVICE), 138 SCU_SAS_TIID_GEN_VAL(DEVICE_TYPE, SCI_END_DEVICE),
139 &sci_phy->link_layer_registers->transmit_identification); 139 &iphy->link_layer_registers->transmit_identification);
140 140
141 /* Write the device SAS Address */ 141 /* Write the device SAS Address */
142 writel(0xFEDCBA98, 142 writel(0xFEDCBA98,
143 &sci_phy->link_layer_registers->sas_device_name_high); 143 &iphy->link_layer_registers->sas_device_name_high);
144 writel(phy_idx, &sci_phy->link_layer_registers->sas_device_name_low); 144 writel(phy_idx, &iphy->link_layer_registers->sas_device_name_low);
145 145
146 /* Write the source SAS Address */ 146 /* Write the source SAS Address */
147 writel(phy_oem->sas_address.high, 147 writel(phy_oem->sas_address.high,
148 &sci_phy->link_layer_registers->source_sas_address_high); 148 &iphy->link_layer_registers->source_sas_address_high);
149 writel(phy_oem->sas_address.low, 149 writel(phy_oem->sas_address.low,
150 &sci_phy->link_layer_registers->source_sas_address_low); 150 &iphy->link_layer_registers->source_sas_address_low);
151 151
152 /* Clear and Set the PHY Identifier */ 152 /* Clear and Set the PHY Identifier */
153 writel(0, &sci_phy->link_layer_registers->identify_frame_phy_id); 153 writel(0, &iphy->link_layer_registers->identify_frame_phy_id);
154 writel(SCU_SAS_TIPID_GEN_VALUE(ID, phy_idx), 154 writel(SCU_SAS_TIPID_GEN_VALUE(ID, phy_idx),
155 &sci_phy->link_layer_registers->identify_frame_phy_id); 155 &iphy->link_layer_registers->identify_frame_phy_id);
156 156
157 /* Change the initial state of the phy configuration register */ 157 /* Change the initial state of the phy configuration register */
158 phy_configuration = 158 phy_configuration =
159 readl(&sci_phy->link_layer_registers->phy_configuration); 159 readl(&iphy->link_layer_registers->phy_configuration);
160 160
161 /* Hold OOB state machine in reset */ 161 /* Hold OOB state machine in reset */
162 phy_configuration |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET); 162 phy_configuration |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
163 writel(phy_configuration, 163 writel(phy_configuration,
164 &sci_phy->link_layer_registers->phy_configuration); 164 &iphy->link_layer_registers->phy_configuration);
165 165
166 /* Configure the SNW capabilities */ 166 /* Configure the SNW capabilities */
167 phy_cap.all = 0; 167 phy_cap.all = 0;
@@ -191,14 +191,14 @@ scic_sds_phy_link_layer_initialization(struct scic_sds_phy *sci_phy,
191 if ((parity_count % 2) != 0) 191 if ((parity_count % 2) != 0)
192 phy_cap.parity = 1; 192 phy_cap.parity = 1;
193 193
194 writel(phy_cap.all, &sci_phy->link_layer_registers->phy_capabilities); 194 writel(phy_cap.all, &iphy->link_layer_registers->phy_capabilities);
195 195
196 /* Set the enable spinup period but disable the ability to send 196 /* Set the enable spinup period but disable the ability to send
197 * notify enable spinup 197 * notify enable spinup
198 */ 198 */
199 writel(SCU_ENSPINUP_GEN_VAL(COUNT, 199 writel(SCU_ENSPINUP_GEN_VAL(COUNT,
200 phy_user->notify_enable_spin_up_insertion_frequency), 200 phy_user->notify_enable_spin_up_insertion_frequency),
201 &sci_phy->link_layer_registers->notify_enable_spinup_control); 201 &iphy->link_layer_registers->notify_enable_spinup_control);
202 202
203 /* Write the ALIGN Insertion Ferequency for connected phy and 203 /* Write the ALIGN Insertion Ferequency for connected phy and
204 * inpendent of connected state 204 * inpendent of connected state
@@ -209,11 +209,11 @@ scic_sds_phy_link_layer_initialization(struct scic_sds_phy *sci_phy,
209 clksm_value |= SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(GENERAL, 209 clksm_value |= SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(GENERAL,
210 phy_user->align_insertion_frequency); 210 phy_user->align_insertion_frequency);
211 211
212 writel(clksm_value, &sci_phy->link_layer_registers->clock_skew_management); 212 writel(clksm_value, &iphy->link_layer_registers->clock_skew_management);
213 213
214 /* @todo Provide a way to write this register correctly */ 214 /* @todo Provide a way to write this register correctly */
215 writel(0x02108421, 215 writel(0x02108421,
216 &sci_phy->link_layer_registers->afe_lookup_table_control); 216 &iphy->link_layer_registers->afe_lookup_table_control);
217 217
218 llctl = SCU_SAS_LLCTL_GEN_VAL(NO_OUTBOUND_TASK_TIMEOUT, 218 llctl = SCU_SAS_LLCTL_GEN_VAL(NO_OUTBOUND_TASK_TIMEOUT,
219 (u8)scic->user_parameters.sds1.no_outbound_task_timeout); 219 (u8)scic->user_parameters.sds1.no_outbound_task_timeout);
@@ -230,7 +230,7 @@ scic_sds_phy_link_layer_initialization(struct scic_sds_phy *sci_phy,
230 break; 230 break;
231 } 231 }
232 llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate); 232 llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate);
233 writel(llctl, &sci_phy->link_layer_registers->link_layer_control); 233 writel(llctl, &iphy->link_layer_registers->link_layer_control);
234 234
235 if (is_a0() || is_a2()) { 235 if (is_a0() || is_a2()) {
236 /* Program the max ARB time for the PHY to 700us so we inter-operate with 236 /* Program the max ARB time for the PHY to 700us so we inter-operate with
@@ -239,14 +239,14 @@ scic_sds_phy_link_layer_initialization(struct scic_sds_phy *sci_phy,
239 * generate the break. 239 * generate the break.
240 */ 240 */
241 writel(SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME, 241 writel(SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME,
242 &sci_phy->link_layer_registers->maximum_arbitration_wait_timer_timeout); 242 &iphy->link_layer_registers->maximum_arbitration_wait_timer_timeout);
243 } 243 }
244 244
245 /* Disable link layer hang detection, rely on the OS timeout for I/O timeouts. */ 245 /* Disable link layer hang detection, rely on the OS timeout for I/O timeouts. */
246 writel(0, &sci_phy->link_layer_registers->link_layer_hang_detection_timeout); 246 writel(0, &iphy->link_layer_registers->link_layer_hang_detection_timeout);
247 247
248 /* We can exit the initial state to the stopped state */ 248 /* We can exit the initial state to the stopped state */
249 sci_change_state(&sci_phy->sm, SCI_PHY_STOPPED); 249 sci_change_state(&iphy->sm, SCI_PHY_STOPPED);
250 250
251 return SCI_SUCCESS; 251 return SCI_SUCCESS;
252} 252}
@@ -254,8 +254,8 @@ scic_sds_phy_link_layer_initialization(struct scic_sds_phy *sci_phy,
254static void phy_sata_timeout(unsigned long data) 254static void phy_sata_timeout(unsigned long data)
255{ 255{
256 struct sci_timer *tmr = (struct sci_timer *)data; 256 struct sci_timer *tmr = (struct sci_timer *)data;
257 struct scic_sds_phy *sci_phy = container_of(tmr, typeof(*sci_phy), sata_timer); 257 struct isci_phy *iphy = container_of(tmr, typeof(*iphy), sata_timer);
258 struct isci_host *ihost = scic_to_ihost(sci_phy->owning_port->owning_controller); 258 struct isci_host *ihost = scic_to_ihost(iphy->owning_port->owning_controller);
259 unsigned long flags; 259 unsigned long flags;
260 260
261 spin_lock_irqsave(&ihost->scic_lock, flags); 261 spin_lock_irqsave(&ihost->scic_lock, flags);
@@ -263,13 +263,13 @@ static void phy_sata_timeout(unsigned long data)
263 if (tmr->cancel) 263 if (tmr->cancel)
264 goto done; 264 goto done;
265 265
266 dev_dbg(sciphy_to_dev(sci_phy), 266 dev_dbg(sciphy_to_dev(iphy),
267 "%s: SCIC SDS Phy 0x%p did not receive signature fis before " 267 "%s: SCIC SDS Phy 0x%p did not receive signature fis before "
268 "timeout.\n", 268 "timeout.\n",
269 __func__, 269 __func__,
270 sci_phy); 270 iphy);
271 271
272 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 272 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
273done: 273done:
274 spin_unlock_irqrestore(&ihost->scic_lock, flags); 274 spin_unlock_irqrestore(&ihost->scic_lock, flags);
275} 275}
@@ -287,30 +287,30 @@ done:
287 * values indicate a handle/pointer to the port containing the phy. 287 * values indicate a handle/pointer to the port containing the phy.
288 */ 288 */
289struct scic_sds_port *phy_get_non_dummy_port( 289struct scic_sds_port *phy_get_non_dummy_port(
290 struct scic_sds_phy *sci_phy) 290 struct isci_phy *iphy)
291{ 291{
292 if (scic_sds_port_get_index(sci_phy->owning_port) == SCIC_SDS_DUMMY_PORT) 292 if (scic_sds_port_get_index(iphy->owning_port) == SCIC_SDS_DUMMY_PORT)
293 return NULL; 293 return NULL;
294 294
295 return sci_phy->owning_port; 295 return iphy->owning_port;
296} 296}
297 297
298/** 298/**
299 * This method will assign a port to the phy object. 299 * This method will assign a port to the phy object.
300 * @out]: sci_phy This parameter specifies the phy for which to assign a port 300 * @out]: iphy This parameter specifies the phy for which to assign a port
301 * object. 301 * object.
302 * 302 *
303 * 303 *
304 */ 304 */
305void scic_sds_phy_set_port( 305void scic_sds_phy_set_port(
306 struct scic_sds_phy *sci_phy, 306 struct isci_phy *iphy,
307 struct scic_sds_port *sci_port) 307 struct scic_sds_port *sci_port)
308{ 308{
309 sci_phy->owning_port = sci_port; 309 iphy->owning_port = sci_port;
310 310
311 if (sci_phy->bcn_received_while_port_unassigned) { 311 if (iphy->bcn_received_while_port_unassigned) {
312 sci_phy->bcn_received_while_port_unassigned = false; 312 iphy->bcn_received_while_port_unassigned = false;
313 scic_sds_port_broadcast_change_received(sci_phy->owning_port, sci_phy); 313 scic_sds_port_broadcast_change_received(iphy->owning_port, iphy);
314 } 314 }
315} 315}
316 316
@@ -322,22 +322,22 @@ void scic_sds_phy_set_port(
322 * enum sci_status 322 * enum sci_status
323 */ 323 */
324enum sci_status scic_sds_phy_initialize( 324enum sci_status scic_sds_phy_initialize(
325 struct scic_sds_phy *sci_phy, 325 struct isci_phy *iphy,
326 struct scu_transport_layer_registers __iomem *transport_layer_registers, 326 struct scu_transport_layer_registers __iomem *transport_layer_registers,
327 struct scu_link_layer_registers __iomem *link_layer_registers) 327 struct scu_link_layer_registers __iomem *link_layer_registers)
328{ 328{
329 /* Perfrom the initialization of the TL hardware */ 329 /* Perfrom the initialization of the TL hardware */
330 scic_sds_phy_transport_layer_initialization( 330 scic_sds_phy_transport_layer_initialization(
331 sci_phy, 331 iphy,
332 transport_layer_registers); 332 transport_layer_registers);
333 333
334 /* Perofrm the initialization of the PE hardware */ 334 /* Perofrm the initialization of the PE hardware */
335 scic_sds_phy_link_layer_initialization(sci_phy, link_layer_registers); 335 scic_sds_phy_link_layer_initialization(iphy, link_layer_registers);
336 336
337 /* 337 /*
338 * There is nothing that needs to be done in this state just 338 * There is nothing that needs to be done in this state just
339 * transition to the stopped state. */ 339 * transition to the stopped state. */
340 sci_change_state(&sci_phy->sm, SCI_PHY_STOPPED); 340 sci_change_state(&iphy->sm, SCI_PHY_STOPPED);
341 341
342 return SCI_SUCCESS; 342 return SCI_SUCCESS;
343} 343}
@@ -345,27 +345,27 @@ enum sci_status scic_sds_phy_initialize(
345/** 345/**
346 * This method assigns the direct attached device ID for this phy. 346 * This method assigns the direct attached device ID for this phy.
347 * 347 *
348 * @sci_phy The phy for which the direct attached device id is to 348 * @iphy The phy for which the direct attached device id is to
349 * be assigned. 349 * be assigned.
350 * @device_id The direct attached device ID to assign to the phy. 350 * @device_id The direct attached device ID to assign to the phy.
351 * This will either be the RNi for the device or an invalid RNi if there 351 * This will either be the RNi for the device or an invalid RNi if there
352 * is no current device assigned to the phy. 352 * is no current device assigned to the phy.
353 */ 353 */
354void scic_sds_phy_setup_transport( 354void scic_sds_phy_setup_transport(
355 struct scic_sds_phy *sci_phy, 355 struct isci_phy *iphy,
356 u32 device_id) 356 u32 device_id)
357{ 357{
358 u32 tl_control; 358 u32 tl_control;
359 359
360 writel(device_id, &sci_phy->transport_layer_registers->stp_rni); 360 writel(device_id, &iphy->transport_layer_registers->stp_rni);
361 361
362 /* 362 /*
363 * The read should guarantee that the first write gets posted 363 * The read should guarantee that the first write gets posted
364 * before the next write 364 * before the next write
365 */ 365 */
366 tl_control = readl(&sci_phy->transport_layer_registers->control); 366 tl_control = readl(&iphy->transport_layer_registers->control);
367 tl_control |= SCU_TLCR_GEN_BIT(CLEAR_TCI_NCQ_MAPPING_TABLE); 367 tl_control |= SCU_TLCR_GEN_BIT(CLEAR_TCI_NCQ_MAPPING_TABLE);
368 writel(tl_control, &sci_phy->transport_layer_registers->control); 368 writel(tl_control, &iphy->transport_layer_registers->control);
369} 369}
370 370
371/** 371/**
@@ -376,75 +376,74 @@ void scic_sds_phy_setup_transport(
376 * hardware protocol engine. none 376 * hardware protocol engine. none
377 */ 377 */
378static void scic_sds_phy_suspend( 378static void scic_sds_phy_suspend(
379 struct scic_sds_phy *sci_phy) 379 struct isci_phy *iphy)
380{ 380{
381 u32 scu_sas_pcfg_value; 381 u32 scu_sas_pcfg_value;
382 382
383 scu_sas_pcfg_value = 383 scu_sas_pcfg_value =
384 readl(&sci_phy->link_layer_registers->phy_configuration); 384 readl(&iphy->link_layer_registers->phy_configuration);
385 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE); 385 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE);
386 writel(scu_sas_pcfg_value, 386 writel(scu_sas_pcfg_value,
387 &sci_phy->link_layer_registers->phy_configuration); 387 &iphy->link_layer_registers->phy_configuration);
388 388
389 scic_sds_phy_setup_transport( 389 scic_sds_phy_setup_transport(
390 sci_phy, 390 iphy,
391 SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX); 391 SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX);
392} 392}
393 393
394void scic_sds_phy_resume(struct scic_sds_phy *sci_phy) 394void scic_sds_phy_resume(struct isci_phy *iphy)
395{ 395{
396 u32 scu_sas_pcfg_value; 396 u32 scu_sas_pcfg_value;
397 397
398 scu_sas_pcfg_value = 398 scu_sas_pcfg_value =
399 readl(&sci_phy->link_layer_registers->phy_configuration); 399 readl(&iphy->link_layer_registers->phy_configuration);
400 scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE); 400 scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE);
401 writel(scu_sas_pcfg_value, 401 writel(scu_sas_pcfg_value,
402 &sci_phy->link_layer_registers->phy_configuration); 402 &iphy->link_layer_registers->phy_configuration);
403} 403}
404 404
405void scic_sds_phy_get_sas_address(struct scic_sds_phy *sci_phy, 405void scic_sds_phy_get_sas_address(struct isci_phy *iphy,
406 struct sci_sas_address *sas_address) 406 struct sci_sas_address *sas_address)
407{ 407{
408 sas_address->high = readl(&sci_phy->link_layer_registers->source_sas_address_high); 408 sas_address->high = readl(&iphy->link_layer_registers->source_sas_address_high);
409 sas_address->low = readl(&sci_phy->link_layer_registers->source_sas_address_low); 409 sas_address->low = readl(&iphy->link_layer_registers->source_sas_address_low);
410} 410}
411 411
412void scic_sds_phy_get_attached_sas_address(struct scic_sds_phy *sci_phy, 412void scic_sds_phy_get_attached_sas_address(struct isci_phy *iphy,
413 struct sci_sas_address *sas_address) 413 struct sci_sas_address *sas_address)
414{ 414{
415 struct sas_identify_frame *iaf; 415 struct sas_identify_frame *iaf;
416 struct isci_phy *iphy = sci_phy_to_iphy(sci_phy);
417 416
418 iaf = &iphy->frame_rcvd.iaf; 417 iaf = &iphy->frame_rcvd.iaf;
419 memcpy(sas_address, iaf->sas_addr, SAS_ADDR_SIZE); 418 memcpy(sas_address, iaf->sas_addr, SAS_ADDR_SIZE);
420} 419}
421 420
422void scic_sds_phy_get_protocols(struct scic_sds_phy *sci_phy, 421void scic_sds_phy_get_protocols(struct isci_phy *iphy,
423 struct scic_phy_proto *protocols) 422 struct scic_phy_proto *protocols)
424{ 423{
425 protocols->all = 424 protocols->all =
426 (u16)(readl(&sci_phy-> 425 (u16)(readl(&iphy->
427 link_layer_registers->transmit_identification) & 426 link_layer_registers->transmit_identification) &
428 0x0000FFFF); 427 0x0000FFFF);
429} 428}
430 429
431enum sci_status scic_sds_phy_start(struct scic_sds_phy *sci_phy) 430enum sci_status scic_sds_phy_start(struct isci_phy *iphy)
432{ 431{
433 enum scic_sds_phy_states state = sci_phy->sm.current_state_id; 432 enum scic_sds_phy_states state = iphy->sm.current_state_id;
434 433
435 if (state != SCI_PHY_STOPPED) { 434 if (state != SCI_PHY_STOPPED) {
436 dev_dbg(sciphy_to_dev(sci_phy), 435 dev_dbg(sciphy_to_dev(iphy),
437 "%s: in wrong state: %d\n", __func__, state); 436 "%s: in wrong state: %d\n", __func__, state);
438 return SCI_FAILURE_INVALID_STATE; 437 return SCI_FAILURE_INVALID_STATE;
439 } 438 }
440 439
441 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 440 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
442 return SCI_SUCCESS; 441 return SCI_SUCCESS;
443} 442}
444 443
445enum sci_status scic_sds_phy_stop(struct scic_sds_phy *sci_phy) 444enum sci_status scic_sds_phy_stop(struct isci_phy *iphy)
446{ 445{
447 enum scic_sds_phy_states state = sci_phy->sm.current_state_id; 446 enum scic_sds_phy_states state = iphy->sm.current_state_id;
448 447
449 switch (state) { 448 switch (state) {
450 case SCI_PHY_SUB_INITIAL: 449 case SCI_PHY_SUB_INITIAL:
@@ -459,43 +458,43 @@ enum sci_status scic_sds_phy_stop(struct scic_sds_phy *sci_phy)
459 case SCI_PHY_READY: 458 case SCI_PHY_READY:
460 break; 459 break;
461 default: 460 default:
462 dev_dbg(sciphy_to_dev(sci_phy), 461 dev_dbg(sciphy_to_dev(iphy),
463 "%s: in wrong state: %d\n", __func__, state); 462 "%s: in wrong state: %d\n", __func__, state);
464 return SCI_FAILURE_INVALID_STATE; 463 return SCI_FAILURE_INVALID_STATE;
465 } 464 }
466 465
467 sci_change_state(&sci_phy->sm, SCI_PHY_STOPPED); 466 sci_change_state(&iphy->sm, SCI_PHY_STOPPED);
468 return SCI_SUCCESS; 467 return SCI_SUCCESS;
469} 468}
470 469
471enum sci_status scic_sds_phy_reset(struct scic_sds_phy *sci_phy) 470enum sci_status scic_sds_phy_reset(struct isci_phy *iphy)
472{ 471{
473 enum scic_sds_phy_states state = sci_phy->sm.current_state_id; 472 enum scic_sds_phy_states state = iphy->sm.current_state_id;
474 473
475 if (state != SCI_PHY_READY) { 474 if (state != SCI_PHY_READY) {
476 dev_dbg(sciphy_to_dev(sci_phy), 475 dev_dbg(sciphy_to_dev(iphy),
477 "%s: in wrong state: %d\n", __func__, state); 476 "%s: in wrong state: %d\n", __func__, state);
478 return SCI_FAILURE_INVALID_STATE; 477 return SCI_FAILURE_INVALID_STATE;
479 } 478 }
480 479
481 sci_change_state(&sci_phy->sm, SCI_PHY_RESETTING); 480 sci_change_state(&iphy->sm, SCI_PHY_RESETTING);
482 return SCI_SUCCESS; 481 return SCI_SUCCESS;
483} 482}
484 483
485enum sci_status scic_sds_phy_consume_power_handler(struct scic_sds_phy *sci_phy) 484enum sci_status scic_sds_phy_consume_power_handler(struct isci_phy *iphy)
486{ 485{
487 enum scic_sds_phy_states state = sci_phy->sm.current_state_id; 486 enum scic_sds_phy_states state = iphy->sm.current_state_id;
488 487
489 switch (state) { 488 switch (state) {
490 case SCI_PHY_SUB_AWAIT_SAS_POWER: { 489 case SCI_PHY_SUB_AWAIT_SAS_POWER: {
491 u32 enable_spinup; 490 u32 enable_spinup;
492 491
493 enable_spinup = readl(&sci_phy->link_layer_registers->notify_enable_spinup_control); 492 enable_spinup = readl(&iphy->link_layer_registers->notify_enable_spinup_control);
494 enable_spinup |= SCU_ENSPINUP_GEN_BIT(ENABLE); 493 enable_spinup |= SCU_ENSPINUP_GEN_BIT(ENABLE);
495 writel(enable_spinup, &sci_phy->link_layer_registers->notify_enable_spinup_control); 494 writel(enable_spinup, &iphy->link_layer_registers->notify_enable_spinup_control);
496 495
497 /* Change state to the final state this substate machine has run to completion */ 496 /* Change state to the final state this substate machine has run to completion */
498 sci_change_state(&sci_phy->sm, SCI_PHY_SUB_FINAL); 497 sci_change_state(&iphy->sm, SCI_PHY_SUB_FINAL);
499 498
500 return SCI_SUCCESS; 499 return SCI_SUCCESS;
501 } 500 }
@@ -504,26 +503,26 @@ enum sci_status scic_sds_phy_consume_power_handler(struct scic_sds_phy *sci_phy)
504 503
505 /* Release the spinup hold state and reset the OOB state machine */ 504 /* Release the spinup hold state and reset the OOB state machine */
506 scu_sas_pcfg_value = 505 scu_sas_pcfg_value =
507 readl(&sci_phy->link_layer_registers->phy_configuration); 506 readl(&iphy->link_layer_registers->phy_configuration);
508 scu_sas_pcfg_value &= 507 scu_sas_pcfg_value &=
509 ~(SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD) | SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE)); 508 ~(SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD) | SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE));
510 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET); 509 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
511 writel(scu_sas_pcfg_value, 510 writel(scu_sas_pcfg_value,
512 &sci_phy->link_layer_registers->phy_configuration); 511 &iphy->link_layer_registers->phy_configuration);
513 512
514 /* Now restart the OOB operation */ 513 /* Now restart the OOB operation */
515 scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET); 514 scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
516 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE); 515 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE);
517 writel(scu_sas_pcfg_value, 516 writel(scu_sas_pcfg_value,
518 &sci_phy->link_layer_registers->phy_configuration); 517 &iphy->link_layer_registers->phy_configuration);
519 518
520 /* Change state to the final state this substate machine has run to completion */ 519 /* Change state to the final state this substate machine has run to completion */
521 sci_change_state(&sci_phy->sm, SCI_PHY_SUB_AWAIT_SATA_PHY_EN); 520 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_PHY_EN);
522 521
523 return SCI_SUCCESS; 522 return SCI_SUCCESS;
524 } 523 }
525 default: 524 default:
526 dev_dbg(sciphy_to_dev(sci_phy), 525 dev_dbg(sciphy_to_dev(iphy),
527 "%s: in wrong state: %d\n", __func__, state); 526 "%s: in wrong state: %d\n", __func__, state);
528 return SCI_FAILURE_INVALID_STATE; 527 return SCI_FAILURE_INVALID_STATE;
529 } 528 }
@@ -545,19 +544,19 @@ enum sci_status scic_sds_phy_consume_power_handler(struct scic_sds_phy *sci_phy)
545 * none 544 * none
546 */ 545 */
547static void scic_sds_phy_start_sas_link_training( 546static void scic_sds_phy_start_sas_link_training(
548 struct scic_sds_phy *sci_phy) 547 struct isci_phy *iphy)
549{ 548{
550 u32 phy_control; 549 u32 phy_control;
551 550
552 phy_control = 551 phy_control =
553 readl(&sci_phy->link_layer_registers->phy_configuration); 552 readl(&iphy->link_layer_registers->phy_configuration);
554 phy_control |= SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD); 553 phy_control |= SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD);
555 writel(phy_control, 554 writel(phy_control,
556 &sci_phy->link_layer_registers->phy_configuration); 555 &iphy->link_layer_registers->phy_configuration);
557 556
558 sci_change_state(&sci_phy->sm, SCI_PHY_SUB_AWAIT_SAS_SPEED_EN); 557 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SAS_SPEED_EN);
559 558
560 sci_phy->protocol = SCIC_SDS_PHY_PROTOCOL_SAS; 559 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_SAS;
561} 560}
562 561
563/** 562/**
@@ -569,11 +568,11 @@ static void scic_sds_phy_start_sas_link_training(
569 * SPINUP HOLD event when the state machine was expecting a SAS PHY event. none 568 * SPINUP HOLD event when the state machine was expecting a SAS PHY event. none
570 */ 569 */
571static void scic_sds_phy_start_sata_link_training( 570static void scic_sds_phy_start_sata_link_training(
572 struct scic_sds_phy *sci_phy) 571 struct isci_phy *iphy)
573{ 572{
574 sci_change_state(&sci_phy->sm, SCI_PHY_SUB_AWAIT_SATA_POWER); 573 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_POWER);
575 574
576 sci_phy->protocol = SCIC_SDS_PHY_PROTOCOL_SATA; 575 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_SATA;
577} 576}
578 577
579/** 578/**
@@ -588,33 +587,33 @@ static void scic_sds_phy_start_sata_link_training(
588 * 587 *
589 */ 588 */
590static void scic_sds_phy_complete_link_training( 589static void scic_sds_phy_complete_link_training(
591 struct scic_sds_phy *sci_phy, 590 struct isci_phy *iphy,
592 enum sas_linkrate max_link_rate, 591 enum sas_linkrate max_link_rate,
593 u32 next_state) 592 u32 next_state)
594{ 593{
595 sci_phy->max_negotiated_speed = max_link_rate; 594 iphy->max_negotiated_speed = max_link_rate;
596 595
597 sci_change_state(&sci_phy->sm, next_state); 596 sci_change_state(&iphy->sm, next_state);
598} 597}
599 598
600enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy, 599enum sci_status scic_sds_phy_event_handler(struct isci_phy *iphy,
601 u32 event_code) 600 u32 event_code)
602{ 601{
603 enum scic_sds_phy_states state = sci_phy->sm.current_state_id; 602 enum scic_sds_phy_states state = iphy->sm.current_state_id;
604 603
605 switch (state) { 604 switch (state) {
606 case SCI_PHY_SUB_AWAIT_OSSP_EN: 605 case SCI_PHY_SUB_AWAIT_OSSP_EN:
607 switch (scu_get_event_code(event_code)) { 606 switch (scu_get_event_code(event_code)) {
608 case SCU_EVENT_SAS_PHY_DETECTED: 607 case SCU_EVENT_SAS_PHY_DETECTED:
609 scic_sds_phy_start_sas_link_training(sci_phy); 608 scic_sds_phy_start_sas_link_training(iphy);
610 sci_phy->is_in_link_training = true; 609 iphy->is_in_link_training = true;
611 break; 610 break;
612 case SCU_EVENT_SATA_SPINUP_HOLD: 611 case SCU_EVENT_SATA_SPINUP_HOLD:
613 scic_sds_phy_start_sata_link_training(sci_phy); 612 scic_sds_phy_start_sata_link_training(iphy);
614 sci_phy->is_in_link_training = true; 613 iphy->is_in_link_training = true;
615 break; 614 break;
616 default: 615 default:
617 dev_dbg(sciphy_to_dev(sci_phy), 616 dev_dbg(sciphy_to_dev(iphy),
618 "%s: PHY starting substate machine received " 617 "%s: PHY starting substate machine received "
619 "unexpected event_code %x\n", 618 "unexpected event_code %x\n",
620 __func__, 619 __func__,
@@ -632,21 +631,21 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
632 case SCU_EVENT_SAS_15: 631 case SCU_EVENT_SAS_15:
633 case SCU_EVENT_SAS_15_SSC: 632 case SCU_EVENT_SAS_15_SSC:
634 scic_sds_phy_complete_link_training( 633 scic_sds_phy_complete_link_training(
635 sci_phy, 634 iphy,
636 SAS_LINK_RATE_1_5_GBPS, 635 SAS_LINK_RATE_1_5_GBPS,
637 SCI_PHY_SUB_AWAIT_IAF_UF); 636 SCI_PHY_SUB_AWAIT_IAF_UF);
638 break; 637 break;
639 case SCU_EVENT_SAS_30: 638 case SCU_EVENT_SAS_30:
640 case SCU_EVENT_SAS_30_SSC: 639 case SCU_EVENT_SAS_30_SSC:
641 scic_sds_phy_complete_link_training( 640 scic_sds_phy_complete_link_training(
642 sci_phy, 641 iphy,
643 SAS_LINK_RATE_3_0_GBPS, 642 SAS_LINK_RATE_3_0_GBPS,
644 SCI_PHY_SUB_AWAIT_IAF_UF); 643 SCI_PHY_SUB_AWAIT_IAF_UF);
645 break; 644 break;
646 case SCU_EVENT_SAS_60: 645 case SCU_EVENT_SAS_60:
647 case SCU_EVENT_SAS_60_SSC: 646 case SCU_EVENT_SAS_60_SSC:
648 scic_sds_phy_complete_link_training( 647 scic_sds_phy_complete_link_training(
649 sci_phy, 648 iphy,
650 SAS_LINK_RATE_6_0_GBPS, 649 SAS_LINK_RATE_6_0_GBPS,
651 SCI_PHY_SUB_AWAIT_IAF_UF); 650 SCI_PHY_SUB_AWAIT_IAF_UF);
652 break; 651 break;
@@ -654,14 +653,14 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
654 /* 653 /*
655 * We were doing SAS PHY link training and received a SATA PHY event 654 * We were doing SAS PHY link training and received a SATA PHY event
656 * continue OOB/SN as if this were a SATA PHY */ 655 * continue OOB/SN as if this were a SATA PHY */
657 scic_sds_phy_start_sata_link_training(sci_phy); 656 scic_sds_phy_start_sata_link_training(iphy);
658 break; 657 break;
659 case SCU_EVENT_LINK_FAILURE: 658 case SCU_EVENT_LINK_FAILURE:
660 /* Link failure change state back to the starting state */ 659 /* Link failure change state back to the starting state */
661 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 660 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
662 break; 661 break;
663 default: 662 default:
664 dev_warn(sciphy_to_dev(sci_phy), 663 dev_warn(sciphy_to_dev(iphy),
665 "%s: PHY starting substate machine received " 664 "%s: PHY starting substate machine received "
666 "unexpected event_code %x\n", 665 "unexpected event_code %x\n",
667 __func__, event_code); 666 __func__, event_code);
@@ -674,23 +673,23 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
674 switch (scu_get_event_code(event_code)) { 673 switch (scu_get_event_code(event_code)) {
675 case SCU_EVENT_SAS_PHY_DETECTED: 674 case SCU_EVENT_SAS_PHY_DETECTED:
676 /* Backup the state machine */ 675 /* Backup the state machine */
677 scic_sds_phy_start_sas_link_training(sci_phy); 676 scic_sds_phy_start_sas_link_training(iphy);
678 break; 677 break;
679 case SCU_EVENT_SATA_SPINUP_HOLD: 678 case SCU_EVENT_SATA_SPINUP_HOLD:
680 /* We were doing SAS PHY link training and received a 679 /* We were doing SAS PHY link training and received a
681 * SATA PHY event continue OOB/SN as if this were a 680 * SATA PHY event continue OOB/SN as if this were a
682 * SATA PHY 681 * SATA PHY
683 */ 682 */
684 scic_sds_phy_start_sata_link_training(sci_phy); 683 scic_sds_phy_start_sata_link_training(iphy);
685 break; 684 break;
686 case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT: 685 case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT:
687 case SCU_EVENT_LINK_FAILURE: 686 case SCU_EVENT_LINK_FAILURE:
688 case SCU_EVENT_HARD_RESET_RECEIVED: 687 case SCU_EVENT_HARD_RESET_RECEIVED:
689 /* Start the oob/sn state machine over again */ 688 /* Start the oob/sn state machine over again */
690 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 689 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
691 break; 690 break;
692 default: 691 default:
693 dev_warn(sciphy_to_dev(sci_phy), 692 dev_warn(sciphy_to_dev(iphy),
694 "%s: PHY starting substate machine received " 693 "%s: PHY starting substate machine received "
695 "unexpected event_code %x\n", 694 "unexpected event_code %x\n",
696 __func__, event_code); 695 __func__, event_code);
@@ -701,10 +700,10 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
701 switch (scu_get_event_code(event_code)) { 700 switch (scu_get_event_code(event_code)) {
702 case SCU_EVENT_LINK_FAILURE: 701 case SCU_EVENT_LINK_FAILURE:
703 /* Link failure change state back to the starting state */ 702 /* Link failure change state back to the starting state */
704 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 703 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
705 break; 704 break;
706 default: 705 default:
707 dev_warn(sciphy_to_dev(sci_phy), 706 dev_warn(sciphy_to_dev(iphy),
708 "%s: PHY starting substate machine received unexpected " 707 "%s: PHY starting substate machine received unexpected "
709 "event_code %x\n", 708 "event_code %x\n",
710 __func__, 709 __func__,
@@ -716,7 +715,7 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
716 switch (scu_get_event_code(event_code)) { 715 switch (scu_get_event_code(event_code)) {
717 case SCU_EVENT_LINK_FAILURE: 716 case SCU_EVENT_LINK_FAILURE:
718 /* Link failure change state back to the starting state */ 717 /* Link failure change state back to the starting state */
719 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 718 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
720 break; 719 break;
721 case SCU_EVENT_SATA_SPINUP_HOLD: 720 case SCU_EVENT_SATA_SPINUP_HOLD:
722 /* These events are received every 10ms and are 721 /* These events are received every 10ms and are
@@ -728,11 +727,11 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
728 /* There has been a change in the phy type before OOB/SN for the 727 /* There has been a change in the phy type before OOB/SN for the
729 * SATA finished start down the SAS link traning path. 728 * SATA finished start down the SAS link traning path.
730 */ 729 */
731 scic_sds_phy_start_sas_link_training(sci_phy); 730 scic_sds_phy_start_sas_link_training(iphy);
732 break; 731 break;
733 732
734 default: 733 default:
735 dev_warn(sciphy_to_dev(sci_phy), 734 dev_warn(sciphy_to_dev(iphy),
736 "%s: PHY starting substate machine received " 735 "%s: PHY starting substate machine received "
737 "unexpected event_code %x\n", 736 "unexpected event_code %x\n",
738 __func__, event_code); 737 __func__, event_code);
@@ -744,7 +743,7 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
744 switch (scu_get_event_code(event_code)) { 743 switch (scu_get_event_code(event_code)) {
745 case SCU_EVENT_LINK_FAILURE: 744 case SCU_EVENT_LINK_FAILURE:
746 /* Link failure change state back to the starting state */ 745 /* Link failure change state back to the starting state */
747 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 746 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
748 break; 747 break;
749 case SCU_EVENT_SATA_SPINUP_HOLD: 748 case SCU_EVENT_SATA_SPINUP_HOLD:
750 /* These events might be received since we dont know how many may be in 749 /* These events might be received since we dont know how many may be in
@@ -752,19 +751,19 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
752 */ 751 */
753 break; 752 break;
754 case SCU_EVENT_SATA_PHY_DETECTED: 753 case SCU_EVENT_SATA_PHY_DETECTED:
755 sci_phy->protocol = SCIC_SDS_PHY_PROTOCOL_SATA; 754 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_SATA;
756 755
757 /* We have received the SATA PHY notification change state */ 756 /* We have received the SATA PHY notification change state */
758 sci_change_state(&sci_phy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN); 757 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN);
759 break; 758 break;
760 case SCU_EVENT_SAS_PHY_DETECTED: 759 case SCU_EVENT_SAS_PHY_DETECTED:
761 /* There has been a change in the phy type before OOB/SN for the 760 /* There has been a change in the phy type before OOB/SN for the
762 * SATA finished start down the SAS link traning path. 761 * SATA finished start down the SAS link traning path.
763 */ 762 */
764 scic_sds_phy_start_sas_link_training(sci_phy); 763 scic_sds_phy_start_sas_link_training(iphy);
765 break; 764 break;
766 default: 765 default:
767 dev_warn(sciphy_to_dev(sci_phy), 766 dev_warn(sciphy_to_dev(iphy),
768 "%s: PHY starting substate machine received " 767 "%s: PHY starting substate machine received "
769 "unexpected event_code %x\n", 768 "unexpected event_code %x\n",
770 __func__, 769 __func__,
@@ -783,36 +782,36 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
783 case SCU_EVENT_SATA_15: 782 case SCU_EVENT_SATA_15:
784 case SCU_EVENT_SATA_15_SSC: 783 case SCU_EVENT_SATA_15_SSC:
785 scic_sds_phy_complete_link_training( 784 scic_sds_phy_complete_link_training(
786 sci_phy, 785 iphy,
787 SAS_LINK_RATE_1_5_GBPS, 786 SAS_LINK_RATE_1_5_GBPS,
788 SCI_PHY_SUB_AWAIT_SIG_FIS_UF); 787 SCI_PHY_SUB_AWAIT_SIG_FIS_UF);
789 break; 788 break;
790 case SCU_EVENT_SATA_30: 789 case SCU_EVENT_SATA_30:
791 case SCU_EVENT_SATA_30_SSC: 790 case SCU_EVENT_SATA_30_SSC:
792 scic_sds_phy_complete_link_training( 791 scic_sds_phy_complete_link_training(
793 sci_phy, 792 iphy,
794 SAS_LINK_RATE_3_0_GBPS, 793 SAS_LINK_RATE_3_0_GBPS,
795 SCI_PHY_SUB_AWAIT_SIG_FIS_UF); 794 SCI_PHY_SUB_AWAIT_SIG_FIS_UF);
796 break; 795 break;
797 case SCU_EVENT_SATA_60: 796 case SCU_EVENT_SATA_60:
798 case SCU_EVENT_SATA_60_SSC: 797 case SCU_EVENT_SATA_60_SSC:
799 scic_sds_phy_complete_link_training( 798 scic_sds_phy_complete_link_training(
800 sci_phy, 799 iphy,
801 SAS_LINK_RATE_6_0_GBPS, 800 SAS_LINK_RATE_6_0_GBPS,
802 SCI_PHY_SUB_AWAIT_SIG_FIS_UF); 801 SCI_PHY_SUB_AWAIT_SIG_FIS_UF);
803 break; 802 break;
804 case SCU_EVENT_LINK_FAILURE: 803 case SCU_EVENT_LINK_FAILURE:
805 /* Link failure change state back to the starting state */ 804 /* Link failure change state back to the starting state */
806 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 805 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
807 break; 806 break;
808 case SCU_EVENT_SAS_PHY_DETECTED: 807 case SCU_EVENT_SAS_PHY_DETECTED:
809 /* 808 /*
810 * There has been a change in the phy type before OOB/SN for the 809 * There has been a change in the phy type before OOB/SN for the
811 * SATA finished start down the SAS link traning path. */ 810 * SATA finished start down the SAS link traning path. */
812 scic_sds_phy_start_sas_link_training(sci_phy); 811 scic_sds_phy_start_sas_link_training(iphy);
813 break; 812 break;
814 default: 813 default:
815 dev_warn(sciphy_to_dev(sci_phy), 814 dev_warn(sciphy_to_dev(iphy),
816 "%s: PHY starting substate machine received " 815 "%s: PHY starting substate machine received "
817 "unexpected event_code %x\n", 816 "unexpected event_code %x\n",
818 __func__, event_code); 817 __func__, event_code);
@@ -825,16 +824,16 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
825 switch (scu_get_event_code(event_code)) { 824 switch (scu_get_event_code(event_code)) {
826 case SCU_EVENT_SATA_PHY_DETECTED: 825 case SCU_EVENT_SATA_PHY_DETECTED:
827 /* Backup the state machine */ 826 /* Backup the state machine */
828 sci_change_state(&sci_phy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN); 827 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN);
829 break; 828 break;
830 829
831 case SCU_EVENT_LINK_FAILURE: 830 case SCU_EVENT_LINK_FAILURE:
832 /* Link failure change state back to the starting state */ 831 /* Link failure change state back to the starting state */
833 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 832 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
834 break; 833 break;
835 834
836 default: 835 default:
837 dev_warn(sciphy_to_dev(sci_phy), 836 dev_warn(sciphy_to_dev(iphy),
838 "%s: PHY starting substate machine received " 837 "%s: PHY starting substate machine received "
839 "unexpected event_code %x\n", 838 "unexpected event_code %x\n",
840 __func__, 839 __func__,
@@ -847,20 +846,20 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
847 switch (scu_get_event_code(event_code)) { 846 switch (scu_get_event_code(event_code)) {
848 case SCU_EVENT_LINK_FAILURE: 847 case SCU_EVENT_LINK_FAILURE:
849 /* Link failure change state back to the starting state */ 848 /* Link failure change state back to the starting state */
850 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 849 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
851 break; 850 break;
852 case SCU_EVENT_BROADCAST_CHANGE: 851 case SCU_EVENT_BROADCAST_CHANGE:
853 /* Broadcast change received. Notify the port. */ 852 /* Broadcast change received. Notify the port. */
854 if (phy_get_non_dummy_port(sci_phy) != NULL) 853 if (phy_get_non_dummy_port(iphy) != NULL)
855 scic_sds_port_broadcast_change_received(sci_phy->owning_port, sci_phy); 854 scic_sds_port_broadcast_change_received(iphy->owning_port, iphy);
856 else 855 else
857 sci_phy->bcn_received_while_port_unassigned = true; 856 iphy->bcn_received_while_port_unassigned = true;
858 break; 857 break;
859 default: 858 default:
860 dev_warn(sciphy_to_dev(sci_phy), 859 dev_warn(sciphy_to_dev(iphy),
861 "%sP SCIC PHY 0x%p ready state machine received " 860 "%sP SCIC PHY 0x%p ready state machine received "
862 "unexpected event_code %x\n", 861 "unexpected event_code %x\n",
863 __func__, sci_phy, event_code); 862 __func__, iphy, event_code);
864 return SCI_FAILURE_INVALID_STATE; 863 return SCI_FAILURE_INVALID_STATE;
865 } 864 }
866 return SCI_SUCCESS; 865 return SCI_SUCCESS;
@@ -868,30 +867,30 @@ enum sci_status scic_sds_phy_event_handler(struct scic_sds_phy *sci_phy,
868 switch (scu_get_event_code(event_code)) { 867 switch (scu_get_event_code(event_code)) {
869 case SCU_EVENT_HARD_RESET_TRANSMITTED: 868 case SCU_EVENT_HARD_RESET_TRANSMITTED:
870 /* Link failure change state back to the starting state */ 869 /* Link failure change state back to the starting state */
871 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 870 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
872 break; 871 break;
873 default: 872 default:
874 dev_warn(sciphy_to_dev(sci_phy), 873 dev_warn(sciphy_to_dev(iphy),
875 "%s: SCIC PHY 0x%p resetting state machine received " 874 "%s: SCIC PHY 0x%p resetting state machine received "
876 "unexpected event_code %x\n", 875 "unexpected event_code %x\n",
877 __func__, sci_phy, event_code); 876 __func__, iphy, event_code);
878 877
879 return SCI_FAILURE_INVALID_STATE; 878 return SCI_FAILURE_INVALID_STATE;
880 break; 879 break;
881 } 880 }
882 return SCI_SUCCESS; 881 return SCI_SUCCESS;
883 default: 882 default:
884 dev_dbg(sciphy_to_dev(sci_phy), 883 dev_dbg(sciphy_to_dev(iphy),
885 "%s: in wrong state: %d\n", __func__, state); 884 "%s: in wrong state: %d\n", __func__, state);
886 return SCI_FAILURE_INVALID_STATE; 885 return SCI_FAILURE_INVALID_STATE;
887 } 886 }
888} 887}
889 888
890enum sci_status scic_sds_phy_frame_handler(struct scic_sds_phy *sci_phy, 889enum sci_status scic_sds_phy_frame_handler(struct isci_phy *iphy,
891 u32 frame_index) 890 u32 frame_index)
892{ 891{
893 enum scic_sds_phy_states state = sci_phy->sm.current_state_id; 892 enum scic_sds_phy_states state = iphy->sm.current_state_id;
894 struct scic_sds_controller *scic = sci_phy->owning_port->owning_controller; 893 struct scic_sds_controller *scic = iphy->owning_port->owning_controller;
895 enum sci_status result; 894 enum sci_status result;
896 unsigned long flags; 895 unsigned long flags;
897 896
@@ -899,7 +898,6 @@ enum sci_status scic_sds_phy_frame_handler(struct scic_sds_phy *sci_phy,
899 case SCI_PHY_SUB_AWAIT_IAF_UF: { 898 case SCI_PHY_SUB_AWAIT_IAF_UF: {
900 u32 *frame_words; 899 u32 *frame_words;
901 struct sas_identify_frame iaf; 900 struct sas_identify_frame iaf;
902 struct isci_phy *iphy = sci_phy_to_iphy(sci_phy);
903 901
904 result = scic_sds_unsolicited_frame_control_get_header(&scic->uf_control, 902 result = scic_sds_unsolicited_frame_control_get_header(&scic->uf_control,
905 frame_index, 903 frame_index,
@@ -927,10 +925,10 @@ enum sci_status scic_sds_phy_frame_handler(struct scic_sds_phy *sci_phy,
927 */ 925 */
928 state = SCI_PHY_SUB_AWAIT_SAS_POWER; 926 state = SCI_PHY_SUB_AWAIT_SAS_POWER;
929 } 927 }
930 sci_change_state(&sci_phy->sm, state); 928 sci_change_state(&iphy->sm, state);
931 result = SCI_SUCCESS; 929 result = SCI_SUCCESS;
932 } else 930 } else
933 dev_warn(sciphy_to_dev(sci_phy), 931 dev_warn(sciphy_to_dev(iphy),
934 "%s: PHY starting substate machine received " 932 "%s: PHY starting substate machine received "
935 "unexpected frame id %x\n", 933 "unexpected frame id %x\n",
936 __func__, frame_index); 934 __func__, frame_index);
@@ -941,10 +939,9 @@ enum sci_status scic_sds_phy_frame_handler(struct scic_sds_phy *sci_phy,
941 case SCI_PHY_SUB_AWAIT_SIG_FIS_UF: { 939 case SCI_PHY_SUB_AWAIT_SIG_FIS_UF: {
942 struct dev_to_host_fis *frame_header; 940 struct dev_to_host_fis *frame_header;
943 u32 *fis_frame_data; 941 u32 *fis_frame_data;
944 struct isci_phy *iphy = sci_phy_to_iphy(sci_phy);
945 942
946 result = scic_sds_unsolicited_frame_control_get_header( 943 result = scic_sds_unsolicited_frame_control_get_header(
947 &(scic_sds_phy_get_controller(sci_phy)->uf_control), 944 &(scic_sds_phy_get_controller(iphy)->uf_control),
948 frame_index, 945 frame_index,
949 (void **)&frame_header); 946 (void **)&frame_header);
950 947
@@ -964,11 +961,11 @@ enum sci_status scic_sds_phy_frame_handler(struct scic_sds_phy *sci_phy,
964 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags); 961 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
965 962
966 /* got IAF we can now go to the await spinup semaphore state */ 963 /* got IAF we can now go to the await spinup semaphore state */
967 sci_change_state(&sci_phy->sm, SCI_PHY_SUB_FINAL); 964 sci_change_state(&iphy->sm, SCI_PHY_SUB_FINAL);
968 965
969 result = SCI_SUCCESS; 966 result = SCI_SUCCESS;
970 } else 967 } else
971 dev_warn(sciphy_to_dev(sci_phy), 968 dev_warn(sciphy_to_dev(iphy),
972 "%s: PHY starting substate machine received " 969 "%s: PHY starting substate machine received "
973 "unexpected frame id %x\n", 970 "unexpected frame id %x\n",
974 __func__, frame_index); 971 __func__, frame_index);
@@ -979,7 +976,7 @@ enum sci_status scic_sds_phy_frame_handler(struct scic_sds_phy *sci_phy,
979 return result; 976 return result;
980 } 977 }
981 default: 978 default:
982 dev_dbg(sciphy_to_dev(sci_phy), 979 dev_dbg(sciphy_to_dev(iphy),
983 "%s: in wrong state: %d\n", __func__, state); 980 "%s: in wrong state: %d\n", __func__, state);
984 return SCI_FAILURE_INVALID_STATE; 981 return SCI_FAILURE_INVALID_STATE;
985 } 982 }
@@ -988,77 +985,77 @@ enum sci_status scic_sds_phy_frame_handler(struct scic_sds_phy *sci_phy,
988 985
989static void scic_sds_phy_starting_initial_substate_enter(struct sci_base_state_machine *sm) 986static void scic_sds_phy_starting_initial_substate_enter(struct sci_base_state_machine *sm)
990{ 987{
991 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 988 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
992 989
993 /* This is just an temporary state go off to the starting state */ 990 /* This is just an temporary state go off to the starting state */
994 sci_change_state(&sci_phy->sm, SCI_PHY_SUB_AWAIT_OSSP_EN); 991 sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_OSSP_EN);
995} 992}
996 993
997static void scic_sds_phy_starting_await_sas_power_substate_enter(struct sci_base_state_machine *sm) 994static void scic_sds_phy_starting_await_sas_power_substate_enter(struct sci_base_state_machine *sm)
998{ 995{
999 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 996 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1000 struct scic_sds_controller *scic = sci_phy->owning_port->owning_controller; 997 struct scic_sds_controller *scic = iphy->owning_port->owning_controller;
1001 998
1002 scic_sds_controller_power_control_queue_insert(scic, sci_phy); 999 scic_sds_controller_power_control_queue_insert(scic, iphy);
1003} 1000}
1004 1001
1005static void scic_sds_phy_starting_await_sas_power_substate_exit(struct sci_base_state_machine *sm) 1002static void scic_sds_phy_starting_await_sas_power_substate_exit(struct sci_base_state_machine *sm)
1006{ 1003{
1007 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1004 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1008 struct scic_sds_controller *scic = sci_phy->owning_port->owning_controller; 1005 struct scic_sds_controller *scic = iphy->owning_port->owning_controller;
1009 1006
1010 scic_sds_controller_power_control_queue_remove(scic, sci_phy); 1007 scic_sds_controller_power_control_queue_remove(scic, iphy);
1011} 1008}
1012 1009
1013static void scic_sds_phy_starting_await_sata_power_substate_enter(struct sci_base_state_machine *sm) 1010static void scic_sds_phy_starting_await_sata_power_substate_enter(struct sci_base_state_machine *sm)
1014{ 1011{
1015 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1012 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1016 struct scic_sds_controller *scic = sci_phy->owning_port->owning_controller; 1013 struct scic_sds_controller *scic = iphy->owning_port->owning_controller;
1017 1014
1018 scic_sds_controller_power_control_queue_insert(scic, sci_phy); 1015 scic_sds_controller_power_control_queue_insert(scic, iphy);
1019} 1016}
1020 1017
1021static void scic_sds_phy_starting_await_sata_power_substate_exit(struct sci_base_state_machine *sm) 1018static void scic_sds_phy_starting_await_sata_power_substate_exit(struct sci_base_state_machine *sm)
1022{ 1019{
1023 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1020 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1024 struct scic_sds_controller *scic = sci_phy->owning_port->owning_controller; 1021 struct scic_sds_controller *scic = iphy->owning_port->owning_controller;
1025 1022
1026 scic_sds_controller_power_control_queue_remove(scic, sci_phy); 1023 scic_sds_controller_power_control_queue_remove(scic, iphy);
1027} 1024}
1028 1025
1029static void scic_sds_phy_starting_await_sata_phy_substate_enter(struct sci_base_state_machine *sm) 1026static void scic_sds_phy_starting_await_sata_phy_substate_enter(struct sci_base_state_machine *sm)
1030{ 1027{
1031 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1028 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1032 1029
1033 sci_mod_timer(&sci_phy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT); 1030 sci_mod_timer(&iphy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT);
1034} 1031}
1035 1032
1036static void scic_sds_phy_starting_await_sata_phy_substate_exit(struct sci_base_state_machine *sm) 1033static void scic_sds_phy_starting_await_sata_phy_substate_exit(struct sci_base_state_machine *sm)
1037{ 1034{
1038 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1035 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1039 1036
1040 sci_del_timer(&sci_phy->sata_timer); 1037 sci_del_timer(&iphy->sata_timer);
1041} 1038}
1042 1039
1043static void scic_sds_phy_starting_await_sata_speed_substate_enter(struct sci_base_state_machine *sm) 1040static void scic_sds_phy_starting_await_sata_speed_substate_enter(struct sci_base_state_machine *sm)
1044{ 1041{
1045 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1042 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1046 1043
1047 sci_mod_timer(&sci_phy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT); 1044 sci_mod_timer(&iphy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT);
1048} 1045}
1049 1046
1050static void scic_sds_phy_starting_await_sata_speed_substate_exit(struct sci_base_state_machine *sm) 1047static void scic_sds_phy_starting_await_sata_speed_substate_exit(struct sci_base_state_machine *sm)
1051{ 1048{
1052 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1049 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1053 1050
1054 sci_del_timer(&sci_phy->sata_timer); 1051 sci_del_timer(&iphy->sata_timer);
1055} 1052}
1056 1053
1057static void scic_sds_phy_starting_await_sig_fis_uf_substate_enter(struct sci_base_state_machine *sm) 1054static void scic_sds_phy_starting_await_sig_fis_uf_substate_enter(struct sci_base_state_machine *sm)
1058{ 1055{
1059 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1056 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1060 1057
1061 if (scic_sds_port_link_detected(sci_phy->owning_port, sci_phy)) { 1058 if (scic_sds_port_link_detected(iphy->owning_port, iphy)) {
1062 1059
1063 /* 1060 /*
1064 * Clear the PE suspend condition so we can actually 1061 * Clear the PE suspend condition so we can actually
@@ -1066,79 +1063,79 @@ static void scic_sds_phy_starting_await_sig_fis_uf_substate_enter(struct sci_bas
1066 * The hardware will not respond to the XRDY until the PE 1063 * The hardware will not respond to the XRDY until the PE
1067 * suspend condition is cleared. 1064 * suspend condition is cleared.
1068 */ 1065 */
1069 scic_sds_phy_resume(sci_phy); 1066 scic_sds_phy_resume(iphy);
1070 1067
1071 sci_mod_timer(&sci_phy->sata_timer, 1068 sci_mod_timer(&iphy->sata_timer,
1072 SCIC_SDS_SIGNATURE_FIS_TIMEOUT); 1069 SCIC_SDS_SIGNATURE_FIS_TIMEOUT);
1073 } else 1070 } else
1074 sci_phy->is_in_link_training = false; 1071 iphy->is_in_link_training = false;
1075} 1072}
1076 1073
1077static void scic_sds_phy_starting_await_sig_fis_uf_substate_exit(struct sci_base_state_machine *sm) 1074static void scic_sds_phy_starting_await_sig_fis_uf_substate_exit(struct sci_base_state_machine *sm)
1078{ 1075{
1079 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1076 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1080 1077
1081 sci_del_timer(&sci_phy->sata_timer); 1078 sci_del_timer(&iphy->sata_timer);
1082} 1079}
1083 1080
1084static void scic_sds_phy_starting_final_substate_enter(struct sci_base_state_machine *sm) 1081static void scic_sds_phy_starting_final_substate_enter(struct sci_base_state_machine *sm)
1085{ 1082{
1086 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1083 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1087 1084
1088 /* State machine has run to completion so exit out and change 1085 /* State machine has run to completion so exit out and change
1089 * the base state machine to the ready state 1086 * the base state machine to the ready state
1090 */ 1087 */
1091 sci_change_state(&sci_phy->sm, SCI_PHY_READY); 1088 sci_change_state(&iphy->sm, SCI_PHY_READY);
1092} 1089}
1093 1090
1094/** 1091/**
1095 * 1092 *
1096 * @sci_phy: This is the struct scic_sds_phy object to stop. 1093 * @sci_phy: This is the struct isci_phy object to stop.
1097 * 1094 *
1098 * This method will stop the struct scic_sds_phy object. This does not reset the 1095 * This method will stop the struct isci_phy object. This does not reset the
1099 * protocol engine it just suspends it and places it in a state where it will 1096 * protocol engine it just suspends it and places it in a state where it will
1100 * not cause the end device to power up. none 1097 * not cause the end device to power up. none
1101 */ 1098 */
1102static void scu_link_layer_stop_protocol_engine( 1099static void scu_link_layer_stop_protocol_engine(
1103 struct scic_sds_phy *sci_phy) 1100 struct isci_phy *iphy)
1104{ 1101{
1105 u32 scu_sas_pcfg_value; 1102 u32 scu_sas_pcfg_value;
1106 u32 enable_spinup_value; 1103 u32 enable_spinup_value;
1107 1104
1108 /* Suspend the protocol engine and place it in a sata spinup hold state */ 1105 /* Suspend the protocol engine and place it in a sata spinup hold state */
1109 scu_sas_pcfg_value = 1106 scu_sas_pcfg_value =
1110 readl(&sci_phy->link_layer_registers->phy_configuration); 1107 readl(&iphy->link_layer_registers->phy_configuration);
1111 scu_sas_pcfg_value |= 1108 scu_sas_pcfg_value |=
1112 (SCU_SAS_PCFG_GEN_BIT(OOB_RESET) | 1109 (SCU_SAS_PCFG_GEN_BIT(OOB_RESET) |
1113 SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE) | 1110 SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE) |
1114 SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD)); 1111 SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD));
1115 writel(scu_sas_pcfg_value, 1112 writel(scu_sas_pcfg_value,
1116 &sci_phy->link_layer_registers->phy_configuration); 1113 &iphy->link_layer_registers->phy_configuration);
1117 1114
1118 /* Disable the notify enable spinup primitives */ 1115 /* Disable the notify enable spinup primitives */
1119 enable_spinup_value = readl(&sci_phy->link_layer_registers->notify_enable_spinup_control); 1116 enable_spinup_value = readl(&iphy->link_layer_registers->notify_enable_spinup_control);
1120 enable_spinup_value &= ~SCU_ENSPINUP_GEN_BIT(ENABLE); 1117 enable_spinup_value &= ~SCU_ENSPINUP_GEN_BIT(ENABLE);
1121 writel(enable_spinup_value, &sci_phy->link_layer_registers->notify_enable_spinup_control); 1118 writel(enable_spinup_value, &iphy->link_layer_registers->notify_enable_spinup_control);
1122} 1119}
1123 1120
1124/** 1121/**
1125 * 1122 *
1126 * 1123 *
1127 * This method will start the OOB/SN state machine for this struct scic_sds_phy object. 1124 * This method will start the OOB/SN state machine for this struct isci_phy object.
1128 */ 1125 */
1129static void scu_link_layer_start_oob( 1126static void scu_link_layer_start_oob(
1130 struct scic_sds_phy *sci_phy) 1127 struct isci_phy *iphy)
1131{ 1128{
1132 u32 scu_sas_pcfg_value; 1129 u32 scu_sas_pcfg_value;
1133 1130
1134 scu_sas_pcfg_value = 1131 scu_sas_pcfg_value =
1135 readl(&sci_phy->link_layer_registers->phy_configuration); 1132 readl(&iphy->link_layer_registers->phy_configuration);
1136 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE); 1133 scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE);
1137 scu_sas_pcfg_value &= 1134 scu_sas_pcfg_value &=
1138 ~(SCU_SAS_PCFG_GEN_BIT(OOB_RESET) | 1135 ~(SCU_SAS_PCFG_GEN_BIT(OOB_RESET) |
1139 SCU_SAS_PCFG_GEN_BIT(HARD_RESET)); 1136 SCU_SAS_PCFG_GEN_BIT(HARD_RESET));
1140 writel(scu_sas_pcfg_value, 1137 writel(scu_sas_pcfg_value,
1141 &sci_phy->link_layer_registers->phy_configuration); 1138 &iphy->link_layer_registers->phy_configuration);
1142} 1139}
1143 1140
1144/** 1141/**
@@ -1150,7 +1147,7 @@ static void scu_link_layer_start_oob(
1150 * hard reset bit set. 1147 * hard reset bit set.
1151 */ 1148 */
1152static void scu_link_layer_tx_hard_reset( 1149static void scu_link_layer_tx_hard_reset(
1153 struct scic_sds_phy *sci_phy) 1150 struct isci_phy *iphy)
1154{ 1151{
1155 u32 phy_configuration_value; 1152 u32 phy_configuration_value;
1156 1153
@@ -1158,91 +1155,91 @@ static void scu_link_layer_tx_hard_reset(
1158 * SAS Phys must wait for the HARD_RESET_TX event notification to transition 1155 * SAS Phys must wait for the HARD_RESET_TX event notification to transition
1159 * to the starting state. */ 1156 * to the starting state. */
1160 phy_configuration_value = 1157 phy_configuration_value =
1161 readl(&sci_phy->link_layer_registers->phy_configuration); 1158 readl(&iphy->link_layer_registers->phy_configuration);
1162 phy_configuration_value |= 1159 phy_configuration_value |=
1163 (SCU_SAS_PCFG_GEN_BIT(HARD_RESET) | 1160 (SCU_SAS_PCFG_GEN_BIT(HARD_RESET) |
1164 SCU_SAS_PCFG_GEN_BIT(OOB_RESET)); 1161 SCU_SAS_PCFG_GEN_BIT(OOB_RESET));
1165 writel(phy_configuration_value, 1162 writel(phy_configuration_value,
1166 &sci_phy->link_layer_registers->phy_configuration); 1163 &iphy->link_layer_registers->phy_configuration);
1167 1164
1168 /* Now take the OOB state machine out of reset */ 1165 /* Now take the OOB state machine out of reset */
1169 phy_configuration_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE); 1166 phy_configuration_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE);
1170 phy_configuration_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET); 1167 phy_configuration_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET);
1171 writel(phy_configuration_value, 1168 writel(phy_configuration_value,
1172 &sci_phy->link_layer_registers->phy_configuration); 1169 &iphy->link_layer_registers->phy_configuration);
1173} 1170}
1174 1171
1175static void scic_sds_phy_stopped_state_enter(struct sci_base_state_machine *sm) 1172static void scic_sds_phy_stopped_state_enter(struct sci_base_state_machine *sm)
1176{ 1173{
1177 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1174 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1178 1175
1179 /* 1176 /*
1180 * @todo We need to get to the controller to place this PE in a 1177 * @todo We need to get to the controller to place this PE in a
1181 * reset state 1178 * reset state
1182 */ 1179 */
1183 sci_del_timer(&sci_phy->sata_timer); 1180 sci_del_timer(&iphy->sata_timer);
1184 1181
1185 scu_link_layer_stop_protocol_engine(sci_phy); 1182 scu_link_layer_stop_protocol_engine(iphy);
1186 1183
1187 if (sci_phy->sm.previous_state_id != SCI_PHY_INITIAL) 1184 if (iphy->sm.previous_state_id != SCI_PHY_INITIAL)
1188 scic_sds_controller_link_down(scic_sds_phy_get_controller(sci_phy), 1185 scic_sds_controller_link_down(scic_sds_phy_get_controller(iphy),
1189 phy_get_non_dummy_port(sci_phy), 1186 phy_get_non_dummy_port(iphy),
1190 sci_phy); 1187 iphy);
1191} 1188}
1192 1189
1193static void scic_sds_phy_starting_state_enter(struct sci_base_state_machine *sm) 1190static void scic_sds_phy_starting_state_enter(struct sci_base_state_machine *sm)
1194{ 1191{
1195 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1192 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1196 1193
1197 scu_link_layer_stop_protocol_engine(sci_phy); 1194 scu_link_layer_stop_protocol_engine(iphy);
1198 scu_link_layer_start_oob(sci_phy); 1195 scu_link_layer_start_oob(iphy);
1199 1196
1200 /* We don't know what kind of phy we are going to be just yet */ 1197 /* We don't know what kind of phy we are going to be just yet */
1201 sci_phy->protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN; 1198 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN;
1202 sci_phy->bcn_received_while_port_unassigned = false; 1199 iphy->bcn_received_while_port_unassigned = false;
1203 1200
1204 if (sci_phy->sm.previous_state_id == SCI_PHY_READY) 1201 if (iphy->sm.previous_state_id == SCI_PHY_READY)
1205 scic_sds_controller_link_down(scic_sds_phy_get_controller(sci_phy), 1202 scic_sds_controller_link_down(scic_sds_phy_get_controller(iphy),
1206 phy_get_non_dummy_port(sci_phy), 1203 phy_get_non_dummy_port(iphy),
1207 sci_phy); 1204 iphy);
1208 1205
1209 sci_change_state(&sci_phy->sm, SCI_PHY_SUB_INITIAL); 1206 sci_change_state(&iphy->sm, SCI_PHY_SUB_INITIAL);
1210} 1207}
1211 1208
1212static void scic_sds_phy_ready_state_enter(struct sci_base_state_machine *sm) 1209static void scic_sds_phy_ready_state_enter(struct sci_base_state_machine *sm)
1213{ 1210{
1214 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1211 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1215 1212
1216 scic_sds_controller_link_up(scic_sds_phy_get_controller(sci_phy), 1213 scic_sds_controller_link_up(scic_sds_phy_get_controller(iphy),
1217 phy_get_non_dummy_port(sci_phy), 1214 phy_get_non_dummy_port(iphy),
1218 sci_phy); 1215 iphy);
1219 1216
1220} 1217}
1221 1218
1222static void scic_sds_phy_ready_state_exit(struct sci_base_state_machine *sm) 1219static void scic_sds_phy_ready_state_exit(struct sci_base_state_machine *sm)
1223{ 1220{
1224 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1221 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1225 1222
1226 scic_sds_phy_suspend(sci_phy); 1223 scic_sds_phy_suspend(iphy);
1227} 1224}
1228 1225
1229static void scic_sds_phy_resetting_state_enter(struct sci_base_state_machine *sm) 1226static void scic_sds_phy_resetting_state_enter(struct sci_base_state_machine *sm)
1230{ 1227{
1231 struct scic_sds_phy *sci_phy = container_of(sm, typeof(*sci_phy), sm); 1228 struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm);
1232 1229
1233 /* The phy is being reset, therefore deactivate it from the port. In 1230 /* The phy is being reset, therefore deactivate it from the port. In
1234 * the resetting state we don't notify the user regarding link up and 1231 * the resetting state we don't notify the user regarding link up and
1235 * link down notifications 1232 * link down notifications
1236 */ 1233 */
1237 scic_sds_port_deactivate_phy(sci_phy->owning_port, sci_phy, false); 1234 scic_sds_port_deactivate_phy(iphy->owning_port, iphy, false);
1238 1235
1239 if (sci_phy->protocol == SCIC_SDS_PHY_PROTOCOL_SAS) { 1236 if (iphy->protocol == SCIC_SDS_PHY_PROTOCOL_SAS) {
1240 scu_link_layer_tx_hard_reset(sci_phy); 1237 scu_link_layer_tx_hard_reset(iphy);
1241 } else { 1238 } else {
1242 /* The SCU does not need to have a discrete reset state so 1239 /* The SCU does not need to have a discrete reset state so
1243 * just go back to the starting state. 1240 * just go back to the starting state.
1244 */ 1241 */
1245 sci_change_state(&sci_phy->sm, SCI_PHY_STARTING); 1242 sci_change_state(&iphy->sm, SCI_PHY_STARTING);
1246 } 1243 }
1247} 1244}
1248 1245
@@ -1293,21 +1290,21 @@ static const struct sci_base_state scic_sds_phy_state_table[] = {
1293 [SCI_PHY_FINAL] = { }, 1290 [SCI_PHY_FINAL] = { },
1294}; 1291};
1295 1292
1296void scic_sds_phy_construct(struct scic_sds_phy *sci_phy, 1293void scic_sds_phy_construct(struct isci_phy *iphy,
1297 struct scic_sds_port *owning_port, u8 phy_index) 1294 struct scic_sds_port *owning_port, u8 phy_index)
1298{ 1295{
1299 sci_init_sm(&sci_phy->sm, scic_sds_phy_state_table, SCI_PHY_INITIAL); 1296 sci_init_sm(&iphy->sm, scic_sds_phy_state_table, SCI_PHY_INITIAL);
1300 1297
1301 /* Copy the rest of the input data to our locals */ 1298 /* Copy the rest of the input data to our locals */
1302 sci_phy->owning_port = owning_port; 1299 iphy->owning_port = owning_port;
1303 sci_phy->phy_index = phy_index; 1300 iphy->phy_index = phy_index;
1304 sci_phy->bcn_received_while_port_unassigned = false; 1301 iphy->bcn_received_while_port_unassigned = false;
1305 sci_phy->protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN; 1302 iphy->protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN;
1306 sci_phy->link_layer_registers = NULL; 1303 iphy->link_layer_registers = NULL;
1307 sci_phy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN; 1304 iphy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN;
1308 1305
1309 /* Create the SIGNATURE FIS Timeout timer for this phy */ 1306 /* Create the SIGNATURE FIS Timeout timer for this phy */
1310 sci_init_timer(&sci_phy->sata_timer, phy_sata_timeout); 1307 sci_init_timer(&iphy->sata_timer, phy_sata_timeout);
1311} 1308}
1312 1309
1313void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index) 1310void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index)
@@ -1368,14 +1365,14 @@ int isci_phy_control(struct asd_sas_phy *sas_phy,
1368 switch (func) { 1365 switch (func) {
1369 case PHY_FUNC_DISABLE: 1366 case PHY_FUNC_DISABLE:
1370 spin_lock_irqsave(&ihost->scic_lock, flags); 1367 spin_lock_irqsave(&ihost->scic_lock, flags);
1371 scic_sds_phy_stop(&iphy->sci); 1368 scic_sds_phy_stop(iphy);
1372 spin_unlock_irqrestore(&ihost->scic_lock, flags); 1369 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1373 break; 1370 break;
1374 1371
1375 case PHY_FUNC_LINK_RESET: 1372 case PHY_FUNC_LINK_RESET:
1376 spin_lock_irqsave(&ihost->scic_lock, flags); 1373 spin_lock_irqsave(&ihost->scic_lock, flags);
1377 scic_sds_phy_stop(&iphy->sci); 1374 scic_sds_phy_stop(iphy);
1378 scic_sds_phy_start(&iphy->sci); 1375 scic_sds_phy_start(iphy);
1379 spin_unlock_irqrestore(&ihost->scic_lock, flags); 1376 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1380 break; 1377 break;
1381 1378