diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-04 18:15:15 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-04 18:15:15 -0400 |
commit | 03da30986793385af57eeca3296253c887b742e6 (patch) | |
tree | 9c46dbe51c9d0856990649dd917ab45474b7be87 /drivers/scsi/ipr.c | |
parent | 6ba74014c1ab0e37af7de6f64b4eccbbae3cb9e7 (diff) | |
parent | 339f4f4eab80caa6cf0d39fb057ad6ddb84ba91e (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6: (276 commits)
[SCSI] zfcp: Trigger logging in the FCP channel on qdio error conditions
[SCSI] zfcp: Introduce experimental support for DIF/DIX
[SCSI] zfcp: Enable data division support for FCP devices
[SCSI] zfcp: Prevent access on uninitialized memory.
[SCSI] zfcp: Post events through FC transport class
[SCSI] zfcp: Cleanup QDIO attachment and improve processing.
[SCSI] zfcp: Cleanup function parameters for sbal value.
[SCSI] zfcp: Use correct width for timer_interval field
[SCSI] zfcp: Remove SCSI device when removing unit
[SCSI] zfcp: Use memdup_user and kstrdup
[SCSI] zfcp: Fix retry after failed "open port" erp action
[SCSI] zfcp: Fail erp after timeout
[SCSI] zfcp: Use forced_reopen in terminate_rport_io callback
[SCSI] zfcp: Register SCSI devices after successful fc_remote_port_add
[SCSI] zfcp: Do not try "forced close" when port is already closed
[SCSI] zfcp: Do not unblock rport from REOPEN_PORT_FORCED
[SCSI] sd: add support for runtime PM
[SCSI] implement runtime Power Management
[SCSI] convert to the new PM framework
[SCSI] Unify SAM_ and SAM_STAT_ macros
...
Diffstat (limited to 'drivers/scsi/ipr.c')
-rw-r--r-- | drivers/scsi/ipr.c | 148 |
1 files changed, 119 insertions, 29 deletions
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c index f820cffb7f00..52568588039f 100644 --- a/drivers/scsi/ipr.c +++ b/drivers/scsi/ipr.c | |||
@@ -167,21 +167,22 @@ static const struct ipr_chip_cfg_t ipr_chip_cfg[] = { | |||
167 | .clr_uproc_interrupt_reg32 = 0x0002C, | 167 | .clr_uproc_interrupt_reg32 = 0x0002C, |
168 | .init_feedback_reg = 0x0005C, | 168 | .init_feedback_reg = 0x0005C, |
169 | .dump_addr_reg = 0x00064, | 169 | .dump_addr_reg = 0x00064, |
170 | .dump_data_reg = 0x00068 | 170 | .dump_data_reg = 0x00068, |
171 | .endian_swap_reg = 0x00084 | ||
171 | } | 172 | } |
172 | }, | 173 | }, |
173 | }; | 174 | }; |
174 | 175 | ||
175 | static const struct ipr_chip_t ipr_chip[] = { | 176 | static const struct ipr_chip_t ipr_chip[] = { |
176 | { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, IPR_USE_LSI, IPR_SIS32, &ipr_chip_cfg[0] }, | 177 | { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] }, |
177 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, IPR_USE_LSI, IPR_SIS32, &ipr_chip_cfg[0] }, | 178 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] }, |
178 | { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, &ipr_chip_cfg[0] }, | 179 | { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] }, |
179 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, &ipr_chip_cfg[0] }, | 180 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] }, |
180 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, IPR_USE_MSI, IPR_SIS32, &ipr_chip_cfg[0] }, | 181 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, IPR_USE_MSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] }, |
181 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, &ipr_chip_cfg[1] }, | 182 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] }, |
182 | { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, &ipr_chip_cfg[1] }, | 183 | { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] }, |
183 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, &ipr_chip_cfg[2] }, | 184 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }, |
184 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_ASIC_E2, IPR_USE_MSI, IPR_SIS64, &ipr_chip_cfg[2] } | 185 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_ASIC_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] } |
185 | }; | 186 | }; |
186 | 187 | ||
187 | static int ipr_max_bus_speeds [] = { | 188 | static int ipr_max_bus_speeds [] = { |
@@ -1167,7 +1168,7 @@ static void ipr_update_res_entry(struct ipr_resource_entry *res, | |||
1167 | if (res->ioa_cfg->sis64) { | 1168 | if (res->ioa_cfg->sis64) { |
1168 | res->flags = cfgtew->u.cfgte64->flags; | 1169 | res->flags = cfgtew->u.cfgte64->flags; |
1169 | res->res_flags = cfgtew->u.cfgte64->res_flags; | 1170 | res->res_flags = cfgtew->u.cfgte64->res_flags; |
1170 | res->type = cfgtew->u.cfgte64->res_type & 0x0f; | 1171 | res->type = cfgtew->u.cfgte64->res_type; |
1171 | 1172 | ||
1172 | memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data, | 1173 | memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data, |
1173 | sizeof(struct ipr_std_inq_data)); | 1174 | sizeof(struct ipr_std_inq_data)); |
@@ -3761,6 +3762,36 @@ static struct device_attribute ipr_update_fw_attr = { | |||
3761 | .store = ipr_store_update_fw | 3762 | .store = ipr_store_update_fw |
3762 | }; | 3763 | }; |
3763 | 3764 | ||
3765 | /** | ||
3766 | * ipr_show_fw_type - Show the adapter's firmware type. | ||
3767 | * @dev: class device struct | ||
3768 | * @buf: buffer | ||
3769 | * | ||
3770 | * Return value: | ||
3771 | * number of bytes printed to buffer | ||
3772 | **/ | ||
3773 | static ssize_t ipr_show_fw_type(struct device *dev, | ||
3774 | struct device_attribute *attr, char *buf) | ||
3775 | { | ||
3776 | struct Scsi_Host *shost = class_to_shost(dev); | ||
3777 | struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata; | ||
3778 | unsigned long lock_flags = 0; | ||
3779 | int len; | ||
3780 | |||
3781 | spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags); | ||
3782 | len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->sis64); | ||
3783 | spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); | ||
3784 | return len; | ||
3785 | } | ||
3786 | |||
3787 | static struct device_attribute ipr_ioa_fw_type_attr = { | ||
3788 | .attr = { | ||
3789 | .name = "fw_type", | ||
3790 | .mode = S_IRUGO, | ||
3791 | }, | ||
3792 | .show = ipr_show_fw_type | ||
3793 | }; | ||
3794 | |||
3764 | static struct device_attribute *ipr_ioa_attrs[] = { | 3795 | static struct device_attribute *ipr_ioa_attrs[] = { |
3765 | &ipr_fw_version_attr, | 3796 | &ipr_fw_version_attr, |
3766 | &ipr_log_level_attr, | 3797 | &ipr_log_level_attr, |
@@ -3768,6 +3799,7 @@ static struct device_attribute *ipr_ioa_attrs[] = { | |||
3768 | &ipr_ioa_state_attr, | 3799 | &ipr_ioa_state_attr, |
3769 | &ipr_ioa_reset_attr, | 3800 | &ipr_ioa_reset_attr, |
3770 | &ipr_update_fw_attr, | 3801 | &ipr_update_fw_attr, |
3802 | &ipr_ioa_fw_type_attr, | ||
3771 | NULL, | 3803 | NULL, |
3772 | }; | 3804 | }; |
3773 | 3805 | ||
@@ -4121,14 +4153,49 @@ static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribut | |||
4121 | static struct device_attribute ipr_resource_path_attr = { | 4153 | static struct device_attribute ipr_resource_path_attr = { |
4122 | .attr = { | 4154 | .attr = { |
4123 | .name = "resource_path", | 4155 | .name = "resource_path", |
4124 | .mode = S_IRUSR, | 4156 | .mode = S_IRUGO, |
4125 | }, | 4157 | }, |
4126 | .show = ipr_show_resource_path | 4158 | .show = ipr_show_resource_path |
4127 | }; | 4159 | }; |
4128 | 4160 | ||
4161 | /** | ||
4162 | * ipr_show_resource_type - Show the resource type for this device. | ||
4163 | * @dev: device struct | ||
4164 | * @buf: buffer | ||
4165 | * | ||
4166 | * Return value: | ||
4167 | * number of bytes printed to buffer | ||
4168 | **/ | ||
4169 | static ssize_t ipr_show_resource_type(struct device *dev, struct device_attribute *attr, char *buf) | ||
4170 | { | ||
4171 | struct scsi_device *sdev = to_scsi_device(dev); | ||
4172 | struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata; | ||
4173 | struct ipr_resource_entry *res; | ||
4174 | unsigned long lock_flags = 0; | ||
4175 | ssize_t len = -ENXIO; | ||
4176 | |||
4177 | spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags); | ||
4178 | res = (struct ipr_resource_entry *)sdev->hostdata; | ||
4179 | |||
4180 | if (res) | ||
4181 | len = snprintf(buf, PAGE_SIZE, "%x\n", res->type); | ||
4182 | |||
4183 | spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); | ||
4184 | return len; | ||
4185 | } | ||
4186 | |||
4187 | static struct device_attribute ipr_resource_type_attr = { | ||
4188 | .attr = { | ||
4189 | .name = "resource_type", | ||
4190 | .mode = S_IRUGO, | ||
4191 | }, | ||
4192 | .show = ipr_show_resource_type | ||
4193 | }; | ||
4194 | |||
4129 | static struct device_attribute *ipr_dev_attrs[] = { | 4195 | static struct device_attribute *ipr_dev_attrs[] = { |
4130 | &ipr_adapter_handle_attr, | 4196 | &ipr_adapter_handle_attr, |
4131 | &ipr_resource_path_attr, | 4197 | &ipr_resource_path_attr, |
4198 | &ipr_resource_type_attr, | ||
4132 | NULL, | 4199 | NULL, |
4133 | }; | 4200 | }; |
4134 | 4201 | ||
@@ -4352,8 +4419,6 @@ static int ipr_slave_configure(struct scsi_device *sdev) | |||
4352 | IPR_VSET_RW_TIMEOUT); | 4419 | IPR_VSET_RW_TIMEOUT); |
4353 | blk_queue_max_hw_sectors(sdev->request_queue, IPR_VSET_MAX_SECTORS); | 4420 | blk_queue_max_hw_sectors(sdev->request_queue, IPR_VSET_MAX_SECTORS); |
4354 | } | 4421 | } |
4355 | if (ipr_is_vset_device(res) || ipr_is_scsi_disk(res)) | ||
4356 | sdev->allow_restart = 1; | ||
4357 | if (ipr_is_gata(res) && res->sata_port) | 4422 | if (ipr_is_gata(res) && res->sata_port) |
4358 | ap = res->sata_port->ap; | 4423 | ap = res->sata_port->ap; |
4359 | spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); | 4424 | spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); |
@@ -6770,7 +6835,8 @@ static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd) | |||
6770 | list_move_tail(&res->queue, &ioa_cfg->used_res_q); | 6835 | list_move_tail(&res->queue, &ioa_cfg->used_res_q); |
6771 | ipr_init_res_entry(res, &cfgtew); | 6836 | ipr_init_res_entry(res, &cfgtew); |
6772 | res->add_to_ml = 1; | 6837 | res->add_to_ml = 1; |
6773 | } | 6838 | } else if (res->sdev && (ipr_is_vset_device(res) || ipr_is_scsi_disk(res))) |
6839 | res->sdev->allow_restart = 1; | ||
6774 | 6840 | ||
6775 | if (found) | 6841 | if (found) |
6776 | ipr_update_res_entry(res, &cfgtew); | 6842 | ipr_update_res_entry(res, &cfgtew); |
@@ -7169,12 +7235,15 @@ static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd) | |||
7169 | stage_time = ioa_cfg->transop_timeout; | 7235 | stage_time = ioa_cfg->transop_timeout; |
7170 | ipr_cmd->job_step = ipr_ioafp_identify_hrrq; | 7236 | ipr_cmd->job_step = ipr_ioafp_identify_hrrq; |
7171 | } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) { | 7237 | } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) { |
7172 | ipr_cmd->job_step = ipr_ioafp_identify_hrrq; | 7238 | int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); |
7173 | maskval = IPR_PCII_IPL_STAGE_CHANGE; | 7239 | if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { |
7174 | maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER; | 7240 | ipr_cmd->job_step = ipr_ioafp_identify_hrrq; |
7175 | writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg); | 7241 | maskval = IPR_PCII_IPL_STAGE_CHANGE; |
7176 | int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); | 7242 | maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER; |
7177 | return IPR_RC_JOB_CONTINUE; | 7243 | writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg); |
7244 | int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); | ||
7245 | return IPR_RC_JOB_CONTINUE; | ||
7246 | } | ||
7178 | } | 7247 | } |
7179 | 7248 | ||
7180 | ipr_cmd->timer.data = (unsigned long) ipr_cmd; | 7249 | ipr_cmd->timer.data = (unsigned long) ipr_cmd; |
@@ -7208,6 +7277,12 @@ static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd) | |||
7208 | ipr_init_ioa_mem(ioa_cfg); | 7277 | ipr_init_ioa_mem(ioa_cfg); |
7209 | 7278 | ||
7210 | ioa_cfg->allow_interrupts = 1; | 7279 | ioa_cfg->allow_interrupts = 1; |
7280 | if (ioa_cfg->sis64) { | ||
7281 | /* Set the adapter to the correct endian mode. */ | ||
7282 | writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg); | ||
7283 | int_reg = readl(ioa_cfg->regs.endian_swap_reg); | ||
7284 | } | ||
7285 | |||
7211 | int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); | 7286 | int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); |
7212 | 7287 | ||
7213 | if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { | 7288 | if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { |
@@ -7365,6 +7440,7 @@ static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg) | |||
7365 | static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd) | 7440 | static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd) |
7366 | { | 7441 | { |
7367 | struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg; | 7442 | struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg; |
7443 | volatile u32 int_reg; | ||
7368 | int rc; | 7444 | int rc; |
7369 | 7445 | ||
7370 | ENTER; | 7446 | ENTER; |
@@ -7383,6 +7459,12 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd) | |||
7383 | 7459 | ||
7384 | ipr_fail_all_ops(ioa_cfg); | 7460 | ipr_fail_all_ops(ioa_cfg); |
7385 | 7461 | ||
7462 | if (ioa_cfg->sis64) { | ||
7463 | /* Set the adapter to the correct endian mode. */ | ||
7464 | writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg); | ||
7465 | int_reg = readl(ioa_cfg->regs.endian_swap_reg); | ||
7466 | } | ||
7467 | |||
7386 | if (ioa_cfg->ioa_unit_checked) { | 7468 | if (ioa_cfg->ioa_unit_checked) { |
7387 | ioa_cfg->ioa_unit_checked = 0; | 7469 | ioa_cfg->ioa_unit_checked = 0; |
7388 | ipr_get_unit_check_buffer(ioa_cfg); | 7470 | ipr_get_unit_check_buffer(ioa_cfg); |
@@ -7438,20 +7520,25 @@ static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd) | |||
7438 | static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd) | 7520 | static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd) |
7439 | { | 7521 | { |
7440 | struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg; | 7522 | struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg; |
7441 | int rc; | 7523 | int rc = PCIBIOS_SUCCESSFUL; |
7442 | 7524 | ||
7443 | ENTER; | 7525 | ENTER; |
7444 | pci_block_user_cfg_access(ioa_cfg->pdev); | 7526 | pci_block_user_cfg_access(ioa_cfg->pdev); |
7445 | rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START); | ||
7446 | 7527 | ||
7447 | if (rc != PCIBIOS_SUCCESSFUL) { | 7528 | if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO) |
7448 | pci_unblock_user_cfg_access(ipr_cmd->ioa_cfg->pdev); | 7529 | writel(IPR_UPROCI_SIS64_START_BIST, |
7449 | ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR); | 7530 | ioa_cfg->regs.set_uproc_interrupt_reg32); |
7450 | rc = IPR_RC_JOB_CONTINUE; | 7531 | else |
7451 | } else { | 7532 | rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START); |
7533 | |||
7534 | if (rc == PCIBIOS_SUCCESSFUL) { | ||
7452 | ipr_cmd->job_step = ipr_reset_bist_done; | 7535 | ipr_cmd->job_step = ipr_reset_bist_done; |
7453 | ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT); | 7536 | ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT); |
7454 | rc = IPR_RC_JOB_RETURN; | 7537 | rc = IPR_RC_JOB_RETURN; |
7538 | } else { | ||
7539 | pci_unblock_user_cfg_access(ipr_cmd->ioa_cfg->pdev); | ||
7540 | ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR); | ||
7541 | rc = IPR_RC_JOB_CONTINUE; | ||
7455 | } | 7542 | } |
7456 | 7543 | ||
7457 | LEAVE; | 7544 | LEAVE; |
@@ -7547,7 +7634,7 @@ static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd) | |||
7547 | } | 7634 | } |
7548 | 7635 | ||
7549 | /** | 7636 | /** |
7550 | * ipr_reset_alert_part2 - Alert the adapter of a pending reset | 7637 | * ipr_reset_alert - Alert the adapter of a pending reset |
7551 | * @ipr_cmd: ipr command struct | 7638 | * @ipr_cmd: ipr command struct |
7552 | * | 7639 | * |
7553 | * Description: This function alerts the adapter that it will be reset. | 7640 | * Description: This function alerts the adapter that it will be reset. |
@@ -8318,6 +8405,7 @@ static void __devinit ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg, | |||
8318 | t->init_feedback_reg = base + p->init_feedback_reg; | 8405 | t->init_feedback_reg = base + p->init_feedback_reg; |
8319 | t->dump_addr_reg = base + p->dump_addr_reg; | 8406 | t->dump_addr_reg = base + p->dump_addr_reg; |
8320 | t->dump_data_reg = base + p->dump_data_reg; | 8407 | t->dump_data_reg = base + p->dump_data_reg; |
8408 | t->endian_swap_reg = base + p->endian_swap_reg; | ||
8321 | } | 8409 | } |
8322 | } | 8410 | } |
8323 | 8411 | ||
@@ -8873,6 +8961,8 @@ static struct pci_device_id ipr_pci_table[] __devinitdata = { | |||
8873 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, | 8961 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, |
8874 | PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 }, | 8962 | PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 }, |
8875 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, | 8963 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, |
8964 | PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 }, | ||
8965 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, | ||
8876 | PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0, | 8966 | PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0, |
8877 | IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET }, | 8967 | IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET }, |
8878 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, | 8968 | { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, |