aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/scsi/hpsa.c
diff options
context:
space:
mode:
authorTomas Henzl <thenzl@redhat.com>2011-11-28 09:39:55 -0500
committerJames Bottomley <JBottomley@Parallels.com>2011-12-15 01:57:30 -0500
commit7af0abbc2ffcae601ea14e39048901833528f104 (patch)
tree64af7e3da26dc9918c9a6e1c03561289b5f20a89 /drivers/scsi/hpsa.c
parent45bcf018d1a4779d592764ef57517c92589d55d7 (diff)
[SCSI] hpsa: add the Smart Array 5i to the kdump blacklist
The '5i' controller freezes when a kdump is attemted. This patch admits it and adds the controller to the unresetable list. Signed-off-by: Tomas Henzl <thenzl@redhat.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/hpsa.c')
-rw-r--r--drivers/scsi/hpsa.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c
index 594ce8316727..5140f5d0fd6b 100644
--- a/drivers/scsi/hpsa.c
+++ b/drivers/scsi/hpsa.c
@@ -293,12 +293,14 @@ static u32 unresettable_controller[] = {
293 0x3215103C, /* Smart Array E200i */ 293 0x3215103C, /* Smart Array E200i */
294 0x3237103C, /* Smart Array E500 */ 294 0x3237103C, /* Smart Array E500 */
295 0x323D103C, /* Smart Array P700m */ 295 0x323D103C, /* Smart Array P700m */
296 0x40800E11, /* Smart Array 5i */
296 0x409C0E11, /* Smart Array 6400 */ 297 0x409C0E11, /* Smart Array 6400 */
297 0x409D0E11, /* Smart Array 6400 EM */ 298 0x409D0E11, /* Smart Array 6400 EM */
298}; 299};
299 300
300/* List of controllers which cannot even be soft reset */ 301/* List of controllers which cannot even be soft reset */
301static u32 soft_unresettable_controller[] = { 302static u32 soft_unresettable_controller[] = {
303 0x40800E11, /* Smart Array 5i */
302 /* Exclude 640x boards. These are two pci devices in one slot 304 /* Exclude 640x boards. These are two pci devices in one slot
303 * which share a battery backed cache module. One controls the 305 * which share a battery backed cache module. One controls the
304 * cache, the other accesses the cache through the one that controls 306 * cache, the other accesses the cache through the one that controls