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authorDenys Vlasenko <vda.linux@googlemail.com>2008-09-22 17:56:42 -0400
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2008-10-23 12:42:12 -0400
commit060ae855a836d3ed3359faa13874e92caaa34763 (patch)
tree40471c6c232f0f7703b1db281260cae56b903208 /drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
parent7b61ab89f9981ef296fb04dc42ee46fcc922c14f (diff)
[SCSI] aic7xxx: update *_shipped files
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Acked-by: Hannes Reinecke <hare@suse.de> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped')
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped1723
1 files changed, 0 insertions, 1723 deletions
diff --git a/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped b/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
index c4c8a96bf5a3..f5ea715d6ac3 100644
--- a/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
+++ b/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
@@ -8,18 +8,6 @@
8 8
9#include "aic79xx_osm.h" 9#include "aic79xx_osm.h"
10 10
11static const ahd_reg_parse_entry_t MODE_PTR_parse_table[] = {
12 { "SRC_MODE", 0x07, 0x07 },
13 { "DST_MODE", 0x70, 0x70 }
14};
15
16int
17ahd_mode_ptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
18{
19 return (ahd_print_register(MODE_PTR_parse_table, 2, "MODE_PTR",
20 0x00, regvalue, cur_col, wrap));
21}
22
23static const ahd_reg_parse_entry_t INTSTAT_parse_table[] = { 11static const ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
24 { "SPLTINT", 0x01, 0x01 }, 12 { "SPLTINT", 0x01, 0x01 },
25 { "CMDCMPLT", 0x02, 0x02 }, 13 { "CMDCMPLT", 0x02, 0x02 },
@@ -39,110 +27,6 @@ ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
39 0x01, regvalue, cur_col, wrap)); 27 0x01, regvalue, cur_col, wrap));
40} 28}
41 29
42static const ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = {
43 { "NO_SEQINT", 0x00, 0xff },
44 { "BAD_PHASE", 0x01, 0xff },
45 { "SEND_REJECT", 0x02, 0xff },
46 { "PROTO_VIOLATION", 0x03, 0xff },
47 { "NO_MATCH", 0x04, 0xff },
48 { "IGN_WIDE_RES", 0x05, 0xff },
49 { "PDATA_REINIT", 0x06, 0xff },
50 { "HOST_MSG_LOOP", 0x07, 0xff },
51 { "BAD_STATUS", 0x08, 0xff },
52 { "DATA_OVERRUN", 0x09, 0xff },
53 { "MKMSG_FAILED", 0x0a, 0xff },
54 { "MISSED_BUSFREE", 0x0b, 0xff },
55 { "DUMP_CARD_STATE", 0x0c, 0xff },
56 { "ILLEGAL_PHASE", 0x0d, 0xff },
57 { "INVALID_SEQINT", 0x0e, 0xff },
58 { "CFG4ISTAT_INTR", 0x0f, 0xff },
59 { "STATUS_OVERRUN", 0x10, 0xff },
60 { "CFG4OVERRUN", 0x11, 0xff },
61 { "ENTERING_NONPACK", 0x12, 0xff },
62 { "TASKMGMT_FUNC_COMPLETE",0x13, 0xff },
63 { "TASKMGMT_CMD_CMPLT_OKAY",0x14, 0xff },
64 { "TRACEPOINT0", 0x15, 0xff },
65 { "TRACEPOINT1", 0x16, 0xff },
66 { "TRACEPOINT2", 0x17, 0xff },
67 { "TRACEPOINT3", 0x18, 0xff },
68 { "SAW_HWERR", 0x19, 0xff },
69 { "BAD_SCB_STATUS", 0x1a, 0xff }
70};
71
72int
73ahd_seqintcode_print(u_int regvalue, u_int *cur_col, u_int wrap)
74{
75 return (ahd_print_register(SEQINTCODE_parse_table, 27, "SEQINTCODE",
76 0x02, regvalue, cur_col, wrap));
77}
78
79static const ahd_reg_parse_entry_t CLRINT_parse_table[] = {
80 { "CLRSPLTINT", 0x01, 0x01 },
81 { "CLRCMDINT", 0x02, 0x02 },
82 { "CLRSEQINT", 0x04, 0x04 },
83 { "CLRSCSIINT", 0x08, 0x08 },
84 { "CLRPCIINT", 0x10, 0x10 },
85 { "CLRSWTMINT", 0x20, 0x20 },
86 { "CLRBRKADRINT", 0x40, 0x40 },
87 { "CLRHWERRINT", 0x80, 0x80 }
88};
89
90int
91ahd_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
92{
93 return (ahd_print_register(CLRINT_parse_table, 8, "CLRINT",
94 0x03, regvalue, cur_col, wrap));
95}
96
97static const ahd_reg_parse_entry_t ERROR_parse_table[] = {
98 { "DSCTMOUT", 0x02, 0x02 },
99 { "ILLOPCODE", 0x04, 0x04 },
100 { "SQPARERR", 0x08, 0x08 },
101 { "DPARERR", 0x10, 0x10 },
102 { "MPARERR", 0x20, 0x20 },
103 { "CIOACCESFAIL", 0x40, 0x40 },
104 { "CIOPARERR", 0x80, 0x80 }
105};
106
107int
108ahd_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
109{
110 return (ahd_print_register(ERROR_parse_table, 7, "ERROR",
111 0x04, regvalue, cur_col, wrap));
112}
113
114static const ahd_reg_parse_entry_t HCNTRL_parse_table[] = {
115 { "CHIPRST", 0x01, 0x01 },
116 { "CHIPRSTACK", 0x01, 0x01 },
117 { "INTEN", 0x02, 0x02 },
118 { "PAUSE", 0x04, 0x04 },
119 { "SWTIMER_START_B", 0x08, 0x08 },
120 { "SWINT", 0x10, 0x10 },
121 { "POWRDN", 0x40, 0x40 },
122 { "SEQ_RESET", 0x80, 0x80 }
123};
124
125int
126ahd_hcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
127{
128 return (ahd_print_register(HCNTRL_parse_table, 8, "HCNTRL",
129 0x05, regvalue, cur_col, wrap));
130}
131
132int
133ahd_hnscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
134{
135 return (ahd_print_register(NULL, 0, "HNSCB_QOFF",
136 0x06, regvalue, cur_col, wrap));
137}
138
139int
140ahd_hescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
141{
142 return (ahd_print_register(NULL, 0, "HESCB_QOFF",
143 0x08, regvalue, cur_col, wrap));
144}
145
146static const ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = { 30static const ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
147 { "ENINT_COALESCE", 0x40, 0x40 }, 31 { "ENINT_COALESCE", 0x40, 0x40 },
148 { "HOST_TQINPOS", 0x80, 0x80 } 32 { "HOST_TQINPOS", 0x80, 0x80 }
@@ -170,77 +54,6 @@ ahd_seqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
170 0x0c, regvalue, cur_col, wrap)); 54 0x0c, regvalue, cur_col, wrap));
171} 55}
172 56
173static const ahd_reg_parse_entry_t CLRSEQINTSTAT_parse_table[] = {
174 { "CLRSEQ_SPLTINT", 0x01, 0x01 },
175 { "CLRSEQ_PCIINT", 0x02, 0x02 },
176 { "CLRSEQ_SCSIINT", 0x04, 0x04 },
177 { "CLRSEQ_SEQINT", 0x08, 0x08 },
178 { "CLRSEQ_SWTMRTO", 0x10, 0x10 }
179};
180
181int
182ahd_clrseqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
183{
184 return (ahd_print_register(CLRSEQINTSTAT_parse_table, 5, "CLRSEQINTSTAT",
185 0x0c, regvalue, cur_col, wrap));
186}
187
188int
189ahd_swtimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
190{
191 return (ahd_print_register(NULL, 0, "SWTIMER",
192 0x0e, regvalue, cur_col, wrap));
193}
194
195int
196ahd_snscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
197{
198 return (ahd_print_register(NULL, 0, "SNSCB_QOFF",
199 0x10, regvalue, cur_col, wrap));
200}
201
202int
203ahd_sescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
204{
205 return (ahd_print_register(NULL, 0, "SESCB_QOFF",
206 0x12, regvalue, cur_col, wrap));
207}
208
209int
210ahd_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
211{
212 return (ahd_print_register(NULL, 0, "SDSCB_QOFF",
213 0x14, regvalue, cur_col, wrap));
214}
215
216static const ahd_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
217 { "SCB_QSIZE_4", 0x00, 0x0f },
218 { "SCB_QSIZE_8", 0x01, 0x0f },
219 { "SCB_QSIZE_16", 0x02, 0x0f },
220 { "SCB_QSIZE_32", 0x03, 0x0f },
221 { "SCB_QSIZE_64", 0x04, 0x0f },
222 { "SCB_QSIZE_128", 0x05, 0x0f },
223 { "SCB_QSIZE_256", 0x06, 0x0f },
224 { "SCB_QSIZE_512", 0x07, 0x0f },
225 { "SCB_QSIZE_1024", 0x08, 0x0f },
226 { "SCB_QSIZE_2048", 0x09, 0x0f },
227 { "SCB_QSIZE_4096", 0x0a, 0x0f },
228 { "SCB_QSIZE_8192", 0x0b, 0x0f },
229 { "SCB_QSIZE_16384", 0x0c, 0x0f },
230 { "SCB_QSIZE", 0x0f, 0x0f },
231 { "HS_MAILBOX_ACT", 0x10, 0x10 },
232 { "SDSCB_ROLLOVR", 0x20, 0x20 },
233 { "NEW_SCB_AVAIL", 0x40, 0x40 },
234 { "EMPTY_SCB_AVAIL", 0x80, 0x80 }
235};
236
237int
238ahd_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
239{
240 return (ahd_print_register(QOFF_CTLSTA_parse_table, 18, "QOFF_CTLSTA",
241 0x16, regvalue, cur_col, wrap));
242}
243
244static const ahd_reg_parse_entry_t INTCTL_parse_table[] = { 57static const ahd_reg_parse_entry_t INTCTL_parse_table[] = {
245 { "SPLTINTEN", 0x01, 0x01 }, 58 { "SPLTINTEN", 0x01, 0x01 },
246 { "SEQINTEN", 0x02, 0x02 }, 59 { "SEQINTEN", 0x02, 0x02 },
@@ -280,22 +93,6 @@ ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
280 0x19, regvalue, cur_col, wrap)); 93 0x19, regvalue, cur_col, wrap));
281} 94}
282 95
283static const ahd_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
284 { "CIOPARCKEN", 0x01, 0x01 },
285 { "DISABLE_TWATE", 0x02, 0x02 },
286 { "EXTREQLCK", 0x10, 0x10 },
287 { "MPARCKEN", 0x20, 0x20 },
288 { "DPARCKEN", 0x40, 0x40 },
289 { "CACHETHEN", 0x80, 0x80 }
290};
291
292int
293ahd_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
294{
295 return (ahd_print_register(DSCOMMAND0_parse_table, 6, "DSCOMMAND0",
296 0x19, regvalue, cur_col, wrap));
297}
298
299static const ahd_reg_parse_entry_t DFSTATUS_parse_table[] = { 96static const ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
300 { "FIFOEMP", 0x01, 0x01 }, 97 { "FIFOEMP", 0x01, 0x01 },
301 { "FIFOFULL", 0x02, 0x02 }, 98 { "FIFOFULL", 0x02, 0x02 },
@@ -327,146 +124,6 @@ ahd_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
327 0x1b, regvalue, cur_col, wrap)); 124 0x1b, regvalue, cur_col, wrap));
328} 125}
329 126
330static const ahd_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
331 { "LAST_SEG", 0x02, 0x02 },
332 { "ODD_SEG", 0x04, 0x04 },
333 { "SG_ADDR_MASK", 0xf8, 0xf8 }
334};
335
336int
337ahd_sg_cache_pre_print(u_int regvalue, u_int *cur_col, u_int wrap)
338{
339 return (ahd_print_register(SG_CACHE_PRE_parse_table, 3, "SG_CACHE_PRE",
340 0x1b, regvalue, cur_col, wrap));
341}
342
343int
344ahd_lqin_print(u_int regvalue, u_int *cur_col, u_int wrap)
345{
346 return (ahd_print_register(NULL, 0, "LQIN",
347 0x20, regvalue, cur_col, wrap));
348}
349
350int
351ahd_lunptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
352{
353 return (ahd_print_register(NULL, 0, "LUNPTR",
354 0x22, regvalue, cur_col, wrap));
355}
356
357int
358ahd_cmdlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
359{
360 return (ahd_print_register(NULL, 0, "CMDLENPTR",
361 0x25, regvalue, cur_col, wrap));
362}
363
364int
365ahd_attrptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
366{
367 return (ahd_print_register(NULL, 0, "ATTRPTR",
368 0x26, regvalue, cur_col, wrap));
369}
370
371int
372ahd_flagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
373{
374 return (ahd_print_register(NULL, 0, "FLAGPTR",
375 0x27, regvalue, cur_col, wrap));
376}
377
378int
379ahd_cmdptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
380{
381 return (ahd_print_register(NULL, 0, "CMDPTR",
382 0x28, regvalue, cur_col, wrap));
383}
384
385int
386ahd_qnextptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
387{
388 return (ahd_print_register(NULL, 0, "QNEXTPTR",
389 0x29, regvalue, cur_col, wrap));
390}
391
392int
393ahd_abrtbyteptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
394{
395 return (ahd_print_register(NULL, 0, "ABRTBYTEPTR",
396 0x2b, regvalue, cur_col, wrap));
397}
398
399int
400ahd_abrtbitptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
401{
402 return (ahd_print_register(NULL, 0, "ABRTBITPTR",
403 0x2c, regvalue, cur_col, wrap));
404}
405
406static const ahd_reg_parse_entry_t LUNLEN_parse_table[] = {
407 { "ILUNLEN", 0x0f, 0x0f },
408 { "TLUNLEN", 0xf0, 0xf0 }
409};
410
411int
412ahd_lunlen_print(u_int regvalue, u_int *cur_col, u_int wrap)
413{
414 return (ahd_print_register(LUNLEN_parse_table, 2, "LUNLEN",
415 0x30, regvalue, cur_col, wrap));
416}
417
418int
419ahd_cdblimit_print(u_int regvalue, u_int *cur_col, u_int wrap)
420{
421 return (ahd_print_register(NULL, 0, "CDBLIMIT",
422 0x31, regvalue, cur_col, wrap));
423}
424
425int
426ahd_maxcmd_print(u_int regvalue, u_int *cur_col, u_int wrap)
427{
428 return (ahd_print_register(NULL, 0, "MAXCMD",
429 0x32, regvalue, cur_col, wrap));
430}
431
432int
433ahd_maxcmdcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
434{
435 return (ahd_print_register(NULL, 0, "MAXCMDCNT",
436 0x33, regvalue, cur_col, wrap));
437}
438
439static const ahd_reg_parse_entry_t LQCTL1_parse_table[] = {
440 { "ABORTPENDING", 0x01, 0x01 },
441 { "SINGLECMD", 0x02, 0x02 },
442 { "PCI2PCI", 0x04, 0x04 }
443};
444
445int
446ahd_lqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
447{
448 return (ahd_print_register(LQCTL1_parse_table, 3, "LQCTL1",
449 0x38, regvalue, cur_col, wrap));
450}
451
452static const ahd_reg_parse_entry_t LQCTL2_parse_table[] = {
453 { "LQOPAUSE", 0x01, 0x01 },
454 { "LQOTOIDLE", 0x02, 0x02 },
455 { "LQOCONTINUE", 0x04, 0x04 },
456 { "LQORETRY", 0x08, 0x08 },
457 { "LQIPAUSE", 0x10, 0x10 },
458 { "LQITOIDLE", 0x20, 0x20 },
459 { "LQICONTINUE", 0x40, 0x40 },
460 { "LQIRETRY", 0x80, 0x80 }
461};
462
463int
464ahd_lqctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
465{
466 return (ahd_print_register(LQCTL2_parse_table, 8, "LQCTL2",
467 0x39, regvalue, cur_col, wrap));
468}
469
470static const ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = { 127static const ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
471 { "SCSIRSTO", 0x01, 0x01 }, 128 { "SCSIRSTO", 0x01, 0x01 },
472 { "FORCEBUSFREE", 0x10, 0x10 }, 129 { "FORCEBUSFREE", 0x10, 0x10 },
@@ -498,37 +155,6 @@ ahd_scsiseq1_print(u_int regvalue, u_int *cur_col, u_int wrap)
498 0x3b, regvalue, cur_col, wrap)); 155 0x3b, regvalue, cur_col, wrap));
499} 156}
500 157
501static const ahd_reg_parse_entry_t SXFRCTL0_parse_table[] = {
502 { "SPIOEN", 0x08, 0x08 },
503 { "BIOSCANCELEN", 0x10, 0x10 },
504 { "DFPEXP", 0x40, 0x40 },
505 { "DFON", 0x80, 0x80 }
506};
507
508int
509ahd_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
510{
511 return (ahd_print_register(SXFRCTL0_parse_table, 4, "SXFRCTL0",
512 0x3c, regvalue, cur_col, wrap));
513}
514
515static const ahd_reg_parse_entry_t SXFRCTL1_parse_table[] = {
516 { "STPWEN", 0x01, 0x01 },
517 { "ACTNEGEN", 0x02, 0x02 },
518 { "ENSTIMER", 0x04, 0x04 },
519 { "STIMESEL", 0x18, 0x18 },
520 { "ENSPCHK", 0x20, 0x20 },
521 { "ENSACHK", 0x40, 0x40 },
522 { "BITBUCKET", 0x80, 0x80 }
523};
524
525int
526ahd_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
527{
528 return (ahd_print_register(SXFRCTL1_parse_table, 7, "SXFRCTL1",
529 0x3d, regvalue, cur_col, wrap));
530}
531
532static const ahd_reg_parse_entry_t DFFSTAT_parse_table[] = { 158static const ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
533 { "CURRFIFO_0", 0x00, 0x03 }, 159 { "CURRFIFO_0", 0x00, 0x03 },
534 { "CURRFIFO_1", 0x01, 0x03 }, 160 { "CURRFIFO_1", 0x01, 0x03 },
@@ -545,40 +171,6 @@ ahd_dffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
545 0x3f, regvalue, cur_col, wrap)); 171 0x3f, regvalue, cur_col, wrap));
546} 172}
547 173
548int
549ahd_multargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
550{
551 return (ahd_print_register(NULL, 0, "MULTARGID",
552 0x40, regvalue, cur_col, wrap));
553}
554
555static const ahd_reg_parse_entry_t SCSISIGO_parse_table[] = {
556 { "P_DATAOUT", 0x00, 0xe0 },
557 { "P_DATAOUT_DT", 0x20, 0xe0 },
558 { "P_DATAIN", 0x40, 0xe0 },
559 { "P_DATAIN_DT", 0x60, 0xe0 },
560 { "P_COMMAND", 0x80, 0xe0 },
561 { "P_MESGOUT", 0xa0, 0xe0 },
562 { "P_STATUS", 0xc0, 0xe0 },
563 { "P_MESGIN", 0xe0, 0xe0 },
564 { "ACKO", 0x01, 0x01 },
565 { "REQO", 0x02, 0x02 },
566 { "BSYO", 0x04, 0x04 },
567 { "SELO", 0x08, 0x08 },
568 { "ATNO", 0x10, 0x10 },
569 { "MSGO", 0x20, 0x20 },
570 { "IOO", 0x40, 0x40 },
571 { "CDO", 0x80, 0x80 },
572 { "PHASE_MASK", 0xe0, 0xe0 }
573};
574
575int
576ahd_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
577{
578 return (ahd_print_register(SCSISIGO_parse_table, 17, "SCSISIGO",
579 0x40, regvalue, cur_col, wrap));
580}
581
582static const ahd_reg_parse_entry_t SCSISIGI_parse_table[] = { 174static const ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
583 { "P_DATAOUT", 0x00, 0xe0 }, 175 { "P_DATAOUT", 0x00, 0xe0 },
584 { "P_DATAOUT_DT", 0x20, 0xe0 }, 176 { "P_DATAOUT_DT", 0x20, 0xe0 },
@@ -624,31 +216,12 @@ ahd_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
624} 216}
625 217
626int 218int
627ahd_scsidat_print(u_int regvalue, u_int *cur_col, u_int wrap)
628{
629 return (ahd_print_register(NULL, 0, "SCSIDAT",
630 0x44, regvalue, cur_col, wrap));
631}
632
633int
634ahd_scsibus_print(u_int regvalue, u_int *cur_col, u_int wrap) 219ahd_scsibus_print(u_int regvalue, u_int *cur_col, u_int wrap)
635{ 220{
636 return (ahd_print_register(NULL, 0, "SCSIBUS", 221 return (ahd_print_register(NULL, 0, "SCSIBUS",
637 0x46, regvalue, cur_col, wrap)); 222 0x46, regvalue, cur_col, wrap));
638} 223}
639 224
640static const ahd_reg_parse_entry_t TARGIDIN_parse_table[] = {
641 { "TARGID", 0x0f, 0x0f },
642 { "CLKOUT", 0x80, 0x80 }
643};
644
645int
646ahd_targidin_print(u_int regvalue, u_int *cur_col, u_int wrap)
647{
648 return (ahd_print_register(TARGIDIN_parse_table, 2, "TARGIDIN",
649 0x48, regvalue, cur_col, wrap));
650}
651
652static const ahd_reg_parse_entry_t SELID_parse_table[] = { 225static const ahd_reg_parse_entry_t SELID_parse_table[] = {
653 { "ONEBIT", 0x08, 0x08 }, 226 { "ONEBIT", 0x08, 0x08 },
654 { "SELID_MASK", 0xf0, 0xf0 } 227 { "SELID_MASK", 0xf0, 0xf0 }
@@ -661,38 +234,6 @@ ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
661 0x49, regvalue, cur_col, wrap)); 234 0x49, regvalue, cur_col, wrap));
662} 235}
663 236
664static const ahd_reg_parse_entry_t OPTIONMODE_parse_table[] = {
665 { "AUTO_MSGOUT_DE", 0x02, 0x02 },
666 { "ENDGFORMCHK", 0x04, 0x04 },
667 { "BUSFREEREV", 0x10, 0x10 },
668 { "BIASCANCTL", 0x20, 0x20 },
669 { "AUTOACKEN", 0x40, 0x40 },
670 { "BIOSCANCTL", 0x80, 0x80 },
671 { "OPTIONMODE_DEFAULTS",0x02, 0x02 }
672};
673
674int
675ahd_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
676{
677 return (ahd_print_register(OPTIONMODE_parse_table, 7, "OPTIONMODE",
678 0x4a, regvalue, cur_col, wrap));
679}
680
681static const ahd_reg_parse_entry_t SBLKCTL_parse_table[] = {
682 { "SELWIDE", 0x02, 0x02 },
683 { "ENAB20", 0x04, 0x04 },
684 { "ENAB40", 0x08, 0x08 },
685 { "DIAGLEDON", 0x40, 0x40 },
686 { "DIAGLEDEN", 0x80, 0x80 }
687};
688
689int
690ahd_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
691{
692 return (ahd_print_register(SBLKCTL_parse_table, 5, "SBLKCTL",
693 0x4a, regvalue, cur_col, wrap));
694}
695
696static const ahd_reg_parse_entry_t SSTAT0_parse_table[] = { 237static const ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
697 { "ARBDO", 0x01, 0x01 }, 238 { "ARBDO", 0x01, 0x01 },
698 { "SPIORDY", 0x02, 0x02 }, 239 { "SPIORDY", 0x02, 0x02 },
@@ -728,23 +269,6 @@ ahd_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
728 0x4b, regvalue, cur_col, wrap)); 269 0x4b, regvalue, cur_col, wrap));
729} 270}
730 271
731static const ahd_reg_parse_entry_t CLRSINT0_parse_table[] = {
732 { "CLRARBDO", 0x01, 0x01 },
733 { "CLRSPIORDY", 0x02, 0x02 },
734 { "CLROVERRUN", 0x04, 0x04 },
735 { "CLRIOERR", 0x08, 0x08 },
736 { "CLRSELINGO", 0x10, 0x10 },
737 { "CLRSELDI", 0x20, 0x20 },
738 { "CLRSELDO", 0x40, 0x40 }
739};
740
741int
742ahd_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
743{
744 return (ahd_print_register(CLRSINT0_parse_table, 7, "CLRSINT0",
745 0x4b, regvalue, cur_col, wrap));
746}
747
748static const ahd_reg_parse_entry_t SSTAT1_parse_table[] = { 272static const ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
749 { "REQINIT", 0x01, 0x01 }, 273 { "REQINIT", 0x01, 0x01 },
750 { "STRB2FAST", 0x02, 0x02 }, 274 { "STRB2FAST", 0x02, 0x02 },
@@ -763,23 +287,6 @@ ahd_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
763 0x4c, regvalue, cur_col, wrap)); 287 0x4c, regvalue, cur_col, wrap));
764} 288}
765 289
766static const ahd_reg_parse_entry_t CLRSINT1_parse_table[] = {
767 { "CLRREQINIT", 0x01, 0x01 },
768 { "CLRSTRB2FAST", 0x02, 0x02 },
769 { "CLRSCSIPERR", 0x04, 0x04 },
770 { "CLRBUSFREE", 0x08, 0x08 },
771 { "CLRSCSIRSTI", 0x20, 0x20 },
772 { "CLRATNO", 0x40, 0x40 },
773 { "CLRSELTIMEO", 0x80, 0x80 }
774};
775
776int
777ahd_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
778{
779 return (ahd_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
780 0x4c, regvalue, cur_col, wrap));
781}
782
783static const ahd_reg_parse_entry_t SSTAT2_parse_table[] = { 290static const ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
784 { "BUSFREE_LQO", 0x40, 0xc0 }, 291 { "BUSFREE_LQO", 0x40, 0xc0 },
785 { "BUSFREE_DFF0", 0x80, 0xc0 }, 292 { "BUSFREE_DFF0", 0x80, 0xc0 },
@@ -800,20 +307,6 @@ ahd_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
800 0x4d, regvalue, cur_col, wrap)); 307 0x4d, regvalue, cur_col, wrap));
801} 308}
802 309
803static const ahd_reg_parse_entry_t CLRSINT2_parse_table[] = {
804 { "CLRDMADONE", 0x01, 0x01 },
805 { "CLRSDONE", 0x02, 0x02 },
806 { "CLRWIDE_RES", 0x04, 0x04 },
807 { "CLRNONPACKREQ", 0x20, 0x20 }
808};
809
810int
811ahd_clrsint2_print(u_int regvalue, u_int *cur_col, u_int wrap)
812{
813 return (ahd_print_register(CLRSINT2_parse_table, 4, "CLRSINT2",
814 0x4d, regvalue, cur_col, wrap));
815}
816
817static const ahd_reg_parse_entry_t PERRDIAG_parse_table[] = { 310static const ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
818 { "DTERR", 0x01, 0x01 }, 311 { "DTERR", 0x01, 0x01 },
819 { "DGFORMERR", 0x02, 0x02 }, 312 { "DGFORMERR", 0x02, 0x02 },
@@ -833,26 +326,12 @@ ahd_perrdiag_print(u_int regvalue, u_int *cur_col, u_int wrap)
833} 326}
834 327
835int 328int
836ahd_lqistate_print(u_int regvalue, u_int *cur_col, u_int wrap)
837{
838 return (ahd_print_register(NULL, 0, "LQISTATE",
839 0x4e, regvalue, cur_col, wrap));
840}
841
842int
843ahd_soffcnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 329ahd_soffcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
844{ 330{
845 return (ahd_print_register(NULL, 0, "SOFFCNT", 331 return (ahd_print_register(NULL, 0, "SOFFCNT",
846 0x4f, regvalue, cur_col, wrap)); 332 0x4f, regvalue, cur_col, wrap));
847} 333}
848 334
849int
850ahd_lqostate_print(u_int regvalue, u_int *cur_col, u_int wrap)
851{
852 return (ahd_print_register(NULL, 0, "LQOSTATE",
853 0x4f, regvalue, cur_col, wrap));
854}
855
856static const ahd_reg_parse_entry_t LQISTAT0_parse_table[] = { 335static const ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
857 { "LQIATNCMD", 0x01, 0x01 }, 336 { "LQIATNCMD", 0x01, 0x01 },
858 { "LQIATNLQ", 0x02, 0x02 }, 337 { "LQIATNLQ", 0x02, 0x02 },
@@ -869,56 +348,6 @@ ahd_lqistat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
869 0x50, regvalue, cur_col, wrap)); 348 0x50, regvalue, cur_col, wrap));
870} 349}
871 350
872static const ahd_reg_parse_entry_t LQIMODE0_parse_table[] = {
873 { "ENLQIATNCMD", 0x01, 0x01 },
874 { "ENLQIATNLQ", 0x02, 0x02 },
875 { "ENLQIBADLQT", 0x04, 0x04 },
876 { "ENLQICRCT2", 0x08, 0x08 },
877 { "ENLQICRCT1", 0x10, 0x10 },
878 { "ENLQIATNQASK", 0x20, 0x20 }
879};
880
881int
882ahd_lqimode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
883{
884 return (ahd_print_register(LQIMODE0_parse_table, 6, "LQIMODE0",
885 0x50, regvalue, cur_col, wrap));
886}
887
888static const ahd_reg_parse_entry_t CLRLQIINT0_parse_table[] = {
889 { "CLRLQIATNCMD", 0x01, 0x01 },
890 { "CLRLQIATNLQ", 0x02, 0x02 },
891 { "CLRLQIBADLQT", 0x04, 0x04 },
892 { "CLRLQICRCT2", 0x08, 0x08 },
893 { "CLRLQICRCT1", 0x10, 0x10 },
894 { "CLRLQIATNQAS", 0x20, 0x20 }
895};
896
897int
898ahd_clrlqiint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
899{
900 return (ahd_print_register(CLRLQIINT0_parse_table, 6, "CLRLQIINT0",
901 0x50, regvalue, cur_col, wrap));
902}
903
904static const ahd_reg_parse_entry_t LQIMODE1_parse_table[] = {
905 { "ENLQIOVERI_NLQ", 0x01, 0x01 },
906 { "ENLQIOVERI_LQ", 0x02, 0x02 },
907 { "ENLQIBADLQI", 0x04, 0x04 },
908 { "ENLQICRCI_NLQ", 0x08, 0x08 },
909 { "ENLQICRCI_LQ", 0x10, 0x10 },
910 { "ENLIQABORT", 0x20, 0x20 },
911 { "ENLQIPHASE_NLQ", 0x40, 0x40 },
912 { "ENLQIPHASE_LQ", 0x80, 0x80 }
913};
914
915int
916ahd_lqimode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
917{
918 return (ahd_print_register(LQIMODE1_parse_table, 8, "LQIMODE1",
919 0x51, regvalue, cur_col, wrap));
920}
921
922static const ahd_reg_parse_entry_t LQISTAT1_parse_table[] = { 351static const ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
923 { "LQIOVERI_NLQ", 0x01, 0x01 }, 352 { "LQIOVERI_NLQ", 0x01, 0x01 },
924 { "LQIOVERI_LQ", 0x02, 0x02 }, 353 { "LQIOVERI_LQ", 0x02, 0x02 },
@@ -937,24 +366,6 @@ ahd_lqistat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
937 0x51, regvalue, cur_col, wrap)); 366 0x51, regvalue, cur_col, wrap));
938} 367}
939 368
940static const ahd_reg_parse_entry_t CLRLQIINT1_parse_table[] = {
941 { "CLRLQIOVERI_NLQ", 0x01, 0x01 },
942 { "CLRLQIOVERI_LQ", 0x02, 0x02 },
943 { "CLRLQIBADLQI", 0x04, 0x04 },
944 { "CLRLQICRCI_NLQ", 0x08, 0x08 },
945 { "CLRLQICRCI_LQ", 0x10, 0x10 },
946 { "CLRLIQABORT", 0x20, 0x20 },
947 { "CLRLQIPHASE_NLQ", 0x40, 0x40 },
948 { "CLRLQIPHASE_LQ", 0x80, 0x80 }
949};
950
951int
952ahd_clrlqiint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
953{
954 return (ahd_print_register(CLRLQIINT1_parse_table, 8, "CLRLQIINT1",
955 0x51, regvalue, cur_col, wrap));
956}
957
958static const ahd_reg_parse_entry_t LQISTAT2_parse_table[] = { 369static const ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
959 { "LQIGSAVAIL", 0x01, 0x01 }, 370 { "LQIGSAVAIL", 0x01, 0x01 },
960 { "LQISTOPCMD", 0x02, 0x02 }, 371 { "LQISTOPCMD", 0x02, 0x02 },
@@ -985,30 +396,6 @@ ahd_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
985 0x53, regvalue, cur_col, wrap)); 396 0x53, regvalue, cur_col, wrap));
986} 397}
987 398
988static const ahd_reg_parse_entry_t SIMODE3_parse_table[] = {
989 { "ENOSRAMPERR", 0x01, 0x01 },
990 { "ENNTRAMPERR", 0x02, 0x02 }
991};
992
993int
994ahd_simode3_print(u_int regvalue, u_int *cur_col, u_int wrap)
995{
996 return (ahd_print_register(SIMODE3_parse_table, 2, "SIMODE3",
997 0x53, regvalue, cur_col, wrap));
998}
999
1000static const ahd_reg_parse_entry_t CLRSINT3_parse_table[] = {
1001 { "CLROSRAMPERR", 0x01, 0x01 },
1002 { "CLRNTRAMPERR", 0x02, 0x02 }
1003};
1004
1005int
1006ahd_clrsint3_print(u_int regvalue, u_int *cur_col, u_int wrap)
1007{
1008 return (ahd_print_register(CLRSINT3_parse_table, 2, "CLRSINT3",
1009 0x53, regvalue, cur_col, wrap));
1010}
1011
1012static const ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = { 399static const ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
1013 { "LQOTCRC", 0x01, 0x01 }, 400 { "LQOTCRC", 0x01, 0x01 },
1014 { "LQOATNPKT", 0x02, 0x02 }, 401 { "LQOATNPKT", 0x02, 0x02 },
@@ -1024,51 +411,6 @@ ahd_lqostat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1024 0x54, regvalue, cur_col, wrap)); 411 0x54, regvalue, cur_col, wrap));
1025} 412}
1026 413
1027static const ahd_reg_parse_entry_t CLRLQOINT0_parse_table[] = {
1028 { "CLRLQOTCRC", 0x01, 0x01 },
1029 { "CLRLQOATNPKT", 0x02, 0x02 },
1030 { "CLRLQOATNLQ", 0x04, 0x04 },
1031 { "CLRLQOSTOPT2", 0x08, 0x08 },
1032 { "CLRLQOTARGSCBPERR", 0x10, 0x10 }
1033};
1034
1035int
1036ahd_clrlqoint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1037{
1038 return (ahd_print_register(CLRLQOINT0_parse_table, 5, "CLRLQOINT0",
1039 0x54, regvalue, cur_col, wrap));
1040}
1041
1042static const ahd_reg_parse_entry_t LQOMODE0_parse_table[] = {
1043 { "ENLQOTCRC", 0x01, 0x01 },
1044 { "ENLQOATNPKT", 0x02, 0x02 },
1045 { "ENLQOATNLQ", 0x04, 0x04 },
1046 { "ENLQOSTOPT2", 0x08, 0x08 },
1047 { "ENLQOTARGSCBPERR", 0x10, 0x10 }
1048};
1049
1050int
1051ahd_lqomode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1052{
1053 return (ahd_print_register(LQOMODE0_parse_table, 5, "LQOMODE0",
1054 0x54, regvalue, cur_col, wrap));
1055}
1056
1057static const ahd_reg_parse_entry_t LQOMODE1_parse_table[] = {
1058 { "ENLQOPHACHGINPKT", 0x01, 0x01 },
1059 { "ENLQOBUSFREE", 0x02, 0x02 },
1060 { "ENLQOBADQAS", 0x04, 0x04 },
1061 { "ENLQOSTOPI2", 0x08, 0x08 },
1062 { "ENLQOINITSCBPERR", 0x10, 0x10 }
1063};
1064
1065int
1066ahd_lqomode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1067{
1068 return (ahd_print_register(LQOMODE1_parse_table, 5, "LQOMODE1",
1069 0x55, regvalue, cur_col, wrap));
1070}
1071
1072static const ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = { 414static const ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
1073 { "LQOPHACHGINPKT", 0x01, 0x01 }, 415 { "LQOPHACHGINPKT", 0x01, 0x01 },
1074 { "LQOBUSFREE", 0x02, 0x02 }, 416 { "LQOBUSFREE", 0x02, 0x02 },
@@ -1084,21 +426,6 @@ ahd_lqostat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1084 0x55, regvalue, cur_col, wrap)); 426 0x55, regvalue, cur_col, wrap));
1085} 427}
1086 428
1087static const ahd_reg_parse_entry_t CLRLQOINT1_parse_table[] = {
1088 { "CLRLQOPHACHGINPKT", 0x01, 0x01 },
1089 { "CLRLQOBUSFREE", 0x02, 0x02 },
1090 { "CLRLQOBADQAS", 0x04, 0x04 },
1091 { "CLRLQOSTOPI2", 0x08, 0x08 },
1092 { "CLRLQOINITSCBPERR", 0x10, 0x10 }
1093};
1094
1095int
1096ahd_clrlqoint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1097{
1098 return (ahd_print_register(CLRLQOINT1_parse_table, 5, "CLRLQOINT1",
1099 0x55, regvalue, cur_col, wrap));
1100}
1101
1102static const ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = { 429static const ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
1103 { "LQOSTOP0", 0x01, 0x01 }, 430 { "LQOSTOP0", 0x01, 0x01 },
1104 { "LQOPHACHGOUTPKT", 0x02, 0x02 }, 431 { "LQOPHACHGOUTPKT", 0x02, 0x02 },
@@ -1113,13 +440,6 @@ ahd_lqostat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
1113 0x56, regvalue, cur_col, wrap)); 440 0x56, regvalue, cur_col, wrap));
1114} 441}
1115 442
1116int
1117ahd_os_space_cnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1118{
1119 return (ahd_print_register(NULL, 0, "OS_SPACE_CNT",
1120 0x56, regvalue, cur_col, wrap));
1121}
1122
1123static const ahd_reg_parse_entry_t SIMODE1_parse_table[] = { 443static const ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
1124 { "ENREQINIT", 0x01, 0x01 }, 444 { "ENREQINIT", 0x01, 0x01 },
1125 { "ENSTRB2FAST", 0x02, 0x02 }, 445 { "ENSTRB2FAST", 0x02, 0x02 },
@@ -1138,13 +458,6 @@ ahd_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1138 0x57, regvalue, cur_col, wrap)); 458 0x57, regvalue, cur_col, wrap));
1139} 459}
1140 460
1141int
1142ahd_gsfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
1143{
1144 return (ahd_print_register(NULL, 0, "GSFIFO",
1145 0x58, regvalue, cur_col, wrap));
1146}
1147
1148static const ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = { 461static const ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
1149 { "RSTCHN", 0x01, 0x01 }, 462 { "RSTCHN", 0x01, 0x01 },
1150 { "CLRCHN", 0x02, 0x02 }, 463 { "CLRCHN", 0x02, 0x02 },
@@ -1159,44 +472,6 @@ ahd_dffsxfrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1159 0x5a, regvalue, cur_col, wrap)); 472 0x5a, regvalue, cur_col, wrap));
1160} 473}
1161 474
1162static const ahd_reg_parse_entry_t LQOSCSCTL_parse_table[] = {
1163 { "LQONOCHKOVER", 0x01, 0x01 },
1164 { "LQONOHOLDLACK", 0x02, 0x02 },
1165 { "LQOBUSETDLY", 0x40, 0x40 },
1166 { "LQOH2A_VERSION", 0x80, 0x80 }
1167};
1168
1169int
1170ahd_lqoscsctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1171{
1172 return (ahd_print_register(LQOSCSCTL_parse_table, 4, "LQOSCSCTL",
1173 0x5a, regvalue, cur_col, wrap));
1174}
1175
1176int
1177ahd_nextscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
1178{
1179 return (ahd_print_register(NULL, 0, "NEXTSCB",
1180 0x5a, regvalue, cur_col, wrap));
1181}
1182
1183static const ahd_reg_parse_entry_t CLRSEQINTSRC_parse_table[] = {
1184 { "CLRCFG4TCMD", 0x01, 0x01 },
1185 { "CLRCFG4ICMD", 0x02, 0x02 },
1186 { "CLRCFG4TSTAT", 0x04, 0x04 },
1187 { "CLRCFG4ISTAT", 0x08, 0x08 },
1188 { "CLRCFG4DATA", 0x10, 0x10 },
1189 { "CLRSAVEPTRS", 0x20, 0x20 },
1190 { "CLRCTXTDONE", 0x40, 0x40 }
1191};
1192
1193int
1194ahd_clrseqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
1195{
1196 return (ahd_print_register(CLRSEQINTSRC_parse_table, 7, "CLRSEQINTSRC",
1197 0x5b, regvalue, cur_col, wrap));
1198}
1199
1200static const ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = { 475static const ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
1201 { "CFG4TCMD", 0x01, 0x01 }, 476 { "CFG4TCMD", 0x01, 0x01 },
1202 { "CFG4ICMD", 0x02, 0x02 }, 477 { "CFG4ICMD", 0x02, 0x02 },
@@ -1231,13 +506,6 @@ ahd_seqimode_print(u_int regvalue, u_int *cur_col, u_int wrap)
1231 0x5c, regvalue, cur_col, wrap)); 506 0x5c, regvalue, cur_col, wrap));
1232} 507}
1233 508
1234int
1235ahd_currscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
1236{
1237 return (ahd_print_register(NULL, 0, "CURRSCB",
1238 0x5c, regvalue, cur_col, wrap));
1239}
1240
1241static const ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = { 509static const ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
1242 { "FIFOFREE", 0x01, 0x01 }, 510 { "FIFOFREE", 0x01, 0x01 },
1243 { "DATAINFIFO", 0x02, 0x02 }, 511 { "DATAINFIFO", 0x02, 0x02 },
@@ -1256,308 +524,12 @@ ahd_mdffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1256} 524}
1257 525
1258int 526int
1259ahd_lastscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
1260{
1261 return (ahd_print_register(NULL, 0, "LASTSCB",
1262 0x5e, regvalue, cur_col, wrap));
1263}
1264
1265int
1266ahd_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1267{
1268 return (ahd_print_register(NULL, 0, "SHADDR",
1269 0x60, regvalue, cur_col, wrap));
1270}
1271
1272int
1273ahd_negoaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1274{
1275 return (ahd_print_register(NULL, 0, "NEGOADDR",
1276 0x60, regvalue, cur_col, wrap));
1277}
1278
1279int
1280ahd_negperiod_print(u_int regvalue, u_int *cur_col, u_int wrap)
1281{
1282 return (ahd_print_register(NULL, 0, "NEGPERIOD",
1283 0x61, regvalue, cur_col, wrap));
1284}
1285
1286int
1287ahd_negoffset_print(u_int regvalue, u_int *cur_col, u_int wrap)
1288{
1289 return (ahd_print_register(NULL, 0, "NEGOFFSET",
1290 0x62, regvalue, cur_col, wrap));
1291}
1292
1293static const ahd_reg_parse_entry_t NEGPPROPTS_parse_table[] = {
1294 { "PPROPT_IUT", 0x01, 0x01 },
1295 { "PPROPT_DT", 0x02, 0x02 },
1296 { "PPROPT_QAS", 0x04, 0x04 },
1297 { "PPROPT_PACE", 0x08, 0x08 }
1298};
1299
1300int
1301ahd_negppropts_print(u_int regvalue, u_int *cur_col, u_int wrap)
1302{
1303 return (ahd_print_register(NEGPPROPTS_parse_table, 4, "NEGPPROPTS",
1304 0x63, regvalue, cur_col, wrap));
1305}
1306
1307static const ahd_reg_parse_entry_t NEGCONOPTS_parse_table[] = {
1308 { "WIDEXFER", 0x01, 0x01 },
1309 { "ENAUTOATNO", 0x02, 0x02 },
1310 { "ENAUTOATNI", 0x04, 0x04 },
1311 { "ENSLOWCRC", 0x08, 0x08 },
1312 { "RTI_OVRDTRN", 0x10, 0x10 },
1313 { "RTI_WRTDIS", 0x20, 0x20 },
1314 { "ENSNAPSHOT", 0x40, 0x40 }
1315};
1316
1317int
1318ahd_negconopts_print(u_int regvalue, u_int *cur_col, u_int wrap)
1319{
1320 return (ahd_print_register(NEGCONOPTS_parse_table, 7, "NEGCONOPTS",
1321 0x64, regvalue, cur_col, wrap));
1322}
1323
1324int
1325ahd_annexcol_print(u_int regvalue, u_int *cur_col, u_int wrap)
1326{
1327 return (ahd_print_register(NULL, 0, "ANNEXCOL",
1328 0x65, regvalue, cur_col, wrap));
1329}
1330
1331int
1332ahd_annexdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1333{
1334 return (ahd_print_register(NULL, 0, "ANNEXDAT",
1335 0x66, regvalue, cur_col, wrap));
1336}
1337
1338static const ahd_reg_parse_entry_t SCSCHKN_parse_table[] = {
1339 { "LSTSGCLRDIS", 0x01, 0x01 },
1340 { "SHVALIDSTDIS", 0x02, 0x02 },
1341 { "DFFACTCLR", 0x04, 0x04 },
1342 { "SDONEMSKDIS", 0x08, 0x08 },
1343 { "WIDERESEN", 0x10, 0x10 },
1344 { "CURRFIFODEF", 0x20, 0x20 },
1345 { "STSELSKIDDIS", 0x40, 0x40 },
1346 { "BIDICHKDIS", 0x80, 0x80 }
1347};
1348
1349int
1350ahd_scschkn_print(u_int regvalue, u_int *cur_col, u_int wrap)
1351{
1352 return (ahd_print_register(SCSCHKN_parse_table, 8, "SCSCHKN",
1353 0x66, regvalue, cur_col, wrap));
1354}
1355
1356int
1357ahd_iownid_print(u_int regvalue, u_int *cur_col, u_int wrap)
1358{
1359 return (ahd_print_register(NULL, 0, "IOWNID",
1360 0x67, regvalue, cur_col, wrap));
1361}
1362
1363int
1364ahd_shcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1365{
1366 return (ahd_print_register(NULL, 0, "SHCNT",
1367 0x68, regvalue, cur_col, wrap));
1368}
1369
1370int
1371ahd_townid_print(u_int regvalue, u_int *cur_col, u_int wrap)
1372{
1373 return (ahd_print_register(NULL, 0, "TOWNID",
1374 0x69, regvalue, cur_col, wrap));
1375}
1376
1377int
1378ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap) 527ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap)
1379{ 528{
1380 return (ahd_print_register(NULL, 0, "SELOID", 529 return (ahd_print_register(NULL, 0, "SELOID",
1381 0x6b, regvalue, cur_col, wrap)); 530 0x6b, regvalue, cur_col, wrap));
1382} 531}
1383 532
1384int
1385ahd_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1386{
1387 return (ahd_print_register(NULL, 0, "HADDR",
1388 0x70, regvalue, cur_col, wrap));
1389}
1390
1391int
1392ahd_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1393{
1394 return (ahd_print_register(NULL, 0, "HCNT",
1395 0x78, regvalue, cur_col, wrap));
1396}
1397
1398int
1399ahd_sghaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1400{
1401 return (ahd_print_register(NULL, 0, "SGHADDR",
1402 0x7c, regvalue, cur_col, wrap));
1403}
1404
1405int
1406ahd_scbhaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1407{
1408 return (ahd_print_register(NULL, 0, "SCBHADDR",
1409 0x7c, regvalue, cur_col, wrap));
1410}
1411
1412int
1413ahd_sghcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1414{
1415 return (ahd_print_register(NULL, 0, "SGHCNT",
1416 0x84, regvalue, cur_col, wrap));
1417}
1418
1419int
1420ahd_scbhcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1421{
1422 return (ahd_print_register(NULL, 0, "SCBHCNT",
1423 0x84, regvalue, cur_col, wrap));
1424}
1425
1426static const ahd_reg_parse_entry_t DFF_THRSH_parse_table[] = {
1427 { "WR_DFTHRSH_MIN", 0x00, 0x70 },
1428 { "RD_DFTHRSH_MIN", 0x00, 0x07 },
1429 { "RD_DFTHRSH_25", 0x01, 0x07 },
1430 { "RD_DFTHRSH_50", 0x02, 0x07 },
1431 { "RD_DFTHRSH_63", 0x03, 0x07 },
1432 { "RD_DFTHRSH_75", 0x04, 0x07 },
1433 { "RD_DFTHRSH_85", 0x05, 0x07 },
1434 { "RD_DFTHRSH_90", 0x06, 0x07 },
1435 { "RD_DFTHRSH_MAX", 0x07, 0x07 },
1436 { "WR_DFTHRSH_25", 0x10, 0x70 },
1437 { "WR_DFTHRSH_50", 0x20, 0x70 },
1438 { "WR_DFTHRSH_63", 0x30, 0x70 },
1439 { "WR_DFTHRSH_75", 0x40, 0x70 },
1440 { "WR_DFTHRSH_85", 0x50, 0x70 },
1441 { "WR_DFTHRSH_90", 0x60, 0x70 },
1442 { "WR_DFTHRSH_MAX", 0x70, 0x70 },
1443 { "RD_DFTHRSH", 0x07, 0x07 },
1444 { "WR_DFTHRSH", 0x70, 0x70 }
1445};
1446
1447int
1448ahd_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
1449{
1450 return (ahd_print_register(DFF_THRSH_parse_table, 18, "DFF_THRSH",
1451 0x88, regvalue, cur_col, wrap));
1452}
1453
1454static const ahd_reg_parse_entry_t PCIXCTL_parse_table[] = {
1455 { "CMPABCDIS", 0x01, 0x01 },
1456 { "TSCSERREN", 0x02, 0x02 },
1457 { "SRSPDPEEN", 0x04, 0x04 },
1458 { "SPLTSTADIS", 0x08, 0x08 },
1459 { "SPLTSMADIS", 0x10, 0x10 },
1460 { "UNEXPSCIEN", 0x20, 0x20 },
1461 { "SERRPULSE", 0x80, 0x80 }
1462};
1463
1464int
1465ahd_pcixctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1466{
1467 return (ahd_print_register(PCIXCTL_parse_table, 7, "PCIXCTL",
1468 0x93, regvalue, cur_col, wrap));
1469}
1470
1471static const ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
1472 { "RXSPLTRSP", 0x01, 0x01 },
1473 { "RXSCEMSG", 0x02, 0x02 },
1474 { "RXOVRUN", 0x04, 0x04 },
1475 { "CNTNOTCMPLT", 0x08, 0x08 },
1476 { "SCDATBUCKET", 0x10, 0x10 },
1477 { "SCADERR", 0x20, 0x20 },
1478 { "SCBCERR", 0x40, 0x40 },
1479 { "STAETERM", 0x80, 0x80 }
1480};
1481
1482int
1483ahd_dchspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1484{
1485 return (ahd_print_register(DCHSPLTSTAT0_parse_table, 8, "DCHSPLTSTAT0",
1486 0x96, regvalue, cur_col, wrap));
1487}
1488
1489static const ahd_reg_parse_entry_t DCHSPLTSTAT1_parse_table[] = {
1490 { "RXDATABUCKET", 0x01, 0x01 }
1491};
1492
1493int
1494ahd_dchspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1495{
1496 return (ahd_print_register(DCHSPLTSTAT1_parse_table, 1, "DCHSPLTSTAT1",
1497 0x97, regvalue, cur_col, wrap));
1498}
1499
1500static const ahd_reg_parse_entry_t SGSPLTSTAT0_parse_table[] = {
1501 { "RXSPLTRSP", 0x01, 0x01 },
1502 { "RXSCEMSG", 0x02, 0x02 },
1503 { "RXOVRUN", 0x04, 0x04 },
1504 { "CNTNOTCMPLT", 0x08, 0x08 },
1505 { "SCDATBUCKET", 0x10, 0x10 },
1506 { "SCADERR", 0x20, 0x20 },
1507 { "SCBCERR", 0x40, 0x40 },
1508 { "STAETERM", 0x80, 0x80 }
1509};
1510
1511int
1512ahd_sgspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1513{
1514 return (ahd_print_register(SGSPLTSTAT0_parse_table, 8, "SGSPLTSTAT0",
1515 0x9e, regvalue, cur_col, wrap));
1516}
1517
1518static const ahd_reg_parse_entry_t SGSPLTSTAT1_parse_table[] = {
1519 { "RXDATABUCKET", 0x01, 0x01 }
1520};
1521
1522int
1523ahd_sgspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1524{
1525 return (ahd_print_register(SGSPLTSTAT1_parse_table, 1, "SGSPLTSTAT1",
1526 0x9f, regvalue, cur_col, wrap));
1527}
1528
1529static const ahd_reg_parse_entry_t DF0PCISTAT_parse_table[] = {
1530 { "DPR", 0x01, 0x01 },
1531 { "TWATERR", 0x02, 0x02 },
1532 { "RDPERR", 0x04, 0x04 },
1533 { "SCAAPERR", 0x08, 0x08 },
1534 { "RTA", 0x10, 0x10 },
1535 { "RMA", 0x20, 0x20 },
1536 { "SSE", 0x40, 0x40 },
1537 { "DPE", 0x80, 0x80 }
1538};
1539
1540int
1541ahd_df0pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1542{
1543 return (ahd_print_register(DF0PCISTAT_parse_table, 8, "DF0PCISTAT",
1544 0xa0, regvalue, cur_col, wrap));
1545}
1546
1547int
1548ahd_reg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1549{
1550 return (ahd_print_register(NULL, 0, "REG0",
1551 0xa0, regvalue, cur_col, wrap));
1552}
1553
1554int
1555ahd_reg_isr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1556{
1557 return (ahd_print_register(NULL, 0, "REG_ISR",
1558 0xa4, regvalue, cur_col, wrap));
1559}
1560
1561static const ahd_reg_parse_entry_t SG_STATE_parse_table[] = { 533static const ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
1562 { "SEGS_AVAIL", 0x01, 0x01 }, 534 { "SEGS_AVAIL", 0x01, 0x01 },
1563 { "LOADING_NEEDED", 0x02, 0x02 }, 535 { "LOADING_NEEDED", 0x02, 0x02 },
@@ -1571,54 +543,6 @@ ahd_sg_state_print(u_int regvalue, u_int *cur_col, u_int wrap)
1571 0xa6, regvalue, cur_col, wrap)); 543 0xa6, regvalue, cur_col, wrap));
1572} 544}
1573 545
1574static const ahd_reg_parse_entry_t TARGPCISTAT_parse_table[] = {
1575 { "TWATERR", 0x02, 0x02 },
1576 { "STA", 0x08, 0x08 },
1577 { "SSE", 0x40, 0x40 },
1578 { "DPE", 0x80, 0x80 }
1579};
1580
1581int
1582ahd_targpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1583{
1584 return (ahd_print_register(TARGPCISTAT_parse_table, 4, "TARGPCISTAT",
1585 0xa7, regvalue, cur_col, wrap));
1586}
1587
1588int
1589ahd_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1590{
1591 return (ahd_print_register(NULL, 0, "SCBPTR",
1592 0xa8, regvalue, cur_col, wrap));
1593}
1594
1595static const ahd_reg_parse_entry_t SCBAUTOPTR_parse_table[] = {
1596 { "SCBPTR_OFF", 0x07, 0x07 },
1597 { "SCBPTR_ADDR", 0x38, 0x38 },
1598 { "AUSCBPTR_EN", 0x80, 0x80 }
1599};
1600
1601int
1602ahd_scbautoptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1603{
1604 return (ahd_print_register(SCBAUTOPTR_parse_table, 3, "SCBAUTOPTR",
1605 0xab, regvalue, cur_col, wrap));
1606}
1607
1608int
1609ahd_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1610{
1611 return (ahd_print_register(NULL, 0, "CCSGADDR",
1612 0xac, regvalue, cur_col, wrap));
1613}
1614
1615int
1616ahd_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1617{
1618 return (ahd_print_register(NULL, 0, "CCSCBADDR",
1619 0xac, regvalue, cur_col, wrap));
1620}
1621
1622static const ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = { 546static const ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
1623 { "CCSCBRESET", 0x01, 0x01 }, 547 { "CCSCBRESET", 0x01, 0x01 },
1624 { "CCSCBDIR", 0x04, 0x04 }, 548 { "CCSCBDIR", 0x04, 0x04 },
@@ -1651,138 +575,6 @@ ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1651 0xad, regvalue, cur_col, wrap)); 575 0xad, regvalue, cur_col, wrap));
1652} 576}
1653 577
1654int
1655ahd_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
1656{
1657 return (ahd_print_register(NULL, 0, "CCSGRAM",
1658 0xb0, regvalue, cur_col, wrap));
1659}
1660
1661int
1662ahd_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
1663{
1664 return (ahd_print_register(NULL, 0, "CCSCBRAM",
1665 0xb0, regvalue, cur_col, wrap));
1666}
1667
1668int
1669ahd_brddat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1670{
1671 return (ahd_print_register(NULL, 0, "BRDDAT",
1672 0xb8, regvalue, cur_col, wrap));
1673}
1674
1675static const ahd_reg_parse_entry_t BRDCTL_parse_table[] = {
1676 { "BRDSTB", 0x01, 0x01 },
1677 { "BRDRW", 0x02, 0x02 },
1678 { "BRDEN", 0x04, 0x04 },
1679 { "BRDADDR", 0x38, 0x38 },
1680 { "FLXARBREQ", 0x40, 0x40 },
1681 { "FLXARBACK", 0x80, 0x80 }
1682};
1683
1684int
1685ahd_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1686{
1687 return (ahd_print_register(BRDCTL_parse_table, 6, "BRDCTL",
1688 0xb9, regvalue, cur_col, wrap));
1689}
1690
1691int
1692ahd_seeadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1693{
1694 return (ahd_print_register(NULL, 0, "SEEADR",
1695 0xba, regvalue, cur_col, wrap));
1696}
1697
1698int
1699ahd_seedat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1700{
1701 return (ahd_print_register(NULL, 0, "SEEDAT",
1702 0xbc, regvalue, cur_col, wrap));
1703}
1704
1705static const ahd_reg_parse_entry_t SEECTL_parse_table[] = {
1706 { "SEEOP_ERAL", 0x40, 0x70 },
1707 { "SEEOP_WRITE", 0x50, 0x70 },
1708 { "SEEOP_READ", 0x60, 0x70 },
1709 { "SEEOP_ERASE", 0x70, 0x70 },
1710 { "SEESTART", 0x01, 0x01 },
1711 { "SEERST", 0x02, 0x02 },
1712 { "SEEOPCODE", 0x70, 0x70 },
1713 { "SEEOP_EWEN", 0x40, 0x40 },
1714 { "SEEOP_WALL", 0x40, 0x40 },
1715 { "SEEOP_EWDS", 0x40, 0x40 }
1716};
1717
1718int
1719ahd_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1720{
1721 return (ahd_print_register(SEECTL_parse_table, 10, "SEECTL",
1722 0xbe, regvalue, cur_col, wrap));
1723}
1724
1725static const ahd_reg_parse_entry_t SEESTAT_parse_table[] = {
1726 { "SEESTART", 0x01, 0x01 },
1727 { "SEEBUSY", 0x02, 0x02 },
1728 { "SEEARBACK", 0x04, 0x04 },
1729 { "LDALTID_L", 0x08, 0x08 },
1730 { "SEEOPCODE", 0x70, 0x70 },
1731 { "INIT_DONE", 0x80, 0x80 }
1732};
1733
1734int
1735ahd_seestat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1736{
1737 return (ahd_print_register(SEESTAT_parse_table, 6, "SEESTAT",
1738 0xbe, regvalue, cur_col, wrap));
1739}
1740
1741static const ahd_reg_parse_entry_t DSPDATACTL_parse_table[] = {
1742 { "XMITOFFSTDIS", 0x02, 0x02 },
1743 { "RCVROFFSTDIS", 0x04, 0x04 },
1744 { "DESQDIS", 0x10, 0x10 },
1745 { "BYPASSENAB", 0x80, 0x80 }
1746};
1747
1748int
1749ahd_dspdatactl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1750{
1751 return (ahd_print_register(DSPDATACTL_parse_table, 4, "DSPDATACTL",
1752 0xc1, regvalue, cur_col, wrap));
1753}
1754
1755int
1756ahd_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1757{
1758 return (ahd_print_register(NULL, 0, "DFDAT",
1759 0xc4, regvalue, cur_col, wrap));
1760}
1761
1762static const ahd_reg_parse_entry_t DSPSELECT_parse_table[] = {
1763 { "DSPSEL", 0x1f, 0x1f },
1764 { "AUTOINCEN", 0x80, 0x80 }
1765};
1766
1767int
1768ahd_dspselect_print(u_int regvalue, u_int *cur_col, u_int wrap)
1769{
1770 return (ahd_print_register(DSPSELECT_parse_table, 2, "DSPSELECT",
1771 0xc4, regvalue, cur_col, wrap));
1772}
1773
1774static const ahd_reg_parse_entry_t WRTBIASCTL_parse_table[] = {
1775 { "XMITMANVAL", 0x3f, 0x3f },
1776 { "AUTOXBCDIS", 0x80, 0x80 }
1777};
1778
1779int
1780ahd_wrtbiasctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1781{
1782 return (ahd_print_register(WRTBIASCTL_parse_table, 2, "WRTBIASCTL",
1783 0xc5, regvalue, cur_col, wrap));
1784}
1785
1786static const ahd_reg_parse_entry_t SEQCTL0_parse_table[] = { 578static const ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
1787 { "LOADRAM", 0x01, 0x01 }, 579 { "LOADRAM", 0x01, 0x01 },
1788 { "SEQRESET", 0x02, 0x02 }, 580 { "SEQRESET", 0x02, 0x02 },
@@ -1801,18 +593,6 @@ ahd_seqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1801 0xd6, regvalue, cur_col, wrap)); 593 0xd6, regvalue, cur_col, wrap));
1802} 594}
1803 595
1804static const ahd_reg_parse_entry_t FLAGS_parse_table[] = {
1805 { "CARRY", 0x01, 0x01 },
1806 { "ZERO", 0x02, 0x02 }
1807};
1808
1809int
1810ahd_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
1811{
1812 return (ahd_print_register(FLAGS_parse_table, 2, "FLAGS",
1813 0xd8, regvalue, cur_col, wrap));
1814}
1815
1816static const ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = { 596static const ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
1817 { "IRET", 0x01, 0x01 }, 597 { "IRET", 0x01, 0x01 },
1818 { "INTMASK1", 0x02, 0x02 }, 598 { "INTMASK1", 0x02, 0x02 },
@@ -1831,118 +611,6 @@ ahd_seqintctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1831} 611}
1832 612
1833int 613int
1834ahd_seqram_print(u_int regvalue, u_int *cur_col, u_int wrap)
1835{
1836 return (ahd_print_register(NULL, 0, "SEQRAM",
1837 0xda, regvalue, cur_col, wrap));
1838}
1839
1840int
1841ahd_prgmcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1842{
1843 return (ahd_print_register(NULL, 0, "PRGMCNT",
1844 0xde, regvalue, cur_col, wrap));
1845}
1846
1847int
1848ahd_accum_print(u_int regvalue, u_int *cur_col, u_int wrap)
1849{
1850 return (ahd_print_register(NULL, 0, "ACCUM",
1851 0xe0, regvalue, cur_col, wrap));
1852}
1853
1854int
1855ahd_sindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
1856{
1857 return (ahd_print_register(NULL, 0, "SINDEX",
1858 0xe2, regvalue, cur_col, wrap));
1859}
1860
1861int
1862ahd_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
1863{
1864 return (ahd_print_register(NULL, 0, "DINDEX",
1865 0xe4, regvalue, cur_col, wrap));
1866}
1867
1868int
1869ahd_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
1870{
1871 return (ahd_print_register(NULL, 0, "ALLONES",
1872 0xe8, regvalue, cur_col, wrap));
1873}
1874
1875int
1876ahd_allzeros_print(u_int regvalue, u_int *cur_col, u_int wrap)
1877{
1878 return (ahd_print_register(NULL, 0, "ALLZEROS",
1879 0xea, regvalue, cur_col, wrap));
1880}
1881
1882int
1883ahd_none_print(u_int regvalue, u_int *cur_col, u_int wrap)
1884{
1885 return (ahd_print_register(NULL, 0, "NONE",
1886 0xea, regvalue, cur_col, wrap));
1887}
1888
1889int
1890ahd_sindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
1891{
1892 return (ahd_print_register(NULL, 0, "SINDIR",
1893 0xec, regvalue, cur_col, wrap));
1894}
1895
1896int
1897ahd_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
1898{
1899 return (ahd_print_register(NULL, 0, "DINDIR",
1900 0xed, regvalue, cur_col, wrap));
1901}
1902
1903int
1904ahd_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
1905{
1906 return (ahd_print_register(NULL, 0, "STACK",
1907 0xf2, regvalue, cur_col, wrap));
1908}
1909
1910int
1911ahd_intvec1_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1912{
1913 return (ahd_print_register(NULL, 0, "INTVEC1_ADDR",
1914 0xf4, regvalue, cur_col, wrap));
1915}
1916
1917int
1918ahd_curaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1919{
1920 return (ahd_print_register(NULL, 0, "CURADDR",
1921 0xf4, regvalue, cur_col, wrap));
1922}
1923
1924int
1925ahd_intvec2_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1926{
1927 return (ahd_print_register(NULL, 0, "INTVEC2_ADDR",
1928 0xf6, regvalue, cur_col, wrap));
1929}
1930
1931int
1932ahd_longjmp_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1933{
1934 return (ahd_print_register(NULL, 0, "LONGJMP_ADDR",
1935 0xf8, regvalue, cur_col, wrap));
1936}
1937
1938int
1939ahd_accum_save_print(u_int regvalue, u_int *cur_col, u_int wrap)
1940{
1941 return (ahd_print_register(NULL, 0, "ACCUM_SAVE",
1942 0xfa, regvalue, cur_col, wrap));
1943}
1944
1945int
1946ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap) 614ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
1947{ 615{
1948 return (ahd_print_register(NULL, 0, "SRAM_BASE", 616 return (ahd_print_register(NULL, 0, "SRAM_BASE",
@@ -1950,69 +618,6 @@ ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
1950} 618}
1951 619
1952int 620int
1953ahd_waiting_scb_tails_print(u_int regvalue, u_int *cur_col, u_int wrap)
1954{
1955 return (ahd_print_register(NULL, 0, "WAITING_SCB_TAILS",
1956 0x100, regvalue, cur_col, wrap));
1957}
1958
1959int
1960ahd_waiting_tid_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
1961{
1962 return (ahd_print_register(NULL, 0, "WAITING_TID_HEAD",
1963 0x120, regvalue, cur_col, wrap));
1964}
1965
1966int
1967ahd_waiting_tid_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
1968{
1969 return (ahd_print_register(NULL, 0, "WAITING_TID_TAIL",
1970 0x122, regvalue, cur_col, wrap));
1971}
1972
1973int
1974ahd_next_queued_scb_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1975{
1976 return (ahd_print_register(NULL, 0, "NEXT_QUEUED_SCB_ADDR",
1977 0x124, regvalue, cur_col, wrap));
1978}
1979
1980int
1981ahd_complete_scb_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
1982{
1983 return (ahd_print_register(NULL, 0, "COMPLETE_SCB_HEAD",
1984 0x128, regvalue, cur_col, wrap));
1985}
1986
1987int
1988ahd_complete_scb_dmainprog_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
1989{
1990 return (ahd_print_register(NULL, 0, "COMPLETE_SCB_DMAINPROG_HEAD",
1991 0x12a, regvalue, cur_col, wrap));
1992}
1993
1994int
1995ahd_complete_dma_scb_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
1996{
1997 return (ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_HEAD",
1998 0x12c, regvalue, cur_col, wrap));
1999}
2000
2001int
2002ahd_complete_dma_scb_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
2003{
2004 return (ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_TAIL",
2005 0x12e, regvalue, cur_col, wrap));
2006}
2007
2008int
2009ahd_complete_on_qfreeze_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
2010{
2011 return (ahd_print_register(NULL, 0, "COMPLETE_ON_QFREEZE_HEAD",
2012 0x130, regvalue, cur_col, wrap));
2013}
2014
2015int
2016ahd_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap) 621ahd_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
2017{ 622{
2018 return (ahd_print_register(NULL, 0, "QFREEZE_COUNT", 623 return (ahd_print_register(NULL, 0, "QFREEZE_COUNT",
@@ -2033,33 +638,6 @@ ahd_saved_mode_print(u_int regvalue, u_int *cur_col, u_int wrap)
2033 0x136, regvalue, cur_col, wrap)); 638 0x136, regvalue, cur_col, wrap));
2034} 639}
2035 640
2036int
2037ahd_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap)
2038{
2039 return (ahd_print_register(NULL, 0, "MSG_OUT",
2040 0x137, regvalue, cur_col, wrap));
2041}
2042
2043static const ahd_reg_parse_entry_t DMAPARAMS_parse_table[] = {
2044 { "FIFORESET", 0x01, 0x01 },
2045 { "FIFOFLUSH", 0x02, 0x02 },
2046 { "DIRECTION", 0x04, 0x04 },
2047 { "HDMAEN", 0x08, 0x08 },
2048 { "HDMAENACK", 0x08, 0x08 },
2049 { "SDMAEN", 0x10, 0x10 },
2050 { "SDMAENACK", 0x10, 0x10 },
2051 { "SCSIEN", 0x20, 0x20 },
2052 { "WIDEODD", 0x40, 0x40 },
2053 { "PRELOADEN", 0x80, 0x80 }
2054};
2055
2056int
2057ahd_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap)
2058{
2059 return (ahd_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS",
2060 0x138, regvalue, cur_col, wrap));
2061}
2062
2063static const ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = { 641static const ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
2064 { "NO_DISCONNECT", 0x01, 0x01 }, 642 { "NO_DISCONNECT", 0x01, 0x01 },
2065 { "SPHASE_PENDING", 0x02, 0x02 }, 643 { "SPHASE_PENDING", 0x02, 0x02 },
@@ -2079,20 +657,6 @@ ahd_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
2079 0x139, regvalue, cur_col, wrap)); 657 0x139, regvalue, cur_col, wrap));
2080} 658}
2081 659
2082int
2083ahd_saved_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
2084{
2085 return (ahd_print_register(NULL, 0, "SAVED_SCSIID",
2086 0x13a, regvalue, cur_col, wrap));
2087}
2088
2089int
2090ahd_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
2091{
2092 return (ahd_print_register(NULL, 0, "SAVED_LUN",
2093 0x13b, regvalue, cur_col, wrap));
2094}
2095
2096static const ahd_reg_parse_entry_t LASTPHASE_parse_table[] = { 660static const ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
2097 { "P_DATAOUT", 0x00, 0xe0 }, 661 { "P_DATAOUT", 0x00, 0xe0 },
2098 { "P_DATAOUT_DT", 0x20, 0xe0 }, 662 { "P_DATAOUT_DT", 0x20, 0xe0 },
@@ -2116,96 +680,6 @@ ahd_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
2116 0x13c, regvalue, cur_col, wrap)); 680 0x13c, regvalue, cur_col, wrap));
2117} 681}
2118 682
2119int
2120ahd_qoutfifo_entry_valid_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
2121{
2122 return (ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG",
2123 0x13d, regvalue, cur_col, wrap));
2124}
2125
2126int
2127ahd_kernel_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
2128{
2129 return (ahd_print_register(NULL, 0, "KERNEL_TQINPOS",
2130 0x13e, regvalue, cur_col, wrap));
2131}
2132
2133int
2134ahd_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
2135{
2136 return (ahd_print_register(NULL, 0, "TQINPOS",
2137 0x13f, regvalue, cur_col, wrap));
2138}
2139
2140int
2141ahd_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2142{
2143 return (ahd_print_register(NULL, 0, "SHARED_DATA_ADDR",
2144 0x140, regvalue, cur_col, wrap));
2145}
2146
2147int
2148ahd_qoutfifo_next_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2149{
2150 return (ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR",
2151 0x144, regvalue, cur_col, wrap));
2152}
2153
2154static const ahd_reg_parse_entry_t ARG_1_parse_table[] = {
2155 { "CONT_MSG_LOOP_TARG", 0x02, 0x02 },
2156 { "CONT_MSG_LOOP_READ", 0x03, 0x03 },
2157 { "CONT_MSG_LOOP_WRITE",0x04, 0x04 },
2158 { "EXIT_MSG_LOOP", 0x08, 0x08 },
2159 { "MSGOUT_PHASEMIS", 0x10, 0x10 },
2160 { "SEND_REJ", 0x20, 0x20 },
2161 { "SEND_SENSE", 0x40, 0x40 },
2162 { "SEND_MSG", 0x80, 0x80 }
2163};
2164
2165int
2166ahd_arg_1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2167{
2168 return (ahd_print_register(ARG_1_parse_table, 8, "ARG_1",
2169 0x148, regvalue, cur_col, wrap));
2170}
2171
2172int
2173ahd_arg_2_print(u_int regvalue, u_int *cur_col, u_int wrap)
2174{
2175 return (ahd_print_register(NULL, 0, "ARG_2",
2176 0x149, regvalue, cur_col, wrap));
2177}
2178
2179int
2180ahd_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap)
2181{
2182 return (ahd_print_register(NULL, 0, "LAST_MSG",
2183 0x14a, regvalue, cur_col, wrap));
2184}
2185
2186static const ahd_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
2187 { "ALTSTIM", 0x01, 0x01 },
2188 { "ENAUTOATNP", 0x02, 0x02 },
2189 { "MANUALP", 0x0c, 0x0c },
2190 { "ENRSELI", 0x10, 0x10 },
2191 { "ENSELI", 0x20, 0x20 },
2192 { "MANUALCTL", 0x40, 0x40 }
2193};
2194
2195int
2196ahd_scsiseq_template_print(u_int regvalue, u_int *cur_col, u_int wrap)
2197{
2198 return (ahd_print_register(SCSISEQ_TEMPLATE_parse_table, 6, "SCSISEQ_TEMPLATE",
2199 0x14b, regvalue, cur_col, wrap));
2200}
2201
2202int
2203ahd_initiator_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
2204{
2205 return (ahd_print_register(NULL, 0, "INITIATOR_TAG",
2206 0x14c, regvalue, cur_col, wrap));
2207}
2208
2209static const ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = { 683static const ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
2210 { "PENDING_MK_MESSAGE", 0x01, 0x01 }, 684 { "PENDING_MK_MESSAGE", 0x01, 0x01 },
2211 { "TARGET_MSG_PENDING", 0x02, 0x02 }, 685 { "TARGET_MSG_PENDING", 0x02, 0x02 },
@@ -2220,62 +694,6 @@ ahd_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
2220} 694}
2221 695
2222int 696int
2223ahd_allocfifo_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2224{
2225 return (ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR",
2226 0x14e, regvalue, cur_col, wrap));
2227}
2228
2229int
2230ahd_int_coalescing_timer_print(u_int regvalue, u_int *cur_col, u_int wrap)
2231{
2232 return (ahd_print_register(NULL, 0, "INT_COALESCING_TIMER",
2233 0x150, regvalue, cur_col, wrap));
2234}
2235
2236int
2237ahd_int_coalescing_maxcmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
2238{
2239 return (ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS",
2240 0x152, regvalue, cur_col, wrap));
2241}
2242
2243int
2244ahd_int_coalescing_mincmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
2245{
2246 return (ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS",
2247 0x153, regvalue, cur_col, wrap));
2248}
2249
2250int
2251ahd_cmds_pending_print(u_int regvalue, u_int *cur_col, u_int wrap)
2252{
2253 return (ahd_print_register(NULL, 0, "CMDS_PENDING",
2254 0x154, regvalue, cur_col, wrap));
2255}
2256
2257int
2258ahd_int_coalescing_cmdcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
2259{
2260 return (ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT",
2261 0x156, regvalue, cur_col, wrap));
2262}
2263
2264int
2265ahd_local_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
2266{
2267 return (ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX",
2268 0x157, regvalue, cur_col, wrap));
2269}
2270
2271int
2272ahd_cmdsize_table_print(u_int regvalue, u_int *cur_col, u_int wrap)
2273{
2274 return (ahd_print_register(NULL, 0, "CMDSIZE_TABLE",
2275 0x158, regvalue, cur_col, wrap));
2276}
2277
2278int
2279ahd_mk_message_scb_print(u_int regvalue, u_int *cur_col, u_int wrap) 697ahd_mk_message_scb_print(u_int regvalue, u_int *cur_col, u_int wrap)
2280{ 698{
2281 return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCB", 699 return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCB",
@@ -2290,53 +708,12 @@ ahd_mk_message_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
2290} 708}
2291 709
2292int 710int
2293ahd_scb_residual_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2294{
2295 return (ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT",
2296 0x180, regvalue, cur_col, wrap));
2297}
2298
2299int
2300ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap) 711ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
2301{ 712{
2302 return (ahd_print_register(NULL, 0, "SCB_BASE", 713 return (ahd_print_register(NULL, 0, "SCB_BASE",
2303 0x180, regvalue, cur_col, wrap)); 714 0x180, regvalue, cur_col, wrap));
2304} 715}
2305 716
2306static const ahd_reg_parse_entry_t SCB_RESIDUAL_SGPTR_parse_table[] = {
2307 { "SG_LIST_NULL", 0x01, 0x01 },
2308 { "SG_OVERRUN_RESID", 0x02, 0x02 },
2309 { "SG_ADDR_MASK", 0xf8, 0xf8 }
2310};
2311
2312int
2313ahd_scb_residual_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2314{
2315 return (ahd_print_register(SCB_RESIDUAL_SGPTR_parse_table, 3, "SCB_RESIDUAL_SGPTR",
2316 0x184, regvalue, cur_col, wrap));
2317}
2318
2319int
2320ahd_scb_scsi_status_print(u_int regvalue, u_int *cur_col, u_int wrap)
2321{
2322 return (ahd_print_register(NULL, 0, "SCB_SCSI_STATUS",
2323 0x188, regvalue, cur_col, wrap));
2324}
2325
2326int
2327ahd_scb_sense_busaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2328{
2329 return (ahd_print_register(NULL, 0, "SCB_SENSE_BUSADDR",
2330 0x18c, regvalue, cur_col, wrap));
2331}
2332
2333int
2334ahd_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
2335{
2336 return (ahd_print_register(NULL, 0, "SCB_TAG",
2337 0x190, regvalue, cur_col, wrap));
2338}
2339
2340static const ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = { 717static const ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
2341 { "SCB_TAG_TYPE", 0x03, 0x03 }, 718 { "SCB_TAG_TYPE", 0x03, 0x03 },
2342 { "DISCONNECTED", 0x04, 0x04 }, 719 { "DISCONNECTED", 0x04, 0x04 },
@@ -2366,103 +743,3 @@ ahd_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
2366 0x193, regvalue, cur_col, wrap)); 743 0x193, regvalue, cur_col, wrap));
2367} 744}
2368 745
2369static const ahd_reg_parse_entry_t SCB_LUN_parse_table[] = {
2370 { "LID", 0xff, 0xff }
2371};
2372
2373int
2374ahd_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
2375{
2376 return (ahd_print_register(SCB_LUN_parse_table, 1, "SCB_LUN",
2377 0x194, regvalue, cur_col, wrap));
2378}
2379
2380static const ahd_reg_parse_entry_t SCB_TASK_ATTRIBUTE_parse_table[] = {
2381 { "SCB_XFERLEN_ODD", 0x01, 0x01 }
2382};
2383
2384int
2385ahd_scb_task_attribute_print(u_int regvalue, u_int *cur_col, u_int wrap)
2386{
2387 return (ahd_print_register(SCB_TASK_ATTRIBUTE_parse_table, 1, "SCB_TASK_ATTRIBUTE",
2388 0x195, regvalue, cur_col, wrap));
2389}
2390
2391static const ahd_reg_parse_entry_t SCB_CDB_LEN_parse_table[] = {
2392 { "SCB_CDB_LEN_PTR", 0x80, 0x80 }
2393};
2394
2395int
2396ahd_scb_cdb_len_print(u_int regvalue, u_int *cur_col, u_int wrap)
2397{
2398 return (ahd_print_register(SCB_CDB_LEN_parse_table, 1, "SCB_CDB_LEN",
2399 0x196, regvalue, cur_col, wrap));
2400}
2401
2402int
2403ahd_scb_task_management_print(u_int regvalue, u_int *cur_col, u_int wrap)
2404{
2405 return (ahd_print_register(NULL, 0, "SCB_TASK_MANAGEMENT",
2406 0x197, regvalue, cur_col, wrap));
2407}
2408
2409int
2410ahd_scb_dataptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2411{
2412 return (ahd_print_register(NULL, 0, "SCB_DATAPTR",
2413 0x198, regvalue, cur_col, wrap));
2414}
2415
2416static const ahd_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
2417 { "SG_HIGH_ADDR_BITS", 0x7f, 0x7f },
2418 { "SG_LAST_SEG", 0x80, 0x80 }
2419};
2420
2421int
2422ahd_scb_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2423{
2424 return (ahd_print_register(SCB_DATACNT_parse_table, 2, "SCB_DATACNT",
2425 0x1a0, regvalue, cur_col, wrap));
2426}
2427
2428static const ahd_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
2429 { "SG_LIST_NULL", 0x01, 0x01 },
2430 { "SG_FULL_RESID", 0x02, 0x02 },
2431 { "SG_STATUS_VALID", 0x04, 0x04 }
2432};
2433
2434int
2435ahd_scb_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2436{
2437 return (ahd_print_register(SCB_SGPTR_parse_table, 3, "SCB_SGPTR",
2438 0x1a4, regvalue, cur_col, wrap));
2439}
2440
2441int
2442ahd_scb_busaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2443{
2444 return (ahd_print_register(NULL, 0, "SCB_BUSADDR",
2445 0x1a8, regvalue, cur_col, wrap));
2446}
2447
2448int
2449ahd_scb_next_print(u_int regvalue, u_int *cur_col, u_int wrap)
2450{
2451 return (ahd_print_register(NULL, 0, "SCB_NEXT",
2452 0x1ac, regvalue, cur_col, wrap));
2453}
2454
2455int
2456ahd_scb_next2_print(u_int regvalue, u_int *cur_col, u_int wrap)
2457{
2458 return (ahd_print_register(NULL, 0, "SCB_NEXT2",
2459 0x1ae, regvalue, cur_col, wrap));
2460}
2461
2462int
2463ahd_scb_disconnected_lists_print(u_int regvalue, u_int *cur_col, u_int wrap)
2464{
2465 return (ahd_print_register(NULL, 0, "SCB_DISCONNECTED_LISTS",
2466 0x1b8, regvalue, cur_col, wrap));
2467}
2468