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authorSalyzyn, Mark <mark_salyzyn@adaptec.com>2006-06-26 08:37:39 -0400
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-06-26 17:47:46 -0400
commit12e9b5fb96028aab26af65bb06d2dee56c428a6e (patch)
tree02208162fa852b78fc1908e8d97a1d866089b503 /drivers/scsi/aacraid/comminit.c
parent99d19bb75b88cc997d3cd611903908714c735981 (diff)
[SCSI] aacraid: remove x86_64 IOMMU dependent code
This may seem like a DILLIGAF, but after chatting with the F/W folks, there is no harm in dropping the page calculation as denoted in the enclosed patch for these older adapters in this new age of 4GB+ memory sticks. Any resource optimization within the old-old-old adapters for systems with less than 4G of memory is of little consequence. The existing AAC_QUIRK_31BIT flag in linit.c should look after the rest of the legacy hardware DMA limitations. Signed-off-by: Mark Salyzyn <aacraid@adaptec.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/aacraid/comminit.c')
-rw-r--r--drivers/scsi/aacraid/comminit.c23
1 files changed, 1 insertions, 22 deletions
diff --git a/drivers/scsi/aacraid/comminit.c b/drivers/scsi/aacraid/comminit.c
index 35b0a6ebd3f5..1cd3584ba7ff 100644
--- a/drivers/scsi/aacraid/comminit.c
+++ b/drivers/scsi/aacraid/comminit.c
@@ -92,28 +92,7 @@ static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long co
92 init->AdapterFibsPhysicalAddress = cpu_to_le32((u32)phys); 92 init->AdapterFibsPhysicalAddress = cpu_to_le32((u32)phys);
93 init->AdapterFibsSize = cpu_to_le32(fibsize); 93 init->AdapterFibsSize = cpu_to_le32(fibsize);
94 init->AdapterFibAlign = cpu_to_le32(sizeof(struct hw_fib)); 94 init->AdapterFibAlign = cpu_to_le32(sizeof(struct hw_fib));
95 /* 95 init->HostPhysMemPages = cpu_to_le32(AAC_MAX_HOSTPHYSMEMPAGES);
96 * number of 4k pages of host physical memory. The aacraid fw needs
97 * this number to be less than 4gb worth of pages. num_physpages is in
98 * system page units. New firmware doesn't have any issues with the
99 * mapping system, but older Firmware did, and had *troubles* dealing
100 * with the math overloading past 32 bits, thus we must limit this
101 * field.
102 *
103 * This assumes the memory is mapped zero->n, which isnt
104 * always true on real computers. It also has some slight problems
105 * with the GART on x86-64. I've btw never tried DMA from PCI space
106 * on this platform but don't be surprised if its problematic.
107 */
108#ifndef CONFIG_GART_IOMMU
109 if ((num_physpages << (PAGE_SHIFT - 12)) <= AAC_MAX_HOSTPHYSMEMPAGES) {
110 init->HostPhysMemPages =
111 cpu_to_le32(num_physpages << (PAGE_SHIFT-12));
112 } else
113#endif
114 {
115 init->HostPhysMemPages = cpu_to_le32(AAC_MAX_HOSTPHYSMEMPAGES);
116 }
117 96
118 init->InitFlags = 0; 97 init->InitFlags = 0;
119 if (dev->new_comm_interface) { 98 if (dev->new_comm_interface) {