litmus-rt.git - The LITMUS^RT kernel.

diff options

author	Linus Torvalds <torvalds@linux-foundation.org>	2010-02-06 17:17:12 -0500
committer	Linus Torvalds <torvalds@linux-foundation.org>	2010-02-06 17:17:12 -0500
commit	29275254caedfedce960cfe6df24b90cb04fe431 (patch)
tree	667100f77ada5006323ec0f0b40ae37277afb442 /drivers/scsi/a2091.c
parent	82e22d77bfb2523284fdf5c484c1fa5269a5d27e (diff)

Linux 2.6.33-rc7v2.6.33-rc7

Diffstat (limited to 'drivers/scsi/a2091.c')

0 files changed, 0 insertions, 0 deletions

/* * pinctrl-palmas.c -- TI PALMAS series pin control driver. * * Copyright (c) 2013, NVIDIA Corporation. * * Author: Laxman Dewangan <ldewangan@nvidia.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, * whether express or implied; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA * 02111-1307, USA */ #include <linux/delay.h> #include <linux/module.h> #include <linux/mfd/palmas.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/pinctrl/machine.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinmux.h> #include <linux/pm.h> #include <linux/slab.h> #include "core.h" #include "pinconf.h" #include "pinctrl-utils.h" #define PALMAS_PIN_GPIO0_ID 0 #define PALMAS_PIN_GPIO1_VBUS_LED1_PWM1 1 #define PALMAS_PIN_GPIO2_REGEN_LED2_PWM2 2 #define PALMAS_PIN_GPIO3_CHRG_DET 3 #define PALMAS_PIN_GPIO4_SYSEN1 4 #define PALMAS_PIN_GPIO5_CLK32KGAUDIO_USB_PSEL 5 #define PALMAS_PIN_GPIO6_SYSEN2 6 #define PALMAS_PIN_GPIO7_MSECURE_PWRHOLD 7 #define PALMAS_PIN_GPIO8_SIM1RSTI 8 #define PALMAS_PIN_GPIO9_LOW_VBAT 9 #define PALMAS_PIN_GPIO10_WIRELESS_CHRG1 10 #define PALMAS_PIN_GPIO11_RCM 11 #define PALMAS_PIN_GPIO12_SIM2RSTO 12 #define PALMAS_PIN_GPIO13 13 #define PALMAS_PIN_GPIO14 14 #define PALMAS_PIN_GPIO15_SIM2RSTI 15 #define PALMAS_PIN_VAC 16 #define PALMAS_PIN_POWERGOOD_USB_PSEL 17 #define PALMAS_PIN_NRESWARM 18 #define PALMAS_PIN_PWRDOWN 19 #define PALMAS_PIN_GPADC_START 20 #define PALMAS_PIN_RESET_IN 21 #define PALMAS_PIN_NSLEEP 22 #define PALMAS_PIN_ENABLE1 23 #define PALMAS_PIN_ENABLE2 24 #define PALMAS_PIN_INT 25 #define PALMAS_PIN_NUM (PALMAS_PIN_INT + 1) struct palmas_pin_function { const char *name; const char * const *groups; unsigned ngroups; }; struct palmas_pctrl_chip_info { struct device *dev; struct pinctrl_dev *pctl; struct palmas *palmas; int pins_current_opt[PALMAS_PIN_NUM]; const struct palmas_pin_function *functions; unsigned num_functions; const struct palmas_pingroup *pin_groups; int num_pin_groups; const struct pinctrl_pin_desc *pins; unsigned num_pins; }; static const struct pinctrl_pin_desc palmas_pins_desc[] = { PINCTRL_PIN(PALMAS_PIN_GPIO0_ID, "gpio0"), PINCTRL_PIN(PALMAS_PIN_GPIO1_VBUS_LED1_PWM1, "gpio1"), PINCTRL_PIN(PALMAS_PIN_GPIO2_REGEN_LED2_PWM2, "gpio2"), PINCTRL_PIN(PALMAS_PIN_GPIO3_CHRG_DET, "gpio3"), PINCTRL_PIN(PALMAS_PIN_GPIO4_SYSEN1, "gpio4"), PINCTRL_PIN(PALMAS_PIN_GPIO5_CLK32KGAUDIO_USB_PSEL, "gpio5"), PINCTRL_PIN(PALMAS_PIN_GPIO6_SYSEN2, "gpio6"), PINCTRL_PIN(PALMAS_PIN_GPIO7_MSECURE_PWRHOLD, "gpio7"), PINCTRL_PIN(PALMAS_PIN_GPIO8_SIM1RSTI, "gpio8"), PINCTRL_PIN(PALMAS_PIN_GPIO9_LOW_VBAT, "gpio9"), PINCTRL_PIN(PALMAS_PIN_GPIO10_WIRELESS_CHRG1, "gpio10"), PINCTRL_PIN(PALMAS_PIN_GPIO11_RCM, "gpio11"), PINCTRL_PIN(PALMAS_PIN_GPIO12_SIM2RSTO, "gpio12"), PINCTRL_PIN(PALMAS_PIN_GPIO13, "gpio13"), PINCTRL_PIN(PALMAS_PIN_GPIO14, "gpio14"), PINCTRL_PIN(PALMAS_PIN_GPIO15_SIM2RSTI, "gpio15"), PINCTRL_PIN(PALMAS_PIN_VAC, "vac"), PINCTRL_PIN(PALMAS_PIN_POWERGOOD_USB_PSEL, "powergood"), PINCTRL_PIN(PALMAS_PIN_NRESWARM, "nreswarm"), PINCTRL_PIN(PALMAS_PIN_PWRDOWN, "pwrdown"), PINCTRL_PIN(PALMAS_PIN_GPADC_START, "gpadc_start"), PINCTRL_PIN(PALMAS_PIN_RESET_IN, "reset_in"), PINCTRL_PIN(PALMAS_PIN_NSLEEP, "nsleep"), PINCTRL_PIN(PALMAS_PIN_ENABLE1, "enable1"), PINCTRL_PIN(PALMAS_PIN_ENABLE2, "enable2"), PINCTRL_PIN(PALMAS_PIN_INT, "int"), }; static const char * const opt0_groups[] = { "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "vac", "powergood", "nreswarm", "pwrdown", "gpadc_start", "reset_in", "nsleep", "enable1", "enable2", "int", }; static const char * const opt1_groups[] = { "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio15", "vac", "powergood", }; static const char * const opt2_groups[] = { "gpio1", "gpio2", "gpio5", "gpio7", }; static const char * const opt3_groups[] = { "gpio1", "gpio2", }; static const char * const gpio_groups[] = { "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", }; static const char * const led_groups[] = { "gpio1", "gpio2", }; static const char * const pwm_groups[] = { "gpio1", "gpio2", }; static const char * const regen_groups[] = { "gpio2", }; static const char * const sysen_groups[] = { "gpio4", "gpio6", }; static const char * const clk32kgaudio_groups[] = { "gpio5", }; static const char * const id_groups[] = { "gpio0", }; static const char * const vbus_det_groups[] = { "gpio1", }; static const char * const chrg_det_groups[] = { "gpio3", }; static const char * const vac_groups[] = { "vac", }; static const char * const vacok_groups[] = { "vac", }; static const char * const powergood_groups[] = { "powergood", }; static const char * const usb_psel_groups[] = { "gpio5", "powergood", }; static const char * const msecure_groups[] = { "gpio7", }; static const char * const pwrhold_groups[] = { "gpio7", }; static const char * const int_groups[] = { "int", }; static const char * const nreswarm_groups[] = { "nreswarm", }; static const char * const simrsto_groups[] = { "gpio12", }; static const char * const simrsti_groups[] = { "gpio8", "gpio15", }; static const char * const low_vbat_groups[] = { "gpio9", }; static const char * const wireless_chrg1_groups[] = { "gpio10", }; static const char * const rcm_groups[] = { "gpio11", }; static const char * const pwrdown_groups[] = { "pwrdown", }; static const char * const gpadc_start_groups[] = { "gpadc_start", }; static const char * const reset_in_groups[] = { "reset_in", }; static const char * const nsleep_groups[] = { "nsleep", }; static const char * const enable_groups[] = { "enable1", "enable2", }; #define FUNCTION_GROUPS \ FUNCTION_GROUP(opt0, OPTION0), \ FUNCTION_GROUP(opt1, OPTION1), \ FUNCTION_GROUP(opt2, OPTION2), \ FUNCTION_GROUP(opt3, OPTION3), \ FUNCTION_GROUP(gpio, GPIO), \ FUNCTION_GROUP(led, LED), \ FUNCTION_GROUP(pwm, PWM), \ FUNCTION_GROUP(regen, REGEN), \ FUNCTION_GROUP(sysen, SYSEN), \ FUNCTION_GROUP(clk32kgaudio, CLK32KGAUDIO), \ FUNCTION_GROUP(id, ID), \ FUNCTION_GROUP(vbus_det, VBUS_DET), \ FUNCTION_GROUP(chrg_det, CHRG_DET), \ FUNCTION_GROUP(vac, VAC), \ FUNCTION_GROUP(vacok, VACOK), \ FUNCTION_GROUP(powergood, POWERGOOD), \ FUNCTION_GROUP(usb_psel, USB_PSEL), \ FUNCTION_GROUP(msecure, MSECURE), \ FUNCTION_GROUP(pwrhold, PWRHOLD), \ FUNCTION_GROUP(int, INT), \ FUNCTION_GROUP(nreswarm, NRESWARM), \ FUNCTION_GROUP(simrsto, SIMRSTO), \ FUNCTION_GROUP(simrsti, SIMRSTI), \ FUNCTION_GROUP(low_vbat, LOW_VBAT), \ FUNCTION_GROUP(wireless_chrg1, WIRELESS_CHRG1), \ FUNCTION_GROUP(rcm, RCM), \ FUNCTION_GROUP(pwrdown, PWRDOWN), \ FUNCTION_GROUP(gpadc_start, GPADC_START), \ FUNCTION_GROUP(reset_in, RESET_IN), \ FUNCTION_GROUP(nsleep, NSLEEP), \ FUNCTION_GROUP(enable, ENABLE) static const struct palmas_pin_function palmas_pin_function[] = { #undef FUNCTION_GROUP #define FUNCTION_GROUP(fname, mux) \ { \ .name = #fname, \ .groups = fname##_groups, \ .ngroups = ARRAY_SIZE(fname##_groups), \ } FUNCTION_GROUPS, }; enum palmas_pinmux { #undef FUNCTION_GROUP #define FUNCTION_GROUP(fname, mux) PALMAS_PINMUX_##mux FUNCTION_GROUPS, PALMAS_PINMUX_NA = 0xFFFF, }; struct palmas_pins_pullup_dn_info { int pullup_dn_reg_base; int pullup_dn_reg_add; int pullup_dn_mask; int normal_val; int pull_up_val; int pull_dn_val; }; struct palmas_pins_od_info { int od_reg_base; int od_reg_add; int od_mask; int od_enable; int od_disable; }; struct palmas_pin_info { enum palmas_pinmux mux_opt; const struct palmas_pins_pullup_dn_info *pud_info; const struct palmas_pins_od_info *od_info; }; struct palmas_pingroup { const char *name; const unsigned pins[1]; unsigned npins; unsigned mux_reg_base; unsigned mux_reg_add; unsigned mux_reg_mask; unsigned mux_bit_shift; const struct palmas_pin_info *opt[4]; }; #define PULL_UP_DN(_name, _rbase, _add, _mask, _nv, _uv, _dv) \ static const struct palmas_pins_pullup_dn_info pud_##_name##_info = { \ .pullup_dn_reg_base = PALMAS_##_rbase##_BASE, \ .pullup_dn_reg_add = _add, \ .pullup_dn_mask = _mask, \ .normal_val = _nv, \ .pull_up_val = _uv, \ .pull_dn_val = _dv, \ } PULL_UP_DN(nreswarm, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL1, 0x2, 0x0, 0x2, -1); PULL_UP_DN(pwrdown, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL1, 0x4, 0x0, -1, 0x4); PULL_UP_DN(gpadc_start, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL1, 0x30, 0x0, 0x20, 0x10); PULL_UP_DN(reset_in, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL1, 0x40, 0x0, -1, 0x40); PULL_UP_DN(nsleep, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL2, 0x3, 0x0, 0x2, 0x1); PULL_UP_DN(enable1, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL2, 0xC, 0x0, 0x8, 0x4); PULL_UP_DN(enable2, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL2, 0x30, 0x0, 0x20, 0x10); PULL_UP_DN(vacok, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL3, 0x40, 0x0, -1, 0x40); PULL_UP_DN(chrg_det, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL3, 0x10, 0x0, -1, 0x10); PULL_UP_DN(pwrhold, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL3, 0x4, 0x0, -1, 0x4); PULL_UP_DN(msecure, PU_PD_OD, PALMAS_PU_PD_INPUT_CTRL3, 0x1, 0x0, -1, 0x1); PULL_UP_DN(id, USB_OTG, PALMAS_USB_ID_CTRL_SET, 0x40, 0x0, 0x40, -1); PULL_UP_DN(gpio0, GPIO, PALMAS_PU_PD_GPIO_CTRL1, 0x04, 0, -1, 1); PULL_UP_DN(gpio1, GPIO, PALMAS_PU_PD_GPIO_CTRL1, 0x0C, 0, 0x8, 0x4); PULL_UP_DN(gpio2, GPIO, PALMAS_PU_PD_GPIO_CTRL1, 0x30, 0x0, 0x20, 0x10); PULL_UP_DN(gpio3, GPIO, PALMAS_PU_PD_GPIO_CTRL1, 0x40, 0x0, -1, 0x40); PULL_UP_DN(gpio4, GPIO, PALMAS_PU_PD_GPIO_CTRL2, 0x03, 0x0, 0x2, 0x1); PULL_UP_DN(gpio5, GPIO, PALMAS_PU_PD_GPIO_CTRL2, 0x0c, 0x0, 0x8, 0x4); PULL_UP_DN(gpio6, GPIO, PALMAS_PU_PD_GPIO_CTRL2, 0x30, 0x0, 0x20, 0x10); PULL_UP_DN(gpio7, GPIO, PALMAS_PU_PD_GPIO_CTRL2, 0x40, 0x0, -1, 0x40); PULL_UP_DN(gpio9, GPIO, PALMAS_PU_PD_GPIO_CTRL3, 0x0C, 0x0, 0x8, 0x4); PULL_UP_DN(gpio10, GPIO, PALMAS_PU_PD_GPIO_CTRL3, 0x30, 0x0, 0x20, 0x10); PULL_UP_DN(gpio11, GPIO, PALMAS_PU_PD_GPIO_CTRL3, 0xC0, 0x0, 0x80, 0x40); PULL_UP_DN(gpio13, GPIO, PALMAS_PU_PD_GPIO_CTRL4, 0x04, 0x0, -1, 0x04); PULL_UP_DN(gpio14, GPIO, PALMAS_PU_PD_GPIO_CTRL4, 0x30, 0x0, 0x20, 0x10); #define OD_INFO(_name, _rbase, _add, _mask, _ev, _dv) \ static const struct palmas_pins_od_info od_##_name##_info = { \ .od_reg_base = PALMAS_##_rbase##_BASE, \ .od_reg_add = _add, \ .od_mask = _mask, \ .od_enable = _ev, \ .od_disable = _dv, \ } OD_INFO(gpio1, GPIO, PALMAS_OD_OUTPUT_GPIO_CTRL, 0x1, 0x1, 0x0); OD_INFO(gpio2, GPIO, PALMAS_OD_OUTPUT_GPIO_CTRL, 0x2, 0x2, 0x0); OD_INFO(gpio5, GPIO, PALMAS_OD_OUTPUT_GPIO_CTRL, 0x20, 0x20, 0x0); OD_INFO(gpio10, GPIO, PALMAS_OD_OUTPUT_GPIO_CTRL2, 0x04, 0x04, 0x0); OD_INFO(gpio13, GPIO, PALMAS_OD_OUTPUT_GPIO_CTRL2, 0x20, 0x20, 0x0); OD_INFO(int, PU_PD_OD, PALMAS_OD_OUTPUT_CTRL, 0x8, 0x8, 0x0); OD_INFO(pwm1, PU_PD_OD, PALMAS_OD_OUTPUT_CTRL, 0x20, 0x20, 0x0); OD_INFO(pwm2, PU_PD_OD, PALMAS_OD_OUTPUT_CTRL, 0x80, 0x80, 0x0); OD_INFO(vbus_det, PU_PD_OD, PALMAS_OD_OUTPUT_CTRL, 0x40, 0x40, 0x0); #define PIN_INFO(_name, _id, _pud_info, _od_info) \ static const struct palmas_pin_info pin_##_name##_info = { \ .mux_opt = PALMAS_PINMUX_##_id, \ .pud_info = _pud_info, \ .od_info = _od_info \ } PIN_INFO(gpio0, GPIO, &pud_gpio0_info, NULL); PIN_INFO(gpio1, GPIO, &pud_gpio1_info, &od_gpio1_info); PIN_INFO(gpio2, GPIO, &pud_gpio2_info, &od_gpio2_info); PIN_INFO(gpio3, GPIO, &pud_gpio3_info, NULL); PIN_INFO(gpio4, GPIO, &pud_gpio4_info, NULL); PIN_INFO(gpio5, GPIO, &pud_gpio5_info, &od_gpio5_info); PIN_INFO(gpio6, GPIO, &pud_gpio6_info, NULL); PIN_INFO(gpio7, GPIO, &pud_gpio7_info, NULL); PIN_INFO(gpio8, GPIO, NULL, NULL); PIN_INFO(gpio9, GPIO, &pud_gpio9_info, NULL); PIN_INFO(gpio10, GPIO, &pud_gpio10_info, &od_gpio10_info); PIN_INFO(gpio11, GPIO, &pud_gpio11_info, NULL); PIN_INFO(gpio12, GPIO, NULL, NULL); PIN_INFO(gpio13, GPIO, &pud_gpio13_info, &od_gpio13_info); PIN_INFO(gpio14, GPIO, &pud_gpio14_info, NULL); PIN_INFO(gpio15, GPIO, NULL, NULL); PIN_INFO(id, ID, &pud_id_info, NULL); PIN_INFO(led1, LED, NULL, NULL); PIN_INFO(led2, LED, NULL, NULL); PIN_INFO(regen, REGEN, NULL, NULL); PIN_INFO(sysen1, SYSEN, NULL, NULL); PIN_INFO(sysen2, SYSEN, NULL, NULL); PIN_INFO(int, INT, NULL, &od_int_info); PIN_INFO(pwm1, PWM, NULL, &od_pwm1_info); PIN_INFO(pwm2, PWM, NULL, &od_pwm2_info); PIN_INFO(vacok, VACOK, &pud_vacok_info, NULL); PIN_INFO(chrg_det, CHRG_DET, &pud_chrg_det_info, NULL); PIN_INFO(pwrhold, PWRHOLD, &pud_pwrhold_info, NULL); PIN_INFO(msecure, MSECURE, &pud_msecure_info, NULL); PIN_INFO(nreswarm, NA, &pud_nreswarm_info, NULL); PIN_INFO(pwrdown, NA, &pud_pwrdown_info, NULL); PIN_INFO(gpadc_start, NA, &pud_gpadc_start_info, NULL); PIN_INFO(reset_in, NA, &pud_reset_in_info, NULL); PIN_INFO(nsleep, NA, &pud_nsleep_info, NULL); PIN_INFO(enable1, NA, &pud_enable1_info, NULL); PIN_INFO(enable2, NA, &pud_enable2_info, NULL); PIN_INFO(clk32kgaudio, CLK32KGAUDIO, NULL, NULL); PIN_INFO(usb_psel, USB_PSEL, NULL, NULL); PIN_INFO(vac, VAC, NULL, NULL); PIN_INFO(powergood, POWERGOOD, NULL, NULL); PIN_INFO(vbus_det, VBUS_DET, NULL, &od_vbus_det_info); PIN_INFO(sim1rsti, SIMRSTI, NULL, NULL); PIN_INFO(low_vbat, LOW_VBAT, NULL, NULL); PIN_INFO(rcm, RCM, NULL, NULL); PIN_INFO(sim2rsto, SIMRSTO, NULL, NULL); PIN_INFO(sim2rsti, SIMRSTI, NULL, NULL); PIN_INFO(wireless_chrg1, WIRELESS_CHRG1, NULL, NULL); #define PALMAS_PRIMARY_SECONDARY_NONE 0 #define PALMAS_NONE_BASE 0 #define PALMAS_PRIMARY_SECONDARY_INPUT3 PALMAS_PU_PD_INPUT_CTRL3 #define PALMAS_PINGROUP(pg_name, pin_id, base, reg, _mask, _bshift, o0, o1, o2, o3) \ { \ .name = #pg_name, \ .pins = {PALMAS_PIN_##pin_id}, \ .npins = 1, \ .mux_reg_base = PALMAS_##base##_BASE, \ .mux_reg_add = PALMAS_PRIMARY_SECONDARY_##reg, \ .mux_reg_mask = _mask, \ .mux_bit_shift = _bshift, \ .opt = { \ o0, \ o1, \ o2, \ o3, \ }, \ } static const struct palmas_pingroup tps65913_pingroups[] = { PALMAS_PINGROUP(gpio0, GPIO0_ID, PU_PD_OD, PAD1, 0x4, 0x2, &pin_gpio0_info, &pin_id_info, NULL, NULL), PALMAS_PINGROUP(gpio1, GPIO1_VBUS_LED1_PWM1, PU_PD_OD, PAD1, 0x18, 0x3, &pin_gpio1_info, &pin_vbus_det_info, &pin_led1_info, &pin_pwm1_info), PALMAS_PINGROUP(gpio2, GPIO2_REGEN_LED2_PWM2, PU_PD_OD, PAD1, 0x60, 0x5, &pin_gpio2_info, &pin_regen_info, &pin_led2_info, &pin_pwm2_info), PALMAS_PINGROUP(gpio3, GPIO3_CHRG_DET, PU_PD_OD, PAD1, 0x80, 0x7, &pin_gpio3_info, &pin_chrg_det_info, NULL, NULL), PALMAS_PINGROUP(gpio4, GPIO4_SYSEN1, PU_PD_OD, PAD1, 0x01, 0x0, &pin_gpio4_info, &pin_sysen1_info, NULL, NULL), PALMAS_PINGROUP(gpio5, GPIO5_CLK32KGAUDIO_USB_PSEL, PU_PD_OD, PAD2, 0x6, 0x1, &pin_gpio5_info, &pin_clk32kgaudio_info, &pin_usb_psel_info, NULL), PALMAS_PINGROUP(gpio6, GPIO6_SYSEN2, PU_PD_OD, PAD2, 0x08, 0x3, &pin_gpio6_info, &pin_sysen2_info, NULL, NULL), PALMAS_PINGROUP(gpio7, GPIO7_MSECURE_PWRHOLD, PU_PD_OD, PAD2, 0x30, 0x4, &pin_gpio7_info, &pin_msecure_info, &pin_pwrhold_info, NULL), PALMAS_PINGROUP(vac, VAC, PU_PD_OD, PAD1, 0x02, 0x1, &pin_vac_info, &pin_vacok_info, NULL, NULL), PALMAS_PINGROUP(powergood, POWERGOOD_USB_PSEL, PU_PD_OD, PAD1, 0x01, 0x0, &pin_powergood_info, &pin_usb_psel_info, NULL, NULL), PALMAS_PINGROUP(nreswarm, NRESWARM, NONE, NONE, 0x0, 0x0, &pin_nreswarm_info, NULL, NULL, NULL), PALMAS_PINGROUP(pwrdown, PWRDOWN, NONE, NONE, 0x0, 0x0, &pin_pwrdown_info, NULL, NULL, NULL), PALMAS_PINGROUP(gpadc_start, GPADC_START, NONE, NONE, 0x0, 0x0, &pin_gpadc_start_info, NULL, NULL, NULL), PALMAS_PINGROUP(reset_in, RESET_IN, NONE, NONE, 0x0, 0x0, &pin_reset_in_info, NULL, NULL, NULL), PALMAS_PINGROUP(nsleep, NSLEEP, NONE, NONE, 0x0, 0x0, &pin_nsleep_info, NULL, NULL, NULL), PALMAS_PINGROUP(enable1, ENABLE1, NONE, NONE, 0x0, 0x0, &pin_enable1_info, NULL, NULL, NULL), PALMAS_PINGROUP(enable2, ENABLE2, NONE, NONE, 0x0, 0x0, &pin_enable2_info, NULL, NULL, NULL), PALMAS_PINGROUP(int, INT, NONE, NONE, 0x0, 0x0, &pin_int_info, NULL, NULL, NULL), }; static const struct palmas_pingroup tps80036_pingroups[] = { PALMAS_PINGROUP(gpio0, GPIO0_ID, PU_PD_OD, PAD1, 0x4, 0x2, &pin_gpio0_info, &pin_id_info, NULL, NULL), PALMAS_PINGROUP(gpio1, GPIO1_VBUS_LED1_PWM1, PU_PD_OD, PAD1, 0x18, 0x3, &pin_gpio1_info, &pin_vbus_det_info, &pin_led1_info, &pin_pwm1_info), PALMAS_PINGROUP(gpio2, GPIO2_REGEN_LED2_PWM2, PU_PD_OD, PAD1, 0x60, 0x5, &pin_gpio2_info, &pin_regen_info, &pin_led2_info, &pin_pwm2_info), PALMAS_PINGROUP(gpio3, GPIO3_CHRG_DET, PU_PD_OD, PAD1, 0x80, 0x7, &pin_gpio3_info, &pin_chrg_det_info, NULL, NULL), PALMAS_PINGROUP(gpio4, GPIO4_SYSEN1, PU_PD_OD, PAD1, 0x01, 0x0, &pin_gpio4_info, &pin_sysen1_info, NULL, NULL), PALMAS_PINGROUP(gpio5, GPIO5_CLK32KGAUDIO_USB_PSEL, PU_PD_OD, PAD2, 0x6, 0x1, &pin_gpio5_info, &pin_clk32kgaudio_info, &pin_usb_psel_info, NULL), PALMAS_PINGROUP(gpio6, GPIO6_SYSEN2, PU_PD_OD, PAD2, 0x08, 0x3, &pin_gpio6_info, &pin_sysen2_info, NULL, NULL), PALMAS_PINGROUP(gpio7, GPIO7_MSECURE_PWRHOLD, PU_PD_OD, PAD2, 0x30, 0x4, &pin_gpio7_info, &pin_msecure_info, &pin_pwrhold_info, NULL), PALMAS_PINGROUP(gpio8, GPIO8_SIM1RSTI, PU_PD_OD, PAD4, 0x01, 0x0, &pin_gpio8_info, &pin_sim1rsti_info, NULL, NULL), PALMAS_PINGROUP(gpio9, GPIO9_LOW_VBAT, PU_PD_OD, PAD4, 0x02, 0x1, &pin_gpio9_info, &pin_low_vbat_info, NULL, NULL), PALMAS_PINGROUP(gpio10, GPIO10_WIRELESS_CHRG1, PU_PD_OD, PAD4, 0x04, 0x2, &pin_gpio10_info, &pin_wireless_chrg1_info, NULL, NULL), PALMAS_PINGROUP(gpio11, GPIO11_RCM, PU_PD_OD, PAD4, 0x08, 0x3, &pin_gpio11_info, &pin_rcm_info, NULL, NULL), PALMAS_PINGROUP(gpio12, GPIO12_SIM2RSTO, PU_PD_OD, PAD4, 0x10, 0x4, &pin_gpio12_info, &pin_sim2rsto_info, NULL, NULL), PALMAS_PINGROUP(gpio13, GPIO13, NONE, NONE, 0x00, 0x0, &pin_gpio13_info, NULL, NULL, NULL), PALMAS_PINGROUP(gpio14, GPIO14, NONE, NONE, 0x00, 0x0, &pin_gpio14_info, NULL, NULL, NULL), PALMAS_PINGROUP(gpio15, GPIO15_SIM2RSTI, PU_PD_OD, PAD4, 0x80, 0x7, &pin_gpio15_info, &pin_sim2rsti_info, NULL, NULL), PALMAS_PINGROUP(vac, VAC, PU_PD_OD, PAD1, 0x02, 0x1, &pin_vac_info, &pin_vacok_info, NULL, NULL), PALMAS_PINGROUP(powergood, POWERGOOD_USB_PSEL, PU_PD_OD, PAD1, 0x01, 0x0, &pin_powergood_info, &pin_usb_psel_info, NULL, NULL), PALMAS_PINGROUP(nreswarm, NRESWARM, NONE, NONE, 0x0, 0x0, &pin_nreswarm_info, NULL, NULL, NULL), PALMAS_PINGROUP(pwrdown, PWRDOWN, NONE, NONE, 0x0, 0x0, &pin_pwrdown_info, NULL, NULL, NULL), PALMAS_PINGROUP(gpadc_start, GPADC_START, NONE, NONE, 0x0, 0x0, &pin_gpadc_start_info, NULL, NULL, NULL), PALMAS_PINGROUP(reset_in, RESET_IN, NONE, NONE, 0x0, 0x0, &pin_reset_in_info, NULL, NULL, NULL), PALMAS_PINGROUP(nsleep, NSLEEP, NONE, NONE, 0x0, 0x0, &pin_nsleep_info, NULL, NULL, NULL), PALMAS_PINGROUP(enable1, ENABLE1, NONE, NONE, 0x0, 0x0, &pin_enable1_info, NULL, NULL, NULL), PALMAS_PINGROUP(enable2, ENABLE2, NONE, NONE, 0x0, 0x0, &pin_enable2_info, NULL, NULL, NULL), PALMAS_PINGROUP(int, INT, NONE, NONE, 0x0, 0x0, &pin_int_info, NULL, NULL, NULL), }; static int palmas_pinctrl_get_pin_mux(struct palmas_pctrl_chip_info *pci) { const struct palmas_pingroup *g; unsigned int val; int ret; int i; for (i = 0; i < pci->num_pin_groups; ++i) { g = &pci->pin_groups[i];


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