aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/rtc
diff options
context:
space:
mode:
authorStanimir Varbanov <svarbanov@mm-sol.com>2014-10-29 17:50:33 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-10-29 19:33:14 -0400
commitc8d523a4b053d1678adb92976b5ef84d9bc481e8 (patch)
tree80a30509beca806dd7081db41678e5aa72b20d48 /drivers/rtc
parent6d50e60cd2edb5a57154db5a6f64eef5aa59b751 (diff)
drivers/rtc/rtc-pm8xxx.c: rework to support pm8941 rtc
Adds support for RTC device inside PM8941 PMIC. The RTC in this PMIC have two register spaces. Thus the rtc-pm8xxx is slightly reworked to reflect these differences. The register set for different PMIC chips are selected on DT compatible string base. [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: simplify and fix locking in pm8xxx_rtc_set_time()] Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Josh Cartwright <joshc@codeaurora.org> Cc: Stanimir Varbanov <svarbanov@mm-sol.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/rtc')
-rw-r--r--drivers/rtc/Kconfig2
-rw-r--r--drivers/rtc/rtc-pm8xxx.c222
2 files changed, 135 insertions, 89 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 94ae1798d48a..6dd12ddbabc6 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1320,7 +1320,7 @@ config RTC_DRV_LPC32XX
1320 1320
1321config RTC_DRV_PM8XXX 1321config RTC_DRV_PM8XXX
1322 tristate "Qualcomm PMIC8XXX RTC" 1322 tristate "Qualcomm PMIC8XXX RTC"
1323 depends on MFD_PM8XXX 1323 depends on MFD_PM8XXX || MFD_SPMI_PMIC
1324 help 1324 help
1325 If you say yes here you get support for the 1325 If you say yes here you get support for the
1326 Qualcomm PMIC8XXX RTC. 1326 Qualcomm PMIC8XXX RTC.
diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c
index 197699f358c7..5adcf111fc14 100644
--- a/drivers/rtc/rtc-pm8xxx.c
+++ b/drivers/rtc/rtc-pm8xxx.c
@@ -27,21 +27,36 @@
27 27
28/* RTC_CTRL register bit fields */ 28/* RTC_CTRL register bit fields */
29#define PM8xxx_RTC_ENABLE BIT(7) 29#define PM8xxx_RTC_ENABLE BIT(7)
30#define PM8xxx_RTC_ALARM_ENABLE BIT(1)
31#define PM8xxx_RTC_ALARM_CLEAR BIT(0) 30#define PM8xxx_RTC_ALARM_CLEAR BIT(0)
32 31
33#define NUM_8_BIT_RTC_REGS 0x4 32#define NUM_8_BIT_RTC_REGS 0x4
34 33
35/** 34/**
35 * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
36 * @ctrl: base address of control register
37 * @write: base address of write register
38 * @read: base address of read register
39 * @alarm_ctrl: base address of alarm control register
40 * @alarm_ctrl2: base address of alarm control2 register
41 * @alarm_rw: base address of alarm read-write register
42 * @alarm_en: alarm enable mask
43 */
44struct pm8xxx_rtc_regs {
45 unsigned int ctrl;
46 unsigned int write;
47 unsigned int read;
48 unsigned int alarm_ctrl;
49 unsigned int alarm_ctrl2;
50 unsigned int alarm_rw;
51 unsigned int alarm_en;
52};
53
54/**
36 * struct pm8xxx_rtc - rtc driver internal structure 55 * struct pm8xxx_rtc - rtc driver internal structure
37 * @rtc: rtc device for this driver. 56 * @rtc: rtc device for this driver.
38 * @regmap: regmap used to access RTC registers 57 * @regmap: regmap used to access RTC registers
39 * @allow_set_time: indicates whether writing to the RTC is allowed 58 * @allow_set_time: indicates whether writing to the RTC is allowed
40 * @rtc_alarm_irq: rtc alarm irq number. 59 * @rtc_alarm_irq: rtc alarm irq number.
41 * @rtc_base: address of rtc control register.
42 * @rtc_read_base: base address of read registers.
43 * @rtc_write_base: base address of write registers.
44 * @alarm_rw_base: base address of alarm registers.
45 * @ctrl_reg: rtc control register. 60 * @ctrl_reg: rtc control register.
46 * @rtc_dev: device structure. 61 * @rtc_dev: device structure.
47 * @ctrl_reg_lock: spinlock protecting access to ctrl_reg. 62 * @ctrl_reg_lock: spinlock protecting access to ctrl_reg.
@@ -51,11 +66,7 @@ struct pm8xxx_rtc {
51 struct regmap *regmap; 66 struct regmap *regmap;
52 bool allow_set_time; 67 bool allow_set_time;
53 int rtc_alarm_irq; 68 int rtc_alarm_irq;
54 int rtc_base; 69 const struct pm8xxx_rtc_regs *regs;
55 int rtc_read_base;
56 int rtc_write_base;
57 int alarm_rw_base;
58 u8 ctrl_reg;
59 struct device *rtc_dev; 70 struct device *rtc_dev;
60 spinlock_t ctrl_reg_lock; 71 spinlock_t ctrl_reg_lock;
61}; 72};
@@ -71,8 +82,10 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
71{ 82{
72 int rc, i; 83 int rc, i;
73 unsigned long secs, irq_flags; 84 unsigned long secs, irq_flags;
74 u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, ctrl_reg; 85 u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0;
86 unsigned int ctrl_reg;
75 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev); 87 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
88 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
76 89
77 if (!rtc_dd->allow_set_time) 90 if (!rtc_dd->allow_set_time)
78 return -EACCES; 91 return -EACCES;
@@ -87,30 +100,30 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
87 dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs); 100 dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
88 101
89 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags); 102 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
90 ctrl_reg = rtc_dd->ctrl_reg;
91 103
92 if (ctrl_reg & PM8xxx_RTC_ALARM_ENABLE) { 104 rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
105 if (rc)
106 goto rtc_rw_fail;
107
108 if (ctrl_reg & regs->alarm_en) {
93 alarm_enabled = 1; 109 alarm_enabled = 1;
94 ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE; 110 ctrl_reg &= ~regs->alarm_en;
95 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg); 111 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
96 if (rc) { 112 if (rc) {
97 dev_err(dev, "Write to RTC control register failed\n"); 113 dev_err(dev, "Write to RTC control register failed\n");
98 goto rtc_rw_fail; 114 goto rtc_rw_fail;
99 } 115 }
100 rtc_dd->ctrl_reg = ctrl_reg;
101 } else {
102 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
103 } 116 }
104 117
105 /* Write 0 to Byte[0] */ 118 /* Write 0 to Byte[0] */
106 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, 0); 119 rc = regmap_write(rtc_dd->regmap, regs->write, 0);
107 if (rc) { 120 if (rc) {
108 dev_err(dev, "Write to RTC write data register failed\n"); 121 dev_err(dev, "Write to RTC write data register failed\n");
109 goto rtc_rw_fail; 122 goto rtc_rw_fail;
110 } 123 }
111 124
112 /* Write Byte[1], Byte[2], Byte[3] */ 125 /* Write Byte[1], Byte[2], Byte[3] */
113 rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->rtc_write_base + 1, 126 rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
114 &value[1], sizeof(value) - 1); 127 &value[1], sizeof(value) - 1);
115 if (rc) { 128 if (rc) {
116 dev_err(dev, "Write to RTC write data register failed\n"); 129 dev_err(dev, "Write to RTC write data register failed\n");
@@ -118,25 +131,23 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
118 } 131 }
119 132
120 /* Write Byte[0] */ 133 /* Write Byte[0] */
121 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, value[0]); 134 rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
122 if (rc) { 135 if (rc) {
123 dev_err(dev, "Write to RTC write data register failed\n"); 136 dev_err(dev, "Write to RTC write data register failed\n");
124 goto rtc_rw_fail; 137 goto rtc_rw_fail;
125 } 138 }
126 139
127 if (alarm_enabled) { 140 if (alarm_enabled) {
128 ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE; 141 ctrl_reg |= regs->alarm_en;
129 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg); 142 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
130 if (rc) { 143 if (rc) {
131 dev_err(dev, "Write to RTC control register failed\n"); 144 dev_err(dev, "Write to RTC control register failed\n");
132 goto rtc_rw_fail; 145 goto rtc_rw_fail;
133 } 146 }
134 rtc_dd->ctrl_reg = ctrl_reg;
135 } 147 }
136 148
137rtc_rw_fail: 149rtc_rw_fail:
138 if (alarm_enabled) 150 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
139 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
140 151
141 return rc; 152 return rc;
142} 153}
@@ -148,9 +159,9 @@ static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
148 unsigned long secs; 159 unsigned long secs;
149 unsigned int reg; 160 unsigned int reg;
150 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev); 161 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
162 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
151 163
152 rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base, 164 rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
153 value, sizeof(value));
154 if (rc) { 165 if (rc) {
155 dev_err(dev, "RTC read data register failed\n"); 166 dev_err(dev, "RTC read data register failed\n");
156 return rc; 167 return rc;
@@ -160,14 +171,14 @@ static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
160 * Read the LSB again and check if there has been a carry over. 171 * Read the LSB again and check if there has been a carry over.
161 * If there is, redo the read operation. 172 * If there is, redo the read operation.
162 */ 173 */
163 rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_read_base, &reg); 174 rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
164 if (rc < 0) { 175 if (rc < 0) {
165 dev_err(dev, "RTC read data register failed\n"); 176 dev_err(dev, "RTC read data register failed\n");
166 return rc; 177 return rc;
167 } 178 }
168 179
169 if (unlikely(reg < value[0])) { 180 if (unlikely(reg < value[0])) {
170 rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base, 181 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
171 value, sizeof(value)); 182 value, sizeof(value));
172 if (rc) { 183 if (rc) {
173 dev_err(dev, "RTC read data register failed\n"); 184 dev_err(dev, "RTC read data register failed\n");
@@ -195,9 +206,11 @@ static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
195static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 206static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
196{ 207{
197 int rc, i; 208 int rc, i;
198 u8 value[NUM_8_BIT_RTC_REGS], ctrl_reg; 209 u8 value[NUM_8_BIT_RTC_REGS];
210 unsigned int ctrl_reg;
199 unsigned long secs, irq_flags; 211 unsigned long secs, irq_flags;
200 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev); 212 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
213 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
201 214
202 rtc_tm_to_time(&alarm->time, &secs); 215 rtc_tm_to_time(&alarm->time, &secs);
203 216
@@ -208,28 +221,28 @@ static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
208 221
209 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags); 222 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
210 223
211 rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->alarm_rw_base, value, 224 rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
212 sizeof(value)); 225 sizeof(value));
213 if (rc) { 226 if (rc) {
214 dev_err(dev, "Write to RTC ALARM register failed\n"); 227 dev_err(dev, "Write to RTC ALARM register failed\n");
215 goto rtc_rw_fail; 228 goto rtc_rw_fail;
216 } 229 }
217 230
218 ctrl_reg = rtc_dd->ctrl_reg; 231 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
232 if (rc)
233 goto rtc_rw_fail;
219 234
220 if (alarm->enabled) 235 if (alarm->enabled)
221 ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE; 236 ctrl_reg |= regs->alarm_en;
222 else 237 else
223 ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE; 238 ctrl_reg &= ~regs->alarm_en;
224 239
225 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg); 240 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
226 if (rc) { 241 if (rc) {
227 dev_err(dev, "Write to RTC control register failed\n"); 242 dev_err(dev, "Write to RTC alarm control register failed\n");
228 goto rtc_rw_fail; 243 goto rtc_rw_fail;
229 } 244 }
230 245
231 rtc_dd->ctrl_reg = ctrl_reg;
232
233 dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n", 246 dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
234 alarm->time.tm_hour, alarm->time.tm_min, 247 alarm->time.tm_hour, alarm->time.tm_min,
235 alarm->time.tm_sec, alarm->time.tm_mday, 248 alarm->time.tm_sec, alarm->time.tm_mday,
@@ -245,8 +258,9 @@ static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
245 u8 value[NUM_8_BIT_RTC_REGS]; 258 u8 value[NUM_8_BIT_RTC_REGS];
246 unsigned long secs; 259 unsigned long secs;
247 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev); 260 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
261 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
248 262
249 rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->alarm_rw_base, value, 263 rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
250 sizeof(value)); 264 sizeof(value));
251 if (rc) { 265 if (rc) {
252 dev_err(dev, "RTC alarm time read failed\n"); 266 dev_err(dev, "RTC alarm time read failed\n");
@@ -276,25 +290,26 @@ static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
276 int rc; 290 int rc;
277 unsigned long irq_flags; 291 unsigned long irq_flags;
278 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev); 292 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
279 u8 ctrl_reg; 293 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
294 unsigned int ctrl_reg;
280 295
281 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags); 296 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
282 297
283 ctrl_reg = rtc_dd->ctrl_reg; 298 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
299 if (rc)
300 goto rtc_rw_fail;
284 301
285 if (enable) 302 if (enable)
286 ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE; 303 ctrl_reg |= regs->alarm_en;
287 else 304 else
288 ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE; 305 ctrl_reg &= ~regs->alarm_en;
289 306
290 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg); 307 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
291 if (rc) { 308 if (rc) {
292 dev_err(dev, "Write to RTC control register failed\n"); 309 dev_err(dev, "Write to RTC control register failed\n");
293 goto rtc_rw_fail; 310 goto rtc_rw_fail;
294 } 311 }
295 312
296 rtc_dd->ctrl_reg = ctrl_reg;
297
298rtc_rw_fail: 313rtc_rw_fail:
299 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); 314 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
300 return rc; 315 return rc;
@@ -311,6 +326,7 @@ static const struct rtc_class_ops pm8xxx_rtc_ops = {
311static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id) 326static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
312{ 327{
313 struct pm8xxx_rtc *rtc_dd = dev_id; 328 struct pm8xxx_rtc *rtc_dd = dev_id;
329 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
314 unsigned int ctrl_reg; 330 unsigned int ctrl_reg;
315 int rc; 331 int rc;
316 unsigned long irq_flags; 332 unsigned long irq_flags;
@@ -320,48 +336,100 @@ static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
320 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags); 336 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
321 337
322 /* Clear the alarm enable bit */ 338 /* Clear the alarm enable bit */
323 ctrl_reg = rtc_dd->ctrl_reg; 339 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
324 ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE; 340 if (rc) {
341 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
342 goto rtc_alarm_handled;
343 }
344
345 ctrl_reg &= ~regs->alarm_en;
325 346
326 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg); 347 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
327 if (rc) { 348 if (rc) {
328 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); 349 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
329 dev_err(rtc_dd->rtc_dev, 350 dev_err(rtc_dd->rtc_dev,
330 "Write to RTC control register failed\n"); 351 "Write to alarm control register failed\n");
331 goto rtc_alarm_handled; 352 goto rtc_alarm_handled;
332 } 353 }
333 354
334 rtc_dd->ctrl_reg = ctrl_reg;
335 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); 355 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
336 356
337 /* Clear RTC alarm register */ 357 /* Clear RTC alarm register */
338 rc = regmap_read(rtc_dd->regmap, 358 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
339 rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
340 &ctrl_reg);
341 if (rc) { 359 if (rc) {
342 dev_err(rtc_dd->rtc_dev, 360 dev_err(rtc_dd->rtc_dev,
343 "RTC Alarm control register read failed\n"); 361 "RTC Alarm control2 register read failed\n");
344 goto rtc_alarm_handled; 362 goto rtc_alarm_handled;
345 } 363 }
346 364
347 ctrl_reg &= ~PM8xxx_RTC_ALARM_CLEAR; 365 ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
348 rc = regmap_write(rtc_dd->regmap, 366 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
349 rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
350 ctrl_reg);
351 if (rc) 367 if (rc)
352 dev_err(rtc_dd->rtc_dev, 368 dev_err(rtc_dd->rtc_dev,
353 "Write to RTC Alarm control register failed\n"); 369 "Write to RTC Alarm control2 register failed\n");
354 370
355rtc_alarm_handled: 371rtc_alarm_handled:
356 return IRQ_HANDLED; 372 return IRQ_HANDLED;
357} 373}
358 374
375static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
376{
377 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
378 unsigned int ctrl_reg;
379 int rc;
380
381 /* Check if the RTC is on, else turn it on */
382 rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
383 if (rc)
384 return rc;
385
386 if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
387 ctrl_reg |= PM8xxx_RTC_ENABLE;
388 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
389 if (rc)
390 return rc;
391 }
392
393 return 0;
394}
395
396static const struct pm8xxx_rtc_regs pm8921_regs = {
397 .ctrl = 0x11d,
398 .write = 0x11f,
399 .read = 0x123,
400 .alarm_rw = 0x127,
401 .alarm_ctrl = 0x11d,
402 .alarm_ctrl2 = 0x11e,
403 .alarm_en = BIT(1),
404};
405
406static const struct pm8xxx_rtc_regs pm8058_regs = {
407 .ctrl = 0x1e8,
408 .write = 0x1ea,
409 .read = 0x1ee,
410 .alarm_rw = 0x1f2,
411 .alarm_ctrl = 0x1e8,
412 .alarm_ctrl2 = 0x1e9,
413 .alarm_en = BIT(1),
414};
415
416static const struct pm8xxx_rtc_regs pm8941_regs = {
417 .ctrl = 0x6046,
418 .write = 0x6040,
419 .read = 0x6048,
420 .alarm_rw = 0x6140,
421 .alarm_ctrl = 0x6146,
422 .alarm_ctrl2 = 0x6148,
423 .alarm_en = BIT(7),
424};
425
359/* 426/*
360 * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out 427 * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
361 */ 428 */
362static const struct of_device_id pm8xxx_id_table[] = { 429static const struct of_device_id pm8xxx_id_table[] = {
363 { .compatible = "qcom,pm8921-rtc", .data = (void *) 0x11D }, 430 { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
364 { .compatible = "qcom,pm8058-rtc", .data = (void *) 0x1E8 }, 431 { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
432 { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
365 { }, 433 { },
366}; 434};
367MODULE_DEVICE_TABLE(of, pm8xxx_id_table); 435MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
@@ -369,7 +437,6 @@ MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
369static int pm8xxx_rtc_probe(struct platform_device *pdev) 437static int pm8xxx_rtc_probe(struct platform_device *pdev)
370{ 438{
371 int rc; 439 int rc;
372 unsigned int ctrl_reg;
373 struct pm8xxx_rtc *rtc_dd; 440 struct pm8xxx_rtc *rtc_dd;
374 const struct of_device_id *match; 441 const struct of_device_id *match;
375 442
@@ -399,33 +466,12 @@ static int pm8xxx_rtc_probe(struct platform_device *pdev)
399 rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node, 466 rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
400 "allow-set-time"); 467 "allow-set-time");
401 468
402 rtc_dd->rtc_base = (long) match->data; 469 rtc_dd->regs = match->data;
403
404 /* Setup RTC register addresses */
405 rtc_dd->rtc_write_base = rtc_dd->rtc_base + PM8XXX_RTC_WRITE_OFFSET;
406 rtc_dd->rtc_read_base = rtc_dd->rtc_base + PM8XXX_RTC_READ_OFFSET;
407 rtc_dd->alarm_rw_base = rtc_dd->rtc_base + PM8XXX_ALARM_RW_OFFSET;
408
409 rtc_dd->rtc_dev = &pdev->dev; 470 rtc_dd->rtc_dev = &pdev->dev;
410 471
411 /* Check if the RTC is on, else turn it on */ 472 rc = pm8xxx_rtc_enable(rtc_dd);
412 rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_base, &ctrl_reg); 473 if (rc)
413 if (rc) {
414 dev_err(&pdev->dev, "RTC control register read failed!\n");
415 return rc; 474 return rc;
416 }
417
418 if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
419 ctrl_reg |= PM8xxx_RTC_ENABLE;
420 rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
421 if (rc) {
422 dev_err(&pdev->dev,
423 "Write to RTC control register failed\n");
424 return rc;
425 }
426 }
427
428 rtc_dd->ctrl_reg = ctrl_reg;
429 475
430 platform_set_drvdata(pdev, rtc_dd); 476 platform_set_drvdata(pdev, rtc_dd);
431 477