[ARM] rtc-sa1100: don't assume CLOCK_TICK_RATE to be a constant

As Nicolas and Russell pointed out, CLOCK_TICK_RATE is no more
a constant on PXA when multiple processors and platforms are
selected, change TIMER_FREQ in rtc-sa1100.c into a variable.

Since the code to decide the clock tick rate is re-used from
timer.c, introduce a common get_clock_tick_rate() for this.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Acked-by: Nicolas Pitre <nico@marvell.com>

1 files changed, 7 insertions, 5 deletions

diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c
index 66a9bb85bbe8..d26a5f82aaba 100644
--- a/drivers/rtc/rtc-sa1100.c
+++ b/drivers/rtc/rtc-sa1100.c
@@ -38,11 +38,11 @@
 #include <mach/pxa-regs.h>
 #endif
 
-#define TIMER_FREQ              CLOCK_TICK_RATE
 #define RTC_DEF_DIVIDER         32768 - 1
 #define RTC_DEF_TRIM            0
 
 static unsigned long rtc_freq = 1024;
+static unsigned long timer_freq;
 static struct rtc_time rtc_alarm;
 static DEFINE_SPINLOCK(sa1100_rtc_lock);
 
@@ -157,7 +157,7 @@ static irqreturn_t timer1_interrupt(int irq, void *dev_id)
         rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF);
 
         if (rtc_timer1_count == 1)
-                rtc_timer1_count = (rtc_freq * ((1<<30)/(TIMER_FREQ>>2)));
+                rtc_timer1_count = (rtc_freq * ((1 << 30) / (timer_freq >> 2)));
 
         return IRQ_HANDLED;
 }
@@ -166,7 +166,7 @@ static int sa1100_rtc_read_callback(struct device *dev, int data)
 {
         if (data & RTC_PF) {
                 /* interpolate missed periods and set match for the next */
-                unsigned long period = TIMER_FREQ/rtc_freq;
+                unsigned long period = timer_freq / rtc_freq;
                 unsigned long oscr = OSCR;
                 unsigned long osmr1 = OSMR1;
                 unsigned long missed = (oscr - osmr1)/period;
@@ -263,7 +263,7 @@ static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd,
                 return 0;
         case RTC_PIE_ON:
                 spin_lock_irq(&sa1100_rtc_lock);
-                OSMR1 = TIMER_FREQ/rtc_freq + OSCR;
+                OSMR1 = timer_freq / rtc_freq + OSCR;
                 OIER |= OIER_E1;
                 rtc_timer1_count = 1;
                 spin_unlock_irq(&sa1100_rtc_lock);
@@ -271,7 +271,7 @@ static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd,
         case RTC_IRQP_READ:
                 return put_user(rtc_freq, (unsigned long *)arg);
         case RTC_IRQP_SET:
-                if (arg < 1 || arg > TIMER_FREQ)
+                if (arg < 1 || arg > timer_freq)
                         return -EINVAL;
                 rtc_freq = arg;
                 return 0;
@@ -352,6 +352,8 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
 {
         struct rtc_device *rtc;
 
+        timer_freq = get_clock_tick_rate();
+
         /*
          * According to the manual we should be able to let RTTR be zero
          * and then a default diviser for a 32.768KHz clock is used.