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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2014-08-07 02:36:12 -0400 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2014-08-07 02:36:12 -0400 |
| commit | 5e2aa2ed08e2e280121dc7cf5609c87d464f12ef (patch) | |
| tree | ca7d7b1480285e3b617fecc5b41f0ce150a82c32 /drivers/reset | |
| parent | f62d14a8072b9756db36ba394e2b267470a40240 (diff) | |
| parent | fc8104bc5a3f6f49d79f45f2706f79f77a9fb2ae (diff) | |
Merge branch 'next' into for-linus
Prepare first round of input updates for 3.17.
Diffstat (limited to 'drivers/reset')
| -rw-r--r-- | drivers/reset/Makefile | 1 | ||||
| -rw-r--r-- | drivers/reset/reset-socfpga.c | 146 | ||||
| -rw-r--r-- | drivers/reset/reset-sunxi.c | 21 | ||||
| -rw-r--r-- | drivers/reset/sti/reset-stih415.c | 1 | ||||
| -rw-r--r-- | drivers/reset/sti/reset-stih416.c | 1 |
5 files changed, 167 insertions, 3 deletions
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 4f60caf750ce..60fed3d7820b 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile | |||
| @@ -1,3 +1,4 @@ | |||
| 1 | obj-$(CONFIG_RESET_CONTROLLER) += core.o | 1 | obj-$(CONFIG_RESET_CONTROLLER) += core.o |
| 2 | obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o | ||
| 2 | obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o | 3 | obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o |
| 3 | obj-$(CONFIG_ARCH_STI) += sti/ | 4 | obj-$(CONFIG_ARCH_STI) += sti/ |
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c new file mode 100644 index 000000000000..79c32ca84ef1 --- /dev/null +++ b/drivers/reset/reset-socfpga.c | |||
| @@ -0,0 +1,146 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de> | ||
| 3 | * | ||
| 4 | * based on | ||
| 5 | * Allwinner SoCs Reset Controller driver | ||
| 6 | * | ||
| 7 | * Copyright 2013 Maxime Ripard | ||
| 8 | * | ||
| 9 | * Maxime Ripard <maxime.ripard@free-electrons.com> | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License as published by | ||
| 13 | * the Free Software Foundation; either version 2 of the License, or | ||
| 14 | * (at your option) any later version. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/err.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | #include <linux/module.h> | ||
| 20 | #include <linux/of.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/reset-controller.h> | ||
| 23 | #include <linux/spinlock.h> | ||
| 24 | #include <linux/types.h> | ||
| 25 | |||
| 26 | #define NR_BANKS 4 | ||
| 27 | #define OFFSET_MODRST 0x10 | ||
| 28 | |||
| 29 | struct socfpga_reset_data { | ||
| 30 | spinlock_t lock; | ||
| 31 | void __iomem *membase; | ||
| 32 | struct reset_controller_dev rcdev; | ||
| 33 | }; | ||
| 34 | |||
| 35 | static int socfpga_reset_assert(struct reset_controller_dev *rcdev, | ||
| 36 | unsigned long id) | ||
| 37 | { | ||
| 38 | struct socfpga_reset_data *data = container_of(rcdev, | ||
| 39 | struct socfpga_reset_data, | ||
| 40 | rcdev); | ||
| 41 | int bank = id / BITS_PER_LONG; | ||
| 42 | int offset = id % BITS_PER_LONG; | ||
| 43 | unsigned long flags; | ||
| 44 | u32 reg; | ||
| 45 | |||
| 46 | spin_lock_irqsave(&data->lock, flags); | ||
| 47 | |||
| 48 | reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS)); | ||
| 49 | writel(reg | BIT(offset), data->membase + OFFSET_MODRST + | ||
| 50 | (bank * NR_BANKS)); | ||
| 51 | spin_unlock_irqrestore(&data->lock, flags); | ||
| 52 | |||
| 53 | return 0; | ||
| 54 | } | ||
| 55 | |||
| 56 | static int socfpga_reset_deassert(struct reset_controller_dev *rcdev, | ||
| 57 | unsigned long id) | ||
| 58 | { | ||
| 59 | struct socfpga_reset_data *data = container_of(rcdev, | ||
| 60 | struct socfpga_reset_data, | ||
| 61 | rcdev); | ||
| 62 | |||
| 63 | int bank = id / BITS_PER_LONG; | ||
| 64 | int offset = id % BITS_PER_LONG; | ||
| 65 | unsigned long flags; | ||
| 66 | u32 reg; | ||
| 67 | |||
| 68 | spin_lock_irqsave(&data->lock, flags); | ||
| 69 | |||
| 70 | reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS)); | ||
| 71 | writel(reg & ~BIT(offset), data->membase + OFFSET_MODRST + | ||
| 72 | (bank * NR_BANKS)); | ||
| 73 | |||
| 74 | spin_unlock_irqrestore(&data->lock, flags); | ||
| 75 | |||
| 76 | return 0; | ||
| 77 | } | ||
| 78 | |||
| 79 | static struct reset_control_ops socfpga_reset_ops = { | ||
| 80 | .assert = socfpga_reset_assert, | ||
| 81 | .deassert = socfpga_reset_deassert, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static int socfpga_reset_probe(struct platform_device *pdev) | ||
| 85 | { | ||
| 86 | struct socfpga_reset_data *data; | ||
| 87 | struct resource *res; | ||
| 88 | |||
| 89 | /* | ||
| 90 | * The binding was mainlined without the required property. | ||
| 91 | * Do not continue, when we encounter an old DT. | ||
| 92 | */ | ||
| 93 | if (!of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) { | ||
| 94 | dev_err(&pdev->dev, "%s missing #reset-cells property\n", | ||
| 95 | pdev->dev.of_node->full_name); | ||
| 96 | return -EINVAL; | ||
| 97 | } | ||
| 98 | |||
| 99 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | ||
| 100 | if (!data) | ||
| 101 | return -ENOMEM; | ||
| 102 | |||
| 103 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 104 | data->membase = devm_ioremap_resource(&pdev->dev, res); | ||
| 105 | if (IS_ERR(data->membase)) | ||
| 106 | return PTR_ERR(data->membase); | ||
| 107 | |||
| 108 | spin_lock_init(&data->lock); | ||
| 109 | |||
| 110 | data->rcdev.owner = THIS_MODULE; | ||
| 111 | data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG; | ||
| 112 | data->rcdev.ops = &socfpga_reset_ops; | ||
| 113 | data->rcdev.of_node = pdev->dev.of_node; | ||
| 114 | reset_controller_register(&data->rcdev); | ||
| 115 | |||
| 116 | return 0; | ||
| 117 | } | ||
| 118 | |||
| 119 | static int socfpga_reset_remove(struct platform_device *pdev) | ||
| 120 | { | ||
| 121 | struct socfpga_reset_data *data = platform_get_drvdata(pdev); | ||
| 122 | |||
| 123 | reset_controller_unregister(&data->rcdev); | ||
| 124 | |||
| 125 | return 0; | ||
| 126 | } | ||
| 127 | |||
| 128 | static const struct of_device_id socfpga_reset_dt_ids[] = { | ||
| 129 | { .compatible = "altr,rst-mgr", }, | ||
| 130 | { /* sentinel */ }, | ||
| 131 | }; | ||
| 132 | |||
| 133 | static struct platform_driver socfpga_reset_driver = { | ||
| 134 | .probe = socfpga_reset_probe, | ||
| 135 | .remove = socfpga_reset_remove, | ||
| 136 | .driver = { | ||
| 137 | .name = "socfpga-reset", | ||
| 138 | .owner = THIS_MODULE, | ||
| 139 | .of_match_table = socfpga_reset_dt_ids, | ||
| 140 | }, | ||
| 141 | }; | ||
| 142 | module_platform_driver(socfpga_reset_driver); | ||
| 143 | |||
| 144 | MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de"); | ||
| 145 | MODULE_DESCRIPTION("Socfpga Reset Controller Driver"); | ||
| 146 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c index 695bd3496eba..a94e7a7820b4 100644 --- a/drivers/reset/reset-sunxi.c +++ b/drivers/reset/reset-sunxi.c | |||
| @@ -145,7 +145,24 @@ MODULE_DEVICE_TABLE(of, sunxi_reset_dt_ids); | |||
| 145 | 145 | ||
| 146 | static int sunxi_reset_probe(struct platform_device *pdev) | 146 | static int sunxi_reset_probe(struct platform_device *pdev) |
| 147 | { | 147 | { |
| 148 | return sunxi_reset_init(pdev->dev.of_node); | 148 | struct sunxi_reset_data *data; |
| 149 | struct resource *res; | ||
| 150 | |||
| 151 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | ||
| 152 | if (!data) | ||
| 153 | return -ENOMEM; | ||
| 154 | |||
| 155 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 156 | data->membase = devm_ioremap_resource(&pdev->dev, res); | ||
| 157 | if (IS_ERR(data->membase)) | ||
| 158 | return PTR_ERR(data->membase); | ||
| 159 | |||
| 160 | data->rcdev.owner = THIS_MODULE; | ||
| 161 | data->rcdev.nr_resets = resource_size(res) * 32; | ||
| 162 | data->rcdev.ops = &sunxi_reset_ops; | ||
| 163 | data->rcdev.of_node = pdev->dev.of_node; | ||
| 164 | |||
| 165 | return reset_controller_register(&data->rcdev); | ||
| 149 | } | 166 | } |
| 150 | 167 | ||
| 151 | static int sunxi_reset_remove(struct platform_device *pdev) | 168 | static int sunxi_reset_remove(struct platform_device *pdev) |
| @@ -153,8 +170,6 @@ static int sunxi_reset_remove(struct platform_device *pdev) | |||
| 153 | struct sunxi_reset_data *data = platform_get_drvdata(pdev); | 170 | struct sunxi_reset_data *data = platform_get_drvdata(pdev); |
| 154 | 171 | ||
| 155 | reset_controller_unregister(&data->rcdev); | 172 | reset_controller_unregister(&data->rcdev); |
| 156 | iounmap(data->membase); | ||
| 157 | kfree(data); | ||
| 158 | 173 | ||
| 159 | return 0; | 174 | return 0; |
| 160 | } | 175 | } |
diff --git a/drivers/reset/sti/reset-stih415.c b/drivers/reset/sti/reset-stih415.c index e6f6c41abe12..c93fd260447e 100644 --- a/drivers/reset/sti/reset-stih415.c +++ b/drivers/reset/sti/reset-stih415.c | |||
| @@ -73,6 +73,7 @@ static const struct syscfg_reset_channel_data stih415_softresets[] = { | |||
| 73 | [STIH415_USB0_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 9), | 73 | [STIH415_USB0_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 9), |
| 74 | [STIH415_USB1_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 10), | 74 | [STIH415_USB1_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 10), |
| 75 | [STIH415_USB2_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 11), | 75 | [STIH415_USB2_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 11), |
| 76 | [STIH415_KEYSCAN_SOFTRESET] = STIH415_SRST_LPM(LPM_SYSCFG_1, 8), | ||
| 76 | }; | 77 | }; |
| 77 | 78 | ||
| 78 | static struct syscfg_reset_controller_data stih415_powerdown_controller = { | 79 | static struct syscfg_reset_controller_data stih415_powerdown_controller = { |
diff --git a/drivers/reset/sti/reset-stih416.c b/drivers/reset/sti/reset-stih416.c index fe3bf02bdc8c..5fc987076a90 100644 --- a/drivers/reset/sti/reset-stih416.c +++ b/drivers/reset/sti/reset-stih416.c | |||
| @@ -104,6 +104,7 @@ static const struct syscfg_reset_channel_data stih416_softresets[] = { | |||
| 104 | [STIH416_COMPO_A_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 4), | 104 | [STIH416_COMPO_A_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 4), |
| 105 | [STIH416_VP8_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 10), | 105 | [STIH416_VP8_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 10), |
| 106 | [STIH416_VTG_MAIN_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 16), | 106 | [STIH416_VTG_MAIN_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 16), |
| 107 | [STIH416_KEYSCAN_SOFTRESET] = STIH416_SRST_LPM(LPM_SYSCFG_1, 8), | ||
| 107 | }; | 108 | }; |
| 108 | 109 | ||
| 109 | static struct syscfg_reset_controller_data stih416_powerdown_controller = { | 110 | static struct syscfg_reset_controller_data stih416_powerdown_controller = { |
