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authorSascha Hauer <s.hauer@pengutronix.de>2012-08-28 06:03:29 -0400
committerThierry Reding <thierry.reding@avionic-design.de>2012-09-12 08:25:06 -0400
commit8d1c24bfd20829f5943c76b85c4973db264dd666 (patch)
tree1f2b14fe60d88e63dd8919683213014f64d52641 /drivers/pwm/pwm-imx.c
parent479e2e301c626cc64fb27b6b1938655eaba8b036 (diff)
pwm: i.MX: use per clock unconditionally
The i.MX PWM module has two clocks: The ipg clock and the ipg highfreq (peripheral) clock. The ipg clock has to be enabled for this hardware to work. The actual PWM output can either be driven by the ipg clock or the ipg highfreq. The ipg highfreq has the advantage that it runs even when the SoC is in low power modes. Use the always running clock also on i.MX25. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Diffstat (limited to 'drivers/pwm/pwm-imx.c')
-rw-r--r--drivers/pwm/pwm-imx.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
index 0f6c436c0632..852de6ce6e11 100644
--- a/drivers/pwm/pwm-imx.c
+++ b/drivers/pwm/pwm-imx.c
@@ -17,7 +17,6 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/pwm.h> 18#include <linux/pwm.h>
19#include <linux/of_device.h> 19#include <linux/of_device.h>
20#include <mach/hardware.h>
21 20
22/* i.MX1 and i.MX21 share the same PWM function block: */ 21/* i.MX1 and i.MX21 share the same PWM function block: */
23 22
@@ -133,16 +132,11 @@ static int imx_pwm_config_v2(struct pwm_chip *chip,
133 132
134 cr = MX3_PWMCR_PRESCALER(prescale) | 133 cr = MX3_PWMCR_PRESCALER(prescale) |
135 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN | 134 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
136 MX3_PWMCR_DBGEN; 135 MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH;
137 136
138 if (imx->enabled) 137 if (imx->enabled)
139 cr |= MX3_PWMCR_EN; 138 cr |= MX3_PWMCR_EN;
140 139
141 if (cpu_is_mx25())
142 cr |= MX3_PWMCR_CLKSRC_IPG;
143 else
144 cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
145
146 writel(cr, imx->mmio_base + MX3_PWMCR); 140 writel(cr, imx->mmio_base + MX3_PWMCR);
147 141
148 return 0; 142 return 0;